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[23.128.96.18]) by mx.google.com with ESMTP id a15si438641eju.200.2020.10.05.00.48.50; Mon, 05 Oct 2020 00:48:50 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=crrbqVe+; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725880AbgJEHst (ORCPT + 6 others); Mon, 5 Oct 2020 03:48:49 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:44664 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725873AbgJEHst (ORCPT ); Mon, 5 Oct 2020 03:48:49 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0957mWH2086977; Mon, 5 Oct 2020 02:48:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1601884112; bh=69KgE8mHDfu6DlspDD/TZVauI7Aqq+Hq9zM+62Tt5iQ=; h=From:To:CC:Subject:Date; b=crrbqVe+mfaoLopTGIyE703GAuieoqiO5vwmF4OMXOgOmnOsWih6fpVj4tG7k4iPa yciaLIRqrhI215Ym5GWaeO38dJ7MqNedCaDXb8wwQrpZq+pufRDPiUKumKCvJRfr6B 1lxilV/YjMxHdFHvVDy8fqpQTufPdCIZNabLUv9Q= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0957mW65087001 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 5 Oct 2020 02:48:32 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 5 Oct 2020 02:48:32 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 5 Oct 2020 02:48:32 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0957mTw2111860; Mon, 5 Oct 2020 02:48:30 -0500 From: Peter Ujfalusi To: , CC: , , , Subject: [PATCH] arm64: dts: ti: k3-j7200-main: Add McASP nodes Date: Mon, 5 Oct 2020 10:48:50 +0300 Message-ID: <20201005074850.11247-1-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the nodes for McASP 0-2 and keep them disabled because several required properties are not present as they are board specific. Signed-off-by: Peter Ujfalusi --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 57 +++++++++++++++++++++++ 1 file changed, 57 insertions(+) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 72d6496e88dd..cc6c2a81887a 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -446,4 +446,61 @@ usb0: usb@6000000 { dr_mode = "otg"; }; }; + + mcasp0: mcasp@02b00000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x0 0x02b00000 0x0 0x2000>, + <0x0 0x02b08000 0x0 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + + dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>; + dma-names = "tx", "rx"; + + clocks = <&k3_clks 174 40>; + clock-names = "fck"; + power-domains = <&k3_pds 174 TI_SCI_PD_EXCLUSIVE>; + + status = "disabled"; + }; + + mcasp1: mcasp@02b10000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x0 0x02b10000 0x0 0x2000>, + <0x0 0x02b18000 0x0 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + + dmas = <&main_udmap 0xc401>, <&main_udmap 0x4401>; + dma-names = "tx", "rx"; + + clocks = <&k3_clks 175 40>; + clock-names = "fck"; + power-domains = <&k3_pds 175 TI_SCI_PD_EXCLUSIVE>; + + status = "disabled"; + }; + + mcasp2: mcasp@02b20000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x0 0x02b20000 0x0 0x2000>, + <0x0 0x02b28000 0x0 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + + dmas = <&main_udmap 0xc402>, <&main_udmap 0x4402>; + dma-names = "tx", "rx"; + + clocks = <&k3_clks 176 40>; + clock-names = "fck"; + power-domains = <&k3_pds 176 TI_SCI_PD_EXCLUSIVE>; + + status = "disabled"; + }; };