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[78.12.251.125]) by smtp.gmail.com with ESMTPSA id f125sm2751101wme.45.2017.12.20.09.15.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 20 Dec 2017 09:15:51 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Wed, 20 Dec 2017 18:14:29 +0100 Message-Id: <1513790098-9815-18-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1513790098-9815-1-git-send-email-pbonzini@redhat.com> References: <1513790098-9815-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::241 Subject: [Qemu-devel] [PULL 17/46] target/i386: Fix handling of VEX prefixes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell In commit e3af7c788b73a6495eb9d94992ef11f6ad6f3c56 we replaced direct calls to to cpu_ld*_code() with calls to the x86_ld*_code() wrappers which incorporate an advance of s->pc. Unfortunately we didn't notice that in one place the old code was deliberately not incrementing s->pc: @@ -4501,7 +4528,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) static const int pp_prefix[4] = { 0, PREFIX_DATA, PREFIX_REPZ, PREFIX_REPNZ }; - int vex3, vex2 = cpu_ldub_code(env, s->pc); + int vex3, vex2 = x86_ldub_code(env, s); if (!CODE64(s) && (vex2 & 0xc0) != 0xc0) { /* 4.1.4.6: In 32-bit mode, bits [7:6] must be 11b, This meant we were mishandling this set of instructions. Remove the manual advance of s->pc for the "is VEX" case (which is now done by x86_ldub_code()) and instead rewind PC in the case where we decide that this isn't really VEX. Signed-off-by: Peter Maydell Cc: qemu-stable@nongnu.org Reported-by: Alexandro Sanchez Bach Message-Id: <1513163959-17545-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini --- target/i386/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.8.3.1 diff --git a/target/i386/translate.c b/target/i386/translate.c index f410938..23d7eec 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -4548,9 +4548,9 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (!CODE64(s) && (vex2 & 0xc0) != 0xc0) { /* 4.1.4.6: In 32-bit mode, bits [7:6] must be 11b, otherwise the instruction is LES or LDS. */ + s->pc--; /* rewind the advance_pc() x86_ldub_code() did */ break; } - s->pc++; /* 4.1.1-4.1.3: No preceding lock, 66, f2, f3, or rex prefixes. */ if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ From patchwork Wed Dec 20 17:14:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 122488 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5892936qgn; Wed, 20 Dec 2017 09:48:20 -0800 (PST) X-Google-Smtp-Source: ACJfBouup2pe/VsRGrdSW4ad8rylf56j1fIdUdwNrgtpT0ORsi+k/eIFtTHxadTVahCGStsbO+cN X-Received: by 10.37.161.131 with SMTP id a3mr5785375ybi.303.1513792100911; Wed, 20 Dec 2017 09:48:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513792100; cv=none; d=google.com; s=arc-20160816; b=yCKfUrAw7YV/+Kxp3UX+Ow4xeSN7J3zmqodmCmD3p5wlf9+M09qaXDXgORFsHuy1Ej coda7NWMls44MK/baU3JVcUTxmijKZym0CENnB2dNyJN+oTHgxPS0+cw+KJunayjDzEQ fqnkaflGhgs+VBV5qpNddqGYGT5HZEXDGn/xCKQhKaT/NEFinFoEdXUFAn8tSkNYnARO 9iPi5yqAn+yFpoy8ESXJSS7opjFGeXjNKjAscCTjdeNaITnjAVOIn15a3VuYawZKHYUK +PMRnJu2/bCKwf61nCbfyKemdrfhlbALtbU+apKbXmMo+fq4ueEVvwX5LjR8PumxCT78 zY9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=odyuUt0Aj/fq2kfpbleAvgaIgCxEoUpONkdTAR6BzQg=; b=Tk0+76cmTt2HTaX9AcdYqzkaVK8WNerLPrPi3WQoIeVp0tU+RcEBIPaaSQ0S6B3evx W7GcPeZIVVZkr8rIxglOnape3HxO4rHhZC6+NsIH7lh9oiKSW01jU/AIcNTCeXV1NYk9 sMxVsrVrfaN/hsndm+fHfcvzHH8aN/u3jsGW4WQHUjf3AUXH225eR8pblHRJjiBEbvj9 MYRSmTq4qBROBZLUC4iEx+8PNIZr1qyAQuF+Z1gAzkn6cjPajo59/ao+vMRUE+eG4J6t CW8CYUXlXNSKnIYi7LGtiaw2PBS7+l061hBHopAULoKtYM9hffAPgssG6V9+PUJl319Q Md5g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=gfLTsLXM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[78.12.251.125]) by smtp.gmail.com with ESMTPSA id f125sm2751101wme.45.2017.12.20.09.16.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 20 Dec 2017 09:16:04 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Wed, 20 Dec 2017 18:14:41 +0100 Message-Id: <1513790098-9815-30-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1513790098-9815-1-git-send-email-pbonzini@redhat.com> References: <1513790098-9815-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::244 Subject: [Qemu-devel] [PULL 29/46] exec: Don't reuse unassigned_mem_ops for io_mem_rom X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell We set up the io_mem_rom special memory region using the unassigned_mem_ops structure; this is then used when a guest tries to write to ROM. This is incorrect, because the behaviour of unassigned memory may be different from that of ROM for writes. In particular, on some architectures writing to unassigned memory generates a guest exception, whereas writing to ROM is generally ignored. Use a special readonly_mem_ops for this purpose instead, so writes to ROM are ignored for all guest CPUs. Signed-off-by: Peter Maydell Message-Id: <1513187549-2435-2-git-send-email-peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini --- exec.c | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) -- 1.8.3.1 diff --git a/exec.c b/exec.c index 6b5828e..4722e52 100644 --- a/exec.c +++ b/exec.c @@ -2725,6 +2725,37 @@ static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr) return phys_section_add(map, §ion); } +static void readonly_mem_write(void *opaque, hwaddr addr, + uint64_t val, unsigned size) +{ + /* Ignore any write to ROM. */ +} + +static bool readonly_mem_accepts(void *opaque, hwaddr addr, + unsigned size, bool is_write) +{ + return is_write; +} + +/* This will only be used for writes, because reads are special cased + * to directly access the underlying host ram. + */ +static const MemoryRegionOps readonly_mem_ops = { + .write = readonly_mem_write, + .valid.accepts = readonly_mem_accepts, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 8, + .unaligned = false, + }, + .impl = { + .min_access_size = 1, + .max_access_size = 8, + .unaligned = false, + }, +}; + MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index, MemTxAttrs attrs) { int asidx = cpu_asidx_from_attrs(cpu, attrs); @@ -2737,7 +2768,8 @@ MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index, MemTxAttrs attrs) static void io_mem_init(void) { - memory_region_init_io(&io_mem_rom, NULL, &unassigned_mem_ops, NULL, NULL, UINT64_MAX); + memory_region_init_io(&io_mem_rom, NULL, &readonly_mem_ops, + NULL, NULL, UINT64_MAX); memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL, NULL, UINT64_MAX); From patchwork Wed Dec 20 17:14:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 122487 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5889507qgn; Wed, 20 Dec 2017 09:45:06 -0800 (PST) X-Google-Smtp-Source: ACJfBoto8rOQh3IAG+f7yPp/FzUW3kBfCXF45fdP/4OSgySciyn0EZHFE4mJx92NJswqV9h1Y/Li X-Received: by 10.37.116.86 with SMTP id p83mr6058889ybc.128.1513791906133; Wed, 20 Dec 2017 09:45:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513791906; cv=none; d=google.com; s=arc-20160816; b=bAWzBbA9GeBdrVrg9GC8XCVOuI6ChpAxcuqFV9FZEZwNs7a7raYi8PzlAua0ZHboL0 6Su6xyfV5a/itX3wSbSFP3Jkal6bMtzvwHQR69GQvJmViUgMqJAwgwAMco/osnPo9K50 S/TUmadOAizsj1W5aYHigAlJp0MIs4ueGJl0iOhI5GXa16yfPGjs3d625EPVzuwG1rsw 6xXV5S+keK7ayM97yhoYWNiYa1MURXHyOZoSYB/X840fD9/eRsQ/KHWUAr4INx8O7enn z74TNvWxb0KyE3ctytb3pmIKNHmWfJgLI1exIsOGkHjuyMxgAMiVL5KKBjCESVAJ9cjF mWzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=pKpkifw8hWxEpYyeYQK8s7k+qdEtLUZUQXiL1OTSFqc=; b=qCNX17uoMG93GsK1pCfJbOgXo18vz+k/tS440GsJ7kpeqnlJVtO4MFG1kcMLvOs/6e w2u8MaJxOoOoIWo+uTPPmC/cPyctyHyhjg8OqapoTDSxPmTPM5+XHfrWOnGmdgi0YxDg Cd5jnZBQYABCf67bQB3bkzoVJUDbM7HZ2yoCUnW/rzwnrH3zUZZ+zEi84aC4x6QS00HX Vg7i1EsPjpNVtGyXtAR4Mi81WvlgxY4bdm0Z5pJm+dyKSw3hF7zXTRtycNlxwL3r503N kPIUSRGF15qsKcW0r6DnJDUi3U4l0JAKGeo9p9R5gVmm8Zf3Nodvh2zi2KanAfPjpdNs b1KA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=Y1Q7M8AM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[78.12.251.125]) by smtp.gmail.com with ESMTPSA id f125sm2751101wme.45.2017.12.20.09.16.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 20 Dec 2017 09:16:06 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Wed, 20 Dec 2017 18:14:42 +0100 Message-Id: <1513790098-9815-31-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1513790098-9815-1-git-send-email-pbonzini@redhat.com> References: <1513790098-9815-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::243 Subject: [Qemu-devel] [PULL 30/46] hw/mips/boston: Remove workaround for writes to ROM aborting X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Now that the memory system correctly handles writes to ROM for guest CPUs that may generate exceptions for decode errors, we can remove the workaround from the boston board. Signed-off-by: Peter Maydell Message-Id: <1513187549-2435-3-git-send-email-peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini --- hw/mips/boston.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) -- 1.8.3.1 diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 1cb4b6a..fb23161 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -248,16 +248,6 @@ static const MemoryRegionOps boston_platreg_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static void boston_flash_write(void *opaque, hwaddr addr, - uint64_t val, unsigned size) -{ -} - -static const MemoryRegionOps boston_flash_ops = { - .write = boston_flash_write, - .endianness = DEVICE_NATIVE_ENDIAN, -}; - static const TypeInfo boston_device = { .name = TYPE_MIPS_BOSTON, .parent = TYPE_SYS_BUS_DEVICE, @@ -481,8 +471,8 @@ static void boston_mach_init(MachineState *machine) sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->cps), 0, 0, 1); flash = g_new(MemoryRegion, 1); - memory_region_init_rom_device_nomigrate(flash, NULL, &boston_flash_ops, s, - "boston.flash", 128 * M_BYTE, &err); + memory_region_init_rom_nomigrate(flash, NULL, + "boston.flash", 128 * M_BYTE, &err); memory_region_add_subregion_overlap(sys_mem, 0x18000000, flash, 0); ddr = g_new(MemoryRegion, 1);