From patchwork Thu Sep 17 08:26:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 313006 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp227779ilg; Thu, 17 Sep 2020 01:26:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxrlXjkACba8ahKhIP1uJCSdVr0ETw//OwnP+pxEazwpdlTuHDMiD4YyN0q8ZvqOzi5eKt2 X-Received: by 2002:aa7:dd11:: with SMTP id i17mr31014452edv.170.1600331198821; Thu, 17 Sep 2020 01:26:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600331198; cv=none; d=google.com; s=arc-20160816; b=JBucCbszzpxNbphHwDZnlpIvOshj4efCCcqfbPz7nScaRxSm+3kA+ljqjjrBEyZWuZ YVTEYNq7qFc7GmAa5MX0faBFRQ6Mb+Zq5bnFEOC130Wu5GV0eF8jD8s00RSaomclWxo2 0ZHCO1a3WbahsCGb5a9CPZWpccZ3y/kW1Fm06rlyz76bbBVEG3X6WClbXFFDnh4pP3he C+p2B404m8Ow7AcqA0xWdC8WYwx2gxnFwC/BHn/Y1bzkgZEOTUHRPLyV7xTMdvI4quZD 34fzJAHXkJsKhCT/AWF7q0IAvZIUUs9aentC3nO8lzFxgFONjqj2/4FsGFprlcTUnh/G 112Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=D6h+xKCe0NuczXnbv5vYewO0odIcXWf9WH9+tSHUU4s=; b=NZ9F/BcNG9Q5m9T7UJ6D/akF+4kBWkUc3KdXI/60CWbqGbmQ/0eC52sGobgIayZpqq JZcnmEpUrOsqfYyfw9LIxDsdXgCeO9Hs7tgHxH2MXZm9/6/SnA0Pdp+8Ec8fKCQewNEb znzUfm59QgUiS04hl4YB1UpXD3rac0Ku8upUZ5v5WqWFxh+HhPqKFkPHuAyUfJ+n2Wx6 dnHp6aSxuWPOytuDDNgrsR6qYvgggXzdseqzNhaTa/QDmh2Xrxr2yxzQUz/TdcoiebC2 pSBzVVDQI6bazg6nKP6opvlUoF9BEh5ZxVaNS7445aZH+YXKcSxTTbaCW/B4XjhkWkK3 8aaQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jeRzzBbG; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d17si13320024edy.180.2020.09.17.01.26.38; Thu, 17 Sep 2020 01:26:38 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jeRzzBbG; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726244AbgIQI0f (ORCPT + 6 others); Thu, 17 Sep 2020 04:26:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726358AbgIQI0e (ORCPT ); Thu, 17 Sep 2020 04:26:34 -0400 Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 801B4C061756 for ; Thu, 17 Sep 2020 01:26:34 -0700 (PDT) Received: by mail-pf1-x441.google.com with SMTP id k8so759888pfk.2 for ; Thu, 17 Sep 2020 01:26:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=D6h+xKCe0NuczXnbv5vYewO0odIcXWf9WH9+tSHUU4s=; b=jeRzzBbGla5iVfHIc+qJ9qx4GzGPi/zWJQ4LIVyclPcn9BrNnPMvbWAcAFa2KDmwmT D7RcmoRqojesewmgDOr1s+NTJPLqP1odGzqJ60qq30YO0yiTGMec1QrnYd+V1Igc/F+g tzW1xtkI7QrIRm7Rhj4QsihBAn7X9LFT/blGUPz26kUoCacIyASTFxOI+P8qXLrcTnD8 1AmG6L27t75St2az44hf+92q3IPbpA1I171NADTszerBFuS7MC7cLkuaaXInGly43CQj fGx1NmqxEwqA3xb52c/RXOE0dhKnUZirxV0KrpOFo3Tk8ABQkSKBE0b9LXM/So58BAly 24MA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=D6h+xKCe0NuczXnbv5vYewO0odIcXWf9WH9+tSHUU4s=; b=p2whz2NJ4NEsDhpq4VPBPo7vParzWHJP/++hsKGwMVGBb2fXazXpWTxiHv0WWCk4Zn NAlNa5+YfKM+k1Pkb80fAW2BNWjO1yyCNM5KafgqBZPaEnmUsJlhjYSUSvxG6OOGKN7b G2BMEvzdyWA+hz3/3OfCPR4GhPXaQxbR1ln6e0dKTlu07hLyY+Qrq9AVcsiVBiWGgZk9 0OaLKZb32k35p16MSJ6YmfldN+QsmIn6e7+9RFi6UxN1zPn94ZfwPOouYbLB3tZ6Si40 CJ5grP8uuamBWtQ7J39Ho68+uNM6Z2M59XaHa/fa0TxyVypRvw7q1SzyIUBPwYRIwUso PL8A== X-Gm-Message-State: AOAM533ktX0C+giIM9yy6+LLd5rf0G8iXQfaufTnTsEg8lkEqXd3j0OG cmq5Bu58VceJ/U2Qdq4nI1oa X-Received: by 2002:aa7:8ec7:0:b029:13e:d13d:a080 with SMTP id b7-20020aa78ec70000b029013ed13da080mr25243462pfr.23.1600331194008; Thu, 17 Sep 2020 01:26:34 -0700 (PDT) Received: from Mani-XPS-13-9360.localdomain ([103.59.133.81]) by smtp.gmail.com with ESMTPSA id g129sm8233194pfb.9.2020.09.17.01.26.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Sep 2020 01:26:33 -0700 (PDT) From: Manivannan Sadhasivam To: agross@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmitry.baryshkov@linaro.org, Jonathan Marek Subject: [PATCH 1/3] arm64: dts: qcom: sm8250: add apps_smmu node Date: Thu, 17 Sep 2020 13:56:20 +0530 Message-Id: <20200917082622.6823-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200917082622.6823-1-manivannan.sadhasivam@linaro.org> References: <20200917082622.6823-1-manivannan.sadhasivam@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Marek Add the apps_smmu node for sm8250. For UFS, now that the kernel initializes the iommu, the stream mappings set by the bootloader are cleared. Adding the iommus property is required so that new mappings are created for UFS. Signed-off-by: Jonathan Marek --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 107 +++++++++++++++++++++++++++ 1 file changed, 107 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 357e4bfba70c..3b3eae732da7 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1163,6 +1163,8 @@ power-domains = <&gcc UFS_PHY_GDSC>; + iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>; + clock-names = "core_clk", "bus_aggr_clk", @@ -2125,6 +2127,111 @@ }; }; + apps_smmu: iommu@15000000 { + compatible = "qcom,sm8250-smmu-500", "arm,mmu-500"; + reg = <0 0x15000000 0 0x100000>; + #iommu-cells = <2>; + #global-interrupts = <2>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + adsp: remoteproc@17300000 { compatible = "qcom,sm8250-adsp-pas"; reg = <0 0x17300000 0 0x100>; From patchwork Thu Sep 17 08:26:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 313007 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp227793ilg; Thu, 17 Sep 2020 01:26:41 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyqDFB1Keje5N+DgwXWcTOCN+1G0VCNTTFxOCLxsrQp/1Sr5UOVumJrD0CpAqWp+rTL/pk5 X-Received: by 2002:a17:907:6f6:: with SMTP id yh22mr29539796ejb.268.1600331201436; Thu, 17 Sep 2020 01:26:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600331201; cv=none; d=google.com; s=arc-20160816; b=HrpL4ZOxu/Z47Lwv5oQwen11mGlbjkBm0v2bPr6d2VHMaDBr+ZNO9cASP1EuNoma6M Rcfaff6ftBqLNgYk5k6f+01/6PahT5ARCidrOSmeKhtSPmqYGvgJ9vvVTaAzFHn+ykDt DoB/75kHtIOVned1TW2w1P1iFrIJZqmPrLfphWfl9DVrOgK9ISt+EWrFWyggAETPGoUS zh7Ihk+gE8tlC8iTDB3LeK4mZP5kzhIZ1Nv/MTy372fkGYcckG23XnT4qveglahSEAH2 IGGDDAhyvJ8Fq4XbWuRlEeVwYVOsfjrv/z4rzHsK6VgpWz0Qjko6UIWtj4IyiFyNS2Wb ft/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=E9jyVu0k3eRY7h2H387hr4y+DVkcJDyudhDSHAOQrBM=; b=qhOVd0c9JmyjXbKZ4uRO97djj+R11BfjVW34BBgh6Rsu/bVdwaqhGHpVGwHXsQZKN3 unaRcP2XW9vn/Mp/mZ7hnpo7h8RkDXKpVAvAFGmNRHRFAL9uC+W1lKS23PNdmI7XoIF9 nGMbGdrRfStpDX3l6Bou0v+2dvN8tm+hOkmriyilVk9mg4tGwK66xuMyDm7XUvCpXXqY HyWLtn960Mmpt9naxJPVD4KTTX2NTK6V1Y/qEmV6xN0YGjniszwBGVsxrfsFQw2Cw+6l 7fQjtppHn8AN5cY4DES3MN2J5p7DXgBW5yN6PhQWyowCLncBUcxepkG18c/mg15oQL9q F65Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vPYDOcut; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Jonathan Marek --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 180 +++++++++++++++++++++++++++ 1 file changed, 180 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 3b3eae732da7..815e66ce0b76 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1453,6 +1453,186 @@ }; }; + usb_1_hsphy: phy@88e3000 { + compatible = "qcom,sm8250-usb-hs-phy", + "qcom,usb-snps-hs-7nm-phy"; + reg = <0 0x088e3000 0 0x400>; + status = "disabled"; + #phy-cells = <0>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "ref"; + + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; + }; + + usb_2_hsphy: phy@88e4000 { + compatible = "qcom,sm8250-usb-hs-phy", + "qcom,usb-snps-hs-7nm-phy"; + reg = <0 0x088e4000 0 0x400>; + status = "disabled"; + #phy-cells = <0>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "ref"; + + resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; + }; + + usb_1_qmpphy: phy@88e9000 { + compatible = "qcom,sm8250-qmp-usb3-phy"; + reg = <0 0x088e9000 0 0x200>, + <0 0x088e8000 0 0x20>; + reg-names = "reg-base", "dp_com"; + status = "disabled"; + #clock-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; + clock-names = "aux", "ref_clk_src", "com_aux"; + + resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, + <&gcc GCC_USB3_PHY_PRIM_BCR>; + reset-names = "phy", "common"; + + usb_1_ssphy: lanes@88e9200 { + reg = <0 0x088e9200 0 0x200>, + <0 0x088e9400 0 0x200>, + <0 0x088e9c00 0 0x400>, + <0 0x088e9600 0 0x200>, + <0 0x088e9800 0 0x200>, + <0 0x088e9a00 0 0x100>; + #phy-cells = <0>; + clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "usb3_phy_pipe_clk_src"; + }; + }; + + usb_2_qmpphy: phy@88eb000 { + compatible = "qcom,sm8250-qmp-usb3-uni-phy"; + reg = <0 0x088eb000 0 0x200>; + status = "disabled"; + #clock-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_USB3_SEC_CLKREF_EN>, + <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; + clock-names = "aux", "ref_clk_src", "ref", "com_aux"; + + resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, + <&gcc GCC_USB3_PHY_SEC_BCR>; + reset-names = "phy", "common"; + + usb_2_ssphy: lane@88eb200 { + reg = <0 0x088eb200 0 0x200>, + <0 0x088eb400 0 0x200>, + <0 0x088eb800 0 0x800>; + #phy-cells = <0>; + clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "usb3_uni_phy_pipe_clk_src"; + }; + }; + + usb_1: usb@a6f8800 { + compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; + reg = <0 0x0a6f8800 0 0x400>; + status = "disabled"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB3_SEC_CLKREF_EN>; + clock-names = "cfg_noc", "core", "iface", "mock_utmi", + "sleep", "xo"; + + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + + interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", + "dm_hs_phy_irq", "ss_phy_irq"; + + power-domains = <&gcc USB30_PRIM_GDSC>; + + resets = <&gcc GCC_USB30_PRIM_BCR>; + + usb_1_dwc3: dwc3@a600000 { + compatible = "snps,dwc3"; + reg = <0 0x0a600000 0 0xcd00>; + interrupts = ; + iommus = <&apps_smmu 0x0 0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + + usb_2: usb@a8f8800 { + compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; + reg = <0 0x0a8f8800 0 0x400>; + status = "disabled"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, + <&gcc GCC_USB30_SEC_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB3_SEC_CLKREF_EN>; + clock-names = "cfg_noc", "core", "iface", "mock_utmi", + "sleep", "xo"; + + assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SEC_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + + interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", + "dm_hs_phy_irq", "ss_phy_irq"; + + power-domains = <&gcc USB30_SEC_GDSC>; + + resets = <&gcc GCC_USB30_SEC_BCR>; + + usb_2_dwc3: dwc3@a800000 { + compatible = "snps,dwc3"; + reg = <0 0x0a800000 0 0xcd00>; + interrupts = ; + iommus = <&apps_smmu 0x20 0>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_2_hsphy>, <&usb_2_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + dc_noc: interconnect@90c0000 { compatible = "qcom,sm8250-dc-noc"; reg = <0 0x090c0000 0 0x4200>; From patchwork Thu Sep 17 08:26:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 313009 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp227861ilg; Thu, 17 Sep 2020 01:26:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzmC4u1qBEJQVIHX1U8cg/CHJa1OFV4NGr+Xw5PihJMsGnjKcicIcDT+D/MQowx9ciFNVxY X-Received: by 2002:aa7:ca46:: with SMTP id j6mr31334243edt.155.1600331209322; Thu, 17 Sep 2020 01:26:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600331209; cv=none; d=google.com; s=arc-20160816; b=UXiujT5vae3CaPxMYZUxBkS8VHtOTPiATD9kbj7z3mA+nWc67U2vYwbsfM1kdhOEac tNLU8iX/w2gyKs2RXvtuF0ERFrXFj5yEkuqNcwDJ6RvuKDE352y7Jkd74YHEEa4/Tqoo vxCWmAEevYSpOWA9LwNJNMQhU5CmziHnoQ4p7MWR95tm4jgBTvBU6SSxsqGEEY06a1kS jlzszOSjiUAM8/g4S70u7VhBw9Ppjzny+F6vr2cxAWITBK47rbDQYw/uogHNyVnXT/5H zPAqiNyW8IhzGtn5A5QJo4pm5DC6xm9LMYYkdxDZaNqTCWzh+qEm1mCCAOyVxPSxnomp 6gug== ARC-Message-Signature: i=1; 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USB0 is connected to the Type C port and USB1 is connected to USB3.1 HUB which exposes following downstream ports: * 2 Type A ports * 2 HS/SS ports on the expansion connector * USB to LAN device Hence, enable these two controllers with the required PHYs. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 46 ++++++++++++++++++++++++ 1 file changed, 46 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index 1528a865f1f8..e020013c1add 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -684,3 +684,49 @@ vdda-pll-supply = <&vreg_l9a_1p2>; vdda-pll-max-microamp = <18800>; }; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + status = "okay"; + + vdda-pll-supply = <&vreg_l5a_0p88>; + vdda33-supply = <&vreg_l2a_3p1>; + vdda18-supply = <&vreg_l12a_1p8>; +}; + +&usb_1_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vreg_l9a_1p2>; + vdda-pll-supply = <&vreg_l18a_0p92>; +}; + +&usb_2 { + status = "okay"; +}; + +&usb_2_dwc3 { + dr_mode = "host"; +}; + +&usb_2_hsphy { + status = "okay"; + + vdda-pll-supply = <&vreg_l5a_0p88>; + vdda33-supply = <&vreg_l2a_3p1>; + vdda18-supply = <&vreg_l12a_1p8>; +}; + +&usb_2_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vreg_l9a_1p2>; + vdda-pll-supply = <&vreg_l18a_0p92>; +};