From patchwork Mon Mar 13 11:53:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 95208 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp1134882qgd; Mon, 13 Mar 2017 04:54:26 -0700 (PDT) X-Received: by 10.99.154.9 with SMTP id o9mr36800223pge.69.1489406066429; Mon, 13 Mar 2017 04:54:26 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p14si275987pll.287.2017.03.13.04.54.26; Mon, 13 Mar 2017 04:54:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752284AbdCMLyR (ORCPT + 4 others); Mon, 13 Mar 2017 07:54:17 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:63210 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752367AbdCMLx2 (ORCPT ); Mon, 13 Mar 2017 07:53:28 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v2DBrPbx021514; Mon, 13 Mar 2017 06:53:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1489406005; bh=KL6N9BMMjOdClXLC3M7uEISmmfVuJccw4cvOC4248HM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=PzhgJGPRwVJOIqwTJs7/VHDON7Of04fOXRXUqVWhx9fvYMSL9yBHZ+XFq5TWofgPJ JveovEWMZpeoua1wZaDIFB9EdgazDDJlmn7gfZ4hJmoA5H/PhdJfTRq8gApG+D+Vh3 +RKdtlvYc0lDEZ+0OmGM8P6SWf0PSa5LF3KqVGCQ= Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2DBrPW8008302; Mon, 13 Mar 2017 06:53:25 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Mon, 13 Mar 2017 06:53:25 -0500 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2DBrH2B025695; Mon, 13 Mar 2017 06:53:23 -0500 From: Roger Quadros To: , CC: , , , , , Roger Quadros Subject: [PATCH 2/4] ARM: OMAP2+ hwmod: Allow modules to disable HW_AUTO Date: Mon, 13 Mar 2017 13:53:14 +0200 Message-ID: <1489405996-10718-3-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1489405996-10718-1-git-send-email-rogerq@ti.com> References: <1489405996-10718-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Introduce HWMOD_CLKDM_NOAUTO flag that allows the hwmod's clockdomain to be prevented from HW_AUTO while the hwmod is active. This is needed to workaround some modules which don't function correctly with HW_AUTO. e.g. DCAN on DRA7. Signed-off-by: Roger Quadros [nsekhar@ti.com: rebased to v4.9 kernel] Signed-off-by: Sekhar Nori --- arch/arm/mach-omap2/omap_hwmod.c | 4 ++-- arch/arm/mach-omap2/omap_hwmod.h | 5 +++++ 2 files changed, 7 insertions(+), 2 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Signed-off-by: Roger Quadros Signed-off-by: Sekhar Nori diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index e8b9887..7a29f48 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -2092,7 +2092,7 @@ static int _enable(struct omap_hwmod *oh) r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : -EINVAL; - if (oh->clkdm) + if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO)) clkdm_allow_idle(oh->clkdm); if (!r) { @@ -2149,7 +2149,7 @@ static int _idle(struct omap_hwmod *oh) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); - if (oh->clkdm) + if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO)) clkdm_deny_idle(oh->clkdm); if (oh->flags & HWMOD_BLOCK_WFI) diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index 9e1c4ed..cda553a 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -531,6 +531,10 @@ struct omap_hwmod_omap4_prcm { * operate and they need to be handled at the same time as the main_clk. * HWMOD_NO_IDLE: Do not idle the hwmod at all. Useful to handle certain * IPs like CPSW on DRA7, where clocks to this module cannot be disabled. + * HWMOD_CLKDM_NOAUTO: Allows the hwmod's clockdomain to be prevented from + * entering HW_AUTO while hwmod is active. This is needed to workaround + * some modules which don't function correctly with HW_AUTO. For example, + * DCAN on DRA7x SoC needs this to workaround errata i893. */ #define HWMOD_SWSUP_SIDLE (1 << 0) #define HWMOD_SWSUP_MSTANDBY (1 << 1) @@ -548,6 +552,7 @@ struct omap_hwmod_omap4_prcm { #define HWMOD_RECONFIG_IO_CHAIN (1 << 13) #define HWMOD_OPT_CLKS_NEEDED (1 << 14) #define HWMOD_NO_IDLE (1 << 15) +#define HWMOD_CLKDM_NOAUTO (1 << 16) /* * omap_hwmod._int_flags definitions From patchwork Mon Mar 13 11:53:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 95205 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp1134721qgd; Mon, 13 Mar 2017 04:53:53 -0700 (PDT) X-Received: by 10.99.238.69 with SMTP id n5mr36159287pgk.38.1489406033299; Mon, 13 Mar 2017 04:53:53 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h1si275430plk.276.2017.03.13.04.53.53; Mon, 13 Mar 2017 04:53:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752742AbdCMLxm (ORCPT + 4 others); Mon, 13 Mar 2017 07:53:42 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:32884 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752521AbdCMLxc (ORCPT ); Mon, 13 Mar 2017 07:53:32 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v2DBrRWs011607; Mon, 13 Mar 2017 06:53:27 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1489406007; bh=6+cq4mNH7/VKo81gsQkoZw24cuKIwjvHLay4ALtHTY8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LvsP7t1homGPZ81CkbCGNFQxqU/E5FsJu7RtzRiwXyaoE2PkfHG2ZmuiIhdAQxL+t Z3r9ehS653KLDe5JN+wsuxebPCk0ekdgeUX/QZhqMZwuHVHwKDnwAtwWYzgsg3lSae E8iIC5bCdSeeveajyNIHZiXP32Bwh+ybSMcZAwo0= Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2DBrRMr008336; Mon, 13 Mar 2017 06:53:27 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Mon, 13 Mar 2017 06:53:27 -0500 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2DBrH2C025695; Mon, 13 Mar 2017 06:53:25 -0500 From: Roger Quadros To: , CC: , , , , , Roger Quadros Subject: [PATCH 3/4] ARM: DRA7: hwmod: Fix DCAN1 stuck in transition Date: Mon, 13 Mar 2017 13:53:15 +0200 Message-ID: <1489405996-10718-4-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1489405996-10718-1-git-send-email-rogerq@ti.com> References: <1489405996-10718-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add HWMOD_CLKDM_NOAUTO flag to DCAN1 module. Without this DCAN1 module remains stuck in transition after the CAN interface is brought down. This is also suggested in Errata i893 "DCAN Initialization Sequence". Add the HWMOD_CLKDM_NOAUTO to DCAN2 module as well as it is mentioned in Errata i893. Signed-off-by: Roger Quadros --- arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index d058529..896f238 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -359,6 +359,7 @@ static struct omap_hwmod dra7xx_dcan1_hwmod = { .class = &dra7xx_dcan_hwmod_class, .clkdm_name = "wkupaon_clkdm", .main_clk = "dcan1_sys_clk_mux", + .flags = HWMOD_CLKDM_NOAUTO, .prcm = { .omap4 = { .clkctrl_offs = DRA7XX_CM_WKUPAON_DCAN1_CLKCTRL_OFFSET, @@ -374,6 +375,7 @@ static struct omap_hwmod dra7xx_dcan2_hwmod = { .class = &dra7xx_dcan_hwmod_class, .clkdm_name = "l4per2_clkdm", .main_clk = "sys_clkin1", + .flags = HWMOD_CLKDM_NOAUTO, .prcm = { .omap4 = { .clkctrl_offs = DRA7XX_CM_L4PER2_DCAN2_CLKCTRL_OFFSET,