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Tue, 27 Oct 2020 23:26:55 +0000 From: "Badel, Laurent" To: "davem@davemloft.net" , "m.felsch@pengutronix.de" , "fugang.duan@nxp.com" , "kuba@kernel.org" , "andrew@lunn.ch" , Heiner Kallweit , "linux@armlinux.org.uk" , "p.zabel@pengutronix.de" , "lgirdwood@gmail.com" , "broonie@kernel.org" , "robh+dt@kernel.org" , "richard.leitner@skidata.com" , "netdev@vger.kernel.org" , "devicetree@vger.kernel.org" , "f.fainelli@gmail.com" CC: "Quette, Arnaud" Subject: [PATCH net 1/4] net:phy:smsc: enable PHY_RST_AFTER_CLK_EN if ref clock is not set Thread-Topic: [PATCH net 1/4] net:phy:smsc: enable PHY_RST_AFTER_CLK_EN if ref clock is not set Thread-Index: AdasuKId7Rcgsqy5TdKHTeqpGTl6ug== Date: Tue, 27 Oct 2020 23:26:55 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: davemloft.net; dkim=none (message not signed) header.d=none; davemloft.net; dmarc=none action=none header.from=eaton.com; x-originating-ip: [89.217.230.232] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 61fe2121-f03b-47e8-3ea5-08d87acfcac6 x-ms-traffictypediagnostic: CY4PR17MB1942: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7691; 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This ensures compatibility for systems that rely on the PHY reset workaround, but fail to update their DT with the 'clocks' property for SMSC PHY. Signed-off-by: Laurent Badel Fixes: d65af21842f8 ("net: phy: smsc: LAN8710/20: remove PHY_RST_AFTER_CLK_EN flag") --- drivers/net/phy/smsc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c index ec97669be5c2..321ed2a89045 100644 --- a/drivers/net/phy/smsc.c +++ b/drivers/net/phy/smsc.c @@ -294,6 +294,9 @@ static int smsc_phy_probe(struct phy_device *phydev) if (ret) return ret; + if (priv->refclk) + phydev->drv->flags &= ~PHY_RST_AFTER_CLK_EN; + return 0; } @@ -397,7 +400,7 @@ static struct phy_driver smsc_phy_driver[] = { .name = "SMSC LAN8710/LAN8720", /* PHY_BASIC_FEATURES */ - + .flags = PHY_RST_AFTER_CLK_EN, .probe = smsc_phy_probe, .remove = smsc_phy_remove, From patchwork Tue Oct 27 23:29:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Badel, Laurent" X-Patchwork-Id: 298512 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 768D3C5517A for ; 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Tue, 27 Oct 2020 23:29:42 +0000 Received: from CY4PR1701MB1878.namprd17.prod.outlook.com ([fe80::a5a5:a48b:7577:6b45]) by CY4PR1701MB1878.namprd17.prod.outlook.com ([fe80::a5a5:a48b:7577:6b45%6]) with mapi id 15.20.3477.028; Tue, 27 Oct 2020 23:29:42 +0000 From: "Badel, Laurent" To: "davem@davemloft.net" , "m.felsch@pengutronix.de" , "fugang.duan@nxp.com" , "kuba@kernel.org" , "andrew@lunn.ch" , Heiner Kallweit , "linux@armlinux.org.uk" , "p.zabel@pengutronix.de" , "lgirdwood@gmail.com" , "broonie@kernel.org" , "robh+dt@kernel.org" , "richard.leitner@skidata.com" , "netdev@vger.kernel.org" , "devicetree@vger.kernel.org" , "f.fainelli@gmail.com" CC: "Quette, Arnaud" Subject: [PATCH 4/4] net:phy: fix phy_reset_after_clk_enable() Thread-Topic: [PATCH 4/4] net:phy: fix phy_reset_after_clk_enable() Thread-Index: AdasuQkOukfiBTpdRwSD+B+Lawlh0Q== Date: Tue, 27 Oct 2020 23:29:42 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: davemloft.net; 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Therefore, fully re-configure the PHY after a reset. Also, avoid resetting the PHY if the reset is already asserted, as this would deassert the reset which might be unexpected for the entity that previously asserted it. Signed-off-by: Laurent Badel --- drivers/net/phy/phy_device.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) -- 2.17.1 ----------------------------- Eaton Industries Manufacturing GmbH ~ Registered place of business: Route de la Longeraie 7, 1110, Morges, Switzerland ----------------------------- diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index 5dab6be6fc38..85678b1600c0 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c @@ -1801,7 +1801,7 @@ int phy_loopback(struct phy_device *phydev, bool enable) EXPORT_SYMBOL(phy_loopback); /** - * phy_reset_after_clk_enable - perform a PHY reset if needed + * phy_reset_after_clk_enable - perform a PHY reset if needed and reconfigure * @phydev: target phy_device struct * * Description: Some PHYs are known to need a reset after their refclk was @@ -1811,15 +1811,29 @@ EXPORT_SYMBOL(phy_loopback); */ int phy_reset_after_clk_enable(struct phy_device *phydev) { + int ret; + if (!phydev || !phydev->drv) return -ENODEV; - if (phydev->drv->flags & PHY_RST_AFTER_CLK_EN) { + if ((phydev->drv->flags & PHY_RST_AFTER_CLK_EN) && + !phy_device_reset_status(phydev)) { + phy_device_reset(phydev, 1); - phy_device_reset(phydev, 0); + /* phy_init_hw will bring the phy out of reset + * and run its config_init method. + */ + ret = phy_init_hw(phydev); + if (ret < 0) + return ret; + + /* re-configure interrupts if needed */ + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { + phy_free_interrupt(phydev); + phy_request_interrupt(phydev); + } return 1; } - return 0; } EXPORT_SYMBOL(phy_reset_after_clk_enable);