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Wed, 29 Nov 2017 11:13:27 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20171129111327eucas1p2ddc03a0352a7bf2b3e1b9d4f9db99511~7iiipw4ts1397613976eucas1p2s; Wed, 29 Nov 2017 11:13:27 +0000 (GMT) X-AuditID: cbfec7f2-f793b6d000003243-41-5a1e96577376 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 4C.CF.20118.7569E1A5; Wed, 29 Nov 2017 11:13:27 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0P06008XYF69VBB0@eusync1.samsung.com>; Wed, 29 Nov 2017 11:13:27 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH] ARM64: dts: exynos: Add support for S3FWRN5 NFC chip to TM2(e) boards Date: Wed, 29 Nov 2017 12:13:20 +0100 Message-id: <20171129111320.14592-1-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.15.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprKIsWRmVeSWpSXmKPExsWy7djPc7rh0+SiDD6uVLHYOGM9q8X58xvY LWac38dksfbIXXYHFo9NqzrZPPq2rGL0+LxJLoA5issmJTUnsyy1SN8ugStj4upzLAXPOSo2 Pf3C0sC4jb2LkZNDQsBE4vu+O6wQtpjEhXvr2boYuTiEBJYySjy585QJwvnMKHF37TJmmI5p Jw5AVS1jlFi5bA4zhNPAJHFn+1YWkCo2AUOJrrddbCC2iICqxOe2BewgRcwCfYwS1/fOBerg 4BAWiJD4e54VxGQBqnl9wRSknFfAVmLatw1Qy+QlFn/fCbZMQuAqq8TqU6cZIRIuEl1PZjNB 2MISr45vgfpHRuLy5G4WCLufUaKpVRvCnsEoce4tL4RtLXH4+EWwn5kF+CQmbZsOdo6EAK9E R5sQRImHxLT1L6HCjhK3GspATCGBWInlKzkmMEotYGRYxSiSWlqcm55abKxXnJhbXJqXrpec n7uJERhZp/8d/7SD8esJq0OMAhyMSjy8F1bIRgmxJpYVV+YeYpTgYFYS4d3gJRclxJuSWFmV WpQfX1Sak1p8iFGag0VJnNc2qi1SSCA9sSQ1OzW1ILUIJsvEwSnVwLhpWcal/8GcJcsvm5c3 s9z59Mvq2YdA7WtrT5ROmvmzeXZk4Zw45yitQ5tmxxQ37r379f2T35/5amqkjVYvmD1/0uGO IN4ESeuIj6a+H/4YHvQX8Njld+hE8qb9p55/sT28s+BGSGqX2Gu/DX1Jzz6wWRhwiRRJ3Tx5 zu/0rTV3Tj1UnDOdrTBAiaU4I9FQi7moOBEArL6xL6gCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrEJMWRmVeSWpSXmKPExsVy+t/xy7rh0+SiDM5/47DYOGM9q8X58xvY LWac38dksfbIXXYHFo9NqzrZPPq2rGL0+LxJLoA5issmJTUnsyy1SN8ugStj4upzLAXPOSo2 Pf3C0sC4jb2LkZNDQsBEYtqJA2wQtpjEhXvrgWwuDiGBJYwSmz/+Y4Fwmpgkmo59AOtgEzCU 6HrbBdYhIqAq8bltATtIEbPABEaJ1QtnsYIkhAUiJBYf3cLcxcjBwQJU9PqCKUiYV8BWYtq3 DcwQ2+QlFn/fyTaBkXsBI8MqRpHU0uLc9NxiI73ixNzi0rx0veT83E2MQJ9vO/Zzyw7GrnfB hxgFOBiVeHgvrJCNEmJNLCuuzD3EKMHBrCTCu8FLLkqINyWxsiq1KD++qDQntfgQozQHi5I4 b++e1ZFCAumJJanZqakFqUUwWSYOTqkGRpf8N3HKxydds0/3jUqLvrdCSe98xhnhTIYWX61t 6d4TP0r8YdvBspV1xtHFcpySl/4dPfn2koSXZOxvmevVKnWPeLaxh868N33K7kOzwtWmrdy8 beMLfeGddfPYD6SueMKyssXoh9H3Z08lp/Rz9alu6e33XvziXbKzy/NS/8Df06Y/+9HltEeJ pTgj0VCLuag4EQAFlO3S9QEAAA== X-CMS-MailID: 20171129111327eucas1p2ddc03a0352a7bf2b3e1b9d4f9db99511 X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20171129111327eucas1p2ddc03a0352a7bf2b3e1b9d4f9db99511 X-RootMTR: 20171129111327eucas1p2ddc03a0352a7bf2b3e1b9d4f9db99511 References: Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add device tree node with S3FWRN5 NFC chip to TM2(e) boards. The chip is connected through HS-I2C bus #4. Signed-off-by: Robert Baldyga [mszyprow: rebased onto v4.15-rc1, moved node to exynos5433-tm2-common.dtsi, rephrased commit message] Signed-off-by: Marek Szyprowski --- arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.15.0 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Chanwoo Choi Tested-by: Chanwoo Choi diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi index 297597442c44..5028d7352856 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi @@ -741,6 +741,19 @@ }; }; +&hsi2c_4 { + status = "okay"; + + s3fwrn5: nfc@27 { + compatible = "samsung,s3fwrn5-i2c"; + reg = <0x27>; + interrupt-parent = <&gpa1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + s3fwrn5,en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>; + s3fwrn5,fw-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; + }; +}; + &hsi2c_5 { status = "okay";