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Make it simple, if icount is enabled then we disabled MTTCG by default. If the user tries to force MTTCG upon us then we tell them "no". Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- cpus.c | 7 +++---- vl.c | 7 ++----- 2 files changed, 5 insertions(+), 9 deletions(-) -- 2.11.0 diff --git a/cpus.c b/cpus.c index 8200ac6b75..e9aab9f70f 100644 --- a/cpus.c +++ b/cpus.c @@ -185,10 +185,7 @@ static bool check_tcg_memory_orders_compatible(void) static bool default_mttcg_enabled(void) { - QemuOpts *icount_opts = qemu_find_opts_singleton("icount"); - const char *rr = qemu_opt_get(icount_opts, "rr"); - - if (rr || TCG_OVERSIZED_GUEST) { + if (use_icount || TCG_OVERSIZED_GUEST) { return false; } else { #ifdef TARGET_SUPPORTS_MTTCG @@ -206,6 +203,8 @@ void qemu_tcg_configure(QemuOpts *opts, Error **errp) if (strcmp(t, "multi") == 0) { if (TCG_OVERSIZED_GUEST) { error_setg(errp, "No MTTCG when guest word size > hosts"); + } else if (use_icount) { + error_setg(errp, "No MTTCG when icount is enabled"); } else { if (!check_tcg_memory_orders_compatible()) { error_report("Guest expects a stronger memory ordering " diff --git a/vl.c b/vl.c index e10a27bdd6..bbbf1baadf 100644 --- a/vl.c +++ b/vl.c @@ -4025,8 +4025,6 @@ int main(int argc, char **argv, char **envp) replay_configure(icount_opts); - qemu_tcg_configure(accel_opts, &error_fatal); - machine_class = select_machine(); set_memory_options(&ram_slots, &maxram_size, machine_class); @@ -4393,14 +4391,13 @@ int main(int argc, char **argv, char **envp) if (!tcg_enabled()) { error_report("-icount is not allowed with hardware virtualization"); exit(1); - } else if (qemu_tcg_mttcg_enabled()) { - error_report("-icount does not currently work with MTTCG"); - exit(1); } configure_icount(icount_opts, &error_abort); qemu_opts_del(icount_opts); } + qemu_tcg_configure(accel_opts, &error_fatal); + if (default_net) { QemuOptsList *net = qemu_find_opts("net"); qemu_opts_set(net, NULL, "type", "nic", &error_abort); From patchwork Thu Mar 2 19:53:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 94804 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp323117qgd; Thu, 2 Mar 2017 11:55:20 -0800 (PST) X-Received: by 10.55.45.65 with SMTP id t62mr18641200qkh.31.1488484520545; Thu, 02 Mar 2017 11:55:20 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:400c:c0c::22c Subject: [Qemu-devel] [PATCH v2 02/11] target/i386/cpu.h: declare TCG_GUEST_DEFAULT_MO X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, Eduardo Habkost , nikunj@linux.vnet.ibm.com, a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This suppresses the incorrect warning when forcing MTTCG for x86 guests on x86 hosts. A future patch will still warn when TARGET_SUPPORT_MTTCG hasn't been defined for the guest (which is still pending for x86). Reported-by: Paolo Bonzini Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- target/i386/cpu.h | 3 +++ 1 file changed, 3 insertions(+) -- 2.11.0 Reviewed-by: Eduardo Habkost Acked-by: Eduardo Habkost diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 12a39d590f..ecdd3bbc2a 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -30,6 +30,9 @@ #define TARGET_LONG_BITS 32 #endif +/* The x86 has a strong memory model with some store-after-load re-ordering */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) + /* Maximum instruction code size */ #define TARGET_MAX_INSN_SIZE 16 From patchwork Thu Mar 2 19:53:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 94805 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp323520qgd; Thu, 2 Mar 2017 11:56:35 -0800 (PST) X-Received: by 10.233.235.132 with SMTP id b126mr18206067qkg.262.1488484595465; Thu, 02 Mar 2017 11:56:35 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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So in cases where TARGET_SUPPORT_MTTCG has yet to be defined we should say so specifically. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- cpus.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.11.0 diff --git a/cpus.c b/cpus.c index e9aab9f70f..2459f564ea 100644 --- a/cpus.c +++ b/cpus.c @@ -206,6 +206,10 @@ void qemu_tcg_configure(QemuOpts *opts, Error **errp) } else if (use_icount) { error_setg(errp, "No MTTCG when icount is enabled"); } else { +#ifndef TARGET_SUPPORT_MTTCG + error_report("Guest not yet converted to MTTCG - " + "you may get unexpected results"); +#endif if (!check_tcg_memory_orders_compatible()) { error_report("Guest expects a stronger memory ordering " "than the host provides"); From patchwork Thu Mar 2 19:53:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 94809 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp324281qgd; Thu, 2 Mar 2017 11:58:55 -0800 (PST) X-Received: by 10.55.150.198 with SMTP id y189mr325488qkd.305.1488484735687; Thu, 02 Mar 2017 11:58:55 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id b38si7723437qte.119.2017.03.02.11.58.55 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 02 Mar 2017 11:58:55 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54288 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjWsH-0003Jv-Dx for patch@linaro.org; Thu, 02 Mar 2017 14:58:53 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59630) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjWnH-0007xW-7Z for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cjWnG-0002TI-C0 for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:43 -0500 Received: from mail-wr0-x234.google.com ([2a00:1450:400c:c0c::234]:34511) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cjWnG-0002T6-5f for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:42 -0500 Received: by mail-wr0-x234.google.com with SMTP id l37so60262185wrc.1 for ; Thu, 02 Mar 2017 11:53:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DDm08/obXFO5/zyPEDyy5yaU4fu9phkTVhZl5s7VrQo=; b=ZUBgqa+wN2Ylo+cpvaj00T8VEaiv3qbYSsu8J0VbDw0GtxkzYyE56zol9yDDqtF8N6 zTbNlsfBXxAWR7dE518gWcYSiZcg2pcKX2hEPDpnWpAYKQJTXJIwbDCW7pr6H/wau73r h1HZPtYXcCri2m//FDTQeyAHR05jkNRlyN0GU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DDm08/obXFO5/zyPEDyy5yaU4fu9phkTVhZl5s7VrQo=; b=pfTmSqujpaFTD8B12nR1yEq7i14pZK8omTjgkqdSk6j0+dU4iQlcxU3HGObSKH1KgO Dr/qKygzZOWgqi7HV3FsNMxXIiAXs8P0VjN0yMVmKbbp/rx2H1CxzedWQxmIrlGqtfJO I9AmOc5oLUtj3Yf8LjJZPPDRQglezfkxZ/bJ+knO41dUkUQ1aj3i1ceM2rSoACML5/hl Md9XxSqtIh5c92CDXz47b9Lexc64U3S5KzQ+jLiRpWjP5RGL9oQJWlxdp7GXI8Keu0mG w8PQFoECMarTw59tmbXWH/u8HZmEvJ+UW4fFR8hypa4JBfzrW1Almkr6661zcE7wlohY CkkQ== X-Gm-Message-State: AMke39mGC9udIFl3MU6RfgODtS57xr1h8UIErer9+QWHH4fdAb1GEsAh7XvpxGmY+m+/Wdme X-Received: by 10.223.173.199 with SMTP id w65mr13961566wrc.125.1488484420946; Thu, 02 Mar 2017 11:53:40 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id 136sm2800020wmg.12.2017.03.02.11.53.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Mar 2017 11:53:37 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 5DE2E3E04B2; Thu, 2 Mar 2017 19:53:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org, rth@twiddle.net, pbonzini@redhat.com Date: Thu, 2 Mar 2017 19:53:30 +0000 Message-Id: <20170302195337.31558-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170302195337.31558-1-alex.bennee@linaro.org> References: <20170302195337.31558-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::234 Subject: [Qemu-devel] [PATCH v2 04/11] translate: downgrade IRQ BQL asserts to tcg_debug_assert X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, nikunj@linux.vnet.ibm.com, Peter Crosthwaite , a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" While on MTTCG hosts it is very important that updates to cpu->interrupt_request are protected by the BQL not all guests have been converted to the correct locking yet. As a result we are seeing breaking on non-MTTCG enabled guests in production builds. The locking in the guests needs to be fixed but while running single threaded they will continue to work. By moving the asserts to tcg_debug_asserts() they will still be useful during conversion work (much like the existing assert_memory_lock/assert_tb_lock asserts). Signed-off-by: Alex Bennée --- translate-all.c | 2 +- translate-common.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) -- 2.11.0 diff --git a/translate-all.c b/translate-all.c index 9bac061c9b..7ee273410d 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1928,7 +1928,7 @@ void dump_opcount_info(FILE *f, fprintf_function cpu_fprintf) void cpu_interrupt(CPUState *cpu, int mask) { - g_assert(qemu_mutex_iothread_locked()); + tcg_debug_assert(qemu_mutex_iothread_locked()); cpu->interrupt_request |= mask; cpu->tcg_exit_req = 1; } diff --git a/translate-common.c b/translate-common.c index d504dd0d33..24e05c077a 100644 --- a/translate-common.c +++ b/translate-common.c @@ -22,6 +22,7 @@ #include "qom/cpu.h" #include "sysemu/cpus.h" #include "qemu/main-loop.h" +#include "tcg.h" uintptr_t qemu_real_host_page_size; intptr_t qemu_real_host_page_mask; @@ -31,7 +32,7 @@ intptr_t qemu_real_host_page_mask; static void tcg_handle_interrupt(CPUState *cpu, int mask) { int old_mask; - g_assert(qemu_mutex_iothread_locked()); + tcg_debug_assert(qemu_mutex_iothread_locked()); old_mask = cpu->interrupt_request; cpu->interrupt_request |= mask; From patchwork Thu Mar 2 19:53:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 94803 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp322966qgd; Thu, 2 Mar 2017 11:54:50 -0800 (PST) X-Received: by 10.237.53.9 with SMTP id a9mr18505433qte.188.1488484490698; Thu, 02 Mar 2017 11:54:50 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id h49si7710007qtc.167.2017.03.02.11.54.50 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 02 Mar 2017 11:54:50 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54262 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjWoK-00085Q-Ds for patch@linaro.org; Thu, 02 Mar 2017 14:54:48 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59652) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjWnH-0007xw-Va for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cjWnH-0002Tn-7N for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:44 -0500 Received: from mail-wm0-x22e.google.com ([2a00:1450:400c:c09::22e]:33656) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cjWnH-0002TM-1M for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:43 -0500 Received: by mail-wm0-x22e.google.com with SMTP id i17so4774107wmf.0 for ; Thu, 02 Mar 2017 11:53:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hvfEOJGYSnY5OpoSB8FY0H2tXO8IKjK4RW9UAyxCVuI=; b=DZqFy2O1XUjOlQH7L7iBfW83GcGZj71wrNVaSMIu5M4cp5jzjb1PLujS+X15ZR3ufV Sgxhh6dY+c+LMJGXbK+fGUJyJ9B8B+I1mga3TpsEa3i5P8RfANuTCg9nKXL/GwHN+kD9 juQmzg/KdQ5QpJsaRfR5kKWPQMXuoNwYAcVb0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hvfEOJGYSnY5OpoSB8FY0H2tXO8IKjK4RW9UAyxCVuI=; b=Mk0f7pwmpaIAMw1te+nhAqsv3Z/3di5zYgBQgsm2ooca1RIL8LJDYdXFNbA3zr9EXL pf6pjhHjKhdKn/81LhyFzV3jsPcFJX6gGAJRXwfJKE8RWCuJQ3Y3Ll5Z8czZOp6quQka 5oQ8QJoZUau7x4/aHcTSUFXw7lXd0YNM+AT9MFao/MkW1q18i7tGp7/KXKxa8c9scelz lBqZds2sFHBn8u26FX96HHdrlzgD4O3N2QzKorzDlOqsiyFa4HmlLCWoxwGlQC59y1Tg sicsOq0p3/gzdo6Eu1kH7xZvJ+g2+viQ2e3aIwhpgkH/VLTwxBmvBLJUhXNbK6ACxShH BtaQ== X-Gm-Message-State: AMke39ktSfYyK+03x3uJwSG6SClWH7RPg7SoGhI3iq9nE3Hg8+wLD6tG+OHI+M+ZgYdCiVHh X-Received: by 10.28.211.200 with SMTP id k191mr9208630wmg.137.1488484421787; Thu, 02 Mar 2017 11:53:41 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id 136sm12484085wms.32.2017.03.02.11.53.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Mar 2017 11:53:38 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 6F0283E05DA; Thu, 2 Mar 2017 19:53:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org, rth@twiddle.net, pbonzini@redhat.com Date: Thu, 2 Mar 2017 19:53:31 +0000 Message-Id: <20170302195337.31558-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170302195337.31558-1-alex.bennee@linaro.org> References: <20170302195337.31558-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::22e Subject: [Qemu-devel] [PATCH v2 05/11] translate-all: exit cpu_restore_state early if translating X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, nikunj@linux.vnet.ibm.com, Peter Crosthwaite , a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The translation code uses cpu_ld*_code which can trigger a tlb_fill which if it fails will attempt a fault resolution. This never works during translation as the TB being generated hasn't been added yet. However with the new locking regime we end up double locking the tb_lock(). As the tcg_ctx.cpu is only set during translation we use this to short circuit the restore code and return with a fail. Most front-ends seem to ignore the pass/fail result anyway but tolerate not having the cpu environment updated. This is arguably ugly but will do for now. Signed-off-by: Alex Bennée --- translate-all.c | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.11.0 diff --git a/translate-all.c b/translate-all.c index 7ee273410d..956d54b882 100644 --- a/translate-all.c +++ b/translate-all.c @@ -333,6 +333,13 @@ bool cpu_restore_state(CPUState *cpu, uintptr_t retaddr) TranslationBlock *tb; bool r = false; + /* Don't attempt to restore state if we are translating already */ + if (tcg_ctx.cpu == cpu) { + qemu_log_mask(LOG_UNIMP, "Attempt to resolve CPU state @ 0x%" PRIxPTR + " while translating\n", retaddr); + return r; + } + tb_lock(); tb = tb_find_pc(retaddr); if (tb) { From patchwork Thu Mar 2 19:53:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 94808 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp324089qgd; Thu, 2 Mar 2017 11:58:22 -0800 (PST) X-Received: by 10.200.46.123 with SMTP id s56mr20784091qta.8.1488484702608; Thu, 02 Mar 2017 11:58:22 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id 7si1860762qtx.261.2017.03.02.11.58.22 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 02 Mar 2017 11:58:22 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54285 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjWrk-0002tA-5a for patch@linaro.org; Thu, 02 Mar 2017 14:58:20 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59677) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjWnJ-0007zC-Ne for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cjWnI-0002V2-EC for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:45 -0500 Received: from mail-wm0-x229.google.com ([2a00:1450:400c:c09::229]:38724) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cjWnI-0002U0-90 for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:44 -0500 Received: by mail-wm0-x229.google.com with SMTP id t193so101595wmt.1 for ; Thu, 02 Mar 2017 11:53:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zed5cDojziza6smNZPOlbNc5pdgytzhPnd3NkICYVXg=; b=X8E0u/3LYO10pnhcI9zn3DY6kYlB9IC/UKS/dr7AhrvA8rLFqssTTrtOM2rslxSzT8 bqh1Klcl7kqnHxN/qkIhkgc12Bz5tu27tsxtQpLZ6d64laDo5OqQbsrHGKLjuqBt/c3n w1L+61WlUtbCj6gLaSo9VDKULaB3S/Oph8XPE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zed5cDojziza6smNZPOlbNc5pdgytzhPnd3NkICYVXg=; b=b7ROWYTw6vPT9tJs6i7GKQXJ+Ye1j0X/LYTbFka3Qn5ioUhcsXOUkeGH++yr1n39Fl Prkgt3JiblSNUQe9A2HcYxKs/sEJXpJOkMrKFznY8hCriT4SA0ehpyH5IxR+N/ZRaFhA cS7gxnqcISU+EjluxNS9dHGXt52PhzNi5qa3JZcJCQIc9JT5oehRUDACby0HNb1sOX7W 3+XsXrt4AgFZpgwne8GSgH2PJG9jrDarsyGJ2MHFS55sIhpXwE7+SPrcHPDe2LH8hjP3 QH56x71kiM1gSdxuIPwLQCNLNo2kaQ1uoxiWwW7CgvDxciNNxd3Ojky83g/vVTYLERC+ 0HKw== X-Gm-Message-State: AMke39lYDUGaUnVz7gbq56BEJ5kr1OkOS98nHfvxka9+mjFgYJnULd48NKLpAxEWcIj7TTs/ X-Received: by 10.28.100.193 with SMTP id y184mr28765wmb.2.1488484423077; Thu, 02 Mar 2017 11:53:43 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id x1sm12049681wrd.63.2017.03.02.11.53.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Mar 2017 11:53:38 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 8451E3E085C; Thu, 2 Mar 2017 19:53:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org, rth@twiddle.net, pbonzini@redhat.com Date: Thu, 2 Mar 2017 19:53:32 +0000 Message-Id: <20170302195337.31558-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170302195337.31558-1-alex.bennee@linaro.org> References: <20170302195337.31558-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::229 Subject: [Qemu-devel] [PATCH v2 06/11] sparc/sparc64: grab BQL before calling cpu_check_irqs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, nikunj@linux.vnet.ibm.com, Mark Cave-Ayland , a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , Artyom Tarasenko , fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" IRQ modification is part of device emulation and should be done while the BQL is held to prevent races when MTTCG is enabled. This adds assertions in the hw emulation layer and wraps the calls from helpers in the BQL. Reported-by: Mark Cave-Ayland Signed-off-by: Alex Bennée --- hw/sparc/sun4m.c | 3 +++ hw/sparc64/sparc64.c | 3 +++ target/sparc/int64_helper.c | 3 +++ target/sparc/win_helper.c | 11 +++++++++++ 4 files changed, 20 insertions(+) -- 2.11.0 diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 61416a6426..873cd7df9a 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -142,6 +142,9 @@ void cpu_check_irqs(CPUSPARCState *env) { CPUState *cs; + /* We should be holding the BQL before we mess with IRQs */ + g_assert(qemu_mutex_iothread_locked()); + if (env->pil_in && (env->interrupt_index == 0 || (env->interrupt_index & ~15) == TT_EXTINT)) { unsigned int i; diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c index b3d219c769..4e4fdab065 100644 --- a/hw/sparc64/sparc64.c +++ b/hw/sparc64/sparc64.c @@ -55,6 +55,9 @@ void cpu_check_irqs(CPUSPARCState *env) uint32_t pil = env->pil_in | (env->softint & ~(SOFTINT_TIMER | SOFTINT_STIMER)); + /* We should be holding the BQL before we mess with IRQs */ + g_assert(qemu_mutex_iothread_locked()); + /* TT_IVEC has a higher priority (16) than TT_EXTINT (31..17) */ if (env->ivec_status & 0x20) { return; diff --git a/target/sparc/int64_helper.c b/target/sparc/int64_helper.c index 605747c93c..f942973c22 100644 --- a/target/sparc/int64_helper.c +++ b/target/sparc/int64_helper.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "qemu/main-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "exec/log.h" @@ -208,7 +209,9 @@ static bool do_modify_softint(CPUSPARCState *env, uint32_t value) env->softint = value; #if !defined(CONFIG_USER_ONLY) if (cpu_interrupts_enabled(env)) { + qemu_mutex_lock_iothread(); cpu_check_irqs(env); + qemu_mutex_unlock_iothread(); } #endif return true; diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c index 71b3dd37e8..b387b026d8 100644 --- a/target/sparc/win_helper.c +++ b/target/sparc/win_helper.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "qemu/main-loop.h" #include "cpu.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" @@ -86,7 +87,9 @@ void cpu_put_psr(CPUSPARCState *env, target_ulong val) { cpu_put_psr_raw(env, val); #if ((!defined(TARGET_SPARC64)) && !defined(CONFIG_USER_ONLY)) + qemu_mutex_lock_iothread(); cpu_check_irqs(env); + qemu_mutex_unlock_iothread(); #endif } @@ -368,7 +371,9 @@ void helper_wrpstate(CPUSPARCState *env, target_ulong new_state) #if !defined(CONFIG_USER_ONLY) if (cpu_interrupts_enabled(env)) { + qemu_mutex_lock_iothread(); cpu_check_irqs(env); + qemu_mutex_unlock_iothread(); } #endif } @@ -381,7 +386,9 @@ void helper_wrpil(CPUSPARCState *env, target_ulong new_pil) env->psrpil = new_pil; if (cpu_interrupts_enabled(env)) { + qemu_mutex_lock_iothread(); cpu_check_irqs(env); + qemu_mutex_unlock_iothread(); } #endif } @@ -408,7 +415,9 @@ void helper_done(CPUSPARCState *env) #if !defined(CONFIG_USER_ONLY) if (cpu_interrupts_enabled(env)) { + qemu_mutex_lock_iothread(); cpu_check_irqs(env); + qemu_mutex_unlock_iothread(); } #endif } @@ -435,7 +444,9 @@ void helper_retry(CPUSPARCState *env) #if !defined(CONFIG_USER_ONLY) if (cpu_interrupts_enabled(env)) { + qemu_mutex_lock_iothread(); cpu_check_irqs(env); + qemu_mutex_unlock_iothread(); } #endif } From patchwork Thu Mar 2 19:53:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 94811 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp324953qgd; Thu, 2 Mar 2017 12:00:49 -0800 (PST) X-Received: by 10.55.135.1 with SMTP id j1mr18875952qkd.107.1488484849022; Thu, 02 Mar 2017 12:00:49 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id y2si7714400qta.108.2017.03.02.12.00.48 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 02 Mar 2017 12:00:49 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54296 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjWu6-0004lx-Dt for patch@linaro.org; Thu, 02 Mar 2017 15:00:46 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59684) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjWnK-000813-DN for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cjWnJ-0002Vf-ET for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:46 -0500 Received: from mail-wm0-x22b.google.com ([2a00:1450:400c:c09::22b]:37552) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cjWnJ-0002V8-8A for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:45 -0500 Received: by mail-wm0-x22b.google.com with SMTP id n11so133207wma.0 for ; Thu, 02 Mar 2017 11:53:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0/mBL8YEDIrXOvgwP6BHyMKtW3bqPjUnWf8pMW7K7m4=; b=Nk4xmTwqm+1x0sSL936fCCvil4qXnAO/weaY9CoPs104ePqe1SzevA/YflhSkmeiHb KGUo0U48tw2r0x1dy1mgWdhb1qIaiGobs5S5tyXbWej0szUHzkL6Li7h9IJv6hSuh3BD 8cQ3yUpNsELYG8qgKA0ReIcq8pnh1vLealBNg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0/mBL8YEDIrXOvgwP6BHyMKtW3bqPjUnWf8pMW7K7m4=; b=oc4T29e7MM+yirctBsoHWb00hm46g9PNGCcCXu+KB6CKVcKn+aOF/L6BwcLDNl6xh3 9vs7Ht8//SsvFeQREq9675EEnAQWrLQRjz/utwdq8+NQwC5x4Ts3Bim3QVXinNIU709S 491uZ4OF7hfNhCjBLFNu0Qa1BaU5cPjSQOFVfSmMobjliCFYigxuT7GkG7R0K+l9yXm3 MUb7bqkUzo7Bm1CpS8yQEUuAzgOOKBeVaUfedl4gWsQkKSu5jjxDuVwCsxW3y2rasusu jQ2ApJcrC2WWQUxOFQ+Tx0wVVdtT7Gp+jMznVDesGHkPP69YRjU0e3reacSbYNWhx6l7 EHaA== X-Gm-Message-State: AMke39lu4q6FBwDvkaPaMXfM1gGlUJrHHMONpI9pmUtpffS+5Q119WjLTW076eoUHlCJR07C X-Received: by 10.28.56.134 with SMTP id f128mr5646wma.29.1488484424002; Thu, 02 Mar 2017 11:53:44 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id b17sm12467929wma.33.2017.03.02.11.53.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Mar 2017 11:53:40 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 94C4D3E08E6; Thu, 2 Mar 2017 19:53:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org, rth@twiddle.net, pbonzini@redhat.com Date: Thu, 2 Mar 2017 19:53:33 +0000 Message-Id: <20170302195337.31558-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170302195337.31558-1-alex.bennee@linaro.org> References: <20170302195337.31558-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::22b Subject: [Qemu-devel] [PATCH v2 07/11] s390x/misc_helper.c: wrap IO instructions in BQL X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, Alexander Graf , nikunj@linux.vnet.ibm.com, a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Helpers that can trigger IO events (including interrupts) need to be protected by the BQL. I've updated all the helpers that call into an ioinst_handle_* functions. Reported-by: Thomas Huth Signed-off-by: Alex Bennée --- target/s390x/misc_helper.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) -- 2.11.0 diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 3cb942e8bb..93b0e61366 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -19,6 +19,7 @@ */ #include "qemu/osdep.h" +#include "qemu/main-loop.h" #include "cpu.h" #include "exec/memory.h" #include "qemu/host-utils.h" @@ -551,61 +552,81 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1, void HELPER(xsch)(CPUS390XState *env, uint64_t r1) { S390CPU *cpu = s390_env_get_cpu(env); + qemu_mutex_lock_iothread(); ioinst_handle_xsch(cpu, r1); + qemu_mutex_unlock_iothread(); } void HELPER(csch)(CPUS390XState *env, uint64_t r1) { S390CPU *cpu = s390_env_get_cpu(env); + qemu_mutex_lock_iothread(); ioinst_handle_csch(cpu, r1); + qemu_mutex_unlock_iothread(); } void HELPER(hsch)(CPUS390XState *env, uint64_t r1) { S390CPU *cpu = s390_env_get_cpu(env); + qemu_mutex_lock_iothread(); ioinst_handle_hsch(cpu, r1); + qemu_mutex_unlock_iothread(); } void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst) { S390CPU *cpu = s390_env_get_cpu(env); + qemu_mutex_lock_iothread(); ioinst_handle_msch(cpu, r1, inst >> 16); + qemu_mutex_unlock_iothread(); } void HELPER(rchp)(CPUS390XState *env, uint64_t r1) { S390CPU *cpu = s390_env_get_cpu(env); + qemu_mutex_lock_iothread(); ioinst_handle_rchp(cpu, r1); + qemu_mutex_unlock_iothread(); } void HELPER(rsch)(CPUS390XState *env, uint64_t r1) { S390CPU *cpu = s390_env_get_cpu(env); + qemu_mutex_lock_iothread(); ioinst_handle_rsch(cpu, r1); + qemu_mutex_unlock_iothread(); } void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst) { S390CPU *cpu = s390_env_get_cpu(env); + qemu_mutex_lock_iothread(); ioinst_handle_ssch(cpu, r1, inst >> 16); + qemu_mutex_unlock_iothread(); } void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst) { S390CPU *cpu = s390_env_get_cpu(env); + qemu_mutex_lock_iothread(); ioinst_handle_stsch(cpu, r1, inst >> 16); + qemu_mutex_unlock_iothread(); } void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst) { S390CPU *cpu = s390_env_get_cpu(env); + qemu_mutex_lock_iothread(); ioinst_handle_tsch(cpu, r1, inst >> 16); + qemu_mutex_unlock_iothread(); } void HELPER(chsc)(CPUS390XState *env, uint64_t inst) { S390CPU *cpu = s390_env_get_cpu(env); + qemu_mutex_lock_iothread(); ioinst_handle_chsc(cpu, inst >> 16); + qemu_mutex_unlock_iothread(); } #endif From patchwork Thu Mar 2 19:53:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 94806 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp323535qgd; Thu, 2 Mar 2017 11:56:38 -0800 (PST) X-Received: by 10.237.43.68 with SMTP id p62mr19113425qtd.207.1488484598571; Thu, 02 Mar 2017 11:56:38 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:400c:c0c::231 Subject: [Qemu-devel] [PATCH v2 08/11] target/xtensa: hold BQL for interrupt processing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, nikunj@linux.vnet.ibm.com, a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, Max Filippov , cota@braap.org, bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Make sure we have the BQL held when processing interrupts. Reported-by: Thomas Huth Signed-off-by: Alex Bennée --- target/xtensa/helper.c | 1 + target/xtensa/op_helper.c | 7 +++++++ 2 files changed, 8 insertions(+) -- 2.11.0 Acked-by: Max Filippov diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index c67d715c4b..bcd0b7738d 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -217,6 +217,7 @@ static void handle_interrupt(CPUXtensaState *env) } } +/* Called from cpu_handle_interrupt with BQL held */ void xtensa_cpu_do_interrupt(CPUState *cs) { XtensaCPU *cpu = XTENSA_CPU(cs); diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index af2723445d..519fbeddd6 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -26,6 +26,7 @@ */ #include "qemu/osdep.h" +#include "qemu/main-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" @@ -381,7 +382,11 @@ void HELPER(waiti)(CPUXtensaState *env, uint32_t pc, uint32_t intlevel) env->pc = pc; env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) | (intlevel << PS_INTLEVEL_SHIFT); + + qemu_mutex_lock_iothread(); check_interrupts(env); + qemu_mutex_unlock_iothread(); + if (env->pending_irq_level) { cpu_loop_exit(CPU(xtensa_env_get_cpu(env))); return; @@ -426,7 +431,9 @@ void HELPER(update_ccompare)(CPUXtensaState *env, uint32_t i) void HELPER(check_interrupts)(CPUXtensaState *env) { + qemu_mutex_lock_iothread(); check_interrupts(env); + qemu_mutex_unlock_iothread(); } void HELPER(itlb_hit_test)(CPUXtensaState *env, uint32_t vaddr) From patchwork Thu Mar 2 19:53:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 94813 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp326987qgd; Thu, 2 Mar 2017 12:04:47 -0800 (PST) X-Received: by 10.200.51.19 with SMTP id t19mr18967951qta.242.1488485087703; Thu, 02 Mar 2017 12:04:47 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:400c:c0c::22a Subject: [Qemu-devel] [PATCH v2 09/11] target/mips/op_helper: hold BQL before calling cpu_mips_get_count X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, nikunj@linux.vnet.ibm.com, a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, Yongbok Kim , bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , Aurelien Jarno , fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We should hold the BQL before we transition to HW emulation. This is because all HW emulation needs to be serialised under MTTCG conditions. This is picked up by asserts that fire when cpu_mips_get_count triggers and IRQ. Reported-by: Yongbok Kim Signed-off-by: Alex Bennée --- target/mips/op_helper.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) -- 2.11.0 diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index b683fcb025..38bca03f52 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -17,6 +17,7 @@ * License along with this library; if not, see . */ #include "qemu/osdep.h" +#include "qemu/main-loop.h" #include "cpu.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" @@ -827,7 +828,13 @@ target_ulong helper_mftc0_tcschefback(CPUMIPSState *env) target_ulong helper_mfc0_count(CPUMIPSState *env) { - return (int32_t)cpu_mips_get_count(env); + int32_t count; + + qemu_mutex_lock_iothread(); + count = (int32_t)cpu_mips_get_count(env); + qemu_mutex_unlock_iothread(); + + return count; } target_ulong helper_mftc0_entryhi(CPUMIPSState *env) @@ -2296,12 +2303,16 @@ target_ulong helper_rdhwr_synci_step(CPUMIPSState *env) target_ulong helper_rdhwr_cc(CPUMIPSState *env) { + int32_t count; check_hwrena(env, 2, GETPC()); #ifdef CONFIG_USER_ONLY - return env->CP0_Count; + count = env->CP0_Count; #else - return (int32_t)cpu_mips_get_count(env); + qemu_mutex_lock_iothread(); + count = (int32_t)cpu_mips_get_count(env); + qemu_mutex_unlock_iothread(); #endif + return count; } target_ulong helper_rdhwr_ccres(CPUMIPSState *env) From patchwork Thu Mar 2 19:53:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 94812 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp326052qgd; Thu, 2 Mar 2017 12:02:50 -0800 (PST) X-Received: by 10.237.55.5 with SMTP id i5mr12434426qtb.76.1488484970539; Thu, 02 Mar 2017 12:02:50 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:400c:c0c::22b Subject: [Qemu-devel] [PATCH v2 10/11] target/arm/helper: make it clear the EC field is also in hex X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, nikunj@linux.vnet.ibm.com, a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, "open list:ARM" , bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" ..just like the rest of the displayed ESR register. Otherwise people might scratch their heads if a not obviously hex number is displayed for the EC field. Signed-off-by: Alex Bennée --- target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.11.0 Reviewed-by: KONRAD Frederic Reviewed-by: Peter Maydell diff --git a/target/arm/helper.c b/target/arm/helper.c index 3f4211b572..76b608f0ba 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6857,7 +6857,7 @@ void arm_cpu_do_interrupt(CPUState *cs) new_el); if (qemu_loglevel_mask(CPU_LOG_INT) && !excp_is_internal(cs->exception_index)) { - qemu_log_mask(CPU_LOG_INT, "...with ESR %x/0x%" PRIx32 "\n", + qemu_log_mask(CPU_LOG_INT, "...with ESR 0x%x/0x%" PRIx32 "\n", env->exception.syndrome >> ARM_EL_EC_SHIFT, env->exception.syndrome); } From patchwork Thu Mar 2 19:53:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 94810 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp324688qgd; Thu, 2 Mar 2017 12:00:14 -0800 (PST) X-Received: by 10.200.51.92 with SMTP id u28mr20026354qta.151.1488484814436; Thu, 02 Mar 2017 12:00:14 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id h15si7715033qth.204.2017.03.02.12.00.14 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 02 Mar 2017 12:00:14 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54292 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjWtY-0004Jq-5k for patch@linaro.org; Thu, 02 Mar 2017 15:00:12 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59761) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjWnO-00088e-Mr for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cjWnM-0002Xb-Tr for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:50 -0500 Received: from mail-wm0-x22d.google.com ([2a00:1450:400c:c09::22d]:36200) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cjWnM-0002XF-Nr for qemu-devel@nongnu.org; Thu, 02 Mar 2017 14:53:48 -0500 Received: by mail-wm0-x22d.google.com with SMTP id n11so96810wma.1 for ; Thu, 02 Mar 2017 11:53:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KWSZlo/VylAEpDhSQ11RJbzh5kr+PSDdFD5j+DQAcZc=; b=NvKxlrNGs+aZ/cHMdrHjQdmSXDes64Gp/FBGGvAv6Uq1XuMCZYZ45A8Tu44ChxbcQw C6nqvLB91GjxD2+9kiaJxc86JnctMth7n/fcVCL8JFm7yHyJdsBVP9gtgDAH1pbqVEOD zsd4YR1FLLT1Umhhjxbz2VJiIwEyos/Cw3kxE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KWSZlo/VylAEpDhSQ11RJbzh5kr+PSDdFD5j+DQAcZc=; b=onyTmq1RihsJYejgV1YETAoI/cBHdg/ysDxXkt5M/QkoIR41tnce7pg6kzmb+M868H 2a8RWAlUsAOrS//2dWHkM42i1KJ3pCk60WFZayHOCZVyFsyU8xe+WB0Wnh+RF64bh3s7 zljolBWRwvsJxvG8apkpzpFR3IzVDL9AgWUYN+zHcGGimUAHtHdiqLzcsp9alHyXla0r tMXzVo1KbAua4nQLg/cy4UDime8kdVe7UcFC8WMUr2mMX0FJH6om4nk30dJ2TED55IcA sxf8sWIso1nEY6TOPW7mqYT5q+oTvP4aVJJ+sC/QzdPylySXXFZZeMwLQdZ55p9pR8gb c8NA== X-Gm-Message-State: AMke39lQmFVuVTaPGiuwdH8yHfwMPZwgd+2fvnBMOBHxzcrfXA3oL30X3OR1LuACT4wOy85c X-Received: by 10.28.179.7 with SMTP id c7mr8382wmf.128.1488484427603; Thu, 02 Mar 2017 11:53:47 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id t194sm24255300wmd.13.2017.03.02.11.53.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Mar 2017 11:53:43 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id D84C83E0BD2; Thu, 2 Mar 2017 19:53:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org, rth@twiddle.net, pbonzini@redhat.com Date: Thu, 2 Mar 2017 19:53:37 +0000 Message-Id: <20170302195337.31558-12-alex.bennee@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170302195337.31558-1-alex.bennee@linaro.org> References: <20170302195337.31558-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::22d Subject: [Qemu-devel] [PATCH v2 11/11] hw/intc/arm_gic: modernise the DPRINTF X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, nikunj@linux.vnet.ibm.com, a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, "open list:ARM cores" , bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" While I was debugging the icount issues I realised a bunch of the messages look quite similar. I've fixed this by including __func__ in the debug print. At the same time I move the a modern if (GATE) style printf which ensures the compiler can check for format string errors even if the code gets optimised away in the non-DEBUG_GIC case. Signed-off-by: Alex Bennée --- hw/intc/arm_gic.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) -- 2.11.0 Reviewed-by: Peter Maydell diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 8e5a9d8a3e..b305d9032a 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -26,15 +26,20 @@ #include "qemu/log.h" #include "trace.h" -//#define DEBUG_GIC +/* #define DEBUG_GIC */ #ifdef DEBUG_GIC -#define DPRINTF(fmt, ...) \ -do { fprintf(stderr, "arm_gic: " fmt , ## __VA_ARGS__); } while (0) +#define DEBUG_GIC_GATE 1 #else -#define DPRINTF(fmt, ...) do {} while(0) +#define DEBUG_GIC_GATE 0 #endif +#define DPRINTF(fmt, ...) do { \ + if (DEBUG_GIC_GATE) { \ + fprintf(stderr, "%s: " fmt, __func__, ## __VA_ARGS__); \ + } \ + } while (0) + static const uint8_t gic_id_11mpcore[] = { 0x00, 0x00, 0x00, 0x00, 0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };