From patchwork Tue Oct 27 12:10:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 319046 Delivered-To: patch@linaro.org Received: by 2002:a92:7b12:0:0:0:0:0 with SMTP id w18csp1512023ilc; Tue, 27 Oct 2020 05:14:26 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx+leC9CRIGFON+rzeoTdxCc1ujkBCAO9vDV+qnrbp/y4bM267H4oja36cV7nrjLj49NWL5 X-Received: by 2002:a17:906:3a02:: with SMTP id z2mr2061312eje.452.1603800866462; Tue, 27 Oct 2020 05:14:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1603800866; cv=none; d=google.com; s=arc-20160816; b=e+MPwooydcYol+XhGgryUUFjRHFwvABKth9sB1sD8NeoUCirTl4zZBQfyWep2JLzB9 Hgot008Acb+EqSXIkvLStkMAPG2XVGqJaz/E1ab1acxQ7BR+KZZFarrHH3o+hAYpoFIN DyPetVaRv2SFUNwID890qQwayuSMk1H04dQ3Epl9D7oQtYJdgljClBKs7HHeOitBWPfU wdNU0Cs0Op4soODNpaPdqAFOJRIn4x2zRwmygzCzGuwoGRgnOevBgdCMroB/wbUK+DEm J5JPoknfcRhQzVQURut3RRVnKJo4ag8JUhhTFXtmsRqQy/c3GdbJwEu+QI7ujtBScsAs rDNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=aCEIpMwgg+u3tf9VQdUAnn+aKJZXtuB8PgB4OnL4TQw=; b=02dcXZXPKogO5R/NdfKabFWgs6oqdyCLqeC5uOlrfCRkmZ9QBP1gk1XB50+2LYe0l3 6lveFc9pnbjJZm6By3FDgQq3Mm09GvMk5jh+qHtho2N+5V8q2kzwhUhwkUbT3ymm6YYe 0ZxvkcmLBDbSGQIh4TfTqpQbC/PPPpHS58Lm2WDjhNJ/+I3Ny6xBsLKDKf/0I5I6QNCP xaFkJ/fW6GUDrerUS03YT0X/SHQF0QsmYUgp+1KPCPMgCF5d1AZlN3oQb8OZuOtmVVp1 0pXlwfJUmplqWQUEKVrbvzZgYOg0CNm4c64MSWc9wHpIqBJ/FG03Tggn9tHd5+/b3Yuw DsdA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h22si749788edj.40.2020.10.27.05.14.26 for ; Tue, 27 Oct 2020 05:14:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2899633AbgJ0MOW (ORCPT ); Tue, 27 Oct 2020 08:14:22 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:6407 "EHLO szxga07-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750751AbgJ0MOR (ORCPT ); Tue, 27 Oct 2020 08:14:17 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CL9cB1QKKz6yFQ; Tue, 27 Oct 2020 20:14:18 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.487.0; Tue, 27 Oct 2020 20:14:04 +0800 From: John Garry To: , , , , CC: , , , , John Garry Subject: [PATCH 1/3] genirq/affinity: Add irq_update_affinity_desc() Date: Tue, 27 Oct 2020 20:10:22 +0800 Message-ID: <1603800624-180488-2-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1603800624-180488-1-git-send-email-john.garry@huawei.com> References: <1603800624-180488-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org From: Thomas Gleixner Add a function to allow the affinity of an interrupt be switched to managed, such that interrupts allocated for platform devices may be managed. [jpg: Add commit message and add prototypes] Signed-off-by: John Garry --- Thomas, I just made you author since you provided the original code, hope it's ok. include/linux/interrupt.h | 8 ++++++++ kernel/irq/manage.c | 19 +++++++++++++++++++ 2 files changed, 27 insertions(+) -- 2.26.2 diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index ee8299eb1f52..870b3251e174 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -352,6 +352,8 @@ extern int irq_can_set_affinity(unsigned int irq); extern int irq_select_affinity(unsigned int irq); extern int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m); +extern int irq_update_affinity_desc(unsigned int irq, + struct irq_affinity_desc *affinity); extern int irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify); @@ -387,6 +389,12 @@ static inline int irq_set_affinity_hint(unsigned int irq, return -EINVAL; } +static inline int irq_update_affinity_desc(unsigned int irq, + struct irq_affinity_desc *affinity) +{ + return -EINVAL; +} + static inline int irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) { diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index c460e0496006..b96af4cde4bc 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -371,6 +371,25 @@ int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask, return ret; } +int irq_update_affinity_desc(unsigned int irq, + struct irq_affinity_desc *affinity) +{ + unsigned long flags; + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); + + if (!desc) + return -EINVAL; + + if (affinity->is_managed) { + irqd_set(&desc->irq_data, IRQD_AFFINITY_MANAGED); + irqd_set(&desc->irq_data, IRQD_MANAGED_SHUTDOWN); + } + + cpumask_copy(desc->irq_common_data.affinity, &affinity->mask); + irq_put_desc_unlock(desc, flags); + return 0; +} + int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force) { struct irq_desc *desc = irq_to_desc(irq); From patchwork Tue Oct 27 12:10:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 319048 Delivered-To: patch@linaro.org Received: by 2002:a92:7b12:0:0:0:0:0 with SMTP id w18csp1512123ilc; Tue, 27 Oct 2020 05:14:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwEDM8d5fFjkXTbXAyFMcVJNGXXC6Jhi0/Ly0LRNTUBRwn5IBQe4JW1CrFUCQt1EIIlD3jw X-Received: by 2002:a17:906:6a07:: with SMTP id o7mr2048949ejr.454.1603800873355; Tue, 27 Oct 2020 05:14:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1603800873; cv=none; d=google.com; s=arc-20160816; b=LUp5Xxg86CXwA5w3tMFjozqDyDKlSShViZe/6bIfJ5975I9WH9kdSmXL0oOYlwHZUu dkmmm1SmckT5k9WnZ/YQhPKWEJpcNReJAgIQofQ73wOxDKvCjmzYmVdQVGyDI5cf5YTq D9VdOoG4TARPAasHrioPgAEbM43Cu4/wbGugFDaMMwVHH50xegIAXwEinjrFGQZv3hv8 EFP9gx82FRxw5fUCFDotyMGfzNUt+pfo6d+J61lwSxRX7QuIcuXVGS/AMTnId/HEQRYE UwAw8mLSLrSJIHo+aqpmOzim+2NPr9ddkFEvPHIIoM3PcYiJOJnQYyvZIHSZzBt2HsPl HKHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=wAHb5kadjJRL6mW5h4QqywjqmkGghAtBuSuyOdd/KKE=; b=DhZT6hIxujgBSH+e25ek2pSe2YCpntPOL4kB2QvLPtEgd3RWqHCaGWW1yCkz18OsZd JhTQWbpoz1VOAfnGFBoocAixdf4Tytr8TJbk4RIKa8kbFBdnCxH1yKeavuvmaYEi2E0r uc/zAfel8DAjXRhJy9X0BWFCEhMDbFFwVlLlHBvuBjfal46yoho5o9QzVR+8/MsAHAjn SsRSR49UjIGlxCvpsNIE9eIErdYxmYNuBpdtLqOb8UUiCa1RUL126t1RlqoIa5fxqbKJ qnBc4zY9OouH3mXmirJUc5jZ4SCMZ5/ynGhr/7ItVxJCckE8g/CEd//faMOw2qgU28fS jI2Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h22si749788edj.40.2020.10.27.05.14.33 for ; Tue, 27 Oct 2020 05:14:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750756AbgJ0MOQ (ORCPT ); Tue, 27 Oct 2020 08:14:16 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:6404 "EHLO szxga07-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750748AbgJ0MOP (ORCPT ); Tue, 27 Oct 2020 08:14:15 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CL9cB04t6z6yB1; Tue, 27 Oct 2020 20:14:18 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.487.0; Tue, 27 Oct 2020 20:14:05 +0800 From: John Garry To: , , , , CC: , , , , John Garry Subject: [PATCH 2/3] Driver core: platform: Add platform_get_irqs_affinity() Date: Tue, 27 Oct 2020 20:10:23 +0800 Message-ID: <1603800624-180488-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1603800624-180488-1-git-send-email-john.garry@huawei.com> References: <1603800624-180488-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Drivers for multi-queue platform devices may also want managed interrupts for handling HW queue completion interrupts, so add support. The function accepts an affinity descriptor pointer, which covers all IRQs expected for the device. The platform device driver is expected to hold all the IRQ numbers, as there is no point in holding these in the common platform_device structure. Signed-off-by: John Garry --- drivers/base/platform.c | 58 +++++++++++++++++++++++++++++++++ include/linux/platform_device.h | 5 +++ 2 files changed, 63 insertions(+) -- 2.26.2 Reported-by: kernel test robot diff --git a/drivers/base/platform.c b/drivers/base/platform.c index 88aef93eb4dd..c110b35469d6 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -269,6 +269,64 @@ int platform_get_irq(struct platform_device *dev, unsigned int num) } EXPORT_SYMBOL_GPL(platform_get_irq); +/** + * platform_get_irqs_affinity - get all IRQs for a device using an affinity + * descriptor + * @dev: platform device pointer + * @affd: affinity descriptor, must be set + * @count: pointer to count of IRQS + * @irqs: pointer holder for IRQ numbers + * + * Gets a full set of IRQs for a platform device, and updates IRQ afffinty + * according to the passed affinity descriptor + * + * Return: 0 on success, negative error number on failure. + */ +int platform_get_irqs_affinity(struct platform_device *dev, + struct irq_affinity *affd, + unsigned int *count, + int **irqs) +{ + struct irq_affinity_desc *desc; + int i, *pirqs; + + if (!affd) + return -EPERM; + + *count = platform_irq_count(dev); + + if (*count <= affd->pre_vectors + affd->post_vectors) + return -EIO; + + pirqs = kcalloc(*count, sizeof(int), GFP_KERNEL); + if (!pirqs) + return -ENOMEM; + + for (i = 0; i < *count; i++) { + int irq = platform_get_irq(dev, i); + if (irq < 0) { + kfree(pirqs); + return irq; + } + pirqs[i] = irq; + } + + desc = irq_create_affinity_masks(*count, affd); + if (!desc) { + kfree(pirqs); + return -ENOMEM; + } + + for (i = 0; i < *count; i++) + irq_update_affinity_desc(pirqs[i], &desc[i]); + + kfree(desc); + *irqs = pirqs; + + return 0; +} +EXPORT_SYMBOL_GPL(platform_get_irqs_affinity); + /** * platform_irq_count - Count the number of IRQs a platform device uses * @dev: platform device diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h index 77a2aada106d..c3f4fc5a76b9 100644 --- a/include/linux/platform_device.h +++ b/include/linux/platform_device.h @@ -11,6 +11,7 @@ #define _PLATFORM_DEVICE_H_ #include +#include #define PLATFORM_DEVID_NONE (-1) #define PLATFORM_DEVID_AUTO (-2) @@ -70,6 +71,10 @@ devm_platform_ioremap_resource_byname(struct platform_device *pdev, extern int platform_get_irq(struct platform_device *, unsigned int); extern int platform_get_irq_optional(struct platform_device *, unsigned int); extern int platform_irq_count(struct platform_device *); +extern int platform_get_irqs_affinity(struct platform_device *dev, + struct irq_affinity *affd, + unsigned int *count, + int **irqs); extern struct resource *platform_get_resource_byname(struct platform_device *, unsigned int, const char *); From patchwork Tue Oct 27 12:10:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 287054 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12424C388F9 for ; Tue, 27 Oct 2020 12:14:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C08E12245D for ; Tue, 27 Oct 2020 12:14:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750780AbgJ0MOR (ORCPT ); Tue, 27 Oct 2020 08:14:17 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:6406 "EHLO szxga07-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750752AbgJ0MOQ (ORCPT ); Tue, 27 Oct 2020 08:14:16 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CL9cB1zjqz6ycc; Tue, 27 Oct 2020 20:14:18 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.487.0; Tue, 27 Oct 2020 20:14:05 +0800 From: John Garry To: , , , , CC: , , , , John Garry Subject: [PATCH 3/3] scsi: hisi_sas: Expose HW queues for v2 hw Date: Tue, 27 Oct 2020 20:10:24 +0800 Message-ID: <1603800624-180488-4-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1603800624-180488-1-git-send-email-john.garry@huawei.com> References: <1603800624-180488-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org As a performance enhancement, make the completion queue interrupts managed. In addition, in commit bf0beec0607d ("blk-mq: drain I/O when all CPUs in a hctx are offline"), CPU hotplug for MQ devices using managed interrupts is made safe. So expose HW queues to blk-mq to take advantage of this. Flag Scsi_host.host_tagset is also set to ensure that the HBA is not sent more commands than it can handle. However the driver still does not use request tag for IPTT as there are many HW bugs which means that special rules apply for IPTT allocation. Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas.h | 4 ++ drivers/scsi/hisi_sas/hisi_sas_main.c | 11 ++++ drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 71 ++++++++++++++++++++++---- 3 files changed, 75 insertions(+), 11 deletions(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas.h b/drivers/scsi/hisi_sas/hisi_sas.h index a25cfc11c96d..33c4fb45dd99 100644 --- a/drivers/scsi/hisi_sas/hisi_sas.h +++ b/drivers/scsi/hisi_sas/hisi_sas.h @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -312,6 +313,7 @@ enum { struct hisi_sas_hw { int (*hw_init)(struct hisi_hba *hisi_hba); + int (*interrupt_preinit)(struct hisi_hba *hisi_hba); void (*setup_itct)(struct hisi_hba *hisi_hba, struct hisi_sas_device *device); int (*slot_index_alloc)(struct hisi_hba *hisi_hba, @@ -418,6 +420,8 @@ struct hisi_hba { u32 refclk_frequency_mhz; u8 sas_addr[SAS_ADDR_SIZE]; + int irq_map[128]; /* v2 hw */ + int n_phy; spinlock_t lock; struct semaphore sem; diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c index 128583dfccf2..56f914203679 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_main.c +++ b/drivers/scsi/hisi_sas/hisi_sas_main.c @@ -2614,6 +2614,13 @@ static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev, return NULL; } +static int hisi_sas_interrupt_preinit(struct hisi_hba *hisi_hba) +{ + if (hisi_hba->hw->interrupt_preinit) + return hisi_hba->hw->interrupt_preinit(hisi_hba); + return 0; +} + int hisi_sas_probe(struct platform_device *pdev, const struct hisi_sas_hw *hw) { @@ -2671,6 +2678,10 @@ int hisi_sas_probe(struct platform_device *pdev, sha->sas_port[i] = &hisi_hba->port[i].sas_port; } + rc = hisi_sas_interrupt_preinit(hisi_hba); + if (rc) + goto err_out_ha; + rc = scsi_add_host(shost, &pdev->dev); if (rc) goto err_out_ha; diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c index b57177b52fac..d6b933c3d0a2 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c @@ -3302,6 +3302,37 @@ static irq_handler_t fatal_interrupts[HISI_SAS_FATAL_INT_NR] = { fatal_axi_int_v2_hw }; +static int hisi_sas_v2_interrupt_preinit(struct hisi_hba *hisi_hba) +{ + struct platform_device *pdev = hisi_hba->platform_dev; + struct Scsi_Host *shost = hisi_hba->shost; + int rc, i, *irqs, count; + struct irq_affinity desc = { + .pre_vectors = 96, /* base of completion queue interrupts */ + .post_vectors = 16, + }; + + rc = platform_get_irqs_affinity(pdev, &desc, &count, &irqs); + if (rc < 0) + return rc; + + /* 128 interrupts are always expected */ + if (count != 128) { + kfree(irqs); + return -EIO; + } + + /* Store the IRQ numbers in the driver */ + for (i = 0; i < 128; i++) + hisi_hba->irq_map[i] = irqs[i]; + + shost->nr_hw_queues = hisi_hba->cq_nvecs = hisi_hba->queue_count; + + kfree(irqs); + + return 0; +} + /* * There is a limitation in the hip06 chipset that we need * to map in all mbigen interrupts, even if they are not used. @@ -3310,14 +3341,11 @@ static int interrupt_init_v2_hw(struct hisi_hba *hisi_hba) { struct platform_device *pdev = hisi_hba->platform_dev; struct device *dev = &pdev->dev; - int irq, rc = 0, irq_map[128]; + int irq, rc = 0; int i, phy_no, fatal_no, queue_no; - for (i = 0; i < 128; i++) - irq_map[i] = platform_get_irq(pdev, i); - for (i = 0; i < HISI_SAS_PHY_INT_NR; i++) { - irq = irq_map[i + 1]; /* Phy up/down is irq1 */ + irq = hisi_hba->irq_map[i + 1]; /* Phy up/down is irq1 */ rc = devm_request_irq(dev, irq, phy_interrupts[i], 0, DRV_NAME " phy", hisi_hba); if (rc) { @@ -3331,7 +3359,7 @@ static int interrupt_init_v2_hw(struct hisi_hba *hisi_hba) for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; - irq = irq_map[phy_no + 72]; + irq = hisi_hba->irq_map[phy_no + 72]; rc = devm_request_irq(dev, irq, sata_int_v2_hw, 0, DRV_NAME " sata", phy); if (rc) { @@ -3343,7 +3371,7 @@ static int interrupt_init_v2_hw(struct hisi_hba *hisi_hba) } for (fatal_no = 0; fatal_no < HISI_SAS_FATAL_INT_NR; fatal_no++) { - irq = irq_map[fatal_no + 81]; + irq = hisi_hba->irq_map[fatal_no + 81]; rc = devm_request_irq(dev, irq, fatal_interrupts[fatal_no], 0, DRV_NAME " fatal", hisi_hba); if (rc) { @@ -3357,7 +3385,7 @@ static int interrupt_init_v2_hw(struct hisi_hba *hisi_hba) for (queue_no = 0; queue_no < hisi_hba->queue_count; queue_no++) { struct hisi_sas_cq *cq = &hisi_hba->cq[queue_no]; - cq->irq_no = irq_map[queue_no + 96]; + cq->irq_no = hisi_hba->irq_map[queue_no + 96]; rc = devm_request_threaded_irq(dev, cq->irq_no, cq_interrupt_v2_hw, cq_thread_v2_hw, IRQF_ONESHOT, @@ -3368,10 +3396,8 @@ static int interrupt_init_v2_hw(struct hisi_hba *hisi_hba) rc = -ENOENT; goto err_out; } + cq->irq_mask = irq_get_affinity_mask(cq->irq_no); } - - hisi_hba->cq_nvecs = hisi_hba->queue_count; - err_out: return rc; } @@ -3529,6 +3555,26 @@ static struct device_attribute *host_attrs_v2_hw[] = { NULL }; +static int map_queues_v2_hw(struct Scsi_Host *shost) +{ + struct hisi_hba *hisi_hba = shost_priv(shost); + struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT]; + const struct cpumask *mask; + unsigned int queue, cpu; + + for (queue = 0; queue < qmap->nr_queues; queue++) { + mask = irq_get_affinity_mask(hisi_hba->irq_map[96 + queue]); + if (!mask) + continue; + + for_each_cpu(cpu, mask) + qmap->mq_map[cpu] = qmap->queue_offset + queue; + } + + return 0; + +} + static struct scsi_host_template sht_v2_hw = { .name = DRV_NAME, .proc_name = DRV_NAME, @@ -3553,10 +3599,13 @@ static struct scsi_host_template sht_v2_hw = { #endif .shost_attrs = host_attrs_v2_hw, .host_reset = hisi_sas_host_reset, + .map_queues = map_queues_v2_hw, + .host_tagset = 1, }; static const struct hisi_sas_hw hisi_sas_v2_hw = { .hw_init = hisi_sas_v2_init, + .interrupt_preinit = hisi_sas_v2_interrupt_preinit, .setup_itct = setup_itct_v2_hw, .slot_index_alloc = slot_index_alloc_quirk_v2_hw, .alloc_dev = alloc_dev_quirk_v2_hw,