From patchwork Fri Oct 23 13:19:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 284934 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 346FFC4363A for ; Fri, 23 Oct 2020 13:20:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DB73C20878 for ; Fri, 23 Oct 2020 13:20:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="O4WPwwWW" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S464441AbgJWNTf (ORCPT ); Fri, 23 Oct 2020 09:19:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S464427AbgJWNTe (ORCPT ); Fri, 23 Oct 2020 09:19:34 -0400 Received: from mail-lf1-x142.google.com (mail-lf1-x142.google.com [IPv6:2a00:1450:4864:20::142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59DBFC0613CE for ; Fri, 23 Oct 2020 06:19:34 -0700 (PDT) Received: by mail-lf1-x142.google.com with SMTP id h6so2059809lfj.3 for ; Fri, 23 Oct 2020 06:19:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Qx8/8JORiXv27o7v4yO39cefNVmWr3jvO/t75+dTjdY=; b=O4WPwwWWSIuLDEhXdfDmBZxgy/Nr8cebRFOYQJJ3+J7ISE6p/nk5iIPmM+zgUGewyg MP+TKcbNJzxvYkZdJmi+FdBJeM/ohwuRIVdLf8LrSWXplvXpPRadHCw2JZXCZpcEPOoc ktI1tJOQH+JKOXtvO3feIt7P2bPll32MDidUcJb505BLFpnjgDUa33neAJYZoa53c45T kqa+EfmhCH7caOXvAZGJ7Qw4FmWTVm6526FmYGyJGTEFWc/G42qIzAZMYAXjhTfODJmH MIDFtJ8ug/drLHsoQSPUpz3wU1UOM20Fl2O4s9U/JGwxHofMx6hOoCCDAN+8/A8C0K+j 2ZLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Qx8/8JORiXv27o7v4yO39cefNVmWr3jvO/t75+dTjdY=; b=Whfxr/fU5vvxosvnCnVANET4iOsjKgHvHIgIhXbs1Syed42265JFrgNk0j6l5KENW2 ax5fQgnZaBu2lfh7t2xxx+qaiXvRsBL/HYsttiOhJ5NIHzZJwXhpmJBs431Kr3hqOHo/ OHgK2654ZxuMchVJ88BJ56Z9L1EMrARSw2ZxETy7hoZpWBcTzurdw7nb83syLa6+Lz0j x4S62ZXEQcUjbJdyZersf7RFKT48kPKIZWkz9JDGIIfj4doeBg+9NUHP/SgKIFVbX3Js ZjgsVneZq7XYgaYeGWuRYcLoSlntKgaSB9WfTn8uWphPhtzaM5F1s1rZ9AeXwcWyXe5R F0gw== X-Gm-Message-State: AOAM532HZoKm0zipNP5uhbcVdukcYjPnxCZ7e7C5YQ+FPtMSV8OIQfTj 4GdHR65pk7u//1zSQhYyGzDlCA== X-Google-Smtp-Source: ABdhPJy869i54RJ9lJRegmrL7jXaydJIBnXbZK4NV5LGAXgaZbez6DNT7lcUk+T2TUqH4/5SWz+7/A== X-Received: by 2002:ac2:4ec8:: with SMTP id p8mr710093lfr.433.1603459172815; Fri, 23 Oct 2020 06:19:32 -0700 (PDT) Received: from eriador.lan ([188.162.64.195]) by smtp.gmail.com with ESMTPSA id o22sm161564ljg.122.2020.10.23.06.19.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2020 06:19:32 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Jonathan Marek , Stephen Boyd , Michael Turquette , Liam Girdwood , Mark Brown Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/5] dt-bindings: regulator: fixed: provide bindings using power domain Date: Fri, 23 Oct 2020 16:19:21 +0300 Message-Id: <20201023131925.334864-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023131925.334864-1-dmitry.baryshkov@linaro.org> References: <20201023131925.334864-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Define bindings for fixed regulator using power domain performance state to enable/disable corresponding regulator. Signed-off-by: Dmitry Baryshkov --- .../bindings/regulator/fixed-regulator.yaml | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml b/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml index 92211f2b3b0c..d3d0dc13dd8b 100644 --- a/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml @@ -26,12 +26,22 @@ if: const: regulator-fixed-clock required: - clocks +else: + if: + properties: + compatible: + contains: + const: regulator-fixed-domain + required: + - power-domains + - required-opps properties: compatible: enum: - regulator-fixed - regulator-fixed-clock + - regulator-fixed-domain regulator-name: true @@ -46,6 +56,20 @@ properties: is mandatory if compatible is chosen to regulator-fixed-clock. maxItems: 1 + power-domains: + description: + Power domain to use for enable control. This binding is only + available if the compatible is chosen to regulator-fixed-domain. + maxItems: 1 + + required-opps: + description: + Performance state to use for enable control. This binding is only + available if the compatible is chosen to regulator-fixed-domain. The + power-domain binding is mandatory if compatible is chosen to + regulator-fixed-domain. + maxItems: 1 + startup-delay-us: description: startup time in microseconds $ref: /schemas/types.yaml#/definitions/uint32 @@ -89,4 +113,27 @@ examples: gpio-open-drain; vin-supply = <&parent_reg>; }; + reg_1v8_clk: regulator-1v8-clk { + compatible = "regulator-fixed-clock"; + regulator-name = "1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + clocks = <&clock1>; + startup-delay-us = <70000>; + enable-active-high; + regulator-boot-on; + vin-supply = <&parent_reg>; + }; + reg_1v8_domain: regulator-1v8-domain { + compatible = "regulator-fixed-domain"; + regulator-name = "1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + power-domains = <&domain1>; + required-opps = <&domain1_state1>; + startup-delay-us = <70000>; + enable-active-high; + regulator-boot-on; + vin-supply = <&parent_reg>; + }; ... From patchwork Fri Oct 23 13:19:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 284936 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58FC0C55179 for ; Fri, 23 Oct 2020 13:19:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 091B824248 for ; Fri, 23 Oct 2020 13:19:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="X9/k2IJL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S464446AbgJWNTl (ORCPT ); Fri, 23 Oct 2020 09:19:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S464437AbgJWNTi (ORCPT ); Fri, 23 Oct 2020 09:19:38 -0400 Received: from mail-lj1-x242.google.com (mail-lj1-x242.google.com [IPv6:2a00:1450:4864:20::242]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6932C0613CE for ; Fri, 23 Oct 2020 06:19:36 -0700 (PDT) Received: by mail-lj1-x242.google.com with SMTP id c21so1544983ljj.0 for ; Fri, 23 Oct 2020 06:19:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AqOOQJkhUfvKoNHnpeyzoyANmDhc3aHrYoF+q2ExrGE=; b=X9/k2IJLvlOHdTHBPXpgN4RmgFl3Oq62n61bxmVEhlMNmljFgL94Rd4cOvNlRLehAD GIS4FbH9mh3Qvqh0/li1DbfMKSjAImGtgWKCqn7IKBgyGAChiOLr5kXnwDQjzgRyyWHr CcATQGMj704tN98Lp+HEFgs1L3wG424ko9dpXlQurxVu42r4vqzwPvtkoa1X/BxpDqeI 651Cdtn6q/zdmRJNAXHxY9OJFX8uoc9xa3XLMxdCE1SMnvNn0OtlzNr1TVUPPIA3jd0R G0PAvM53ysGj/72ELEYqo4xYNjgWPkduqv3fdkEiVjbB/JdCW+tZqtC4BTqyGkJMkYJ0 Da7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AqOOQJkhUfvKoNHnpeyzoyANmDhc3aHrYoF+q2ExrGE=; b=Qbp7rL77aA9jiS0FuycU5KQRbJhJFGqCF8VvHEbXKVO+j7asPng0kj7slYRVPGFmjH j3wldHVA6b2RQUSTnKa8WEVOtVQW4lE4B7aNbtVPSNUDCLiu+IsNUrQRvzMSKw4Cdyzi O95gY/MhTbJhM8rmT1v7FE5nx+zyFKvAxcim9SfYtwGXpL/ajiNSoLa074AmvtNBfICN 1pL20f9FCG9779HPQtSkf7qkCUAiRam+r8YUb2oFBqaJGdZiBGilIqebHcphPWFoP+g0 pEazk0o/gVxFSHdBA3T6BlzMlHD/ycKnN25IoQhVrSwW9DpXtBb+u9CNrWM/ID6iWpAo 5bsA== X-Gm-Message-State: AOAM530Rr98gJ1itr1EHd4pvvlot/RlbaK78akRMcP7wSqVDQd3fpfc3 +PrV4ycwdqOM2PLj13ZwB6JscA== X-Google-Smtp-Source: ABdhPJyKYcn13crHVHPIp5NgBoi1S4qmyj+ZQu0TvENFZQFgiwZs7aHHuN23fxPvwDp1+VVti3lVDg== X-Received: by 2002:a2e:b0e4:: with SMTP id h4mr816744ljl.119.1603459175157; Fri, 23 Oct 2020 06:19:35 -0700 (PDT) Received: from eriador.lan ([188.162.64.195]) by smtp.gmail.com with ESMTPSA id o22sm161564ljg.122.2020.10.23.06.19.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2020 06:19:34 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Jonathan Marek , Stephen Boyd , Michael Turquette , Liam Girdwood , Mark Brown Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/5] regulator: fixed: support using power domain for enable/disable Date: Fri, 23 Oct 2020 16:19:22 +0300 Message-Id: <20201023131925.334864-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023131925.334864-1-dmitry.baryshkov@linaro.org> References: <20201023131925.334864-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Adds possibility to choose the compatible "fixed-regulator-domain" for regulators which use power domain for enabling/disabling corresponding regulator. Signed-off-by: Dmitry Baryshkov --- drivers/regulator/fixed.c | 63 +++++++++++++++++++++++++++++++++++---- 1 file changed, 57 insertions(+), 6 deletions(-) diff --git a/drivers/regulator/fixed.c b/drivers/regulator/fixed.c index 3de7709bdcd4..02ad83153e19 100644 --- a/drivers/regulator/fixed.c +++ b/drivers/regulator/fixed.c @@ -18,6 +18,8 @@ #include #include #include +#include +#include #include #include #include @@ -34,11 +36,13 @@ struct fixed_voltage_data { struct regulator_dev *dev; struct clk *enable_clock; - unsigned int clk_enable_counter; + unsigned int enable_counter; + int performance_state; }; struct fixed_dev_type { bool has_enable_clock; + bool has_performance_state; }; static int reg_clock_enable(struct regulator_dev *rdev) @@ -50,7 +54,7 @@ static int reg_clock_enable(struct regulator_dev *rdev) if (ret) return ret; - priv->clk_enable_counter++; + priv->enable_counter++; return ret; } @@ -60,16 +64,41 @@ static int reg_clock_disable(struct regulator_dev *rdev) struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); clk_disable_unprepare(priv->enable_clock); - priv->clk_enable_counter--; + priv->enable_counter--; return 0; } -static int reg_clock_is_enabled(struct regulator_dev *rdev) +static int reg_domain_enable(struct regulator_dev *rdev) { struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); + struct device *dev = rdev->dev.parent; + int ret; + + ret = dev_pm_genpd_set_performance_state(dev, priv->performance_state); + if (ret) + return ret; - return priv->clk_enable_counter > 0; + priv->enable_counter++; + + return ret; +} + +static int reg_domain_disable(struct regulator_dev *rdev) +{ + struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); + struct device *dev = rdev->dev.parent; + + priv->enable_counter--; + + return dev_pm_genpd_set_performance_state(dev, 0); +} + +static int reg_is_enabled(struct regulator_dev *rdev) +{ + struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); + + return priv->enable_counter > 0; } @@ -129,7 +158,13 @@ static const struct regulator_ops fixed_voltage_ops = { static const struct regulator_ops fixed_voltage_clkenabled_ops = { .enable = reg_clock_enable, .disable = reg_clock_disable, - .is_enabled = reg_clock_is_enabled, + .is_enabled = reg_is_enabled, +}; + +static const struct regulator_ops fixed_voltage_domain_ops = { + .enable = reg_domain_enable, + .disable = reg_domain_disable, + .is_enabled = reg_is_enabled, }; static int reg_fixed_voltage_probe(struct platform_device *pdev) @@ -177,6 +212,14 @@ static int reg_fixed_voltage_probe(struct platform_device *pdev) dev_err(dev, "Can't get enable-clock from devicetree\n"); return -ENOENT; } + } else if (drvtype && drvtype->has_performance_state) { + drvdata->desc.ops = &fixed_voltage_domain_ops; + + drvdata->performance_state = of_get_required_opp_performance_state(dev->of_node, 0); + if (drvdata->performance_state < 0) { + dev_err(dev, "Can't get performance state from devicetree\n"); + return drvdata->performance_state; + } } else { drvdata->desc.ops = &fixed_voltage_ops; } @@ -260,6 +303,10 @@ static const struct fixed_dev_type fixed_clkenable_data = { .has_enable_clock = true, }; +static const struct fixed_dev_type fixed_domain_data = { + .has_performance_state = true, +}; + static const struct of_device_id fixed_of_match[] = { { .compatible = "regulator-fixed", @@ -269,6 +316,10 @@ static const struct of_device_id fixed_of_match[] = { .compatible = "regulator-fixed-clock", .data = &fixed_clkenable_data, }, + { + .compatible = "regulator-fixed-domain", + .data = &fixed_domain_data, + }, { }, }; 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Fri, 23 Oct 2020 06:19:37 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Jonathan Marek , Stephen Boyd , Michael Turquette , Liam Girdwood , Mark Brown Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/5] arm64: dts: qcom: sm8150: add mmcx regulator Date: Fri, 23 Oct 2020 16:19:23 +0300 Message-Id: <20201023131925.334864-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023131925.334864-1-dmitry.baryshkov@linaro.org> References: <20201023131925.334864-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add regulator controlling MMCX power domain to be used by display clock controller on SM8150. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index f0a872e02686..4c3d694b7dab 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -172,6 +172,13 @@ tcsr_mutex: hwlock { #hwlock-cells = <1>; }; + mmcx_reg: mmcx-reg { + compatible = "regulator-fixed-domain"; + power-domains = <&rpmhpd SM8150_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; + regulator-name = "MMCX"; + }; + memory@80000000 { device_type = "memory"; /* We expect the bootloader to fill in the size */ From patchwork Fri Oct 23 13:19:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 284935 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DEF3C56201 for ; Fri, 23 Oct 2020 13:19:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 04A0121D43 for ; Fri, 23 Oct 2020 13:19:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="CpTp4wLu" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S464450AbgJWNTr (ORCPT ); Fri, 23 Oct 2020 09:19:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46842 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S464487AbgJWNTo (ORCPT ); Fri, 23 Oct 2020 09:19:44 -0400 Received: from mail-lf1-x143.google.com (mail-lf1-x143.google.com [IPv6:2a00:1450:4864:20::143]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F462C0613D4 for ; Fri, 23 Oct 2020 06:19:42 -0700 (PDT) Received: by mail-lf1-x143.google.com with SMTP id l2so2073889lfk.0 for ; Fri, 23 Oct 2020 06:19:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vs5mIrV/vf6dXVUTDjt/isM2L9GuwwyE1om4bgY/ZkU=; b=CpTp4wLudC7DAsrK1ThoOcKozcTO0vn/+OJRKPKooHTPqgO9ZFJmTTfAdC7YcLIeIz pDwIay79IUiwsxhjAFJg1a5VAo5gMpSVcDWkmiJrEaAAtO5DTgZpcEYfSCUkG33Vj5PG vUYgZxKYPsL0y3gf6Ee20myRXrgimuasFlBpqofZ/uEEllU3OXJB7dELxbZf7yUJMhEV /B57sdfKz8n6408WAfe5JxsAwEaz2gDQ3F3czB2nK3ssd/vozqMxIuVtJ32iVYkUjdSG jcluEtB63dJkJDOElwj6N7yy6srLXcof8S6OX7mqrEEi+DiGm0n0LwngI/s2Ld9NOWRZ Hg2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vs5mIrV/vf6dXVUTDjt/isM2L9GuwwyE1om4bgY/ZkU=; b=dVGMbWBGGGglHNUJtjxCX7j5Rip3VTAT3L+1oIQ6+j8vwIaxrJ4/e8Cx8TNCNKTSxc mYtygQbWnaoNZaT4hc2Dy5Mm3ZoHghSbXwqMQuR+oUe0EVH6GBc2wp50Pb4cz4kiIvMT 8WACTcjN6Ej07NXzH4HgSVXuLqdCx5hhSAN6AE2Mg84IuibUAAkaLQ5W3JOq5+jq4ylj rCr2WzCKnfKMLwTFZfCVYoX9D4vViRjjeCtX2pgRa9rOZ2s5BSr0TjjJx7yY25+XD3OO 6LiG9Qb3nArYDGsdfG0dJs5W+wMVe8w7EA4nXslC5eyq/NpmShTOSvppA8wm89/JuPGi S2hg== X-Gm-Message-State: AOAM53292k2z2uiwOouiSiMdVVYvPZQljwQjJRsSv9egJMgMHJjpZALF gC0Lz2v9fIDSBk985Ysl70woeg== X-Google-Smtp-Source: ABdhPJw9ugMZCYpQu7QxG3hoZDbK0RbL4rhOr50EyBLVYx2Slttp8dcxQ4Sf5TIkPSMR6cZIH1hSwA== X-Received: by 2002:ac2:5976:: with SMTP id h22mr708794lfp.507.1603459181044; Fri, 23 Oct 2020 06:19:41 -0700 (PDT) Received: from eriador.lan ([188.162.64.195]) by smtp.gmail.com with ESMTPSA id o22sm161564ljg.122.2020.10.23.06.19.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2020 06:19:40 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Jonathan Marek , Stephen Boyd , Michael Turquette , Liam Girdwood , Mark Brown Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/5] arm64: dts: qcom: sm8250: add mmcx regulator Date: Fri, 23 Oct 2020 16:19:24 +0300 Message-Id: <20201023131925.334864-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023131925.334864-1-dmitry.baryshkov@linaro.org> References: <20201023131925.334864-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add regulator controlling MMCX power domain to be used by display clock controller on SM8250. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index d057d85a19fb..c1d4a63cd2de 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -214,6 +214,13 @@ memory@80000000 { reg = <0x0 0x80000000 0x0 0x0>; }; + mmcx_reg: mmcx-reg { + compatible = "regulator-fixed-domain"; + power-domains = <&rpmhpd SM8250_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; + regulator-name = "MMCX"; + }; + pmu { compatible = "arm,armv8-pmuv3"; interrupts = ; From patchwork Fri Oct 23 13:19:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 292307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49A73C56202 for ; Fri, 23 Oct 2020 13:19:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 07EC020878 for ; Fri, 23 Oct 2020 13:19:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="WsD3RCjB" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S464487AbgJWNTt (ORCPT ); Fri, 23 Oct 2020 09:19:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S464507AbgJWNTr (ORCPT ); Fri, 23 Oct 2020 09:19:47 -0400 Received: from mail-lf1-x144.google.com (mail-lf1-x144.google.com [IPv6:2a00:1450:4864:20::144]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BDF00C0613D2 for ; Fri, 23 Oct 2020 06:19:44 -0700 (PDT) Received: by mail-lf1-x144.google.com with SMTP id d24so2047362lfa.8 for ; Fri, 23 Oct 2020 06:19:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=42/QJnTBpzJfK34Z8I/i86Pa85pWKg6cU4DTrB1R8G0=; b=WsD3RCjBU2/gDCOB79XWImHCGbaDA9pH/0eqBfD4sCzHj+1JAxMaNdzaNP8k/KA9rn t2pmFfbqqRunMeULfNBVr1WkuRi0qMo8o7guSHaPx80XPDOzne1yKmW22FU9Z6GlKhta vBbALKwQWVLdAD/slIMWsiYhIjZrKChouZkNOrVzNh77QPW2pdNTnuSzpM5KZ/espzqa gOSKt4AMn5T4zEiNt2Qpx3IDwfuDLcb4iB80CEdrUO5vuNdqAJ3HQqVeXPGtXocFBLE/ M/KxpyXhyN3WRwtys/GmKWqmpsEXm8pQgYwHrPHZqpbxXqhuQeaneQo2oAjB6B3UzDii tH3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=42/QJnTBpzJfK34Z8I/i86Pa85pWKg6cU4DTrB1R8G0=; b=Y684I6773Pz+r8sTOACvpWl6T+09njZm/GARX6ar9t/ydVNoSxaBNHllwiqzvt56Zv 245eKxOFuJx68nEXM8w7/t2EbnNV2GtU0vHmSSzhRd4TSCi7iSYtgCuTfh2/cdY82l+2 tYcMy+kXrc1QzllX03XKdUOlpbnMaJhzp6GuH3JZinC+MW7AqBEHk56KrCujgid+T/8V EhilEaz7Q2LdCTz/3XbF9u6KJY126iGXd/llfeYw7JdReSJNCBkhnTA6meHuFv1ul7Vx iSx7Fk8322I0YMfjeT0w4wN9q24N3Ew6iUwG1oBExPCJDw3BR+cQIrXc+hiczv3gX8DG G3MA== X-Gm-Message-State: AOAM533V/oh1yIC0sy34XfxQIDPnIlFCn8oI6X7cXmciuqjjDwYcufQm CRDImzgCPODVSEkRNpzsNvqdgA== X-Google-Smtp-Source: ABdhPJx1MpKQkvgHj6D1gAJ1OzdDgkZgE/Fy3vrqCzBYYCELpavWDo54R7yMHsyr6KsZbd6X0scDTQ== X-Received: by 2002:a19:b14:: with SMTP id 20mr867172lfl.308.1603459183251; Fri, 23 Oct 2020 06:19:43 -0700 (PDT) Received: from eriador.lan ([188.162.64.195]) by smtp.gmail.com with ESMTPSA id o22sm161564ljg.122.2020.10.23.06.19.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2020 06:19:42 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Jonathan Marek , Stephen Boyd , Michael Turquette , Liam Girdwood , Mark Brown Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/5] clk: qcom: dispcc-sm8250: handle MMCX power domain Date: Fri, 23 Oct 2020 16:19:25 +0300 Message-Id: <20201023131925.334864-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023131925.334864-1-dmitry.baryshkov@linaro.org> References: <20201023131925.334864-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On SM8250 MMCX power domain is required to access MMDS_GDSC registers. This power domain is expressed as mmcx-supply regulator property. Use this regulator as MDSS_GDSC supply. Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sm8250.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index 07a98d3f882d..588575e1169d 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -963,6 +963,7 @@ static struct gdsc mdss_gdsc = { }, .pwrsts = PWRSTS_OFF_ON, .flags = HW_CTRL, + .supply = "mmcx", }; static struct clk_regmap *disp_cc_sm8250_clocks[] = {