From patchwork Thu Nov 16 13:35:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 119042 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp5599743qgn; Thu, 16 Nov 2017 05:36:25 -0800 (PST) X-Google-Smtp-Source: AGs4zMbJLMT9PaATUWPO3vRATchYpWIdOBiM/cjhYI/qsNTkc6nN/PlkO3pP3PrxahZEoeOjmcsd X-Received: by 10.101.87.139 with SMTP id b11mr1743144pgr.314.1510839385904; Thu, 16 Nov 2017 05:36:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510839385; cv=none; d=google.com; s=arc-20160816; b=eSmky/3Rid6tMQpiNSgV/dXqr+biDPyVbyfLF945RPqR5lDwltngMuAspwRmsxq1FY PUQqYIo4fQFDg8EbcaC/+t0myEqKc70YBCVC8co3w2bUUeaH4y7C8xx4T35uMalurQZs s/pRCFRZfKbsANHs+k7ErbvQCuHnLsTJegxIucqof6LKFA+zEId00q61Ox6vrTQZYa0+ AQFUWMZ5OsoCDTynXTVaop4PEyHPTCffDESjCtwvdY1Y0f0z8bg4C+TdDH7Ii9g/m92n A91tZ+r9cUqs8vxknyICUwelYgErtTW6b4FfoTZ9MR2ieZxL51Ppuywno/avGJJ7MI0h tdSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=TnXSJwri0d5nm2c6C8WxDh+rOYpZQfJFiYgx3RHxs1o=; b=Fq0ieNHu7C9w37l1k0LdnoanXADS6hIjcKUElU2fzpFBrLXMDvhjuHs6D3kbF44lw7 0Dy0AL6y6oFJK8V6r2qwaxMaBoXSZm30OyVz3zZOSJ4fRmr+UH5cprKHNkyHg4C+2vL3 AGkX8yFQEoAlW+MLTvwSCNjN/pqhRzJ0SRISijGFKi6Q8X20XTNbXkEs82TFtzdZ2f5Q 8dO98rSsI32lfHNwzLbRFXkIE4tXt9H5USwnXiLG2o1lRHhypTYN8Xu+RJALQV94egWd Zg+u9mB5yNytAckaENYBgM7lQpGmIV2/bjwOC5tRqoeKsMxfButeG19cx2ncsEt/6uIT dgKQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c4si874606pgu.231.2017.11.16.05.36.25; Thu, 16 Nov 2017 05:36:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933514AbdKPNgY (ORCPT + 6 others); Thu, 16 Nov 2017 08:36:24 -0500 Received: from michel.telenet-ops.be ([195.130.137.88]:34040 "EHLO michel.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759738AbdKPNgE (ORCPT ); Thu, 16 Nov 2017 08:36:04 -0500 Received: from ayla.of.borg ([84.195.106.246]) by michel.telenet-ops.be with bizsmtp id adc01w0025JzmfG06dc0K4; Thu, 16 Nov 2017 14:36:02 +0100 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.86_2) (envelope-from ) id 1eFKKl-0003mz-Pf; Thu, 16 Nov 2017 14:35:59 +0100 Received: from geert by ramsan with local (Exim 4.86_2) (envelope-from ) id 1eFKKl-0002zO-Oe; Thu, 16 Nov 2017 14:35:59 +0100 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm Cc: Arnd Bergmann , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH] ARM: dts: r8a779x: Add '#reset-cells' in cpg-mssr Date: Thu, 16 Nov 2017 14:35:57 +0100 Message-Id: <1510839357-11450-1-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 2.7.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Arnd Bergmann With the latest dtc, we get many warnings about the missing '#reset-cells' property in these controllers, e.g.: arch/arm/boot/dts/r8a7790-lager.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /can@e6e80000:resets[0]) arch/arm/boot/dts/r8a7792-blanche.dtb: Warning (resets_property): Missing property '#reset-cells' in node /soc/clock-controller@e6150000 or bad phandle (referred from /soc/dma-controller@e6700000:resets[0]) arch/arm/boot/dts/r8a7792-wheat.dtb: Warning (resets_property): Missing property '#reset-cells' in node /soc/clock-controller@e6150000 or bad phandle (referred from /soc/ethernet@e6800000:resets[0]) arch/arm/boot/dts/r8a7793-gose.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /gpio@e6050000:resets[0]) arch/arm/boot/dts/r8a7794-alt.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /i2c@e6500000:resets[0]) arch/arm/boot/dts/r8a7794-silk.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /interrupt-controller@e61c0000:resets[0]) This adds it for the three r8a779x chips that were lacking it. The binding mandates this as <1>, so this is the value I use. Signed-off-by: Arnd Bergmann [geert: Add fix for r8a7793.dtsi] Fixes: 34fbd2b12761d111 ("ARM: dts: r8a7790: Add reset control properties") Fixes: 6e11a322f1d7505d ("ARM: dts: r8a7792: Add reset control properties") Fixes: 84fb19e1d201ba86 ("ARM: dts: r8a7793: Add reset control properties") Fixes: 615beb759ca494a4 ("ARM: dts: r8a7794: Add reset control properties") Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7790.dtsi | 1 + arch/arm/boot/dts/r8a7792.dtsi | 1 + arch/arm/boot/dts/r8a7793.dtsi | 1 + arch/arm/boot/dts/r8a7794.dtsi | 1 + 4 files changed, 4 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index e2c530c330a8eb7e..450bfc0e9796a557 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1202,6 +1202,7 @@ clock-names = "extal", "usb_extal"; #clock-cells = <2>; #power-domain-cells = <0>; + #reset-cells = <1>; }; prr: chipid@ff000044 { diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 7b394273031e9a90..ac05fdb91798b88d 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -830,6 +830,7 @@ clock-names = "extal"; #clock-cells = <2>; #power-domain-cells = <0>; + #reset-cells = <1>; }; }; diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index a83c2e9c5723fe2c..61dd291d907da2f5 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -1088,6 +1088,7 @@ clock-names = "extal", "usb_extal"; #clock-cells = <2>; #power-domain-cells = <0>; + #reset-cells = <1>; }; rst: reset-controller@e6160000 { diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 96e405e70d9aeea5..106b4e1649ff695b 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -1106,6 +1106,7 @@ clock-names = "extal", "usb_extal"; #clock-cells = <2>; #power-domain-cells = <0>; + #reset-cells = <1>; }; rst: reset-controller@e6160000 {