From patchwork Mon Apr 27 09:33:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: chen huacai X-Patchwork-Id: 283909 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.3 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8641C54FD0 for ; Mon, 27 Apr 2020 09:34:49 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 91190206A4 for ; Mon, 27 Apr 2020 09:34:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="rPBabW1f" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 91190206A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:34374 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jT0A4-0007ap-Kh for qemu-devel@archiver.kernel.org; Mon, 27 Apr 2020 05:34:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33894) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jT08k-0005f6-V2 for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:33:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.90_1) (envelope-from ) id 1jT08j-0004xe-Q4 for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:33:26 -0400 Received: from mail-pl1-x641.google.com ([2607:f8b0:4864:20::641]:44830) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jT08j-0004xQ-Al for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:33:25 -0400 Received: by mail-pl1-x641.google.com with SMTP id h11so6783215plr.11 for ; Mon, 27 Apr 2020 02:33:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=u4m6+vzCc96Nl5shiNMOZfZokMTmk6NsaXZkY+++sic=; b=rPBabW1ftrQUWf3qfHV2hIxDlUsctijINgX5iu+kZaT6tVzFuP6Nw82DNAHwzpTiCx FrAjnagFmn0lff7Y+6vaR99kKNI71t3cA2AE/i264sAoTwqw/BUeWEJklq0dphvnftiL fJGuL+h8jP7IqwjCgW1v7KB8eoF9Lt4bi6sOSmouSS3iRpglrXvzN0qeE0h0xye5Xx4C F6upK2Qd/cM+/Qb41Nuncm9SEjVF8tj3DJJZfX6U3OIdfF3P1FddX35Prlfa9Q4t1sy2 2rZpSrWLDSmPm07zikcOj5Vhf7dQvFuXxVXsHCSlQvv9jSPdJgedDxb/LXjLHjvN5zXT Kv4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=u4m6+vzCc96Nl5shiNMOZfZokMTmk6NsaXZkY+++sic=; b=C+LifyUAqA3Lb0T6MyOk5rTvOuKVXdQYgGcAOE3oT5q3ARYCjvnSYZQPJa0IFJZe6D EhSR6LBfCSV2wJ/iA+i24XbtnU4whq6RSHXGG1+qASfSPuBkt6VP0H2FYK1iU4vLfRWG RlNVyZIw9pqlV9o0F2RDnK6s6/QcPyNPaG+k0/wNvZ2oDmEEPY3shcMCRZz4+qkuzhNn ymiDe4fJ2ut0Zim7tAcC/eHuJY+p+Hz/5EVDrFqvLMvEcIwvwX//EqqBWRF1am5rJGkM gV2wb9Msp81kBRUCx4kc25mxw2sHCWZjm8nYMfUyEslW9sLNX0pIuRcZz9eETikDz9pL AWMw== X-Gm-Message-State: AGi0Pua5ewhGiAtftbiPvIGpg0+R+qgV0xLuwJj4WvKIvTbcbD2PUZok aaz0iq2z9nGC6SASPpttl98= X-Google-Smtp-Source: APiQypIivvHCFxMAYkisTIGAPvozCTq7JEX2v0veG01jZqGgIAKK/me3PIokxqggnZfa/UM42J18Dg== X-Received: by 2002:a17:90a:f689:: with SMTP id cl9mr23517308pjb.43.1587980003481; Mon, 27 Apr 2020 02:33:23 -0700 (PDT) Received: from software.domain.org (28.144.92.34.bc.googleusercontent.com. [34.92.144.28]) by smtp.gmail.com with ESMTPSA id u9sm11333073pfn.197.2020.04.27.02.33.20 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Apr 2020 02:33:22 -0700 (PDT) From: Huacai Chen X-Google-Original-From: Huacai Chen To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Markovic Subject: [PATCH for-5.1 1/7] configure: Add KVM target support for MIPS64 Date: Mon, 27 Apr 2020 17:33:09 +0800 Message-Id: <1587979995-17717-1-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::641; envelope-from=zltjiangshi@gmail.com; helo=mail-pl1-x641.google.com X-detected-operating-system: by eggs.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2607:f8b0:4864:20::641 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , Huacai Chen , qemu-devel@nongnu.org, Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Preparing for Loongson-3 virtualization, add KVM target support for MIPS64 in configure script. Signed-off-by: Huacai Chen Co-developed-by: Jiaxun Yang --- configure | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure b/configure index 23b5e93..7581e65 100755 --- a/configure +++ b/configure @@ -198,7 +198,7 @@ supported_kvm_target() { arm:arm | aarch64:aarch64 | \ i386:i386 | i386:x86_64 | i386:x32 | \ x86_64:i386 | x86_64:x86_64 | x86_64:x32 | \ - mips:mips | mipsel:mips | \ + mips:mips | mipsel:mips | mips64:mips | mips64el:mips | \ ppc:ppc | ppc64:ppc | ppc:ppc64 | ppc64:ppc64 | ppc64:ppc64le | \ s390x:s390x) return 0 From patchwork Mon Apr 27 09:33:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: chen huacai X-Patchwork-Id: 283908 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.3 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93AFBC54FD0 for ; Mon, 27 Apr 2020 09:36:04 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5D525206A4 for ; Mon, 27 Apr 2020 09:36:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="TfVvfxVJ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5D525206A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:34478 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jT0BH-00014N-GV for qemu-devel@archiver.kernel.org; Mon, 27 Apr 2020 05:36:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34150) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jT09y-0007lm-Eb for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:34:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.90_1) (envelope-from ) id 1jT09x-0005kK-V6 for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:34:42 -0400 Received: from mail-pl1-x644.google.com ([2607:f8b0:4864:20::644]:43141) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jT09x-0005k2-Hk for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:34:41 -0400 Received: by mail-pl1-x644.google.com with SMTP id z6so6789503plk.10 for ; Mon, 27 Apr 2020 02:34:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NZd1iFkHpPpBXrnXcjAlLLDYkgQ24pu5fKGVYiWVpYA=; b=TfVvfxVJqwnMZDOj7fgT1WwpLyGZawfDym7LRwAwv5ft2uyySi5uI9Qb0zuOs27WtS pk35JWAmtJ3FxiA0eyFRMpi2qyGZq1xfHDOP04g95DgoYljqdq2/ls1fyHBer7sTTVj+ 3c5drTTWJA1hg5+3BG2bXmZJiMVxhpAGhZkAl3EvPd6bnKe3/74xVGcGrCH2t9hlQcPU qdh5HxJwWNJbcdGpwy3cJRgOedNJg0YElTCGRQHHOkTaHdxMiVivXaHdsuwEq4xXDZdJ Fm2ASdzLGA0ozRjcMMIQsd2eQEhfjLGVBM5fVOt4gJD76wujWXGMAhfu8pgLgg5xQm32 429A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NZd1iFkHpPpBXrnXcjAlLLDYkgQ24pu5fKGVYiWVpYA=; b=MU3v4/FfP4xngfq3pzWkoebcmNS5nVkumA5sq3xKEvmYLD27VNx05kb500rXxH1H3+ DPaoGii47xd4WALwnRvMChvGt0wfFJqv+pQOViNNyDrIHwGWWXqXcraZPeZfBj7OuUe8 TBLAOmTLhdrkJhtbhtXuvN/GaChWImxiK6fWUTnf+28DeAABkGCA7mRETOEkOc57DSnn 0MLElw0h8uYJDI8GmoHsRChdm3zOPuP4yPYxVjQY5FyXHIhQ6qdelW7IXEJC9MRIZ5QU pyHf8AKebnkjIj1PSb07BI0KcAKjF+eIVak1YJbh5CrxkpYYceTjGC4f9f+5CdGII34u HtpQ== X-Gm-Message-State: AGi0PuYDIj21UV1wNgWDSyAdRGAWVNg8hn2PDHEBcBNqcHtvsm7MKlkz 3RdWB23GZyFa8eRb6P0YXkBXx/SGKvI= X-Google-Smtp-Source: APiQypKska/wT4TOGS4VWZhp9g5HE5BXnagl8lEYFR7Ki/lAd3cBjpXk89Bsb/6odcwO/gn0UayWtg== X-Received: by 2002:a17:90b:1104:: with SMTP id gi4mr23154080pjb.115.1587980080144; Mon, 27 Apr 2020 02:34:40 -0700 (PDT) Received: from software.domain.org (28.144.92.34.bc.googleusercontent.com. [34.92.144.28]) by smtp.gmail.com with ESMTPSA id u9sm11333073pfn.197.2020.04.27.02.34.37 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Apr 2020 02:34:39 -0700 (PDT) From: Huacai Chen X-Google-Original-From: Huacai Chen To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Markovic Subject: [PATCH for-5.1 3/7] hw/mips: Add CPU IRQ3 delivery for KVM Date: Mon, 27 Apr 2020 17:33:11 +0800 Message-Id: <1587979995-17717-3-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1587979995-17717-1-git-send-email-chenhc@lemote.com> References: <1587979995-17717-1-git-send-email-chenhc@lemote.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::644; envelope-from=zltjiangshi@gmail.com; helo=mail-pl1-x644.google.com X-detected-operating-system: by eggs.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2607:f8b0:4864:20::644 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , Huacai Chen , qemu-devel@nongnu.org, Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add IP2 delivery as well, because Loongson-3 based machine use both IRQ2 (CPU's IP2) and IRQ3 (CPU's IP3). Signed-off-by: Huacai Chen Co-developed-by: Jiaxun Yang --- hw/mips/mips_int.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c index 796730b..5526219 100644 --- a/hw/mips/mips_int.c +++ b/hw/mips/mips_int.c @@ -48,16 +48,14 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level) if (level) { env->CP0_Cause |= 1 << (irq + CP0Ca_IP); - if (kvm_enabled() && irq == 2) { + if (kvm_enabled() && (irq == 2 || irq == 3)) kvm_mips_set_interrupt(cpu, irq, level); - } } else { env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP)); - if (kvm_enabled() && irq == 2) { + if (kvm_enabled() && (irq == 2 || irq == 3)) kvm_mips_set_interrupt(cpu, irq, level); - } } if (env->CP0_Cause & CP0Ca_IP_mask) { From patchwork Mon Apr 27 09:33:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: chen huacai X-Patchwork-Id: 283907 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.3 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9013AC55199 for ; Mon, 27 Apr 2020 09:37:21 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4D17F206B6 for ; Mon, 27 Apr 2020 09:37:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="l9Zfalrg" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4D17F206B6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:34594 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jT0CW-0003Gc-BM for qemu-devel@archiver.kernel.org; Mon, 27 Apr 2020 05:37:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34338) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jT0BX-0001of-KA for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:36:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.90_1) (envelope-from ) id 1jT0BW-0006bR-0R for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:36:19 -0400 Received: from mail-pf1-x444.google.com ([2607:f8b0:4864:20::444]:41683) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jT0BV-0006bK-Ii for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:36:17 -0400 Received: by mail-pf1-x444.google.com with SMTP id 18so7534193pfv.8 for ; Mon, 27 Apr 2020 02:36:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2jQHxZ8/f0NoNfSO13UzVCQymOvG4pdt/OjX66YQQ0s=; b=l9ZfalrgOE4vxv1S4N4WW46K+LSFYXtbItxEyXH5FO+WcQaGq+i2o2OPAwpQJijNyw GRE1++9+Q5XtHo0C8Au55YtcGmNJNAyY4zDp3L6xcAbud0w29is9kPWPiFtMWUYjL5ow 3oE8Vaf52oC5msijG8jjh9dZxHCNjNiQUqQr/hsvg4UoNVtFQcZJRvO56q0vPHxxWfme 0vqwGuFwMeogHRroX+MC7fRQoNzqeJvLbIGVdXbb3Eh9T2r0/KS2LCvdUMFyNkcQM2NP WYqWHG1jXm0atU4cZhgAShJlp74whPUW0VtzNmUvQMVc8RtxSZcdGUh9FfvcxQJhZTY0 RYDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2jQHxZ8/f0NoNfSO13UzVCQymOvG4pdt/OjX66YQQ0s=; b=SS4v86+HDZ/oP6RL7Gp8rtEaJtoePnm24J6wmv/Ce1qxbWqfl8nywbLfOQMv0U6wMa 4I32YRbCNn0v97v+eI6aMvyXFKbOv5jMUyHttHnoYUjQqJifpKEstWRkIGXVcMVt40fL sYao0SL1IbtYFzp4lFrRddStnhraO3odNZRxvbbuUyVBiWyFXdXofk3b3WWehavqRSZT ZROq7dmlqmXEpFvQGzTmeQZ0juuPmhOSnb/gggjcPYwc4hL+AOSWXnreIjvMf6ioxiEr kdpehgitbvaL6Odhx/5bFolrZWAwFsCBYFYBK2eFi61e2eZj2J1UJCrUYdKMfYgyKYG7 ucoQ== X-Gm-Message-State: AGi0PubEZA3Cp9yH9VUeQOEWmHCIzQ0xtB58Hhhyho/GdyBfoQqILSlJ gPfHXctl4KWIswx9bBlFlfhkvN5khFI= X-Google-Smtp-Source: APiQypLcOZnwo4NNFYnHuAXt1F+U4qcuDBbnuYT6KnV0etVj/g26WYjL/I9atudl/vT/oymqa0SScw== X-Received: by 2002:a62:32c1:: with SMTP id y184mr22071876pfy.306.1587980176061; Mon, 27 Apr 2020 02:36:16 -0700 (PDT) Received: from software.domain.org (28.144.92.34.bc.googleusercontent.com. [34.92.144.28]) by smtp.gmail.com with ESMTPSA id u9sm11333073pfn.197.2020.04.27.02.36.13 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Apr 2020 02:36:15 -0700 (PDT) From: Huacai Chen X-Google-Original-From: Huacai Chen To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Markovic Subject: [PATCH for-5.1 5/7] target/mips: Add more CP0 register for save/restore Date: Mon, 27 Apr 2020 17:33:13 +0800 Message-Id: <1587979995-17717-5-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1587979995-17717-1-git-send-email-chenhc@lemote.com> References: <1587979995-17717-1-git-send-email-chenhc@lemote.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::444; envelope-from=zltjiangshi@gmail.com; helo=mail-pf1-x444.google.com X-detected-operating-system: by eggs.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2607:f8b0:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , Huacai Chen , qemu-devel@nongnu.org, Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add more CP0 register for save/restore, including: EBase, XContext, PageGrain, PWBase, PWSize, PWField, PWCtl, Config*, KScratch1~KScratch6. Signed-off-by: Huacai Chen Co-developed-by: Jiaxun Yang --- target/mips/kvm.c | 212 ++++++++++++++++++++++++++++++++++++++++++++++++++ target/mips/machine.c | 2 + 2 files changed, 214 insertions(+) diff --git a/target/mips/kvm.c b/target/mips/kvm.c index de3e26e..96cfa10 100644 --- a/target/mips/kvm.c +++ b/target/mips/kvm.c @@ -245,10 +245,16 @@ int kvm_mips_set_ipi_interrupt(MIPSCPU *cpu, int irq, int level) (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U64 | (8 * (_R) + (_S))) #define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0) +#define KVM_REG_MIPS_CP0_RANDOM MIPS_CP0_32(1, 0) #define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0) #define KVM_REG_MIPS_CP0_USERLOCAL MIPS_CP0_64(4, 2) #define KVM_REG_MIPS_CP0_PAGEMASK MIPS_CP0_32(5, 0) +#define KVM_REG_MIPS_CP0_PAGEGRAIN MIPS_CP0_32(5, 1) +#define KVM_REG_MIPS_CP0_PWBASE MIPS_CP0_64(5, 5) +#define KVM_REG_MIPS_CP0_PWFIELD MIPS_CP0_64(5, 6) +#define KVM_REG_MIPS_CP0_PWSIZE MIPS_CP0_64(5, 7) #define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0) +#define KVM_REG_MIPS_CP0_PWCTL MIPS_CP0_32(6, 6) #define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0) #define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0) #define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0) @@ -258,13 +264,22 @@ int kvm_mips_set_ipi_interrupt(MIPSCPU *cpu, int irq, int level) #define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0) #define KVM_REG_MIPS_CP0_EPC MIPS_CP0_64(14, 0) #define KVM_REG_MIPS_CP0_PRID MIPS_CP0_32(15, 0) +#define KVM_REG_MIPS_CP0_EBASE MIPS_CP0_64(15, 1) #define KVM_REG_MIPS_CP0_CONFIG MIPS_CP0_32(16, 0) #define KVM_REG_MIPS_CP0_CONFIG1 MIPS_CP0_32(16, 1) #define KVM_REG_MIPS_CP0_CONFIG2 MIPS_CP0_32(16, 2) #define KVM_REG_MIPS_CP0_CONFIG3 MIPS_CP0_32(16, 3) #define KVM_REG_MIPS_CP0_CONFIG4 MIPS_CP0_32(16, 4) #define KVM_REG_MIPS_CP0_CONFIG5 MIPS_CP0_32(16, 5) +#define KVM_REG_MIPS_CP0_CONFIG6 MIPS_CP0_32(16, 6) +#define KVM_REG_MIPS_CP0_XCONTEXT MIPS_CP0_64(20, 0) #define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0) +#define KVM_REG_MIPS_CP0_KSCRATCH1 MIPS_CP0_64(31, 2) +#define KVM_REG_MIPS_CP0_KSCRATCH2 MIPS_CP0_64(31, 3) +#define KVM_REG_MIPS_CP0_KSCRATCH3 MIPS_CP0_64(31, 4) +#define KVM_REG_MIPS_CP0_KSCRATCH4 MIPS_CP0_64(31, 5) +#define KVM_REG_MIPS_CP0_KSCRATCH5 MIPS_CP0_64(31, 6) +#define KVM_REG_MIPS_CP0_KSCRATCH6 MIPS_CP0_64(31, 7) static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id, int32_t *addr) @@ -394,6 +409,29 @@ static inline int kvm_mips_get_one_ureg64(CPUState *cs, uint64_t reg_id, (1U << CP0C5_UFE) | \ (1U << CP0C5_FRE) | \ (1U << CP0C5_UFR)) +#define KVM_REG_MIPS_CP0_CONFIG6_MASK ((1U << CP0C6_BPPASS) | \ + (0x3fU << CP0C6_KPOS) | \ + (1U << CP0C6_KE) | \ + (1U << CP0C6_VTLBONLY) | \ + (1U << CP0C6_LASX) | \ + (1U << CP0C6_SSEN) | \ + (1U << CP0C6_DISDRTIME) | \ + (1U << CP0C6_PIXNUEN) | \ + (1U << CP0C6_SCRAND) | \ + (1U << CP0C6_LLEXCEN) | \ + (1U << CP0C6_DISVC) | \ + (1U << CP0C6_VCLRU) | \ + (1U << CP0C6_DCLRU) | \ + (1U << CP0C6_PIXUEN) | \ + (1U << CP0C6_DISBLKLYEN) | \ + (1U << CP0C6_UMEMUALEN) | \ + (1U << CP0C6_SFBEN) | \ + (1U << CP0C6_FLTINT) | \ + (1U << CP0C6_VLTINT) | \ + (1U << CP0C6_DISBTB) | \ + (3U << CP0C6_STPREFCTL) | \ + (1U << CP0C6_INSTPREF) | \ + (1U << CP0C6_DATAPREF)) static inline int kvm_mips_change_one_reg(CPUState *cs, uint64_t reg_id, int32_t *addr, int32_t mask) @@ -729,6 +767,11 @@ static int kvm_mips_put_cp0_registers(CPUState *cs, int level) DPRINTF("%s: Failed to put CP0_INDEX (%d)\n", __func__, err); ret = err; } + err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_RANDOM, &env->CP0_Random); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_RANDOM (%d)\n", __func__, err); + ret = err; + } err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_CONTEXT, &env->CP0_Context); if (err < 0) { @@ -747,11 +790,40 @@ static int kvm_mips_put_cp0_registers(CPUState *cs, int level) DPRINTF("%s: Failed to put CP0_PAGEMASK (%d)\n", __func__, err); ret = err; } + err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_PAGEGRAIN, + &env->CP0_PageGrain); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_PAGEGRAIN (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_PWBASE, + &env->CP0_PWBase); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_PWBASE (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_PWFIELD, + &env->CP0_PWField); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_PWField (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_PWSIZE, + &env->CP0_PWSize); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_PWSIZE (%d)\n", __func__, err); + ret = err; + } err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_WIRED, &env->CP0_Wired); if (err < 0) { DPRINTF("%s: Failed to put CP0_WIRED (%d)\n", __func__, err); ret = err; } + err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_PWCTL, &env->CP0_PWCtl); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_PWCTL (%d)\n", __func__, err); + ret = err; + } err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_HWRENA, &env->CP0_HWREna); if (err < 0) { DPRINTF("%s: Failed to put CP0_HWRENA (%d)\n", __func__, err); @@ -799,6 +871,11 @@ static int kvm_mips_put_cp0_registers(CPUState *cs, int level) DPRINTF("%s: Failed to put CP0_PRID (%d)\n", __func__, err); ret = err; } + err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_EBASE, &env->CP0_EBase); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_EBASE (%d)\n", __func__, err); + ret = err; + } err = kvm_mips_change_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG, &env->CP0_Config0, KVM_REG_MIPS_CP0_CONFIG_MASK); @@ -841,12 +918,61 @@ static int kvm_mips_put_cp0_registers(CPUState *cs, int level) DPRINTF("%s: Failed to change CP0_CONFIG5 (%d)\n", __func__, err); ret = err; } + err = kvm_mips_change_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG6, + &env->CP0_Config6, + KVM_REG_MIPS_CP0_CONFIG6_MASK); + if (err < 0) { + DPRINTF("%s: Failed to change CP0_CONFIG6 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_XCONTEXT, + &env->CP0_XContext); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_XCONTEXT (%d)\n", __func__, err); + ret = err; + } err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_ERROREPC, &env->CP0_ErrorEPC); if (err < 0) { DPRINTF("%s: Failed to put CP0_ERROREPC (%d)\n", __func__, err); ret = err; } + err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH1, + &env->CP0_KScratch[0]); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_KSCRATCH1 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH2, + &env->CP0_KScratch[1]); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_KSCRATCH2 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH3, + &env->CP0_KScratch[2]); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_KSCRATCH3 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH4, + &env->CP0_KScratch[3]); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_KSCRATCH4 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH5, + &env->CP0_KScratch[4]); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_KSCRATCH5 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH6, + &env->CP0_KScratch[5]); + if (err < 0) { + DPRINTF("%s: Failed to put CP0_KSCRATCH6 (%d)\n", __func__, err); + ret = err; + } return ret; } @@ -862,6 +988,11 @@ static int kvm_mips_get_cp0_registers(CPUState *cs) DPRINTF("%s: Failed to get CP0_INDEX (%d)\n", __func__, err); ret = err; } + err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_RANDOM, &env->CP0_Random); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_RANDOM (%d)\n", __func__, err); + ret = err; + } err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_CONTEXT, &env->CP0_Context); if (err < 0) { @@ -880,11 +1011,40 @@ static int kvm_mips_get_cp0_registers(CPUState *cs) DPRINTF("%s: Failed to get CP0_PAGEMASK (%d)\n", __func__, err); ret = err; } + err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_PAGEGRAIN, + &env->CP0_PageGrain); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_PAGEGRAIN (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_PWBASE, + &env->CP0_PWBase); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_PWBASE (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_PWFIELD, + &env->CP0_PWField); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_PWFIELD (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_PWSIZE, + &env->CP0_PWSize); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_PWSIZE (%d)\n", __func__, err); + ret = err; + } err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_WIRED, &env->CP0_Wired); if (err < 0) { DPRINTF("%s: Failed to get CP0_WIRED (%d)\n", __func__, err); ret = err; } + err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_PWCTL, &env->CP0_PWCtl); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_PWCtl (%d)\n", __func__, err); + ret = err; + } err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_HWRENA, &env->CP0_HWREna); if (err < 0) { DPRINTF("%s: Failed to get CP0_HWRENA (%d)\n", __func__, err); @@ -932,6 +1092,11 @@ static int kvm_mips_get_cp0_registers(CPUState *cs) DPRINTF("%s: Failed to get CP0_PRID (%d)\n", __func__, err); ret = err; } + err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_EBASE, &env->CP0_EBase); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_EBASE (%d)\n", __func__, err); + ret = err; + } err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG, &env->CP0_Config0); if (err < 0) { DPRINTF("%s: Failed to get CP0_CONFIG (%d)\n", __func__, err); @@ -962,12 +1127,59 @@ static int kvm_mips_get_cp0_registers(CPUState *cs) DPRINTF("%s: Failed to get CP0_CONFIG5 (%d)\n", __func__, err); ret = err; } + err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG6, &env->CP0_Config6); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_CONFIG6 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_XCONTEXT, + &env->CP0_XContext); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_XCONTEXT (%d)\n", __func__, err); + ret = err; + } err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_ERROREPC, &env->CP0_ErrorEPC); if (err < 0) { DPRINTF("%s: Failed to get CP0_ERROREPC (%d)\n", __func__, err); ret = err; } + err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH1, + &env->CP0_KScratch[0]); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_KSCRATCH1 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH2, + &env->CP0_KScratch[1]); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_KSCRATCH2 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH3, + &env->CP0_KScratch[2]); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_KSCRATCH3 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH4, + &env->CP0_KScratch[3]); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_KSCRATCH4 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH5, + &env->CP0_KScratch[4]); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_KSCRATCH5 (%d)\n", __func__, err); + ret = err; + } + err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH6, + &env->CP0_KScratch[5]); + if (err < 0) { + DPRINTF("%s: Failed to get CP0_KSCRATCH6 (%d)\n", __func__, err); + ret = err; + } return ret; } diff --git a/target/mips/machine.c b/target/mips/machine.c index 8d5b18b..a84aefc 100644 --- a/target/mips/machine.c +++ b/target/mips/machine.c @@ -289,6 +289,8 @@ const VMStateDescription vmstate_mips_cpu = { VMSTATE_INT32(env.CP0_Config1, MIPSCPU), VMSTATE_INT32(env.CP0_Config2, MIPSCPU), VMSTATE_INT32(env.CP0_Config3, MIPSCPU), + VMSTATE_INT32(env.CP0_Config4, MIPSCPU), + VMSTATE_INT32(env.CP0_Config5, MIPSCPU), VMSTATE_INT32(env.CP0_Config6, MIPSCPU), VMSTATE_INT32(env.CP0_Config7, MIPSCPU), VMSTATE_UINT64(env.CP0_LLAddr, MIPSCPU), From patchwork Mon Apr 27 09:33:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: chen huacai X-Patchwork-Id: 283906 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.3 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 594A0C54FD0 for ; Mon, 27 Apr 2020 09:38:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1F22620661 for ; Mon, 27 Apr 2020 09:38:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="vAM+7KXP" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1F22620661 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:34702 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jT0E4-0006NH-8b for qemu-devel@archiver.kernel.org; Mon, 27 Apr 2020 05:38:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34568) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jT0Cy-0004ZN-1V for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:37:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.90_1) (envelope-from ) id 1jT0Cv-0008Fy-KL for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:37:47 -0400 Received: from mail-pj1-x1041.google.com ([2607:f8b0:4864:20::1041]:52707) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jT0Cv-0008Fb-86 for qemu-devel@nongnu.org; Mon, 27 Apr 2020 05:37:45 -0400 Received: by mail-pj1-x1041.google.com with SMTP id a5so7304635pjh.2 for ; Mon, 27 Apr 2020 02:37:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=c10wxb4q0J6s5D/OfWrl3l7rc/a1C7ATc/5TPzmK3e8=; b=vAM+7KXPT3SW79VWhTQ4Jwy5eyloWML726rsxvHtp5aOz+BFNWYIolpvwEHp0tAS1w EM2O6kaal9QwpfNQw6uAGygn2liSsZa2lLcXWePx2mna58G7aSWl1yHiYw7f62Ill5l+ EsAhfpD2ztd26ehDXBk0o8YO2CLUaan3n4TK2Imr/aSf9Oa8M714H119b4Kn4zYkz/3Q g5UW6LkINeYgUEfTs9vdE7nXD07gG4g1gC8DyGyd+wVxuNernno0zkhte0KvhA6s2uju uxYK+7Hv8spaDHmRxjXmPjDtyqOGxM4rED7epZyj7kY49+LWaJAJM/xO3a+meYbxc835 L9Cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=c10wxb4q0J6s5D/OfWrl3l7rc/a1C7ATc/5TPzmK3e8=; b=fArOmMiBstb/FN+neJQyd6uBCJy8OQE5H8M447SleMrxtFKHsQnoZt92B1TbR98AY+ qenYB1/zmGa2yKVKGymU/8ZAKj1Z1IyPbC2zQqV2TLK6k1CvmPBBHI/yo4wbcLzESERF 9/Bx2Dw7rBpQyvp+jq7zn+jVWvOriXqe6he1reA9oy5DS6T/Xgpus5aGjAOzyaI2ZKkO e4PW81pyaqROUfQh4CpWU5wZSoTAl7L/ucyi8/wUa89XbpHIyEQU/sANNV6qt7553Eso vLb8DyaFaPjLG/canJUUGc6TTPo2AuC5g8CV6GGm7F0K6a8AH39KmOLbNkwd5QzrJdaD ZaFw== X-Gm-Message-State: AGi0PuZxcSJk8tGq8DDVaoR9qsKWALOo9ChtThlhpJ5Re3YQT/RxUduc Tj1Gk2/PL0aDq9qFtrwTav4= X-Google-Smtp-Source: APiQypJBw9+z+Yk8E7CLQmNtWjvsg5EYLPippm1ZNPj/nSLUbUfc5bRXGacA3yXq7ZH4ktg97B+PBg== X-Received: by 2002:a17:90a:aa0e:: with SMTP id k14mr15492021pjq.74.1587980263918; Mon, 27 Apr 2020 02:37:43 -0700 (PDT) Received: from software.domain.org (28.144.92.34.bc.googleusercontent.com. [34.92.144.28]) by smtp.gmail.com with ESMTPSA id u9sm11333073pfn.197.2020.04.27.02.37.41 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Apr 2020 02:37:43 -0700 (PDT) From: Huacai Chen X-Google-Original-From: Huacai Chen To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Markovic Subject: [PATCH for-5.1 7/7] MAINTAINERS: Add myself as Loongson-3 maintainer Date: Mon, 27 Apr 2020 17:33:15 +0800 Message-Id: <1587979995-17717-7-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1587979995-17717-1-git-send-email-chenhc@lemote.com> References: <1587979995-17717-1-git-send-email-chenhc@lemote.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::1041; envelope-from=zltjiangshi@gmail.com; helo=mail-pj1-x1041.google.com X-detected-operating-system: by eggs.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2607:f8b0:4864:20::1041 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , Huacai Chen , qemu-devel@nongnu.org, Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Huacai Chen Co-developed-by: Jiaxun Yang --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index aa9a057..efe840b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1080,6 +1080,12 @@ F: hw/isa/vt82c686.c F: hw/pci-host/bonito.c F: include/hw/isa/vt82c686.h +Loongson-3 +M: Huacai Chen +S: Maintained +F: hw/mips/mips_loongson3.c +F: hw/pci-host/ls7a.c + Boston M: Paul Burton R: Aleksandar Rikalo