From patchwork Mon Nov 13 14:45:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118785 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1878789qgn; Mon, 13 Nov 2017 06:46:23 -0800 (PST) X-Google-Smtp-Source: AGs4zMapNWlCYEsuvSbv5Z4Yh2PrOSQQok975HkzN3xLQahK3NMrF9Uk3IzqShmo57QmdCDZczun X-Received: by 10.101.80.132 with SMTP id r4mr8735383pgp.428.1510584383606; Mon, 13 Nov 2017 06:46:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584383; cv=none; d=google.com; s=arc-20160816; b=bn0k9yM77Ip1v0h392oUZ598sn5aBB6X26j5l9Kgl+JzHTjfIqsgS5/wxNr2CiJFop JLI/oaSpWznsXffbdaHWmifzpYasRetKHUDkgs4L7FO9LZlli2CTW28ZOPWFeN4k/2SE Nf1yxQaFb4+UNdGlGfEQigGCfs3yLSqA5WHNcc11p/EjTkc7UdD+0wDoKOQmVyXgP30i zP3ERYKOOEx4jCpdefyn0O8rNCnveZGJOdt/WK+nGRj8rCokKmXKK8ppk6SfKqxUGPPx ySUGeR7pnYhBjhuCPzMrfI8qA62p7AENtluFO60Vbyg9otcE6/MtIP5/0UxM8j1Mf61/ pMTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=NeF79NWXYsmi9UqnyH6ZhIsXWNpaxTfOLnDUzQLrWb0=; b=RmMtQfvWCiPpG/ESp4O0Gev1vQ8woObgRxlqIqykhWa4KhWTJsvtRreBR2naJbOArt G6way5Zu1Cyk1zkyw73ogPkcUkM+kJ7pW7SQhCI38MzaJyfStkYIfOKuVTOl9uJg3JS8 y+Yzi8+7L2X4PyHXwnP51MZu16Od/NdrqR74oclsq6JIj3y4zWu0b/1RLo5HLmEwdEgj OpVPmy2IbYG7RJXpnFnz3dvT77FkO3IJQ8UMy/CMYuvtxfVHPTGI8n5JSe+EKJYoNc1G ok42SXu1/QVXYvxVXR3sp07WSlbL+QjtINaXR1ZhQASz223Q63puY+ugp7ZW0tEqgwie Dxzg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p21si2457192pfi.396.2017.11.13.06.46.23; Mon, 13 Nov 2017 06:46:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752924AbdKMOqW (ORCPT + 27 others); Mon, 13 Nov 2017 09:46:22 -0500 Received: from foss.arm.com ([217.140.101.70]:47246 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752831AbdKMOqS (ORCPT ); Mon, 13 Nov 2017 09:46:18 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 41FE31435; Mon, 13 Nov 2017 06:46:18 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9F7913F318; Mon, 13 Nov 2017 06:46:16 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/24] staging: ccree: fix typos Date: Mon, 13 Nov 2017 14:45:29 +0000 Message-Id: <1510584358-29473-2-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fix a bunch of comment typos. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_hash.c | 2 +- drivers/staging/ccree/ssi_hash.h | 2 +- drivers/staging/ccree/ssi_ivgen.c | 2 +- drivers/staging/ccree/ssi_request_mgr.c | 2 +- drivers/staging/ccree/ssi_request_mgr.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 472d3b7..6687027 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -2484,7 +2484,7 @@ static void ssi_hash_create_data_desc(struct ahash_req_ctx *areq_ctx, * \param drvdata * \param mode The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256 * - * \return u32 The address of the inital digest in SRAM + * \return u32 The address of the initial digest in SRAM */ ssi_sram_addr_t ssi_ahash_get_larval_digest_sram_addr(void *drvdata, u32 mode) { diff --git a/drivers/staging/ccree/ssi_hash.h b/drivers/staging/ccree/ssi_hash.h index 2400e38..c884727 100644 --- a/drivers/staging/ccree/ssi_hash.h +++ b/drivers/staging/ccree/ssi_hash.h @@ -95,7 +95,7 @@ ssi_ahash_get_initial_digest_len_sram_addr(void *drvdata, u32 mode); * \param drvdata * \param mode The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256/SHA384/SHA512 * - * \return u32 The address of the inital digest in SRAM + * \return u32 The address of the initial digest in SRAM */ ssi_sram_addr_t ssi_ahash_get_larval_digest_sram_addr(void *drvdata, u32 mode); diff --git a/drivers/staging/ccree/ssi_ivgen.c b/drivers/staging/ccree/ssi_ivgen.c index a33fd76..2f9201e 100644 --- a/drivers/staging/ccree/ssi_ivgen.c +++ b/drivers/staging/ccree/ssi_ivgen.c @@ -198,7 +198,7 @@ int ssi_ivgen_init(struct ssi_drvdata *drvdata) ivgen_ctx = drvdata->ivgen_handle; - /* Allocate pool's header for intial enc. key/IV */ + /* Allocate pool's header for initial enc. key/IV */ ivgen_ctx->pool_meta = dma_alloc_coherent(device, SSI_IVPOOL_META_SIZE, &ivgen_ctx->pool_meta_dma, GFP_KERNEL); diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index e9a09b3..597a71f 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -205,7 +205,7 @@ static inline int request_mgr_queues_status_check( struct device *dev = drvdata_to_dev(drvdata); /* SW queue is checked only once as it will not - * be chaned during the poll becasue the spinlock_bh + * be chaned during the poll because the spinlock_bh * is held by the thread */ if (unlikely(((req_mgr_h->req_queue_head + 1) & diff --git a/drivers/staging/ccree/ssi_request_mgr.h b/drivers/staging/ccree/ssi_request_mgr.h index ba44ab4..23883e2 100644 --- a/drivers/staging/ccree/ssi_request_mgr.h +++ b/drivers/staging/ccree/ssi_request_mgr.h @@ -36,7 +36,7 @@ int request_mgr_init(struct ssi_drvdata *drvdata); * If "false": this function adds a dummy descriptor completion * and waits upon completion signal. * - * \return int Returns -EINPROGRESS if "is_dout=ture"; "0" if "is_dout=false" + * \return int Returns -EINPROGRESS if "is_dout=true"; "0" if "is_dout=false" */ int send_request( struct ssi_drvdata *drvdata, struct ssi_crypto_req *ssi_req, From patchwork Mon Nov 13 14:45:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118786 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1878898qgn; Mon, 13 Nov 2017 06:46:29 -0800 (PST) X-Google-Smtp-Source: AGs4zMawXL/Zr4GwrNtsWoTDYbfQHdBmRtHyMk6sNQx2Pkgr2DcdgxioCh8HZG0KlPySqekl4srR X-Received: by 10.101.67.66 with SMTP id k2mr8740935pgq.20.1510584389817; Mon, 13 Nov 2017 06:46:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584389; cv=none; d=google.com; s=arc-20160816; b=q6mOvGOGDwB9qKi/q+gftN5mcaSuOCPhVUhnJQp7B4QpGKAH6dn+atZzXEx7qBviWP 2+BROslU0QuyKU9xWXj6rsy9YYSzv+ruxe+0/YmSOnnbqGisy2yDjzoUcti5UdT9ec3o RiR2CkqYmH8uAIBgV6CuyX/u+gbXJcJYb3HK2VOD0Fff6gxG0qXL5JPfRy243P22xlGW p4n8Y8z8pPzUD7wOH42qTVjNhJJSxP4DFK2JRSjlEk59aZb2NTCkc7eQteUCTOzdxJTJ FI2fdTv7Y9u7g93ZExU1nBrdlNweRmh+9KZ34RQdJTn8X4LrVnzZD3bWznQdECcN5Otp fv0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=jRQr5W158zycxxPjn0bSg3hgykDsBY6d+Zjc8myrDWU=; b=Atfys1a+VxhrBSK7ABYP4kl8o8D0RnF9gQ662lZk59bIiyoNeYPbaiDHUJ6UJH36VV ExnZT8GwWpG9dqaT6xySNwtrqGLQ5/q5rCSbjWENPcuZvcZgA/q8r1AzlJ4YwzGCEAXA m3N69G0nS+F2TmBi/nIK8vF8n2j+LK4yHZveJLvTVsmYsnhNiC/BUOLGVGxTBsAFjGiq 08obFr4NknOa4Xe+dDrfVzNBZ0uuvwyrX28dW6pmbVrfcDlzPoXwHWf8ARJRsKdFyA+M yVKHsNd6NNm7wAw3f/uRulwIzgH+eyjGpJZnE3ymSzYroUK5xvuNZvtH+mxd8cnk9H39 zceA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x66si15526931pfa.129.2017.11.13.06.46.29; Mon, 13 Nov 2017 06:46:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752987AbdKMOq1 (ORCPT + 27 others); Mon, 13 Nov 2017 09:46:27 -0500 Received: from foss.arm.com ([217.140.101.70]:47254 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752928AbdKMOqZ (ORCPT ); Mon, 13 Nov 2017 09:46:25 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 53E0F1435; Mon, 13 Nov 2017 06:46:25 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B08AD3F318; Mon, 13 Nov 2017 06:46:23 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/24] staging: ccree: alloc by instance not type Date: Mon, 13 Nov 2017 14:45:30 +0000 Message-Id: <1510584358-29473-3-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Allocation by instance is preferred to allocation by type. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_sram_mgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_sram_mgr.c b/drivers/staging/ccree/ssi_sram_mgr.c index 2263433..b71460c 100644 --- a/drivers/staging/ccree/ssi_sram_mgr.c +++ b/drivers/staging/ccree/ssi_sram_mgr.c @@ -51,7 +51,7 @@ void ssi_sram_mgr_fini(struct ssi_drvdata *drvdata) int ssi_sram_mgr_init(struct ssi_drvdata *drvdata) { /* Allocate "this" context */ - drvdata->sram_mgr_handle = kzalloc(sizeof(struct ssi_sram_mgr_ctx), + drvdata->sram_mgr_handle = kzalloc(sizeof(*drvdata->sram_mgr_handle), GFP_KERNEL); if (!drvdata->sram_mgr_handle) From patchwork Mon Nov 13 14:45:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118787 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1879026qgn; Mon, 13 Nov 2017 06:46:36 -0800 (PST) X-Google-Smtp-Source: AGs4zMYqCynqBwiY6ea7tUudn35CYp/cuk6YtNrBITKyjCOvHa1pPpfuoEsid5IYkABK108QA4Rj X-Received: by 10.101.80.3 with SMTP id f3mr9032368pgo.109.1510584396443; Mon, 13 Nov 2017 06:46:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584396; cv=none; d=google.com; s=arc-20160816; b=T9GM1zpNI2PDkVJHSrC4RoVGIPUkk1fjC1Dq4+fYEj8w2A7Ms9seb/ufWq5+pXQ50w Ab+l5a3JO5Sf5Gb8jCaQCzO3huZU0CNSewkVotMZ6gyhXDwRSwBaRYC1PMqHTH+6UqUu kJIMRtkGQr2UbiCSWZn5th2MMvwtW9TGZt8VcJpPYKg3NOin08BV5KXw4fWyFl1XVYKs DM0PuhM/nKxGFKAYMQO8ht/s/zQdAJeizSaDNBxPL4Bmj6k9/pc6RLq5/djkcikzxZgm J/R+CMxZozN0XnZ39L0ampbEkY+F4WyS06ExAUxbGO4qppbMMCjE8+Kezov+V/k4dbLo 9i0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=1REu6EJwDOTBMCrno+xtLcmPoK2lJlVJwMV3apVIy1A=; b=FDT6YAtcs8FrIdFOqwHr+7/eLfO/Ojgp2ofxxoaLBN4hvXTWFsiQaYnKHfvz+UJJJl nYJssIQMi4oBDSfku2Mq/bhHe3pFqgIj/tx8N6UN0viJyxE96WpkS3F/7dsO7tZLUYdT JEvujRhvueooxNfOCsdkU4uBuNpNVTtS68ULRlPB3kcMsGft+g3sYfOHiyPTOH8a6Lgs yVTjBDZyQvsD+LA7jPg4HJ5kecXG7rcWNUJonMz40L3sonHLxFNc/oe1QWr3Ob0B3yK2 CqAhjGuhS7LdwHm7j1SZlKU2wv88uY3RRRY1h30RO/khxtDe/j8ozDj4M2EfNyqFralV b1dA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m1si14246475pld.579.2017.11.13.06.46.36; Mon, 13 Nov 2017 06:46:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753048AbdKMOqe (ORCPT + 27 others); Mon, 13 Nov 2017 09:46:34 -0500 Received: from foss.arm.com ([217.140.101.70]:47266 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752998AbdKMOqb (ORCPT ); Mon, 13 Nov 2017 09:46:31 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 76B501435; Mon, 13 Nov 2017 06:46:31 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CF3113F318; Mon, 13 Nov 2017 06:46:29 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 03/24] staging: ccree: remove unnecessary parentheses Date: Mon, 13 Nov 2017 14:45:31 +0000 Message-Id: <1510584358-29473-4-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove unnecessary parentheses in if statements across the driver. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_aead.c | 36 +++++++++++++++++----------------- drivers/staging/ccree/ssi_buffer_mgr.c | 28 +++++++++++++------------- drivers/staging/ccree/ssi_cipher.c | 34 ++++++++++++++++---------------- drivers/staging/ccree/ssi_hash.c | 16 +++++++-------- drivers/staging/ccree/ssi_ivgen.c | 4 ++-- 5 files changed, 59 insertions(+), 59 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c index 9e24783..7abc352 100644 --- a/drivers/staging/ccree/ssi_aead.c +++ b/drivers/staging/ccree/ssi_aead.c @@ -391,9 +391,9 @@ static int validate_keys_sizes(struct ssi_aead_ctx *ctx) case DRV_HASH_SHA256: break; case DRV_HASH_XCBC_MAC: - if ((ctx->auth_keylen != AES_KEYSIZE_128) && - (ctx->auth_keylen != AES_KEYSIZE_192) && - (ctx->auth_keylen != AES_KEYSIZE_256)) + if (ctx->auth_keylen != AES_KEYSIZE_128 && + ctx->auth_keylen != AES_KEYSIZE_192 && + ctx->auth_keylen != AES_KEYSIZE_256) return -ENOTSUPP; break; case DRV_HASH_NULL: /* Not authenc (e.g., CCM) - no auth_key) */ @@ -412,9 +412,9 @@ static int validate_keys_sizes(struct ssi_aead_ctx *ctx) return -EINVAL; } } else { /* Default assumed to be AES ciphers */ - if ((ctx->enc_keylen != AES_KEYSIZE_128) && - (ctx->enc_keylen != AES_KEYSIZE_192) && - (ctx->enc_keylen != AES_KEYSIZE_256)) { + if (ctx->enc_keylen != AES_KEYSIZE_128 && + ctx->enc_keylen != AES_KEYSIZE_192 && + ctx->enc_keylen != AES_KEYSIZE_256) { dev_err(dev, "Invalid cipher(AES) key size: %u\n", ctx->enc_keylen); return -EINVAL; @@ -676,8 +676,8 @@ static int ssi_aead_setauthsize( struct device *dev = drvdata_to_dev(ctx->drvdata); /* Unsupported auth. sizes */ - if ((authsize == 0) || - (authsize > crypto_aead_maxauthsize(authenc))) { + if (authsize == 0 || + authsize > crypto_aead_maxauthsize(authenc)) { return -ENOTSUPP; } @@ -744,8 +744,8 @@ ssi_aead_create_assoc_desc( set_din_type(&desc[idx], DMA_DLLI, sg_dma_address(areq->src), areq->assoclen, NS_BIT); set_flow_mode(&desc[idx], flow_mode); - if ((ctx->auth_mode == DRV_HASH_XCBC_MAC) && - (areq_ctx->cryptlen > 0)) + if (ctx->auth_mode == DRV_HASH_XCBC_MAC && + areq_ctx->cryptlen > 0) set_din_not_last_indication(&desc[idx]); break; case SSI_DMA_BUF_MLLI: @@ -754,8 +754,8 @@ ssi_aead_create_assoc_desc( set_din_type(&desc[idx], DMA_MLLI, areq_ctx->assoc.sram_addr, areq_ctx->assoc.mlli_nents, NS_BIT); set_flow_mode(&desc[idx], flow_mode); - if ((ctx->auth_mode == DRV_HASH_XCBC_MAC) && - (areq_ctx->cryptlen > 0)) + if (ctx->auth_mode == DRV_HASH_XCBC_MAC && + areq_ctx->cryptlen > 0) set_din_not_last_indication(&desc[idx]); break; case SSI_DMA_BUF_NULL: @@ -1192,8 +1192,8 @@ static inline void ssi_aead_load_mlli_to_sram( struct device *dev = drvdata_to_dev(ctx->drvdata); if (unlikely( - (req_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) || - (req_ctx->data_buff_type == SSI_DMA_BUF_MLLI) || + req_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI || + req_ctx->data_buff_type == SSI_DMA_BUF_MLLI || !req_ctx->is_single_pass)) { dev_dbg(dev, "Copy-to-sram: mlli_dma=%08x, mlli_size=%u\n", (unsigned int)ctx->drvdata->mlli_sram_addr, @@ -1350,15 +1350,15 @@ static int validate_data_size(struct ssi_aead_ctx *ctx, unsigned int cipherlen = (direct == DRV_CRYPTO_DIRECTION_DECRYPT) ? (req->cryptlen - ctx->authsize) : req->cryptlen; - if (unlikely((direct == DRV_CRYPTO_DIRECTION_DECRYPT) && - (req->cryptlen < ctx->authsize))) + if (unlikely(direct == DRV_CRYPTO_DIRECTION_DECRYPT && + req->cryptlen < ctx->authsize)) goto data_size_err; areq_ctx->is_single_pass = true; /*defaulted to fast flow*/ switch (ctx->flow_mode) { case S_DIN_to_AES: - if (unlikely((ctx->cipher_mode == DRV_CIPHER_CBC) && + if (unlikely(ctx->cipher_mode == DRV_CIPHER_CBC && !IS_ALIGNED(cipherlen, AES_BLOCK_SIZE))) goto data_size_err; if (ctx->cipher_mode == DRV_CIPHER_CCM) @@ -1372,7 +1372,7 @@ static int validate_data_size(struct ssi_aead_ctx *ctx, if (!IS_ALIGNED(assoclen, sizeof(u32))) areq_ctx->is_single_pass = false; - if ((ctx->cipher_mode == DRV_CIPHER_CTR) && + if (ctx->cipher_mode == DRV_CIPHER_CTR && !IS_ALIGNED(cipherlen, sizeof(u32))) areq_ctx->is_single_pass = false; diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index bfabb5b..923a0df 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -576,7 +576,7 @@ int cc_map_blkcipher_request( if (mapped_nents > 1) req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI; - if (unlikely((req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI))) { + if (unlikely(req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI)) { cc_add_sg_entry(dev, &sg_data, req_ctx->in_nents, src, nbytes, 0, true, &req_ctx->in_mlli_nents); @@ -689,7 +689,7 @@ void cc_unmap_aead_request(struct device *dev, struct aead_request *req) DMA_BIDIRECTIONAL); } if (drvdata->coherent && - (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) && + areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT && likely(req->src == req->dst)) { /* copy back mac from temporary location to deal with possible @@ -864,13 +864,13 @@ static inline int cc_aead_chain_assoc( } if (likely(mapped_nents == 1) && - (areq_ctx->ccm_hdr_size == ccm_header_size_null)) + areq_ctx->ccm_hdr_size == ccm_header_size_null) areq_ctx->assoc_buff_type = SSI_DMA_BUF_DLLI; else areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI; if (unlikely((do_chain) || - (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI))) { + areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI)) { dev_dbg(dev, "Chain assoc: buff_type=%s nents=%u\n", GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type), areq_ctx->assoc.nents); @@ -1155,8 +1155,8 @@ static inline int cc_aead_chain_data( } areq_ctx->dst.nents = dst_mapped_nents; areq_ctx->dst_offset = offset; - if ((src_mapped_nents > 1) || - (dst_mapped_nents > 1) || + if (src_mapped_nents > 1 || + dst_mapped_nents > 1 || do_chain) { areq_ctx->data_buff_type = SSI_DMA_BUF_MLLI; rc = cc_prepare_aead_data_mlli(drvdata, req, sg_data, @@ -1247,7 +1247,7 @@ int cc_map_aead_request( * data memory overriding that caused by cache coherence problem. */ if (drvdata->coherent && - (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) && + areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT && likely(req->src == req->dst)) cc_copy_mac(dev, req, SSI_SG_TO_BUF); @@ -1408,8 +1408,8 @@ int cc_map_aead_request( /* Mlli support -start building the MLLI according to the above results */ if (unlikely( - (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) || - (areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI))) { + areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI || + areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI)) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; rc = cc_generate_mlli(dev, &sg_data, mlli_params); if (unlikely(rc)) @@ -1466,15 +1466,15 @@ int cc_map_hash_request_final(struct ssi_drvdata *drvdata, void *ctx, } } - if (src && (nbytes > 0) && do_update) { + if (src && nbytes > 0 && do_update) { if (unlikely(cc_map_sg(dev, src, nbytes, DMA_TO_DEVICE, &areq_ctx->in_nents, LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy, &mapped_nents))) { goto unmap_curr_buff; } - if (src && (mapped_nents == 1) - && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL)) { + if (src && mapped_nents == 1 + && areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) { memcpy(areq_ctx->buff_sg, src, sizeof(struct scatterlist)); areq_ctx->buff_sg->length = nbytes; @@ -1590,8 +1590,8 @@ int cc_map_hash_request_update(struct ssi_drvdata *drvdata, void *ctx, &mapped_nents))) { goto unmap_curr_buff; } - if ((mapped_nents == 1) - && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL)) { + if (mapped_nents == 1 + && areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) { /* only one entry in the SG and no previous data */ memcpy(areq_ctx->buff_sg, src, sizeof(struct scatterlist)); diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c index b5bb97c..957138a 100644 --- a/drivers/staging/ccree/ssi_cipher.c +++ b/drivers/staging/ccree/ssi_cipher.c @@ -76,18 +76,18 @@ static int validate_keys_sizes(struct ssi_ablkcipher_ctx *ctx_p, u32 size) switch (size) { case CC_AES_128_BIT_KEY_SIZE: case CC_AES_192_BIT_KEY_SIZE: - if (likely((ctx_p->cipher_mode != DRV_CIPHER_XTS) && - (ctx_p->cipher_mode != DRV_CIPHER_ESSIV) && - (ctx_p->cipher_mode != DRV_CIPHER_BITLOCKER))) + if (likely(ctx_p->cipher_mode != DRV_CIPHER_XTS && + ctx_p->cipher_mode != DRV_CIPHER_ESSIV && + ctx_p->cipher_mode != DRV_CIPHER_BITLOCKER)) return 0; break; case CC_AES_256_BIT_KEY_SIZE: return 0; case (CC_AES_192_BIT_KEY_SIZE * 2): case (CC_AES_256_BIT_KEY_SIZE * 2): - if (likely((ctx_p->cipher_mode == DRV_CIPHER_XTS) || - (ctx_p->cipher_mode == DRV_CIPHER_ESSIV) || - (ctx_p->cipher_mode == DRV_CIPHER_BITLOCKER))) + if (likely(ctx_p->cipher_mode == DRV_CIPHER_XTS || + ctx_p->cipher_mode == DRV_CIPHER_ESSIV || + ctx_p->cipher_mode == DRV_CIPHER_BITLOCKER)) return 0; break; default: @@ -115,8 +115,8 @@ static int validate_data_size(struct ssi_ablkcipher_ctx *ctx_p, unsigned int siz case S_DIN_to_AES: switch (ctx_p->cipher_mode) { case DRV_CIPHER_XTS: - if ((size >= SSI_MIN_AES_XTS_SIZE) && - (size <= SSI_MAX_AES_XTS_SIZE) && + if (size >= SSI_MIN_AES_XTS_SIZE && + size <= SSI_MAX_AES_XTS_SIZE && IS_ALIGNED(size, AES_BLOCK_SIZE)) return 0; break; @@ -333,9 +333,9 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, return -EINVAL; } - if ((ctx_p->cipher_mode == DRV_CIPHER_XTS) || - (ctx_p->cipher_mode == DRV_CIPHER_ESSIV) || - (ctx_p->cipher_mode == DRV_CIPHER_BITLOCKER)) { + if (ctx_p->cipher_mode == DRV_CIPHER_XTS || + ctx_p->cipher_mode == DRV_CIPHER_ESSIV || + ctx_p->cipher_mode == DRV_CIPHER_BITLOCKER) { if (unlikely(hki->hw_key1 == hki->hw_key2)) { dev_err(dev, "Illegal hw key numbers (%d,%d)\n", hki->hw_key1, hki->hw_key2); @@ -364,13 +364,13 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, return -EINVAL; } } - if ((ctx_p->cipher_mode == DRV_CIPHER_XTS) && + if (ctx_p->cipher_mode == DRV_CIPHER_XTS && xts_check_key(tfm, key, keylen)) { dev_dbg(dev, "weak XTS key"); return -EINVAL; } - if ((ctx_p->flow_mode == S_DIN_to_DES) && - (keylen == DES3_EDE_KEY_SIZE) && + if (ctx_p->flow_mode == S_DIN_to_DES && + keylen == DES3_EDE_KEY_SIZE && ssi_verify_3des_keys(key, keylen)) { dev_dbg(dev, "weak 3DES key"); return -EINVAL; @@ -456,8 +456,8 @@ ssi_blkcipher_create_setup_desc( set_cipher_config0(&desc[*seq_size], direction); set_flow_mode(&desc[*seq_size], flow_mode); set_cipher_mode(&desc[*seq_size], cipher_mode); - if ((cipher_mode == DRV_CIPHER_CTR) || - (cipher_mode == DRV_CIPHER_OFB)) { + if (cipher_mode == DRV_CIPHER_CTR || + cipher_mode == DRV_CIPHER_OFB) { set_setup_mode(&desc[*seq_size], SETUP_LOAD_STATE1); } else { set_setup_mode(&desc[*seq_size], SETUP_LOAD_STATE0); @@ -765,7 +765,7 @@ static int ssi_blkcipher_process( memcpy(req_ctx->iv, info, ivsize); /*For CTS in case of data size aligned to 16 use CBC mode*/ - if (((nbytes % AES_BLOCK_SIZE) == 0) && (ctx_p->cipher_mode == DRV_CIPHER_CBC_CTS)) { + if (((nbytes % AES_BLOCK_SIZE) == 0) && ctx_p->cipher_mode == DRV_CIPHER_CBC_CTS) { ctx_p->cipher_mode = DRV_CIPHER_CBC; cts_restore_flag = 1; } diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 6687027..1fda84d 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -116,9 +116,9 @@ static void ssi_hash_create_data_desc( static inline void ssi_set_hash_endianity(u32 mode, struct cc_hw_desc *desc) { - if (unlikely((mode == DRV_HASH_MD5) || - (mode == DRV_HASH_SHA384) || - (mode == DRV_HASH_SHA512))) { + if (unlikely(mode == DRV_HASH_MD5 || + mode == DRV_HASH_SHA384 || + mode == DRV_HASH_SHA512)) { set_bytes_swap(desc, 1); } else { set_cipher_config0(desc, HASH_DIGEST_RESULT_LITTLE_ENDIAN); @@ -204,12 +204,12 @@ static int ssi_hash_map_request(struct device *dev, if (is_hmac) { dma_sync_single_for_cpu(dev, ctx->digest_buff_dma_addr, ctx->inter_digestsize, DMA_BIDIRECTIONAL); - if ((ctx->hw_mode == DRV_CIPHER_XCBC_MAC) || (ctx->hw_mode == DRV_CIPHER_CMAC)) { + if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC || ctx->hw_mode == DRV_CIPHER_CMAC) { memset(state->digest_buff, 0, ctx->inter_digestsize); } else { /*sha*/ memcpy(state->digest_buff, ctx->digest_buff, ctx->inter_digestsize); #if (DX_DEV_SHA_MAX > 256) - if (unlikely((ctx->hash_mode == DRV_HASH_SHA512) || (ctx->hash_mode == DRV_HASH_SHA384))) + if (unlikely(ctx->hash_mode == DRV_HASH_SHA512 || ctx->hash_mode == DRV_HASH_SHA384)) memcpy(state->digest_bytes_len, digest_len_sha512_init, HASH_LEN_SIZE); else memcpy(state->digest_bytes_len, digest_len_init, HASH_LEN_SIZE); @@ -1460,7 +1460,7 @@ static int ssi_mac_final(struct ahash_request *req) ssi_req.user_cb = (void *)ssi_hash_complete; ssi_req.user_arg = (void *)req; - if (state->xcbc_count && (rem_cnt == 0)) { + if (state->xcbc_count && rem_cnt == 0) { /* Load key for ECB decryption */ hw_desc_init(&desc[idx]); set_cipher_mode(&desc[idx], DRV_CIPHER_ECB); @@ -2288,8 +2288,8 @@ int ssi_hash_alloc(struct ssi_drvdata *drvdata) &hash_handle->hash_list); } - if ((hw_mode == DRV_CIPHER_XCBC_MAC) || - (hw_mode == DRV_CIPHER_CMAC)) + if (hw_mode == DRV_CIPHER_XCBC_MAC || + hw_mode == DRV_CIPHER_CMAC) continue; /* register hash version */ diff --git a/drivers/staging/ccree/ssi_ivgen.c b/drivers/staging/ccree/ssi_ivgen.c index 2f9201e..7171796 100644 --- a/drivers/staging/ccree/ssi_ivgen.c +++ b/drivers/staging/ccree/ssi_ivgen.c @@ -248,8 +248,8 @@ int ssi_ivgen_getiv( struct device *dev = drvdata_to_dev(drvdata); unsigned int t; - if ((iv_out_size != CC_AES_IV_SIZE) && - (iv_out_size != CTR_RFC3686_IV_SIZE)) { + if (iv_out_size != CC_AES_IV_SIZE && + iv_out_size != CTR_RFC3686_IV_SIZE) { return -EINVAL; } if ((iv_out_dma_len + 1) > SSI_IVPOOL_SEQ_LEN) { From patchwork Mon Nov 13 14:45:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118788 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1879211qgn; Mon, 13 Nov 2017 06:46:44 -0800 (PST) X-Google-Smtp-Source: AGs4zMa4gH67TxqDoJlkBxf0wyLOeI1uqUTOn5AvEwSnf/81mPB/cw1wIxbr58Juk+sm+IVhIaff X-Received: by 10.159.207.149 with SMTP id z21mr9055612plo.258.1510584404733; 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[209.132.180.67]) by mx.google.com with ESMTP id 1si14111439pli.120.2017.11.13.06.46.44; Mon, 13 Nov 2017 06:46:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753131AbdKMOql (ORCPT + 27 others); Mon, 13 Nov 2017 09:46:41 -0500 Received: from foss.arm.com ([217.140.101.70]:47274 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753078AbdKMOqi (ORCPT ); Mon, 13 Nov 2017 09:46:38 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B99011435; Mon, 13 Nov 2017 06:46:37 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 222F53F318; Mon, 13 Nov 2017 06:46:35 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/24] staging: ccree: remove MIN/MAX macros Date: Mon, 13 Nov 2017 14:45:32 +0000 Message-Id: <1510584358-29473-5-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The driver was using open coded MIN/MAX macros to compute fixed defines. Remove them and use bigger value always instead. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_aead.h | 2 +- drivers/staging/ccree/ssi_driver.h | 3 --- drivers/staging/ccree/ssi_hash.c | 2 +- 3 files changed, 2 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_aead.h b/drivers/staging/ccree/ssi_aead.h index e85bcd9..580fdb8 100644 --- a/drivers/staging/ccree/ssi_aead.h +++ b/drivers/staging/ccree/ssi_aead.h @@ -28,7 +28,7 @@ /* mac_cmp - HW writes 8 B but all bytes hold the same value */ #define ICV_CMP_SIZE 8 #define CCM_CONFIG_BUF_SIZE (AES_BLOCK_SIZE * 3) -#define MAX_MAC_SIZE MAX(SHA256_DIGEST_SIZE, AES_BLOCK_SIZE) +#define MAX_MAC_SIZE SHA256_DIGEST_SIZE /* defines for AES GCM configuration buffer */ #define GCM_BLOCK_LEN_SIZE 8 diff --git a/drivers/staging/ccree/ssi_driver.h b/drivers/staging/ccree/ssi_driver.h index f4967ca..758268e 100644 --- a/drivers/staging/ccree/ssi_driver.h +++ b/drivers/staging/ccree/ssi_driver.h @@ -95,9 +95,6 @@ * field in the HW descriptor. The DMA engine +8 that value. */ -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#define MAX(a, b) (((a) > (b)) ? (a) : (b)) - #define SSI_MAX_IVGEN_DMA_ADDRESSES 3 struct ssi_crypto_req { void (*user_cb)(struct device *dev, void *req); diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 1fda84d..8414c25 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -32,7 +32,7 @@ #include "ssi_sram_mgr.h" #define SSI_MAX_AHASH_SEQ_LEN 12 -#define SSI_MAX_HASH_OPAD_TMP_KEYS_SIZE MAX(SSI_MAX_HASH_BLCK_SIZE, 3 * AES_BLOCK_SIZE) +#define SSI_MAX_HASH_OPAD_TMP_KEYS_SIZE SSI_MAX_HASH_BLCK_SIZE struct ssi_hash_handle { ssi_sram_addr_t digest_len_sram_addr; /* const value in SRAM*/ From patchwork Mon Nov 13 14:45:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118789 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1879319qgn; Mon, 13 Nov 2017 06:46:51 -0800 (PST) X-Google-Smtp-Source: AGs4zMb9XtfP3XsSmoysltj5MvnDLn/7Rc9lkCBjrPyZ4OTIe6g2Yo7Rfr1np0S9yaHVAWc8Sbe2 X-Received: by 10.84.229.143 with SMTP id c15mr9291770plk.389.1510584411447; Mon, 13 Nov 2017 06:46:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584411; cv=none; d=google.com; s=arc-20160816; b=l0935ipxJALtr69jWKN5U/zmj3T1dzt5qhN8HFyxr5D2Rj6L5wd58k1O32IEe+Eg2s hLR6/FX9SG5Iit+vL6ZBVrHUrNDaHUjzDcJQfeegmUfvXnVDuJhKyNw4aX8k2DdmKE7n GM+W/OOq1tipxRmQXeNBc66PZPI5YFd6r+nseBLLZDMwVVieiVvYYIMhXzyMYUrJ6hbn z8i8Fd2NL26vq6vAByWK/ZBbtE+SZwmb1273BkbFdhXOn5oi59WVCeTZ3DzaXIMTeodx bZdYGAzyAL7R4pl8VuH/fTuZZGOMw1P4UMZip+Bb8eYC1we3Fz0zKRwHuVMMXhUU4IX3 i5hw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=y5oTyj6x1Ns+kYGAPy8i7ZBrGYb6DEY6bkx93bUL48I=; b=imVWASuSAmPIDuE/Ycj/rvcC4F9qCq1KLqSHM9PL5eKi78cARBdCbvhrXv4B5gpnQq PmoRfJCQS4BqSz1l5LqSNJTZvZ9Y0i48CdWxpcR8Vd6OJ52DJLHBCk7dIcBKxQ3TfCt9 9zzD7tTgIzmnwjTqEecP4JDf+cLRJbMK5m8+/E460dNgHlQS1Z5e7+/Zot4dCWm98Eqb tXysJWPHaWB+fHewf6jvx5EGUN+nRcmlec7VJYr7bgYORWPeagGkxOBpnFl/fKJddVy+ 0LG72JjHJLpDgnoj21xBGonAbitHrKkAFhWoxMkebTt9WmMQWEPKHbEMshBeuzexMNCX W7BA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 1si14111439pli.120.2017.11.13.06.46.51; Mon, 13 Nov 2017 06:46:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753169AbdKMOqt (ORCPT + 27 others); Mon, 13 Nov 2017 09:46:49 -0500 Received: from foss.arm.com ([217.140.101.70]:47286 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753103AbdKMOqo (ORCPT ); Mon, 13 Nov 2017 09:46:44 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 682551435; Mon, 13 Nov 2017 06:46:44 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C903F3F318; Mon, 13 Nov 2017 06:46:42 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/24] staging: ccree: move logical cont. to 1st line Date: Mon, 13 Nov 2017 14:45:33 +0000 Message-Id: <1510584358-29473-6-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Move logical continuations to first line for readability. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_buffer_mgr.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index 923a0df..cda5a30 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -1473,8 +1473,8 @@ int cc_map_hash_request_final(struct ssi_drvdata *drvdata, void *ctx, &dummy, &mapped_nents))) { goto unmap_curr_buff; } - if (src && mapped_nents == 1 - && areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) { + if (src && mapped_nents == 1 && + areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) { memcpy(areq_ctx->buff_sg, src, sizeof(struct scatterlist)); areq_ctx->buff_sg->length = nbytes; @@ -1590,8 +1590,8 @@ int cc_map_hash_request_update(struct ssi_drvdata *drvdata, void *ctx, &mapped_nents))) { goto unmap_curr_buff; } - if (mapped_nents == 1 - && areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) { + if (mapped_nents == 1 && + areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) { /* only one entry in the SG and no previous data */ memcpy(areq_ctx->buff_sg, src, sizeof(struct scatterlist)); From patchwork Mon Nov 13 14:45:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118790 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1879425qgn; Mon, 13 Nov 2017 06:46:56 -0800 (PST) X-Google-Smtp-Source: AGs4zMYFMKggZ2sKSCr/HF+1G7Ma3hxI5EomFPlv3XohdYRncUgDRQVgEbHNEBdEQsqeQFmZ1FMe X-Received: by 10.98.103.156 with SMTP id t28mr2873077pfj.234.1510584416779; Mon, 13 Nov 2017 06:46:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584416; cv=none; d=google.com; s=arc-20160816; b=rpLpeKWLEc2FxedjJDdTVhOHYHTr1Qly+KQFyOS98lNFG2eejliyKFru2h1c0hUWyW kuyYeHFqCNJUHbgGjp3nu6gbYsrClkaQEdef4D48NFoCQtuh75loEiqqE7fXG59Tl2ak aGbDSrgeuNwWMHd+dTpWCyA81kOAqQDfdewI/TrFafLPvgBVlRFtjvtgS/cBbmgepfl6 +nv7WcZ6KIiQCYzqoIxNbo+2efOuhWGOlobvqDqkwBm/4iklk8jTBeU+MWKi9U38lKR+ gq9r5kgDC+YcmaW6N3YRWkL6trQrS1jcO1+S6FYnean6I6s6Qys3N+XQkRCP0l1wYAOC UO+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=2PDKE9TJlrK4iK9GfbBGWg9lawn4hDDipEd7qG7Zmh8=; b=h/do8HxF3PO/3euIXRv2lSFHYfod8JNs4rwMjZkDuSWP5MEcEDGjbQt1DAklwRDBL7 JDJJt6neAv66DyzZYfBaZxfZIxD/8eqNRcsztgl1ADwtIw1iGJ6ccPQ9ZvSaByxnupp0 LE0q9pYiMApoxAQiF20vuaJZeXIxckf2INiDae+wBd/nUF8pUL8kAGdQhmduuBPjfnRp 8O0hQbIMchpkVHGYVWBk9a/QbtHOowZL6TGyybjeFyl6GLZhMfZrtixkwPEqXgS4wmSZ K7s9wKJvrEBsGHiT07xcJ2g0TC+uS/9cQV3x1MKRtTq3DPbZ6obo8i9ZD7Q5grBIcGSw mcHg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w12si13962744pld.814.2017.11.13.06.46.56; Mon, 13 Nov 2017 06:46:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753207AbdKMOqz (ORCPT + 27 others); Mon, 13 Nov 2017 09:46:55 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47294 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753103AbdKMOqv (ORCPT ); Mon, 13 Nov 2017 09:46:51 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 865031435; Mon, 13 Nov 2017 06:46:51 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E65B13F318; Mon, 13 Nov 2017 06:46:49 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/24] staging: ccree: remove unneeded empty lines Date: Mon, 13 Nov 2017 14:45:34 +0000 Message-Id: <1510584358-29473-7-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove uneeded empty lines that crept in to code. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_buffer_mgr.c | 1 - drivers/staging/ccree/ssi_hash.c | 1 - 2 files changed, 2 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index cda5a30..684c934 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -691,7 +691,6 @@ void cc_unmap_aead_request(struct device *dev, struct aead_request *req) if (drvdata->coherent && areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT && likely(req->src == req->dst)) { - /* copy back mac from temporary location to deal with possible * data memory overriding that caused by cache coherence problem. */ diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 8414c25..66b011c 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -2064,7 +2064,6 @@ ssi_hash_create_alg(struct ssi_hash_template *template, struct device *dev, if (!t_crypto_alg) return ERR_PTR(-ENOMEM); - t_crypto_alg->ahash_alg = template->template_ahash; halg = &t_crypto_alg->ahash_alg; alg = &halg->halg.base; From patchwork Mon Nov 13 14:45:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118791 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1879521qgn; Mon, 13 Nov 2017 06:47:03 -0800 (PST) X-Google-Smtp-Source: AGs4zMboCDTrk7C+tgzuRdey1klCEaoveJO9Rp+QyTYIvps1x/2PR38xgGPIwSMeKUrqZ22mO+tF X-Received: by 10.99.169.25 with SMTP id u25mr8673463pge.77.1510584423011; Mon, 13 Nov 2017 06:47:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584423; cv=none; d=google.com; s=arc-20160816; b=epPiGnyq162w+C4vMVDGYTFGyIn1k9dU1S9DppDnyJk6AaS9B2V9RnS/AHrDvotC7a xR0GlIGpEKpGBi/ys1+hRq8pWdzzvPDBipi4Rdv1/x155etw9r5rivfg1BeNFSMYaEXk 5Xl+w2zy/SIPLVlwALxDBgb+ee4GiY4JX8YEM5tmMVGlDiyCXolHpk7c+yCD1HKExUGx OIorZ69gj9PBDbOlx4nDSoxu7q1qmoc1El6HRS6veJ6TVkQblnK176jw+NrgN1wf+ZR3 W+YlYwU9YcwHhY4f8wtuZXKgJgUu5V1XO6pyUF+E1W6yjT8/+94C0uaLzjBPDbulBH8b Oz/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=rWwLzVguR50/VaEqqnpTZSsCHe01yaBKmd44eM3VaAM=; b=hjrsXE3KwIbmzhZZ9o7INOmgaV1hmt7zjx+tuEnBTUz8Ms4M6k6wQ3Yh8OK77x7mk/ 6fj6FpjUB+b00rhS0i4FHvNQx+v6Svn82rBKtzVNIG7bGv8mIZo8XY5cbA/erkDe33eV PHBpgZwMRNj33w8Wn4qTntDaQP3sH5SozlUJF5nMwvZFOskKp0V5rERgI/gdT8BQSpDy uOiRg2MKTU61K//p58YJPBX8SGT0ivLyp0eT31ux67K3qMDYTDvaj2DBInHVSXrZSr1N MMQxEEfizNVs1Ewble1wetbJhOHqa9XtaAYY6d9m2SIAOv8QMUDq6ncONnbakPeAcue8 MQYQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y3si13469490pgp.202.2017.11.13.06.47.02; Mon, 13 Nov 2017 06:47:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753242AbdKMOrA (ORCPT + 27 others); Mon, 13 Nov 2017 09:47:00 -0500 Received: from foss.arm.com ([217.140.101.70]:47312 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753103AbdKMOq5 (ORCPT ); Mon, 13 Nov 2017 09:46:57 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8ACC81435; Mon, 13 Nov 2017 06:46:57 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E88373F318; Mon, 13 Nov 2017 06:46:55 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 07/24] staging: ccree: remove unneeded cast Date: Mon, 13 Nov 2017 14:45:35 +0000 Message-Id: <1510584358-29473-8-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove uneeded cast from writel_relaxed parameter. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_request_mgr.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index 597a71f..e23c656 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -167,13 +167,13 @@ static inline void enqueue_seq( int i; for (i = 0; i < seq_len; i++) { - writel_relaxed(seq[i].word[0], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[1], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[2], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[3], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[4], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[0], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[1], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[2], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[3], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[4], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); wmb(); - writel_relaxed(seq[i].word[5], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[5], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); #ifdef DX_DUMP_DESCS dev_dbg(dev, "desc[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n", i, seq[i].word[0], seq[i].word[1], seq[i].word[2], From patchwork Mon Nov 13 14:45:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118792 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1879616qgn; Mon, 13 Nov 2017 06:47:10 -0800 (PST) X-Google-Smtp-Source: AGs4zMZk0Bl6FcOrM/tgnOQGDRZCJvm7M1lZRPrLgveA7aW3KTlu0uOCtBunXNZpNIMpKgcCW+s9 X-Received: by 10.99.44.214 with SMTP id s205mr8785028pgs.80.1510584430070; Mon, 13 Nov 2017 06:47:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584430; cv=none; d=google.com; s=arc-20160816; b=j2xdPV+3FsCsxp8nUWAPEi8xmVgyffbawBf7/71O5grUV8+lltp0NNX9gW7HUjcBsb gtPkafanYMDA6+tF6j1NSbhoLh9tNkLL9/VoECF/39VRSHstyw5AGf7BjoghOaz6OQTV BxRAFd4H2f/SvAYmwPSgwZQ4E6dGy9TLhZdwvLOHEbyns1VBKtuuHW7aumUWNuaY1rNS xi/fZnEoezdAOH+4ZmhCgFIsPzImwxCnxsMNWyU9GvsNt8PLfNRxFAtX/6Dfg61hYl9d 1NeTRKyCAOp6C0TgCcRR3k/uUmMpvyUFb4l8PGEAMKwmNoUkpJYxsUFnwFwtcyiDUGha oL/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=D/N81+KkCpr2M0ms01U1Xo1V/jFRIMyg8K0D5wDmeQk=; b=KixE7Hf6rxZVF+Q+4wisc0d4384YnVNAr0d8XYNKlpugd/EywD3ca5XwQ5o0nl+0k1 XyTxda6Q9c9d1tz5j8RvFZXp5xjChrJP2Q0TYsuoWk4HxaBupFsRinJlGjsV4iCd7G8Q e9nQu9fW+r51plhPDYcVlDH70XYSrEm6cesrWs+FfRoWpcS4xinbZh/798kEGMYYDxjh F8rNxaXKV7BpPZ/C+XPBOzH2suYWVwyi/X/npSaFbD4bmiGakUx2BCFC1H3zaBbfTzWW fJ//nB8sOdAFOUy3iGyUXE4pu1LmiOg09dXd6EY74yW1A7fEJbzR/4qpBTCdHjaJ9iZP 4H0Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e191si13487424pgc.788.2017.11.13.06.47.09; Mon, 13 Nov 2017 06:47:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753262AbdKMOrH (ORCPT + 27 others); Mon, 13 Nov 2017 09:47:07 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47320 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752769AbdKMOrE (ORCPT ); Mon, 13 Nov 2017 09:47:04 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 09B571435; Mon, 13 Nov 2017 06:47:04 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6A8B33F318; Mon, 13 Nov 2017 06:47:02 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/24] staging: ccree: make mem barrier per request Date: Mon, 13 Nov 2017 14:45:36 +0000 Message-Id: <1510584358-29473-9-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The driver was issuing a write memory barrier per each HW descriptor written but these descriptors are written in groups and we really only need one per group. White at it, document memory barrier reason. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_request_mgr.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index e23c656..f5041f7 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -172,7 +172,6 @@ static inline void enqueue_seq( writel_relaxed(seq[i].word[2], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); writel_relaxed(seq[i].word[3], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); writel_relaxed(seq[i].word[4], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); - wmb(); writel_relaxed(seq[i].word[5], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); #ifdef DX_DUMP_DESCS dev_dbg(dev, "desc[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n", @@ -359,6 +358,12 @@ int send_request( #ifdef FLUSH_CACHE_ALL flush_cache_all(); #endif + /* + * We are about to push command to the HW via the command registers + * that may refernece hsot memory. We need to issue a memory barrier + * to make sure there are no outstnading memory writes + */ + wmb(); /* STAT_PHASE_4: Push sequence */ enqueue_seq(cc_base, iv_seq, iv_seq_len); @@ -417,6 +422,12 @@ int send_request_init( set_queue_last_ind(&desc[(len - 1)]); + /* + * We are about to push command to the HW via the command registers + * that may refernece hsot memory. We need to issue a memory barrier + * to make sure there are no outstnading memory writes + */ + wmb(); enqueue_seq(cc_base, desc, len); /* Update the free slots in HW queue */ From patchwork Mon Nov 13 14:45:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118793 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1879688qgn; Mon, 13 Nov 2017 06:47:15 -0800 (PST) X-Google-Smtp-Source: AGs4zMb/KXrD3ZcHnysyoJWAw5wKNm4tsWC7x1aFB/kBQK9tBrqRIZUk6oI97jYRLb7GquK++jyV X-Received: by 10.101.67.137 with SMTP id m9mr8656463pgp.51.1510584435016; Mon, 13 Nov 2017 06:47:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584435; cv=none; d=google.com; s=arc-20160816; b=z+u0YRNi4h8l3R/KJLPPulL+Qik5kqMOaO7G+PSesKS7GmWbo3djqOcvExeL97NFDO uA0p+aPokCCY08m1azY1DqfD+IGhYYrdM2QE6h4zlgjFR+Mjs7HRUbJk7ZmboLpz8QZN Zyg09BPWQl8Jj9IwaOs6d8tGJGi9RmQpYBK0BUV9sDNWqHai6xWMsSY8dnAHIgI4q6PO cNcfja1mqoB7mSR8yPwkLo2EBb0CLGnn5aan0KAM1xav3WL1e70JCwJ8FMBYFveZAqU/ 9Hg+lOqSOihzHqX40MS8Mzk9ICoi5ykScmNKVHz84fQXY4Gonen4a/6w+YuT7+OYjzO5 HUfw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=fW2CcWsh5PoHyDZLqVbNT73ux3BK1gWVE4+7c1Co+Mw=; b=NLrIMK92hMNAVCctlqZw6atdFcqafAOrMTZbbhMOLSrVpEk87OioMD0JJunYbZcEX2 652LvE8E103lYbDjzB6hJgqX/74GCbXv7pBvX3LMZvcCki+Zkr/B242gUvGZ7YWI0N/p XeJ0YtYPqV3mGfCl0B/2uYYDzDW26WwKSQUdijaKa/gvO3ohhtKGX6S0hE++hymhM8p1 B7FHceXvpEWmr9UZ6wK++WCjIIbiVWKw0Oc1au+e5B5aeSGCkZVu3WyECpA8sCTqisDO uj70LEEvWrbuh3gA2Kx79goTLnF61bzv5vFx/cyGrbXKKzje7gLuBhGmZhQN6DfejCsw ghhA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g2si13632225pgr.506.2017.11.13.06.47.14; Mon, 13 Nov 2017 06:47:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753284AbdKMOrN (ORCPT + 27 others); Mon, 13 Nov 2017 09:47:13 -0500 Received: from foss.arm.com ([217.140.101.70]:47338 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752769AbdKMOrK (ORCPT ); Mon, 13 Nov 2017 09:47:10 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 530591435; Mon, 13 Nov 2017 06:47:10 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 467433F318; Mon, 13 Nov 2017 06:47:08 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/24] staging: ccree: replace open coded loop with for Date: Mon, 13 Nov 2017 14:45:37 +0000 Message-Id: <1510584358-29473-10-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace open coded register writing loop with a for. Further simplify code by using a local var to precompute the register address for readability. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_request_mgr.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index f5041f7..65c4d9f 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -164,15 +164,17 @@ static inline void enqueue_seq( void __iomem *cc_base, struct cc_hw_desc seq[], unsigned int seq_len) { - int i; + int i, w; + void * __iomem reg = cc_base + CC_REG(DSCRPTR_QUEUE_WORD0); + + /* + * We do indeed write all 6 command words to the same + * register. The HW supports this. + */ for (i = 0; i < seq_len; i++) { - writel_relaxed(seq[i].word[0], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[1], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[2], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[3], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[4], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[5], (cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); + for (w = 0; w <= 5; w++) + writel_relaxed(seq[i].word[w], reg); #ifdef DX_DUMP_DESCS dev_dbg(dev, "desc[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n", i, seq[i].word[0], seq[i].word[1], seq[i].word[2], From patchwork Mon Nov 13 14:45:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118794 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1879801qgn; Mon, 13 Nov 2017 06:47:21 -0800 (PST) X-Google-Smtp-Source: AGs4zMbudGhoOVEurOgIzU3mpdoA//wgyyE5ivVOOjeaq72LWzDT9v/4QLe3cx1cimcgRrtg9w3R X-Received: by 10.101.97.197 with SMTP id j5mr8873945pgv.205.1510584441661; Mon, 13 Nov 2017 06:47:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584441; cv=none; d=google.com; s=arc-20160816; b=oDZHhQqM9IaguKrK/BCji2bOxZfUIpfm4mFs+16vF0feLQj6dNtzTtjStFhm0Hxkip P091FDzpSMaEQRa/ZR68SyTFnZ/gkW3jk5tKR3vwY2FU9lVqc6l4GC2eEZy3x4ATtqPg MUV4cLZJUmiMG7BMB0oCMmP0DDoe+YX1VCEB2DNaeJ1qsBTeSEenHDqOIWgZ+c0Fpp9C 9Ug6HKYs7y3B3cEjsQdwkbw5RCy7VqiQJ7tgi+1vGLODObNKDRUswJa1+BfSnHZC1cp7 YiSuD13EX5a4o8u9fLlHD32f22ByxCzts+pKRyhxXpJ3aQYTvEScqNwW5a+y5qWXzFvn MArA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=r0ExlFz5ntP9agXgOOfzjUVqg+TRO2Ab2KVH6OJWhwU=; b=rKLR+XlDwgncpJAP/DSiWJHKWmRCJKWD/+pPJiA7owt4rvFlnZR6pfJVSVV0Ce31V4 cq4TENHfN5kCcaL1unvK7NPqoZo5umdukXdwlDw1geoNiKLgYQJZ/CyuC5C0bTa930Wq HOAznlqzLrAguHvmbeHfJdztMq5shNyyCJObrTHhRlaw886SE0MYSV9OJGbyVv3yJidT LDto4Od2ODH5G5M8BUEr8FU9uoL6/U6uJKBTWcMYYGuwGuSghGdBXwG+KLTunDeSumUh 0bVv438oIN70QGCEF0D1f3ZQbhpUVIj2ORpe4frkZHlZSVx8D7/5eeAX9xCl26B3bGsl t4mw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j10si494735pfk.300.2017.11.13.06.47.21; Mon, 13 Nov 2017 06:47:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753310AbdKMOrU (ORCPT + 27 others); Mon, 13 Nov 2017 09:47:20 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47348 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752260AbdKMOrQ (ORCPT ); Mon, 13 Nov 2017 09:47:16 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 976511435; Mon, 13 Nov 2017 06:47:16 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0252C3F318; Mon, 13 Nov 2017 06:47:14 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/24] staging: ccree: document spinlock usage Date: Mon, 13 Nov 2017 14:45:38 +0000 Message-Id: <1510584358-29473-11-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Document spinlock usage to protect against concurrent access to HW register which must occur a single request at a time. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_request_mgr.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index 65c4d9f..1d9c038 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -43,6 +43,9 @@ struct ssi_request_mgr_handle { u32 req_queue_tail; u32 axi_completed; u32 q_free_slots; + /* This lock protects access to HW register + * that must be single request at a time + */ spinlock_t hw_lock; struct cc_hw_desc compl_desc; u8 *dummy_comp_buff; From patchwork Mon Nov 13 14:45:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118795 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1879897qgn; Mon, 13 Nov 2017 06:47:28 -0800 (PST) X-Google-Smtp-Source: AGs4zMaxesDzHtKxvKR+wp8geKoKbnEYn1VcLHdGEbHwCdboqQ7tMEHO/qjVM+KFTNE3Qd1Mt1lw X-Received: by 10.84.130.66 with SMTP id 60mr9525528plc.376.1510584448262; Mon, 13 Nov 2017 06:47:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584448; cv=none; d=google.com; s=arc-20160816; b=EH9YCWqdxYXndeYTKkBCJqOrH7lmY4agGk1EO4wzDFnN/B0mMo+xVAUFv0A/qFl/to 1Gek3tNWaxX4dl/4D7WU7zyADoxsMRnBeKt6XpdSDiljxGtIshnJpmGRdZU3mhZEyscL p+C8CD5CmjBIVTRjUGYFrnrqfUzSW8/EtCDa/mWoq/PaSwguxuW82Mpf6XrVHOwNRyLA D1ESs3UM7fdJauibZUOtkVbdIuA+NwJP5DhmrIFSlxwysUNdLHFRgmxqLFwpXb/mmbA8 lju69c/yn7xzZl6Tz7VtKt8wNfETsEZWYKcrWpaKhK6FKibVobqkoF1u4N8btuHJJ+ss GSOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=OYrPzS7AQIOXuYJ0aMDeTrqgkHuzaDM1RXIJ3r4qLTU=; b=Dwgey/dAkqK3KUC2LvX11otp8dPEBnAlxDRmkQUftT6dHjgd7hQV5fVl9bmdw5pYx9 SZgtBBPPkjzNkfBV09p9rlDVw4jYoj/Tl/8I3PJwflWmK6z2KpXJgTOhv7vMb445fU8a yDNbtE9c5Rhx2W+EC22I2zqNlL0to5IOv1Sqv9T/qFfI3acgrNsMDdHWK16KP3wNMLd4 5d5KHKDjN/YSFvp4CLnWzjkq4/SlO7Ig9eLGDNv0Yt3Y2K2r5JqomjctC8sE9KvUGOWQ uXe0dGnE9fPPsygsV2ZfAsSzIHQcYaU+iNXyjMI9D0XV5ktNTp4fNj06GHHNhBDCCcy+ iGMg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m25si14134193pgv.560.2017.11.13.06.47.28; Mon, 13 Nov 2017 06:47:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753341AbdKMOr0 (ORCPT + 27 others); Mon, 13 Nov 2017 09:47:26 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47360 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752260AbdKMOrX (ORCPT ); Mon, 13 Nov 2017 09:47:23 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 201C11435; Mon, 13 Nov 2017 06:47:23 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7FC003F318; Mon, 13 Nov 2017 06:47:21 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 11/24] staging: ccree: constify help string Date: Mon, 13 Nov 2017 14:45:39 +0000 Message-Id: <1510584358-29473-12-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Make help string static const Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_sysfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_sysfs.c b/drivers/staging/ccree/ssi_sysfs.c index 5d39f15..8d50382 100644 --- a/drivers/staging/ccree/ssi_sysfs.c +++ b/drivers/staging/ccree/ssi_sysfs.c @@ -47,7 +47,7 @@ static ssize_t ssi_sys_regdump_show(struct kobject *kobj, static ssize_t ssi_sys_help_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) { - char *help_str[] = { + static const char * const help_str[] = { "cat reg_dump ", "Print several of CC register values", }; int i = 0, offset = 0; From patchwork Mon Nov 13 14:45:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118796 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1879993qgn; Mon, 13 Nov 2017 06:47:34 -0800 (PST) X-Google-Smtp-Source: AGs4zMYovaovpQuNt66NlRBI4H7KmuStozJwHSVESCgtBnvShUp7L0sIMR3O5R7S2xJnC1vwhm+Y X-Received: by 10.98.1.145 with SMTP id 139mr436931pfb.135.1510584454072; Mon, 13 Nov 2017 06:47:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584454; cv=none; d=google.com; s=arc-20160816; b=R+J42A6OL/zj/4iP9aVhuPUHrL2NdHF6TQW3DN4ifOpuQEY9LUXeFeihMIuC4w+vz3 oGovHk/6MhckDNKxkS5lBRFqzYoZcpVUl1NoQlsYeXemskfjaFtiq2zV4uKdjzGh1vNW 2fQT8vHNguEx+bphtgJzLjpNK7Gr5MII5ytuLP1PK35RPIObBsCbplabJ1vPVLSCHKEr vh5dkVXb+F+d92Nkh12kPCrMIKj/JnJCQcX2LDXdDiz5vkXaBKi9lwJ8f2ifWIkyGnlT Nd3UD0/3/RCWD6oUSRMmNLlQd+17RNZacnQpVCVwwVctldmZ3xJwCoUmocNsB5DoeapF IWhw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=K9raVGgAvVNPGTMIaiE1YR2W95Gjqy6iPfPc4DpXT4s=; b=GYvFhfzCK9TGLgNyJ3+ih/56uUIzcApCOqcmgrybVfEgLPcq0CyAH+9Gq3MpKO4fHv BjuxtzR1bpy8pyGSOkfTTOt19FVYPPjxp+U+8A/Wbtrx+Ryk7mPgE4H736wcqNyJP773 b/RLMf3BoqdD4a8hs8vWyJu4BDoTe/sWvts9F2z7UVaCFfbvIx0o0mlOjC989js1JBPC UXHjjwpyuRoQHLKfef/mFGbsCiYzE5PvNhZRpDoz7RrJ//i/lY4XdPBp7RZnNQFfCxIA SkUjvb1bqIuXTkKWIt/fQoKd7bNfv+fO7F24klqyR2LmGHf+kVadcbzc41fbpE5bxKNV 1DeQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i11si4268159pgq.571.2017.11.13.06.47.33; Mon, 13 Nov 2017 06:47:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753369AbdKMOrc (ORCPT + 27 others); Mon, 13 Nov 2017 09:47:32 -0500 Received: from foss.arm.com ([217.140.101.70]:47370 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752260AbdKMOra (ORCPT ); Mon, 13 Nov 2017 09:47:30 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 57DBD1435; Mon, 13 Nov 2017 06:47:30 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B750A3F318; Mon, 13 Nov 2017 06:47:28 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 12/24] staging: ccree: fix code indent Date: Mon, 13 Nov 2017 14:45:40 +0000 Message-Id: <1510584358-29473-13-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fix code ident not following the coding style. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_cipher.c | 2 +- drivers/staging/ccree/ssi_sysfs.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c index 957138a..4c1080a 100644 --- a/drivers/staging/ccree/ssi_cipher.c +++ b/drivers/staging/ccree/ssi_cipher.c @@ -140,7 +140,7 @@ static int validate_data_size(struct ssi_ablkcipher_ctx *ctx_p, unsigned int siz break; case S_DIN_to_DES: if (likely(IS_ALIGNED(size, DES_BLOCK_SIZE))) - return 0; + return 0; break; #if SSI_CC_HAS_MULTI2 case S_DIN_to_MULTI2: diff --git a/drivers/staging/ccree/ssi_sysfs.c b/drivers/staging/ccree/ssi_sysfs.c index 8d50382..ed97dec 100644 --- a/drivers/staging/ccree/ssi_sysfs.c +++ b/drivers/staging/ccree/ssi_sysfs.c @@ -53,8 +53,10 @@ static ssize_t ssi_sys_help_show(struct kobject *kobj, int i = 0, offset = 0; offset += scnprintf(buf + offset, PAGE_SIZE - offset, "Usage:\n"); - for (i = 0; i < ARRAY_SIZE(help_str); i += 2) - offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s\t\t%s\n", help_str[i], help_str[i + 1]); + for (i = 0; i < ARRAY_SIZE(help_str); i += 2) { + offset += scnprintf(buf + offset, PAGE_SIZE - offset, + "%s\t\t%s\n", help_str[i], help_str[i + 1]); + } return offset; } From patchwork Mon Nov 13 14:45:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118797 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1880106qgn; Mon, 13 Nov 2017 06:47:40 -0800 (PST) X-Google-Smtp-Source: AGs4zMZfUoKskkub+j9kUalYujcF8FayiQtHJ9XdiSp0+B//MwRRwysu2Um3+ZNXCCkfMmyxGNYC X-Received: by 10.99.97.200 with SMTP id v191mr8505391pgb.300.1510584460792; Mon, 13 Nov 2017 06:47:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584460; cv=none; d=google.com; s=arc-20160816; b=bozGkw9pEHqv9VCC40qlVqLieqtodRxjNGWrMSSHYeXhpyS7ldNNogp0YIzqFNtDPR bnmxFfdRiRxCL+ug93e4nshMS1BV/P+hEvFP4DQ0nyF8gCr+6DQ+gJkjPHMxZXQH33SF mGzuw4yvDJ2ZXjOcRGNHAJkJtA3M8nke8oVU0tRSF5u2X/Hrcs2Q1Z80X1MK8MlHGQZE 5h60NfK0g6zsguhYZmp88npQl1Dy5awvC3qhTjulHPTUCuiCncCipgpfZ5gfrJUVhB7H jJfeYXW/WuOkda+aJ6BZZnzDp67/+1WFe+hSFVGInwx93Y0hPao3yxsGTcM3NaTrLgxD 53xw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=9jARfgFBmfKg9XGymtOkdCQcX2rLakfJY0sNRDn87aM=; b=y7Uo/4dhowotPd08HREjhR7R23moTq4pnKSH5NS+jCrWOq6VWJl7Ur/4v17gQhw97W cvh5UtcfvWa5dDwDDtJmypCalcpkQNOo9u6LNY7P9kctJnqyy+BBP/WoOFEd38ESeDqR IfaRAMSf0wpf/CDPjNphAHK3Lb5Y6wEaOj3TNftQDABVGH3MxbxBRfhplkQnwMQGTT5L ZeKZhrqtX70mBxLOUOGoN0xhNshWiTVYDk5UwjHja1v3MFcG4/o61O6yER1O4UUaPVXb LQaEcFa+ZZYUVbZxM3peHPEApGB54mQ7VBtpY/XuM1GL5cDFca5pXiQDVxBj4W8AEO8k F/7A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c30si13739937pgn.815.2017.11.13.06.47.40; Mon, 13 Nov 2017 06:47:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753394AbdKMOri (ORCPT + 27 others); Mon, 13 Nov 2017 09:47:38 -0500 Received: from foss.arm.com ([217.140.101.70]:47382 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752260AbdKMOrg (ORCPT ); Mon, 13 Nov 2017 09:47:36 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4516D1435; Mon, 13 Nov 2017 06:47:36 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A0FF53F318; Mon, 13 Nov 2017 06:47:34 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 13/24] staging: ccree: Replace CONFIG_PM_RUNTIME with CONFIG_PM Date: Mon, 13 Nov 2017 14:45:41 +0000 Message-Id: <1510584358-29473-14-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org After commit b2b49ccbdd54 ("PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected") PM_RUNTIME is always set if PM is set, so #ifdef blocks depending on CONFIG_PM_RUNTIME may now be changed to depend on CONFIG_PM. Replace CONFIG_PM_RUNTIME with CONFIG_PM. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_driver.c | 4 ++-- drivers/staging/ccree/ssi_pm.c | 6 +++--- drivers/staging/ccree/ssi_pm.h | 2 +- drivers/staging/ccree/ssi_request_mgr.c | 14 +++++++------- drivers/staging/ccree/ssi_request_mgr.h | 2 +- 5 files changed, 14 insertions(+), 14 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c index 0d5c1a9..8d16823 100644 --- a/drivers/staging/ccree/ssi_driver.c +++ b/drivers/staging/ccree/ssi_driver.c @@ -495,13 +495,13 @@ static int cc7x_remove(struct platform_device *plat_dev) return 0; } -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) static const struct dev_pm_ops arm_cc7x_driver_pm = { SET_RUNTIME_PM_OPS(cc_pm_suspend, cc_pm_resume, NULL) }; #endif -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) #define DX_DRIVER_RUNTIME_PM (&arm_cc7x_driver_pm) #else #define DX_DRIVER_RUNTIME_PM NULL diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c index 86d403d..5e2ef5e 100644 --- a/drivers/staging/ccree/ssi_pm.c +++ b/drivers/staging/ccree/ssi_pm.c @@ -29,7 +29,7 @@ #include "ssi_hash.h" #include "ssi_pm.h" -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) #define POWER_DOWN_ENABLE 0x01 #define POWER_DOWN_DISABLE 0x00 @@ -119,7 +119,7 @@ int cc_pm_put_suspend(struct device *dev) int cc_pm_init(struct ssi_drvdata *drvdata) { int rc = 0; -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) struct device *dev = drvdata_to_dev(drvdata); /* must be before the enabling to avoid resdundent suspending */ @@ -137,7 +137,7 @@ int cc_pm_init(struct ssi_drvdata *drvdata) void cc_pm_fini(struct ssi_drvdata *drvdata) { -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) pm_runtime_disable(drvdata_to_dev(drvdata)); #endif } diff --git a/drivers/staging/ccree/ssi_pm.h b/drivers/staging/ccree/ssi_pm.h index 557ec98..50bcf03 100644 --- a/drivers/staging/ccree/ssi_pm.h +++ b/drivers/staging/ccree/ssi_pm.h @@ -29,7 +29,7 @@ int cc_pm_init(struct ssi_drvdata *drvdata); void cc_pm_fini(struct ssi_drvdata *drvdata); -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) int cc_pm_suspend(struct device *dev); int cc_pm_resume(struct device *dev); diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index 1d9c038..ab18851 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -58,7 +58,7 @@ struct ssi_request_mgr_handle { #else struct tasklet_struct comptask; #endif -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) bool is_runtime_suspended; #endif }; @@ -277,7 +277,7 @@ int send_request( SSI_IVPOOL_SEQ_LEN) + (!is_dout ? 1 : 0)); -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) rc = cc_pm_get(dev); if (rc) { dev_err(dev, "ssi_power_mgr_runtime_get returned %x\n", rc); @@ -304,7 +304,7 @@ int send_request( /* Any error other than HW queue full * (SW queue is full) */ -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) cc_pm_put_suspend(dev); #endif return rc; @@ -340,7 +340,7 @@ int send_request( if (unlikely(rc)) { dev_err(dev, "Failed to generate IV (rc=%d)\n", rc); spin_unlock_bh(&req_mgr_h->hw_lock); -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) cc_pm_put_suspend(dev); #endif return rc; @@ -469,7 +469,7 @@ static void proc_completions(struct ssi_drvdata *drvdata) struct device *dev = drvdata_to_dev(drvdata); struct ssi_request_mgr_handle *request_mgr_handle = drvdata->request_mgr_handle; -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) int rc = 0; #endif @@ -513,7 +513,7 @@ static void proc_completions(struct ssi_drvdata *drvdata) request_mgr_handle->req_queue_tail); dev_dbg(dev, "Request completed. axi_completed=%d\n", request_mgr_handle->axi_completed); -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) rc = cc_pm_put_suspend(dev); if (rc) dev_err(dev, "Failed to set runtime suspension %d\n", @@ -579,7 +579,7 @@ static void comp_handler(unsigned long devarg) * resume the queue configuration - no need to take the lock as this happens inside * the spin lock protection */ -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) int cc_resume_req_queue(struct ssi_drvdata *drvdata) { struct ssi_request_mgr_handle *request_mgr_handle = drvdata->request_mgr_handle; diff --git a/drivers/staging/ccree/ssi_request_mgr.h b/drivers/staging/ccree/ssi_request_mgr.h index 23883e2..53eed5f 100644 --- a/drivers/staging/ccree/ssi_request_mgr.h +++ b/drivers/staging/ccree/ssi_request_mgr.h @@ -49,7 +49,7 @@ void complete_request(struct ssi_drvdata *drvdata); void request_mgr_fini(struct ssi_drvdata *drvdata); -#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) +#if defined(CONFIG_PM) int cc_resume_req_queue(struct ssi_drvdata *drvdata); int cc_suspend_req_queue(struct ssi_drvdata *drvdata); From patchwork Mon Nov 13 14:45:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118798 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp1131969edl; Mon, 13 Nov 2017 06:47:52 -0800 (PST) X-Google-Smtp-Source: AGs4zMaDC0idYZ5EQecO80KS58DeNjLUn0E3MBvi421dKZYkCYQ95BMbUGsfNnhXG6U8xHJsIe8h X-Received: by 10.101.91.78 with SMTP id y14mr8950468pgr.380.1510584471979; Mon, 13 Nov 2017 06:47:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584471; cv=none; d=google.com; s=arc-20160816; b=iHWnwGREaAMrfsj25Vr+kqnXB1bGA1vr4wFBflOlXozQZL8yUEcbZ79VOAXj4UaGXp 4Abp0aAoKtffD8MTBRA+tD6g4Aas0fSogRixJX25Lp1uLXp85RfzLMSdFNr3ETazP1Tm AQ7ONZ7ejPPmyczYb0pzAgWlkmxwVNk7DfmU/KMk8aSSnR/e0AHTqVCJ/2ChkzQeCd18 THWEmJ8IK8ycoon8MPD24X0eTMAlc8UFXfwChX/zW3SWot+D3e71KWYIWRp0/5C65noO 7wIUgq7RCSOYxipAGYPnuBa35dkgQIGdYlGupCjQjAdZHgBEjQumUwpg5lXY46AQrEf5 tk5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=BCGC9QxnCdDlS3tnAlT184DUnnbZcwblEJSI0yQf8lI=; b=SaTkF9ioezbf2f1dqF9E7Wm5YHbZPXo2ye+T6s0JQ4Ochd2qk5kE6B6NCNiJUw0O2t ykqKd1cLFpYubKB6o6xxZCuatoohsujsZv3C/C8gPbjaf0fDzQHFkzAK9SMYPafkqJwd JfVPyY9DRKbQt3QgUas9iqgIB3EvJgrjM0sYOTscPcGE5THiG7o9qeZ450QpaX/3T8j/ OIiFS32umkYB+G/wgrnXnh0diL5Ze5X4fG53mHMABRaxAI98TkWvGfd0tpWZUiGfSoxi fuFrcTicS4PVUDubg6CBwnIlX1gEhhPBZhOhCKPA/4UOfcCGk7lTOQOX7L+pKbdx6aRA lbEg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z10si14180869pgu.113.2017.11.13.06.47.49; Mon, 13 Nov 2017 06:47:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753416AbdKMOrr (ORCPT + 27 others); Mon, 13 Nov 2017 09:47:47 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47392 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752735AbdKMOrm (ORCPT ); Mon, 13 Nov 2017 09:47:42 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 69F461435; Mon, 13 Nov 2017 06:47:42 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C56413F318; Mon, 13 Nov 2017 06:47:40 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 14/24] staging: ccree: replace macro with inline func Date: Mon, 13 Nov 2017 14:45:42 +0000 Message-Id: <1510584358-29473-15-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace GET_DMA_BUFFER_TYPE with an inline function variant with type checking. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_buffer_mgr.c | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index 684c934..5e01477 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -33,11 +33,6 @@ #include "ssi_hash.h" #include "ssi_aead.h" -#define GET_DMA_BUFFER_TYPE(buff_type) ( \ - ((buff_type) == SSI_DMA_BUF_NULL) ? "BUF_NULL" : \ - ((buff_type) == SSI_DMA_BUF_DLLI) ? "BUF_DLLI" : \ - ((buff_type) == SSI_DMA_BUF_MLLI) ? "BUF_MLLI" : "BUF_INVALID") - enum dma_buffer_type { DMA_NULL_TYPE = -1, DMA_SGL_TYPE = 1, @@ -64,6 +59,20 @@ struct buffer_array { u32 *mlli_nents[MAX_NUM_OF_BUFFERS_IN_MLLI]; }; +static inline char *cc_dma_buf_type(enum ssi_req_dma_buf_type type) +{ + switch (type) { + case SSI_DMA_BUF_NULL: + return "BUF_NULL"; + case SSI_DMA_BUF_DLLI: + return "BUF_DLLI"; + case SSI_DMA_BUF_MLLI: + return "BUF_MLLI"; + default: + return "BUF_INVALID"; + } +} + /** * cc_copy_mac() - Copy MAC to temporary location * @@ -594,7 +603,7 @@ int cc_map_blkcipher_request( } dev_dbg(dev, "areq_ctx->dma_buf_type = %s\n", - GET_DMA_BUFFER_TYPE(req_ctx->dma_buf_type)); + cc_dma_buf_type(req_ctx->dma_buf_type)); return 0; @@ -819,7 +828,7 @@ static inline int cc_aead_chain_assoc( areq_ctx->assoc.nents = 0; areq_ctx->assoc.mlli_nents = 0; dev_dbg(dev, "Chain assoc of length 0: buff_type=%s nents=%u\n", - GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type), + cc_dma_buf_type(areq_ctx->assoc_buff_type), areq_ctx->assoc.nents); goto chain_assoc_exit; } @@ -871,7 +880,7 @@ static inline int cc_aead_chain_assoc( if (unlikely((do_chain) || areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI)) { dev_dbg(dev, "Chain assoc: buff_type=%s nents=%u\n", - GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type), + cc_dma_buf_type(areq_ctx->assoc_buff_type), areq_ctx->assoc.nents); cc_add_sg_entry(dev, sg_data, areq_ctx->assoc.nents, req->src, req->assoclen, 0, is_last, @@ -1496,7 +1505,7 @@ int cc_map_hash_request_final(struct ssi_drvdata *drvdata, void *ctx, /* change the buffer index for the unmap function */ areq_ctx->buff_index = (areq_ctx->buff_index ^ 1); dev_dbg(dev, "areq_ctx->data_dma_buf_type = %s\n", - GET_DMA_BUFFER_TYPE(areq_ctx->data_dma_buf_type)); + cc_dma_buf_type(areq_ctx->data_dma_buf_type)); return 0; fail_unmap_din: From patchwork Mon Nov 13 14:45:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118799 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp1132062edl; Mon, 13 Nov 2017 06:47:57 -0800 (PST) X-Google-Smtp-Source: AGs4zMbylw/dbCBiorkILnyYyI1NXKrSV68mlN+lTVsfjkgEdj4gkuAEkLI7kzRm3dmU59aPzIcx X-Received: by 10.99.97.76 with SMTP id v73mr8620027pgb.378.1510584477250; Mon, 13 Nov 2017 06:47:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584477; cv=none; d=google.com; s=arc-20160816; b=uy2FetTRSUQxI4ernf2AL5Ry6IahN9r1bHPWcVVX51i6mf9tnHz7Ha7OixqvXqalr2 ob+Qc+5PN7cPx2OJtcC7vaXIYA+JbM+2ULBA2HFH1/xeMdcGFRHs5T/WwWRnEOAqmgsS H6L3W7KJrABmhkrueGupt8HdPL2s6aMy9mEF+vMd7Q/yvXcnNWkgDDPvc/z8TnMIqE24 0supObHVY1KBouNfNrNqrvgSL2ZR/Z+4Bj0j/kCRBgTGMwMv/gzcbgh179p4zIxtOnpI jESfSEupgb/RMkwmPZJYwxZqdm0udPVhJvsHHh38oJKkvTBhr89ETuBkj9j41r9R5hjf n2vA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=WldzGbJzBoU+EIifrSZjyeKcv5uEbiX5azJLGUgSCrE=; b=FBjcjQxZderKAgDMGlUjd62YMXsleeyrf1REY8jIWq77gDVOYu2vEvMovuoCyMKdmH PHD5hVQAnVHbTHbiugvciXru8PInLkjjjp8TY7VziYqT7LBSAqwL47xtHen7IslyzMVN ZKX/7xr4FIdz161uR0CPfG2Tnoo/G9BDEdRb0bzzz+q7+OtLQO06YJEsxv8CBC9k2y1/ VRSdDu0TaLLsmbWKe176iQ+/EZLm2wqhnSFDEUi0G0W1igYPWlYu3AeI+pS+Uw8Gy8Hv dtvE2VeFXWT1YucggkZIt7gWM9JFPjNU8+jD5NAj4hVyfA6fBRnSjqRUBTu2pWqXD+2J 3+oA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z10si14180869pgu.113.2017.11.13.06.47.56; Mon, 13 Nov 2017 06:47:57 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753438AbdKMOry (ORCPT + 27 others); Mon, 13 Nov 2017 09:47:54 -0500 Received: from foss.arm.com ([217.140.101.70]:47404 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753417AbdKMOrt (ORCPT ); Mon, 13 Nov 2017 09:47:49 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C70B11435; Mon, 13 Nov 2017 06:47:48 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E9A3A3F318; Mon, 13 Nov 2017 06:47:46 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 15/24] staging: ccree: trim long lines for readability Date: Mon, 13 Nov 2017 14:45:43 +0000 Message-Id: <1510584358-29473-16-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ccree driver did not adhere to the kernel max 80 chars per line limit making the code hard to follow. Fix this by breaking long lines and in some cases, moving comments to a separate line from code. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_aead.c | 152 ++++++++++++++++++++++---------- drivers/staging/ccree/ssi_aead.h | 15 ++-- drivers/staging/ccree/ssi_buffer_mgr.c | 100 +++++++++++++-------- drivers/staging/ccree/ssi_cipher.c | 66 ++++++++++---- drivers/staging/ccree/ssi_cipher.h | 5 +- drivers/staging/ccree/ssi_config.h | 6 +- drivers/staging/ccree/ssi_driver.c | 8 +- drivers/staging/ccree/ssi_driver.h | 15 ++-- drivers/staging/ccree/ssi_fips.h | 3 +- drivers/staging/ccree/ssi_hash.c | 131 +++++++++++++++++++-------- drivers/staging/ccree/ssi_hash.h | 10 ++- drivers/staging/ccree/ssi_ivgen.c | 7 +- drivers/staging/ccree/ssi_ivgen.h | 3 +- drivers/staging/ccree/ssi_request_mgr.c | 45 ++++++---- drivers/staging/ccree/ssi_sysfs.c | 33 +++++-- 15 files changed, 406 insertions(+), 193 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c index 7abc352..e2cdf52 100644 --- a/drivers/staging/ccree/ssi_aead.c +++ b/drivers/staging/ccree/ssi_aead.c @@ -100,7 +100,8 @@ static void ssi_aead_exit(struct crypto_aead *tfm) /* Unmap enckey buffer */ if (ctx->enckey) { - dma_free_coherent(dev, AES_MAX_KEY_SIZE, ctx->enckey, ctx->enckey_dma_addr); + dma_free_coherent(dev, AES_MAX_KEY_SIZE, ctx->enckey, + ctx->enckey_dma_addr); dev_dbg(dev, "Freed enckey DMA buffer enckey_dma_addr=%pad\n", &ctx->enckey_dma_addr); ctx->enckey_dma_addr = 0; @@ -259,12 +260,17 @@ static void ssi_aead_complete(struct device *dev, void *ssi_req) SSI_SG_FROM_BUF); } - /* If an IV was generated, copy it back to the user provided buffer. */ + /* If an IV was generated, copy it back to the user provided + * buffer. + */ if (areq_ctx->backup_giv) { if (ctx->cipher_mode == DRV_CIPHER_CTR) - memcpy(areq_ctx->backup_giv, areq_ctx->ctr_iv + CTR_RFC3686_NONCE_SIZE, CTR_RFC3686_IV_SIZE); + memcpy(areq_ctx->backup_giv, areq_ctx->ctr_iv + + CTR_RFC3686_NONCE_SIZE, + CTR_RFC3686_IV_SIZE); else if (ctx->cipher_mode == DRV_CIPHER_CCM) - memcpy(areq_ctx->backup_giv, areq_ctx->ctr_iv + CCM_BLOCK_IV_OFFSET, CCM_BLOCK_IV_SIZE); + memcpy(areq_ctx->backup_giv, areq_ctx->ctr_iv + + CCM_BLOCK_IV_OFFSET, CCM_BLOCK_IV_SIZE); } } @@ -275,8 +281,9 @@ static int xcbc_setkey(struct cc_hw_desc *desc, struct ssi_aead_ctx *ctx) { /* Load the AES key */ hw_desc_init(&desc[0]); - /* We are using for the source/user key the same buffer as for the output keys, - * because after this key loading it is not needed anymore + /* We are using for the source/user key the same buffer + * as for the output keys, * because after this key loading it + * is not needed anymore */ set_din_type(&desc[0], DMA_DLLI, ctx->auth_state.xcbc.xcbc_keys_dma_addr, ctx->auth_keylen, @@ -428,7 +435,8 @@ static int validate_keys_sizes(struct ssi_aead_ctx *ctx) * (copy to intenral buffer or hash in case of key longer than block */ static int -ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) +ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, + unsigned int keylen) { dma_addr_t key_dma_addr = 0; struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); @@ -459,7 +467,8 @@ ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, unsigned int keyl } if (likely(keylen != 0)) { - key_dma_addr = dma_map_single(dev, (void *)key, keylen, DMA_TO_DEVICE); + key_dma_addr = dma_map_single(dev, (void *)key, keylen, + DMA_TO_DEVICE); if (unlikely(dma_mapping_error(dev, key_dma_addr))) { dev_err(dev, "Mapping key va=0x%p len=%u for DMA failed\n", key, keylen); @@ -587,8 +596,9 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) /* Copy nonce from last 4 bytes in CTR key to * first 4 bytes in CTR IV */ - memcpy(ctx->ctr_nonce, key + ctx->auth_keylen + ctx->enc_keylen - - CTR_RFC3686_NONCE_SIZE, CTR_RFC3686_NONCE_SIZE); + memcpy(ctx->ctr_nonce, key + ctx->auth_keylen + + ctx->enc_keylen - CTR_RFC3686_NONCE_SIZE, + CTR_RFC3686_NONCE_SIZE); /* Set CTR key size */ ctx->enc_keylen -= CTR_RFC3686_NONCE_SIZE; } @@ -654,7 +664,8 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) } #if SSI_CC_HAS_AES_CCM -static int ssi_rfc4309_ccm_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) +static int ssi_rfc4309_ccm_setkey(struct crypto_aead *tfm, const u8 *key, + unsigned int keylen) { struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); @@ -856,7 +867,8 @@ ssi_aead_process_cipher_data_desc( hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_DLLI, (sg_dma_address(areq_ctx->src_sgl) + - areq_ctx->src_offset), areq_ctx->cryptlen, NS_BIT); + areq_ctx->src_offset), areq_ctx->cryptlen, + NS_BIT); set_dout_dlli(&desc[idx], (sg_dma_address(areq_ctx->dst_sgl) + areq_ctx->dst_offset), @@ -1256,7 +1268,8 @@ static inline void ssi_aead_hmac_authenc( ssi_aead_hmac_setup_digest_desc(req, desc, seq_size); ssi_aead_setup_cipher_desc(req, desc, seq_size); ssi_aead_process_digest_header_desc(req, desc, seq_size); - ssi_aead_process_cipher_data_desc(req, data_flow_mode, desc, seq_size); + ssi_aead_process_cipher_data_desc(req, data_flow_mode, desc, + seq_size); ssi_aead_process_digest_scheme_desc(req, desc, seq_size); ssi_aead_process_digest_result_desc(req, desc, seq_size); return; @@ -1272,14 +1285,16 @@ static inline void ssi_aead_hmac_authenc( ssi_aead_process_cipher(req, desc, seq_size, data_flow_mode); /* authenc after..*/ ssi_aead_hmac_setup_digest_desc(req, desc, seq_size); - ssi_aead_process_authenc_data_desc(req, DIN_HASH, desc, seq_size, direct); + ssi_aead_process_authenc_data_desc(req, DIN_HASH, desc, + seq_size, direct); ssi_aead_process_digest_scheme_desc(req, desc, seq_size); ssi_aead_process_digest_result_desc(req, desc, seq_size); } else { /*DECRYPT*/ /* authenc first..*/ ssi_aead_hmac_setup_digest_desc(req, desc, seq_size); - ssi_aead_process_authenc_data_desc(req, DIN_HASH, desc, seq_size, direct); + ssi_aead_process_authenc_data_desc(req, DIN_HASH, desc, + seq_size, direct); ssi_aead_process_digest_scheme_desc(req, desc, seq_size); /* decrypt after.. */ ssi_aead_process_cipher(req, desc, seq_size, data_flow_mode); @@ -1310,7 +1325,8 @@ ssi_aead_xcbc_authenc( ssi_aead_xcbc_setup_digest_desc(req, desc, seq_size); ssi_aead_setup_cipher_desc(req, desc, seq_size); ssi_aead_process_digest_header_desc(req, desc, seq_size); - ssi_aead_process_cipher_data_desc(req, data_flow_mode, desc, seq_size); + ssi_aead_process_cipher_data_desc(req, data_flow_mode, desc, + seq_size); ssi_aead_process_digest_result_desc(req, desc, seq_size); return; } @@ -1325,12 +1341,14 @@ ssi_aead_xcbc_authenc( ssi_aead_process_cipher(req, desc, seq_size, data_flow_mode); /* authenc after.. */ ssi_aead_xcbc_setup_digest_desc(req, desc, seq_size); - ssi_aead_process_authenc_data_desc(req, DIN_HASH, desc, seq_size, direct); + ssi_aead_process_authenc_data_desc(req, DIN_HASH, desc, + seq_size, direct); ssi_aead_process_digest_result_desc(req, desc, seq_size); } else { /*DECRYPT*/ /* authenc first.. */ ssi_aead_xcbc_setup_digest_desc(req, desc, seq_size); - ssi_aead_process_authenc_data_desc(req, DIN_HASH, desc, seq_size, direct); + ssi_aead_process_authenc_data_desc(req, DIN_HASH, desc, + seq_size, direct); /* decrypt after..*/ ssi_aead_process_cipher(req, desc, seq_size, data_flow_mode); /* read the digest result with setting the completion bit @@ -1521,7 +1539,8 @@ static inline int ssi_aead_ccm( /* process the cipher */ if (req_ctx->cryptlen) - ssi_aead_process_cipher_data_desc(req, cipher_flow_mode, desc, &idx); + ssi_aead_process_cipher_data_desc(req, cipher_flow_mode, desc, + &idx); /* Read temporal MAC */ hw_desc_init(&desc[idx]); @@ -1571,7 +1590,9 @@ static int config_ccm_adata(struct aead_request *req) struct aead_req_ctx *req_ctx = aead_request_ctx(req); //unsigned int size_of_a = 0, rem_a_size = 0; unsigned int lp = req->iv[0]; - /* Note: The code assume that req->iv[0] already contains the value of L' of RFC3610 */ + /* Note: The code assume that req->iv[0] already contains the value + * of L' of RFC3610 + */ unsigned int l = lp + 1; /* This is L' of RFC 3610. */ unsigned int m = ctx->authsize; /* This is M' of RFC 3610. */ u8 *b0 = req_ctx->ccm_config + CCM_B0_OFFSET; @@ -1628,11 +1649,18 @@ static void ssi_rfc4309_ccm_process(struct aead_request *req) /* L' */ memset(areq_ctx->ctr_iv, 0, AES_BLOCK_SIZE); - areq_ctx->ctr_iv[0] = 3; /* For RFC 4309, always use 4 bytes for message length (at most 2^32-1 bytes). */ + /* For RFC 4309, always use 4 bytes for message length + * (at most 2^32-1 bytes). + */ + areq_ctx->ctr_iv[0] = 3; - /* In RFC 4309 there is an 11-bytes nonce+IV part, that we build here. */ - memcpy(areq_ctx->ctr_iv + CCM_BLOCK_NONCE_OFFSET, ctx->ctr_nonce, CCM_BLOCK_NONCE_SIZE); - memcpy(areq_ctx->ctr_iv + CCM_BLOCK_IV_OFFSET, req->iv, CCM_BLOCK_IV_SIZE); + /* In RFC 4309 there is an 11-bytes nonce+IV part, + * that we build here. + */ + memcpy(areq_ctx->ctr_iv + CCM_BLOCK_NONCE_OFFSET, ctx->ctr_nonce, + CCM_BLOCK_NONCE_SIZE); + memcpy(areq_ctx->ctr_iv + CCM_BLOCK_IV_OFFSET, req->iv, + CCM_BLOCK_IV_SIZE); req->iv = areq_ctx->ctr_iv; req->assoclen -= CCM_BLOCK_IV_SIZE; } @@ -1704,7 +1732,9 @@ static inline void ssi_aead_gcm_setup_ghash_desc( set_setup_mode(&desc[idx], SETUP_LOAD_KEY0); idx++; - /* Load GHASH initial STATE (which is 0). (for any hash there is an initial state) */ + /* Load GHASH initial STATE (which is 0). (for any hash there is an + * initial state) + */ hw_desc_init(&desc[idx]); set_din_const(&desc[idx], 0x0, AES_BLOCK_SIZE); set_dout_no_dma(&desc[idx], 0, 0, 1); @@ -1855,7 +1885,8 @@ static inline int ssi_aead_gcm( ssi_aead_gcm_setup_gctr_desc(req, desc, seq_size); /* process(gctr+ghash) */ if (req_ctx->cryptlen) - ssi_aead_process_cipher_data_desc(req, cipher_flow_mode, desc, seq_size); + ssi_aead_process_cipher_data_desc(req, cipher_flow_mode, desc, + seq_size); ssi_aead_process_gcm_result_desc(req, desc, seq_size); return 0; @@ -1895,13 +1926,16 @@ static inline void ssi_aead_dump_gcm( dump_byte_array("mac_buf", req_ctx->mac_buf, AES_BLOCK_SIZE); - dump_byte_array("gcm_len_block", req_ctx->gcm_len_block.len_a, AES_BLOCK_SIZE); + dump_byte_array("gcm_len_block", req_ctx->gcm_len_block.len_a, + AES_BLOCK_SIZE); if (req->src && req->cryptlen) - dump_byte_array("req->src", sg_virt(req->src), req->cryptlen + req->assoclen); + dump_byte_array("req->src", sg_virt(req->src), + req->cryptlen + req->assoclen); if (req->dst) - dump_byte_array("req->dst", sg_virt(req->dst), req->cryptlen + ctx->authsize + req->assoclen); + dump_byte_array("req->dst", sg_virt(req->dst), + req->cryptlen + ctx->authsize + req->assoclen); } #endif @@ -1939,10 +1973,14 @@ static int config_gcm_context(struct aead_request *req) memcpy(&req_ctx->gcm_len_block.len_a, &temp64, sizeof(temp64)); temp64 = cpu_to_be64(cryptlen * 8); memcpy(&req_ctx->gcm_len_block.len_c, &temp64, 8); - } else { //rfc4543=> all data(AAD,IV,Plain) are considered additional data that is nothing is encrypted. + } else { + /* rfc4543=> all data(AAD,IV,Plain) are considered additional + * data that is nothing is encrypted. + */ __be64 temp64; - temp64 = cpu_to_be64((req->assoclen + GCM_BLOCK_RFC4_IV_SIZE + cryptlen) * 8); + temp64 = cpu_to_be64((req->assoclen + GCM_BLOCK_RFC4_IV_SIZE + + cryptlen) * 8); memcpy(&req_ctx->gcm_len_block.len_a, &temp64, sizeof(temp64)); temp64 = 0; memcpy(&req_ctx->gcm_len_block.len_c, &temp64, 8); @@ -1957,15 +1995,18 @@ static void ssi_rfc4_gcm_process(struct aead_request *req) struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); struct aead_req_ctx *areq_ctx = aead_request_ctx(req); - memcpy(areq_ctx->ctr_iv + GCM_BLOCK_RFC4_NONCE_OFFSET, ctx->ctr_nonce, GCM_BLOCK_RFC4_NONCE_SIZE); - memcpy(areq_ctx->ctr_iv + GCM_BLOCK_RFC4_IV_OFFSET, req->iv, GCM_BLOCK_RFC4_IV_SIZE); + memcpy(areq_ctx->ctr_iv + GCM_BLOCK_RFC4_NONCE_OFFSET, + ctx->ctr_nonce, GCM_BLOCK_RFC4_NONCE_SIZE); + memcpy(areq_ctx->ctr_iv + GCM_BLOCK_RFC4_IV_OFFSET, req->iv, + GCM_BLOCK_RFC4_IV_SIZE); req->iv = areq_ctx->ctr_iv; req->assoclen -= GCM_BLOCK_RFC4_IV_SIZE; } #endif /*SSI_CC_HAS_AES_GCM*/ -static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction direct) +static int ssi_aead_process(struct aead_request *req, + enum drv_crypto_direction direct) { int rc = 0; int seq_len = 0; @@ -2006,7 +2047,8 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction /* Build CTR IV - Copy nonce from last 4 bytes in * CTR key to first 4 bytes in CTR IV */ - memcpy(areq_ctx->ctr_iv, ctx->ctr_nonce, CTR_RFC3686_NONCE_SIZE); + memcpy(areq_ctx->ctr_iv, ctx->ctr_nonce, + CTR_RFC3686_NONCE_SIZE); if (!areq_ctx->backup_giv) /*User none-generated IV*/ memcpy(areq_ctx->ctr_iv + CTR_RFC3686_NONCE_SIZE, req->iv, CTR_RFC3686_IV_SIZE); @@ -2021,7 +2063,8 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction (ctx->cipher_mode == DRV_CIPHER_GCTR)) { areq_ctx->hw_iv_size = AES_BLOCK_SIZE; if (areq_ctx->ctr_iv != req->iv) { - memcpy(areq_ctx->ctr_iv, req->iv, crypto_aead_ivsize(tfm)); + memcpy(areq_ctx->ctr_iv, req->iv, + crypto_aead_ivsize(tfm)); req->iv = areq_ctx->ctr_iv; } } else { @@ -2064,20 +2107,29 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction if (areq_ctx->backup_giv) { /* set the DMA mapped IV address*/ if (ctx->cipher_mode == DRV_CIPHER_CTR) { - ssi_req.ivgen_dma_addr[0] = areq_ctx->gen_ctx.iv_dma_addr + CTR_RFC3686_NONCE_SIZE; + ssi_req.ivgen_dma_addr[0] = + areq_ctx->gen_ctx.iv_dma_addr + + CTR_RFC3686_NONCE_SIZE; ssi_req.ivgen_dma_addr_len = 1; } else if (ctx->cipher_mode == DRV_CIPHER_CCM) { - /* In ccm, the IV needs to exist both inside B0 and inside the counter. - * It is also copied to iv_dma_addr for other reasons (like returning - * it to the user). + /* In ccm, the IV needs to exist both inside B0 and + * inside the counter.It is also copied to iv_dma_addr + * for other reasons (like returning it to the user). * So, using 3 (identical) IV outputs. */ - ssi_req.ivgen_dma_addr[0] = areq_ctx->gen_ctx.iv_dma_addr + CCM_BLOCK_IV_OFFSET; - ssi_req.ivgen_dma_addr[1] = sg_dma_address(&areq_ctx->ccm_adata_sg) + CCM_B0_OFFSET + CCM_BLOCK_IV_OFFSET; - ssi_req.ivgen_dma_addr[2] = sg_dma_address(&areq_ctx->ccm_adata_sg) + CCM_CTR_COUNT_0_OFFSET + CCM_BLOCK_IV_OFFSET; + ssi_req.ivgen_dma_addr[0] = + areq_ctx->gen_ctx.iv_dma_addr + + CCM_BLOCK_IV_OFFSET; + ssi_req.ivgen_dma_addr[1] = + sg_dma_address(&areq_ctx->ccm_adata_sg) + + CCM_B0_OFFSET + CCM_BLOCK_IV_OFFSET; + ssi_req.ivgen_dma_addr[2] = + sg_dma_address(&areq_ctx->ccm_adata_sg) + + CCM_CTR_COUNT_0_OFFSET + CCM_BLOCK_IV_OFFSET; ssi_req.ivgen_dma_addr_len = 3; } else { - ssi_req.ivgen_dma_addr[0] = areq_ctx->gen_ctx.iv_dma_addr; + ssi_req.ivgen_dma_addr[0] = + areq_ctx->gen_ctx.iv_dma_addr; ssi_req.ivgen_dma_addr_len = 1; } @@ -2232,7 +2284,8 @@ static int ssi_rfc4309_ccm_decrypt(struct aead_request *req) #if SSI_CC_HAS_AES_GCM -static int ssi_rfc4106_gcm_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) +static int ssi_rfc4106_gcm_setkey(struct crypto_aead *tfm, const u8 *key, + unsigned int keylen) { struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); struct device *dev = drvdata_to_dev(ctx->drvdata); @@ -2248,7 +2301,8 @@ static int ssi_rfc4106_gcm_setkey(struct crypto_aead *tfm, const u8 *key, unsign return ssi_aead_setkey(tfm, key, keylen); } -static int ssi_rfc4543_gcm_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) +static int ssi_rfc4543_gcm_setkey(struct crypto_aead *tfm, const u8 *key, + unsigned int keylen) { struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); struct device *dev = drvdata_to_dev(ctx->drvdata); @@ -2696,7 +2750,8 @@ static struct ssi_crypto_alg *ssi_aead_create_alg( alg = &template->template_aead; - snprintf(alg->base.cra_name, CRYPTO_MAX_ALG_NAME, "%s", template->name); + snprintf(alg->base.cra_name, CRYPTO_MAX_ALG_NAME, "%s", + template->name); snprintf(alg->base.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", template->driver_name); alg->base.cra_module = THIS_MODULE; @@ -2725,7 +2780,8 @@ int ssi_aead_free(struct ssi_drvdata *drvdata) if (aead_handle) { /* Remove registered algs */ - list_for_each_entry_safe(t_alg, n, &aead_handle->aead_list, entry) { + list_for_each_entry_safe(t_alg, n, &aead_handle->aead_list, + entry) { crypto_unregister_aead(&t_alg->aead_alg); list_del(&t_alg->entry); kfree(t_alg); diff --git a/drivers/staging/ccree/ssi_aead.h b/drivers/staging/ccree/ssi_aead.h index 580fdb8..4e29063 100644 --- a/drivers/staging/ccree/ssi_aead.h +++ b/drivers/staging/ccree/ssi_aead.h @@ -74,17 +74,22 @@ struct aead_req_ctx { } gcm_len_block; u8 ccm_config[CCM_CONFIG_BUF_SIZE] ____cacheline_aligned; - unsigned int hw_iv_size ____cacheline_aligned; /*HW actual size input*/ - u8 backup_mac[MAX_MAC_SIZE]; /*used to prevent cache coherence problem*/ + /* HW actual size input */ + unsigned int hw_iv_size ____cacheline_aligned; + /* used to prevent cache coherence problem */ + u8 backup_mac[MAX_MAC_SIZE]; u8 *backup_iv; /*store iv for generated IV flow*/ u8 *backup_giv; /*store iv for rfc3686(ctr) flow*/ dma_addr_t mac_buf_dma_addr; /* internal ICV DMA buffer */ - dma_addr_t ccm_iv0_dma_addr; /* buffer for internal ccm configurations */ + /* buffer for internal ccm configurations */ + dma_addr_t ccm_iv0_dma_addr; dma_addr_t icv_dma_addr; /* Phys. address of ICV */ //used in gcm - dma_addr_t gcm_iv_inc1_dma_addr; /* buffer for internal gcm configurations */ - dma_addr_t gcm_iv_inc2_dma_addr; /* buffer for internal gcm configurations */ + /* buffer for internal gcm configurations */ + dma_addr_t gcm_iv_inc1_dma_addr; + /* buffer for internal gcm configurations */ + dma_addr_t gcm_iv_inc2_dma_addr; dma_addr_t hkey_dma_addr; /* Phys. address of hkey */ dma_addr_t gcm_block_len_dma_addr; /* Phys. address of gcm block len */ bool is_gcm4543; diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index 5e01477..966033d 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -112,7 +112,8 @@ static unsigned int cc_get_sgl_nents( nents++; /* get the number of bytes in the last entry */ *lbytes = nbytes; - nbytes -= (sg_list->length > nbytes) ? nbytes : sg_list->length; + nbytes -= (sg_list->length > nbytes) ? + nbytes : sg_list->length; sg_list = sg_next(sg_list); } else { sg_list = (struct scatterlist *)sg_page(sg_list); @@ -433,7 +434,8 @@ ssi_aead_handle_config_buf(struct device *dev, { dev_dbg(dev, " handle additional data config set to DLLI\n"); /* create sg for the current buffer */ - sg_init_one(&areq_ctx->ccm_adata_sg, config_data, AES_BLOCK_SIZE + areq_ctx->ccm_hdr_size); + sg_init_one(&areq_ctx->ccm_adata_sg, config_data, + AES_BLOCK_SIZE + areq_ctx->ccm_hdr_size); if (unlikely(dma_map_sg(dev, &areq_ctx->ccm_adata_sg, 1, DMA_TO_DEVICE) != 1)) { dev_err(dev, "dma_map_sg() config buffer failed\n"); @@ -701,7 +703,8 @@ void cc_unmap_aead_request(struct device *dev, struct aead_request *req) areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT && likely(req->src == req->dst)) { /* copy back mac from temporary location to deal with possible - * data memory overriding that caused by cache coherence problem. + * data memory overriding that caused by cache coherence + * problem. */ cc_copy_mac(dev, req, SSI_SG_FROM_BUF); } @@ -716,7 +719,9 @@ static inline int cc_get_aead_icv_nents( bool *is_icv_fragmented) { unsigned int icv_max_size = 0; - unsigned int icv_required_size = authsize > last_entry_data_size ? (authsize - last_entry_data_size) : authsize; + unsigned int icv_required_size = authsize > last_entry_data_size ? + (authsize - last_entry_data_size) : + authsize; unsigned int nents; unsigned int i; @@ -735,10 +740,12 @@ static inline int cc_get_aead_icv_nents( icv_max_size = sgl->length; if (last_entry_data_size > authsize) { - nents = 0; /* ICV attached to data in last entry (not fragmented!) */ + /* ICV attached to data in last entry (not fragmented!) */ + nents = 0; *is_icv_fragmented = false; } else if (last_entry_data_size == authsize) { - nents = 1; /* ICV placed in whole last entry (not fragmented!) */ + /* ICV placed in whole last entry (not fragmented!) */ + nents = 1; *is_icv_fragmented = false; } else if (icv_max_size > icv_required_size) { nents = 1; @@ -773,7 +780,8 @@ static inline int cc_aead_chain_iv( goto chain_iv_exit; } - areq_ctx->gen_ctx.iv_dma_addr = dma_map_single(dev, req->iv, hw_iv_size, + areq_ctx->gen_ctx.iv_dma_addr = dma_map_single(dev, req->iv, + hw_iv_size, DMA_BIDIRECTIONAL); if (unlikely(dma_mapping_error(dev, areq_ctx->gen_ctx.iv_dma_addr))) { dev_err(dev, "Mapping iv %u B at va=%pK for DMA failed\n", @@ -784,7 +792,8 @@ static inline int cc_aead_chain_iv( dev_dbg(dev, "Mapped iv %u B at va=%pK to dma=%pad\n", hw_iv_size, req->iv, &areq_ctx->gen_ctx.iv_dma_addr); - if (do_chain && areq_ctx->plaintext_authenticate_only) { // TODO: what about CTR?? ask Ron + // TODO: what about CTR?? ask Ron + if (do_chain && areq_ctx->plaintext_authenticate_only) { struct crypto_aead *tfm = crypto_aead_reqtfm(req); unsigned int iv_size_to_authenc = crypto_aead_ivsize(tfm); unsigned int iv_ofs = GCM_BLOCK_RFC4_IV_OFFSET; @@ -836,12 +845,15 @@ static inline int cc_aead_chain_assoc( //iterate over the sgl to see how many entries are for associated data //it is assumed that if we reach here , the sgl is already mapped sg_index = current_sg->length; - if (sg_index > size_of_assoc) { //the first entry in the scatter list contains all the associated data + //the first entry in the scatter list contains all the associated data + if (sg_index > size_of_assoc) { mapped_nents++; } else { while (sg_index <= size_of_assoc) { current_sg = sg_next(current_sg); - //if have reached the end of the sgl, then this is unexpected + /* if have reached the end of the sgl, then this is + * unexpected + */ if (!current_sg) { dev_err(dev, "reached end of sg list. unexpected\n"); return -EINVAL; @@ -959,8 +971,8 @@ static inline int cc_prepare_aead_data_mlli( if (unlikely(areq_ctx->is_icv_fragmented)) { /* Backup happens only when ICV is fragmented, ICV - * verification is made by CPU compare in order to simplify - * MAC verification upon request completion + * verification is made by CPU compare in order to + * simplify MAC verification upon request completion */ if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) { /* In coherent platforms (e.g. ACP) @@ -974,7 +986,8 @@ static inline int cc_prepare_aead_data_mlli( areq_ctx->icv_virt_addr = areq_ctx->backup_mac; } else { areq_ctx->icv_virt_addr = areq_ctx->mac_buf; - areq_ctx->icv_dma_addr = areq_ctx->mac_buf_dma_addr; + areq_ctx->icv_dma_addr = + areq_ctx->mac_buf_dma_addr; } } else { /* Contig. ICV */ /*Should hanlde if the sg is not contig.*/ @@ -1076,7 +1089,8 @@ static inline int cc_aead_chain_data( int rc = 0; u32 src_mapped_nents = 0, dst_mapped_nents = 0; u32 offset = 0; - unsigned int size_for_map = req->assoclen + req->cryptlen; /*non-inplace mode*/ + /* non-inplace mode */ + unsigned int size_for_map = req->assoclen + req->cryptlen; struct crypto_aead *tfm = crypto_aead_reqtfm(req); u32 sg_index = 0; bool chained = false; @@ -1097,7 +1111,8 @@ static inline int cc_aead_chain_data( if (is_gcm4543) size_for_map += crypto_aead_ivsize(tfm); - size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize : 0; + size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? + authsize : 0; src_mapped_nents = cc_get_sgl_nents(dev, req->src, size_for_map, &src_last_bytes, &chained); sg_index = areq_ctx->src_sgl->length; @@ -1125,7 +1140,8 @@ static inline int cc_aead_chain_data( if (req->src != req->dst) { size_for_map = req->assoclen + req->cryptlen; - size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize : 0; + size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? + authsize : 0; if (is_gcm4543) size_for_map += crypto_aead_ivsize(tfm); @@ -1276,12 +1292,13 @@ int cc_map_aead_request( } if (areq_ctx->ccm_hdr_size != ccm_header_size_null) { - areq_ctx->ccm_iv0_dma_addr = dma_map_single(dev, - (areq_ctx->ccm_config + CCM_CTR_COUNT_0_OFFSET), - AES_BLOCK_SIZE, - DMA_TO_DEVICE); + areq_ctx->ccm_iv0_dma_addr = + dma_map_single(dev, (areq_ctx->ccm_config + + CCM_CTR_COUNT_0_OFFSET), + AES_BLOCK_SIZE, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(dev, areq_ctx->ccm_iv0_dma_addr))) { + if (unlikely(dma_mapping_error(dev, + areq_ctx->ccm_iv0_dma_addr))) { dev_err(dev, "Mapping mac_buf %u B at va=%pK for DMA failed\n", AES_BLOCK_SIZE, (areq_ctx->ccm_config + @@ -1304,30 +1321,31 @@ int cc_map_aead_request( areq_ctx->hkey, AES_BLOCK_SIZE, DMA_BIDIRECTIONAL); - if (unlikely(dma_mapping_error(dev, areq_ctx->hkey_dma_addr))) { + if (unlikely(dma_mapping_error(dev, + areq_ctx->hkey_dma_addr))) { dev_err(dev, "Mapping hkey %u B at va=%pK for DMA failed\n", AES_BLOCK_SIZE, areq_ctx->hkey); rc = -ENOMEM; goto aead_map_failure; } - areq_ctx->gcm_block_len_dma_addr = dma_map_single(dev, - &areq_ctx->gcm_len_block, - AES_BLOCK_SIZE, - DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_block_len_dma_addr))) { + areq_ctx->gcm_block_len_dma_addr = + dma_map_single(dev, &areq_ctx->gcm_len_block, + AES_BLOCK_SIZE, DMA_TO_DEVICE); + if (unlikely(dma_mapping_error(dev, + areq_ctx->gcm_block_len_dma_addr))) { dev_err(dev, "Mapping gcm_len_block %u B at va=%pK for DMA failed\n", AES_BLOCK_SIZE, &areq_ctx->gcm_len_block); rc = -ENOMEM; goto aead_map_failure; } - areq_ctx->gcm_iv_inc1_dma_addr = dma_map_single(dev, - areq_ctx->gcm_iv_inc1, - AES_BLOCK_SIZE, - DMA_TO_DEVICE); + areq_ctx->gcm_iv_inc1_dma_addr = + dma_map_single(dev, areq_ctx->gcm_iv_inc1, + AES_BLOCK_SIZE, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_iv_inc1_dma_addr))) { + if (unlikely(dma_mapping_error(dev, + areq_ctx->gcm_iv_inc1_dma_addr))) { dev_err(dev, "Mapping gcm_iv_inc1 %u B at va=%pK for DMA failed\n", AES_BLOCK_SIZE, (areq_ctx->gcm_iv_inc1)); areq_ctx->gcm_iv_inc1_dma_addr = 0; @@ -1335,12 +1353,12 @@ int cc_map_aead_request( goto aead_map_failure; } - areq_ctx->gcm_iv_inc2_dma_addr = dma_map_single(dev, - areq_ctx->gcm_iv_inc2, - AES_BLOCK_SIZE, - DMA_TO_DEVICE); + areq_ctx->gcm_iv_inc2_dma_addr = + dma_map_single(dev, areq_ctx->gcm_iv_inc2, + AES_BLOCK_SIZE, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_iv_inc2_dma_addr))) { + if (unlikely(dma_mapping_error(dev, + areq_ctx->gcm_iv_inc2_dma_addr))) { dev_err(dev, "Mapping gcm_iv_inc2 %u B at va=%pK for DMA failed\n", AES_BLOCK_SIZE, (areq_ctx->gcm_iv_inc2)); areq_ctx->gcm_iv_inc2_dma_addr = 0; @@ -1414,7 +1432,9 @@ int cc_map_aead_request( goto aead_map_failure; } - /* Mlli support -start building the MLLI according to the above results */ + /* Mlli support -start building the MLLI according to the above + * results + */ if (unlikely( areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI || areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI)) { @@ -1667,7 +1687,9 @@ void cc_unmap_hash_request(struct device *dev, void *ctx, sg_dma_len(areq_ctx->buff_sg)); dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE); if (!do_revert) { - /* clean the previous data length for update operation */ + /* clean the previous data length for update + * operation + */ *prev_len = 0; } else { areq_ctx->buff_index ^= 1; diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c index 4c1080a..f6e680c 100644 --- a/drivers/staging/ccree/ssi_cipher.c +++ b/drivers/staging/ccree/ssi_cipher.c @@ -109,7 +109,8 @@ static int validate_keys_sizes(struct ssi_ablkcipher_ctx *ctx_p, u32 size) return -EINVAL; } -static int validate_data_size(struct ssi_ablkcipher_ctx *ctx_p, unsigned int size) +static int validate_data_size(struct ssi_ablkcipher_ctx *ctx_p, + unsigned int size) { switch (ctx_p->flow_mode) { case S_DIN_to_AES: @@ -164,12 +165,16 @@ static int validate_data_size(struct ssi_ablkcipher_ctx *ctx_p, unsigned int siz static unsigned int get_max_keysize(struct crypto_tfm *tfm) { - struct ssi_crypto_alg *ssi_alg = container_of(tfm->__crt_alg, struct ssi_crypto_alg, crypto_alg); + struct ssi_crypto_alg *ssi_alg = + container_of(tfm->__crt_alg, struct ssi_crypto_alg, + crypto_alg); - if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_ABLKCIPHER) + if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_TYPE_MASK) == + CRYPTO_ALG_TYPE_ABLKCIPHER) return ssi_alg->crypto_alg.cra_ablkcipher.max_keysize; - if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_BLKCIPHER) + if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_TYPE_MASK) == + CRYPTO_ALG_TYPE_BLKCIPHER) return ssi_alg->crypto_alg.cra_blkcipher.max_keysize; return 0; @@ -267,8 +272,10 @@ static int ssi_verify_3des_keys(const u8 *key, unsigned int keylen) struct tdes_keys *tdes_key = (struct tdes_keys *)key; /* verify key1 != key2 and key3 != key2*/ - if (unlikely((memcmp((u8 *)tdes_key->key1, (u8 *)tdes_key->key2, sizeof(tdes_key->key1)) == 0) || - (memcmp((u8 *)tdes_key->key3, (u8 *)tdes_key->key2, sizeof(tdes_key->key3)) == 0))) { + if (unlikely((memcmp((u8 *)tdes_key->key1, (u8 *)tdes_key->key2, + sizeof(tdes_key->key1)) == 0) || + (memcmp((u8 *)tdes_key->key3, (u8 *)tdes_key->key2, + sizeof(tdes_key->key3)) == 0))) { return -ENOEXEC; } @@ -306,7 +313,9 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, /* STAT_PHASE_0: Init and sanity checks */ #if SSI_CC_HAS_MULTI2 - /*last byte of key buffer is round number and should not be a part of key size*/ + /* last byte of key buffer is round number and should not be a part + * of key size + */ if (ctx_p->flow_mode == S_DIN_to_MULTI2) keylen -= 1; #endif /*SSI_CC_HAS_MULTI2*/ @@ -341,7 +350,8 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, hki->hw_key1, hki->hw_key2); return -EINVAL; } - ctx_p->hw.key2_slot = hw_key_to_cc_hw_key(hki->hw_key2); + ctx_p->hw.key2_slot = + hw_key_to_cc_hw_key(hki->hw_key2); if (unlikely(ctx_p->hw.key2_slot == END_OF_KEYS)) { dev_err(dev, "Unsupported hw key2 number (%d)\n", hki->hw_key2); @@ -383,7 +393,8 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, if (ctx_p->flow_mode == S_DIN_to_MULTI2) { #if SSI_CC_HAS_MULTI2 memcpy(ctx_p->user.key, key, CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE); - ctx_p->key_round_number = key[CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE]; + ctx_p->key_round_number = + key[CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE]; if (ctx_p->key_round_number < CC_MULTI2_MIN_NUM_ROUNDS || ctx_p->key_round_number > CC_MULTI2_MAX_NUM_ROUNDS) { crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN); @@ -393,7 +404,8 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, } else { memcpy(ctx_p->user.key, key, keylen); if (keylen == 24) - memset(ctx_p->user.key + 24, 0, CC_AES_KEY_SIZE_MAX - 24); + memset(ctx_p->user.key + 24, 0, + CC_AES_KEY_SIZE_MAX - 24); if (ctx_p->cipher_mode == DRV_CIPHER_ESSIV) { /* sha256 for key2 - use sw implementation */ @@ -403,7 +415,9 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, desc->tfm = ctx_p->shash_tfm; - err = crypto_shash_digest(desc, ctx_p->user.key, key_len, ctx_p->user.key + key_len); + err = crypto_shash_digest(desc, ctx_p->user.key, + key_len, + ctx_p->user.key + key_len); if (err) { dev_err(dev, "Failed to hash ESSIV key.\n"); return err; @@ -437,11 +451,15 @@ ssi_blkcipher_create_setup_desc( dma_addr_t iv_dma_addr = req_ctx->gen_ctx.iv_dma_addr; unsigned int du_size = nbytes; - struct ssi_crypto_alg *ssi_alg = container_of(tfm->__crt_alg, struct ssi_crypto_alg, crypto_alg); + struct ssi_crypto_alg *ssi_alg = + container_of(tfm->__crt_alg, struct ssi_crypto_alg, + crypto_alg); - if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_BULK_MASK) == CRYPTO_ALG_BULK_DU_512) + if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_BULK_MASK) == + CRYPTO_ALG_BULK_DU_512) du_size = 512; - if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_BULK_MASK) == CRYPTO_ALG_BULK_DU_4096) + if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_BULK_MASK) == + CRYPTO_ALG_BULK_DU_4096) du_size = 4096; switch (cipher_mode) { @@ -765,7 +783,8 @@ static int ssi_blkcipher_process( memcpy(req_ctx->iv, info, ivsize); /*For CTS in case of data size aligned to 16 use CBC mode*/ - if (((nbytes % AES_BLOCK_SIZE) == 0) && ctx_p->cipher_mode == DRV_CIPHER_CBC_CTS) { + if (((nbytes % AES_BLOCK_SIZE) == 0) && + ctx_p->cipher_mode == DRV_CIPHER_CBC_CTS) { ctx_p->cipher_mode = DRV_CIPHER_CBC; cts_restore_flag = 1; } @@ -817,10 +836,13 @@ static int ssi_blkcipher_process( /* STAT_PHASE_3: Lock HW and push sequence */ - rc = send_request(ctx_p->drvdata, &ssi_req, desc, seq_len, (!areq) ? 0 : 1); + rc = send_request(ctx_p->drvdata, &ssi_req, desc, seq_len, + (!areq) ? 0 : 1); if (areq) { if (unlikely(rc != -EINPROGRESS)) { - /* Failed to send the request or request completed synchronously */ + /* Failed to send the request or request completed + * synchronously + */ cc_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst); } @@ -886,7 +908,10 @@ static int ssi_ablkcipher_encrypt(struct ablkcipher_request *req) req_ctx->is_giv = false; - return ssi_blkcipher_process(tfm, req_ctx, req->dst, req->src, req->nbytes, req->info, ivsize, (void *)req, DRV_CRYPTO_DIRECTION_ENCRYPT); + return ssi_blkcipher_process(tfm, req_ctx, req->dst, req->src, + req->nbytes, req->info, ivsize, + (void *)req, + DRV_CRYPTO_DIRECTION_ENCRYPT); } static int ssi_ablkcipher_decrypt(struct ablkcipher_request *req) @@ -908,7 +933,10 @@ static int ssi_ablkcipher_decrypt(struct ablkcipher_request *req) (req->nbytes - ivsize), ivsize, 0); req_ctx->is_giv = false; - return ssi_blkcipher_process(tfm, req_ctx, req->dst, req->src, req->nbytes, req->info, ivsize, (void *)req, DRV_CRYPTO_DIRECTION_DECRYPT); + return ssi_blkcipher_process(tfm, req_ctx, req->dst, req->src, + req->nbytes, req->info, ivsize, + (void *)req, + DRV_CRYPTO_DIRECTION_DECRYPT); } /* DX Block cipher alg */ diff --git a/drivers/staging/ccree/ssi_cipher.h b/drivers/staging/ccree/ssi_cipher.h index 25e6335..14c0ad9 100644 --- a/drivers/staging/ccree/ssi_cipher.h +++ b/drivers/staging/ccree/ssi_cipher.h @@ -33,7 +33,10 @@ #define CC_CRYPTO_CIPHER_KEY_KFDE3 BIT(3) #define CC_CRYPTO_CIPHER_DU_SIZE_512B BIT(4) -#define CC_CRYPTO_CIPHER_KEY_KFDE_MASK (CC_CRYPTO_CIPHER_KEY_KFDE0 | CC_CRYPTO_CIPHER_KEY_KFDE1 | CC_CRYPTO_CIPHER_KEY_KFDE2 | CC_CRYPTO_CIPHER_KEY_KFDE3) +#define CC_CRYPTO_CIPHER_KEY_KFDE_MASK (CC_CRYPTO_CIPHER_KEY_KFDE0 | \ + CC_CRYPTO_CIPHER_KEY_KFDE1 | \ + CC_CRYPTO_CIPHER_KEY_KFDE2 | \ + CC_CRYPTO_CIPHER_KEY_KFDE3) struct blkcipher_req_ctx { struct async_gen_req_ctx gen_ctx; diff --git a/drivers/staging/ccree/ssi_config.h b/drivers/staging/ccree/ssi_config.h index ff7597c..ea74845 100644 --- a/drivers/staging/ccree/ssi_config.h +++ b/drivers/staging/ccree/ssi_config.h @@ -28,9 +28,11 @@ //#define DX_DUMP_DESCS // #define DX_DUMP_BYTES // #define CC_DEBUG -#define ENABLE_CC_SYSFS /* Enable sysfs interface for debugging REE driver */ +/* Enable sysfs interface for debugging REE driver */ +#define ENABLE_CC_SYSFS //#define DX_IRQ_DELAY 100000 -#define DMA_BIT_MASK_LEN 48 /* was 32 bit, but for juno's sake it was enlarged to 48 bit */ +/* was 32 bit, but for juno's sake it was enlarged to 48 bit */ +#define DMA_BIT_MASK_LEN 48 #endif /*__DX_CONFIG_H__*/ diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c index 8d16823..b17b811 100644 --- a/drivers/staging/ccree/ssi_driver.c +++ b/drivers/staging/ccree/ssi_driver.c @@ -112,7 +112,9 @@ static irqreturn_t cc_isr(int irq, void *dev_id) drvdata->irq = irr; /* Completion interrupt - most probable */ if (likely((irr & SSI_COMP_IRQ_MASK))) { - /* Mask AXI completion interrupt - will be unmasked in Deferred service handler */ + /* Mask AXI completion interrupt - will be unmasked in + * Deferred service handler + */ cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | SSI_COMP_IRQ_MASK); irr &= ~SSI_COMP_IRQ_MASK; complete_request(drvdata); @@ -120,7 +122,9 @@ static irqreturn_t cc_isr(int irq, void *dev_id) #ifdef CC_SUPPORT_FIPS /* TEE FIPS interrupt */ if (likely((irr & SSI_GPR0_IRQ_MASK))) { - /* Mask interrupt - will be unmasked in Deferred service handler */ + /* Mask interrupt - will be unmasked in Deferred service + * handler + */ cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | SSI_GPR0_IRQ_MASK); irr &= ~SSI_GPR0_IRQ_MASK; fips_handler(drvdata); diff --git a/drivers/staging/ccree/ssi_driver.h b/drivers/staging/ccree/ssi_driver.h index 758268e..7c266ff 100644 --- a/drivers/staging/ccree/ssi_driver.h +++ b/drivers/staging/ccree/ssi_driver.h @@ -63,8 +63,10 @@ #define SSI_CC_HAS_MULTI2 0 #define SSI_CC_HAS_CMAC 1 -#define SSI_AXI_IRQ_MASK ((1 << DX_AXIM_CFG_BRESPMASK_BIT_SHIFT) | (1 << DX_AXIM_CFG_RRESPMASK_BIT_SHIFT) | \ - (1 << DX_AXIM_CFG_INFLTMASK_BIT_SHIFT) | (1 << DX_AXIM_CFG_COMPMASK_BIT_SHIFT)) +#define SSI_AXI_IRQ_MASK ((1 << DX_AXIM_CFG_BRESPMASK_BIT_SHIFT) | \ + (1 << DX_AXIM_CFG_RRESPMASK_BIT_SHIFT) | \ + (1 << DX_AXIM_CFG_INFLTMASK_BIT_SHIFT) | \ + (1 << DX_AXIM_CFG_COMPMASK_BIT_SHIFT)) #define SSI_AXI_ERR_IRQ_MASK BIT(DX_HOST_IRR_AXI_ERR_INT_BIT_SHIFT) @@ -104,8 +106,10 @@ struct ssi_crypto_req { * generated IV would be placed in it by send_request(). * Same generated IV for all addresses! */ - unsigned int ivgen_dma_addr_len; /* Amount of 'ivgen_dma_addr' elements to be filled. */ - unsigned int ivgen_size; /* The generated IV size required, 8/16 B allowed. */ + /* Amount of 'ivgen_dma_addr' elements to be filled. */ + unsigned int ivgen_dma_addr_len; + /* The generated IV size required, 8/16 B allowed. */ + unsigned int ivgen_size; struct completion seq_compl; /* request completion */ }; @@ -178,7 +182,8 @@ static inline struct device *drvdata_to_dev(struct ssi_drvdata *drvdata) } #ifdef DX_DUMP_BYTES -void dump_byte_array(const char *name, const u8 *the_array, unsigned long size); +void dump_byte_array(const char *name, const u8 *the_array, + unsigned long size); #else static inline void dump_byte_array(const char *name, const u8 *the_array, unsigned long size) {}; diff --git a/drivers/staging/ccree/ssi_fips.h b/drivers/staging/ccree/ssi_fips.h index 63bcca7..8cb1893 100644 --- a/drivers/staging/ccree/ssi_fips.h +++ b/drivers/staging/ccree/ssi_fips.h @@ -40,7 +40,8 @@ static inline int ssi_fips_init(struct ssi_drvdata *p_drvdata) } static inline void ssi_fips_fini(struct ssi_drvdata *drvdata) {} -static inline void cc_set_ree_fips_status(struct ssi_drvdata *drvdata, bool ok) {} +static inline void cc_set_ree_fips_status(struct ssi_drvdata *drvdata, + bool ok) {} static inline void fips_handler(struct ssi_drvdata *drvdata) {} #endif /* CONFIG_CRYPTO_FIPS */ diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 66b011c..4d7e565 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -164,18 +164,21 @@ static int ssi_hash_map_request(struct device *dev, if (!state->buff1) goto fail_buff0; - state->digest_result_buff = kzalloc(SSI_MAX_HASH_DIGEST_SIZE, GFP_KERNEL | GFP_DMA); + state->digest_result_buff = kzalloc(SSI_MAX_HASH_DIGEST_SIZE, + GFP_KERNEL | GFP_DMA); if (!state->digest_result_buff) goto fail_buff1; - state->digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL | GFP_DMA); + state->digest_buff = kzalloc(ctx->inter_digestsize, + GFP_KERNEL | GFP_DMA); if (!state->digest_buff) goto fail_digest_result_buff; dev_dbg(dev, "Allocated digest-buffer in context ctx->digest_buff=@%p\n", state->digest_buff); if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { - state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, GFP_KERNEL | GFP_DMA); + state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, + GFP_KERNEL | GFP_DMA); if (!state->digest_bytes_len) goto fail1; @@ -185,14 +188,17 @@ static int ssi_hash_map_request(struct device *dev, state->digest_bytes_len = NULL; } - state->opad_digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL | GFP_DMA); + state->opad_digest_buff = kzalloc(ctx->inter_digestsize, + GFP_KERNEL | GFP_DMA); if (!state->opad_digest_buff) goto fail2; dev_dbg(dev, "Allocated opad-digest-buffer in context state->digest_bytes_len=@%p\n", state->opad_digest_buff); - state->digest_buff_dma_addr = dma_map_single(dev, (void *)state->digest_buff, ctx->inter_digestsize, DMA_BIDIRECTIONAL); + state->digest_buff_dma_addr = + dma_map_single(dev, (void *)state->digest_buff, + ctx->inter_digestsize, DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, state->digest_buff_dma_addr)) { dev_err(dev, "Mapping digest len %d B at va=%pK for DMA failed\n", ctx->inter_digestsize, state->digest_buff); @@ -203,25 +209,39 @@ static int ssi_hash_map_request(struct device *dev, &state->digest_buff_dma_addr); if (is_hmac) { - dma_sync_single_for_cpu(dev, ctx->digest_buff_dma_addr, ctx->inter_digestsize, DMA_BIDIRECTIONAL); - if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC || ctx->hw_mode == DRV_CIPHER_CMAC) { + dma_sync_single_for_cpu(dev, ctx->digest_buff_dma_addr, + ctx->inter_digestsize, + DMA_BIDIRECTIONAL); + if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC || + ctx->hw_mode == DRV_CIPHER_CMAC) { memset(state->digest_buff, 0, ctx->inter_digestsize); } else { /*sha*/ - memcpy(state->digest_buff, ctx->digest_buff, ctx->inter_digestsize); + memcpy(state->digest_buff, ctx->digest_buff, + ctx->inter_digestsize); #if (DX_DEV_SHA_MAX > 256) - if (unlikely(ctx->hash_mode == DRV_HASH_SHA512 || ctx->hash_mode == DRV_HASH_SHA384)) - memcpy(state->digest_bytes_len, digest_len_sha512_init, HASH_LEN_SIZE); + if (unlikely(ctx->hash_mode == DRV_HASH_SHA512 || + ctx->hash_mode == DRV_HASH_SHA384)) + memcpy(state->digest_bytes_len, + digest_len_sha512_init, HASH_LEN_SIZE); else - memcpy(state->digest_bytes_len, digest_len_init, HASH_LEN_SIZE); + memcpy(state->digest_bytes_len, + digest_len_init, HASH_LEN_SIZE); #else - memcpy(state->digest_bytes_len, digest_len_init, HASH_LEN_SIZE); + memcpy(state->digest_bytes_len, digest_len_init, + HASH_LEN_SIZE); #endif } - dma_sync_single_for_device(dev, state->digest_buff_dma_addr, ctx->inter_digestsize, DMA_BIDIRECTIONAL); + dma_sync_single_for_device(dev, state->digest_buff_dma_addr, + ctx->inter_digestsize, + DMA_BIDIRECTIONAL); if (ctx->hash_mode != DRV_HASH_NULL) { - dma_sync_single_for_cpu(dev, ctx->opad_tmp_keys_dma_addr, ctx->inter_digestsize, DMA_BIDIRECTIONAL); - memcpy(state->opad_digest_buff, ctx->opad_tmp_keys_buff, ctx->inter_digestsize); + dma_sync_single_for_cpu(dev, + ctx->opad_tmp_keys_dma_addr, + ctx->inter_digestsize, + DMA_BIDIRECTIONAL); + memcpy(state->opad_digest_buff, + ctx->opad_tmp_keys_buff, ctx->inter_digestsize); } } else { /*hash*/ /* Copy the initial digests if hash flow. The SRAM contains the @@ -241,7 +261,9 @@ static int ssi_hash_map_request(struct device *dev, } if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { - state->digest_bytes_len_dma_addr = dma_map_single(dev, (void *)state->digest_bytes_len, HASH_LEN_SIZE, DMA_BIDIRECTIONAL); + state->digest_bytes_len_dma_addr = + dma_map_single(dev, (void *)state->digest_bytes_len, + HASH_LEN_SIZE, DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, state->digest_bytes_len_dma_addr)) { dev_err(dev, "Mapping digest len %u B at va=%pK for DMA failed\n", HASH_LEN_SIZE, state->digest_bytes_len); @@ -255,7 +277,10 @@ static int ssi_hash_map_request(struct device *dev, } if (is_hmac && ctx->hash_mode != DRV_HASH_NULL) { - state->opad_digest_dma_addr = dma_map_single(dev, (void *)state->opad_digest_buff, ctx->inter_digestsize, DMA_BIDIRECTIONAL); + state->opad_digest_dma_addr = + dma_map_single(dev, (void *)state->opad_digest_buff, + ctx->inter_digestsize, + DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, state->opad_digest_dma_addr)) { dev_err(dev, "Mapping opad digest %d B at va=%pK for DMA failed\n", ctx->inter_digestsize, @@ -277,12 +302,14 @@ static int ssi_hash_map_request(struct device *dev, fail5: if (state->digest_bytes_len_dma_addr) { - dma_unmap_single(dev, state->digest_bytes_len_dma_addr, HASH_LEN_SIZE, DMA_BIDIRECTIONAL); + dma_unmap_single(dev, state->digest_bytes_len_dma_addr, + HASH_LEN_SIZE, DMA_BIDIRECTIONAL); state->digest_bytes_len_dma_addr = 0; } fail4: if (state->digest_buff_dma_addr) { - dma_unmap_single(dev, state->digest_buff_dma_addr, ctx->inter_digestsize, DMA_BIDIRECTIONAL); + dma_unmap_single(dev, state->digest_buff_dma_addr, + ctx->inter_digestsize, DMA_BIDIRECTIONAL); state->digest_buff_dma_addr = 0; } fail3: @@ -441,7 +468,9 @@ static int ssi_hash_digest(struct ahash_req_ctx *state, ssi_req.user_arg = (void *)async_req; } - /* If HMAC then load hash IPAD xor key, if HASH then load initial digest */ + /* If HMAC then load hash IPAD xor key, if HASH then load initial + * digest + */ hw_desc_init(&desc[idx]); set_cipher_mode(&desc[idx], ctx->hw_mode); if (is_hmac) { @@ -1042,8 +1071,9 @@ static int ssi_hash_setkey(void *hash, hw_desc_init(&desc[idx]); set_din_const(&desc[idx], 0, (blocksize - digestsize)); set_flow_mode(&desc[idx], BYPASS); - set_dout_dlli(&desc[idx], (ctx->opad_tmp_keys_dma_addr + - digestsize), + set_dout_dlli(&desc[idx], + (ctx->opad_tmp_keys_dma_addr + + digestsize), (blocksize - digestsize), NS_BIT, 0); idx++; } else { @@ -1118,7 +1148,9 @@ static int ssi_hash_setkey(void *hash, set_flow_mode(&desc[idx], DIN_HASH); idx++; - /* Get the IPAD/OPAD xor key (Note, IPAD is the initial digest of the first HASH "update" state) */ + /* Get the IPAD/OPAD xor key (Note, IPAD is the initial digest + * of the first HASH "update" state) + */ hw_desc_init(&desc[idx]); set_cipher_mode(&desc[idx], ctx->hw_mode); if (i > 0) /* Not first iteration */ @@ -1136,7 +1168,8 @@ static int ssi_hash_setkey(void *hash, out: if (rc) - crypto_ahash_set_flags((struct crypto_ahash *)hash, CRYPTO_TFM_RES_BAD_KEY_LEN); + crypto_ahash_set_flags((struct crypto_ahash *)hash, + CRYPTO_TFM_RES_BAD_KEY_LEN); if (ctx->key_params.key_dma_addr) { dma_unmap_single(dev, ctx->key_params.key_dma_addr, @@ -1257,8 +1290,10 @@ static int ssi_cmac_setkey(struct crypto_ahash *ahash, keylen, DMA_TO_DEVICE); memcpy(ctx->opad_tmp_keys_buff, key, keylen); - if (keylen == 24) - memset(ctx->opad_tmp_keys_buff + 24, 0, CC_AES_KEY_SIZE_MAX - 24); + if (keylen == 24) { + memset(ctx->opad_tmp_keys_buff + 24, 0, + CC_AES_KEY_SIZE_MAX - 24); + } dma_sync_single_for_device(dev, ctx->opad_tmp_keys_dma_addr, keylen, DMA_TO_DEVICE); @@ -1298,7 +1333,9 @@ static int ssi_hash_alloc_ctx(struct ssi_hash_ctx *ctx) ctx->key_params.keylen = 0; - ctx->digest_buff_dma_addr = dma_map_single(dev, (void *)ctx->digest_buff, sizeof(ctx->digest_buff), DMA_BIDIRECTIONAL); + ctx->digest_buff_dma_addr = + dma_map_single(dev, (void *)ctx->digest_buff, + sizeof(ctx->digest_buff), DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, ctx->digest_buff_dma_addr)) { dev_err(dev, "Mapping digest len %zu B at va=%pK for DMA failed\n", sizeof(ctx->digest_buff), ctx->digest_buff); @@ -1308,7 +1345,10 @@ static int ssi_hash_alloc_ctx(struct ssi_hash_ctx *ctx) sizeof(ctx->digest_buff), ctx->digest_buff, &ctx->digest_buff_dma_addr); - ctx->opad_tmp_keys_dma_addr = dma_map_single(dev, (void *)ctx->opad_tmp_keys_buff, sizeof(ctx->opad_tmp_keys_buff), DMA_BIDIRECTIONAL); + ctx->opad_tmp_keys_dma_addr = + dma_map_single(dev, (void *)ctx->opad_tmp_keys_buff, + sizeof(ctx->opad_tmp_keys_buff), + DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, ctx->opad_tmp_keys_dma_addr)) { dev_err(dev, "Mapping opad digest %zu B at va=%pK for DMA failed\n", sizeof(ctx->opad_tmp_keys_buff), @@ -1335,7 +1375,8 @@ static int ssi_ahash_cra_init(struct crypto_tfm *tfm) struct ahash_alg *ahash_alg = container_of(hash_alg_common, struct ahash_alg, halg); struct ssi_hash_alg *ssi_alg = - container_of(ahash_alg, struct ssi_hash_alg, ahash_alg); + container_of(ahash_alg, struct ssi_hash_alg, + ahash_alg); crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), sizeof(struct ahash_req_ctx)); @@ -1473,7 +1514,9 @@ static int ssi_mac_final(struct ahash_request *req) set_setup_mode(&desc[idx], SETUP_LOAD_KEY0); idx++; - /* Initiate decryption of block state to previous block_state-XOR-M[n] */ + /* Initiate decryption of block state to previous + * block_state-XOR-M[n] + */ hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr, CC_AES_BLOCK_SIZE, NS_BIT); @@ -1502,7 +1545,8 @@ static int ssi_mac_final(struct ahash_request *req) set_flow_mode(&desc[idx], S_DIN_to_AES); idx++; } else if (rem_cnt > 0) { - ssi_hash_create_data_desc(state, ctx, DIN_AES_DOUT, desc, false, &idx); + ssi_hash_create_data_desc(state, ctx, DIN_AES_DOUT, desc, + false, &idx); } else { hw_desc_init(&desc[idx]); set_din_const(&desc[idx], 0x00, CC_AES_BLOCK_SIZE); @@ -1579,7 +1623,8 @@ static int ssi_mac_finup(struct ahash_request *req) set_flow_mode(&desc[idx], S_DIN_to_AES); idx++; } else { - ssi_hash_create_data_desc(state, ctx, DIN_AES_DOUT, desc, false, &idx); + ssi_hash_create_data_desc(state, ctx, DIN_AES_DOUT, desc, + false, &idx); } /* Get final MAC result */ @@ -1652,7 +1697,8 @@ static int ssi_mac_digest(struct ahash_request *req) set_flow_mode(&desc[idx], S_DIN_to_AES); idx++; } else { - ssi_hash_create_data_desc(state, ctx, DIN_AES_DOUT, desc, false, &idx); + ssi_hash_create_data_desc(state, ctx, DIN_AES_DOUT, desc, + false, &idx); } /* Get final MAC result */ @@ -1684,7 +1730,8 @@ static int ssi_ahash_digest(struct ahash_request *req) struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm); u32 digestsize = crypto_ahash_digestsize(tfm); - return ssi_hash_digest(state, ctx, digestsize, req->src, req->nbytes, req->result, (void *)req); + return ssi_hash_digest(state, ctx, digestsize, req->src, req->nbytes, + req->result, (void *)req); } static int ssi_ahash_update(struct ahash_request *req) @@ -1694,7 +1741,8 @@ static int ssi_ahash_update(struct ahash_request *req) struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm); unsigned int block_size = crypto_tfm_alg_blocksize(&tfm->base); - return ssi_hash_update(state, ctx, block_size, req->src, req->nbytes, (void *)req); + return ssi_hash_update(state, ctx, block_size, req->src, req->nbytes, + (void *)req); } static int ssi_ahash_finup(struct ahash_request *req) @@ -1704,7 +1752,8 @@ static int ssi_ahash_finup(struct ahash_request *req) struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm); u32 digestsize = crypto_ahash_digestsize(tfm); - return ssi_hash_finup(state, ctx, digestsize, req->src, req->nbytes, req->result, (void *)req); + return ssi_hash_finup(state, ctx, digestsize, req->src, req->nbytes, + req->result, (void *)req); } static int ssi_ahash_final(struct ahash_request *req) @@ -1714,7 +1763,8 @@ static int ssi_ahash_final(struct ahash_request *req) struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm); u32 digestsize = crypto_ahash_digestsize(tfm); - return ssi_hash_final(state, ctx, digestsize, req->src, req->nbytes, req->result, (void *)req); + return ssi_hash_final(state, ctx, digestsize, req->src, req->nbytes, + req->result, (void *)req); } static int ssi_ahash_init(struct ahash_request *req) @@ -2176,7 +2226,9 @@ int ssi_hash_init_sram_digest_consts(struct ssi_drvdata *drvdata) larval_seq_len = 0; #if (DX_DEV_SHA_MAX > 256) - /* We are forced to swap each double-word larval before copying to sram */ + /* We are forced to swap each double-word larval before copying to + * sram + */ for (i = 0; i < ARRAY_SIZE(sha384_init); i++) { const u32 const0 = ((u32 *)((u64 *)&sha384_init[i]))[1]; const u32 const1 = ((u32 *)((u64 *)&sha384_init[i]))[0]; @@ -2326,7 +2378,8 @@ int ssi_hash_free(struct ssi_drvdata *drvdata) struct ssi_hash_handle *hash_handle = drvdata->hash_handle; if (hash_handle) { - list_for_each_entry_safe(t_hash_alg, hash_n, &hash_handle->hash_list, entry) { + list_for_each_entry_safe(t_hash_alg, hash_n, + &hash_handle->hash_list, entry) { crypto_unregister_ahash(&t_hash_alg->ahash_alg); list_del(&t_hash_alg->entry); kfree(t_hash_alg); diff --git a/drivers/staging/ccree/ssi_hash.h b/drivers/staging/ccree/ssi_hash.h index c884727..8e6eee5 100644 --- a/drivers/staging/ccree/ssi_hash.h +++ b/drivers/staging/ccree/ssi_hash.h @@ -41,7 +41,9 @@ #define CC_EXPORT_MAGIC 0xC2EE1070U -// this struct was taken from drivers/crypto/nx/nx-aes-xcbc.c and it is used for xcbc/cmac statesize +/* this struct was taken from drivers/crypto/nx/nx-aes-xcbc.c and it is used + * for xcbc/cmac statesize + */ struct aeshash_state { u8 state[AES_BLOCK_SIZE]; unsigned int count; @@ -81,7 +83,8 @@ int ssi_hash_free(struct ssi_drvdata *drvdata); * Gets the initial digest length * * \param drvdata - * \param mode The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256/SHA384/SHA512 + * \param mode The Hash mode. Supported modes: + * MD5/SHA1/SHA224/SHA256/SHA384/SHA512 * * \return u32 returns the address of the initial digest length in SRAM */ @@ -93,7 +96,8 @@ ssi_ahash_get_initial_digest_len_sram_addr(void *drvdata, u32 mode); * according to the given hash mode * * \param drvdata - * \param mode The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256/SHA384/SHA512 + * \param mode The Hash mode. Supported modes: + * MD5/SHA1/SHA224/SHA256/SHA384/SHA512 * * \return u32 The address of the initial digest in SRAM */ diff --git a/drivers/staging/ccree/ssi_ivgen.c b/drivers/staging/ccree/ssi_ivgen.c index 7171796..4ca6ca7 100644 --- a/drivers/staging/ccree/ssi_ivgen.c +++ b/drivers/staging/ccree/ssi_ivgen.c @@ -228,7 +228,8 @@ int ssi_ivgen_init(struct ssi_drvdata *drvdata) * * \param drvdata Driver private context * \param iv_out_dma Array of physical IV out addresses - * \param iv_out_dma_len Length of iv_out_dma array (additional elements of iv_out_dma array are ignore) + * \param iv_out_dma_len Length of iv_out_dma array (additional elements + * of iv_out_dma array are ignore) * \param iv_out_size May be 8 or 16 bytes long * \param iv_seq IN/OUT array to the descriptors sequence * \param iv_seq_len IN/OUT pointer to the sequence length @@ -257,7 +258,9 @@ int ssi_ivgen_getiv( return -EINVAL; } - //check that number of generated IV is limited to max dma address iv buffer size + /* check that number of generated IV is limited to max dma address + * iv buffer size + */ if (iv_out_dma_len > SSI_MAX_IVGEN_DMA_ADDRESSES) { /* The sequence will be longer than allowed */ return -EINVAL; diff --git a/drivers/staging/ccree/ssi_ivgen.h b/drivers/staging/ccree/ssi_ivgen.h index 961aea4..fd28309 100644 --- a/drivers/staging/ccree/ssi_ivgen.h +++ b/drivers/staging/ccree/ssi_ivgen.h @@ -53,7 +53,8 @@ int ssi_ivgen_init_sram_pool(struct ssi_drvdata *drvdata); * * \param drvdata Driver private context * \param iv_out_dma Array of physical IV out addresses - * \param iv_out_dma_len Length of iv_out_dma array (additional elements of iv_out_dma array are ignore) + * \param iv_out_dma_len Length of iv_out_dma array (additional elements of + * iv_out_dma array are ignore) * \param iv_out_size May be 8 or 16 bytes long * \param iv_seq IN/OUT array to the descriptors sequence * \param iv_seq_len IN/OUT pointer to the sequence length diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index ab18851..001bbe9 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -123,7 +123,8 @@ int request_mgr_init(struct ssi_drvdata *drvdata) INIT_DELAYED_WORK(&req_mgr_h->compwork, comp_work_handler); #else dev_dbg(dev, "Initializing completion tasklet\n"); - tasklet_init(&req_mgr_h->comptask, comp_handler, (unsigned long)drvdata); + tasklet_init(&req_mgr_h->comptask, comp_handler, + (unsigned long)drvdata); #endif req_mgr_h->hw_queue_size = cc_ioread(drvdata, CC_REG(DSCRPTR_QUEUE_SRAM_SIZE)); @@ -138,9 +139,10 @@ int request_mgr_init(struct ssi_drvdata *drvdata) req_mgr_h->max_used_sw_slots = 0; /* Allocate DMA word for "dummy" completion descriptor use */ - req_mgr_h->dummy_comp_buff = dma_alloc_coherent(dev, sizeof(u32), - &req_mgr_h->dummy_comp_buff_dma, - GFP_KERNEL); + req_mgr_h->dummy_comp_buff = + dma_alloc_coherent(dev, sizeof(u32), + &req_mgr_h->dummy_comp_buff_dma, + GFP_KERNEL); if (!req_mgr_h->dummy_comp_buff) { dev_err(dev, "Not enough memory to allocate DMA (%zu) dropped buffer\n", sizeof(u32)); @@ -272,10 +274,10 @@ int send_request( struct cc_hw_desc iv_seq[SSI_IVPOOL_SEQ_LEN]; struct device *dev = drvdata_to_dev(drvdata); int rc; - unsigned int max_required_seq_len = (total_seq_len + - ((ssi_req->ivgen_dma_addr_len == 0) ? 0 : - SSI_IVPOOL_SEQ_LEN) + - (!is_dout ? 1 : 0)); + unsigned int max_required_seq_len = + (total_seq_len + + ((ssi_req->ivgen_dma_addr_len == 0) ? 0 : + SSI_IVPOOL_SEQ_LEN) + (!is_dout ? 1 : 0)); #if defined(CONFIG_PM) rc = cc_pm_get(dev); @@ -349,13 +351,16 @@ int send_request( total_seq_len += iv_seq_len; } - used_sw_slots = ((req_mgr_h->req_queue_head - req_mgr_h->req_queue_tail) & (MAX_REQUEST_QUEUE_SIZE - 1)); + used_sw_slots = ((req_mgr_h->req_queue_head - + req_mgr_h->req_queue_tail) & + (MAX_REQUEST_QUEUE_SIZE - 1)); if (unlikely(used_sw_slots > req_mgr_h->max_used_sw_slots)) req_mgr_h->max_used_sw_slots = used_sw_slots; /* Enqueue request - must be locked with HW lock*/ req_mgr_h->req_queue[req_mgr_h->req_queue_head] = *ssi_req; - req_mgr_h->req_queue_head = (req_mgr_h->req_queue_head + 1) & (MAX_REQUEST_QUEUE_SIZE - 1); + req_mgr_h->req_queue_head = (req_mgr_h->req_queue_head + 1) & + (MAX_REQUEST_QUEUE_SIZE - 1); /* TODO: Use circ_buf.h ? */ dev_dbg(dev, "Enqueue request head=%u\n", req_mgr_h->req_queue_head); @@ -419,7 +424,8 @@ int send_request_init( unsigned int total_seq_len = len; /*initial sequence length*/ int rc = 0; - /* Wait for space in HW and SW FIFO. Poll for as much as FIFO_TIMEOUT. */ + /* Wait for space in HW and SW FIFO. Poll for as much as FIFO_TIMEOUT. + */ rc = request_mgr_queues_status_check(drvdata, req_mgr_h, total_seq_len); if (unlikely(rc)) @@ -447,7 +453,8 @@ void complete_request(struct ssi_drvdata *drvdata) struct ssi_request_mgr_handle *request_mgr_handle = drvdata->request_mgr_handle; #ifdef COMP_IN_WQ - queue_delayed_work(request_mgr_handle->workq, &request_mgr_handle->compwork, 0); + queue_delayed_work(request_mgr_handle->workq, + &request_mgr_handle->compwork, 0); #else tasklet_schedule(&request_mgr_handle->comptask); #endif @@ -477,7 +484,8 @@ static void proc_completions(struct ssi_drvdata *drvdata) request_mgr_handle->axi_completed--; /* Dequeue request */ - if (unlikely(request_mgr_handle->req_queue_head == request_mgr_handle->req_queue_tail)) { + if (unlikely(request_mgr_handle->req_queue_head == + request_mgr_handle->req_queue_tail)) { /* We are supposed to handle a completion but our * queue is empty. This is not normal. Return and * hope for the best. @@ -508,7 +516,9 @@ static void proc_completions(struct ssi_drvdata *drvdata) if (likely(ssi_req->user_cb)) ssi_req->user_cb(dev, ssi_req->user_arg); - request_mgr_handle->req_queue_tail = (request_mgr_handle->req_queue_tail + 1) & (MAX_REQUEST_QUEUE_SIZE - 1); + request_mgr_handle->req_queue_tail = + (request_mgr_handle->req_queue_tail + 1) & + (MAX_REQUEST_QUEUE_SIZE - 1); dev_dbg(dev, "Dequeue request tail=%u\n", request_mgr_handle->req_queue_tail); dev_dbg(dev, "Request completed. axi_completed=%d\n", @@ -576,13 +586,14 @@ static void comp_handler(unsigned long devarg) } /* - * resume the queue configuration - no need to take the lock as this happens inside - * the spin lock protection + * resume the queue configuration - no need to take the lock as this happens + * inside the spin lock protection */ #if defined(CONFIG_PM) int cc_resume_req_queue(struct ssi_drvdata *drvdata) { - struct ssi_request_mgr_handle *request_mgr_handle = drvdata->request_mgr_handle; + struct ssi_request_mgr_handle *request_mgr_handle = + drvdata->request_mgr_handle; spin_lock_bh(&request_mgr_handle->hw_lock); request_mgr_handle->is_runtime_suspended = false; diff --git a/drivers/staging/ccree/ssi_sysfs.c b/drivers/staging/ccree/ssi_sysfs.c index ed97dec..656215b 100644 --- a/drivers/staging/ccree/ssi_sysfs.c +++ b/drivers/staging/ccree/ssi_sysfs.c @@ -32,15 +32,26 @@ static ssize_t ssi_sys_regdump_show(struct kobject *kobj, int offset = 0; register_value = cc_ioread(drvdata, CC_REG(HOST_SIGNATURE)); - offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 0x%08X\n", "HOST_SIGNATURE ", DX_HOST_SIGNATURE_REG_OFFSET, register_value); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, + "%s \t(0x%lX)\t 0x%08X\n", "HOST_SIGNATURE ", + DX_HOST_SIGNATURE_REG_OFFSET, register_value); register_value = cc_ioread(drvdata, CC_REG(HOST_IRR)); - offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 0x%08X\n", "HOST_IRR ", DX_HOST_IRR_REG_OFFSET, register_value); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, + "%s \t(0x%lX)\t 0x%08X\n", "HOST_IRR ", + DX_HOST_IRR_REG_OFFSET, register_value); register_value = cc_ioread(drvdata, CC_REG(HOST_POWER_DOWN_EN)); - offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 0x%08X\n", "HOST_POWER_DOWN_EN ", DX_HOST_POWER_DOWN_EN_REG_OFFSET, register_value); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, + "%s \t(0x%lX)\t 0x%08X\n", "HOST_POWER_DOWN_EN ", + DX_HOST_POWER_DOWN_EN_REG_OFFSET, register_value); register_value = cc_ioread(drvdata, CC_REG(AXIM_MON_ERR)); - offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 0x%08X\n", "AXIM_MON_ERR ", DX_AXIM_MON_ERR_REG_OFFSET, register_value); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, + "%s \t(0x%lX)\t 0x%08X\n", "AXIM_MON_ERR ", + DX_AXIM_MON_ERR_REG_OFFSET, register_value); register_value = cc_ioread(drvdata, CC_REG(DSCRPTR_QUEUE_CONTENT)); - offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 0x%08X\n", "DSCRPTR_QUEUE_CONTENT", DX_DSCRPTR_QUEUE_CONTENT_REG_OFFSET, register_value); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, + "%s \t(0x%lX)\t 0x%08X\n", "DSCRPTR_QUEUE_CONTENT", + DX_DSCRPTR_QUEUE_CONTENT_REG_OFFSET, + register_value); return offset; } @@ -48,14 +59,16 @@ static ssize_t ssi_sys_help_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) { static const char * const help_str[] = { - "cat reg_dump ", "Print several of CC register values", + "cat reg_dump ", + "Print several of CC register values", }; int i = 0, offset = 0; offset += scnprintf(buf + offset, PAGE_SIZE - offset, "Usage:\n"); for (i = 0; i < ARRAY_SIZE(help_str); i += 2) { offset += scnprintf(buf + offset, PAGE_SIZE - offset, - "%s\t\t%s\n", help_str[i], help_str[i + 1]); + "%s\t\t%s\n", help_str[i], + help_str[i + 1]); } return offset; @@ -84,8 +97,10 @@ static struct kobj_attribute ssi_sys_top_level_attrs[] = { __ATTR(dump_regs, 0444, ssi_sys_regdump_show, NULL), __ATTR(help, 0444, ssi_sys_help_show, NULL), #if defined CC_CYCLE_COUNT - __ATTR(stats_host, 0664, ssi_sys_stat_host_db_show, ssi_sys_stats_host_db_clear), - __ATTR(stats_cc, 0664, ssi_sys_stat_cc_db_show, ssi_sys_stats_cc_db_clear), + __ATTR(stats_host, 0664, ssi_sys_stat_host_db_show, + ssi_sys_stats_host_db_clear), + __ATTR(stats_cc, 0664, ssi_sys_stat_cc_db_show, + ssi_sys_stats_cc_db_clear), #endif }; From patchwork Mon Nov 13 14:45:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118801 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp1132146edl; Mon, 13 Nov 2017 06:48:01 -0800 (PST) X-Google-Smtp-Source: AGs4zMbcRG7Kf7rbnB/teEKW0oGK+wnJ755Y7VCBpWeIXFm1W8xBusDO88ZUeBIecjL3EfHpUFed X-Received: by 10.99.127.67 with SMTP id p3mr8922856pgn.321.1510584481546; Mon, 13 Nov 2017 06:48:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584481; cv=none; d=google.com; s=arc-20160816; b=CuTPAZkT4BXRq2qQhPIrAOK+EH9rBNCjWC3DL/KeSDUrymCrkqekCzV9T4o0d4jRl1 1Ld12SN45JDtCFt/a/jmcgRWiKSNIbVT4sXB6Zjk7GUnwFqTXNao3ACK6GFImxMczW0D Y4pD+IHEk91uWVZT6KeD4iNTjOujSeOwRVFBsX0YyYmXhwW9TmzNoREd/FEoEImCb8kt fKjCfE5RiwaVz0S5RWj2/7LIKXKXVyDNlrNmKeP0njtVtbds9SebBdBFqeop+c0T5UdX 2PZ/V8r2FeISY4PZlbzzLbc+HzjzkQIc4o8LUYZZLH9EBwWo+QEkh3NtANeobYwCIOcI 3uig== ARC-Message-Signature: i=1; a=rsa-sha256; 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[209.132.180.67]) by mx.google.com with ESMTP id q13si3502354pgt.668.2017.11.13.06.48.01; Mon, 13 Nov 2017 06:48:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752920AbdKMOr6 (ORCPT + 27 others); Mon, 13 Nov 2017 09:47:58 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47414 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753417AbdKMOrz (ORCPT ); Mon, 13 Nov 2017 09:47:55 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C39731435; Mon, 13 Nov 2017 06:47:54 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2FB083F318; Mon, 13 Nov 2017 06:47:52 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 16/24] staging: ccree: remove dead defs and decls Date: Mon, 13 Nov 2017 14:45:44 +0000 Message-Id: <1510584358-29473-17-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove no longer definitions of enums and forward declaration of functions dealing with sysfs interface of the long removed ccree cycle counter. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_sysfs.h | 23 ----------------------- 1 file changed, 23 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_sysfs.h b/drivers/staging/ccree/ssi_sysfs.h index 44ae3d4..5124528 100644 --- a/drivers/staging/ccree/ssi_sysfs.h +++ b/drivers/staging/ccree/ssi_sysfs.h @@ -26,30 +26,7 @@ /* forward declaration */ struct ssi_drvdata; -enum stat_phase { - STAT_PHASE_0 = 0, - STAT_PHASE_1, - STAT_PHASE_2, - STAT_PHASE_3, - STAT_PHASE_4, - STAT_PHASE_5, - STAT_PHASE_6, - MAX_STAT_PHASES, -}; - -enum stat_op { - STAT_OP_TYPE_NULL = 0, - STAT_OP_TYPE_ENCODE, - STAT_OP_TYPE_DECODE, - STAT_OP_TYPE_SETKEY, - STAT_OP_TYPE_GENERIC, - MAX_STAT_OP_TYPES, -}; - int ssi_sysfs_init(struct kobject *sys_dev_obj, struct ssi_drvdata *drvdata); void ssi_sysfs_fini(void); -void update_host_stat(unsigned int op_type, unsigned int phase, cycles_t result); -void update_cc_stat(unsigned int op_type, unsigned int phase, unsigned int elapsed_cycles); -void display_all_stat_db(void); #endif /*__SSI_SYSFS_H__*/ From patchwork Mon Nov 13 14:45:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118802 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp1132254edl; Mon, 13 Nov 2017 06:48:07 -0800 (PST) X-Google-Smtp-Source: AGs4zMYr/Z2nwqEPolhx3QhjOgQ8hiWhl/v8VJdnkTjoXZs3/1AtCMlyh+XkL6DaFeFCYJe71WOl X-Received: by 10.99.96.87 with SMTP id u84mr9005159pgb.424.1510584487553; Mon, 13 Nov 2017 06:48:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584487; cv=none; d=google.com; s=arc-20160816; b=G0tdfmghIj52pDxWnRSOlDD3XBO6fosLgK0zrMeQyqWCHVMcj1ZtECRTGDM+UPX16F VU0EZQ7oAaYHWe50+0oKzYxzVRJjB+fNHVUq4EgEHJzSxnMoil/GxM/oq1VT/feF5rOU OkMXXUz8J9ZfKo8ekCpEM7kVR1Q0skJoxfHnxwE+5/hNFXodukCzpj0EFYNVYGYlbWWx rEF+VA4O9ta6aj4EPEoc+9qK93o1MllcEiWrdXyZsHFcjvvjewgRsAzZC96jv/XYiYzC YAkY0nVcCaYlON/5aGHNrsTc0HsmpgY2dQRKoaL3HjITZsuu/5CyXc1f/TWbkFGyI5Ot k/LA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=LuigOJkQ6DIb8uzydyCsaYqD2V/zoQ/UHBRN8ytUHx0=; b=hiq+ov8wNfKtpBic7xqnRiSkBkl1olVun5v7WC/uz4pPvdjDmzl1R+dbhglRempxrw outPhmRUDdXiSfK2Hp+J3MmvCPP8HTyNWvvrxv/mi553cMzMExG7uQxYnf8795RjsFvc /7QeIpKmf4iGJKrkSpMFeoEktI07PhxBm02Ox6z4c2PvmRJ8vjufNlY2vE2hwHoCSIVC 6cNWx4Mbq69pHgjg99UT+rQIyZ6WDWw5BpfILPx9KQhKvcYAK2PIlDjYg63oeVG9kBne 2O+TAaAm3hdLtMQBl38takpsK1lqC3t5XyyaKF6rWG8JvHyCQ/ntmeOWQNGT65aMdTMt 1uRg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q13si3502354pgt.668.2017.11.13.06.48.07; Mon, 13 Nov 2017 06:48:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753480AbdKMOsF (ORCPT + 27 others); Mon, 13 Nov 2017 09:48:05 -0500 Received: from foss.arm.com ([217.140.101.70]:47428 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752929AbdKMOsC (ORCPT ); Mon, 13 Nov 2017 09:48:02 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 51EC51435; Mon, 13 Nov 2017 06:48:02 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B3B9F3F318; Mon, 13 Nov 2017 06:48:00 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 17/24] staging: ccree: refactor code with local vars Date: Mon, 13 Nov 2017 14:45:45 +0000 Message-Id: <1510584358-29473-18-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Refactor the queue handling loop using local variables for better code readability. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_request_mgr.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index 001bbe9..a2a82ef 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -476,6 +476,8 @@ static void proc_completions(struct ssi_drvdata *drvdata) struct device *dev = drvdata_to_dev(drvdata); struct ssi_request_mgr_handle *request_mgr_handle = drvdata->request_mgr_handle; + unsigned int *tail = &request_mgr_handle->req_queue_tail; + unsigned int *head = &request_mgr_handle->req_queue_head; #if defined(CONFIG_PM) int rc = 0; #endif @@ -484,18 +486,17 @@ static void proc_completions(struct ssi_drvdata *drvdata) request_mgr_handle->axi_completed--; /* Dequeue request */ - if (unlikely(request_mgr_handle->req_queue_head == - request_mgr_handle->req_queue_tail)) { + if (unlikely(*head == *tail)) { /* We are supposed to handle a completion but our * queue is empty. This is not normal. Return and * hope for the best. */ dev_err(dev, "Request queue is empty head == tail %u\n", - request_mgr_handle->req_queue_head); + *head); break; } - ssi_req = &request_mgr_handle->req_queue[request_mgr_handle->req_queue_tail]; + ssi_req = &request_mgr_handle->req_queue[*tail]; #ifdef FLUSH_CACHE_ALL flush_cache_all(); @@ -516,11 +517,8 @@ static void proc_completions(struct ssi_drvdata *drvdata) if (likely(ssi_req->user_cb)) ssi_req->user_cb(dev, ssi_req->user_arg); - request_mgr_handle->req_queue_tail = - (request_mgr_handle->req_queue_tail + 1) & - (MAX_REQUEST_QUEUE_SIZE - 1); - dev_dbg(dev, "Dequeue request tail=%u\n", - request_mgr_handle->req_queue_tail); + *tail = (*tail + 1) & (MAX_REQUEST_QUEUE_SIZE - 1); + dev_dbg(dev, "Dequeue request tail=%u\n", *tail); dev_dbg(dev, "Request completed. axi_completed=%d\n", request_mgr_handle->axi_completed); #if defined(CONFIG_PM) From patchwork Mon Nov 13 14:45:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118803 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp1132342edl; Mon, 13 Nov 2017 06:48:13 -0800 (PST) X-Google-Smtp-Source: AGs4zMacdif7e/Xqq3zWNp5kr2ZzmbRSXYPmciPi+A4mysso5DV9+Hhj7c5Wd8LTbKiMZauu4tRe X-Received: by 10.99.103.5 with SMTP id b5mr9016885pgc.447.1510584493347; Mon, 13 Nov 2017 06:48:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584493; cv=none; d=google.com; s=arc-20160816; b=Pxhvkywfloly6hgPubSoH+A2eR7bgALPLaPz5uLjolMdHoxwv8mb5xJzCcUH/g9a/H 8mvrD9epMtBL/glXBi3pR6LcOpxyURsrrJHTbSkPXjHi5eafyNKQIEuuyo2wgce8ec2t 7X8C7JDgYD3MI+j8usZbWvaYqZvW1Kfx8w7c3zMzmDxdhjhD9A+5zEGghbvR0Q6RV3kf 2ZZT9SZqY5+zPjS5TZ8qxOWFjWmSRZnXbXB039E9QBiett7rwak90uVK8sfy9Iv9fLiR 5R9mnJPTi9GxrS3iChZU3dzW0YngUuBsA1ZAF+pQrWuicLVUMnjmja53yx/HWbmt+ZGn Gbag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=9Gwq0s9Eh1ulQG8/BHKyEQ+1B/XMLrm6fiJzz82yqPQ=; b=Xznd37KMqHoq56SwVAP4aw352+MJ8dcZjuGO+V4ssICqTBvX2T+sfZ3+3JtEuYnRu+ 496bm2h7oUUvpv58R4bI/w90ItD8hdn6WSAEoZUAAMB5JSIW06pQO2iUPTGh22Un+Aen otPgWnW8vMBmmpJtNeqUlHlZ5kclz9n/SXirD0D049qNCeZ2clbqW7x15GAWN9OeeOP3 mwgC37OVv097naGBw9tpYdLcRJfDvj1iy9zFT3NutMYALdtrRKbIG3hxmCnP0k0rQpUS d1y6aUezk7j7QNU4dhI9XEYbvXkQ21hl8/lE053w4FWIsTlU0thNAJzkDmeZz9/CJ5Xa fzyw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b2si13492085pgt.268.2017.11.13.06.48.13; Mon, 13 Nov 2017 06:48:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753506AbdKMOsL (ORCPT + 27 others); Mon, 13 Nov 2017 09:48:11 -0500 Received: from foss.arm.com ([217.140.101.70]:47436 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752929AbdKMOsJ (ORCPT ); Mon, 13 Nov 2017 09:48:09 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D28BB1435; Mon, 13 Nov 2017 06:48:08 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3FD563F318; Mon, 13 Nov 2017 06:48:07 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 18/24] staging: ccree: rename func for readability Date: Mon, 13 Nov 2017 14:45:46 +0000 Message-Id: <1510584358-29473-19-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rename the insanely long ssi_ahash_get_larval_digest_sram_addr() func to cc_larval_digest_addr() for better code readability Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_aead.c | 7 +++---- drivers/staging/ccree/ssi_hash.c | 13 ++++++------- drivers/staging/ccree/ssi_hash.h | 2 +- 3 files changed, 10 insertions(+), 12 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c index e2cdf52..fcff625 100644 --- a/drivers/staging/ccree/ssi_aead.c +++ b/drivers/staging/ccree/ssi_aead.c @@ -336,8 +336,8 @@ static int hmac_setkey(struct cc_hw_desc *desc, struct ssi_aead_ctx *ctx) hw_desc_init(&desc[idx]); set_cipher_mode(&desc[idx], hash_mode); set_din_sram(&desc[idx], - ssi_ahash_get_larval_digest_sram_addr( - ctx->drvdata, ctx->auth_mode), + cc_larval_digest_addr(ctx->drvdata, + ctx->auth_mode), digest_size); set_flow_mode(&desc[idx], S_DIN_to_HASH); set_setup_mode(&desc[idx], SETUP_LOAD_STATE0); @@ -441,8 +441,7 @@ ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, dma_addr_t key_dma_addr = 0; struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); struct device *dev = drvdata_to_dev(ctx->drvdata); - u32 larval_addr = ssi_ahash_get_larval_digest_sram_addr( - ctx->drvdata, ctx->auth_mode); + u32 larval_addr = cc_larval_digest_addr(ctx->drvdata, ctx->auth_mode); struct ssi_crypto_req ssi_req = {}; unsigned int blocksize; unsigned int digestsize; diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 4d7e565..0f67737 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -150,8 +150,8 @@ static int ssi_hash_map_request(struct device *dev, struct ssi_hash_ctx *ctx) { bool is_hmac = ctx->is_hmac; - ssi_sram_addr_t larval_digest_addr = ssi_ahash_get_larval_digest_sram_addr( - ctx->drvdata, ctx->hash_mode); + ssi_sram_addr_t larval_digest_addr = + cc_larval_digest_addr(ctx->drvdata, ctx->hash_mode); struct ssi_crypto_req ssi_req = {}; struct cc_hw_desc desc; int rc = -ENOMEM; @@ -438,8 +438,8 @@ static int ssi_hash_digest(struct ahash_req_ctx *state, bool is_hmac = ctx->is_hmac; struct ssi_crypto_req ssi_req = {}; struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN]; - ssi_sram_addr_t larval_digest_addr = ssi_ahash_get_larval_digest_sram_addr( - ctx->drvdata, ctx->hash_mode); + ssi_sram_addr_t larval_digest_addr = + cc_larval_digest_addr(ctx->drvdata, ctx->hash_mode); int idx = 0; int rc = 0; @@ -1008,8 +1008,7 @@ static int ssi_hash_setkey(void *hash, blocksize = crypto_tfm_alg_blocksize(&((struct crypto_ahash *)hash)->base); digestsize = crypto_ahash_digestsize(((struct crypto_ahash *)hash)); - larval_addr = ssi_ahash_get_larval_digest_sram_addr( - ctx->drvdata, ctx->hash_mode); + larval_addr = cc_larval_digest_addr(ctx->drvdata, ctx->hash_mode); /* The keylen value distinguishes HASH in case keylen is ZERO bytes, * any NON-ZERO value utilizes HMAC flow @@ -2538,7 +2537,7 @@ static void ssi_hash_create_data_desc(struct ahash_req_ctx *areq_ctx, * * \return u32 The address of the initial digest in SRAM */ -ssi_sram_addr_t ssi_ahash_get_larval_digest_sram_addr(void *drvdata, u32 mode) +ssi_sram_addr_t cc_larval_digest_addr(void *drvdata, u32 mode) { struct ssi_drvdata *_drvdata = (struct ssi_drvdata *)drvdata; struct ssi_hash_handle *hash_handle = _drvdata->hash_handle; diff --git a/drivers/staging/ccree/ssi_hash.h b/drivers/staging/ccree/ssi_hash.h index 8e6eee5..32eb473 100644 --- a/drivers/staging/ccree/ssi_hash.h +++ b/drivers/staging/ccree/ssi_hash.h @@ -101,7 +101,7 @@ ssi_ahash_get_initial_digest_len_sram_addr(void *drvdata, u32 mode); * * \return u32 The address of the initial digest in SRAM */ -ssi_sram_addr_t ssi_ahash_get_larval_digest_sram_addr(void *drvdata, u32 mode); +ssi_sram_addr_t cc_larval_digest_addr(void *drvdata, u32 mode); #endif /*__SSI_HASH_H__*/ From patchwork Mon Nov 13 14:45:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118804 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp1132445edl; Mon, 13 Nov 2017 06:48:19 -0800 (PST) X-Google-Smtp-Source: AGs4zMZM5hpTMum9bkOjP5TlQHU4juGAWSBuZxhShaXnqCpuU+XCSiDZpyEQy6wcbS1zSJUlt8ve X-Received: by 10.98.71.25 with SMTP id u25mr10138116pfa.75.1510584499591; Mon, 13 Nov 2017 06:48:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584499; cv=none; d=google.com; s=arc-20160816; b=AyTcuxoRnVjtun3vi3gOXZGObRnJZapV/j+wgUi9kBLEhGu6KVqxDx03Dg+Jn5ptH4 dUeX+EfSLDQtGe9n43jwt27szHF09QscnutLOM3y15oTimqDCxQCOSgWE4fvJOPy59+c MV+fm0Di39v2AAq1FvaGETJB8CUnVQ4Z59Eru2fdsMXy9tpW3+EQuzWtFbKZn9zyEVa7 KPlfl0cMpXv90I0wwg2i0WXspfC39GDtJn//qK2DAWF4B4TRpZUXTbdwE2Fo7ksMG0pk SRnNZ4n5bfNRPotq4MoDILqfgvQ8M54HH+0c5FsSfKZzBDRmCfkasalXb+f/kdwx5IvS YmAw== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id w8si14120564plk.798.2017.11.13.06.48.19; Mon, 13 Nov 2017 06:48:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753523AbdKMOsR (ORCPT + 27 others); Mon, 13 Nov 2017 09:48:17 -0500 Received: from foss.arm.com ([217.140.101.70]:47448 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752929AbdKMOsP (ORCPT ); Mon, 13 Nov 2017 09:48:15 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 029EE1435; Mon, 13 Nov 2017 06:48:15 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 64D6D3F318; Mon, 13 Nov 2017 06:48:13 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 19/24] staging: ccree: rename long define for readability Date: Mon, 13 Nov 2017 14:45:47 +0000 Message-Id: <1510584358-29473-20-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rename the too long SSI_MAX_HASH_OPAD_TMP_KEYS_SIZE to SSI_MAX_OPAD_KEYS_SIZE for better code readability. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_hash.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 0f67737..afdc44e 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -32,7 +32,7 @@ #include "ssi_sram_mgr.h" #define SSI_MAX_AHASH_SEQ_LEN 12 -#define SSI_MAX_HASH_OPAD_TMP_KEYS_SIZE SSI_MAX_HASH_BLCK_SIZE +#define SSI_MAX_OPAD_KEYS_SIZE SSI_MAX_HASH_BLCK_SIZE struct ssi_hash_handle { ssi_sram_addr_t digest_len_sram_addr; /* const value in SRAM*/ @@ -94,7 +94,7 @@ struct ssi_hash_ctx { * the initial digest if HASH. */ u8 digest_buff[SSI_MAX_HASH_DIGEST_SIZE] ____cacheline_aligned; - u8 opad_tmp_keys_buff[SSI_MAX_HASH_OPAD_TMP_KEYS_SIZE] ____cacheline_aligned; + u8 opad_tmp_keys_buff[SSI_MAX_OPAD_KEYS_SIZE] ____cacheline_aligned; dma_addr_t opad_tmp_keys_dma_addr ____cacheline_aligned; dma_addr_t digest_buff_dma_addr; From patchwork Mon Nov 13 14:45:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118805 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp1132556edl; Mon, 13 Nov 2017 06:48:26 -0800 (PST) X-Google-Smtp-Source: AGs4zMaB+6oVvo3BnqK3JJYib7PatkXnn40JNFuVNKtLCPHLBiLMMP6jgk120iN84OI49S57aRPg X-Received: by 10.99.143.27 with SMTP id n27mr8962126pgd.121.1510584506303; Mon, 13 Nov 2017 06:48:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584506; cv=none; d=google.com; s=arc-20160816; b=AP+YYqggd48SqbrsBj71O8bA3edTaVFKiEyQIvDoY8NlrlIgrqWPh69y6PkJvsXcMh 8T8unyWR0o0fnV7SEOAkHkovTSoMUaqdeXVR0jHiE5myQSLmghr2JoP1n2YPGx4RUtiM hmIylrlzxQ7RnnxIJtfJIX8Vyq3c2VY8qx7JVboWVlGXptyqPFPsqJqE+b6fghpOekmo x/nTcOzj7o3Jg61vJmDwdaIKjCqCKCT9v93bx4i+j6KHJagyW8tc411de6EDgSvIMVuz sUwGIERT96UJmGFaPj7BbG8kTZJ6FCtraQmtn67pKk6HTwwnUWtdlMTR39dSDS9xIcDh pNZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=pRIuGN4r0eewnqn3W++Jc8ul+3qyagqgSu5ZtCebAeo=; b=mHUEvHAJp3uSxNvcAA4RaM3JfsfNMlVuyIBafOq+PuXwcSHOKUzJMqQ3wDQgE+EJtg 5yYMyG99K+SlMZZwpjiLF5SCD+89ndzYyS4YJBxUugqlJ90fzbXkl5wFLC8chi9mCSbo d/j7rmCQ5Wug6EHKcD2bAPPpUkx/6WojlS2UTXUZAV1PkJL2PY8m8nirmP1dIEOT00Z9 cNok3aL6HTpkYbZQb63vsizTdB2Lo0nvuJh1AmJ5yb5sMBq9CjtmyTg0XQyENBsxKIpq eTUKV4f5UNXHzICAu39xCc0LHaUvxs276FB4uZe96QMljU7ihunqvKuqxFQvIOIGYZeP hwOA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t191si13686562pgc.2.2017.11.13.06.48.26; Mon, 13 Nov 2017 06:48:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753552AbdKMOsY (ORCPT + 27 others); Mon, 13 Nov 2017 09:48:24 -0500 Received: from foss.arm.com ([217.140.101.70]:47456 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752981AbdKMOsV (ORCPT ); Mon, 13 Nov 2017 09:48:21 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E6F201435; Mon, 13 Nov 2017 06:48:20 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5357A3F318; Mon, 13 Nov 2017 06:48:19 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 20/24] staging: ccree: remove unneeded wrapper function Date: Mon, 13 Nov 2017 14:45:48 +0000 Message-Id: <1510584358-29473-21-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove unneeded wrapper function to simplify code. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_hash.c | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index afdc44e..a2e8a9d 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -986,10 +986,8 @@ static int ssi_hash_init(struct ahash_req_ctx *state, struct ssi_hash_ctx *ctx) return 0; } -static int ssi_hash_setkey(void *hash, - const u8 *key, - unsigned int keylen, - bool synchronize) +static int ssi_ahash_setkey(struct crypto_ahash *ahash, const u8 *key, + unsigned int keylen) { unsigned int hmac_pad_const[2] = { HMAC_IPAD_CONST, HMAC_OPAD_CONST }; struct ssi_crypto_req ssi_req = {}; @@ -1001,12 +999,12 @@ static int ssi_hash_setkey(void *hash, ssi_sram_addr_t larval_addr; struct device *dev; - ctx = crypto_ahash_ctx(((struct crypto_ahash *)hash)); + ctx = crypto_ahash_ctx(ahash); dev = drvdata_to_dev(ctx->drvdata); dev_dbg(dev, "start keylen: %d", keylen); - blocksize = crypto_tfm_alg_blocksize(&((struct crypto_ahash *)hash)->base); - digestsize = crypto_ahash_digestsize(((struct crypto_ahash *)hash)); + blocksize = crypto_tfm_alg_blocksize(&ahash->base); + digestsize = crypto_ahash_digestsize(ahash); larval_addr = cc_larval_digest_addr(ctx->drvdata, ctx->hash_mode); @@ -1167,8 +1165,7 @@ static int ssi_hash_setkey(void *hash, out: if (rc) - crypto_ahash_set_flags((struct crypto_ahash *)hash, - CRYPTO_TFM_RES_BAD_KEY_LEN); + crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_KEY_LEN); if (ctx->key_params.key_dma_addr) { dma_unmap_single(dev, ctx->key_params.key_dma_addr, @@ -1879,12 +1876,6 @@ static int ssi_ahash_import(struct ahash_request *req, const void *in) return rc; } -static int ssi_ahash_setkey(struct crypto_ahash *ahash, - const u8 *key, unsigned int keylen) -{ - return ssi_hash_setkey((void *)ahash, key, keylen, false); -} - struct ssi_hash_template { char name[CRYPTO_MAX_ALG_NAME]; char driver_name[CRYPTO_MAX_ALG_NAME]; From patchwork Mon Nov 13 14:45:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118806 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp1132651edl; Mon, 13 Nov 2017 06:48:32 -0800 (PST) X-Google-Smtp-Source: AGs4zMaxTfmAufLYQUSBp/89pexvMW5lhcizWLdY0yIpItfKqsLS9r8Su2/eZJ1km6zqyCU5RIAb X-Received: by 10.98.72.130 with SMTP id q2mr9876551pfi.99.1510584512812; Mon, 13 Nov 2017 06:48:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584512; cv=none; d=google.com; s=arc-20160816; b=baPYWY8zAwPrYtk7r04V12Lf+HYQNXMeEr651QyNdWLvZJLUMbk9agV9k7tTf5WqC+ 03jBpZb3pnBaM9g+iBEDa4iK41VdQebToFWk6gXJ/fDrG+sm3PiJIjLFETOMm5kIWk/f W4QKqFt1gSZV01eJtoeIpnL+gE5V3yCk29fia/f2DvEwa7MOWoCDTm4LchTNh+STKIEM /ue86Ze/1+nOIVxL+p5k1O6mj1JOGlsTltw3KZdwEkZNGbsZZW/HBLFpzh52FyZiR2Jp 06/d96HERpFnNQiF8kDiuQqZX6cxt2mS4o8rjHQiNsZPerSM1LvugBY7E5paFmdXj0EP CV4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=6trLuG3GCsWfG5k/mjkigPIohmKhTTTTn14fMBocgfI=; b=cAaonDB8NsSMf6jmEfffWKbLKNST7TZLuj2Lt7PS5Zq+bk5q4O9m1AUwb9Y/EnMmx3 M/D+hb+WzcTyZl107PRYrVGAaez1xcfujweuG40YXoXHTKCmN16+vgBrJHv99catWVeK QnGHUadKvqTdU29U3t8XwoWNWogdwb+9AkzXMiQHN2y2mS6P+hp5HJAMvwNkkmqUgeDD vFClxjoKaPjdn2sPZxTxmj/UqCJuKKq/f0sYs2cvK5IxDHggOfxBzoV7cyztwLhlGak3 KVH63EL2fdyAhD8gypJTYEkUjKu0EltOwCu6Z+1owTkbVkmpPSgxjPB6Q+QYvonhAkyT GnwQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 33si13892023pld.586.2017.11.13.06.48.32; Mon, 13 Nov 2017 06:48:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753578AbdKMOsb (ORCPT + 27 others); Mon, 13 Nov 2017 09:48:31 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47470 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752982AbdKMOs1 (ORCPT ); Mon, 13 Nov 2017 09:48:27 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 812A81435; Mon, 13 Nov 2017 06:48:27 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E0C073F318; Mon, 13 Nov 2017 06:48:25 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 21/24] staging: ccree: remove unused field Date: Mon, 13 Nov 2017 14:45:49 +0000 Message-Id: <1510584358-29473-22-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Field monitor_null_cycles of struct drvdata was not being used. Remove it. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_driver.h | 4 ---- 1 file changed, 4 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_driver.h b/drivers/staging/ccree/ssi_driver.h index 7c266ff..ff9f5aa 100644 --- a/drivers/staging/ccree/ssi_driver.h +++ b/drivers/staging/ccree/ssi_driver.h @@ -125,10 +125,6 @@ struct ssi_drvdata { int irq; u32 irq_mask; u32 fw_ver; - /* Calibration time of start/stop - * monitor descriptors - */ - u32 monitor_null_cycles; struct platform_device *plat_dev; ssi_sram_addr_t mlli_sram_addr; void *buff_mgr_handle; From patchwork Mon Nov 13 14:45:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118807 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp1132743edl; Mon, 13 Nov 2017 06:48:38 -0800 (PST) X-Google-Smtp-Source: AGs4zMbcFQPWrxub/JQl9jNO9fjVw8V1KvO/sxLO6DgkPqXbI9/1/olVZ3p+XdEm479TzOs8uj7J X-Received: by 10.84.216.29 with SMTP id m29mr672421pli.243.1510584518786; Mon, 13 Nov 2017 06:48:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584518; cv=none; d=google.com; s=arc-20160816; b=KWYqQTYNpqxMhY7//EJE0+ujM0eQ8to3CRv+m0nSWg5PjCnk3I8F1bve6s3FMs76Dc RyI5rIQrcewTSPlMJqfR2M29haIqkz/Rj6U5R2OxIbCQc+p4gksEBO0GLK3HYUfk9A3E U5VpT8VluJIjGfMBePiurk8jx6K2QDOW1jwheU8800entngRR69RC0k++fB/P//BWyZN 5cACnDXN20WCk4iBgTKRwST+tI96enN4Rs6Tbr5szol83H+JzL1/x8L9+xSLglgEuWTG dV+DFrWeIXU3rVnKxzPZ/qd1L/S4dZhFvruE2OO4IHiA+a3A+VcQpN2tE3El346TqaGC yVEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=9JQCO8zGsjP6B+M//KC3eUFacwZ8mdAyHb+gD7op7ws=; b=zGpocll8WAjuadV/bWgKEVbdIngdKEOfyMCnj79AlyJfHgM7J5e84o98DLWfBMU3AR 9FW1XJRIS/K7PslNjG5WGRaE0lVS0qqktDhTlkUZJJkny5FRLWGPn0Ko3mOTXmmfUKsP VQUpMrXR63VTdYuiRnsjLCvTn+EvQ7h5Su3f/6c1B4I25V8IZDKIrqGlBbqBXYSzoFKF 3cBcHrWyNtMhLGLAQc1LsYdc52BnYL5YUORppDrGpfwMYjB2eysQz9fNpzpDbQz/Dvq6 zUR4dxdbNbq+BrDG4u5dXIDqQEwUEWbSIO1GjSrmejRg47yKyOZtE3Z4+3hHnLI3KI/v xuVg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n12si13465717pgq.423.2017.11.13.06.48.38; Mon, 13 Nov 2017 06:48:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753619AbdKMOsh (ORCPT + 27 others); Mon, 13 Nov 2017 09:48:37 -0500 Received: from foss.arm.com ([217.140.101.70]:47478 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753580AbdKMOse (ORCPT ); Mon, 13 Nov 2017 09:48:34 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5B9221435; Mon, 13 Nov 2017 06:48:34 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BE03D3F318; Mon, 13 Nov 2017 06:48:32 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 22/24] staging: ccree: replace msleep with a completion Date: Mon, 13 Nov 2017 14:45:50 +0000 Message-Id: <1510584358-29473-23-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When the driver would try to queue commands to the HW FIFO but ran out of slots it would use msleep as a delay until the FIFO would clear. This is messy and not accurate. Replace the msleep with a proper completion on the event of command completion which should indicate at least one slot is free. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_driver.c | 2 ++ drivers/staging/ccree/ssi_driver.h | 1 + drivers/staging/ccree/ssi_request_mgr.c | 7 +++++-- 3 files changed, 8 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c index b17b811..3cb2296 100644 --- a/drivers/staging/ccree/ssi_driver.c +++ b/drivers/staging/ccree/ssi_driver.c @@ -251,6 +251,8 @@ static int init_cc_resources(struct platform_device *plat_dev) } dev_dbg(dev, "Registered to IRQ: %d\n", new_drvdata->irq); + init_completion(&new_drvdata->hw_queue_avail); + if (!plat_dev->dev.dma_mask) plat_dev->dev.dma_mask = &plat_dev->dev.coherent_dma_mask; diff --git a/drivers/staging/ccree/ssi_driver.h b/drivers/staging/ccree/ssi_driver.h index ff9f5aa..f92867b 100644 --- a/drivers/staging/ccree/ssi_driver.h +++ b/drivers/staging/ccree/ssi_driver.h @@ -125,6 +125,7 @@ struct ssi_drvdata { int irq; u32 irq_mask; u32 fw_ver; + struct completion hw_queue_avail; /* wait for HW queue availability */ struct platform_device *plat_dev; ssi_sram_addr_t mlli_sram_addr; void *buff_mgr_handle; diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index a2a82ef..0882efd 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -312,8 +312,9 @@ int send_request( return rc; } - /* HW queue is full - short sleep */ - msleep(1); + /* HW queue is full - wait for it to clear up */ + wait_for_completion_interruptible(&drvdata->hw_queue_avail); + reinit_completion(&drvdata->hw_queue_avail); } while (1); /* Additional completion descriptor is needed incase caller did not @@ -452,6 +453,8 @@ void complete_request(struct ssi_drvdata *drvdata) { struct ssi_request_mgr_handle *request_mgr_handle = drvdata->request_mgr_handle; + + complete(&drvdata->hw_queue_avail); #ifdef COMP_IN_WQ queue_delayed_work(request_mgr_handle->workq, &request_mgr_handle->compwork, 0); From patchwork Mon Nov 13 14:45:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118808 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp1132859edl; Mon, 13 Nov 2017 06:48:45 -0800 (PST) X-Google-Smtp-Source: AGs4zMana79M2qwJwcOIjy4wDC4BQlbLpeB4V75SbSTf4Ql/GGjsaZOGP7rBJegxIqfmSOn1ARUh X-Received: by 10.159.205.132 with SMTP id v4mr9324893plo.426.1510584525055; Mon, 13 Nov 2017 06:48:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584525; cv=none; d=google.com; s=arc-20160816; b=mjcLJYLBOxAvfNCTS7oz2SOUw8xhYz4kS++MdbOymZQxoXkJfxKWNMU2zfQPM9FeXe DxOnywj/jQ9HbTfBIskDRnONbo4tkSLAKFiy8E22LH+F1vAUF2/wFU5uEX8DtP53kNIw aH892o+OYhvRx2e7+w39pdb8lFOkUpGC1hYx7LDtyaNVxy/8wlX/rDAVtm+4XSHKy9Jh 8xWbwjJ2IuQqXihehGDycWq68zk3ose5bNYDlDWz9b0zVsISmaVwiePB6aAP2dNNj3ZI VYk854NiITDwqPIuGSMGkEMPbYq+AU6Nnc6ZW+hYo1bnloYvlc2LuNFtieepgy67BZSv /70g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=m5IQvVYIDLl75Flkrdo4JGTu3kQMT5xH/UnYN32XRMU=; b=QRdVoAVaIikDl478sxtxAAhwEDn5HTwBH5mtPc6GKmdfzKqwqnWWYQI3UxIbZc8htH K7F97iZAo40WiHkIEt8ne+Ub3VXgBy8QdAqPnMrVIYvQMu5q/Tbxx+OBoydbFC7d9dGB gI4nXdcYH2F1MhtyQ2Wspg0+yC8B6tiJxpxhuxBLTvuMpgIkxp/Yw7t1W8w91DvSTY95 TAfPqiw1p8XqKKdBIfchH91MZsFI1wVIQd0svZ//9N1iAU3pQL+sMDgsRiI9YhKhSH5V azM+PxnjXkgQMgMRhfwRJg8IpBe0xwjRXpJ7mSD7ayI3fQSH/uDWV4GL1O+kNwgiiZ3+ uX2w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w6si14160012plz.428.2017.11.13.06.48.44; Mon, 13 Nov 2017 06:48:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753654AbdKMOsn (ORCPT + 27 others); Mon, 13 Nov 2017 09:48:43 -0500 Received: from foss.arm.com ([217.140.101.70]:47490 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753616AbdKMOsl (ORCPT ); Mon, 13 Nov 2017 09:48:41 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D6BE81435; Mon, 13 Nov 2017 06:48:40 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 427693F318; Mon, 13 Nov 2017 06:48:39 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 23/24] staging: ccree: use local vars for readability Date: Mon, 13 Nov 2017 14:45:51 +0000 Message-Id: <1510584358-29473-24-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Refactor cc_map_aead_request() to use local vars for addresses for better readability of code. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_buffer_mgr.c | 64 +++++++++++++++------------------- 1 file changed, 29 insertions(+), 35 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index 966033d..c542225 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -1259,7 +1259,7 @@ int cc_map_aead_request( int rc = 0; struct crypto_aead *tfm = crypto_aead_reqtfm(req); bool is_gcm4543 = areq_ctx->is_gcm4543; - + dma_addr_t dma_addr; u32 mapped_nents = 0; u32 dummy = 0; /*used for the assoc data fragments */ u32 size_to_map = 0; @@ -1281,32 +1281,31 @@ int cc_map_aead_request( req->cryptlen : (req->cryptlen - authsize); - areq_ctx->mac_buf_dma_addr = dma_map_single(dev, areq_ctx->mac_buf, - MAX_MAC_SIZE, - DMA_BIDIRECTIONAL); - if (unlikely(dma_mapping_error(dev, areq_ctx->mac_buf_dma_addr))) { + dma_addr = dma_map_single(dev, areq_ctx->mac_buf, MAX_MAC_SIZE, + DMA_BIDIRECTIONAL); + if (unlikely(dma_mapping_error(dev, dma_addr))) { dev_err(dev, "Mapping mac_buf %u B at va=%pK for DMA failed\n", MAX_MAC_SIZE, areq_ctx->mac_buf); rc = -ENOMEM; goto aead_map_failure; } + areq_ctx->mac_buf_dma_addr = dma_addr; if (areq_ctx->ccm_hdr_size != ccm_header_size_null) { - areq_ctx->ccm_iv0_dma_addr = - dma_map_single(dev, (areq_ctx->ccm_config + - CCM_CTR_COUNT_0_OFFSET), - AES_BLOCK_SIZE, DMA_TO_DEVICE); + void *addr = areq_ctx->ccm_config + CCM_CTR_COUNT_0_OFFSET; - if (unlikely(dma_mapping_error(dev, - areq_ctx->ccm_iv0_dma_addr))) { + dma_addr = dma_map_single(dev, addr, AES_BLOCK_SIZE, + DMA_TO_DEVICE); + + if (unlikely(dma_mapping_error(dev, dma_addr))) { dev_err(dev, "Mapping mac_buf %u B at va=%pK for DMA failed\n", - AES_BLOCK_SIZE, - (areq_ctx->ccm_config + - CCM_CTR_COUNT_0_OFFSET)); + AES_BLOCK_SIZE, addr); areq_ctx->ccm_iv0_dma_addr = 0; rc = -ENOMEM; goto aead_map_failure; } + areq_ctx->ccm_iv0_dma_addr = dma_addr; + if (ssi_aead_handle_config_buf(dev, areq_ctx, areq_ctx->ccm_config, &sg_data, req->assoclen)) { @@ -1317,54 +1316,49 @@ int cc_map_aead_request( #if SSI_CC_HAS_AES_GCM if (areq_ctx->cipher_mode == DRV_CIPHER_GCTR) { - areq_ctx->hkey_dma_addr = dma_map_single(dev, - areq_ctx->hkey, - AES_BLOCK_SIZE, - DMA_BIDIRECTIONAL); - if (unlikely(dma_mapping_error(dev, - areq_ctx->hkey_dma_addr))) { + dma_addr = dma_map_single(dev, areq_ctx->hkey, AES_BLOCK_SIZE, + DMA_BIDIRECTIONAL); + if (unlikely(dma_mapping_error(dev, dma_addr))) { dev_err(dev, "Mapping hkey %u B at va=%pK for DMA failed\n", AES_BLOCK_SIZE, areq_ctx->hkey); rc = -ENOMEM; goto aead_map_failure; } + areq_ctx->hkey_dma_addr = dma_addr; - areq_ctx->gcm_block_len_dma_addr = - dma_map_single(dev, &areq_ctx->gcm_len_block, - AES_BLOCK_SIZE, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(dev, - areq_ctx->gcm_block_len_dma_addr))) { + dma_addr = dma_map_single(dev, &areq_ctx->gcm_len_block, + AES_BLOCK_SIZE, DMA_TO_DEVICE); + if (unlikely(dma_mapping_error(dev, dma_addr))) { dev_err(dev, "Mapping gcm_len_block %u B at va=%pK for DMA failed\n", AES_BLOCK_SIZE, &areq_ctx->gcm_len_block); rc = -ENOMEM; goto aead_map_failure; } + areq_ctx->gcm_block_len_dma_addr = dma_addr; - areq_ctx->gcm_iv_inc1_dma_addr = - dma_map_single(dev, areq_ctx->gcm_iv_inc1, - AES_BLOCK_SIZE, DMA_TO_DEVICE); + dma_addr = dma_map_single(dev, areq_ctx->gcm_iv_inc1, + AES_BLOCK_SIZE, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(dev, - areq_ctx->gcm_iv_inc1_dma_addr))) { + if (unlikely(dma_mapping_error(dev, dma_addr))) { dev_err(dev, "Mapping gcm_iv_inc1 %u B at va=%pK for DMA failed\n", AES_BLOCK_SIZE, (areq_ctx->gcm_iv_inc1)); areq_ctx->gcm_iv_inc1_dma_addr = 0; rc = -ENOMEM; goto aead_map_failure; } + areq_ctx->gcm_iv_inc1_dma_addr = dma_addr; - areq_ctx->gcm_iv_inc2_dma_addr = - dma_map_single(dev, areq_ctx->gcm_iv_inc2, - AES_BLOCK_SIZE, DMA_TO_DEVICE); + dma_addr = dma_map_single(dev, areq_ctx->gcm_iv_inc2, + AES_BLOCK_SIZE, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(dev, - areq_ctx->gcm_iv_inc2_dma_addr))) { + if (unlikely(dma_mapping_error(dev, dma_addr))) { dev_err(dev, "Mapping gcm_iv_inc2 %u B at va=%pK for DMA failed\n", AES_BLOCK_SIZE, (areq_ctx->gcm_iv_inc2)); areq_ctx->gcm_iv_inc2_dma_addr = 0; rc = -ENOMEM; goto aead_map_failure; } + areq_ctx->gcm_iv_inc2_dma_addr = dma_addr; } #endif /*SSI_CC_HAS_AES_GCM*/ From patchwork Mon Nov 13 14:45:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 118809 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp1132972edl; Mon, 13 Nov 2017 06:48:51 -0800 (PST) X-Google-Smtp-Source: AGs4zMarnFatqB2etiB58DsJluroA7PyNAZQWCEXclQXkwYpa2uMQ80alJtu+KErOjoZ4CzQPipM X-Received: by 10.101.100.76 with SMTP id s12mr4848829pgv.173.1510584531629; Mon, 13 Nov 2017 06:48:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510584531; cv=none; d=google.com; s=arc-20160816; b=h7gGadWGIITbvgcFTH1W/Gq3UiMjR+U+X0WDCAqD+Y9UA/QeAUoMM1zSdRDSe3Mdgi zuokvv4rzHrT93UdP14cycyQjvHejBDSE4cZWPqUS/SBqegCNTQOE7vzywJI91sdiyP6 0Ebgw+b6sZHOx3nvFchLMAIzNzpNZuqS8l6NR0LEif/cB6/Ld/kn6qXjp5hodO26du3a M502JsX0xnKq5/F8nJuiKq15CwHTxIfp7q75BatMAXksfrMLCLJFisTG+DQO5K2niEg+ J59TjDWSmV5sKcf4S51UB6mi6HF0v74BKYUqN2O9UOuzPo4aap1BNhBhuYu/jUt2CiVy 9paA== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id k4si7205242pgn.596.2017.11.13.06.48.51; Mon, 13 Nov 2017 06:48:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753686AbdKMOst (ORCPT + 27 others); Mon, 13 Nov 2017 09:48:49 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47498 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753655AbdKMOsr (ORCPT ); Mon, 13 Nov 2017 09:48:47 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 85DEE1435; Mon, 13 Nov 2017 06:48:47 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EBA4B3F318; Mon, 13 Nov 2017 06:48:45 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 24/24] staging: ccree: drop unused macro Date: Mon, 13 Nov 2017 14:45:52 +0000 Message-Id: <1510584358-29473-25-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510584358-29473-1-git-send-email-gilad@benyossef.com> References: <1510584358-29473-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The CC_REG_NAME macro is unused. Drop it. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/cc_hw_queue_defs.h | 2 -- 1 file changed, 2 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/cc_hw_queue_defs.h b/drivers/staging/ccree/cc_hw_queue_defs.h index 2ae0f65..c5aaa79 100644 --- a/drivers/staging/ccree/cc_hw_queue_defs.h +++ b/drivers/staging/ccree/cc_hw_queue_defs.h @@ -30,8 +30,6 @@ /* Define max. available slots in HW queue */ #define HW_QUEUE_SLOTS_MAX 15 -#define CC_REG_NAME(word, name) DX_DSCRPTR_QUEUE_WORD ## word ## _ ## name - #define CC_REG_LOW(word, name) \ (DX_DSCRPTR_QUEUE_WORD ## word ## _ ## name ## _BIT_SHIFT)