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Thu, 09 Nov 2017 02:19:37 -0800 (PST) Received: from blr-ubuntu-linaro.wlan.qualcomm.com ([103.5.19.18]) by smtp.gmail.com with ESMTPSA id f12sm11467975pga.7.2017.11.09.02.19.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 09 Nov 2017 02:19:36 -0800 (PST) From: Bhupinder Thakur To: xen-devel@lists.xenproject.org Date: Thu, 9 Nov 2017 15:49:23 +0530 Message-Id: <1510222764-11746-2-git-send-email-bhupinder.thakur@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510222764-11746-1-git-send-email-bhupinder.thakur@linaro.org> References: <1510222764-11746-1-git-send-email-bhupinder.thakur@linaro.org> Cc: Stefano Stabellini , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich Subject: [Xen-devel] [PATCH 1/2 v2] xen: Add support for initializing 16550 UART using ACPI X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" Currently, Xen supports only DT based initialization of 16550 UART. This patch adds support for initializing 16550 UART using ACPI SPCR table. This patch also makes the uart initialization code common between DT and ACPI based initialization. Signed-off-by: Bhupinder Thakur --- TBD: There was one review comment from Julien about how the uart->io_size is being calculated. Currently, I am calulating the io_size based on address of the last UART register. pci_uart_config also calcualates the uart->io_size like this: uart->io_size = max(8U << param->reg_shift, param->uart_offset); I am not sure whether we can use similar logic for calculating uart->io_size. Changes since v1: - Reused common code between DT and ACPI based initializations CC: Andrew Cooper CC: George Dunlap CC: Ian Jackson CC: Jan Beulich CC: Konrad Rzeszutek Wilk CC: Stefano Stabellini CC: Tim Deegan CC: Wei Liu CC: Julien Grall xen/drivers/char/ns16550.c | 132 ++++++++++++++++++++++++++++++++++++++++---- xen/include/xen/8250-uart.h | 1 + 2 files changed, 121 insertions(+), 12 deletions(-) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index e0f8199..cf42fce 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -1463,18 +1463,13 @@ void __init ns16550_init(int index, struct ns16550_defaults *defaults) } #ifdef CONFIG_HAS_DEVICE_TREE -static int __init ns16550_uart_dt_init(struct dt_device_node *dev, - const void *data) +static int ns16550_init_dt(struct ns16550 *uart, + const struct dt_device_node *dev) { - struct ns16550 *uart; - int res; + int res = 0; u32 reg_shift, reg_width; u64 io_size; - uart = &ns16550_com[0]; - - ns16550_init_common(uart); - uart->baud = BAUD_AUTO; uart->data_bits = 8; uart->parity = UART_PARITY_NONE; @@ -1510,18 +1505,103 @@ static int __init ns16550_uart_dt_init(struct dt_device_node *dev, uart->dw_usr_bsy = dt_device_is_compatible(dev, "snps,dw-apb-uart"); + return res; +} +#else +static int ns16550_init_dt(struct ns16550 *uart, + const struct dt_device_node *dev) +{ + return -EINVAL; +} +#endif + +#ifdef CONFIG_ACPI +#include +static int ns16550_init_acpi(struct ns16550 *uart, + const void *data) +{ + struct acpi_table_spcr *spcr = NULL; + int status = 0; + + status = acpi_get_table(ACPI_SIG_SPCR, 0, + (struct acpi_table_header **)&spcr); + + if ( ACPI_FAILURE(status) ) + { + printk("ns16550: Failed to get SPCR table\n"); + return -EINVAL; + } + + uart->baud = BAUD_AUTO; + uart->data_bits = 8; + uart->parity = spcr->parity; + uart->stop_bits = spcr->stop_bits; + uart->io_base = spcr->serial_port.address; + uart->irq = spcr->interrupt; + uart->reg_width = spcr->serial_port.bit_width / 8; + uart->reg_shift = 0; + uart->io_size = UART_MAX_REG << uart->reg_shift; + + irq_set_type(spcr->interrupt, spcr->interrupt_type); + + return 0; +} +#else +static int ns16550_init_acpi(struct ns16550 *uart, + const void *data) +{ + return -EINVAL; +} +#endif + +static int ns16550_uart_init(struct ns16550 **puart, + const void *data, bool acpi) +{ + struct ns16550 *uart = &ns16550_com[0]; + + *puart = uart; + + ns16550_init_common(uart); + + return ( acpi ) ? ns16550_init_acpi(uart, data) + : ns16550_init_dt(uart, data); +} + +static void ns16550_vuart_init(struct ns16550 *uart) +{ +#ifdef CONFIG_ARM uart->vuart.base_addr = uart->io_base; uart->vuart.size = uart->io_size; - uart->vuart.data_off = UART_THR <reg_shift; - uart->vuart.status_off = UART_LSR<reg_shift; - uart->vuart.status = UART_LSR_THRE|UART_LSR_TEMT; + uart->vuart.data_off = UART_THR << uart->reg_shift; + uart->vuart.status_off = UART_LSR << uart->reg_shift; + uart->vuart.status = UART_LSR_THRE | UART_LSR_TEMT; +#endif +} +static void ns16550_register_uart(struct ns16550 *uart) +{ /* Register with generic serial driver. */ serial_register_uart(uart - ns16550_com, &ns16550_driver, uart); +} + +#ifdef CONFIG_HAS_DEVICE_TREE +static int __init ns16550_uart_dt_init(struct dt_device_node *dev, + const void *data) +{ + struct ns16550 *uart; + int ret = 0; + + ret = ns16550_uart_init(&uart, dev, false); + if ( ret ) + return ret; + + ns16550_vuart_init(uart); + + ns16550_register_uart(uart); dt_device_set_used_by(dev, DOMID_XEN); - return 0; + return ret; } static const struct dt_device_match ns16550_dt_match[] __initconst = @@ -1538,6 +1618,34 @@ DT_DEVICE_START(ns16550, "NS16550 UART", DEVICE_SERIAL) DT_DEVICE_END #endif /* HAS_DEVICE_TREE */ + +#ifdef CONFIG_ACPI +static int __init ns16550_acpi_uart_init(const void *data) +{ + struct ns16550 *uart; + int ret = 0; + + ret = ns16550_uart_init(&uart, data, true); + if ( ret ) + return ret; + + ns16550_vuart_init(uart); + + ns16550_register_uart(uart); + + return ret; +} + +ACPI_DEVICE_START(ns16550c, "16550 COMPAT UART", DEVICE_SERIAL) + .class_type = ACPI_DBG2_16550_COMPATIBLE, + .init = ns16550_acpi_uart_init, +ACPI_DEVICE_END +ACPI_DEVICE_START(ns16550s, "16550 SUBSET UART", DEVICE_SERIAL) + .class_type = ACPI_DBG2_16550_SUBSET, + .init = ns16550_acpi_uart_init, +ACPI_DEVICE_END + +#endif /* * Local variables: * mode: C diff --git a/xen/include/xen/8250-uart.h b/xen/include/xen/8250-uart.h index 5c3bac3..1b3e137 100644 --- a/xen/include/xen/8250-uart.h +++ b/xen/include/xen/8250-uart.h @@ -35,6 +35,7 @@ #define UART_USR 0x1f /* Status register (DW) */ #define UART_DLL 0x00 /* divisor latch (ls) (DLAB=1) */ #define UART_DLM 0x01 /* divisor latch (ms) (DLAB=1) */ +#define UART_MAX_REG (UART_USR + 1) /* Interrupt Enable Register */ #define UART_IER_ERDAI 0x01 /* rx data recv'd */ From patchwork Thu Nov 9 10:19:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupinder Thakur X-Patchwork-Id: 118423 Delivered-To: patch@linaro.org Received: by 10.80.225.132 with SMTP id k4csp741437edl; Thu, 9 Nov 2017 02:21:38 -0800 (PST) X-Google-Smtp-Source: ABhQp+RjpTNFW01kRLC6pXbRuJefN810UM/otxwHgXz/sNTtWt6uw7cIT/R9BKX7A8sMHyUSa1lH X-Received: by 10.36.88.137 with SMTP id f131mr4436382itb.4.1510222898121; Thu, 09 Nov 2017 02:21:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510222898; cv=none; d=google.com; s=arc-20160816; b=eDH6HCXaoPVhJVXxjrp3nCEIJfbEhQqEzxMePzY772V2kXkKE3h+0Ue+BVR/ncDNra VMPUl+19E1C+ELU6qyoKO0Sb4wrWy6h48TObgOFQCMZ0vImRbXKvjUfd0PFBamRq899U dXFNuodD/hfNKmlaTKGQBjwv5HkXFQKMM6wRp3/9ygZ2UXzdOhfvw3fSbnnRCXcGfNhz iVLfi8ImJhQkTFGkFLMUlwfliAVBZbNsHYEkbp4XlLhx5cIo1IKCufjtKx/1BMa7RxwI 8n2MAzMk4qm/rqQFxOe2NvugyOgFQlvLUIF7nLqGGvv+4TrSfhK9OWXI57HL5VkS9Xr7 +2og== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:cc:references:in-reply-to:message-id:date:to :from:dkim-signature:arc-authentication-results; bh=ydow1mgrn7iKnqCKPG/BQA82n3ePmt3B/Tej5k/wmiE=; b=ohAVDHubj1XKSUODnYBjiVQfnRL9Dh834Es11RbbY8BCahpHCjpqeS9UaPVjd8ZIdy uF7Gj42T56bmH8OBs9ot4DUqeC/phAySqX1othVf+iypZ57idsvedHq6QYyX7B9RhH3S Jv/IuUYI6XPqjrmcFiyGiVMGT5nVT0R7zngUySBee5prTDnkIzWqO1mnUQ/edUwWPnYU qUFwhNVzkonlOOOTkw+edNu/L73MlsTA7Og9KBgV0+q66NqG0PpX3DaEGqAz+k/DZKwS 7iwu1JCT5CZWuchouVBXZjhfUKFcxUMsDFD2zdNE6LvHdihGuWINlxBKC6Qtf6SZSMsR CGfQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=c7CWSGTz; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. 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Thu, 09 Nov 2017 02:19:41 -0800 (PST) Received: from blr-ubuntu-linaro.wlan.qualcomm.com ([103.5.19.18]) by smtp.gmail.com with ESMTPSA id f12sm11467975pga.7.2017.11.09.02.19.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 09 Nov 2017 02:19:40 -0800 (PST) From: Bhupinder Thakur To: xen-devel@lists.xenproject.org Date: Thu, 9 Nov 2017 15:49:24 +0530 Message-Id: <1510222764-11746-3-git-send-email-bhupinder.thakur@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510222764-11746-1-git-send-email-bhupinder.thakur@linaro.org> References: <1510222764-11746-1-git-send-email-bhupinder.thakur@linaro.org> Cc: Stefano Stabellini , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich Subject: [Xen-devel] [PATCH 2/2 v2] xen: Fix 16550 UART console for HP Moonshot (Aarch64) platform X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" The console was not working on HP Moonshot (HPE Proliant Aarch64) because the UART registers were accessed as 8-bit aligned addresses. However, registers are 32-bit aligned for HP Moonshot. Since ACPI/SPCR table does not specify the register shift to be applied to the register offset, this patch implements an erratum to correctly set the register shift for HP Moonshot. Similar erratum was implemented in linux: commit 79a648328d2a604524a30523ca763fbeca0f70e3 Author: Loc Ho Date: Mon Jul 3 14:33:09 2017 -0700 ACPI: SPCR: Workaround for APM X-Gene 8250 UART 32-alignment errata APM X-Gene verion 1 and 2 have an 8250 UART with its register aligned to 32-bit. In addition, the latest released BIOS encodes the access field as 8-bit access instead 32-bit access. This causes no console with ACPI boot as the console will not match X-Gene UART port due to the lack of mmio32 option. Signed-off-by: Loc Ho Acked-by: Greg Kroah-Hartman Signed-off-by: Rafael J. Wysocki Signed-off-by: Bhupinder Thakur --- CC: Andrew Cooper CC: George Dunlap CC: Ian Jackson CC: Jan Beulich CC: Konrad Rzeszutek Wilk CC: Stefano Stabellini CC: Tim Deegan CC: Wei Liu CC: Julien Grall xen/drivers/char/ns16550.c | 42 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 40 insertions(+), 2 deletions(-) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index cf42fce..bb01c46 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -1517,6 +1517,33 @@ static int ns16550_init_dt(struct ns16550 *uart, #ifdef CONFIG_ACPI #include +/* + * APM X-Gene v1 and v2 UART hardware is an 16550 like device but has its + * register aligned to 32-bit. In addition, the BIOS also encoded the + * access width to be 8 bits. This function detects this errata condition. + */ +static bool xgene_8250_erratum_present(struct acpi_table_spcr *tb) +{ + bool xgene_8250 = false; + + if ( tb->interface_type != ACPI_DBG2_16550_COMPATIBLE ) + return false; + + if ( memcmp(tb->header.oem_id, "APMC0D", ACPI_OEM_ID_SIZE) && + memcmp(tb->header.oem_id, "HPE ", ACPI_OEM_ID_SIZE) ) + return false; + + if ( !memcmp(tb->header.oem_table_id, "XGENESPC", + ACPI_OEM_TABLE_ID_SIZE) && tb->header.oem_revision == 0 ) + xgene_8250 = true; + + if ( !memcmp(tb->header.oem_table_id, "ProLiant", + ACPI_OEM_TABLE_ID_SIZE) && tb->header.oem_revision == 1 ) + xgene_8250 = true; + + return xgene_8250; +} + static int ns16550_init_acpi(struct ns16550 *uart, const void *data) { @@ -1539,9 +1566,20 @@ static int ns16550_init_acpi(struct ns16550 *uart, uart->io_base = spcr->serial_port.address; uart->irq = spcr->interrupt; uart->reg_width = spcr->serial_port.bit_width / 8; - uart->reg_shift = 0; - uart->io_size = UART_MAX_REG << uart->reg_shift; + if ( xgene_8250_erratum_present(spcr) ) + { + /* + * for xgene v1 and v2 the registers are 32-bit and so a + * register shift of 2 has to be applied to get the + * correct register offset. + */ + uart->reg_shift = 2; + } + else + uart->reg_shift = 0; + + uart->io_size = UART_MAX_REG << uart->reg_shift; irq_set_type(spcr->interrupt, spcr->interrupt_type); return 0;