From patchwork Thu Nov 9 08:29:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin Labbe X-Patchwork-Id: 118396 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp6309287qgn; Thu, 9 Nov 2017 00:32:20 -0800 (PST) X-Google-Smtp-Source: ABhQp+QQXkHkTpjTp5lGw/o1gyH7r+HT/sFUHcv2bEdxha2XdlkMOOnXELJT1gP9DwFgy+6lFpCv X-Received: by 10.99.0.214 with SMTP id 205mr3118166pga.283.1510216340712; Thu, 09 Nov 2017 00:32:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510216340; cv=none; d=google.com; s=arc-20160816; b=cg79KgwU5d512/BKqQTp7YyDRQ7v9e4/Jrkj0FJKn6cqX1F+fPQHqRBUxEUgUaHPak ytJHpvrnRT7PWTjTeZqPaW72aVkK+DRtz74e2cu112Pb59934SGF5KooAo/PmzniZTr/ RcuXzW5OUSo0/LmM30e11fSaIUI999P0e2T7mStxCRnsLB8dy8lVkAsmYHSMwFM1wbaA wnEvQgUn2HtztdY3a48rsICa4P2TzQ5sxGaS7z8ijG9ByPbOaCPJ8ftERL9zrd2EG1Ga E9fX+SgeydgTKYNWlUdDp7sSlg6CZoda2PdODFuJ6sWr46fk5SoOJ8OCwLL8LtXcJ67Q zw8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=kXSz2eBfi+VFeJfS84M0UVP4mfx6KNOIaPgCOyFNmxo=; b=h61HHxu0a/yPIIOcRuu2ElVMxML4AxV90LAeRaXFTTrePRZc4OE29d1U0yVEO1kEEc zJuwMwRN5C3+lrcGp3gONkTrnwHfMR0apBsPVhft/F9PImANA6FOIXK9cLuqFezvoNEg 8sOjmxVG0HtbxQEoAs3fKYwunMVKWxvVGK37wz3oCgQoFu0BaZfaHY8ueMKr93VdSBK0 PHwCZTABzbVvNosrOAFCK2aBRRwcB4zjA5MIZ4zXPVpUqfVK+iEmi2YcGMHgls7R0jJN ZdlBn3EO4KMHPmO6RGRxKAHGMwUAZ6h/d2u9z6RPk1TRBrbphUaKklefyBOCPz/MlNib bssA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=TCxg4/ys; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d27si6137829pfk.146.2017.11.09.00.32.20; Thu, 09 Nov 2017 00:32:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=TCxg4/ys; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753587AbdKIIcS (ORCPT + 25 others); Thu, 9 Nov 2017 03:32:18 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:45672 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753486AbdKIIcP (ORCPT ); Thu, 9 Nov 2017 03:32:15 -0500 Received: by mail-wm0-f65.google.com with SMTP id y80so15230593wmd.0; Thu, 09 Nov 2017 00:32:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kXSz2eBfi+VFeJfS84M0UVP4mfx6KNOIaPgCOyFNmxo=; b=TCxg4/ys1/jfw6+Rk59hNBdk3mUg7muZjTdenh+WDfY7VS/EFyZruY2CdgjtYMVMZ+ hpX57XuukChhhuD8VbyxR0txXNFfaiv6PUG0QjOJCsRZ5xyIE5H2Jeafotd22Jv/bE+y sHIBn1gW0f10wru1lKlTJxlrPwapnbdiv3NG5qgagboOg/Q4KIHuJ3cwMMPlei6Q35ib /R+QjVxeHC1ME7V7O5f812xUsLGviZhgYZ0qtdOkLw9Lowyj06EgJk4sMGOrboTRt7cj a3qxvszCsx/8rkMeqYV4Ie8rDnOuIyCQLb5LCTmZOYGRxKAQHZ+WdNiiKHtfpjH4sI8f khKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kXSz2eBfi+VFeJfS84M0UVP4mfx6KNOIaPgCOyFNmxo=; b=YUJeGyzivTNQ01TAr7FegOf7Ap2mRBDT45OZtWiKipA9mfMLGD6uYmO8o4NPJs3YSy biK4jaoXzfQEL+oiHQTvc3CwFoUcCtLtB6k5ahk6dI2GhAQTdaDzQb4kXGFllxZq4Kmz zYHDtgg6PDlTCUuVKIRRZCumtW+XOxF7tp+x7M4tHSs1mgfdeGEExMUwNmiXuymlmDWc ELTvXk0pEE3GsNlapTXhKQS6uExCixAVebN4XoIqN23OPygGayb02Mhm/Lq7Z1Zn8+gD StEhK9WarJ4t2nhx1/EaHXq0J08nGsM0UIMljIbl9EO+7yhCka09N6x8yeRNjk7VbckZ aUlQ== X-Gm-Message-State: AJaThX494X9N5qL6SjdczS2SAX3XMLcX8e1JhTGHFlNzUTQcStfuXJwb AvySz8hlvsq4QLpm+WyT0gA= X-Received: by 10.28.93.200 with SMTP id r191mr2531966wmb.19.1510216334535; Thu, 09 Nov 2017 00:32:14 -0800 (PST) Received: from Red.local (LFbn-MAR-1-580-96.w90-118.abo.wanadoo.fr. [90.118.159.96]) by smtp.googlemail.com with ESMTPSA id 195sm2813960wmj.3.2017.11.09.00.32.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Nov 2017 00:32:13 -0800 (PST) From: Corentin Labbe To: linux@armlinux.org.uk, mark.rutland@arm.com, maxime.ripard@free-electrons.com, robh+dt@kernel.org, wens@csie.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Corentin Labbe Subject: [PATCH v2 2/2] ARM: sun8i: bananapi-m3: Enable dwmac-sun8i Date: Thu, 9 Nov 2017 09:29:50 +0100 Message-Id: <20171109082950.21124-3-clabbe.montjoie@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171109082950.21124-1-clabbe.montjoie@gmail.com> References: <20171109082950.21124-1-clabbe.montjoie@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The dwmac-sun8i hardware is present on the bananapi m3 It uses an external PHY rtl8211e via RGMII. This patch create the needed emac and phy nodes. Signed-off-by: Corentin Labbe --- arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) -- 2.13.6 diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts index c606af3dbfed..45bdd5c17829 100644 --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts @@ -52,6 +52,7 @@ compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t"; aliases { + ethernet0 = &emac; serial0 = &uart0; }; @@ -88,6 +89,23 @@ /* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */ }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_rgmii_pins>; + phy-handle = <&ext_rgmii_phy>; + phy-mode = "rgmii"; + allwinner,rx-delay-ps = <700>; + allwinner,tx-delay-ps = <700>; + + status = "okay"; +}; + +&mdio { + ext_rgmii_phy: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>;