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[147.11.224.80]) by smtp.gmail.com with ESMTPSA id g3sm868071pfq.19.2020.07.08.18.09.18 (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 08 Jul 2020 18:09:19 -0700 (PDT) From: Bin Meng To: Alistair Francis , Bastian Koppelmann , Palmer Dabbelt , Sagar Karandikar , qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 2/2] hw/riscv: sifive_u: Provide a reliable way for bootloader to detect whether it is running in QEMU Date: Wed, 8 Jul 2020 18:09:05 -0700 Message-Id: <1594256945-21744-2-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1594256945-21744-1-git-send-email-bmeng.cn@gmail.com> References: <1594256945-21744-1-git-send-email-bmeng.cn@gmail.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::542; envelope-from=bmeng.cn@gmail.com; helo=mail-pg1-x542.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bin Meng Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Bin Meng The reset vector codes are subject to change, e.g.: with recent fw_dynamic type image support, it breaks oreboot again. Add a subregion in the MROM, with the size of machine RAM stored, so that we can provide a reliable way for bootloader to detect whether it is running in QEMU. Signed-off-by: Bin Meng --- hw/riscv/sifive_u.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 3413369..6d714a2 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -88,6 +88,7 @@ static const struct MemmapEntry { #define OTP_SERIAL 1 #define GEM_REVISION 0x10070109 +#define MROM_RAMSIZE_OFFSET 0xf8 static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, uint64_t mem_size, const char *cmdline) @@ -382,6 +383,7 @@ static void sifive_u_machine_init(MachineState *machine) int i; uint32_t fdt_load_addr; uint64_t kernel_entry; + ram_addr_t ram_size = machine->ram_size; /* Initialize SoC */ object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_U_SOC); @@ -391,7 +393,7 @@ static void sifive_u_machine_init(MachineState *machine) /* register RAM */ memory_region_init_ram(main_mem, NULL, "riscv.sifive.u.ram", - machine->ram_size, &error_fatal); + ram_size, &error_fatal); memory_region_add_subregion(system_memory, memmap[SIFIVE_U_DRAM].base, main_mem); @@ -406,7 +408,7 @@ static void sifive_u_machine_init(MachineState *machine) qemu_allocate_irq(sifive_u_machine_reset, NULL, 0)); /* create device tree */ - create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline); + create_fdt(s, memmap, ram_size, machine->kernel_cmdline); if (s->start_in_flash) { /* @@ -443,7 +445,7 @@ static void sifive_u_machine_init(MachineState *machine) if (machine->initrd_filename) { hwaddr start; hwaddr end = riscv_load_initrd(machine->initrd_filename, - machine->ram_size, kernel_entry, + ram_size, kernel_entry, &start); qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-start", start); @@ -460,7 +462,7 @@ static void sifive_u_machine_init(MachineState *machine) /* Compute the fdt load address in dram */ fdt_load_addr = riscv_load_fdt(memmap[SIFIVE_U_DRAM].base, - machine->ram_size, s->fdt); + ram_size, s->fdt); #if defined(TARGET_RISCV64) start_addr_hi32 = start_addr >> 32; #endif @@ -496,6 +498,17 @@ static void sifive_u_machine_init(MachineState *machine) riscv_rom_copy_firmware_info(memmap[SIFIVE_U_MROM].base, memmap[SIFIVE_U_MROM].size, sizeof(reset_vec), kernel_entry); + + /* + * Tell guest the machine ram size at MROM_RAMSIZE_OFFSET. + * On real hardware, the 64-bit value from MROM_RAMSIZE_OFFSET is zero. + * QEMU aware bootloader (e.g.: oreboot, U-Boot) can check value stored + * here to determine whether it is running in QEMU. + */ + ram_size = cpu_to_le32(ram_size); + rom_add_blob_fixed_as("mrom.ram_size", &ram_size, sizeof(ram_size), + memmap[SIFIVE_U_MROM].base + MROM_RAMSIZE_OFFSET, + &address_space_memory); } static bool sifive_u_machine_get_start_in_flash(Object *obj, Error **errp)