From patchwork Thu Aug 20 00:11:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276030 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 132BEC433E1 for ; Thu, 20 Aug 2020 00:13:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BE58D2075E for ; Thu, 20 Aug 2020 00:13:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Fb5hIToc" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BE58D2075E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:39242 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YDL-0006Kn-O7 for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:13:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48898) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YCG-0004ja-Qn for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:12:49 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:34018 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YCE-0002GR-IH for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:12:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882364; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Pe2EyVBdF44qbW+lbiXXqIUsq6GST8x6uPgPEGKk2t8=; b=Fb5hIToc7rWhUWYKshn+Fn+fGYz1B8Rb+pLV2mL79th6UbXPrIKiCbxbFPT9N+fZ/1EeCt uQ8U1vVhVlTajst+hak5tbsYAnfn4+A2brbHnhjwmFbGCJlNb1+qAjEBFBIURT6StAAStI bpyqLNqngltpCmIsw8Ayp8x1Poez7XU= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-549-eWdTxSxrMIORwgw-_hcR0A-1; Wed, 19 Aug 2020 20:12:42 -0400 X-MC-Unique: eWdTxSxrMIORwgw-_hcR0A-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id C3B9E186A574 for ; Thu, 20 Aug 2020 00:12:41 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8FCF15C1D0; Thu, 20 Aug 2020 00:12:41 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 01/58] e1000: Rename QOM class cast macros Date: Wed, 19 Aug 2020 20:11:39 -0400 Message-Id: <20200820001236.1284548-2-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:44 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Jason Wang , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Rename the E1000_DEVICE_CLASS() and E1000_DEVICE_GET_CLASS() macros to be consistent with the E1000() instance cast macro. This will allow us to register the type cast macros using OBJECT_DECLARE_TYPE later. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- Cc: Jason Wang Cc: qemu-devel@nongnu.org --- hw/net/e1000.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/net/e1000.c b/hw/net/e1000.c index a18f80e369..c4d896a9e6 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -151,9 +151,9 @@ typedef struct E1000BaseClass { #define E1000(obj) \ OBJECT_CHECK(E1000State, (obj), TYPE_E1000_BASE) -#define E1000_DEVICE_CLASS(klass) \ +#define E1000_CLASS(klass) \ OBJECT_CLASS_CHECK(E1000BaseClass, (klass), TYPE_E1000_BASE) -#define E1000_DEVICE_GET_CLASS(obj) \ +#define E1000_GET_CLASS(obj) \ OBJECT_GET_CLASS(E1000BaseClass, (obj), TYPE_E1000_BASE) static void @@ -365,7 +365,7 @@ e1000_autoneg_timer(void *opaque) static void e1000_reset(void *opaque) { E1000State *d = opaque; - E1000BaseClass *edc = E1000_DEVICE_GET_CLASS(d); + E1000BaseClass *edc = E1000_GET_CLASS(d); uint8_t *macaddr = d->conf.macaddr.a; timer_del(d->autoneg_timer); @@ -1751,7 +1751,7 @@ static void e1000_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - E1000BaseClass *e = E1000_DEVICE_CLASS(klass); + E1000BaseClass *e = E1000_CLASS(klass); const E1000Info *info = data; k->realize = pci_e1000_realize; From patchwork Thu Aug 20 00:11:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A52FC433DF for ; Thu, 20 Aug 2020 00:17:30 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2C4DB207DA for ; Thu, 20 Aug 2020 00:17:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="gmj6Fpd3" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2C4DB207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:56102 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YGn-0004vL-DL for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:17:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48968) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YCK-0004lV-Hm for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:12:52 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:27400 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YCI-0002Gp-2s for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:12:52 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882368; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qOjF2Le9rn/ajaHJFyx9aNuv+jc0PbyMv7UTJriO5XQ=; b=gmj6Fpd3WiasJg+aSma/BW3bXASD1kJgj+xhSazbrXcA+ce/GRtObmWh2vdXwdoOTZdwmq 6PytlXLCpLj37+GXOlghK6eHy2uRRfV22S1QVUSZvC7kC+p96YAVjXHd8VL3aqNzOszoK5 tF5g11/jAk76aM1nj9R/Giya6zNILk4= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-17-W5_wixMyOCm35Oz8aMTDvA-1; Wed, 19 Aug 2020 20:12:45 -0400 X-MC-Unique: W5_wixMyOCm35Oz8aMTDvA-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 2608B801AE5; Thu, 20 Aug 2020 00:12:44 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id D79FB709DC; Thu, 20 Aug 2020 00:12:43 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 03/58] vmw_pvscsi: Rename QOM class cast macros Date: Wed, 19 Aug 2020 20:11:41 -0400 Message-Id: <20200820001236.1284548-4-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:44 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Paolo Bonzini , Dmitry Fleytman , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Rename the PVSCSI_DEVICE_CLASS() and PVSCSI_DEVICE_GET_CLASS() macros to be consistent with the PVSCSI() instance cast macro. This will allow us to register the type cast macros using OBJECT_DECLARE_TYPE later. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- Cc: Dmitry Fleytman Cc: Paolo Bonzini Cc: Fam Zheng Cc: qemu-devel@nongnu.org --- hw/scsi/vmw_pvscsi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index df07ab6bfb..c071e0c7aa 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -64,9 +64,9 @@ typedef struct PVSCSIClass { #define TYPE_PVSCSI "pvscsi" #define PVSCSI(obj) OBJECT_CHECK(PVSCSIState, (obj), TYPE_PVSCSI) -#define PVSCSI_DEVICE_CLASS(klass) \ +#define PVSCSI_CLASS(klass) \ OBJECT_CLASS_CHECK(PVSCSIClass, (klass), TYPE_PVSCSI) -#define PVSCSI_DEVICE_GET_CLASS(obj) \ +#define PVSCSI_GET_CLASS(obj) \ OBJECT_GET_CLASS(PVSCSIClass, (obj), TYPE_PVSCSI) /* Compatibility flags for migration */ @@ -1265,7 +1265,7 @@ static Property pvscsi_properties[] = { static void pvscsi_realize(DeviceState *qdev, Error **errp) { - PVSCSIClass *pvs_c = PVSCSI_DEVICE_GET_CLASS(qdev); + PVSCSIClass *pvs_c = PVSCSI_GET_CLASS(qdev); PCIDevice *pci_dev = PCI_DEVICE(qdev); PVSCSIState *s = PVSCSI(qdev); @@ -1280,7 +1280,7 @@ static void pvscsi_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - PVSCSIClass *pvs_k = PVSCSI_DEVICE_CLASS(klass); + PVSCSIClass *pvs_k = PVSCSI_CLASS(klass); HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); k->realize = pvscsi_realizefn; From patchwork Thu Aug 20 00:11:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276028 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56606C433DF for ; Thu, 20 Aug 2020 00:15:27 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1F1ED207DA for ; Thu, 20 Aug 2020 00:15:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="hiEY9wK7" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1F1ED207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:47746 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YEo-0001S7-AW for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:15:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48926) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YCJ-0004kB-0g for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:12:51 -0400 Received: from us-smtp-delivery-124.mimecast.com ([63.128.21.124]:20102) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YCH-0002Gb-3I for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:12:50 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882368; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=k/TnqvUgCno7HKezta0XAkL5zem1rmll2vSOVW/9iIk=; b=hiEY9wK7D+835g/ihERqbwCdqvJEDvgLpWvFZsJToBmyCowdwdWHO4XBggMPWVyyaKb+kQ ah03q9KF6T2A9Rpi6/EwQekP/02N0Pa9H8uIIuUkV13ytLM0//pEiRZ1uMEBfv+GNXT8iw e7riA2WyiNmd+WehMhQXG7isG59Olzs= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-250-7aDX9aDbO1qgjilema1DzQ-1; Wed, 19 Aug 2020 20:12:46 -0400 X-MC-Unique: 7aDX9aDbO1qgjilema1DzQ-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 59BA6186A568; Thu, 20 Aug 2020 00:12:45 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id D61C616D4B; Thu, 20 Aug 2020 00:12:44 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 04/58] pl110: Rename pl110_version enum values Date: Wed, 19 Aug 2020 20:11:42 -0400 Message-Id: <20200820001236.1284548-5-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=63.128.21.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:48 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , qemu-arm@nongnu.org, "Daniel P. Berrange" , Peter Maydell Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The PL110 enum value name will conflict with the PL110 type cast checker, when we replace the existing macro with an inline function. Add a VERSION_ prefix to all pl110_version enum values, to avoid conflicts. Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: * Fixed typo on commit message * Rename all enum values to VERSION_* (Philippe Mathieu-Daudé) --- Cc: Peter Maydell Cc: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org --- hw/display/pl110.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/display/pl110.c b/hw/display/pl110.c index c2991a28d2..61fefbffb3 100644 --- a/hw/display/pl110.c +++ b/hw/display/pl110.c @@ -42,9 +42,9 @@ enum pl110_bppmode /* The Versatile/PB uses a slightly modified PL110 controller. */ enum pl110_version { - PL110, - PL110_VERSATILE, - PL111 + VERSION_PL110, + VERSION_PL110_VERSATILE, + VERSION_PL111 }; #define TYPE_PL110 "pl110" @@ -189,7 +189,7 @@ static void pl110_update_display(void *opaque) else bpp_offset = 24; - if ((s->version != PL111) && (s->bpp == BPP_16)) { + if ((s->version != VERSION_PL111) && (s->bpp == BPP_16)) { /* The PL110's native 16 bit mode is 5551; however * most boards with a PL110 implement an external * mux which allows bits to be reshuffled to give @@ -372,12 +372,12 @@ static uint64_t pl110_read(void *opaque, hwaddr offset, case 5: /* LCDLPBASE */ return s->lpbase; case 6: /* LCDIMSC */ - if (s->version != PL110) { + if (s->version != VERSION_PL110) { return s->cr; } return s->int_mask; case 7: /* LCDControl */ - if (s->version != PL110) { + if (s->version != VERSION_PL110) { return s->int_mask; } return s->cr; @@ -437,7 +437,7 @@ static void pl110_write(void *opaque, hwaddr offset, s->lpbase = val; break; case 6: /* LCDIMSC */ - if (s->version != PL110) { + if (s->version != VERSION_PL110) { goto control; } imsc: @@ -445,7 +445,7 @@ static void pl110_write(void *opaque, hwaddr offset, pl110_update(s); break; case 7: /* LCDControl */ - if (s->version != PL110) { + if (s->version != VERSION_PL110) { goto imsc; } control: @@ -513,21 +513,21 @@ static void pl110_init(Object *obj) { PL110State *s = PL110(obj); - s->version = PL110; + s->version = VERSION_PL110; } static void pl110_versatile_init(Object *obj) { PL110State *s = PL110(obj); - s->version = PL110_VERSATILE; + s->version = VERSION_PL110_VERSATILE; } static void pl111_init(Object *obj) { PL110State *s = PL110(obj); - s->version = PL111; + s->version = VERSION_PL111; } static void pl110_class_init(ObjectClass *klass, void *data) From patchwork Thu Aug 20 00:11:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276029 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1B56C433DF for ; Thu, 20 Aug 2020 00:14:15 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AF3A6207DA for ; Thu, 20 Aug 2020 00:14:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="WAv/TasK" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AF3A6207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:40900 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YDe-000726-Rm for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:14:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48996) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YCN-0004qm-AW for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:12:55 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:35718) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YCK-0002HH-G5 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:12:55 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882371; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hT/uSSxbKVHTBTZCuYv3DTzNUzKOqiQw8o/Sr2VbIog=; b=WAv/TasK2lLNdj7xoHywj25bpdpARHBV1NrmdR5iBxZVVB01QmOgtelaU7EhmXUFPmSvLa 9DA8CtzY0swFxWonZK1Okn96oEtGesYwt1kvMfcHMNZYqdbv2qywt3nh69Nyhnly7cknWt 7APvnENNrabhtaZ0AVltFdqwtbnk7I0= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-469-xyhHWh5mPM6c8ZTa769W_A-1; Wed, 19 Aug 2020 20:12:47 -0400 X-MC-Unique: xyhHWh5mPM6c8ZTa769W_A-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id A21D81DDFF; Thu, 20 Aug 2020 00:12:46 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 402575C1DC; Thu, 20 Aug 2020 00:12:46 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 05/58] allwinner-h3: Rename memmap enum constants Date: Wed, 19 Aug 2020 20:11:43 -0400 Message-Id: <20200820001236.1284548-6-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=216.205.24.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:51 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=-1, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "Daniel P. Berrange" , Beniamino Galvani , Niek Linnenbank , qemu-arm@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Some of the enum constant names conflict with the QOM type check macros (AW_H3_CCU, AW_H3_SYSCTRL). This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE(). Rename all the constants to AW_H3_DEV_*, to avoid conflicts. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: * Added more details to commit message --- Cc: Beniamino Galvani Cc: Peter Maydell Cc: Niek Linnenbank Cc: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org --- include/hw/arm/allwinner-h3.h | 62 ++++++++--------- hw/arm/allwinner-h3.c | 124 +++++++++++++++++----------------- hw/arm/orangepi.c | 6 +- 3 files changed, 96 insertions(+), 96 deletions(-) diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h index 82e4e59216..626139dcb3 100644 --- a/include/hw/arm/allwinner-h3.h +++ b/include/hw/arm/allwinner-h3.h @@ -61,37 +61,37 @@ * @see AwH3State */ enum { - AW_H3_SRAM_A1, - AW_H3_SRAM_A2, - AW_H3_SRAM_C, - AW_H3_SYSCTRL, - AW_H3_MMC0, - AW_H3_SID, - AW_H3_EHCI0, - AW_H3_OHCI0, - AW_H3_EHCI1, - AW_H3_OHCI1, - AW_H3_EHCI2, - AW_H3_OHCI2, - AW_H3_EHCI3, - AW_H3_OHCI3, - AW_H3_CCU, - AW_H3_PIT, - AW_H3_UART0, - AW_H3_UART1, - AW_H3_UART2, - AW_H3_UART3, - AW_H3_EMAC, - AW_H3_DRAMCOM, - AW_H3_DRAMCTL, - AW_H3_DRAMPHY, - AW_H3_GIC_DIST, - AW_H3_GIC_CPU, - AW_H3_GIC_HYP, - AW_H3_GIC_VCPU, - AW_H3_RTC, - AW_H3_CPUCFG, - AW_H3_SDRAM + AW_H3_DEV_SRAM_A1, + AW_H3_DEV_SRAM_A2, + AW_H3_DEV_SRAM_C, + AW_H3_DEV_SYSCTRL, + AW_H3_DEV_MMC0, + AW_H3_DEV_SID, + AW_H3_DEV_EHCI0, + AW_H3_DEV_OHCI0, + AW_H3_DEV_EHCI1, + AW_H3_DEV_OHCI1, + AW_H3_DEV_EHCI2, + AW_H3_DEV_OHCI2, + AW_H3_DEV_EHCI3, + AW_H3_DEV_OHCI3, + AW_H3_DEV_CCU, + AW_H3_DEV_PIT, + AW_H3_DEV_UART0, + AW_H3_DEV_UART1, + AW_H3_DEV_UART2, + AW_H3_DEV_UART3, + AW_H3_DEV_EMAC, + AW_H3_DEV_DRAMCOM, + AW_H3_DEV_DRAMCTL, + AW_H3_DEV_DRAMPHY, + AW_H3_DEV_GIC_DIST, + AW_H3_DEV_GIC_CPU, + AW_H3_DEV_GIC_HYP, + AW_H3_DEV_GIC_VCPU, + AW_H3_DEV_RTC, + AW_H3_DEV_CPUCFG, + AW_H3_DEV_SDRAM }; /** Total number of CPU cores in the H3 SoC */ diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index ff92ded82c..341abe6718 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -35,37 +35,37 @@ /* Memory map */ const hwaddr allwinner_h3_memmap[] = { - [AW_H3_SRAM_A1] = 0x00000000, - [AW_H3_SRAM_A2] = 0x00044000, - [AW_H3_SRAM_C] = 0x00010000, - [AW_H3_SYSCTRL] = 0x01c00000, - [AW_H3_MMC0] = 0x01c0f000, - [AW_H3_SID] = 0x01c14000, - [AW_H3_EHCI0] = 0x01c1a000, - [AW_H3_OHCI0] = 0x01c1a400, - [AW_H3_EHCI1] = 0x01c1b000, - [AW_H3_OHCI1] = 0x01c1b400, - [AW_H3_EHCI2] = 0x01c1c000, - [AW_H3_OHCI2] = 0x01c1c400, - [AW_H3_EHCI3] = 0x01c1d000, - [AW_H3_OHCI3] = 0x01c1d400, - [AW_H3_CCU] = 0x01c20000, - [AW_H3_PIT] = 0x01c20c00, - [AW_H3_UART0] = 0x01c28000, - [AW_H3_UART1] = 0x01c28400, - [AW_H3_UART2] = 0x01c28800, - [AW_H3_UART3] = 0x01c28c00, - [AW_H3_EMAC] = 0x01c30000, - [AW_H3_DRAMCOM] = 0x01c62000, - [AW_H3_DRAMCTL] = 0x01c63000, - [AW_H3_DRAMPHY] = 0x01c65000, - [AW_H3_GIC_DIST] = 0x01c81000, - [AW_H3_GIC_CPU] = 0x01c82000, - [AW_H3_GIC_HYP] = 0x01c84000, - [AW_H3_GIC_VCPU] = 0x01c86000, - [AW_H3_RTC] = 0x01f00000, - [AW_H3_CPUCFG] = 0x01f01c00, - [AW_H3_SDRAM] = 0x40000000 + [AW_H3_DEV_SRAM_A1] = 0x00000000, + [AW_H3_DEV_SRAM_A2] = 0x00044000, + [AW_H3_DEV_SRAM_C] = 0x00010000, + [AW_H3_DEV_SYSCTRL] = 0x01c00000, + [AW_H3_DEV_MMC0] = 0x01c0f000, + [AW_H3_DEV_SID] = 0x01c14000, + [AW_H3_DEV_EHCI0] = 0x01c1a000, + [AW_H3_DEV_OHCI0] = 0x01c1a400, + [AW_H3_DEV_EHCI1] = 0x01c1b000, + [AW_H3_DEV_OHCI1] = 0x01c1b400, + [AW_H3_DEV_EHCI2] = 0x01c1c000, + [AW_H3_DEV_OHCI2] = 0x01c1c400, + [AW_H3_DEV_EHCI3] = 0x01c1d000, + [AW_H3_DEV_OHCI3] = 0x01c1d400, + [AW_H3_DEV_CCU] = 0x01c20000, + [AW_H3_DEV_PIT] = 0x01c20c00, + [AW_H3_DEV_UART0] = 0x01c28000, + [AW_H3_DEV_UART1] = 0x01c28400, + [AW_H3_DEV_UART2] = 0x01c28800, + [AW_H3_DEV_UART3] = 0x01c28c00, + [AW_H3_DEV_EMAC] = 0x01c30000, + [AW_H3_DEV_DRAMCOM] = 0x01c62000, + [AW_H3_DEV_DRAMCTL] = 0x01c63000, + [AW_H3_DEV_DRAMPHY] = 0x01c65000, + [AW_H3_DEV_GIC_DIST] = 0x01c81000, + [AW_H3_DEV_GIC_CPU] = 0x01c82000, + [AW_H3_DEV_GIC_HYP] = 0x01c84000, + [AW_H3_DEV_GIC_VCPU] = 0x01c86000, + [AW_H3_DEV_RTC] = 0x01f00000, + [AW_H3_DEV_CPUCFG] = 0x01f01c00, + [AW_H3_DEV_SDRAM] = 0x40000000 }; /* List of unimplemented devices */ @@ -183,7 +183,7 @@ void allwinner_h3_bootrom_setup(AwH3State *s, BlockBackend *blk) } rom_add_blob("allwinner-h3.bootrom", buffer, rom_size, - rom_size, s->memmap[AW_H3_SRAM_A1], + rom_size, s->memmap[AW_H3_DEV_SRAM_A1], NULL, NULL, NULL, NULL, false); } @@ -262,10 +262,10 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) qdev_prop_set_bit(DEVICE(&s->gic), "has-virtualization-extensions", true); sysbus_realize(SYS_BUS_DEVICE(&s->gic), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 0, s->memmap[AW_H3_GIC_DIST]); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 1, s->memmap[AW_H3_GIC_CPU]); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 2, s->memmap[AW_H3_GIC_HYP]); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 3, s->memmap[AW_H3_GIC_VCPU]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 0, s->memmap[AW_H3_DEV_GIC_DIST]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 1, s->memmap[AW_H3_DEV_GIC_CPU]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 2, s->memmap[AW_H3_DEV_GIC_HYP]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 3, s->memmap[AW_H3_DEV_GIC_VCPU]); /* * Wire the outputs from each CPU's generic timer and the GICv3 @@ -312,7 +312,7 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) /* Timer */ sysbus_realize(SYS_BUS_DEVICE(&s->timer), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->timer), 0, s->memmap[AW_H3_PIT]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->timer), 0, s->memmap[AW_H3_DEV_PIT]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer), 0, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_TIMER0)); sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer), 1, @@ -325,32 +325,32 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) 32 * KiB, &error_abort); memory_region_init_ram(&s->sram_c, OBJECT(dev), "sram C", 44 * KiB, &error_abort); - memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_SRAM_A1], + memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_DEV_SRAM_A1], &s->sram_a1); - memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_SRAM_A2], + memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_DEV_SRAM_A2], &s->sram_a2); - memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_SRAM_C], + memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_DEV_SRAM_C], &s->sram_c); /* Clock Control Unit */ sysbus_realize(SYS_BUS_DEVICE(&s->ccu), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccu), 0, s->memmap[AW_H3_CCU]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccu), 0, s->memmap[AW_H3_DEV_CCU]); /* System Control */ sysbus_realize(SYS_BUS_DEVICE(&s->sysctrl), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->sysctrl), 0, s->memmap[AW_H3_SYSCTRL]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sysctrl), 0, s->memmap[AW_H3_DEV_SYSCTRL]); /* CPU Configuration */ sysbus_realize(SYS_BUS_DEVICE(&s->cpucfg), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->cpucfg), 0, s->memmap[AW_H3_CPUCFG]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->cpucfg), 0, s->memmap[AW_H3_DEV_CPUCFG]); /* Security Identifier */ sysbus_realize(SYS_BUS_DEVICE(&s->sid), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->sid), 0, s->memmap[AW_H3_SID]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sid), 0, s->memmap[AW_H3_DEV_SID]); /* SD/MMC */ sysbus_realize(SYS_BUS_DEVICE(&s->mmc0), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, s->memmap[AW_H3_MMC0]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, s->memmap[AW_H3_DEV_MMC0]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_MMC0)); @@ -364,63 +364,63 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]); } sysbus_realize(SYS_BUS_DEVICE(&s->emac), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->emac), 0, s->memmap[AW_H3_EMAC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->emac), 0, s->memmap[AW_H3_DEV_EMAC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->emac), 0, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_EMAC)); /* Universal Serial Bus */ - sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI0], + sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_DEV_EHCI0], qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_EHCI0)); - sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI1], + sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_DEV_EHCI1], qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_EHCI1)); - sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI2], + sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_DEV_EHCI2], qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_EHCI2)); - sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI3], + sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_DEV_EHCI3], qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_EHCI3)); - sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_OHCI0], + sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_DEV_OHCI0], qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_OHCI0)); - sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_OHCI1], + sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_DEV_OHCI1], qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_OHCI1)); - sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_OHCI2], + sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_DEV_OHCI2], qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_OHCI2)); - sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_OHCI3], + sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_DEV_OHCI3], qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_OHCI3)); /* UART0. For future clocktree API: All UARTS are connected to APB2_CLK. */ - serial_mm_init(get_system_memory(), s->memmap[AW_H3_UART0], 2, + serial_mm_init(get_system_memory(), s->memmap[AW_H3_DEV_UART0], 2, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_UART0), 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN); /* UART1 */ - serial_mm_init(get_system_memory(), s->memmap[AW_H3_UART1], 2, + serial_mm_init(get_system_memory(), s->memmap[AW_H3_DEV_UART1], 2, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_UART1), 115200, serial_hd(1), DEVICE_NATIVE_ENDIAN); /* UART2 */ - serial_mm_init(get_system_memory(), s->memmap[AW_H3_UART2], 2, + serial_mm_init(get_system_memory(), s->memmap[AW_H3_DEV_UART2], 2, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_UART2), 115200, serial_hd(2), DEVICE_NATIVE_ENDIAN); /* UART3 */ - serial_mm_init(get_system_memory(), s->memmap[AW_H3_UART3], 2, + serial_mm_init(get_system_memory(), s->memmap[AW_H3_DEV_UART3], 2, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_UART3), 115200, serial_hd(3), DEVICE_NATIVE_ENDIAN); /* DRAMC */ sysbus_realize(SYS_BUS_DEVICE(&s->dramc), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->dramc), 0, s->memmap[AW_H3_DRAMCOM]); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->dramc), 1, s->memmap[AW_H3_DRAMCTL]); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->dramc), 2, s->memmap[AW_H3_DRAMPHY]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->dramc), 0, s->memmap[AW_H3_DEV_DRAMCOM]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->dramc), 1, s->memmap[AW_H3_DEV_DRAMCTL]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->dramc), 2, s->memmap[AW_H3_DEV_DRAMPHY]); /* RTC */ sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, s->memmap[AW_H3_RTC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, s->memmap[AW_H3_DEV_RTC]); /* Unimplemented devices */ for (i = 0; i < ARRAY_SIZE(unimplemented); i++) { diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index 1679468232..17a568a2b4 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -79,7 +79,7 @@ static void orangepi_init(MachineState *machine) object_property_set_int(OBJECT(&h3->emac), "phy-addr", 1, &error_abort); /* DRAMC */ - object_property_set_uint(OBJECT(h3), "ram-addr", h3->memmap[AW_H3_SDRAM], + object_property_set_uint(OBJECT(h3), "ram-addr", h3->memmap[AW_H3_DEV_SDRAM], &error_abort); object_property_set_int(OBJECT(h3), "ram-size", machine->ram_size / MiB, &error_abort); @@ -98,7 +98,7 @@ static void orangepi_init(MachineState *machine) qdev_realize_and_unref(carddev, bus, &error_fatal); /* SDRAM */ - memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_SDRAM], + memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_DEV_SDRAM], machine->ram); /* Load target kernel or start using BootROM */ @@ -106,7 +106,7 @@ static void orangepi_init(MachineState *machine) /* Use Boot ROM to copy data from SD card to SRAM */ allwinner_h3_bootrom_setup(h3, blk); } - orangepi_binfo.loader_start = h3->memmap[AW_H3_SDRAM]; + orangepi_binfo.loader_start = h3->memmap[AW_H3_DEV_SDRAM]; orangepi_binfo.ram_size = machine->ram_size; arm_load_kernel(ARM_CPU(first_cpu), machine, &orangepi_binfo); } From patchwork Thu Aug 20 00:11:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276027 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF460C433DF for ; Thu, 20 Aug 2020 00:16:01 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8C822207FB for ; Thu, 20 Aug 2020 00:16:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="f4R4JtSi" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8C822207FB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:49818 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YFM-0002KD-Q0 for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:16:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49028) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YCR-00050Y-6B for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:12:59 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:24328 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YCN-0002Hk-MP for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:12:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882375; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xhbMTXQlLIXpJUSRF3/4LycR+B6AULwXwF3Cps9Sfp4=; b=f4R4JtSiu4MFkcFLV80g2Y+Ji9ksPuEV/auzBSdAq8Slb4wHBLbSrPgDDqx34GzxAfJ3jH HWBusK6TEUZGkyAfEH1RCu6ntgqJ6AWux/3euuLKlXj2K3X4AjA6x5zjMMdv24TqO1HFGz 3WtwdNB4w8b7/6vntYyq/UfdPIu1QjU= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-182-PkxJoJJgMqWfD0ueyaVKrg-1; Wed, 19 Aug 2020 20:12:51 -0400 X-MC-Unique: PkxJoJJgMqWfD0ueyaVKrg-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 89AB5186A574; Thu, 20 Aug 2020 00:12:50 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id DA792756D8; Thu, 20 Aug 2020 00:12:48 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 06/58] aspeed_soc: Rename memmap/irqmap enum constants Date: Wed, 19 Aug 2020 20:11:44 -0400 Message-Id: <20200820001236.1284548-7-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 18:27:43 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "Daniel P. Berrange" , Andrew Jeffery , qemu-arm@nongnu.org, Joel Stanley , Paolo Bonzini , =?utf-8?q?C=C3=A9dric_Le_Goater?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Some of the enum constant names conflict with the QOM type check macros: ASPEED_GPIO ASPEED_I2C ASPEED_RTC ASPEED_SCU ASPEED_SDHCI ASPEED_SDMC ASPEED_VIC ASPEED_WDT ASPEED_XDMA This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE(). Rename all the constants to ASPEED_DEV_*, to avoid conflicts. Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: * Added more details to commit message --- Cc: "Cédric Le Goater" Cc: Peter Maydell Cc: Andrew Jeffery Cc: Joel Stanley Cc: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org --- include/hw/arm/aspeed_soc.h | 92 +++++++-------- hw/arm/aspeed.c | 4 +- hw/arm/aspeed_ast2600.c | 208 ++++++++++++++++---------------- hw/arm/aspeed_soc.c | 228 ++++++++++++++++++------------------ 4 files changed, 266 insertions(+), 266 deletions(-) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 914115f3ef..d46f197cbe 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -87,52 +87,52 @@ typedef struct AspeedSoCClass { OBJECT_GET_CLASS(AspeedSoCClass, (obj), TYPE_ASPEED_SOC) enum { - ASPEED_IOMEM, - ASPEED_UART1, - ASPEED_UART2, - ASPEED_UART3, - ASPEED_UART4, - ASPEED_UART5, - ASPEED_VUART, - ASPEED_FMC, - ASPEED_SPI1, - ASPEED_SPI2, - ASPEED_EHCI1, - ASPEED_EHCI2, - ASPEED_VIC, - ASPEED_SDMC, - ASPEED_SCU, - ASPEED_ADC, - ASPEED_VIDEO, - ASPEED_SRAM, - ASPEED_SDHCI, - ASPEED_GPIO, - ASPEED_GPIO_1_8V, - ASPEED_RTC, - ASPEED_TIMER1, - ASPEED_TIMER2, - ASPEED_TIMER3, - ASPEED_TIMER4, - ASPEED_TIMER5, - ASPEED_TIMER6, - ASPEED_TIMER7, - ASPEED_TIMER8, - ASPEED_WDT, - ASPEED_PWM, - ASPEED_LPC, - ASPEED_IBT, - ASPEED_I2C, - ASPEED_ETH1, - ASPEED_ETH2, - ASPEED_ETH3, - ASPEED_ETH4, - ASPEED_MII1, - ASPEED_MII2, - ASPEED_MII3, - ASPEED_MII4, - ASPEED_SDRAM, - ASPEED_XDMA, - ASPEED_EMMC, + ASPEED_DEV_IOMEM, + ASPEED_DEV_UART1, + ASPEED_DEV_UART2, + ASPEED_DEV_UART3, + ASPEED_DEV_UART4, + ASPEED_DEV_UART5, + ASPEED_DEV_VUART, + ASPEED_DEV_FMC, + ASPEED_DEV_SPI1, + ASPEED_DEV_SPI2, + ASPEED_DEV_EHCI1, + ASPEED_DEV_EHCI2, + ASPEED_DEV_VIC, + ASPEED_DEV_SDMC, + ASPEED_DEV_SCU, + ASPEED_DEV_ADC, + ASPEED_DEV_VIDEO, + ASPEED_DEV_SRAM, + ASPEED_DEV_SDHCI, + ASPEED_DEV_GPIO, + ASPEED_DEV_GPIO_1_8V, + ASPEED_DEV_RTC, + ASPEED_DEV_TIMER1, + ASPEED_DEV_TIMER2, + ASPEED_DEV_TIMER3, + ASPEED_DEV_TIMER4, + ASPEED_DEV_TIMER5, + ASPEED_DEV_TIMER6, + ASPEED_DEV_TIMER7, + ASPEED_DEV_TIMER8, + ASPEED_DEV_WDT, + ASPEED_DEV_PWM, + ASPEED_DEV_LPC, + ASPEED_DEV_IBT, + ASPEED_DEV_I2C, + ASPEED_DEV_ETH1, + ASPEED_DEV_ETH2, + ASPEED_DEV_ETH3, + ASPEED_DEV_ETH4, + ASPEED_DEV_MII1, + ASPEED_DEV_MII2, + ASPEED_DEV_MII3, + ASPEED_DEV_MII4, + ASPEED_DEV_SDRAM, + ASPEED_DEV_XDMA, + ASPEED_DEV_EMMC, }; #endif /* ASPEED_SOC_H */ diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index fcb1a7cd87..8109cc6d2d 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -309,7 +309,7 @@ static void aspeed_machine_init(MachineState *machine) qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort); memory_region_add_subregion(get_system_memory(), - sc->memmap[ASPEED_SDRAM], + sc->memmap[ASPEED_DEV_SDRAM], &bmc->ram_container); max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size", @@ -360,7 +360,7 @@ static void aspeed_machine_init(MachineState *machine) } aspeed_board_binfo.ram_size = ram_size; - aspeed_board_binfo.loader_start = sc->memmap[ASPEED_SDRAM]; + aspeed_board_binfo.loader_start = sc->memmap[ASPEED_DEV_SDRAM]; aspeed_board_binfo.nb_cpus = sc->num_cpus; if (amc->i2c_init) { diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 3767f7d8d0..9d95e42143 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -24,43 +24,43 @@ #define ASPEED_SOC_IOMEM_SIZE 0x00200000 static const hwaddr aspeed_soc_ast2600_memmap[] = { - [ASPEED_SRAM] = 0x10000000, + [ASPEED_DEV_SRAM] = 0x10000000, /* 0x16000000 0x17FFFFFF : AHB BUS do LPC Bus bridge */ - [ASPEED_IOMEM] = 0x1E600000, - [ASPEED_PWM] = 0x1E610000, - [ASPEED_FMC] = 0x1E620000, - [ASPEED_SPI1] = 0x1E630000, - [ASPEED_SPI2] = 0x1E641000, - [ASPEED_EHCI1] = 0x1E6A1000, - [ASPEED_EHCI2] = 0x1E6A3000, - [ASPEED_MII1] = 0x1E650000, - [ASPEED_MII2] = 0x1E650008, - [ASPEED_MII3] = 0x1E650010, - [ASPEED_MII4] = 0x1E650018, - [ASPEED_ETH1] = 0x1E660000, - [ASPEED_ETH3] = 0x1E670000, - [ASPEED_ETH2] = 0x1E680000, - [ASPEED_ETH4] = 0x1E690000, - [ASPEED_VIC] = 0x1E6C0000, - [ASPEED_SDMC] = 0x1E6E0000, - [ASPEED_SCU] = 0x1E6E2000, - [ASPEED_XDMA] = 0x1E6E7000, - [ASPEED_ADC] = 0x1E6E9000, - [ASPEED_VIDEO] = 0x1E700000, - [ASPEED_SDHCI] = 0x1E740000, - [ASPEED_EMMC] = 0x1E750000, - [ASPEED_GPIO] = 0x1E780000, - [ASPEED_GPIO_1_8V] = 0x1E780800, - [ASPEED_RTC] = 0x1E781000, - [ASPEED_TIMER1] = 0x1E782000, - [ASPEED_WDT] = 0x1E785000, - [ASPEED_LPC] = 0x1E789000, - [ASPEED_IBT] = 0x1E789140, - [ASPEED_I2C] = 0x1E78A000, - [ASPEED_UART1] = 0x1E783000, - [ASPEED_UART5] = 0x1E784000, - [ASPEED_VUART] = 0x1E787000, - [ASPEED_SDRAM] = 0x80000000, + [ASPEED_DEV_IOMEM] = 0x1E600000, + [ASPEED_DEV_PWM] = 0x1E610000, + [ASPEED_DEV_FMC] = 0x1E620000, + [ASPEED_DEV_SPI1] = 0x1E630000, + [ASPEED_DEV_SPI2] = 0x1E641000, + [ASPEED_DEV_EHCI1] = 0x1E6A1000, + [ASPEED_DEV_EHCI2] = 0x1E6A3000, + [ASPEED_DEV_MII1] = 0x1E650000, + [ASPEED_DEV_MII2] = 0x1E650008, + [ASPEED_DEV_MII3] = 0x1E650010, + [ASPEED_DEV_MII4] = 0x1E650018, + [ASPEED_DEV_ETH1] = 0x1E660000, + [ASPEED_DEV_ETH3] = 0x1E670000, + [ASPEED_DEV_ETH2] = 0x1E680000, + [ASPEED_DEV_ETH4] = 0x1E690000, + [ASPEED_DEV_VIC] = 0x1E6C0000, + [ASPEED_DEV_SDMC] = 0x1E6E0000, + [ASPEED_DEV_SCU] = 0x1E6E2000, + [ASPEED_DEV_XDMA] = 0x1E6E7000, + [ASPEED_DEV_ADC] = 0x1E6E9000, + [ASPEED_DEV_VIDEO] = 0x1E700000, + [ASPEED_DEV_SDHCI] = 0x1E740000, + [ASPEED_DEV_EMMC] = 0x1E750000, + [ASPEED_DEV_GPIO] = 0x1E780000, + [ASPEED_DEV_GPIO_1_8V] = 0x1E780800, + [ASPEED_DEV_RTC] = 0x1E781000, + [ASPEED_DEV_TIMER1] = 0x1E782000, + [ASPEED_DEV_WDT] = 0x1E785000, + [ASPEED_DEV_LPC] = 0x1E789000, + [ASPEED_DEV_IBT] = 0x1E789140, + [ASPEED_DEV_I2C] = 0x1E78A000, + [ASPEED_DEV_UART1] = 0x1E783000, + [ASPEED_DEV_UART5] = 0x1E784000, + [ASPEED_DEV_VUART] = 0x1E787000, + [ASPEED_DEV_SDRAM] = 0x80000000, }; #define ASPEED_A7MPCORE_ADDR 0x40460000 @@ -69,41 +69,41 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = { /* Shared Peripheral Interrupt values below are offset by -32 from datasheet */ static const int aspeed_soc_ast2600_irqmap[] = { - [ASPEED_UART1] = 47, - [ASPEED_UART2] = 48, - [ASPEED_UART3] = 49, - [ASPEED_UART4] = 50, - [ASPEED_UART5] = 8, - [ASPEED_VUART] = 8, - [ASPEED_FMC] = 39, - [ASPEED_SDMC] = 0, - [ASPEED_SCU] = 12, - [ASPEED_ADC] = 78, - [ASPEED_XDMA] = 6, - [ASPEED_SDHCI] = 43, - [ASPEED_EHCI1] = 5, - [ASPEED_EHCI2] = 9, - [ASPEED_EMMC] = 15, - [ASPEED_GPIO] = 40, - [ASPEED_GPIO_1_8V] = 11, - [ASPEED_RTC] = 13, - [ASPEED_TIMER1] = 16, - [ASPEED_TIMER2] = 17, - [ASPEED_TIMER3] = 18, - [ASPEED_TIMER4] = 19, - [ASPEED_TIMER5] = 20, - [ASPEED_TIMER6] = 21, - [ASPEED_TIMER7] = 22, - [ASPEED_TIMER8] = 23, - [ASPEED_WDT] = 24, - [ASPEED_PWM] = 44, - [ASPEED_LPC] = 35, - [ASPEED_IBT] = 35, /* LPC */ - [ASPEED_I2C] = 110, /* 110 -> 125 */ - [ASPEED_ETH1] = 2, - [ASPEED_ETH2] = 3, - [ASPEED_ETH3] = 32, - [ASPEED_ETH4] = 33, + [ASPEED_DEV_UART1] = 47, + [ASPEED_DEV_UART2] = 48, + [ASPEED_DEV_UART3] = 49, + [ASPEED_DEV_UART4] = 50, + [ASPEED_DEV_UART5] = 8, + [ASPEED_DEV_VUART] = 8, + [ASPEED_DEV_FMC] = 39, + [ASPEED_DEV_SDMC] = 0, + [ASPEED_DEV_SCU] = 12, + [ASPEED_DEV_ADC] = 78, + [ASPEED_DEV_XDMA] = 6, + [ASPEED_DEV_SDHCI] = 43, + [ASPEED_DEV_EHCI1] = 5, + [ASPEED_DEV_EHCI2] = 9, + [ASPEED_DEV_EMMC] = 15, + [ASPEED_DEV_GPIO] = 40, + [ASPEED_DEV_GPIO_1_8V] = 11, + [ASPEED_DEV_RTC] = 13, + [ASPEED_DEV_TIMER1] = 16, + [ASPEED_DEV_TIMER2] = 17, + [ASPEED_DEV_TIMER3] = 18, + [ASPEED_DEV_TIMER4] = 19, + [ASPEED_DEV_TIMER5] = 20, + [ASPEED_DEV_TIMER6] = 21, + [ASPEED_DEV_TIMER7] = 22, + [ASPEED_DEV_TIMER8] = 23, + [ASPEED_DEV_WDT] = 24, + [ASPEED_DEV_PWM] = 44, + [ASPEED_DEV_LPC] = 35, + [ASPEED_DEV_IBT] = 35, /* LPC */ + [ASPEED_DEV_I2C] = 110, /* 110 -> 125 */ + [ASPEED_DEV_ETH1] = 2, + [ASPEED_DEV_ETH2] = 3, + [ASPEED_DEV_ETH3] = 32, + [ASPEED_DEV_ETH4] = 33, }; @@ -232,11 +232,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) qemu_irq irq; /* IO space */ - create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_IOMEM], + create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_DEV_IOMEM], ASPEED_SOC_IOMEM_SIZE); /* Video engine stub */ - create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_VIDEO], + create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_DEV_VIDEO], 0x1000); /* CPU */ @@ -295,21 +295,21 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } memory_region_add_subregion(get_system_memory(), - sc->memmap[ASPEED_SRAM], &s->sram); + sc->memmap[ASPEED_DEV_SRAM], &s->sram); /* SCU */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_SCU]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]); /* RTC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->rtc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_RTC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, - aspeed_soc_get_irq(s, ASPEED_RTC)); + aspeed_soc_get_irq(s, ASPEED_DEV_RTC)); /* Timer */ object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu), @@ -318,16 +318,16 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->timerctrl), 0, - sc->memmap[ASPEED_TIMER1]); + sc->memmap[ASPEED_DEV_TIMER1]); for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) { - qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_TIMER1 + i); + qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i); sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq); } /* UART - attach an 8250 to the IO space as our UART5 */ if (serial_hd(0)) { - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_UART5); - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_UART5], 2, + qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); } @@ -337,10 +337,10 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_I2C]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]); for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) { qemu_irq irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), - sc->irqmap[ASPEED_I2C] + i); + sc->irqmap[ASPEED_DEV_I2C] + i); /* * The AST2600 SoC has one IRQ per I2C bus. Skip the common * IRQ (AST2400 and AST2500) and connect all bussses. @@ -352,17 +352,17 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) object_property_set_link(OBJECT(&s->fmc), "dram", OBJECT(s->dram_mr), &error_abort); if (!object_property_set_int(OBJECT(&s->fmc), "sdram-base", - sc->memmap[ASPEED_SDRAM], errp)) { + sc->memmap[ASPEED_DEV_SDRAM], errp)) { return; } if (!sysbus_realize(SYS_BUS_DEVICE(&s->fmc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_FMC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]); sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 1, s->fmc.ctrl->flash_window_base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0, - aspeed_soc_get_irq(s, ASPEED_FMC)); + aspeed_soc_get_irq(s, ASPEED_DEV_FMC)); /* SPI */ for (i = 0; i < sc->spis_num; i++) { @@ -373,7 +373,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, - sc->memmap[ASPEED_SPI1 + i]); + sc->memmap[ASPEED_DEV_SPI1 + i]); sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 1, s->spi[i].ctrl->flash_window_base); } @@ -384,16 +384,16 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, - sc->memmap[ASPEED_EHCI1 + i]); + sc->memmap[ASPEED_DEV_EHCI1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, - aspeed_soc_get_irq(s, ASPEED_EHCI1 + i)); + aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i)); } /* SDMC - SDRAM Memory Controller */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, sc->memmap[ASPEED_SDMC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, sc->memmap[ASPEED_DEV_SDMC]); /* Watch dog */ for (i = 0; i < sc->wdts_num; i++) { @@ -405,7 +405,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, - sc->memmap[ASPEED_WDT] + i * awc->offset); + sc->memmap[ASPEED_DEV_WDT] + i * awc->offset); } /* Net */ @@ -416,9 +416,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, - sc->memmap[ASPEED_ETH1 + i]); + sc->memmap[ASPEED_DEV_ETH1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, - aspeed_soc_get_irq(s, ASPEED_ETH1 + i)); + aspeed_soc_get_irq(s, ASPEED_DEV_ETH1 + i)); object_property_set_link(OBJECT(&s->mii[i]), "nic", OBJECT(&s->ftgmac100[i]), &error_abort); @@ -427,7 +427,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) } sysbus_mmio_map(SYS_BUS_DEVICE(&s->mii[i]), 0, - sc->memmap[ASPEED_MII1 + i]); + sc->memmap[ASPEED_DEV_MII1 + i]); } /* XDMA */ @@ -435,42 +435,42 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->xdma), 0, - sc->memmap[ASPEED_XDMA]); + sc->memmap[ASPEED_DEV_XDMA]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0, - aspeed_soc_get_irq(s, ASPEED_XDMA)); + aspeed_soc_get_irq(s, ASPEED_DEV_XDMA)); /* GPIO */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_GPIO]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_DEV_GPIO]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, - aspeed_soc_get_irq(s, ASPEED_GPIO)); + aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio_1_8v), errp)) { return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio_1_8v), 0, - sc->memmap[ASPEED_GPIO_1_8V]); + sc->memmap[ASPEED_DEV_GPIO_1_8V]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio_1_8v), 0, - aspeed_soc_get_irq(s, ASPEED_GPIO_1_8V)); + aspeed_soc_get_irq(s, ASPEED_DEV_GPIO_1_8V)); /* SDHCI */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) { return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdhci), 0, - sc->memmap[ASPEED_SDHCI]); + sc->memmap[ASPEED_DEV_SDHCI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, - aspeed_soc_get_irq(s, ASPEED_SDHCI)); + aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI)); /* eMMC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->emmc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->emmc), 0, sc->memmap[ASPEED_EMMC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->emmc), 0, sc->memmap[ASPEED_DEV_EMMC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->emmc), 0, - aspeed_soc_get_irq(s, ASPEED_EMMC)); + aspeed_soc_get_irq(s, ASPEED_DEV_EMMC)); } static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data) diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index a1a8684216..35be126db6 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -27,97 +27,97 @@ #define ASPEED_SOC_IOMEM_SIZE 0x00200000 static const hwaddr aspeed_soc_ast2400_memmap[] = { - [ASPEED_IOMEM] = 0x1E600000, - [ASPEED_FMC] = 0x1E620000, - [ASPEED_SPI1] = 0x1E630000, - [ASPEED_EHCI1] = 0x1E6A1000, - [ASPEED_VIC] = 0x1E6C0000, - [ASPEED_SDMC] = 0x1E6E0000, - [ASPEED_SCU] = 0x1E6E2000, - [ASPEED_XDMA] = 0x1E6E7000, - [ASPEED_VIDEO] = 0x1E700000, - [ASPEED_ADC] = 0x1E6E9000, - [ASPEED_SRAM] = 0x1E720000, - [ASPEED_SDHCI] = 0x1E740000, - [ASPEED_GPIO] = 0x1E780000, - [ASPEED_RTC] = 0x1E781000, - [ASPEED_TIMER1] = 0x1E782000, - [ASPEED_WDT] = 0x1E785000, - [ASPEED_PWM] = 0x1E786000, - [ASPEED_LPC] = 0x1E789000, - [ASPEED_IBT] = 0x1E789140, - [ASPEED_I2C] = 0x1E78A000, - [ASPEED_ETH1] = 0x1E660000, - [ASPEED_ETH2] = 0x1E680000, - [ASPEED_UART1] = 0x1E783000, - [ASPEED_UART5] = 0x1E784000, - [ASPEED_VUART] = 0x1E787000, - [ASPEED_SDRAM] = 0x40000000, + [ASPEED_DEV_IOMEM] = 0x1E600000, + [ASPEED_DEV_FMC] = 0x1E620000, + [ASPEED_DEV_SPI1] = 0x1E630000, + [ASPEED_DEV_EHCI1] = 0x1E6A1000, + [ASPEED_DEV_VIC] = 0x1E6C0000, + [ASPEED_DEV_SDMC] = 0x1E6E0000, + [ASPEED_DEV_SCU] = 0x1E6E2000, + [ASPEED_DEV_XDMA] = 0x1E6E7000, + [ASPEED_DEV_VIDEO] = 0x1E700000, + [ASPEED_DEV_ADC] = 0x1E6E9000, + [ASPEED_DEV_SRAM] = 0x1E720000, + [ASPEED_DEV_SDHCI] = 0x1E740000, + [ASPEED_DEV_GPIO] = 0x1E780000, + [ASPEED_DEV_RTC] = 0x1E781000, + [ASPEED_DEV_TIMER1] = 0x1E782000, + [ASPEED_DEV_WDT] = 0x1E785000, + [ASPEED_DEV_PWM] = 0x1E786000, + [ASPEED_DEV_LPC] = 0x1E789000, + [ASPEED_DEV_IBT] = 0x1E789140, + [ASPEED_DEV_I2C] = 0x1E78A000, + [ASPEED_DEV_ETH1] = 0x1E660000, + [ASPEED_DEV_ETH2] = 0x1E680000, + [ASPEED_DEV_UART1] = 0x1E783000, + [ASPEED_DEV_UART5] = 0x1E784000, + [ASPEED_DEV_VUART] = 0x1E787000, + [ASPEED_DEV_SDRAM] = 0x40000000, }; static const hwaddr aspeed_soc_ast2500_memmap[] = { - [ASPEED_IOMEM] = 0x1E600000, - [ASPEED_FMC] = 0x1E620000, - [ASPEED_SPI1] = 0x1E630000, - [ASPEED_SPI2] = 0x1E631000, - [ASPEED_EHCI1] = 0x1E6A1000, - [ASPEED_EHCI2] = 0x1E6A3000, - [ASPEED_VIC] = 0x1E6C0000, - [ASPEED_SDMC] = 0x1E6E0000, - [ASPEED_SCU] = 0x1E6E2000, - [ASPEED_XDMA] = 0x1E6E7000, - [ASPEED_ADC] = 0x1E6E9000, - [ASPEED_VIDEO] = 0x1E700000, - [ASPEED_SRAM] = 0x1E720000, - [ASPEED_SDHCI] = 0x1E740000, - [ASPEED_GPIO] = 0x1E780000, - [ASPEED_RTC] = 0x1E781000, - [ASPEED_TIMER1] = 0x1E782000, - [ASPEED_WDT] = 0x1E785000, - [ASPEED_PWM] = 0x1E786000, - [ASPEED_LPC] = 0x1E789000, - [ASPEED_IBT] = 0x1E789140, - [ASPEED_I2C] = 0x1E78A000, - [ASPEED_ETH1] = 0x1E660000, - [ASPEED_ETH2] = 0x1E680000, - [ASPEED_UART1] = 0x1E783000, - [ASPEED_UART5] = 0x1E784000, - [ASPEED_VUART] = 0x1E787000, - [ASPEED_SDRAM] = 0x80000000, + [ASPEED_DEV_IOMEM] = 0x1E600000, + [ASPEED_DEV_FMC] = 0x1E620000, + [ASPEED_DEV_SPI1] = 0x1E630000, + [ASPEED_DEV_SPI2] = 0x1E631000, + [ASPEED_DEV_EHCI1] = 0x1E6A1000, + [ASPEED_DEV_EHCI2] = 0x1E6A3000, + [ASPEED_DEV_VIC] = 0x1E6C0000, + [ASPEED_DEV_SDMC] = 0x1E6E0000, + [ASPEED_DEV_SCU] = 0x1E6E2000, + [ASPEED_DEV_XDMA] = 0x1E6E7000, + [ASPEED_DEV_ADC] = 0x1E6E9000, + [ASPEED_DEV_VIDEO] = 0x1E700000, + [ASPEED_DEV_SRAM] = 0x1E720000, + [ASPEED_DEV_SDHCI] = 0x1E740000, + [ASPEED_DEV_GPIO] = 0x1E780000, + [ASPEED_DEV_RTC] = 0x1E781000, + [ASPEED_DEV_TIMER1] = 0x1E782000, + [ASPEED_DEV_WDT] = 0x1E785000, + [ASPEED_DEV_PWM] = 0x1E786000, + [ASPEED_DEV_LPC] = 0x1E789000, + [ASPEED_DEV_IBT] = 0x1E789140, + [ASPEED_DEV_I2C] = 0x1E78A000, + [ASPEED_DEV_ETH1] = 0x1E660000, + [ASPEED_DEV_ETH2] = 0x1E680000, + [ASPEED_DEV_UART1] = 0x1E783000, + [ASPEED_DEV_UART5] = 0x1E784000, + [ASPEED_DEV_VUART] = 0x1E787000, + [ASPEED_DEV_SDRAM] = 0x80000000, }; static const int aspeed_soc_ast2400_irqmap[] = { - [ASPEED_UART1] = 9, - [ASPEED_UART2] = 32, - [ASPEED_UART3] = 33, - [ASPEED_UART4] = 34, - [ASPEED_UART5] = 10, - [ASPEED_VUART] = 8, - [ASPEED_FMC] = 19, - [ASPEED_EHCI1] = 5, - [ASPEED_EHCI2] = 13, - [ASPEED_SDMC] = 0, - [ASPEED_SCU] = 21, - [ASPEED_ADC] = 31, - [ASPEED_GPIO] = 20, - [ASPEED_RTC] = 22, - [ASPEED_TIMER1] = 16, - [ASPEED_TIMER2] = 17, - [ASPEED_TIMER3] = 18, - [ASPEED_TIMER4] = 35, - [ASPEED_TIMER5] = 36, - [ASPEED_TIMER6] = 37, - [ASPEED_TIMER7] = 38, - [ASPEED_TIMER8] = 39, - [ASPEED_WDT] = 27, - [ASPEED_PWM] = 28, - [ASPEED_LPC] = 8, - [ASPEED_IBT] = 8, /* LPC */ - [ASPEED_I2C] = 12, - [ASPEED_ETH1] = 2, - [ASPEED_ETH2] = 3, - [ASPEED_XDMA] = 6, - [ASPEED_SDHCI] = 26, + [ASPEED_DEV_UART1] = 9, + [ASPEED_DEV_UART2] = 32, + [ASPEED_DEV_UART3] = 33, + [ASPEED_DEV_UART4] = 34, + [ASPEED_DEV_UART5] = 10, + [ASPEED_DEV_VUART] = 8, + [ASPEED_DEV_FMC] = 19, + [ASPEED_DEV_EHCI1] = 5, + [ASPEED_DEV_EHCI2] = 13, + [ASPEED_DEV_SDMC] = 0, + [ASPEED_DEV_SCU] = 21, + [ASPEED_DEV_ADC] = 31, + [ASPEED_DEV_GPIO] = 20, + [ASPEED_DEV_RTC] = 22, + [ASPEED_DEV_TIMER1] = 16, + [ASPEED_DEV_TIMER2] = 17, + [ASPEED_DEV_TIMER3] = 18, + [ASPEED_DEV_TIMER4] = 35, + [ASPEED_DEV_TIMER5] = 36, + [ASPEED_DEV_TIMER6] = 37, + [ASPEED_DEV_TIMER7] = 38, + [ASPEED_DEV_TIMER8] = 39, + [ASPEED_DEV_WDT] = 27, + [ASPEED_DEV_PWM] = 28, + [ASPEED_DEV_LPC] = 8, + [ASPEED_DEV_IBT] = 8, /* LPC */ + [ASPEED_DEV_I2C] = 12, + [ASPEED_DEV_ETH1] = 2, + [ASPEED_DEV_ETH2] = 3, + [ASPEED_DEV_XDMA] = 6, + [ASPEED_DEV_SDHCI] = 26, }; #define aspeed_soc_ast2500_irqmap aspeed_soc_ast2400_irqmap @@ -221,11 +221,11 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) Error *err = NULL; /* IO space */ - create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_IOMEM], + create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_DEV_IOMEM], ASPEED_SOC_IOMEM_SIZE); /* Video engine stub */ - create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_VIDEO], + create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_DEV_VIDEO], 0x1000); /* CPU */ @@ -243,19 +243,19 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } memory_region_add_subregion(get_system_memory(), - sc->memmap[ASPEED_SRAM], &s->sram); + sc->memmap[ASPEED_DEV_SRAM], &s->sram); /* SCU */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_SCU]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]); /* VIC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->vic), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->vic), 0, sc->memmap[ASPEED_VIC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->vic), 0, sc->memmap[ASPEED_DEV_VIC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 0, qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ)); sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 1, @@ -265,9 +265,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) if (!sysbus_realize(SYS_BUS_DEVICE(&s->rtc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_RTC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, - aspeed_soc_get_irq(s, ASPEED_RTC)); + aspeed_soc_get_irq(s, ASPEED_DEV_RTC)); /* Timer */ object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu), @@ -276,16 +276,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->timerctrl), 0, - sc->memmap[ASPEED_TIMER1]); + sc->memmap[ASPEED_DEV_TIMER1]); for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) { - qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_TIMER1 + i); + qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i); sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq); } /* UART - attach an 8250 to the IO space as our UART5 */ if (serial_hd(0)) { - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_UART5); - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_UART5], 2, + qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); } @@ -295,25 +295,25 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_I2C]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c), 0, - aspeed_soc_get_irq(s, ASPEED_I2C)); + aspeed_soc_get_irq(s, ASPEED_DEV_I2C)); /* FMC, The number of CS is set at the board level */ object_property_set_link(OBJECT(&s->fmc), "dram", OBJECT(s->dram_mr), &error_abort); if (!object_property_set_int(OBJECT(&s->fmc), "sdram-base", - sc->memmap[ASPEED_SDRAM], errp)) { + sc->memmap[ASPEED_DEV_SDRAM], errp)) { return; } if (!sysbus_realize(SYS_BUS_DEVICE(&s->fmc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_FMC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]); sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 1, s->fmc.ctrl->flash_window_base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0, - aspeed_soc_get_irq(s, ASPEED_FMC)); + aspeed_soc_get_irq(s, ASPEED_DEV_FMC)); /* SPI */ for (i = 0; i < sc->spis_num; i++) { @@ -322,7 +322,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, - sc->memmap[ASPEED_SPI1 + i]); + sc->memmap[ASPEED_DEV_SPI1 + i]); sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 1, s->spi[i].ctrl->flash_window_base); } @@ -333,16 +333,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, - sc->memmap[ASPEED_EHCI1 + i]); + sc->memmap[ASPEED_DEV_EHCI1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, - aspeed_soc_get_irq(s, ASPEED_EHCI1 + i)); + aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i)); } /* SDMC - SDRAM Memory Controller */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, sc->memmap[ASPEED_SDMC]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, sc->memmap[ASPEED_DEV_SDMC]); /* Watch dog */ for (i = 0; i < sc->wdts_num; i++) { @@ -354,7 +354,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, - sc->memmap[ASPEED_WDT] + i * awc->offset); + sc->memmap[ASPEED_DEV_WDT] + i * awc->offset); } /* Net */ @@ -365,9 +365,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, - sc->memmap[ASPEED_ETH1 + i]); + sc->memmap[ASPEED_DEV_ETH1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, - aspeed_soc_get_irq(s, ASPEED_ETH1 + i)); + aspeed_soc_get_irq(s, ASPEED_DEV_ETH1 + i)); } /* XDMA */ @@ -375,26 +375,26 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->xdma), 0, - sc->memmap[ASPEED_XDMA]); + sc->memmap[ASPEED_DEV_XDMA]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0, - aspeed_soc_get_irq(s, ASPEED_XDMA)); + aspeed_soc_get_irq(s, ASPEED_DEV_XDMA)); /* GPIO */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_GPIO]); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_DEV_GPIO]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, - aspeed_soc_get_irq(s, ASPEED_GPIO)); + aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); /* SDHCI */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) { return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdhci), 0, - sc->memmap[ASPEED_SDHCI]); + sc->memmap[ASPEED_DEV_SDHCI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, - aspeed_soc_get_irq(s, ASPEED_SDHCI)); + aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI)); } static Property aspeed_soc_properties[] = { DEFINE_PROP_LINK("dram", AspeedSoCState, dram_mr, TYPE_MEMORY_REGION, From patchwork Thu Aug 20 00:11:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276023 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FED9C433E3 for ; Thu, 20 Aug 2020 00:19:55 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EF6A2207DA for ; Thu, 20 Aug 2020 00:19:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="FqwYt1EU" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EF6A2207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:39440 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YJ8-00017o-6z for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:19:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49082) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YCT-00056b-H9 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:01 -0400 Received: from us-smtp-delivery-124.mimecast.com ([63.128.21.124]:36799) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YCO-0002Hu-ML for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:01 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882375; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BjllJhUgvJbL1j6uUE8y4YGfsQ1OFdnnCZ9x3Ip0SR4=; b=FqwYt1EUT9Em2PnPSBGNXIE74qaNa5UVgO+jVuTAMtfi0njYBE9Cb0Ge4ydRAz6bUSzYwc UrgIGKEX2a/2dsi2nTdR7+5E4pWICAP+grvSHpEXeKBt1jXrZ2T0egpxc2bvBvnG1FjeFk wfzNtuLs0Wr3ifjss21qnMv+zsanzyo= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-290-453NJgWkONKS13E_1wd09w-1; Wed, 19 Aug 2020 20:12:54 -0400 X-MC-Unique: 453NJgWkONKS13E_1wd09w-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id BE8911DDF7; Thu, 20 Aug 2020 00:12:52 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id EC507709DC; Thu, 20 Aug 2020 00:12:51 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 07/58] opentitan: Rename memmap enum constants Date: Wed, 19 Aug 2020 20:11:45 -0400 Message-Id: <20200820001236.1284548-8-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=63.128.21.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:48 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Daniel P. Berrange" , qemu-riscv@nongnu.org, Sagar Karandikar , Bastian Koppelmann , Alistair Francis , Paolo Bonzini , Palmer Dabbelt Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Some of the enum constant names conflict with the QOM type check macros (IBEX_PLIC, IBEX_UART). This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE(). Rename all the constants to IBEX_DEV_*, to avoid conflicts. Reviewed-by: Alistair Francis Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: * Added more details to commit message --- Cc: Alistair Francis Cc: Palmer Dabbelt Cc: Sagar Karandikar Cc: Bastian Koppelmann Cc: qemu-riscv@nongnu.org Cc: qemu-devel@nongnu.org --- include/hw/riscv/opentitan.h | 38 ++++++++-------- hw/riscv/opentitan.c | 84 ++++++++++++++++++------------------ 2 files changed, 61 insertions(+), 61 deletions(-) diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index 8f29b9cbbf..835a80f896 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -49,25 +49,25 @@ typedef struct OpenTitanState { } OpenTitanState; enum { - IBEX_ROM, - IBEX_RAM, - IBEX_FLASH, - IBEX_UART, - IBEX_GPIO, - IBEX_SPI, - IBEX_FLASH_CTRL, - IBEX_RV_TIMER, - IBEX_AES, - IBEX_HMAC, - IBEX_PLIC, - IBEX_PWRMGR, - IBEX_RSTMGR, - IBEX_CLKMGR, - IBEX_PINMUX, - IBEX_ALERT_HANDLER, - IBEX_NMI_GEN, - IBEX_USBDEV, - IBEX_PADCTRL, + IBEX_DEV_ROM, + IBEX_DEV_RAM, + IBEX_DEV_FLASH, + IBEX_DEV_UART, + IBEX_DEV_GPIO, + IBEX_DEV_SPI, + IBEX_DEV_FLASH_CTRL, + IBEX_DEV_RV_TIMER, + IBEX_DEV_AES, + IBEX_DEV_HMAC, + IBEX_DEV_PLIC, + IBEX_DEV_PWRMGR, + IBEX_DEV_RSTMGR, + IBEX_DEV_CLKMGR, + IBEX_DEV_PINMUX, + IBEX_DEV_ALERT_HANDLER, + IBEX_DEV_NMI_GEN, + IBEX_DEV_USBDEV, + IBEX_DEV_PADCTRL, }; enum { diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index a8f0039e51..23ba3b4bfc 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -32,25 +32,25 @@ static const struct MemmapEntry { hwaddr base; hwaddr size; } ibex_memmap[] = { - [IBEX_ROM] = { 0x00008000, 16 * KiB }, - [IBEX_RAM] = { 0x10000000, 0x10000 }, - [IBEX_FLASH] = { 0x20000000, 0x80000 }, - [IBEX_UART] = { 0x40000000, 0x10000 }, - [IBEX_GPIO] = { 0x40010000, 0x10000 }, - [IBEX_SPI] = { 0x40020000, 0x10000 }, - [IBEX_FLASH_CTRL] = { 0x40030000, 0x10000 }, - [IBEX_PINMUX] = { 0x40070000, 0x10000 }, - [IBEX_RV_TIMER] = { 0x40080000, 0x10000 }, - [IBEX_PLIC] = { 0x40090000, 0x10000 }, - [IBEX_PWRMGR] = { 0x400A0000, 0x10000 }, - [IBEX_RSTMGR] = { 0x400B0000, 0x10000 }, - [IBEX_CLKMGR] = { 0x400C0000, 0x10000 }, - [IBEX_AES] = { 0x40110000, 0x10000 }, - [IBEX_HMAC] = { 0x40120000, 0x10000 }, - [IBEX_ALERT_HANDLER] = { 0x40130000, 0x10000 }, - [IBEX_NMI_GEN] = { 0x40140000, 0x10000 }, - [IBEX_USBDEV] = { 0x40150000, 0x10000 }, - [IBEX_PADCTRL] = { 0x40160000, 0x10000 } + [IBEX_DEV_ROM] = { 0x00008000, 16 * KiB }, + [IBEX_DEV_RAM] = { 0x10000000, 0x10000 }, + [IBEX_DEV_FLASH] = { 0x20000000, 0x80000 }, + [IBEX_DEV_UART] = { 0x40000000, 0x10000 }, + [IBEX_DEV_GPIO] = { 0x40010000, 0x10000 }, + [IBEX_DEV_SPI] = { 0x40020000, 0x10000 }, + [IBEX_DEV_FLASH_CTRL] = { 0x40030000, 0x10000 }, + [IBEX_DEV_PINMUX] = { 0x40070000, 0x10000 }, + [IBEX_DEV_RV_TIMER] = { 0x40080000, 0x10000 }, + [IBEX_DEV_PLIC] = { 0x40090000, 0x10000 }, + [IBEX_DEV_PWRMGR] = { 0x400A0000, 0x10000 }, + [IBEX_DEV_RSTMGR] = { 0x400B0000, 0x10000 }, + [IBEX_DEV_CLKMGR] = { 0x400C0000, 0x10000 }, + [IBEX_DEV_AES] = { 0x40110000, 0x10000 }, + [IBEX_DEV_HMAC] = { 0x40120000, 0x10000 }, + [IBEX_DEV_ALERT_HANDLER] = { 0x40130000, 0x10000 }, + [IBEX_DEV_NMI_GEN] = { 0x40140000, 0x10000 }, + [IBEX_DEV_USBDEV] = { 0x40150000, 0x10000 }, + [IBEX_DEV_PADCTRL] = { 0x40160000, 0x10000 } }; static void opentitan_board_init(MachineState *machine) @@ -66,12 +66,12 @@ static void opentitan_board_init(MachineState *machine) qdev_realize(DEVICE(&s->soc), NULL, &error_abort); memory_region_init_ram(main_mem, NULL, "riscv.lowrisc.ibex.ram", - memmap[IBEX_RAM].size, &error_fatal); + memmap[IBEX_DEV_RAM].size, &error_fatal); memory_region_add_subregion(sys_mem, - memmap[IBEX_RAM].base, main_mem); + memmap[IBEX_DEV_RAM].base, main_mem); if (machine->firmware) { - riscv_load_firmware(machine->firmware, memmap[IBEX_RAM].base, NULL); + riscv_load_firmware(machine->firmware, memmap[IBEX_DEV_RAM].base, NULL); } if (machine->kernel_filename) { @@ -115,28 +115,28 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) /* Boot ROM */ memory_region_init_rom(&s->rom, OBJECT(dev_soc), "riscv.lowrisc.ibex.rom", - memmap[IBEX_ROM].size, &error_fatal); + memmap[IBEX_DEV_ROM].size, &error_fatal); memory_region_add_subregion(sys_mem, - memmap[IBEX_ROM].base, &s->rom); + memmap[IBEX_DEV_ROM].base, &s->rom); /* Flash memory */ memory_region_init_rom(&s->flash_mem, OBJECT(dev_soc), "riscv.lowrisc.ibex.flash", - memmap[IBEX_FLASH].size, &error_fatal); - memory_region_add_subregion(sys_mem, memmap[IBEX_FLASH].base, + memmap[IBEX_DEV_FLASH].size, &error_fatal); + memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH].base, &s->flash_mem); /* PLIC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->plic), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_PLIC].base); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_DEV_PLIC].base); /* UART */ qdev_prop_set_chr(DEVICE(&(s->uart)), "chardev", serial_hd(0)); if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart), 0, memmap[IBEX_UART].base); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart), 0, memmap[IBEX_DEV_UART].base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 0, qdev_get_gpio_in(DEVICE(&s->plic), IBEX_UART_TX_WATERMARK_IRQ)); @@ -151,33 +151,33 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) IBEX_UART_RX_OVERFLOW_IRQ)); create_unimplemented_device("riscv.lowrisc.ibex.gpio", - memmap[IBEX_GPIO].base, memmap[IBEX_GPIO].size); + memmap[IBEX_DEV_GPIO].base, memmap[IBEX_DEV_GPIO].size); create_unimplemented_device("riscv.lowrisc.ibex.spi", - memmap[IBEX_SPI].base, memmap[IBEX_SPI].size); + memmap[IBEX_DEV_SPI].base, memmap[IBEX_DEV_SPI].size); create_unimplemented_device("riscv.lowrisc.ibex.flash_ctrl", - memmap[IBEX_FLASH_CTRL].base, memmap[IBEX_FLASH_CTRL].size); + memmap[IBEX_DEV_FLASH_CTRL].base, memmap[IBEX_DEV_FLASH_CTRL].size); create_unimplemented_device("riscv.lowrisc.ibex.rv_timer", - memmap[IBEX_RV_TIMER].base, memmap[IBEX_RV_TIMER].size); + memmap[IBEX_DEV_RV_TIMER].base, memmap[IBEX_DEV_RV_TIMER].size); create_unimplemented_device("riscv.lowrisc.ibex.pwrmgr", - memmap[IBEX_PWRMGR].base, memmap[IBEX_PWRMGR].size); + memmap[IBEX_DEV_PWRMGR].base, memmap[IBEX_DEV_PWRMGR].size); create_unimplemented_device("riscv.lowrisc.ibex.rstmgr", - memmap[IBEX_RSTMGR].base, memmap[IBEX_RSTMGR].size); + memmap[IBEX_DEV_RSTMGR].base, memmap[IBEX_DEV_RSTMGR].size); create_unimplemented_device("riscv.lowrisc.ibex.clkmgr", - memmap[IBEX_CLKMGR].base, memmap[IBEX_CLKMGR].size); + memmap[IBEX_DEV_CLKMGR].base, memmap[IBEX_DEV_CLKMGR].size); create_unimplemented_device("riscv.lowrisc.ibex.aes", - memmap[IBEX_AES].base, memmap[IBEX_AES].size); + memmap[IBEX_DEV_AES].base, memmap[IBEX_DEV_AES].size); create_unimplemented_device("riscv.lowrisc.ibex.hmac", - memmap[IBEX_HMAC].base, memmap[IBEX_HMAC].size); + memmap[IBEX_DEV_HMAC].base, memmap[IBEX_DEV_HMAC].size); create_unimplemented_device("riscv.lowrisc.ibex.pinmux", - memmap[IBEX_PINMUX].base, memmap[IBEX_PINMUX].size); + memmap[IBEX_DEV_PINMUX].base, memmap[IBEX_DEV_PINMUX].size); create_unimplemented_device("riscv.lowrisc.ibex.alert_handler", - memmap[IBEX_ALERT_HANDLER].base, memmap[IBEX_ALERT_HANDLER].size); + memmap[IBEX_DEV_ALERT_HANDLER].base, memmap[IBEX_DEV_ALERT_HANDLER].size); create_unimplemented_device("riscv.lowrisc.ibex.nmi_gen", - memmap[IBEX_NMI_GEN].base, memmap[IBEX_NMI_GEN].size); + memmap[IBEX_DEV_NMI_GEN].base, memmap[IBEX_DEV_NMI_GEN].size); create_unimplemented_device("riscv.lowrisc.ibex.usbdev", - memmap[IBEX_USBDEV].base, memmap[IBEX_USBDEV].size); + memmap[IBEX_DEV_USBDEV].base, memmap[IBEX_DEV_USBDEV].size); create_unimplemented_device("riscv.lowrisc.ibex.padctrl", - memmap[IBEX_PADCTRL].base, memmap[IBEX_PADCTRL].size); + memmap[IBEX_DEV_PADCTRL].base, memmap[IBEX_DEV_PADCTRL].size); } static void lowrisc_ibex_soc_class_init(ObjectClass *oc, void *data) From patchwork Thu Aug 20 00:11:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B03FC433DF for ; Thu, 20 Aug 2020 00:17:58 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 54577207DA for ; Thu, 20 Aug 2020 00:17:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="KIheRwwg" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 54577207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:58550 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YHF-0005tS-J4 for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:17:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49140) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YCW-0005El-Qq for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:04 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:51676 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YCU-0002J1-VN for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882382; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jIIWkn7eYfLAAccpctTQZkTNA3/S5l7UqUEgwJHv45s=; b=KIheRwwgkMB3OwJiGZRaFRvpaPRSV7ylNQwMkLF+AkABhPkRj9P+CjS9FrY1jdL45ItyT7 KOMZMUBmLeaszx8GEXRoYf8Kvag6HRYpTvGTNoN6G7YvkDFnrBh7mtDi/FwzY/FhJsEjin 0Aq2bsP29b3BP+Q+lShFIUHEZchSVTY= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-249-nUL9yCUnMcuo_AptWyw6nw-1; Wed, 19 Aug 2020 20:12:58 -0400 X-MC-Unique: nUL9yCUnMcuo_AptWyw6nw-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 569671084C8C; Thu, 20 Aug 2020 00:12:57 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3EF1B5C1D0; Thu, 20 Aug 2020 00:12:56 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 10/58] aspeed_timer: Fix ASPEED_TIMER macro definition Date: Wed, 19 Aug 2020 20:11:48 -0400 Message-Id: <20200820001236.1284548-11-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:13:02 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "Daniel P. Berrange" , Andrew Jeffery , =?utf-8?q?Ph?= =?utf-8?q?ilippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goater?= , Paolo Bonzini , Joel Stanley Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The macro definition had an extra semicolon. This was never noticed because the macro was only being used where it didn't make a difference. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- Cc: "Cédric Le Goater" Cc: Peter Maydell Cc: Andrew Jeffery Cc: Joel Stanley Cc: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org --- include/hw/timer/aspeed_timer.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/timer/aspeed_timer.h b/include/hw/timer/aspeed_timer.h index 948329893c..d7c7d8ad28 100644 --- a/include/hw/timer/aspeed_timer.h +++ b/include/hw/timer/aspeed_timer.h @@ -26,7 +26,7 @@ #include "hw/misc/aspeed_scu.h" #define ASPEED_TIMER(obj) \ - OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER); + OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER) #define TYPE_ASPEED_TIMER "aspeed.timer" #define TYPE_ASPEED_2400_TIMER TYPE_ASPEED_TIMER "-ast2400" #define TYPE_ASPEED_2500_TIMER TYPE_ASPEED_TIMER "-ast2500" From patchwork Thu Aug 20 00:11:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276021 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EB96C433DF for ; Thu, 20 Aug 2020 00:22:13 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 18463207DA for ; Thu, 20 Aug 2020 00:22:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="BYjngQzD" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 18463207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:49276 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YLM-00058b-B7 for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:22:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49192) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YCh-0005Uy-EC for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:16 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:34055 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YCe-0002L0-4w for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:15 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882391; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+jgA8dgE5sort/nWACrbkzPceqpQedWg+RAtiLHen20=; b=BYjngQzD0/LVcyyvcux5+ArGc/iYSzYnmyvJ8/beLysNxl5ehKcwaD6SMTvtgqN9haXmVa j7akMfswh1jnzQZZrfvCbXQkcRyUcHYwf8d1V8S2ypzIMq4H9YSC7I6w1fXPj4ZEn7i3bC ARBANq/LdDrtFt5Mv2etCzAmFFoDW6A= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-386-4R8RBepJPNaoC7wFWPUs2A-1; Wed, 19 Aug 2020 20:13:07 -0400 X-MC-Unique: 4R8RBepJPNaoC7wFWPUs2A-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 48C2510060C2; Thu, 20 Aug 2020 00:13:06 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1851B5D9E8; Thu, 20 Aug 2020 00:12:58 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 11/58] versatile: Fix typo in PCI_VPB_HOST definition Date: Wed, 19 Aug 2020 20:11:49 -0400 Message-Id: <20200820001236.1284548-12-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 18:27:43 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , qemu-arm@nongnu.org, "Daniel P. Berrange" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Peter Maydell Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Fixes: cd93dbf375bd ("versatile_pci: Update to realize and instance init functions") Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- Cc: Peter Maydell Cc: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org --- hw/pci-host/versatile.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index 616882a80d..7e4aa467a2 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -161,7 +161,7 @@ static const VMStateDescription pci_vpb_vmstate = { #define TYPE_VERSATILE_PCI_HOST "versatile_pci_host" #define PCI_VPB_HOST(obj) \ - OBJECT_CHECK(PCIDevice, (obj), TYPE_VERSATILE_PCIHOST) + OBJECT_CHECK(PCIDevice, (obj), TYPE_VERSATILE_PCI_HOST) typedef enum { PCI_IMAP0 = 0x0, From patchwork Thu Aug 20 00:11:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276020 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41990C433E1 for ; Thu, 20 Aug 2020 00:24:10 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0B811207DA for ; Thu, 20 Aug 2020 00:24:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="cWvPJawB" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0B811207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:56584 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YNF-000854-Bb for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:24:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49256) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YCp-0005nT-F7 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:23 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:41703 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YCn-0002M8-Mw for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882401; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=46owR4/m8d+YVRJgg0HjGhufUrfGXZBvNdkXw1/XZ4g=; b=cWvPJawBp2Oh2uyr2Efs5RRkmmwFWL82kxPmug+P1b2hYNemv37a5wbUy/KcaHOIesszGw nIvIPNxMAHQ1o6JooMsQ0Jh4QPnK4olSsyY028ojCTAjVMJTV5J1n+o98SEexS/QdQnzWg WmKaXDKq5MXzO7zhZLV9+foQ6h0yZTg= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-113-eCkobI6dP-ipQVh1EpVLfQ-1; Wed, 19 Aug 2020 20:13:19 -0400 X-MC-Unique: eCkobI6dP-ipQVh1EpVLfQ-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id A1B6F8030AC; Thu, 20 Aug 2020 00:13:18 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7C31E7C52D; Thu, 20 Aug 2020 00:13:15 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 14/58] hcd-dwc2: Rename USB_*CLASS macros for consistency Date: Wed, 19 Aug 2020 20:11:52 -0400 Message-Id: <20200820001236.1284548-15-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:13:02 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gerd Hoffmann Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Rename the DWC2_CLASS to DWC2_USB_CLASS and DWC2_GET_CLASS to DWC2_USB_GET_CLASS, for consistency with the DWC2_USB macro. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- Cc: Gerd Hoffmann Cc: qemu-devel@nongnu.org --- hw/usb/hcd-dwc2.h | 4 ++-- hw/usb/hcd-dwc2.c | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/usb/hcd-dwc2.h b/hw/usb/hcd-dwc2.h index 4ba809a07b..54111d835e 100644 --- a/hw/usb/hcd-dwc2.h +++ b/hw/usb/hcd-dwc2.h @@ -182,9 +182,9 @@ struct DWC2Class { #define TYPE_DWC2_USB "dwc2-usb" #define DWC2_USB(obj) \ OBJECT_CHECK(DWC2State, (obj), TYPE_DWC2_USB) -#define DWC2_CLASS(klass) \ +#define DWC2_USB_CLASS(klass) \ OBJECT_CLASS_CHECK(DWC2Class, (klass), TYPE_DWC2_USB) -#define DWC2_GET_CLASS(obj) \ +#define DWC2_USB_GET_CLASS(obj) \ OBJECT_GET_CLASS(DWC2Class, (obj), TYPE_DWC2_USB) #endif diff --git a/hw/usb/hcd-dwc2.c b/hw/usb/hcd-dwc2.c index 56f91f6bee..97688d21bf 100644 --- a/hw/usb/hcd-dwc2.c +++ b/hw/usb/hcd-dwc2.c @@ -1155,7 +1155,7 @@ static void dwc2_work_timer(void *opaque) static void dwc2_reset_enter(Object *obj, ResetType type) { - DWC2Class *c = DWC2_GET_CLASS(obj); + DWC2Class *c = DWC2_USB_GET_CLASS(obj); DWC2State *s = DWC2_USB(obj); int i; @@ -1239,7 +1239,7 @@ static void dwc2_reset_enter(Object *obj, ResetType type) static void dwc2_reset_hold(Object *obj) { - DWC2Class *c = DWC2_GET_CLASS(obj); + DWC2Class *c = DWC2_USB_GET_CLASS(obj); DWC2State *s = DWC2_USB(obj); trace_usb_dwc2_reset_hold(); @@ -1253,7 +1253,7 @@ static void dwc2_reset_hold(Object *obj) static void dwc2_reset_exit(Object *obj) { - DWC2Class *c = DWC2_GET_CLASS(obj); + DWC2Class *c = DWC2_USB_GET_CLASS(obj); DWC2State *s = DWC2_USB(obj); trace_usb_dwc2_reset_exit(); @@ -1382,7 +1382,7 @@ static Property dwc2_usb_properties[] = { static void dwc2_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - DWC2Class *c = DWC2_CLASS(klass); + DWC2Class *c = DWC2_USB_CLASS(klass); ResettableClass *rc = RESETTABLE_CLASS(klass); dc->realize = dwc2_realize; From patchwork Thu Aug 20 00:11:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276018 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21692C433E1 for ; Thu, 20 Aug 2020 00:26:17 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DD6F0207DA for ; Thu, 20 Aug 2020 00:26:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="MFoTQeEY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DD6F0207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:36752 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YPI-000390-4K for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:26:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49304) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YCv-0005to-Q1 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:30 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:23717 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YCu-0002Mb-9W for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:29 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882406; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nKVi7vWHEqaEDwKWow/pxgG7QhdWfJxb4rxtKwotnAk=; b=MFoTQeEYAbzH7lBS0vlir6ZZGNFyosmjvoqpJwTbDsd6BErHTFIbDLCJkjeXy4uKGO8MYe KKh0hLm6ExN+4ZZq9uCwcP0f4pTf8fGV+XHDDs0xzrzjvus4YyH+E4M1Z6hbcgqUJ75kpe zUYqEr/T9Zztq42BetfOBdZ3wibpBhA= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-102-p8CqXUW0MHSgrH0tNM6Ysw-1; Wed, 19 Aug 2020 20:13:22 -0400 X-MC-Unique: p8CqXUW0MHSgrH0tNM6Ysw-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 3B9D810066FC; Thu, 20 Aug 2020 00:13:21 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id CB86110013C4; Thu, 20 Aug 2020 00:13:20 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 16/58] throttle-groups: Move ThrottleGroup typedef to header Date: Wed, 19 Aug 2020 20:11:54 -0400 Message-Id: <20200820001236.1284548-17-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/18 23:05:17 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , "Daniel P. Berrange" , qemu-block@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Max Reitz , Alberto Garcia , Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Move typedef closer to the type check macros, to make it easier to convert the code to OBJECT_DEFINE_TYPE() in the future. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- Cc: Alberto Garcia Cc: Kevin Wolf Cc: Max Reitz Cc: qemu-block@nongnu.org Cc: qemu-devel@nongnu.org --- include/block/throttle-groups.h | 1 + block/throttle-groups.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/block/throttle-groups.h b/include/block/throttle-groups.h index 712a8e64b4..5e77db700f 100644 --- a/include/block/throttle-groups.h +++ b/include/block/throttle-groups.h @@ -59,6 +59,7 @@ typedef struct ThrottleGroupMember { } ThrottleGroupMember; #define TYPE_THROTTLE_GROUP "throttle-group" +typedef struct ThrottleGroup ThrottleGroup; #define THROTTLE_GROUP(obj) OBJECT_CHECK(ThrottleGroup, (obj), TYPE_THROTTLE_GROUP) const char *throttle_group_get_name(ThrottleGroupMember *tgm); diff --git a/block/throttle-groups.c b/block/throttle-groups.c index 98fea7fd47..4e28365d8d 100644 --- a/block/throttle-groups.c +++ b/block/throttle-groups.c @@ -63,7 +63,7 @@ static void timer_cb(ThrottleGroupMember *tgm, bool is_write); * access some other ThrottleGroupMember's timers only after verifying that * that ThrottleGroupMember has throttled requests in the queue. */ -typedef struct ThrottleGroup { +struct ThrottleGroup { Object parent_obj; /* refuse individual property change if initialization is complete */ @@ -79,7 +79,7 @@ typedef struct ThrottleGroup { /* This field is protected by the global QEMU mutex */ QTAILQ_ENTRY(ThrottleGroup) list; -} ThrottleGroup; +}; /* This is protected by the global QEMU mutex */ static QTAILQ_HEAD(, ThrottleGroup) throttle_groups = From patchwork Thu Aug 20 00:11:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276016 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 908A4C433E1 for ; Thu, 20 Aug 2020 00:27:37 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 58A8E207DA for ; Thu, 20 Aug 2020 00:27:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="iIjsFXjW" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 58A8E207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:45088 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YQa-0006U4-Jp for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:27:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49406) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YD5-0006As-Lj for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:39 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:24432 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YD4-0002Nn-4b for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:39 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882417; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YtgAzMvDYlzdpFj6dcdCWpwe8PMUOxxIkvMbY0fqytE=; b=iIjsFXjWXEgw1UicpHwd02iHvGnvCRHtvFw/Kn3B3Cga/t2aRyhycZElf5mZBqUACi4axi zSEGeM3WwFLxWbvrUEUxSB+XYk0Qb4PKagfE09pUSqg/i9qMoyvRc3dmJNKea9uxLeMxHZ Ed6atHi0xJ9H6Bcrwi0GpNlUialGbnA= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-218-1BNhrTxTMEWvcf0L7Nngtw-1; Wed, 19 Aug 2020 20:13:33 -0400 X-MC-Unique: 1BNhrTxTMEWvcf0L7Nngtw-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id A3A12807353; Thu, 20 Aug 2020 00:13:32 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6AD02756D3; Thu, 20 Aug 2020 00:13:32 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 21/58] s390_flic: Move KVMS390FLICState typedef to header Date: Wed, 19 Aug 2020 20:11:59 -0400 Message-Id: <20200820001236.1284548-22-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 18:27:43 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , "Daniel P. Berrange" , Cornelia Huck , Halil Pasic , Christian Borntraeger , qemu-s390x@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Move typedef closer to the type check macros, to make it easier to convert the code to OBJECT_DEFINE_TYPE() in the future. Acked-by: Cornelia Huck Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- Cc: Cornelia Huck Cc: Thomas Huth Cc: Halil Pasic Cc: Christian Borntraeger Cc: qemu-s390x@nongnu.org Cc: qemu-devel@nongnu.org --- include/hw/s390x/s390_flic.h | 1 + hw/intc/s390_flic_kvm.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/hw/s390x/s390_flic.h b/include/hw/s390x/s390_flic.h index 4687ecfe83..df11de9b20 100644 --- a/include/hw/s390x/s390_flic.h +++ b/include/hw/s390x/s390_flic.h @@ -75,6 +75,7 @@ typedef struct S390FLICStateClass { } S390FLICStateClass; #define TYPE_KVM_S390_FLIC "s390-flic-kvm" +typedef struct KVMS390FLICState KVMS390FLICState; #define KVM_S390_FLIC(obj) \ OBJECT_CHECK(KVMS390FLICState, (obj), TYPE_KVM_S390_FLIC) diff --git a/hw/intc/s390_flic_kvm.c b/hw/intc/s390_flic_kvm.c index a306b26faa..dbd4e682ce 100644 --- a/hw/intc/s390_flic_kvm.c +++ b/hw/intc/s390_flic_kvm.c @@ -29,12 +29,12 @@ #define FLIC_FAILED (-1UL) #define FLIC_SAVEVM_VERSION 1 -typedef struct KVMS390FLICState { +struct KVMS390FLICState{ S390FLICState parent_obj; uint32_t fd; bool clear_io_supported; -} KVMS390FLICState; +}; static KVMS390FLICState *s390_get_kvm_flic(S390FLICState *fs) { From patchwork Thu Aug 20 00:12:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B051EC433E1 for ; Thu, 20 Aug 2020 00:19:37 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 78959207DA for ; Thu, 20 Aug 2020 00:19:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="OCAwxtX3" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 78959207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:37670 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YIq-0000Q3-O1 for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:19:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49428) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YD7-0006ET-23 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:41 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:27382 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YD5-0002O1-Aq for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:40 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882418; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=llSCwNEXWLo8Fe9VkTjEqpP8JqpOy2uRkKjeyMPSXbo=; b=OCAwxtX3okrazkcZIqbZRmADMBZ+iOwiABKfU7jNA0eP3R1IzZsC92VK8j7+Q5y4zna6Rv NXlnyzyBUF0NHNNZftZaNyJIgo2/QzQwoAHYxpkuKVXwAgA524dnkL1P9tPFvEQNxDaFMU maB51wz+0mtVmWYVW7yzSGNC494bk0U= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-376-DWgOULAlMMeoB-BZY4h6-w-1; Wed, 19 Aug 2020 20:13:37 -0400 X-MC-Unique: DWgOULAlMMeoB-BZY4h6-w-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 3243E8030A1 for ; Thu, 20 Aug 2020 00:13:36 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id EE9987E303; Thu, 20 Aug 2020 00:13:35 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 24/58] platform-bus: Delete macros for non-existing typedef Date: Wed, 19 Aug 2020 20:12:02 -0400 Message-Id: <20200820001236.1284548-25-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 18:27:43 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" PlatformBusDeviceClass doesn't exist. This will break when we automatically convert the code to use OBJECT_DEFINE_TYPE(). Delete the macros that reference the non-existing typedef. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- Cc: qemu-devel@nongnu.org --- include/hw/platform-bus.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/include/hw/platform-bus.h b/include/hw/platform-bus.h index 19e20c57ce..33745a418e 100644 --- a/include/hw/platform-bus.h +++ b/include/hw/platform-bus.h @@ -29,10 +29,6 @@ typedef struct PlatformBusDevice PlatformBusDevice; #define TYPE_PLATFORM_BUS_DEVICE "platform-bus-device" #define PLATFORM_BUS_DEVICE(obj) \ OBJECT_CHECK(PlatformBusDevice, (obj), TYPE_PLATFORM_BUS_DEVICE) -#define PLATFORM_BUS_DEVICE_CLASS(klass) \ - OBJECT_CLASS_CHECK(PlatformBusDeviceClass, (klass), TYPE_PLATFORM_BUS_DEVICE) -#define PLATFORM_BUS_DEVICE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PlatformBusDeviceClass, (obj), TYPE_PLATFORM_BUS_DEVICE) struct PlatformBusDevice { /*< private >*/ From patchwork Thu Aug 20 00:12:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276014 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCB0BC433DF for ; Thu, 20 Aug 2020 00:29:14 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AB55D207DA for ; Thu, 20 Aug 2020 00:29:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="NzKgu2hJ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AB55D207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:54592 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YS9-0001sj-Jv for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:29:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49462) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDA-0006N0-5U for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:44 -0400 Received: from us-smtp-1.mimecast.com ([205.139.110.61]:48863 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YD8-0002OW-3Z for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:43 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882421; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=w2kAY76AR05cPx8u6ATTtTSwuUtxJ9FSP0MTr/x0z40=; b=NzKgu2hJM5tji7+aWiyz2IplRWTbU6RablVHX4Yb0Qv2AVsZaJhw4Ln5E4r46pcCr7sLQr 6+LYrRYzlINDfF8wjr5kHBIbX6J+Tw1fAn9GvhDTrY5+vANRlHwhRKyZjRhSPH20M0CCio v9emVk0Mk2si92R9DPzNMKSwctmzrg0= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-396-Ix3XGAAAPj2DyFPH0XsZjA-1; Wed, 19 Aug 2020 20:13:39 -0400 X-MC-Unique: Ix3XGAAAPj2DyFPH0XsZjA-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 871178030A2; Thu, 20 Aug 2020 00:13:38 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1E09B7DFFB; Thu, 20 Aug 2020 00:13:37 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 26/58] xen-legacy-backend: Add missing typedef XenLegacyDevice Date: Wed, 19 Aug 2020 20:12:04 -0400 Message-Id: <20200820001236.1284548-27-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 18:27:43 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , "Daniel P. Berrange" , Paul Durrant , xen-devel@lists.xenproject.org, Anthony Perard , Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The typedef was used in the XENBACKEND_DEVICE macro, but it was never defined. Define the typedef close to the type checking macro. Signed-off-by: Eduardo Habkost --- Changes series v1 -> v2: new patch in series v2 --- Cc: Stefano Stabellini Cc: Anthony Perard Cc: Paul Durrant Cc: xen-devel@lists.xenproject.org Cc: qemu-devel@nongnu.org --- include/hw/xen/xen-legacy-backend.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/hw/xen/xen-legacy-backend.h b/include/hw/xen/xen-legacy-backend.h index 5e6c56c4d6..704bc7852b 100644 --- a/include/hw/xen/xen-legacy-backend.h +++ b/include/hw/xen/xen-legacy-backend.h @@ -9,6 +9,7 @@ #define TYPE_XENSYSBUS "xen-sysbus" #define TYPE_XENBACKEND "xen-backend" +typedef struct XenLegacyDevice XenLegacyDevice; #define XENBACKEND_DEVICE(obj) \ OBJECT_CHECK(XenLegacyDevice, (obj), TYPE_XENBACKEND) From patchwork Thu Aug 20 00:12:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276022 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8113EC433E1 for ; Thu, 20 Aug 2020 00:21:39 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 46CB0207DA for ; Thu, 20 Aug 2020 00:21:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="aJcdNlr4" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 46CB0207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:46732 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YKo-00047L-HB for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:21:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49504) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDC-0006Tv-L1 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:46 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:32611 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YD9-0002Om-U4 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:46 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882423; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DXX+IB01OMSQ//OqiXhm4bBwWV9ZDrkS6OdwmIVEaFM=; b=aJcdNlr4bFK4/ClNdfE3FSkwFStUbCfy/WC8pV9MaYj7tjVFlWe/wsFUTVSUNfSHtJenaT 4iN8echJAFP1rt1hCFjP7ZqkFS2NlaaOCoCIWrQRQFBORjlfgEX7oXdSiGvnZ5oF3pyRsI M7tFo7tyJmVOn7PTwIrt3vnV31mjaEw= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-485-OdvfXX4PMZezi1BfrwoVBg-1; Wed, 19 Aug 2020 20:13:41 -0400 X-MC-Unique: OdvfXX4PMZezi1BfrwoVBg-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 5C7011007465; Thu, 20 Aug 2020 00:13:40 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6EA525D9D5; Thu, 20 Aug 2020 00:13:39 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 27/58] spapr: Move typedef SpaprMachineState to spapr.h Date: Wed, 19 Aug 2020 20:12:05 -0400 Message-Id: <20200820001236.1284548-28-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:44 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Paolo Bonzini , "Daniel P. Berrange" , =?utf-8?q?C=C3=A9dric_Le_Goater?= , David Gibson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Move the typedef from spapr_irq.h to spapr.h, and use "struct SpaprMachineState" in the spapr_*.h headers (to avoid circular header dependencies). This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost --- Changes series v1 -> v2: new patch in series v2 Cc: David Gibson Cc: "Cédric Le Goater" Cc: qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org --- include/hw/ppc/spapr.h | 1 + include/hw/ppc/spapr_irq.h | 36 ++++++++++++++++++------------------ include/hw/ppc/spapr_xive.h | 3 ++- 3 files changed, 21 insertions(+), 19 deletions(-) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 3134d339e8..a1e230ad39 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -41,6 +41,7 @@ typedef struct SpaprDimmState SpaprDimmState; typedef struct SpaprMachineClass SpaprMachineClass; #define TYPE_SPAPR_MACHINE "spapr-machine" +typedef struct SpaprMachineState SpaprMachineState; #define SPAPR_MACHINE(obj) \ OBJECT_CHECK(SpaprMachineState, (obj), TYPE_SPAPR_MACHINE) #define SPAPR_MACHINE_GET_CLASS(obj) \ diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index ca8cb44213..b161ccebc2 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -28,7 +28,7 @@ #define SPAPR_NR_XIRQS 0x1000 -typedef struct SpaprMachineState SpaprMachineState; +struct SpaprMachineState; typedef struct SpaprInterruptController SpaprInterruptController; @@ -67,20 +67,20 @@ typedef struct SpaprInterruptControllerClass { int (*post_load)(SpaprInterruptController *intc, int version_id); } SpaprInterruptControllerClass; -void spapr_irq_update_active_intc(SpaprMachineState *spapr); +void spapr_irq_update_active_intc(struct SpaprMachineState *spapr); -int spapr_irq_cpu_intc_create(SpaprMachineState *spapr, +int spapr_irq_cpu_intc_create(struct SpaprMachineState *spapr, PowerPCCPU *cpu, Error **errp); -void spapr_irq_cpu_intc_reset(SpaprMachineState *spapr, PowerPCCPU *cpu); -void spapr_irq_cpu_intc_destroy(SpaprMachineState *spapr, PowerPCCPU *cpu); -void spapr_irq_print_info(SpaprMachineState *spapr, Monitor *mon); -void spapr_irq_dt(SpaprMachineState *spapr, uint32_t nr_servers, +void spapr_irq_cpu_intc_reset(struct SpaprMachineState *spapr, PowerPCCPU *cpu); +void spapr_irq_cpu_intc_destroy(struct SpaprMachineState *spapr, PowerPCCPU *cpu); +void spapr_irq_print_info(struct SpaprMachineState *spapr, Monitor *mon); +void spapr_irq_dt(struct SpaprMachineState *spapr, uint32_t nr_servers, void *fdt, uint32_t phandle); -uint32_t spapr_irq_nr_msis(SpaprMachineState *spapr); -int spapr_irq_msi_alloc(SpaprMachineState *spapr, uint32_t num, bool align, +uint32_t spapr_irq_nr_msis(struct SpaprMachineState *spapr); +int spapr_irq_msi_alloc(struct SpaprMachineState *spapr, uint32_t num, bool align, Error **errp); -void spapr_irq_msi_free(SpaprMachineState *spapr, int irq, uint32_t num); +void spapr_irq_msi_free(struct SpaprMachineState *spapr, int irq, uint32_t num); typedef struct SpaprIrq { bool xics; @@ -92,13 +92,13 @@ extern SpaprIrq spapr_irq_xics_legacy; extern SpaprIrq spapr_irq_xive; extern SpaprIrq spapr_irq_dual; -void spapr_irq_init(SpaprMachineState *spapr, Error **errp); -int spapr_irq_claim(SpaprMachineState *spapr, int irq, bool lsi, Error **errp); -void spapr_irq_free(SpaprMachineState *spapr, int irq, int num); -qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq); -int spapr_irq_post_load(SpaprMachineState *spapr, int version_id); -void spapr_irq_reset(SpaprMachineState *spapr, Error **errp); -int spapr_irq_get_phandle(SpaprMachineState *spapr, void *fdt, Error **errp); +void spapr_irq_init(struct SpaprMachineState *spapr, Error **errp); +int spapr_irq_claim(struct SpaprMachineState *spapr, int irq, bool lsi, Error **errp); +void spapr_irq_free(struct SpaprMachineState *spapr, int irq, int num); +qemu_irq spapr_qirq(struct SpaprMachineState *spapr, int irq); +int spapr_irq_post_load(struct SpaprMachineState *spapr, int version_id); +void spapr_irq_reset(struct SpaprMachineState *spapr, Error **errp); +int spapr_irq_get_phandle(struct SpaprMachineState *spapr, void *fdt, Error **errp); typedef int (*SpaprInterruptControllerInitKvm)(SpaprInterruptController *, uint32_t, Error **); @@ -111,7 +111,7 @@ int spapr_irq_init_kvm(SpaprInterruptControllerInitKvm fn, /* * XICS legacy routines */ -int spapr_irq_find(SpaprMachineState *spapr, int num, bool align, Error **errp); +int spapr_irq_find(struct SpaprMachineState *spapr, int num, bool align, Error **errp); #define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp) #endif diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index 93d09d68de..85f124506d 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -66,7 +66,8 @@ typedef struct SpaprXiveClass { void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon); -void spapr_xive_hcall_init(SpaprMachineState *spapr); +struct SpaprMachineState; +void spapr_xive_hcall_init(struct SpaprMachineState *spapr); void spapr_xive_mmio_set_enabled(SpaprXive *xive, bool enable); void spapr_xive_map_mmio(SpaprXive *xive); From patchwork Thu Aug 20 00:12:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276012 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EAB42C433E1 for ; Thu, 20 Aug 2020 00:31:06 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B03662078D for ; Thu, 20 Aug 2020 00:31:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="C9ooz/aK" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B03662078D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:34920 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YTx-0005Kd-T3 for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:31:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49586) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDO-00070G-Le for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:58 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:37919 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YDN-0002QM-2b for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:13:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882436; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rn3B3q9b6V2OJ5eEHjac4G//ok7jASUV7tbrARPCCl0=; b=C9ooz/aK0zIwC6gDnTmgHNKrqB+V+KuF77la4K5vCLSlVDVhdPc9b9HT3broAojk8nsHUB SqGUsz1w/J63W6nAOh/Dt4SPIoH4qyuQ9F7MtHHkkEozUtC66NYB3yEsKLgjSRYycD+fTK wMkHcjqo7tueDXfUgpLZWu6eq4Byc1A= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-316-X_339OpoN661f3PStHIbbQ-1; Wed, 19 Aug 2020 20:13:54 -0400 X-MC-Unique: X_339OpoN661f3PStHIbbQ-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 18BBD2FD00 for ; Thu, 20 Aug 2020 00:13:54 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id C8CD4747B0; Thu, 20 Aug 2020 00:13:50 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 31/58] i8257: Move QOM macro to header Date: Wed, 19 Aug 2020 20:12:09 -0400 Message-Id: <20200820001236.1284548-32-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/18 23:05:17 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Move the I8257 macro to i8257.h, close to the TYPE_I8257 define. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost --- Changes series v1 -> v2: new patch in series v2 Cc: "Michael S. Tsirkin" Cc: Paolo Bonzini Cc: qemu-devel@nongnu.org --- include/hw/dma/i8257.h | 2 ++ hw/dma/i8257.c | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/hw/dma/i8257.h b/include/hw/dma/i8257.h index 03e2c166be..ee06371699 100644 --- a/include/hw/dma/i8257.h +++ b/include/hw/dma/i8257.h @@ -5,6 +5,8 @@ #include "exec/ioport.h" #define TYPE_I8257 "i8257" +#define I8257(obj) \ + OBJECT_CHECK(I8257State, (obj), TYPE_I8257) typedef struct I8257Regs { int now[2]; diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index db808029b0..de5f696919 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -33,8 +33,6 @@ #include "qemu/log.h" #include "trace.h" -#define I8257(obj) \ - OBJECT_CHECK(I8257State, (obj), TYPE_I8257) /* #define DEBUG_DMA */ From patchwork Thu Aug 20 00:12:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276010 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 527E7C433DF for ; Thu, 20 Aug 2020 00:33:51 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1AEF02078D for ; Thu, 20 Aug 2020 00:33:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="UioZhnMp" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1AEF02078D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:43500 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YWc-0000jh-8K for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:33:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49690) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDb-0007TR-Pu for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:11 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:39915 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YDa-0002Sw-2H for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:11 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882449; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qcH11WejQd5Vr1CmO3bATO+d3w6bgdAvhNpyyUk1VFE=; b=UioZhnMp0xl/QV/GmmzeKmzKrFtbPS/bdr8gVNQg54OnoA5CIIVeQvJ5xpChDJl7zHu0EA jX2p1XtBZHlabR0B/3a5BFMudM/1fDnD4cAhioLmcHkTHoZTPFM5W9ae7XPAsuFTScOwBv vs2+tPgu7TParZ9CosutKO75bVZ4X/o= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-551-2K_QctZPNbiS8d4Kok8bbA-1; Wed, 19 Aug 2020 20:14:07 -0400 X-MC-Unique: 2K_QctZPNbiS8d4Kok8bbA-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B891F801ADD; Thu, 20 Aug 2020 00:14:06 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9489C7BE98; Thu, 20 Aug 2020 00:14:00 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 35/58] virtio-serial-bus: Move QOM macros to header Date: Wed, 19 Aug 2020 20:12:13 -0400 Message-Id: <20200820001236.1284548-36-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:44 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , "Daniel P. Berrange" , "Michael S. Tsirkin" , Amit Shah , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost --- Changes series v1 -> v2: new patch in series v2 Cc: Laurent Vivier Cc: Amit Shah Cc: "Michael S. Tsirkin" Cc: "Marc-André Lureau" Cc: Paolo Bonzini Cc: qemu-devel@nongnu.org --- include/hw/virtio/virtio-serial.h | 5 +++++ hw/char/virtio-serial-bus.c | 4 ---- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/include/hw/virtio/virtio-serial.h b/include/hw/virtio/virtio-serial.h index ed3e916b68..448615a6b3 100644 --- a/include/hw/virtio/virtio-serial.h +++ b/include/hw/virtio/virtio-serial.h @@ -33,7 +33,12 @@ struct virtio_serial_conf { OBJECT_GET_CLASS(VirtIOSerialPortClass, (obj), TYPE_VIRTIO_SERIAL_PORT) typedef struct VirtIOSerial VirtIOSerial; + +#define TYPE_VIRTIO_SERIAL_BUS "virtio-serial-bus" typedef struct VirtIOSerialBus VirtIOSerialBus; +#define VIRTIO_SERIAL_BUS(obj) \ + OBJECT_CHECK(VirtIOSerialBus, (obj), TYPE_VIRTIO_SERIAL_BUS) + typedef struct VirtIOSerialPort VirtIOSerialPort; typedef struct VirtIOSerialPortClass { diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c index f9a4428bd6..cf08ef9728 100644 --- a/hw/char/virtio-serial-bus.c +++ b/hw/char/virtio-serial-bus.c @@ -843,10 +843,6 @@ static Property virtser_props[] = { DEFINE_PROP_END_OF_LIST() }; -#define TYPE_VIRTIO_SERIAL_BUS "virtio-serial-bus" -#define VIRTIO_SERIAL_BUS(obj) \ - OBJECT_CHECK(VirtIOSerialBus, (obj), TYPE_VIRTIO_SERIAL_BUS) - static void virtser_bus_class_init(ObjectClass *klass, void *data) { BusClass *k = BUS_CLASS(klass); From patchwork Thu Aug 20 00:12:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276019 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DDF5EC433DF for ; Thu, 20 Aug 2020 00:24:41 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A7A25207DA for ; Thu, 20 Aug 2020 00:24:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="hE767j6l" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A7A25207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:58884 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YNk-0000b8-Uv for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:24:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49728) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDg-0007ft-LP for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:16 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:20297 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YDe-0002TJ-Tk for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:16 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882454; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gB3FlwEyN+zkD4aAVdZIQg0j2M3c4bun4Jat7foOH/k=; b=hE767j6lK1BNmitpDxOUF/QdR6oGv2Wc+0xMZV6/QnJJDmihFz2/5KMztYxKTcblEGkppN WFhyePCOAW0tlSQy9JnqY89/lnRB0lDCRH7QdGAcrjhEYjXUeFWP9Vnvs+QpNzrvIkJT6r GhmyuQTIgwnIchMWQNC8PkMAy1QSbAE= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-165-wRWBvVdXOAiyNenSJAma2Q-1; Wed, 19 Aug 2020 20:14:12 -0400 X-MC-Unique: wRWBvVdXOAiyNenSJAma2Q-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 1D4A71084CA1; Thu, 20 Aug 2020 00:14:11 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 915E87AEC4; Thu, 20 Aug 2020 00:14:07 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 36/58] piix: Move QOM macros to header Date: Wed, 19 Aug 2020 20:12:14 -0400 Message-Id: <20200820001236.1284548-37-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:13:02 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Daniel P. Berrange" , "Michael S. Tsirkin" , Aleksandar Markovic , =?utf-8?q?Herv?= =?utf-8?q?=C3=A9_Poussineau?= , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost --- Changes series v1 -> v2: new patch in series v2 Cc: "Michael S. Tsirkin" Cc: Marcel Apfelbaum Cc: "Hervé Poussineau" Cc: "Philippe Mathieu-Daudé" Cc: Aleksandar Markovic Cc: Aurelien Jarno Cc: qemu-devel@nongnu.org --- include/hw/southbridge/piix.h | 4 ++++ hw/isa/piix3.c | 4 ---- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 02bd741209..ac1d04ddc2 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -64,6 +64,10 @@ typedef struct PIIXState { MemoryRegion rcr_mem; } PIIX3State; +#define TYPE_PIIX3_PCI_DEVICE "pci-piix3" +#define PIIX3_PCI_DEVICE(obj) \ + OBJECT_CHECK(PIIX3State, (obj), TYPE_PIIX3_PCI_DEVICE) + extern PCIDevice *piix4_dev; PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus); diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 1a5267e19f..587850b888 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -36,10 +36,6 @@ #define XEN_PIIX_NUM_PIRQS 128ULL -#define TYPE_PIIX3_PCI_DEVICE "pci-piix3" -#define PIIX3_PCI_DEVICE(obj) \ - OBJECT_CHECK(PIIX3State, (obj), TYPE_PIIX3_PCI_DEVICE) - #define TYPE_PIIX3_DEVICE "PIIX3" #define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" From patchwork Thu Aug 20 00:12:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276008 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DEA97C433E1 for ; Thu, 20 Aug 2020 00:35:07 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9D2B22078D for ; Thu, 20 Aug 2020 00:35:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="gkcQcUaS" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9D2B22078D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:51550 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YXq-0003wZ-RN for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:35:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49752) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDj-0007mS-8e for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:19 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:59373 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YDh-0002Tj-CH for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:18 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882456; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xQVyrUbCtmmNgI3C+81SAgz6c0+ixe7u++HKZB2efvQ=; b=gkcQcUaSskx6RHLZ8PtwOpxB2BDdFYYi2+7lGdxXzpYxjvhvdn1E2fJt8ZGS8rydjm30Nb hx2/b4qHBrtAKhmXbf0kZ5NJ73GNLpjP+DWHoQlqvaIuxe++wH9mqyN9kxNiC6/+I5c9VA 0HxXnXQ3eVV46LNpQhUh2PvFKISz4Hc= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-328-WFSOmUCWOu-8LNwEUB9lqQ-1; Wed, 19 Aug 2020 20:14:14 -0400 X-MC-Unique: WFSOmUCWOu-8LNwEUB9lqQ-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 8E72C2FD02; Thu, 20 Aug 2020 00:14:13 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id DFDBD709DC; Thu, 20 Aug 2020 00:14:12 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 38/58] rocker: Move QOM macros to header Date: Wed, 19 Aug 2020 20:12:16 -0400 Message-Id: <20200820001236.1284548-39-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/18 23:05:17 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jiri Pirko , Paolo Bonzini , Jason Wang , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost --- Changes series v1 -> v2: new patch in series v2 Cc: Jiri Pirko Cc: Jason Wang Cc: qemu-devel@nongnu.org --- hw/net/rocker/rocker.h | 6 +++++- hw/net/rocker/rocker.c | 5 ----- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/hw/net/rocker/rocker.h b/hw/net/rocker/rocker.h index 7ae0495d9e..e4c22db4ff 100644 --- a/hw/net/rocker/rocker.h +++ b/hw/net/rocker/rocker.h @@ -66,11 +66,15 @@ static inline bool ipv6_addr_is_multicast(const Ipv6Addr *addr) return (addr->addr32[0] & htonl(0xFF000000)) == htonl(0xFF000000); } -typedef struct rocker Rocker; typedef struct world World; typedef struct desc_info DescInfo; typedef struct desc_ring DescRing; +#define TYPE_ROCKER "rocker" +typedef struct rocker Rocker; +#define ROCKER(obj) \ + OBJECT_CHECK(Rocker, (obj), TYPE_ROCKER) + Rocker *rocker_find(const char *name); uint32_t rocker_fp_ports(Rocker *r); int rocker_event_link_changed(Rocker *r, uint32_t pport, bool link_up); diff --git a/hw/net/rocker/rocker.c b/hw/net/rocker/rocker.c index 15d66f6cbc..1af1e6fa2f 100644 --- a/hw/net/rocker/rocker.c +++ b/hw/net/rocker/rocker.c @@ -73,11 +73,6 @@ struct rocker { QLIST_ENTRY(rocker) next; }; -#define TYPE_ROCKER "rocker" - -#define ROCKER(obj) \ - OBJECT_CHECK(Rocker, (obj), TYPE_ROCKER) - static QLIST_HEAD(, rocker) rockers; Rocker *rocker_find(const char *name) From patchwork Thu Aug 20 00:12:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80398C433E1 for ; Thu, 20 Aug 2020 00:26:37 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4027F207DA for ; Thu, 20 Aug 2020 00:26:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="L9r7TOfS" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4027F207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:39024 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YPc-00043V-Ds for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:26:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49794) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDm-0007tu-6f for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:22 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:58155 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YDj-0002UD-Vi for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:21 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882459; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7EkdIlxETPfIAzHkOFinRG+mYgIs7T56rbnwrgrdbzk=; b=L9r7TOfSa7U0D/tivPefChBdu2DFSo6+gohnUZjsweNmlqXfE/9HIrBSnsGcykgEIzg5xM knlYuObxOY5+qK43V+8UW0E1CRWagHbmMRhbiaNbH3a33754LzQig0zE7/Jqx6zb1XC4Gm u3xscLURMDVVa0KoqP8q5scC7Gi3a30= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-251-P48DF9CMNx281CAIqhZFHA-1; Wed, 19 Aug 2020 20:14:17 -0400 X-MC-Unique: P48DF9CMNx281CAIqhZFHA-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id ADC0B8030A4; Thu, 20 Aug 2020 00:14:16 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7549C757C0; Thu, 20 Aug 2020 00:14:16 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 41/58] kvm: Move QOM macros to kvm.h Date: Wed, 19 Aug 2020 20:12:19 -0400 Message-Id: <20200820001236.1284548-42-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 Received-SPF: pass client-ip=207.211.31.81; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:44 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" , kvm@vger.kernel.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Move QOM macros close to the KVMState typedef. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost --- Changes series v1 -> v2: new patch in series v2 Cc: Paolo Bonzini Cc: kvm@vger.kernel.org Cc: qemu-devel@nongnu.org --- include/sysemu/kvm.h | 6 ++++++ include/sysemu/kvm_int.h | 5 ----- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index b4174d941c..8445a88db1 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -17,6 +17,7 @@ #include "qemu/queue.h" #include "hw/core/cpu.h" #include "exec/memattrs.h" +#include "sysemu/accel.h" #ifdef NEED_CPU_H # ifdef CONFIG_KVM @@ -199,7 +200,12 @@ typedef struct KVMCapabilityInfo { #define KVM_CAP_LAST_INFO { NULL, 0 } struct KVMState; + +#define TYPE_KVM_ACCEL ACCEL_CLASS_NAME("kvm") typedef struct KVMState KVMState; +#define KVM_STATE(obj) \ + OBJECT_CHECK(KVMState, (obj), TYPE_KVM_ACCEL) + extern KVMState *kvm_state; typedef struct Notifier Notifier; diff --git a/include/sysemu/kvm_int.h b/include/sysemu/kvm_int.h index c660a70c51..65740806da 100644 --- a/include/sysemu/kvm_int.h +++ b/include/sysemu/kvm_int.h @@ -33,11 +33,6 @@ typedef struct KVMMemoryListener { int as_id; } KVMMemoryListener; -#define TYPE_KVM_ACCEL ACCEL_CLASS_NAME("kvm") - -#define KVM_STATE(obj) \ - OBJECT_CHECK(KVMState, (obj), TYPE_KVM_ACCEL) - void kvm_memory_listener_register(KVMState *s, KVMMemoryListener *kml, AddressSpace *as, int as_id); From patchwork Thu Aug 20 00:12:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276015 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46BE6C433DF for ; Thu, 20 Aug 2020 00:28:09 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1568B207DA for ; Thu, 20 Aug 2020 00:28:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="RRviyY0B" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1568B207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:47366 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YR5-0007OP-Td for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:28:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49818) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDp-00082b-H3 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:25 -0400 Received: from us-smtp-delivery-124.mimecast.com ([63.128.21.124]:35580) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YDn-0002Uh-UQ for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:25 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882463; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=k/gqF4smd4RM5Kp67ZzXElMASXKwaxqIs37+RRtWWdc=; b=RRviyY0BpaNlsCMDjIQNjEzqtvW6rqr2WSXzAHw/cdGM3HB+WKbKBq2l3PcNLXOkq0KWpw 1Q7z2dRlLf1x8wGJntBtifcJSExDTAJshb/fDl3oIsFvmzc8cFvlR05gLoXbMv3+N9LHbm 5kmQUROoK5Jkmbh5n1pUZEL5LTosNJM= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-550-nPRttQ2kNEG9ELMM_QmB9w-1; Wed, 19 Aug 2020 20:14:21 -0400 X-MC-Unique: nPRttQ2kNEG9ELMM_QmB9w-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id A6BE2801AE5 for ; Thu, 20 Aug 2020 00:14:20 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7F216747B0; Thu, 20 Aug 2020 00:14:17 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 42/58] vfio/pci: Move QOM macros to header Date: Wed, 19 Aug 2020 20:12:20 -0400 Message-Id: <20200820001236.1284548-43-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=63.128.21.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:48 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Alex Williamson , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost --- Changes series v1 -> v2: new patch in series v2 Cc: Alex Williamson Cc: qemu-devel@nongnu.org --- hw/vfio/pci.h | 3 +++ hw/vfio/pci.c | 3 --- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index 0da7a20a7e..3c0dca024b 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -113,6 +113,9 @@ typedef struct VFIOMSIXInfo { unsigned long *pending; } VFIOMSIXInfo; +#define TYPE_VFIO_PCI "vfio-pci" +#define PCI_VFIO(obj) OBJECT_CHECK(VFIOPCIDevice, obj, TYPE_VFIO_PCI) + typedef struct VFIOPCIDevice { PCIDevice pdev; VFIODevice vbasedev; diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 2e561c06d6..3611dcd38b 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -42,9 +42,6 @@ #include "qapi/error.h" #include "migration/blocker.h" -#define TYPE_VFIO_PCI "vfio-pci" -#define PCI_VFIO(obj) OBJECT_CHECK(VFIOPCIDevice, obj, TYPE_VFIO_PCI) - #define TYPE_VFIO_PCI_NOHOTPLUG "vfio-pci-nohotplug" static void vfio_disable_interrupts(VFIOPCIDevice *vdev); From patchwork Thu Aug 20 00:12:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276013 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67B9AC433E1 for ; Thu, 20 Aug 2020 00:29:25 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 35D48207DA for ; Thu, 20 Aug 2020 00:29:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="d9d2Bc7m" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 35D48207DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:55788 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YSK-0002NK-F3 for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:29:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49840) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDs-00089K-1E for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:28 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:35206 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YDp-0002Ur-1L for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882464; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=awg9JZ57ssouxAqwCxUf5tiQK0t/pyZG0TdMDrF6LBc=; b=d9d2Bc7mWzG01EuBMEv3FqdXonT7QxAekyvhVf/QkPU+12bodYgTEU+sZ7aIIJgnSMxqpc MpTeyoQYJup9sqovNFWOwgGy5BsP7s7uxnrlVEN3Hvy1awmmqSPwV0UnbbuEcQkd/9PKZo p1tXLfM7P7GnlaFBy2eNm1GLTwXmVms= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-495-bGRya__gNAKswbpbOI-M9A-1; Wed, 19 Aug 2020 20:14:22 -0400 X-MC-Unique: bGRya__gNAKswbpbOI-M9A-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 91B821084C8C for ; Thu, 20 Aug 2020 00:14:21 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5A257747B0; Thu, 20 Aug 2020 00:14:21 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 43/58] qom: make object_ref/unref use a void * instead of Object *. Date: Wed, 19 Aug 2020 20:12:21 -0400 Message-Id: <20200820001236.1284548-44-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:44 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Daniel P. Berrangé The object_ref/unref methods are intended for use with any subclass of the base Object. Using "Object *" in the signature is not adding any meaningful level of type safety, since callers simply use "OBJECT(ptr)" and this expands to an unchecked cast "(Object *)". By using "void *" we enable the object_unref() method to be used to provide support for g_autoptr() with any subclass. Signed-off-by: Daniel P. Berrangé Message-Id: <20200723181410.3145233-2-berrange@redhat.com> --- Changes v1 -> v2: none --- include/qom/object.h | 4 ++-- qom/object.c | 6 ++++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/include/qom/object.h b/include/qom/object.h index 0f3a60617c..1f8aa2d48e 100644 --- a/include/qom/object.h +++ b/include/qom/object.h @@ -1035,7 +1035,7 @@ GSList *object_class_get_list_sorted(const char *implements_type, * as its reference count is greater than zero. * Returns: @obj */ -Object *object_ref(Object *obj); +Object *object_ref(void *obj); /** * object_unref: @@ -1044,7 +1044,7 @@ Object *object_ref(Object *obj); * Decrease the reference count of a object. A object cannot be freed as long * as its reference count is greater than zero. */ -void object_unref(Object *obj); +void object_unref(void *obj); /** * object_property_try_add: diff --git a/qom/object.c b/qom/object.c index 00fdf89b3b..b1822a2ef4 100644 --- a/qom/object.c +++ b/qom/object.c @@ -1124,8 +1124,9 @@ GSList *object_class_get_list_sorted(const char *implements_type, object_class_cmp); } -Object *object_ref(Object *obj) +Object *object_ref(void *objptr) { + Object *obj = OBJECT(objptr); if (!obj) { return NULL; } @@ -1133,8 +1134,9 @@ Object *object_ref(Object *obj) return obj; } -void object_unref(Object *obj) +void object_unref(void *objptr) { + Object *obj = OBJECT(objptr); if (!obj) { return; } From patchwork Thu Aug 20 00:12:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276007 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05A84C433DF for ; Thu, 20 Aug 2020 00:36:34 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C19F62078D for ; Thu, 20 Aug 2020 00:36:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="IegAwV/B" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C19F62078D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:57750 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YZF-0006Zt-2T for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:36:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49848) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDs-0008BU-Q6 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:28 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:43289 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YDq-0002VC-WA for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:28 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882466; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QRsaQFaoe+t2P1m4KInI0JnBkK8MvTc0IlI/ubz5FHA=; b=IegAwV/BVg8Flv6fu+6y7PGzRu4K9RyoqOdAnFZ5dn9JnJ4eQiBOxZlMpFxmSrngw1S0se s4Gsc4GFgxdvJoxQ+YDB/5L7ofBlv/jLJzFD3zeTSIPAkfV5C/WMw7bHEg7qZwUPaKyRsl rSOfgOOARtDSq/RQZSjhnN3GLQt9/LY= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-178-Jt6NlNmfPaep0xoY51Sytw-1; Wed, 19 Aug 2020 20:14:24 -0400 X-MC-Unique: Jt6NlNmfPaep0xoY51Sytw-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id A2E401084C91 for ; Thu, 20 Aug 2020 00:14:23 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 66797709DC; Thu, 20 Aug 2020 00:14:23 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 45/58] qom: Allow class type name to be specified in OBJECT_DECLARE* Date: Wed, 19 Aug 2020 20:12:23 -0400 Message-Id: <20200820001236.1284548-46-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/18 23:05:17 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Many QOM types don't follow the Type/TypeClass pattern on the instance/struct names. Let the class struct name be specified in the OBJECT_DECLARE* macros. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- include/qom/object.h | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/include/qom/object.h b/include/qom/object.h index f515230f61..500e7dfa99 100644 --- a/include/qom/object.h +++ b/include/qom/object.h @@ -555,7 +555,8 @@ struct Object /** * OBJECT_DECLARE_TYPE: - * @ModuleObjName: the object name with initial capitalization + * @InstanceType: instance struct name + * @ClassType: class struct name * @module_obj_name: the object name in lowercase with underscore separators * @MODULE_OBJ_NAME: the object name in uppercase with underscore separators * @@ -567,33 +568,33 @@ struct Object * * The object struct and class struct need to be declared manually. */ -#define OBJECT_DECLARE_TYPE(ModuleObjName, module_obj_name, MODULE_OBJ_NAME) \ - typedef struct ModuleObjName ModuleObjName; \ - typedef struct ModuleObjName##Class ModuleObjName##Class; \ +#define OBJECT_DECLARE_TYPE(InstanceType, ClassType, module_obj_name, MODULE_OBJ_NAME) \ + typedef struct InstanceType InstanceType; \ + typedef struct ClassType ClassType; \ \ - G_DEFINE_AUTOPTR_CLEANUP_FUNC(ModuleObjName, object_unref) \ + G_DEFINE_AUTOPTR_CLEANUP_FUNC(InstanceType, object_unref) \ \ - static inline G_GNUC_UNUSED ModuleObjName##Class * \ + static inline G_GNUC_UNUSED ClassType * \ MODULE_OBJ_NAME##_GET_CLASS(void *obj) \ - { return OBJECT_GET_CLASS(ModuleObjName##Class, obj, \ + { return OBJECT_GET_CLASS(ClassType, obj, \ TYPE_##MODULE_OBJ_NAME); } \ \ - static inline G_GNUC_UNUSED ModuleObjName##Class * \ + static inline G_GNUC_UNUSED ClassType * \ MODULE_OBJ_NAME##_CLASS(void *klass) \ - { return OBJECT_CLASS_CHECK(ModuleObjName##Class, klass, \ + { return OBJECT_CLASS_CHECK(ClassType, klass, \ TYPE_##MODULE_OBJ_NAME); } \ \ - static inline G_GNUC_UNUSED ModuleObjName * \ + static inline G_GNUC_UNUSED InstanceType * \ MODULE_OBJ_NAME(void *obj) \ - { return OBJECT_CHECK(ModuleObjName, obj, \ + { return OBJECT_CHECK(InstanceType, obj, \ TYPE_##MODULE_OBJ_NAME); } /** * OBJECT_DECLARE_SIMPLE_TYPE: - * @ModuleObjName: the object name with initial caps + * @InstanceType: instance struct name * @module_obj_name: the object name in lowercase with underscore separators * @MODULE_OBJ_NAME: the object name in uppercase with underscore separators - * @ParentModuleObjName: the parent object name with initial caps + * @ParentClassType: class struct name of parent type * * This does the same as OBJECT_DECLARE_TYPE(), but also declares * the class struct, thus only the object struct needs to be declare @@ -602,10 +603,10 @@ struct Object * This macro should be used unless the class struct needs to have * virtual methods declared. */ -#define OBJECT_DECLARE_SIMPLE_TYPE(ModuleObjName, module_obj_name, \ - MODULE_OBJ_NAME, ParentModuleObjName) \ - OBJECT_DECLARE_TYPE(ModuleObjName, module_obj_name, MODULE_OBJ_NAME) \ - struct ModuleObjName##Class { ParentModuleObjName##Class parent_class; }; +#define OBJECT_DECLARE_SIMPLE_TYPE(InstanceType, module_obj_name, \ + MODULE_OBJ_NAME, ParentClassType) \ + OBJECT_DECLARE_TYPE(InstanceType, InstanceType##Class, module_obj_name, MODULE_OBJ_NAME) \ + struct InstanceType##Class { ParentClassType parent_class; }; /** From patchwork Thu Aug 20 00:12:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276011 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DF28C433DF for ; Thu, 20 Aug 2020 00:31:23 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 034F02078D for ; Thu, 20 Aug 2020 00:31:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="CQqyXcQ/" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 034F02078D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:35954 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YUE-0005sd-8F for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:31:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49902) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDw-0008Lr-CT for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:32 -0400 Received: from us-smtp-1.mimecast.com ([205.139.110.61]:59637 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YDu-0002Vk-JO for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:32 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882469; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9CaQ0XPUYHXmeyBGz11bbynQ/Eo1tr5PbOtyfN1oL1Y=; b=CQqyXcQ/eIuxJim8uiD9B6RT70P+JSqBaj50XqJrMP2WBFSI/Di1Pk03kDRqTn7TsON91v D65nQwl5RUwecuEim7Ao6bLzz9r7iFX3g45Yl2+PMPuY38NVdHtUD+dFEEeql/o10HqLwa dD+JmCAqnZ8RNQl0KjjXq7WF0scF3DI= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-234-_WlhpRPaO2iBXx0Suf-JpQ-1; Wed, 19 Aug 2020 20:14:25 -0400 X-MC-Unique: _WlhpRPaO2iBXx0Suf-JpQ-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id DCFCD186A568 for ; Thu, 20 Aug 2020 00:14:24 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8A50416D4B; Thu, 20 Aug 2020 00:14:24 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 46/58] qom: DECLARE_*_CHECKERS macros Date: Wed, 19 Aug 2020 20:12:24 -0400 Message-Id: <20200820001236.1284548-47-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 18:27:43 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Sometimes the typedefs are buried inside another header, but we want to benefit from the automatic definition of type cast functions. Introduce macros that will let type checkers be defined when typedefs are already available. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- include/qom/object.h | 72 +++++++++++++++++++++++++++++++++++--------- 1 file changed, 58 insertions(+), 14 deletions(-) diff --git a/include/qom/object.h b/include/qom/object.h index 500e7dfa99..4cd84998c2 100644 --- a/include/qom/object.h +++ b/include/qom/object.h @@ -553,6 +553,62 @@ struct Object Object *parent; }; +/** + * DECLARE_INSTANCE_CHECKER: + * @InstanceType: instance struct name + * @OBJ_NAME: the object name in uppercase with underscore separators + * @TYPENAME: type name + * + * Direct usage of this macro should be avoided, and the complete + * OBJECT_DECLARE_TYPE macro is recommended instead. + * + * This macro will provide the three standard type cast functions for a + * QOM type. + */ +#define DECLARE_INSTANCE_CHECKER(InstanceType, OBJ_NAME, TYPENAME) \ + static inline G_GNUC_UNUSED InstanceType * \ + OBJ_NAME(void *obj) \ + { return OBJECT_CHECK(InstanceType, obj, TYPENAME); } + +/** + * DECLARE_CLASS_CHECKERS: + * @ClassType: class struct name + * @OBJ_NAME: the object name in uppercase with underscore separators + * @TYPENAME: type name + * + * Direct usage of this macro should be avoided, and the complete + * OBJECT_DECLARE_TYPE macro is recommended instead. + * + * This macro will provide the three standard type cast functions for a + * QOM type. + */ +#define DECLARE_CLASS_CHECKERS(ClassType, OBJ_NAME, TYPENAME) \ + static inline G_GNUC_UNUSED ClassType * \ + OBJ_NAME##_GET_CLASS(void *obj) \ + { return OBJECT_GET_CLASS(ClassType, obj, TYPENAME); } \ + \ + static inline G_GNUC_UNUSED ClassType * \ + OBJ_NAME##_CLASS(void *klass) \ + { return OBJECT_CLASS_CHECK(ClassType, klass, TYPENAME); } + +/** + * DECLARE_OBJ_CHECKERS: + * @InstanceType: instance struct name + * @ClassType: class struct name + * @OBJ_NAME: the object name in uppercase with underscore separators + * @TYPENAME: type name + * + * Direct usage of this macro should be avoided, and the complete + * OBJECT_DECLARE_TYPE macro is recommended instead. + * + * This macro will provide the three standard type cast functions for a + * QOM type. + */ +#define DECLARE_OBJ_CHECKERS(InstanceType, ClassType, OBJ_NAME, TYPENAME) \ + DECLARE_INSTANCE_CHECKER(InstanceType, OBJ_NAME, TYPENAME) \ + \ + DECLARE_CLASS_CHECKERS(ClassType, OBJ_NAME, TYPENAME) + /** * OBJECT_DECLARE_TYPE: * @InstanceType: instance struct name @@ -574,20 +630,8 @@ struct Object \ G_DEFINE_AUTOPTR_CLEANUP_FUNC(InstanceType, object_unref) \ \ - static inline G_GNUC_UNUSED ClassType * \ - MODULE_OBJ_NAME##_GET_CLASS(void *obj) \ - { return OBJECT_GET_CLASS(ClassType, obj, \ - TYPE_##MODULE_OBJ_NAME); } \ - \ - static inline G_GNUC_UNUSED ClassType * \ - MODULE_OBJ_NAME##_CLASS(void *klass) \ - { return OBJECT_CLASS_CHECK(ClassType, klass, \ - TYPE_##MODULE_OBJ_NAME); } \ - \ - static inline G_GNUC_UNUSED InstanceType * \ - MODULE_OBJ_NAME(void *obj) \ - { return OBJECT_CHECK(InstanceType, obj, \ - TYPE_##MODULE_OBJ_NAME); } + DECLARE_OBJ_CHECKERS(InstanceType, ClassType, \ + MODULE_OBJ_NAME, TYPE_##MODULE_OBJ_NAME) /** * OBJECT_DECLARE_SIMPLE_TYPE: From patchwork Thu Aug 20 00:12:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276004 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D466DC433E1 for ; Thu, 20 Aug 2020 00:40:42 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9B0C720578 for ; Thu, 20 Aug 2020 00:40:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="QzPjsj7m" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9B0C720578 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:45804 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YdF-0004p8-Sd for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:40:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49888) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YDv-0008Jj-Jl for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:31 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:43447 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YDt-0002Vb-TB for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882469; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qX29hC/Revp186AL5RYuW7GsP3iJP1Oc/vaLfb0DA7U=; b=QzPjsj7mizNDODN7sqktz05UtUsjETLhGpCvDZHxw7bBNv+IAr7BQqXqUZcfDdRz7Jjjy/ +rXytTD5uWiCgL3NzRzlj+UVsMdqsU8BV4dUvlpPnBJsEkmA2+m4wQRLyytTOplAlhe3NX U2q9KP0YmxY1LFuMbeVO18lC6Y+YlCY= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-339-2z8oyffwM-ifLaSjP4Aiuw-1; Wed, 19 Aug 2020 20:14:27 -0400 X-MC-Unique: 2z8oyffwM-ifLaSjP4Aiuw-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 2C780186A577; Thu, 20 Aug 2020 00:14:26 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id D0AFA60BEC; Thu, 20 Aug 2020 00:14:25 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 47/58] qom: Make type checker functions accept const pointers Date: Wed, 19 Aug 2020 20:12:25 -0400 Message-Id: <20200820001236.1284548-48-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:44 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The existing type check macros all unconditionally drop const qualifiers from their arguments. Keep this behavior in the macros generated by DECLARE_*CHECKER* by now. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: * Removed note about _Generic from commit message, because it won't be possible to do what I was planning without manual #defines --- include/qom/object.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/include/qom/object.h b/include/qom/object.h index 4cd84998c2..1d6a520d35 100644 --- a/include/qom/object.h +++ b/include/qom/object.h @@ -567,7 +567,7 @@ struct Object */ #define DECLARE_INSTANCE_CHECKER(InstanceType, OBJ_NAME, TYPENAME) \ static inline G_GNUC_UNUSED InstanceType * \ - OBJ_NAME(void *obj) \ + OBJ_NAME(const void *obj) \ { return OBJECT_CHECK(InstanceType, obj, TYPENAME); } /** @@ -581,14 +581,16 @@ struct Object * * This macro will provide the three standard type cast functions for a * QOM type. + * + *FIXME: Use _Generic to make this const-safe */ #define DECLARE_CLASS_CHECKERS(ClassType, OBJ_NAME, TYPENAME) \ static inline G_GNUC_UNUSED ClassType * \ - OBJ_NAME##_GET_CLASS(void *obj) \ + OBJ_NAME##_GET_CLASS(const void *obj) \ { return OBJECT_GET_CLASS(ClassType, obj, TYPENAME); } \ \ static inline G_GNUC_UNUSED ClassType * \ - OBJ_NAME##_CLASS(void *klass) \ + OBJ_NAME##_CLASS(const void *klass) \ { return OBJECT_CLASS_CHECK(ClassType, klass, TYPENAME); } /** From patchwork Thu Aug 20 00:12:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E3BBC433E1 for ; Thu, 20 Aug 2020 00:34:11 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 263B62078D for ; Thu, 20 Aug 2020 00:34:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="RewCn6qd" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 263B62078D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:45496 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YWw-0001X8-Cw for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:34:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49940) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YE0-0008UN-5e for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:36 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:33012) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YDy-0002Wz-KD for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:35 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882473; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=D5nUl9M2rvJax/fSSuJ03XAZWGob4bwNdKhi2eFy+jo=; b=RewCn6qdXjn04pJsQFP7gvGgZ0L51gDRHu3zYypTfDvv+aSSC4LbnLlCf+Rq9f90roPgYL Ni/zyzmxzGmDr+DYE5gPlRJn9JQd5mb+MzN29gR+xyn3Gm1j5XSc41T1NiiVS3t4JettPH Z10D13zJjbdoj06XhWZUay9QdvEx13s= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-421-lxQK7SlGPrmjYtFLXu9Txg-1; Wed, 19 Aug 2020 20:14:31 -0400 X-MC-Unique: lxQK7SlGPrmjYtFLXu9Txg-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 19C112FD00 for ; Thu, 20 Aug 2020 00:14:31 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id A3FE760BEC; Thu, 20 Aug 2020 00:14:30 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 50/58] [automated] Delete duplicate QOM typedefs Date: Wed, 19 Aug 2020 20:12:28 -0400 Message-Id: <20200820001236.1284548-51-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=216.205.24.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:51 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=-1, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMDuplicatedTypedefs $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- include/crypto/secret_keyring.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/crypto/secret_keyring.h b/include/crypto/secret_keyring.h index 9f371ad251..4345eb048e 100644 --- a/include/crypto/secret_keyring.h +++ b/include/crypto/secret_keyring.h @@ -39,14 +39,14 @@ typedef struct QCryptoSecretKeyring QCryptoSecretKeyring; typedef struct QCryptoSecretKeyringClass QCryptoSecretKeyringClass; -typedef struct QCryptoSecretKeyring { +struct QCryptoSecretKeyring { QCryptoSecretCommon parent; int32_t serial; -} QCryptoSecretKeyring; +}; -typedef struct QCryptoSecretKeyringClass { +struct QCryptoSecretKeyringClass { QCryptoSecretCommonClass parent; -} QCryptoSecretKeyringClass; +}; #endif /* QCRYPTO_SECRET_KEYRING_H */ From patchwork Thu Aug 20 00:12:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 275472 Return-Path: Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C268C433E1 for ; Thu, 20 Aug 2020 00:36:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3957120885 for ; Thu, 20 Aug 2020 00:36:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="TNQq3Qi5" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3957120885 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:56490 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YZC-00062S-Cc for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:36:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50102) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YEM-00010W-Gh for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:58 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:60439 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YEH-0002Yr-97 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882492; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uBaX2801bapZRFM/ESnmBsc5w2/qU5L3YgONKQVluOc=; b=TNQq3Qi5phAtdf3n2ieMQpYesyrcdXk4sRLEquyMMptoI6IcCMjdCyLkJw+g8U2+ksE/iE FoW5GhEZaoEKefgSjgAit9h9NNZA98sB7cB8gYeisHxi9r3JDnXy1SZp5Y/cCsCjK6cLW7 07mA8Z69GVVqI4RkxysSAGIZJvOLj2Q= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-22-VSGy4mWBMQCYTUHdmiBtGQ-1; Wed, 19 Aug 2020 20:14:33 -0400 X-MC-Unique: VSGy4mWBMQCYTUHdmiBtGQ-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 1E6F31007465 for ; Thu, 20 Aug 2020 00:14:33 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 12C2F5C1D0; Thu, 20 Aug 2020 00:14:31 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 51/58] [automated] Use TYPE_INFO macro Date: Wed, 19 Aug 2020 20:12:29 -0400 Message-Id: <20200820001236.1284548-52-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.003 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/18 23:05:17 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Generated using: $ ./scripts/codeconverter/converter.py -i --passes=2 \ --pattern=TypeRegisterCall,TypeInitMacro $(git grep -l TypeInfo -- '*.[ch]') One notable difference is that files declaring multiple types will now have multiple separate __construtor__ functions declared, instead of one for all types. Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: * Add note about multiple constructor functions to commit message (suggested by Daniel) --- accel/accel.c | 6 +----- accel/kvm/kvm-all.c | 6 +----- accel/qtest.c | 6 +----- accel/tcg/tcg-all.c | 6 +----- accel/xen/xen-all.c | 6 +----- authz/base.c | 6 +----- authz/list.c | 7 +------ authz/listfile.c | 7 +------ authz/pamacct.c | 7 +------ authz/simple.c | 7 +------ backends/cryptodev-builtin.c | 7 +------ backends/cryptodev-vhost-user.c | 7 +------ backends/cryptodev.c | 7 +------ backends/dbus-vmstate.c | 7 +------ backends/hostmem-file.c | 6 +----- backends/hostmem-memfd.c | 2 +- backends/hostmem-ram.c | 6 +----- backends/hostmem.c | 6 +----- backends/rng-builtin.c | 6 +----- backends/rng-egd.c | 6 +----- backends/rng-random.c | 6 +----- backends/rng.c | 6 +----- backends/tpm/tpm_backend.c | 8 ++------ backends/tpm/tpm_emulator.c | 6 +----- backends/tpm/tpm_passthrough.c | 6 +----- backends/vhost-user.c | 6 +----- block/throttle-groups.c | 6 +----- chardev/baum.c | 6 +----- chardev/char-console.c | 6 +----- chardev/char-fd.c | 6 +----- chardev/char-mux.c | 6 +----- chardev/char-null.c | 6 +----- chardev/char-parallel.c | 6 +----- chardev/char-pty.c | 6 +----- chardev/char-ringbuf.c | 8 ++------ chardev/char-socket.c | 6 +----- chardev/char-udp.c | 6 +----- chardev/char-win-stdio.c | 6 +----- chardev/char-win.c | 6 +----- chardev/char.c | 6 +----- chardev/msmouse.c | 6 +----- chardev/spice.c | 10 +++------- chardev/testdev.c | 6 +----- chardev/wctablet.c | 6 +----- crypto/secret.c | 7 +------ crypto/secret_common.c | 7 +------ crypto/secret_keyring.c | 7 +------ crypto/tls-cipher-suites.c | 6 +----- crypto/tlscreds.c | 7 +------ crypto/tlscredsanon.c | 7 +------ crypto/tlscredspsk.c | 7 +------ crypto/tlscredsx509.c | 7 +------ gdbstub.c | 6 +----- hw/9pfs/virtio-9p-device.c | 6 +----- hw/acpi/generic_event_device.c | 6 +----- hw/acpi/piix4.c | 6 +----- hw/acpi/vmgenid.c | 6 +----- hw/adc/stm32f2xx_adc.c | 6 +----- hw/alpha/typhoon.c | 8 ++------ hw/arm/allwinner-a10.c | 6 +----- hw/arm/allwinner-h3.c | 6 +----- hw/arm/armsse.c | 2 +- hw/arm/armv7m.c | 8 ++------ hw/arm/bcm2835_peripherals.c | 6 +----- hw/arm/bcm2836.c | 2 +- hw/arm/boot.c | 6 +----- hw/arm/collie.c | 6 +----- hw/arm/digic.c | 6 +----- hw/arm/exynos4210.c | 6 +----- hw/arm/exynos4_boards.c | 8 ++------ hw/arm/fsl-imx25.c | 6 +----- hw/arm/fsl-imx31.c | 6 +----- hw/arm/fsl-imx6.c | 6 +----- hw/arm/fsl-imx6ul.c | 6 +----- hw/arm/fsl-imx7.c | 6 +----- hw/arm/gumstix.c | 8 ++------ hw/arm/highbank.c | 14 +++----------- hw/arm/integratorcp.c | 10 +++------- hw/arm/microbit.c | 6 +----- hw/arm/mps2-tz.c | 10 +++------- hw/arm/mps2.c | 10 +++------- hw/arm/msf2-soc.c | 6 +----- hw/arm/musca.c | 10 +++------- hw/arm/musicpal.c | 22 +++++++++------------- hw/arm/nrf51_soc.c | 6 +----- hw/arm/nseries.c | 8 ++------ hw/arm/omap_sx1.c | 8 ++------ hw/arm/palm.c | 6 +----- hw/arm/pxa2xx.c | 14 +++++--------- hw/arm/pxa2xx_gpio.c | 6 +----- hw/arm/pxa2xx_pic.c | 6 +----- hw/arm/realview.c | 12 ++++-------- hw/arm/sbsa-ref.c | 6 +----- hw/arm/smmu-common.c | 6 +----- hw/arm/spitz.c | 28 ++++++++++------------------ hw/arm/stellaris.c | 18 +++++------------- hw/arm/stm32f205_soc.c | 6 +----- hw/arm/stm32f405_soc.c | 6 +----- hw/arm/strongarm.c | 16 ++++++---------- hw/arm/tosa.c | 10 +++------- hw/arm/versatilepb.c | 14 +++----------- hw/arm/vexpress.c | 10 +++------- hw/arm/virt.c | 6 +----- hw/arm/xilinx_zynq.c | 6 +----- hw/arm/xlnx-versal-virt.c | 6 +----- hw/arm/xlnx-versal.c | 6 +----- hw/arm/xlnx-zcu102.c | 6 +----- hw/arm/xlnx-zynqmp.c | 6 +----- hw/audio/cs4231.c | 6 +----- hw/audio/hda-codec.c | 12 ++++-------- hw/audio/intel-hda.c | 10 +++++----- hw/audio/marvell_88w8618.c | 6 +----- hw/audio/milkymist-ac97.c | 6 +----- hw/audio/pcspk.c | 2 +- hw/audio/pl041.c | 6 +----- hw/audio/wm8750.c | 6 +----- hw/block/fdc.c | 16 ++++++---------- hw/block/m25p80.c | 2 +- hw/block/nand.c | 6 +----- hw/block/nvme.c | 6 +----- hw/block/onenand.c | 6 +----- hw/block/pflash_cfi01.c | 6 +----- hw/block/pflash_cfi02.c | 6 +----- hw/block/swim.c | 10 +++------- hw/block/vhost-user-blk.c | 6 +----- hw/block/virtio-blk.c | 6 +----- hw/block/xen-block.c | 10 +++------- hw/char/avr_usart.c | 6 +----- hw/char/bcm2835_aux.c | 6 +----- hw/char/cadence_uart.c | 6 +----- hw/char/cmsdk-apb-uart.c | 6 +----- hw/char/debugcon.c | 6 +----- hw/char/digic-uart.c | 6 +----- hw/char/escc.c | 6 +----- hw/char/etraxfs_ser.c | 6 +----- hw/char/exynos4210_uart.c | 6 +----- hw/char/grlib_apbuart.c | 6 +----- hw/char/ibex_uart.c | 6 +----- hw/char/imx_serial.c | 6 +----- hw/char/ipoctal232.c | 6 +----- hw/char/lm32_juart.c | 6 +----- hw/char/lm32_uart.c | 6 +----- hw/char/mcf_uart.c | 6 +----- hw/char/milkymist-uart.c | 6 +----- hw/char/nrf51_uart.c | 6 +----- hw/char/parallel.c | 6 +----- hw/char/pl011.c | 8 ++------ hw/char/renesas_sci.c | 6 +----- hw/char/sclpconsole-lm.c | 6 +----- hw/char/sclpconsole.c | 6 +----- hw/char/serial-isa.c | 6 +----- hw/char/serial-pci-multi.c | 8 ++------ hw/char/serial-pci.c | 6 +----- hw/char/serial.c | 10 +++------- hw/char/spapr_vty.c | 2 +- hw/char/stm32f2xx_usart.c | 6 +----- hw/char/terminal3270.c | 6 +----- hw/char/virtio-console.c | 8 ++------ hw/char/virtio-serial-bus.c | 10 +++------- hw/char/xilinx_uartlite.c | 6 +----- hw/core/bus.c | 6 +----- hw/core/clock.c | 6 +----- hw/core/cpu.c | 6 +----- hw/core/fw-path-provider.c | 6 +----- hw/core/generic-loader.c | 6 +----- hw/core/hotplug.c | 6 +----- hw/core/irq.c | 6 +----- hw/core/machine.c | 6 +----- hw/core/nmi.c | 6 +----- hw/core/or-irq.c | 6 +----- hw/core/platform-bus.c | 6 +----- hw/core/qdev.c | 6 +----- hw/core/register.c | 6 +----- hw/core/resettable.c | 6 +----- hw/core/split-irq.c | 6 +----- hw/core/stream.c | 6 +----- hw/core/sysbus.c | 8 ++------ hw/core/vmstate-if.c | 6 +----- hw/cpu/a15mpcore.c | 6 +----- hw/cpu/a9mpcore.c | 6 +----- hw/cpu/arm11mpcore.c | 6 +----- hw/cpu/cluster.c | 6 +----- hw/cpu/core.c | 6 +----- hw/cpu/realview_mpcore.c | 6 +----- hw/display/ads7846.c | 6 +----- hw/display/artist.c | 6 +----- hw/display/ati.c | 6 +----- hw/display/bcm2835_fb.c | 6 +----- hw/display/bochs-display.c | 6 +----- hw/display/cg3.c | 6 +----- hw/display/cirrus_vga.c | 6 +----- hw/display/cirrus_vga_isa.c | 6 +----- hw/display/dpcd.c | 6 +----- hw/display/exynos4210_fimd.c | 6 +----- hw/display/g364fb.c | 6 +----- hw/display/i2c-ddc.c | 6 +----- hw/display/jazz_led.c | 6 +----- hw/display/macfb.c | 8 ++------ hw/display/milkymist-tmu2.c | 6 +----- hw/display/milkymist-vgafb.c | 6 +----- hw/display/next-fb.c | 6 +----- hw/display/pl110.c | 10 +++------- hw/display/qxl.c | 10 +++------- hw/display/ramfb-standalone.c | 6 +----- hw/display/sii9022.c | 6 +----- hw/display/sm501.c | 8 ++------ hw/display/ssd0303.c | 6 +----- hw/display/ssd0323.c | 6 +----- hw/display/tcx.c | 6 +----- hw/display/vga-isa.c | 6 +----- hw/display/vga-pci.c | 10 +++------- hw/display/vhost-user-gpu.c | 6 +----- hw/display/virtio-gpu-base.c | 7 +------ hw/display/virtio-gpu-pci.c | 2 +- hw/display/virtio-gpu.c | 6 +----- hw/display/virtio-vga.c | 2 +- hw/display/vmware_vga.c | 6 +----- hw/display/xlnx_dp.c | 6 +----- hw/dma/bcm2835_dma.c | 6 +----- hw/dma/i82374.c | 6 +----- hw/dma/i8257.c | 6 +----- hw/dma/pl080.c | 8 ++------ hw/dma/pl330.c | 6 +----- hw/dma/puv3_dma.c | 6 +----- hw/dma/pxa2xx_dma.c | 6 +----- hw/dma/rc4030.c | 8 ++------ hw/dma/sparc32_dma.c | 12 ++++-------- hw/dma/xilinx_axidma.c | 10 +++------- hw/dma/xlnx-zdma.c | 6 +----- hw/dma/xlnx-zynq-devcfg.c | 6 +----- hw/dma/xlnx_dpdma.c | 6 +----- hw/gpio/aspeed_gpio.c | 14 +++++--------- hw/gpio/bcm2835_gpio.c | 6 +----- hw/gpio/gpio_key.c | 6 +----- hw/gpio/imx_gpio.c | 6 +----- hw/gpio/max7310.c | 6 +----- hw/gpio/mpc8xxx.c | 6 +----- hw/gpio/nrf51_gpio.c | 6 +----- hw/gpio/omap_gpio.c | 8 ++------ hw/gpio/pl061.c | 8 ++------ hw/gpio/puv3_gpio.c | 6 +----- hw/gpio/zaurus.c | 6 +----- hw/hppa/dino.c | 6 +----- hw/hppa/lasi.c | 6 +----- hw/hyperv/hyperv.c | 6 +----- hw/hyperv/hyperv_testdev.c | 6 +----- hw/hyperv/vmbus.c | 10 +++------- hw/i2c/aspeed_i2c.c | 12 ++++-------- hw/i2c/bitbang_i2c.c | 6 +----- hw/i2c/core.c | 8 ++------ hw/i2c/exynos4210_i2c.c | 6 +----- hw/i2c/imx_i2c.c | 6 +----- hw/i2c/microbit_i2c.c | 6 +----- hw/i2c/mpc_i2c.c | 6 +----- hw/i2c/omap_i2c.c | 6 +----- hw/i2c/ppc4xx_i2c.c | 6 +----- hw/i2c/smbus_eeprom.c | 6 +----- hw/i2c/smbus_ich9.c | 6 +----- hw/i2c/smbus_slave.c | 6 +----- hw/i2c/versatile_i2c.c | 6 +----- hw/i386/amd_iommu.c | 10 +++------- hw/i386/intel_iommu.c | 8 ++------ hw/i386/kvm/apic.c | 6 +----- hw/i386/kvm/clock.c | 6 +----- hw/i386/kvm/i8254.c | 6 +----- hw/i386/kvm/i8259.c | 6 +----- hw/i386/kvm/ioapic.c | 6 +----- hw/i386/kvmvapic.c | 6 +----- hw/i386/microvm.c | 6 +----- hw/i386/pc.c | 6 +----- hw/i386/pc_piix.c | 6 +----- hw/i386/port92.c | 6 +----- hw/i386/vmmouse.c | 6 +----- hw/i386/vmport.c | 6 +----- hw/i386/x86-iommu.c | 6 +----- hw/i386/x86.c | 6 +----- hw/i386/xen/xen_apic.c | 6 +----- hw/i386/xen/xen_platform.c | 6 +----- hw/i386/xen/xen_pvdevice.c | 6 +----- hw/ide/ahci-allwinner.c | 6 +----- hw/ide/ahci.c | 6 +----- hw/ide/cmd646.c | 6 +----- hw/ide/ich.c | 6 +----- hw/ide/isa.c | 6 +----- hw/ide/macio.c | 6 +----- hw/ide/microdrive.c | 8 ++------ hw/ide/mmio.c | 6 +----- hw/ide/pci.c | 6 +----- hw/ide/piix.c | 10 +++------- hw/ide/qdev.c | 14 +++++--------- hw/ide/sii3112.c | 6 +----- hw/ide/via.c | 6 +----- hw/input/adb-kbd.c | 6 +----- hw/input/adb-mouse.c | 6 +----- hw/input/adb.c | 8 ++------ hw/input/lm832x.c | 6 +----- hw/input/milkymist-softusb.c | 6 +----- hw/input/pckbd.c | 6 +----- hw/input/pl050.c | 10 +++------- hw/input/vhost-user-input.c | 6 +----- hw/input/virtio-input-hid.c | 12 ++++-------- hw/input/virtio-input-host.c | 6 +----- hw/input/virtio-input.c | 6 +----- hw/intc/allwinner-a10-pic.c | 6 +----- hw/intc/apic.c | 6 +----- hw/intc/apic_common.c | 6 +----- hw/intc/arm_gic.c | 6 +----- hw/intc/arm_gic_common.c | 6 +----- hw/intc/arm_gic_kvm.c | 6 +----- hw/intc/arm_gicv2m.c | 6 +----- hw/intc/arm_gicv3.c | 6 +----- hw/intc/arm_gicv3_common.c | 6 +----- hw/intc/arm_gicv3_its_common.c | 6 +----- hw/intc/arm_gicv3_its_kvm.c | 6 +----- hw/intc/arm_gicv3_kvm.c | 6 +----- hw/intc/armv7m_nvic.c | 6 +----- hw/intc/aspeed_vic.c | 6 +----- hw/intc/bcm2835_ic.c | 6 +----- hw/intc/bcm2836_control.c | 6 +----- hw/intc/etraxfs_pic.c | 6 +----- hw/intc/exynos4210_combiner.c | 6 +----- hw/intc/exynos4210_gic.c | 12 ++---------- hw/intc/grlib_irqmp.c | 6 +----- hw/intc/heathrow_pic.c | 6 +----- hw/intc/i8259.c | 6 +----- hw/intc/i8259_common.c | 6 +----- hw/intc/ibex_plic.c | 6 +----- hw/intc/imx_avic.c | 6 +----- hw/intc/imx_gpcv2.c | 6 +----- hw/intc/intc.c | 6 +----- hw/intc/ioapic.c | 6 +----- hw/intc/ioapic_common.c | 6 +----- hw/intc/lm32_pic.c | 6 +----- hw/intc/loongson_liointc.c | 6 +----- hw/intc/mips_gic.c | 6 +----- hw/intc/nios2_iic.c | 6 +----- hw/intc/omap_intc.c | 10 +++------- hw/intc/ompic.c | 6 +----- hw/intc/openpic.c | 6 +----- hw/intc/openpic_kvm.c | 6 +----- hw/intc/pl190.c | 6 +----- hw/intc/pnv_xive.c | 6 +----- hw/intc/puv3_intc.c | 6 +----- hw/intc/realview_gic.c | 6 +----- hw/intc/rx_icu.c | 6 +----- hw/intc/s390_flic.c | 8 ++------ hw/intc/s390_flic_kvm.c | 6 +----- hw/intc/slavio_intctl.c | 6 +----- hw/intc/spapr_xive.c | 6 +----- hw/intc/xics.c | 10 +++------- hw/intc/xics_pnv.c | 6 +----- hw/intc/xics_spapr.c | 6 +----- hw/intc/xilinx_intc.c | 6 +----- hw/intc/xive.c | 18 +++++++----------- hw/intc/xlnx-pmu-iomod-intc.c | 6 +----- hw/intc/xlnx-zynqmp-ipi.c | 6 +----- hw/ipack/ipack.c | 8 ++------ hw/ipack/tpci200.c | 6 +----- hw/ipmi/ipmi.c | 8 ++------ hw/ipmi/ipmi_bmc_sim.c | 6 +----- hw/ipmi/isa_ipmi_bt.c | 6 +----- hw/ipmi/isa_ipmi_kcs.c | 6 +----- hw/ipmi/pci_ipmi_bt.c | 6 +----- hw/ipmi/pci_ipmi_kcs.c | 6 +----- hw/ipmi/smbus_ipmi.c | 6 +----- hw/isa/i82378.c | 6 +----- hw/isa/isa-bus.c | 12 ++++-------- hw/isa/isa-superio.c | 8 ++------ hw/isa/lpc_ich9.c | 6 +----- hw/isa/pc87312.c | 6 +----- hw/isa/piix3.c | 10 +++------- hw/isa/piix4.c | 6 +----- hw/isa/smc37c669-superio.c | 6 +----- hw/isa/vt82c686.c | 14 +++++--------- hw/lm32/lm32_boards.c | 8 ++------ hw/m68k/mcf_intc.c | 6 +----- hw/m68k/next-cube.c | 6 +----- hw/m68k/next-kbd.c | 6 +----- hw/m68k/q800.c | 6 +----- hw/mem/memory-device.c | 6 +----- hw/mem/nvdimm.c | 6 +----- hw/mem/pc-dimm.c | 6 +----- hw/microblaze/xlnx-zynqmp-pmu.c | 6 +----- hw/mips/boston.c | 6 +----- hw/mips/cps.c | 6 +----- hw/mips/gt64xxx_pci.c | 8 ++------ hw/mips/jazz.c | 8 ++------ hw/mips/malta.c | 6 +----- hw/misc/a9scu.c | 6 +----- hw/misc/allwinner-cpucfg.c | 6 +----- hw/misc/allwinner-h3-ccu.c | 6 +----- hw/misc/allwinner-h3-dramc.c | 6 +----- hw/misc/allwinner-h3-sysctrl.c | 6 +----- hw/misc/allwinner-sid.c | 6 +----- hw/misc/applesmc.c | 6 +----- hw/misc/arm11scu.c | 6 +----- hw/misc/arm_integrator_debug.c | 6 +----- hw/misc/arm_l2x0.c | 6 +----- hw/misc/arm_sysctl.c | 6 +----- hw/misc/armsse-cpuid.c | 6 +----- hw/misc/armsse-mhu.c | 6 +----- hw/misc/aspeed_scu.c | 12 ++++-------- hw/misc/aspeed_sdmc.c | 12 ++++-------- hw/misc/aspeed_xdma.c | 6 +----- hw/misc/auxbus.c | 10 +++------- hw/misc/avr_power.c | 6 +----- hw/misc/bcm2835_mbox.c | 6 +----- hw/misc/bcm2835_mphi.c | 6 +----- hw/misc/bcm2835_property.c | 6 +----- hw/misc/bcm2835_rng.c | 6 +----- hw/misc/bcm2835_thermal.c | 6 +----- hw/misc/debugexit.c | 6 +----- hw/misc/eccmemctl.c | 6 +----- hw/misc/empty_slot.c | 6 +----- hw/misc/exynos4210_clk.c | 2 +- hw/misc/exynos4210_pmu.c | 6 +----- hw/misc/exynos4210_rng.c | 6 +----- hw/misc/grlib_ahb_apb_pnp.c | 8 ++------ hw/misc/imx25_ccm.c | 6 +----- hw/misc/imx31_ccm.c | 6 +----- hw/misc/imx6_ccm.c | 6 +----- hw/misc/imx6_src.c | 6 +----- hw/misc/imx6ul_ccm.c | 6 +----- hw/misc/imx7_ccm.c | 8 ++------ hw/misc/imx7_gpr.c | 6 +----- hw/misc/imx7_snvs.c | 6 +----- hw/misc/imx_ccm.c | 6 +----- hw/misc/imx_rngc.c | 6 +----- hw/misc/iotkit-secctl.c | 6 +----- hw/misc/iotkit-sysctl.c | 6 +----- hw/misc/iotkit-sysinfo.c | 6 +----- hw/misc/ivshmem.c | 10 +++------- hw/misc/mac_via.c | 10 +++------- hw/misc/macio/cuda.c | 8 ++------ hw/misc/macio/gpio.c | 6 +----- hw/misc/macio/mac_dbdma.c | 6 +----- hw/misc/macio/macio.c | 12 ++++-------- hw/misc/macio/pmu.c | 8 ++------ hw/misc/max111x.c | 10 +++------- hw/misc/milkymist-hpdmc.c | 6 +----- hw/misc/milkymist-pfpu.c | 6 +----- hw/misc/mips_cmgcr.c | 6 +----- hw/misc/mips_cpc.c | 6 +----- hw/misc/mips_itu.c | 6 +----- hw/misc/mos6522.c | 6 +----- hw/misc/mps2-fpgaio.c | 6 +----- hw/misc/mps2-scc.c | 6 +----- hw/misc/msf2-sysreg.c | 6 +----- hw/misc/mst_fpga.c | 6 +----- hw/misc/nrf51_rng.c | 6 +----- hw/misc/pc-testdev.c | 6 +----- hw/misc/pca9552.c | 8 ++------ hw/misc/pci-testdev.c | 6 +----- hw/misc/puv3_pm.c | 6 +----- hw/misc/pvpanic.c | 6 +----- hw/misc/sga.c | 6 +----- hw/misc/slavio_misc.c | 8 ++------ hw/misc/stm32f2xx_syscfg.c | 6 +----- hw/misc/stm32f4xx_exti.c | 6 +----- hw/misc/stm32f4xx_syscfg.c | 6 +----- hw/misc/tmp105.c | 6 +----- hw/misc/tmp421.c | 2 +- hw/misc/tz-mpc.c | 8 ++------ hw/misc/tz-msc.c | 6 +----- hw/misc/tz-ppc.c | 6 +----- hw/misc/unimp.c | 6 +----- hw/misc/vmcoreinfo.c | 6 +----- hw/misc/zynq-xadc.c | 6 +----- hw/misc/zynq_slcr.c | 6 +----- hw/net/allwinner-sun8i-emac.c | 6 +----- hw/net/allwinner_emac.c | 6 +----- hw/net/cadence_gem.c | 6 +----- hw/net/can/can_kvaser_pci.c | 6 +----- hw/net/can/can_mioe3680_pci.c | 6 +----- hw/net/can/can_pcm3680_pci.c | 6 +----- hw/net/dp8393x.c | 6 +----- hw/net/e1000.c | 2 +- hw/net/e1000e.c | 6 +----- hw/net/etraxfs_eth.c | 6 +----- hw/net/fsl_etsec/etsec.c | 6 +----- hw/net/ftgmac100.c | 8 ++------ hw/net/imx_fec.c | 8 ++------ hw/net/lan9118.c | 6 +----- hw/net/lance.c | 6 +----- hw/net/lasi_i82596.c | 6 +----- hw/net/mcf_fec.c | 6 +----- hw/net/milkymist-minimac2.c | 6 +----- hw/net/mipsnet.c | 6 +----- hw/net/msf2-emac.c | 6 +----- hw/net/ne2000-isa.c | 6 +----- hw/net/ne2000-pci.c | 6 +----- hw/net/opencores_eth.c | 6 +----- hw/net/pcnet-pci.c | 6 +----- hw/net/rocker/rocker.c | 6 +----- hw/net/rtl8139.c | 6 +----- hw/net/smc91c111.c | 6 +----- hw/net/spapr_llan.c | 2 +- hw/net/stellaris_enet.c | 6 +----- hw/net/sungem.c | 6 +----- hw/net/sunhme.c | 6 +----- hw/net/tulip.c | 6 +----- hw/net/virtio-net.c | 6 +----- hw/net/vmxnet3.c | 2 +- hw/net/xgmac.c | 6 +----- hw/net/xilinx_axienet.c | 10 +++------- hw/net/xilinx_ethlite.c | 6 +----- hw/nubus/mac-nubus-bridge.c | 6 +----- hw/nubus/nubus-bridge.c | 6 +----- hw/nubus/nubus-bus.c | 6 +----- hw/nubus/nubus-device.c | 6 +----- hw/nvram/ds1225y.c | 6 +----- hw/nvram/eeprom_at24c.c | 6 +----- hw/nvram/fw_cfg.c | 12 ++++-------- hw/nvram/mac_nvram.c | 6 +----- hw/nvram/nrf51_nvm.c | 6 +----- hw/nvram/spapr_nvram.c | 6 +----- hw/pci-bridge/dec.c | 10 +++------- hw/pci-bridge/i82801b11.c | 6 +----- hw/pci-bridge/ioh3420.c | 6 +----- hw/pci-bridge/pci_bridge_dev.c | 8 ++------ hw/pci-bridge/pci_expander_bridge.c | 14 +++++--------- hw/pci-bridge/pcie_pci_bridge.c | 6 +----- hw/pci-bridge/pcie_root_port.c | 6 +----- hw/pci-bridge/simba.c | 6 +----- hw/pci-bridge/xio3130_downstream.c | 6 +----- hw/pci-bridge/xio3130_upstream.c | 6 +----- hw/pci-host/bonito.c | 8 ++------ hw/pci-host/designware.c | 8 ++------ hw/pci-host/gpex.c | 8 ++------ hw/pci-host/grackle.c | 8 ++------ hw/pci-host/i440fx.c | 8 ++------ hw/pci-host/pnv_phb3.c | 12 ++++-------- hw/pci-host/pnv_phb3_msi.c | 6 +----- hw/pci-host/pnv_phb3_pbcq.c | 6 +----- hw/pci-host/pnv_phb4.c | 12 ++++-------- hw/pci-host/pnv_phb4_pec.c | 8 ++------ hw/pci-host/ppce500.c | 8 ++------ hw/pci-host/prep.c | 8 ++------ hw/pci-host/q35.c | 8 ++------ hw/pci-host/sabre.c | 8 ++------ hw/pci-host/uninorth.c | 18 +++++++++--------- hw/pci-host/versatile.c | 10 +++------- hw/pci-host/xen_igd_pt.c | 6 +----- hw/pci-host/xilinx-pcie.c | 8 ++------ hw/pci/pci.c | 14 +++++--------- hw/pci/pci_bridge.c | 6 +----- hw/pci/pci_host.c | 6 +----- hw/pci/pcie_host.c | 6 +----- hw/pci/pcie_port.c | 8 ++------ hw/pcmcia/pcmcia.c | 6 +----- hw/pcmcia/pxa2xx.c | 6 +----- hw/ppc/e500.c | 8 ++------ hw/ppc/e500plat.c | 6 +----- hw/ppc/mac_newworld.c | 6 +----- hw/ppc/mac_oldworld.c | 6 +----- hw/ppc/mpc8544_guts.c | 6 +----- hw/ppc/mpc8544ds.c | 6 +----- hw/ppc/pnv_core.c | 6 +----- hw/ppc/pnv_homer.c | 10 +++------- hw/ppc/pnv_lpc.c | 12 ++++-------- hw/ppc/pnv_occ.c | 10 +++------- hw/ppc/pnv_pnor.c | 6 +----- hw/ppc/pnv_psi.c | 12 ++++-------- hw/ppc/pnv_xscom.c | 6 +----- hw/ppc/ppc405_boards.c | 8 ++------ hw/ppc/ppc440_pcix.c | 6 +----- hw/ppc/ppc440_uc.c | 6 +----- hw/ppc/ppc4xx_pci.c | 8 ++------ hw/ppc/ppce500_spin.c | 6 +----- hw/ppc/prep_systemio.c | 6 +----- hw/ppc/rs6000_mc.c | 6 +----- hw/ppc/spapr.c | 6 +----- hw/ppc/spapr_drc.c | 16 ++++++++-------- hw/ppc/spapr_iommu.c | 8 ++------ hw/ppc/spapr_irq.c | 6 +----- hw/ppc/spapr_pci.c | 6 +----- hw/ppc/spapr_rng.c | 6 +----- hw/ppc/spapr_rtc.c | 6 +----- hw/ppc/spapr_tpm_proxy.c | 2 +- hw/ppc/spapr_vio.c | 10 +++------- hw/rdma/rdma.c | 6 +----- hw/rdma/vmw/pvrdma_main.c | 6 +----- hw/riscv/opentitan.c | 6 +----- hw/riscv/riscv_hart.c | 6 +----- hw/riscv/sifive_clint.c | 6 +----- hw/riscv/sifive_e.c | 12 ++---------- hw/riscv/sifive_e_prci.c | 6 +----- hw/riscv/sifive_gpio.c | 6 +----- hw/riscv/sifive_plic.c | 6 +----- hw/riscv/sifive_test.c | 6 +----- hw/riscv/sifive_u.c | 12 ++---------- hw/riscv/sifive_u_otp.c | 6 +----- hw/riscv/sifive_u_prci.c | 6 +----- hw/riscv/virt.c | 6 +----- hw/rtc/allwinner-rtc.c | 12 ++++-------- hw/rtc/aspeed_rtc.c | 6 +----- hw/rtc/ds1338.c | 6 +----- hw/rtc/exynos4210_rtc.c | 6 +----- hw/rtc/goldfish_rtc.c | 6 +----- hw/rtc/m41t80.c | 6 +----- hw/rtc/m48t59-isa.c | 2 +- hw/rtc/m48t59.c | 4 ++-- hw/rtc/mc146818rtc.c | 6 +----- hw/rtc/pl031.c | 6 +----- hw/rtc/sun4v-rtc.c | 6 +----- hw/rtc/twl92230.c | 6 +----- hw/rtc/xlnx-zynqmp-rtc.c | 6 +----- hw/s390x/3270-ccw.c | 6 +----- hw/s390x/ap-bridge.c | 8 ++------ hw/s390x/ap-device.c | 6 +----- hw/s390x/ccw-device.c | 6 +----- hw/s390x/css-bridge.c | 8 ++------ hw/s390x/event-facility.c | 10 +++------- hw/s390x/ipl.c | 6 +----- hw/s390x/s390-ccw.c | 6 +----- hw/s390x/s390-pci-bus.c | 14 +++++--------- hw/s390x/s390-skeys-kvm.c | 6 +----- hw/s390x/s390-skeys.c | 8 ++------ hw/s390x/s390-stattrib-kvm.c | 6 +----- hw/s390x/s390-stattrib.c | 8 ++------ hw/s390x/s390-virtio-ccw.c | 6 +----- hw/s390x/sclp.c | 6 +----- hw/s390x/sclpcpu.c | 6 +----- hw/s390x/sclpquiesce.c | 6 +----- hw/s390x/tod-kvm.c | 6 +----- hw/s390x/tod-qemu.c | 6 +----- hw/s390x/tod.c | 6 +----- hw/s390x/vhost-vsock-ccw.c | 6 +----- hw/s390x/virtio-ccw-9p.c | 6 +----- hw/s390x/virtio-ccw-balloon.c | 6 +----- hw/s390x/virtio-ccw-blk.c | 6 +----- hw/s390x/virtio-ccw-crypto.c | 6 +----- hw/s390x/virtio-ccw-gpu.c | 6 +----- hw/s390x/virtio-ccw-input.c | 14 +++++--------- hw/s390x/virtio-ccw-net.c | 6 +----- hw/s390x/virtio-ccw-rng.c | 6 +----- hw/s390x/virtio-ccw-scsi.c | 4 ++-- hw/s390x/virtio-ccw-serial.c | 6 +----- hw/s390x/virtio-ccw.c | 8 ++------ hw/scsi/esp-pci.c | 8 ++------ hw/scsi/esp.c | 6 +----- hw/scsi/lsi53c895a.c | 8 ++------ hw/scsi/megasas.c | 2 +- hw/scsi/scsi-bus.c | 8 ++------ hw/scsi/scsi-disk.c | 10 +++++----- hw/scsi/scsi-generic.c | 6 +----- hw/scsi/spapr_vscsi.c | 6 +----- hw/scsi/vhost-scsi-common.c | 6 +----- hw/scsi/vhost-scsi.c | 6 +----- hw/scsi/vhost-user-scsi.c | 6 +----- hw/scsi/virtio-scsi.c | 8 ++------ hw/scsi/vmw_pvscsi.c | 7 +------ hw/sd/allwinner-sdhost.c | 12 ++++-------- hw/sd/aspeed_sdhci.c | 6 +----- hw/sd/bcm2835_sdhost.c | 8 ++------ hw/sd/core.c | 6 +----- hw/sd/milkymist-memcard.c | 6 +----- hw/sd/pl181.c | 6 +----- hw/sd/pxa2xx_mmci.c | 8 ++------ hw/sd/sd.c | 6 +----- hw/sd/sdhci-pci.c | 6 +----- hw/sd/sdhci.c | 12 ++++-------- hw/sd/ssi-sd.c | 6 +----- hw/sh4/sh_pci.c | 8 ++------ hw/sparc/sun4m.c | 28 ++++++++++++++-------------- hw/sparc/sun4m_iommu.c | 8 ++------ hw/sparc64/niagara.c | 6 +----- hw/sparc64/sun4u.c | 12 ++++++------ hw/sparc64/sun4u_iommu.c | 8 ++------ hw/ssi/aspeed_smc.c | 2 +- hw/ssi/imx_spi.c | 6 +----- hw/ssi/mss-spi.c | 6 +----- hw/ssi/pl022.c | 6 +----- hw/ssi/ssi.c | 8 ++------ hw/ssi/stm32f2xx_spi.c | 6 +----- hw/ssi/xilinx_spi.c | 6 +----- hw/ssi/xilinx_spips.c | 10 +++------- hw/timer/a9gtimer.c | 6 +----- hw/timer/allwinner-a10-pit.c | 6 +----- hw/timer/altera_timer.c | 6 +----- hw/timer/arm_mptimer.c | 6 +----- hw/timer/arm_timer.c | 8 ++------ hw/timer/armv7m_systick.c | 6 +----- hw/timer/aspeed_timer.c | 12 ++++-------- hw/timer/avr_timer16.c | 6 +----- hw/timer/bcm2835_systmr.c | 6 +----- hw/timer/cadence_ttc.c | 6 +----- hw/timer/cmsdk-apb-dualtimer.c | 6 +----- hw/timer/cmsdk-apb-timer.c | 6 +----- hw/timer/digic-timer.c | 6 +----- hw/timer/etraxfs_timer.c | 6 +----- hw/timer/exynos4210_mct.c | 6 +----- hw/timer/exynos4210_pwm.c | 6 +----- hw/timer/grlib_gptimer.c | 6 +----- hw/timer/hpet.c | 6 +----- hw/timer/i8254.c | 6 +----- hw/timer/i8254_common.c | 6 +----- hw/timer/imx_epit.c | 6 +----- hw/timer/imx_gpt.c | 12 ++++-------- hw/timer/lm32_timer.c | 6 +----- hw/timer/milkymist-sysctl.c | 6 +----- hw/timer/mss-timer.c | 6 +----- hw/timer/nrf51_timer.c | 6 +----- hw/timer/puv3_ost.c | 6 +----- hw/timer/pxa2xx_timer.c | 10 +++------- hw/timer/renesas_cmt.c | 6 +----- hw/timer/renesas_tmr.c | 6 +----- hw/timer/slavio_timer.c | 6 +----- hw/timer/stm32f2xx_timer.c | 6 +----- hw/timer/xilinx_timer.c | 6 +----- hw/tpm/tpm_crb.c | 6 +----- hw/tpm/tpm_spapr.c | 6 +----- hw/tpm/tpm_tis_isa.c | 6 +----- hw/tpm/tpm_tis_sysbus.c | 6 +----- hw/usb/bus.c | 8 ++------ hw/usb/ccid-card-emulated.c | 6 +----- hw/usb/ccid-card-passthru.c | 6 +----- hw/usb/chipidea.c | 6 +----- hw/usb/dev-audio.c | 2 +- hw/usb/dev-hid.c | 8 ++++---- hw/usb/dev-hub.c | 6 +----- hw/usb/dev-mtp.c | 6 +----- hw/usb/dev-network.c | 6 +----- hw/usb/dev-serial.c | 6 +++--- hw/usb/dev-smartcard-reader.c | 6 +++--- hw/usb/dev-storage.c | 10 +++------- hw/usb/dev-uas.c | 6 +----- hw/usb/dev-wacom.c | 2 +- hw/usb/hcd-dwc2.c | 6 +----- hw/usb/hcd-ehci-pci.c | 2 +- hw/usb/hcd-ehci-sysbus.c | 18 +++++++----------- hw/usb/hcd-ohci-pci.c | 6 +----- hw/usb/hcd-ohci.c | 6 +----- hw/usb/hcd-uhci.c | 2 +- hw/usb/hcd-xhci-nec.c | 6 +----- hw/usb/hcd-xhci.c | 8 ++------ hw/usb/host-libusb.c | 6 +----- hw/usb/imx-usb-phy.c | 6 +----- hw/usb/redirect.c | 6 +----- hw/usb/tusb6010.c | 6 +----- hw/vfio/amd-xgbe.c | 6 +----- hw/vfio/ap.c | 6 +----- hw/vfio/calxeda-xgmac.c | 6 +----- hw/vfio/ccw.c | 6 +----- hw/vfio/igd.c | 6 +----- hw/vfio/pci.c | 8 ++------ hw/vfio/platform.c | 6 +----- hw/virtio/vhost-user-fs.c | 6 +----- hw/virtio/vhost-user-vsock.c | 6 +----- hw/virtio/vhost-vsock-common.c | 6 +----- hw/virtio/vhost-vsock.c | 6 +----- hw/virtio/virtio-balloon.c | 6 +----- hw/virtio/virtio-bus.c | 6 +----- hw/virtio/virtio-crypto.c | 6 +----- hw/virtio/virtio-input-pci.c | 4 ++-- hw/virtio/virtio-iommu.c | 8 ++------ hw/virtio/virtio-mem.c | 6 +----- hw/virtio/virtio-mmio.c | 8 ++------ hw/virtio/virtio-pci.c | 4 ++-- hw/virtio/virtio-pmem.c | 6 +----- hw/virtio/virtio-rng.c | 6 +----- hw/virtio/virtio.c | 6 +----- hw/watchdog/cmsdk-apb-watchdog.c | 8 ++------ hw/watchdog/wdt_aspeed.c | 8 ++++---- hw/watchdog/wdt_diag288.c | 2 +- hw/watchdog/wdt_i6300esb.c | 2 +- hw/watchdog/wdt_ib700.c | 2 +- hw/watchdog/wdt_imx2.c | 2 +- hw/xen/xen-bus.c | 10 +++------- hw/xen/xen-legacy-backend.c | 10 +++------- hw/xen/xen_pt.c | 6 +----- hw/xtensa/xtfpga.c | 20 ++++++++------------ io/channel-buffer.c | 6 +----- io/channel-command.c | 6 +----- io/channel-file.c | 6 +----- io/channel-socket.c | 6 +----- io/channel-tls.c | 6 +----- io/channel-websock.c | 6 +----- io/channel.c | 6 +----- io/dns-resolver.c | 6 +----- io/net-listener.c | 6 +----- iothread.c | 6 +----- migration/migration.c | 6 +----- migration/rdma.c | 6 +----- net/can/can_core.c | 6 +----- net/can/can_host.c | 6 +----- net/can/can_socketcan.c | 6 +----- net/colo-compare.c | 6 +----- net/dump.c | 6 +----- net/filter-buffer.c | 6 +----- net/filter-mirror.c | 8 ++------ net/filter-replay.c | 6 +----- net/filter-rewriter.c | 6 +----- net/filter.c | 6 +----- qom/container.c | 6 +----- scsi/pr-manager-helper.c | 6 +----- scsi/pr-manager.c | 7 +------ softmmu/memory.c | 8 ++------ target/arm/cpu.c | 4 ++-- target/arm/cpu64.c | 2 +- target/hppa/cpu.c | 6 +----- target/i386/cpu.c | 8 ++++---- target/i386/hax-all.c | 6 +----- target/i386/hvf/hvf.c | 6 +----- target/i386/sev.c | 7 +------ target/i386/whpx-all.c | 6 +----- target/microblaze/cpu.c | 6 +----- target/mips/cpu.c | 2 +- target/nios2/cpu.c | 6 +----- target/ppc/translate_init.inc.c | 4 ++-- target/rx/cpu.c | 8 ++------ target/s390x/cpu.c | 6 +----- target/s390x/cpu_models.c | 6 +++--- target/sparc/cpu.c | 2 +- target/tilegx/cpu.c | 6 +----- target/xtensa/cpu.c | 6 +----- ui/console.c | 6 +----- ui/input-barrier.c | 6 +----- ui/input-linux.c | 6 +----- 819 files changed, 1183 insertions(+), 4322 deletions(-) diff --git a/accel/accel.c b/accel/accel.c index cb555e3b06..5239dd7f45 100644 --- a/accel/accel.c +++ b/accel/accel.c @@ -36,6 +36,7 @@ static const TypeInfo accel_type = { .class_size = sizeof(AccelClass), .instance_size = sizeof(AccelState), }; +TYPE_INFO(accel_type) /* Lookup AccelClass from opt_name. Returns NULL if not found */ AccelClass *accel_find(const char *opt_name) @@ -77,9 +78,4 @@ void accel_setup_post(MachineState *ms) } } -static void register_accel_types(void) -{ - type_register_static(&accel_type); -} -type_init(register_accel_types); diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 63ef6af9a1..ab89d0ef94 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -3208,10 +3208,6 @@ static const TypeInfo kvm_accel_type = { .class_init = kvm_accel_class_init, .instance_size = sizeof(KVMState), }; +TYPE_INFO(kvm_accel_type) -static void kvm_type_init(void) -{ - type_register_static(&kvm_accel_type); -} -type_init(kvm_type_init); diff --git a/accel/qtest.c b/accel/qtest.c index 5b88f55921..d19a6297bb 100644 --- a/accel/qtest.c +++ b/accel/qtest.c @@ -45,10 +45,6 @@ static const TypeInfo qtest_accel_type = { .parent = TYPE_ACCEL, .class_init = qtest_accel_class_init, }; +TYPE_INFO(qtest_accel_type) -static void qtest_type_init(void) -{ - type_register_static(&qtest_accel_type); -} -type_init(qtest_type_init); diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index eace2c113b..c29e72fb1f 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -217,10 +217,6 @@ static const TypeInfo tcg_accel_type = { .class_init = tcg_accel_class_init, .instance_size = sizeof(TCGState), }; +TYPE_INFO(tcg_accel_type) -static void register_accel_types(void) -{ - type_register_static(&tcg_accel_type); -} -type_init(register_accel_types); diff --git a/accel/xen/xen-all.c b/accel/xen/xen-all.c index 60b971d0a8..888053a39f 100644 --- a/accel/xen/xen-all.c +++ b/accel/xen/xen-all.c @@ -213,10 +213,6 @@ static const TypeInfo xen_accel_type = { .parent = TYPE_ACCEL, .class_init = xen_accel_class_init, }; +TYPE_INFO(xen_accel_type) -static void xen_type_init(void) -{ - type_register_static(&xen_accel_type); -} -type_init(xen_type_init); diff --git a/authz/base.c b/authz/base.c index c75bce3fd1..619b4bb706 100644 --- a/authz/base.c +++ b/authz/base.c @@ -73,11 +73,7 @@ static const TypeInfo authz_info = { .class_size = sizeof(QAuthZClass), .abstract = true, }; +TYPE_INFO(authz_info) -static void qauthz_register_types(void) -{ - type_register_static(&authz_info); -} -type_init(qauthz_register_types) diff --git a/authz/list.c b/authz/list.c index 8e904bfc93..bfe1310d47 100644 --- a/authz/list.c +++ b/authz/list.c @@ -259,13 +259,8 @@ static const TypeInfo qauthz_list_info = { { } } }; +TYPE_INFO(qauthz_list_info) -static void -qauthz_list_register_types(void) -{ - type_register_static(&qauthz_list_info); -} -type_init(qauthz_list_register_types); diff --git a/authz/listfile.c b/authz/listfile.c index 666df872ad..048255aa76 100644 --- a/authz/listfile.c +++ b/authz/listfile.c @@ -270,13 +270,8 @@ static const TypeInfo qauthz_list_file_info = { { } } }; +TYPE_INFO(qauthz_list_file_info) -static void -qauthz_list_file_register_types(void) -{ - type_register_static(&qauthz_list_file_info); -} -type_init(qauthz_list_file_register_types); diff --git a/authz/pamacct.c b/authz/pamacct.c index 3c6be43916..7dd240f654 100644 --- a/authz/pamacct.c +++ b/authz/pamacct.c @@ -136,13 +136,8 @@ static const TypeInfo qauthz_pam_info = { { } } }; +TYPE_INFO(qauthz_pam_info) -static void -qauthz_pam_register_types(void) -{ - type_register_static(&qauthz_pam_info); -} -type_init(qauthz_pam_register_types); diff --git a/authz/simple.c b/authz/simple.c index 84954b80a5..f9c53df352 100644 --- a/authz/simple.c +++ b/authz/simple.c @@ -103,13 +103,8 @@ static const TypeInfo qauthz_simple_info = { { } } }; +TYPE_INFO(qauthz_simple_info) -static void -qauthz_simple_register_types(void) -{ - type_register_static(&qauthz_simple_info); -} -type_init(qauthz_simple_register_types); diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c index 14316333fe..cb3690383f 100644 --- a/backends/cryptodev-builtin.c +++ b/backends/cryptodev-builtin.c @@ -384,11 +384,6 @@ static const TypeInfo cryptodev_builtin_info = { .class_init = cryptodev_builtin_class_init, .instance_size = sizeof(CryptoDevBackendBuiltin), }; +TYPE_INFO(cryptodev_builtin_info) -static void -cryptodev_builtin_register_types(void) -{ - type_register_static(&cryptodev_builtin_info); -} -type_init(cryptodev_builtin_register_types); diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c index dbe5a8aae6..0fffa10214 100644 --- a/backends/cryptodev-vhost-user.c +++ b/backends/cryptodev-vhost-user.c @@ -372,11 +372,6 @@ static const TypeInfo cryptodev_vhost_user_info = { .instance_finalize = cryptodev_vhost_user_finalize, .instance_size = sizeof(CryptoDevBackendVhostUser), }; +TYPE_INFO(cryptodev_vhost_user_info) -static void -cryptodev_vhost_user_register_types(void) -{ - type_register_static(&cryptodev_vhost_user_info); -} -type_init(cryptodev_vhost_user_register_types); diff --git a/backends/cryptodev.c b/backends/cryptodev.c index ada4ebe78b..9180af54e9 100644 --- a/backends/cryptodev.c +++ b/backends/cryptodev.c @@ -245,11 +245,6 @@ static const TypeInfo cryptodev_backend_info = { { } } }; +TYPE_INFO(cryptodev_backend_info) -static void -cryptodev_backend_register_types(void) -{ - type_register_static(&cryptodev_backend_info); -} -type_init(cryptodev_backend_register_types); diff --git a/backends/dbus-vmstate.c b/backends/dbus-vmstate.c index 56361a6272..d8cc3e7e25 100644 --- a/backends/dbus-vmstate.c +++ b/backends/dbus-vmstate.c @@ -499,11 +499,6 @@ static const TypeInfo dbus_vmstate_info = { { } } }; +TYPE_INFO(dbus_vmstate_info) -static void -register_types(void) -{ - type_register_static(&dbus_vmstate_info); -} -type_init(register_types); diff --git a/backends/hostmem-file.c b/backends/hostmem-file.c index 5b819020b4..5037357cd0 100644 --- a/backends/hostmem-file.c +++ b/backends/hostmem-file.c @@ -199,10 +199,6 @@ static const TypeInfo file_backend_info = { .instance_finalize = file_backend_instance_finalize, .instance_size = sizeof(HostMemoryBackendFile), }; +TYPE_INFO(file_backend_info) -static void register_types(void) -{ - type_register_static(&file_backend_info); -} -type_init(register_types); diff --git a/backends/hostmem-memfd.c b/backends/hostmem-memfd.c index 4c040a7541..4b4f13a3ca 100644 --- a/backends/hostmem-memfd.c +++ b/backends/hostmem-memfd.c @@ -161,11 +161,11 @@ static const TypeInfo memfd_backend_info = { .class_init = memfd_backend_class_init, .instance_size = sizeof(HostMemoryBackendMemfd), }; +TYPE_INFO(memfd_backend_info) static void register_types(void) { if (qemu_memfd_check(MFD_ALLOW_SEALING)) { - type_register_static(&memfd_backend_info); } } diff --git a/backends/hostmem-ram.c b/backends/hostmem-ram.c index 5cc53e76c9..3bbe53f1ce 100644 --- a/backends/hostmem-ram.c +++ b/backends/hostmem-ram.c @@ -45,10 +45,6 @@ static const TypeInfo ram_backend_info = { .parent = TYPE_MEMORY_BACKEND, .class_init = ram_backend_class_init, }; +TYPE_INFO(ram_backend_info) -static void register_types(void) -{ - type_register_static(&ram_backend_info); -} -type_init(register_types); diff --git a/backends/hostmem.c b/backends/hostmem.c index 4bde00e8e7..49d15e61be 100644 --- a/backends/hostmem.c +++ b/backends/hostmem.c @@ -516,10 +516,6 @@ static const TypeInfo host_memory_backend_info = { { } } }; +TYPE_INFO(host_memory_backend_info) -static void register_types(void) -{ - type_register_static(&host_memory_backend_info); -} -type_init(register_types); diff --git a/backends/rng-builtin.c b/backends/rng-builtin.c index ba1b8d66b8..d6afd54b3e 100644 --- a/backends/rng-builtin.c +++ b/backends/rng-builtin.c @@ -68,10 +68,6 @@ static const TypeInfo rng_builtin_info = { .instance_finalize = rng_builtin_finalize, .class_init = rng_builtin_class_init, }; +TYPE_INFO(rng_builtin_info) -static void register_types(void) -{ - type_register_static(&rng_builtin_info); -} -type_init(register_types); diff --git a/backends/rng-egd.c b/backends/rng-egd.c index 7aaa6ee239..90d57417ff 100644 --- a/backends/rng-egd.c +++ b/backends/rng-egd.c @@ -165,10 +165,6 @@ static const TypeInfo rng_egd_info = { .instance_init = rng_egd_init, .instance_finalize = rng_egd_finalize, }; +TYPE_INFO(rng_egd_info) -static void register_types(void) -{ - type_register_static(&rng_egd_info); -} -type_init(register_types); diff --git a/backends/rng-random.c b/backends/rng-random.c index 32998d8ee7..59dba2b3f4 100644 --- a/backends/rng-random.c +++ b/backends/rng-random.c @@ -144,10 +144,6 @@ static const TypeInfo rng_random_info = { .instance_init = rng_random_init, .instance_finalize = rng_random_finalize, }; +TYPE_INFO(rng_random_info) -static void register_types(void) -{ - type_register_static(&rng_random_info); -} -type_init(register_types); diff --git a/backends/rng.c b/backends/rng.c index 484f04e891..dcea7a89e9 100644 --- a/backends/rng.c +++ b/backends/rng.c @@ -139,10 +139,6 @@ static const TypeInfo rng_backend_info = { { } } }; +TYPE_INFO(rng_backend_info) -static void register_types(void) -{ - type_register_static(&rng_backend_info); -} -type_init(register_types); diff --git a/backends/tpm/tpm_backend.c b/backends/tpm/tpm_backend.c index 375587e743..9aac3df542 100644 --- a/backends/tpm/tpm_backend.c +++ b/backends/tpm/tpm_backend.c @@ -192,17 +192,13 @@ static const TypeInfo tpm_backend_info = { .class_size = sizeof(TPMBackendClass), .abstract = true, }; +TYPE_INFO(tpm_backend_info) static const TypeInfo tpm_if_info = { .name = TYPE_TPM_IF, .parent = TYPE_INTERFACE, .class_size = sizeof(TPMIfClass), }; +TYPE_INFO(tpm_if_info) -static void register_types(void) -{ - type_register_static(&tpm_backend_info); - type_register_static(&tpm_if_info); -} -type_init(register_types); diff --git a/backends/tpm/tpm_emulator.c b/backends/tpm/tpm_emulator.c index a9b0f55e67..ac441337d9 100644 --- a/backends/tpm/tpm_emulator.c +++ b/backends/tpm/tpm_emulator.c @@ -996,10 +996,6 @@ static const TypeInfo tpm_emulator_info = { .instance_init = tpm_emulator_inst_init, .instance_finalize = tpm_emulator_inst_finalize, }; +TYPE_INFO(tpm_emulator_info) -static void tpm_emulator_register(void) -{ - type_register_static(&tpm_emulator_info); -} -type_init(tpm_emulator_register) diff --git a/backends/tpm/tpm_passthrough.c b/backends/tpm/tpm_passthrough.c index 7403807ec4..8e67b4b7d6 100644 --- a/backends/tpm/tpm_passthrough.c +++ b/backends/tpm/tpm_passthrough.c @@ -396,10 +396,6 @@ static const TypeInfo tpm_passthrough_info = { .instance_init = tpm_passthrough_inst_init, .instance_finalize = tpm_passthrough_inst_finalize, }; +TYPE_INFO(tpm_passthrough_info) -static void tpm_passthrough_register(void) -{ - type_register_static(&tpm_passthrough_info); -} -type_init(tpm_passthrough_register) diff --git a/backends/vhost-user.c b/backends/vhost-user.c index 9e6e198546..25873b1981 100644 --- a/backends/vhost-user.c +++ b/backends/vhost-user.c @@ -199,10 +199,6 @@ static const TypeInfo vhost_user_backend_info = { .instance_finalize = vhost_user_backend_finalize, .class_size = sizeof(VhostUserBackendClass), }; +TYPE_INFO(vhost_user_backend_info) -static void register_types(void) -{ - type_register_static(&vhost_user_backend_info); -} -type_init(register_types); diff --git a/block/throttle-groups.c b/block/throttle-groups.c index 4e28365d8d..49f68bef50 100644 --- a/block/throttle-groups.c +++ b/block/throttle-groups.c @@ -968,10 +968,6 @@ static const TypeInfo throttle_group_info = { { } }, }; +TYPE_INFO(throttle_group_info) -static void throttle_groups_init(void) -{ - type_register_static(&throttle_group_info); -} -type_init(throttle_groups_init); diff --git a/chardev/baum.c b/chardev/baum.c index 9c95e7bc79..f111ebfe05 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -677,10 +677,6 @@ static const TypeInfo char_braille_type_info = { .instance_finalize = char_braille_finalize, .class_init = char_braille_class_init, }; +TYPE_INFO(char_braille_type_info) -static void register_types(void) -{ - type_register_static(&char_braille_type_info); -} -type_init(register_types); diff --git a/chardev/char-console.c b/chardev/char-console.c index 6c4ce5dbce..89b083c5b9 100644 --- a/chardev/char-console.c +++ b/chardev/char-console.c @@ -46,10 +46,6 @@ static const TypeInfo char_console_type_info = { .parent = TYPE_CHARDEV_WIN, .class_init = char_console_class_init, }; +TYPE_INFO(char_console_type_info) -static void register_types(void) -{ - type_register_static(&char_console_type_info); -} -type_init(register_types); diff --git a/chardev/char-fd.c b/chardev/char-fd.c index c2d8101106..b263e285f0 100644 --- a/chardev/char-fd.c +++ b/chardev/char-fd.c @@ -161,10 +161,6 @@ static const TypeInfo char_fd_type_info = { .class_init = char_fd_class_init, .abstract = true, }; +TYPE_INFO(char_fd_type_info) -static void register_types(void) -{ - type_register_static(&char_fd_type_info); -} -type_init(register_types); diff --git a/chardev/char-mux.c b/chardev/char-mux.c index 6f980bb836..c3be4e40e5 100644 --- a/chardev/char-mux.c +++ b/chardev/char-mux.c @@ -394,10 +394,6 @@ static const TypeInfo char_mux_type_info = { .instance_size = sizeof(MuxChardev), .instance_finalize = char_mux_finalize, }; +TYPE_INFO(char_mux_type_info) -static void register_types(void) -{ - type_register_static(&char_mux_type_info); -} -type_init(register_types); diff --git a/chardev/char-null.c b/chardev/char-null.c index 1c6a2900f9..ce43ccdda6 100644 --- a/chardev/char-null.c +++ b/chardev/char-null.c @@ -47,10 +47,6 @@ static const TypeInfo char_null_type_info = { .instance_size = sizeof(Chardev), .class_init = char_null_class_init, }; +TYPE_INFO(char_null_type_info) -static void register_types(void) -{ - type_register_static(&char_null_type_info); -} -type_init(register_types); diff --git a/chardev/char-parallel.c b/chardev/char-parallel.c index 05e7efbd6c..dd60ef9898 100644 --- a/chardev/char-parallel.c +++ b/chardev/char-parallel.c @@ -308,12 +308,8 @@ static const TypeInfo char_parallel_type_info = { .instance_finalize = char_parallel_finalize, .class_init = char_parallel_class_init, }; +TYPE_INFO(char_parallel_type_info) -static void register_types(void) -{ - type_register_static(&char_parallel_type_info); -} -type_init(register_types); #endif diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 1cc501a481..40d7bddba3 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -243,10 +243,6 @@ static const TypeInfo char_pty_type_info = { .instance_finalize = char_pty_finalize, .class_init = char_pty_class_init, }; +TYPE_INFO(char_pty_type_info) -static void register_types(void) -{ - type_register_static(&char_pty_type_info); -} -type_init(register_types); diff --git a/chardev/char-ringbuf.c b/chardev/char-ringbuf.c index 67397a8ce9..fe9881b85b 100644 --- a/chardev/char-ringbuf.c +++ b/chardev/char-ringbuf.c @@ -237,17 +237,13 @@ static const TypeInfo char_ringbuf_type_info = { .instance_size = sizeof(RingBufChardev), .instance_finalize = char_ringbuf_finalize, }; +TYPE_INFO(char_ringbuf_type_info) /* Bug-compatibility: */ static const TypeInfo char_memory_type_info = { .name = TYPE_CHARDEV_MEMORY, .parent = TYPE_CHARDEV_RINGBUF, }; +TYPE_INFO(char_memory_type_info) -static void register_types(void) -{ - type_register_static(&char_ringbuf_type_info); - type_register_static(&char_memory_type_info); -} -type_init(register_types); diff --git a/chardev/char-socket.c b/chardev/char-socket.c index ef62dbf3d7..8c4ff2effb 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -1510,10 +1510,6 @@ static const TypeInfo char_socket_type_info = { .instance_finalize = char_socket_finalize, .class_init = char_socket_class_init, }; +TYPE_INFO(char_socket_type_info) -static void register_types(void) -{ - type_register_static(&char_socket_type_info); -} -type_init(register_types); diff --git a/chardev/char-udp.c b/chardev/char-udp.c index bba4145f96..0d175b62e0 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -234,10 +234,6 @@ static const TypeInfo char_udp_type_info = { .instance_finalize = char_udp_finalize, .class_init = char_udp_class_init, }; +TYPE_INFO(char_udp_type_info) -static void register_types(void) -{ - type_register_static(&char_udp_type_info); -} -type_init(register_types); diff --git a/chardev/char-win-stdio.c b/chardev/char-win-stdio.c index 99afda353c..a6794d26d7 100644 --- a/chardev/char-win-stdio.c +++ b/chardev/char-win-stdio.c @@ -260,10 +260,6 @@ static const TypeInfo char_win_stdio_type_info = { .class_init = char_win_stdio_class_init, .abstract = true, }; +TYPE_INFO(char_win_stdio_type_info) -static void register_types(void) -{ - type_register_static(&char_win_stdio_type_info); -} -type_init(register_types); diff --git a/chardev/char-win.c b/chardev/char-win.c index d4fb44c4dc..f7965c1aca 100644 --- a/chardev/char-win.c +++ b/chardev/char-win.c @@ -235,10 +235,6 @@ static const TypeInfo char_win_type_info = { .class_init = char_win_class_init, .abstract = true, }; +TYPE_INFO(char_win_type_info) -static void register_types(void) -{ - type_register_static(&char_win_type_info); -} -type_init(register_types); diff --git a/chardev/char.c b/chardev/char.c index 77e7ec814f..9665aa5b20 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -304,6 +304,7 @@ static const TypeInfo char_type_info = { .class_size = sizeof(ChardevClass), .class_init = char_class_init, }; +TYPE_INFO(char_type_info) static bool qemu_chr_is_busy(Chardev *s) { @@ -1168,9 +1169,4 @@ void qemu_chr_cleanup(void) object_unparent(get_chardevs_root()); } -static void register_types(void) -{ - type_register_static(&char_type_info); -} -type_init(register_types); diff --git a/chardev/msmouse.c b/chardev/msmouse.c index 6d8f06fed4..680c772f6f 100644 --- a/chardev/msmouse.c +++ b/chardev/msmouse.c @@ -182,10 +182,6 @@ static const TypeInfo char_msmouse_type_info = { .instance_finalize = char_msmouse_finalize, .class_init = char_msmouse_class_init, }; +TYPE_INFO(char_msmouse_type_info) -static void register_types(void) -{ - type_register_static(&char_msmouse_type_info); -} -type_init(register_types); diff --git a/chardev/spice.c b/chardev/spice.c index bf7ea1e294..08555d6c43 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -383,6 +383,7 @@ static const TypeInfo char_spice_type_info = { .class_init = char_spice_class_init, .abstract = true, }; +TYPE_INFO(char_spice_type_info) static void char_spicevmc_class_init(ObjectClass *oc, void *data) { @@ -398,6 +399,7 @@ static const TypeInfo char_spicevmc_type_info = { .parent = TYPE_CHARDEV_SPICE, .class_init = char_spicevmc_class_init, }; +TYPE_INFO(char_spicevmc_type_info) static void char_spiceport_class_init(ObjectClass *oc, void *data) { @@ -413,12 +415,6 @@ static const TypeInfo char_spiceport_type_info = { .parent = TYPE_CHARDEV_SPICE, .class_init = char_spiceport_class_init, }; +TYPE_INFO(char_spiceport_type_info) -static void register_types(void) -{ - type_register_static(&char_spice_type_info); - type_register_static(&char_spicevmc_type_info); - type_register_static(&char_spiceport_type_info); -} -type_init(register_types); diff --git a/chardev/testdev.c b/chardev/testdev.c index 368a8c041e..0c0ddc17d7 100644 --- a/chardev/testdev.c +++ b/chardev/testdev.c @@ -121,10 +121,6 @@ static const TypeInfo char_testdev_type_info = { .instance_size = sizeof(TestdevChardev), .class_init = char_testdev_class_init, }; +TYPE_INFO(char_testdev_type_info) -static void register_types(void) -{ - type_register_static(&char_testdev_type_info); -} -type_init(register_types); diff --git a/chardev/wctablet.c b/chardev/wctablet.c index e9cb7ca710..95c7504002 100644 --- a/chardev/wctablet.c +++ b/chardev/wctablet.c @@ -356,10 +356,6 @@ static const TypeInfo wctablet_type_info = { .instance_finalize = wctablet_chr_finalize, .class_init = wctablet_chr_class_init, }; +TYPE_INFO(wctablet_type_info) -static void register_types(void) -{ - type_register_static(&wctablet_type_info); -} -type_init(register_types); diff --git a/crypto/secret.c b/crypto/secret.c index 281cb81f0f..c07011d388 100644 --- a/crypto/secret.c +++ b/crypto/secret.c @@ -153,13 +153,8 @@ static const TypeInfo qcrypto_secret_info = { { } } }; +TYPE_INFO(qcrypto_secret_info) -static void -qcrypto_secret_register_types(void) -{ - type_register_static(&qcrypto_secret_info); -} -type_init(qcrypto_secret_register_types); diff --git a/crypto/secret_common.c b/crypto/secret_common.c index b03d530867..80d7d75b4d 100644 --- a/crypto/secret_common.c +++ b/crypto/secret_common.c @@ -391,13 +391,8 @@ static const TypeInfo qcrypto_secret_info = { .class_init = qcrypto_secret_class_init, .abstract = true, }; +TYPE_INFO(qcrypto_secret_info) -static void -qcrypto_secret_register_types(void) -{ - type_register_static(&qcrypto_secret_info); -} -type_init(qcrypto_secret_register_types); diff --git a/crypto/secret_keyring.c b/crypto/secret_keyring.c index 8bfc58ebf4..821d2e421b 100644 --- a/crypto/secret_keyring.c +++ b/crypto/secret_keyring.c @@ -136,13 +136,8 @@ static const TypeInfo qcrypto_secret_info = { { } } }; +TYPE_INFO(qcrypto_secret_info) -static void -qcrypto_secret_register_types(void) -{ - type_register_static(&qcrypto_secret_info); -} -type_init(qcrypto_secret_register_types); diff --git a/crypto/tls-cipher-suites.c b/crypto/tls-cipher-suites.c index 0d305b684b..e92a380a24 100644 --- a/crypto/tls-cipher-suites.c +++ b/crypto/tls-cipher-suites.c @@ -117,10 +117,6 @@ static const TypeInfo qcrypto_tls_cipher_suites_info = { { } } }; +TYPE_INFO(qcrypto_tls_cipher_suites_info) -static void qcrypto_tls_cipher_suites_register_types(void) -{ - type_register_static(&qcrypto_tls_cipher_suites_info); -} -type_init(qcrypto_tls_cipher_suites_register_types); diff --git a/crypto/tlscreds.c b/crypto/tlscreds.c index b68735f06f..bb3e6667b9 100644 --- a/crypto/tlscreds.c +++ b/crypto/tlscreds.c @@ -270,13 +270,8 @@ static const TypeInfo qcrypto_tls_creds_info = { .class_size = sizeof(QCryptoTLSCredsClass), .abstract = true, }; +TYPE_INFO(qcrypto_tls_creds_info) -static void -qcrypto_tls_creds_register_types(void) -{ - type_register_static(&qcrypto_tls_creds_info); -} -type_init(qcrypto_tls_creds_register_types); diff --git a/crypto/tlscredsanon.c b/crypto/tlscredsanon.c index 30275b6847..16162e60b6 100644 --- a/crypto/tlscredsanon.c +++ b/crypto/tlscredsanon.c @@ -203,13 +203,8 @@ static const TypeInfo qcrypto_tls_creds_anon_info = { { } } }; +TYPE_INFO(qcrypto_tls_creds_anon_info) -static void -qcrypto_tls_creds_anon_register_types(void) -{ - type_register_static(&qcrypto_tls_creds_anon_info); -} -type_init(qcrypto_tls_creds_anon_register_types); diff --git a/crypto/tlscredspsk.c b/crypto/tlscredspsk.c index e26807b899..ea890f5837 100644 --- a/crypto/tlscredspsk.c +++ b/crypto/tlscredspsk.c @@ -294,13 +294,8 @@ static const TypeInfo qcrypto_tls_creds_psk_info = { { } } }; +TYPE_INFO(qcrypto_tls_creds_psk_info) -static void -qcrypto_tls_creds_psk_register_types(void) -{ - type_register_static(&qcrypto_tls_creds_psk_info); -} -type_init(qcrypto_tls_creds_psk_register_types); diff --git a/crypto/tlscredsx509.c b/crypto/tlscredsx509.c index dd7267ccdb..77f1beaf8b 100644 --- a/crypto/tlscredsx509.c +++ b/crypto/tlscredsx509.c @@ -829,13 +829,8 @@ static const TypeInfo qcrypto_tls_creds_x509_info = { { } } }; +TYPE_INFO(qcrypto_tls_creds_x509_info) -static void -qcrypto_tls_creds_x509_register_types(void) -{ - type_register_static(&qcrypto_tls_creds_x509_info); -} -type_init(qcrypto_tls_creds_x509_register_types); diff --git a/gdbstub.c b/gdbstub.c index f3a318cd7f..03d0fb9890 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -3308,6 +3308,7 @@ static const TypeInfo char_gdb_type_info = { .parent = TYPE_CHARDEV, .class_init = char_gdb_class_init, }; +TYPE_INFO(char_gdb_type_info) static int find_cpu_clusters(Object *child, void *opaque) { @@ -3440,10 +3441,5 @@ void gdbserver_cleanup(void) } } -static void register_types(void) -{ - type_register_static(&char_gdb_type_info); -} -type_init(register_types); #endif diff --git a/hw/9pfs/virtio-9p-device.c b/hw/9pfs/virtio-9p-device.c index 36f3aa9352..4d16e2033f 100644 --- a/hw/9pfs/virtio-9p-device.c +++ b/hw/9pfs/virtio-9p-device.c @@ -259,10 +259,6 @@ static const TypeInfo virtio_device_info = { .instance_size = sizeof(V9fsVirtioState), .class_init = virtio_9p_class_init, }; +TYPE_INFO(virtio_device_info) -static void virtio_9p_register_types(void) -{ - type_register_static(&virtio_device_info); -} -type_init(virtio_9p_register_types) diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index b8abdefa1c..e766835af6 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -363,10 +363,6 @@ static const TypeInfo acpi_ged_info = { { } } }; +TYPE_INFO(acpi_ged_info) -static void acpi_ged_register_types(void) -{ - type_register_static(&acpi_ged_info); -} -type_init(acpi_ged_register_types) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 26bac4f16c..f27f6660f9 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -684,10 +684,6 @@ static const TypeInfo piix4_pm_info = { { } } }; +TYPE_INFO(piix4_pm_info) -static void piix4_pm_register_types(void) -{ - type_register_static(&piix4_pm_info); -} -type_init(piix4_pm_register_types) diff --git a/hw/acpi/vmgenid.c b/hw/acpi/vmgenid.c index 2df7623d74..ca62b6f161 100644 --- a/hw/acpi/vmgenid.c +++ b/hw/acpi/vmgenid.c @@ -237,13 +237,9 @@ static const TypeInfo vmgenid_device_info = { .instance_size = sizeof(VmGenIdState), .class_init = vmgenid_device_class_init, }; +TYPE_INFO(vmgenid_device_info) -static void vmgenid_register_types(void) -{ - type_register_static(&vmgenid_device_info); -} -type_init(vmgenid_register_types) GuidInfo *qmp_query_vm_generation_id(Error **errp) { diff --git a/hw/adc/stm32f2xx_adc.c b/hw/adc/stm32f2xx_adc.c index 01a0b14e69..647a47c706 100644 --- a/hw/adc/stm32f2xx_adc.c +++ b/hw/adc/stm32f2xx_adc.c @@ -299,10 +299,6 @@ static const TypeInfo stm32f2xx_adc_info = { .instance_init = stm32f2xx_adc_init, .class_init = stm32f2xx_adc_class_init, }; +TYPE_INFO(stm32f2xx_adc_info) -static void stm32f2xx_adc_register_types(void) -{ - type_register_static(&stm32f2xx_adc_info); -} -type_init(stm32f2xx_adc_register_types) diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 29d44dfb06..637411c10b 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -940,6 +940,7 @@ static const TypeInfo typhoon_pcihost_info = { .parent = TYPE_PCI_HOST_BRIDGE, .instance_size = sizeof(TyphoonState), }; +TYPE_INFO(typhoon_pcihost_info) static void typhoon_iommu_memory_region_class_init(ObjectClass *klass, void *data) @@ -954,11 +955,6 @@ static const TypeInfo typhoon_iommu_memory_region_info = { .name = TYPE_TYPHOON_IOMMU_MEMORY_REGION, .class_init = typhoon_iommu_memory_region_class_init, }; +TYPE_INFO(typhoon_iommu_memory_region_info) -static void typhoon_register_types(void) -{ - type_register_static(&typhoon_pcihost_info); - type_register_static(&typhoon_iommu_memory_region_info); -} -type_init(typhoon_register_types) diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index e258463747..1dad8a226b 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -182,10 +182,6 @@ static const TypeInfo aw_a10_type_info = { .instance_init = aw_a10_init, .class_init = aw_a10_class_init, }; +TYPE_INFO(aw_a10_type_info) -static void aw_a10_register_types(void) -{ - type_register_static(&aw_a10_type_info); -} -type_init(aw_a10_register_types) diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index 341abe6718..c59d2ffc3e 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -446,10 +446,6 @@ static const TypeInfo allwinner_h3_type_info = { .instance_init = allwinner_h3_init, .class_init = allwinner_h3_class_init, }; +TYPE_INFO(allwinner_h3_type_info) -static void allwinner_h3_register_types(void) -{ - type_register_static(&allwinner_h3_type_info); -} -type_init(allwinner_h3_register_types) diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 6264eab16b..dcd5798041 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -1167,12 +1167,12 @@ static const TypeInfo armsse_info = { { } } }; +TYPE_INFO(armsse_info) static void armsse_register_types(void) { int i; - type_register_static(&armsse_info); for (i = 0; i < ARRAY_SIZE(armsse_variants); i++) { TypeInfo ti = { diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index aa831d6653..684cdd5417 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -280,6 +280,7 @@ static const TypeInfo armv7m_info = { .instance_init = armv7m_instance_init, .class_init = armv7m_class_init, }; +TYPE_INFO(armv7m_info) static void armv7m_reset(void *opaque) { @@ -359,11 +360,6 @@ static const TypeInfo bitband_info = { .instance_init = bitband_init, .class_init = bitband_class_init, }; +TYPE_INFO(bitband_info) -static void armv7m_register_types(void) -{ - type_register_static(&bitband_info); - type_register_static(&armv7m_info); -} -type_init(armv7m_register_types) diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index a9d7f53f6e..3d45e4ab7f 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -373,10 +373,6 @@ static const TypeInfo bcm2835_peripherals_type_info = { .instance_init = bcm2835_peripherals_init, .class_init = bcm2835_peripherals_class_init, }; +TYPE_INFO(bcm2835_peripherals_type_info) -static void bcm2835_peripherals_register_types(void) -{ - type_register_static(&bcm2835_peripherals_type_info); -} -type_init(bcm2835_peripherals_register_types) diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index f15cc3b405..7ae9bbdbca 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -168,12 +168,12 @@ static const TypeInfo bcm283x_type_info = { .class_size = sizeof(BCM283XClass), .abstract = true, }; +TYPE_INFO(bcm283x_type_info) static void bcm2836_register_types(void) { int i; - type_register_static(&bcm283x_type_info); for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) { TypeInfo ti = { .name = bcm283x_socs[i].name, diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 3e9816af80..0ee0934e81 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -1317,10 +1317,6 @@ static const TypeInfo arm_linux_boot_if_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(ARMLinuxBootIfClass), }; +TYPE_INFO(arm_linux_boot_if_info) -static void arm_linux_boot_register_types(void) -{ - type_register_static(&arm_linux_boot_if_info); -} -type_init(arm_linux_boot_register_types) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index 4b35ef4bed..041bab40ef 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -85,9 +85,5 @@ static const TypeInfo collie_machine_typeinfo = { .class_init = collie_machine_class_init, .instance_size = sizeof(CollieMachineState), }; +TYPE_INFO(collie_machine_typeinfo) -static void collie_machine_register_types(void) -{ - type_register_static(&collie_machine_typeinfo); -} -type_init(collie_machine_register_types); diff --git a/hw/arm/digic.c b/hw/arm/digic.c index 614232165c..aae48a4f04 100644 --- a/hw/arm/digic.c +++ b/hw/arm/digic.c @@ -98,10 +98,6 @@ static const TypeInfo digic_type_info = { .instance_init = digic_init, .class_init = digic_class_init, }; +TYPE_INFO(digic_type_info) -static void digic_register_types(void) -{ - type_register_static(&digic_type_info); -} -type_init(digic_register_types) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 081bbff317..e42677ded7 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -502,10 +502,6 @@ static const TypeInfo exynos4210_info = { .instance_init = exynos4210_init, .class_init = exynos4210_class_init, }; +TYPE_INFO(exynos4210_info) -static void exynos4210_register_types(void) -{ - type_register_static(&exynos4210_info); -} -type_init(exynos4210_register_types) diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index 56b729141b..7761a0fe97 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -169,6 +169,7 @@ static const TypeInfo nuri_type = { .parent = TYPE_MACHINE, .class_init = nuri_class_init, }; +TYPE_INFO(nuri_type) static void smdkc210_class_init(ObjectClass *oc, void *data) { @@ -187,11 +188,6 @@ static const TypeInfo smdkc210_type = { .parent = TYPE_MACHINE, .class_init = smdkc210_class_init, }; +TYPE_INFO(smdkc210_type) -static void exynos4_machines_init(void) -{ - type_register_static(&nuri_type); - type_register_static(&smdkc210_type); -} -type_init(exynos4_machines_init) diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index 08a98f828f..256681a31a 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -342,10 +342,6 @@ static const TypeInfo fsl_imx25_type_info = { .instance_init = fsl_imx25_init, .class_init = fsl_imx25_class_init, }; +TYPE_INFO(fsl_imx25_type_info) -static void fsl_imx25_register_types(void) -{ - type_register_static(&fsl_imx25_type_info); -} -type_init(fsl_imx25_register_types) diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index 0983998bb4..6e8c780737 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -245,10 +245,6 @@ static const TypeInfo fsl_imx31_type_info = { .instance_init = fsl_imx31_init, .class_init = fsl_imx31_class_init, }; +TYPE_INFO(fsl_imx31_type_info) -static void fsl_imx31_register_types(void) -{ - type_register_static(&fsl_imx31_type_info); -} -type_init(fsl_imx31_register_types) diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 00dafe3f62..917642a97f 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -473,10 +473,6 @@ static const TypeInfo fsl_imx6_type_info = { .instance_init = fsl_imx6_init, .class_init = fsl_imx6_class_init, }; +TYPE_INFO(fsl_imx6_type_info) -static void fsl_imx6_register_types(void) -{ - type_register_static(&fsl_imx6_type_info); -} -type_init(fsl_imx6_register_types) diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index e0128d7316..39b5ab528f 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -631,9 +631,5 @@ static const TypeInfo fsl_imx6ul_type_info = { .instance_init = fsl_imx6ul_init, .class_init = fsl_imx6ul_class_init, }; +TYPE_INFO(fsl_imx6ul_type_info) -static void fsl_imx6ul_register_types(void) -{ - type_register_static(&fsl_imx6ul_type_info); -} -type_init(fsl_imx6ul_register_types) diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 2ff2cab924..5b062dd294 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -577,9 +577,5 @@ static const TypeInfo fsl_imx7_type_info = { .instance_init = fsl_imx7_init, .class_init = fsl_imx7_class_init, }; +TYPE_INFO(fsl_imx7_type_info) -static void fsl_imx7_register_types(void) -{ - type_register_static(&fsl_imx7_type_info); -} -type_init(fsl_imx7_register_types) diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c index 3a4bc332c4..bb88fae49c 100644 --- a/hw/arm/gumstix.c +++ b/hw/arm/gumstix.c @@ -121,6 +121,7 @@ static const TypeInfo connex_type = { .parent = TYPE_MACHINE, .class_init = connex_class_init, }; +TYPE_INFO(connex_type) static void verdex_class_init(ObjectClass *oc, void *data) { @@ -137,11 +138,6 @@ static const TypeInfo verdex_type = { .parent = TYPE_MACHINE, .class_init = verdex_class_init, }; +TYPE_INFO(verdex_type) -static void gumstix_machine_init(void) -{ - type_register_static(&connex_type); - type_register_static(&verdex_type); -} -type_init(gumstix_machine_init) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index c96f2ab9cf..07dad406b4 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -213,13 +213,9 @@ static const TypeInfo highbank_regs_info = { .instance_init = highbank_regs_init, .class_init = highbank_regs_class_init, }; +TYPE_INFO(highbank_regs_info) -static void highbank_regs_register_types(void) -{ - type_register_static(&highbank_regs_info); -} -type_init(highbank_regs_register_types) static struct arm_boot_info highbank_binfo; @@ -434,6 +430,7 @@ static const TypeInfo highbank_type = { .parent = TYPE_MACHINE, .class_init = highbank_class_init, }; +TYPE_INFO(highbank_type) static void midway_class_init(ObjectClass *oc, void *data) { @@ -453,11 +450,6 @@ static const TypeInfo midway_type = { .parent = TYPE_MACHINE, .class_init = midway_class_init, }; +TYPE_INFO(midway_type) -static void calxeda_machines_init(void) -{ - type_register_static(&highbank_type); - type_register_static(&midway_type); -} -type_init(calxeda_machines_init) diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index f304c2b4f0..1be8ed5228 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -706,6 +706,7 @@ static const TypeInfo core_info = { .instance_init = integratorcm_init, .class_init = core_class_init, }; +TYPE_INFO(core_info) static const TypeInfo icp_pic_info = { .name = TYPE_INTEGRATOR_PIC, @@ -714,6 +715,7 @@ static const TypeInfo icp_pic_info = { .instance_init = icp_pic_init, .class_init = icp_pic_class_init, }; +TYPE_INFO(icp_pic_info) static const TypeInfo icp_ctrl_regs_info = { .name = TYPE_ICP_CONTROL_REGS, @@ -722,12 +724,6 @@ static const TypeInfo icp_ctrl_regs_info = { .instance_init = icp_control_init, .class_init = icp_control_class_init, }; +TYPE_INFO(icp_ctrl_regs_info) -static void integratorcp_register_types(void) -{ - type_register_static(&icp_pic_info); - type_register_static(&core_info); - type_register_static(&icp_ctrl_regs_info); -} -type_init(integratorcp_register_types) diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c index a91acab1cb..92331aebf1 100644 --- a/hw/arm/microbit.c +++ b/hw/arm/microbit.c @@ -75,10 +75,6 @@ static const TypeInfo microbit_info = { .instance_size = sizeof(MicrobitMachineState), .class_init = microbit_machine_class_init, }; +TYPE_INFO(microbit_info) -static void microbit_machine_init(void) -{ - type_register_static(µbit_info); -} -type_init(microbit_machine_init); diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 28d9e8bfac..0a1819fd67 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -692,24 +692,20 @@ static const TypeInfo mps2tz_info = { { } }, }; +TYPE_INFO(mps2tz_info) static const TypeInfo mps2tz_an505_info = { .name = TYPE_MPS2TZ_AN505_MACHINE, .parent = TYPE_MPS2TZ_MACHINE, .class_init = mps2tz_an505_class_init, }; +TYPE_INFO(mps2tz_an505_info) static const TypeInfo mps2tz_an521_info = { .name = TYPE_MPS2TZ_AN521_MACHINE, .parent = TYPE_MPS2TZ_MACHINE, .class_init = mps2tz_an521_class_init, }; +TYPE_INFO(mps2tz_an521_info) -static void mps2tz_machine_init(void) -{ - type_register_static(&mps2tz_info); - type_register_static(&mps2tz_an505_info); - type_register_static(&mps2tz_an521_info); -} -type_init(mps2tz_machine_init); diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index 9f12934ca8..4ca6e1ce12 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -428,24 +428,20 @@ static const TypeInfo mps2_info = { .class_size = sizeof(MPS2MachineClass), .class_init = mps2_class_init, }; +TYPE_INFO(mps2_info) static const TypeInfo mps2_an385_info = { .name = TYPE_MPS2_AN385_MACHINE, .parent = TYPE_MPS2_MACHINE, .class_init = mps2_an385_class_init, }; +TYPE_INFO(mps2_an385_info) static const TypeInfo mps2_an511_info = { .name = TYPE_MPS2_AN511_MACHINE, .parent = TYPE_MPS2_MACHINE, .class_init = mps2_an511_class_init, }; +TYPE_INFO(mps2_an511_info) -static void mps2_machine_init(void) -{ - type_register_static(&mps2_info); - type_register_static(&mps2_an385_info); - type_register_static(&mps2_an511_info); -} -type_init(mps2_machine_init); diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c index d2c29e82d1..5e922b1942 100644 --- a/hw/arm/msf2-soc.c +++ b/hw/arm/msf2-soc.c @@ -234,10 +234,6 @@ static const TypeInfo m2sxxx_soc_info = { .instance_init = m2sxxx_soc_initfn, .class_init = m2sxxx_soc_class_init, }; +TYPE_INFO(m2sxxx_soc_info) -static void m2sxxx_soc_types(void) -{ - type_register_static(&m2sxxx_soc_info); -} -type_init(m2sxxx_soc_types) diff --git a/hw/arm/musca.c b/hw/arm/musca.c index 4bc737f93b..8afc118134 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -647,24 +647,20 @@ static const TypeInfo musca_info = { .class_size = sizeof(MuscaMachineClass), .class_init = musca_class_init, }; +TYPE_INFO(musca_info) static const TypeInfo musca_a_info = { .name = TYPE_MUSCA_A_MACHINE, .parent = TYPE_MUSCA_MACHINE, .class_init = musca_a_class_init, }; +TYPE_INFO(musca_a_info) static const TypeInfo musca_b1_info = { .name = TYPE_MUSCA_B1_MACHINE, .parent = TYPE_MUSCA_MACHINE, .class_init = musca_b1_class_init, }; +TYPE_INFO(musca_b1_info) -static void musca_machine_init(void) -{ - type_register_static(&musca_info); - type_register_static(&musca_a_info); - type_register_static(&musca_b1_info); -} -type_init(musca_machine_init); diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index c3b9780f35..9decd7abd1 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -447,6 +447,7 @@ static const TypeInfo mv88w8618_eth_info = { .instance_init = mv88w8618_eth_init, .class_init = mv88w8618_eth_class_init, }; +TYPE_INFO(mv88w8618_eth_info) /* LCD register offsets */ #define MP_LCD_IRQCTRL 0x180 @@ -678,6 +679,7 @@ static const TypeInfo musicpal_lcd_info = { .instance_init = musicpal_lcd_init, .class_init = musicpal_lcd_class_init, }; +TYPE_INFO(musicpal_lcd_info) /* PIC register offsets */ #define MP_PIC_STATUS 0x00 @@ -800,6 +802,7 @@ static const TypeInfo mv88w8618_pic_info = { .instance_init = mv88w8618_pic_init, .class_init = mv88w8618_pic_class_init, }; +TYPE_INFO(mv88w8618_pic_info) /* PIT register offsets */ #define MP_PIT_TIMER1_LENGTH 0x00 @@ -984,6 +987,7 @@ static const TypeInfo mv88w8618_pit_info = { .instance_init = mv88w8618_pit_init, .class_init = mv88w8618_pit_class_init, }; +TYPE_INFO(mv88w8618_pit_info) /* Flash config register offsets */ #define MP_FLASHCFG_CFGR0 0x04 @@ -1069,6 +1073,7 @@ static const TypeInfo mv88w8618_flashcfg_info = { .instance_init = mv88w8618_flashcfg_init, .class_init = mv88w8618_flashcfg_class_init, }; +TYPE_INFO(mv88w8618_flashcfg_info) /* Misc register offsets */ #define MP_MISC_BOARD_REVISION 0x18 @@ -1123,6 +1128,7 @@ static const TypeInfo musicpal_misc_info = { .instance_init = musicpal_misc_init, .instance_size = sizeof(MusicPalMiscState), }; +TYPE_INFO(musicpal_misc_info) /* WLAN register offsets */ #define MP_WLAN_MAGIC1 0x11c @@ -1411,6 +1417,7 @@ static const TypeInfo musicpal_gpio_info = { .instance_init = musicpal_gpio_init, .class_init = musicpal_gpio_class_init, }; +TYPE_INFO(musicpal_gpio_info) /* Keyboard codes & masks */ #define KEY_RELEASED 0x80 @@ -1570,6 +1577,7 @@ static const TypeInfo musicpal_key_info = { .instance_init = musicpal_key_init, .class_init = musicpal_key_class_init, }; +TYPE_INFO(musicpal_key_info) static struct arm_boot_info musicpal_binfo = { .loader_start = 0x0, @@ -1725,18 +1733,6 @@ static const TypeInfo mv88w8618_wlan_info = { .instance_size = sizeof(SysBusDevice), .class_init = mv88w8618_wlan_class_init, }; +TYPE_INFO(mv88w8618_wlan_info) -static void musicpal_register_types(void) -{ - type_register_static(&mv88w8618_pic_info); - type_register_static(&mv88w8618_pit_info); - type_register_static(&mv88w8618_flashcfg_info); - type_register_static(&mv88w8618_eth_info); - type_register_static(&mv88w8618_wlan_info); - type_register_static(&musicpal_lcd_info); - type_register_static(&musicpal_gpio_info); - type_register_static(&musicpal_key_info); - type_register_static(&musicpal_misc_info); -} -type_init(musicpal_register_types) diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index e15981e019..aabb59330c 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -219,9 +219,5 @@ static const TypeInfo nrf51_soc_info = { .instance_init = nrf51_soc_init, .class_init = nrf51_soc_class_init, }; +TYPE_INFO(nrf51_soc_info) -static void nrf51_soc_types(void) -{ - type_register_static(&nrf51_soc_info); -} -type_init(nrf51_soc_types) diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c index e48092ca04..08e7a604c0 100644 --- a/hw/arm/nseries.c +++ b/hw/arm/nseries.c @@ -1441,6 +1441,7 @@ static const TypeInfo n800_type = { .parent = TYPE_MACHINE, .class_init = n800_class_init, }; +TYPE_INFO(n800_type) static void n810_class_init(ObjectClass *oc, void *data) { @@ -1461,11 +1462,6 @@ static const TypeInfo n810_type = { .parent = TYPE_MACHINE, .class_init = n810_class_init, }; +TYPE_INFO(n810_type) -static void nseries_machine_init(void) -{ - type_register_static(&n800_type); - type_register_static(&n810_type); -} -type_init(nseries_machine_init) diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index 57829b3744..f453c18067 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -229,6 +229,7 @@ static const TypeInfo sx1_machine_v2_type = { .parent = TYPE_MACHINE, .class_init = sx1_machine_v2_class_init, }; +TYPE_INFO(sx1_machine_v2_type) static void sx1_machine_v1_class_init(ObjectClass *oc, void *data) { @@ -247,11 +248,6 @@ static const TypeInfo sx1_machine_v1_type = { .parent = TYPE_MACHINE, .class_init = sx1_machine_v1_class_init, }; +TYPE_INFO(sx1_machine_v1_type) -static void sx1_machine_init(void) -{ - type_register_static(&sx1_machine_v1_type); - type_register_static(&sx1_machine_v2_type); -} -type_init(sx1_machine_init) diff --git a/hw/arm/palm.c b/hw/arm/palm.c index e7bc9ea4c6..7980d321ee 100644 --- a/hw/arm/palm.c +++ b/hw/arm/palm.c @@ -183,6 +183,7 @@ static const TypeInfo palm_misc_gpio_info = { * need to set up reset or vmstate, and has no realize method. */ }; +TYPE_INFO(palm_misc_gpio_info) static void palmte_gpio_setup(struct omap_mpu_state_s *cpu) { @@ -313,9 +314,4 @@ static void palmte_machine_init(MachineClass *mc) DEFINE_MACHINE("cheetah", palmte_machine_init) -static void palm_register_types(void) -{ - type_register_static(&palm_misc_gpio_info); -} -type_init(palm_register_types) diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 037d415498..e2acf9b724 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -1237,6 +1237,7 @@ static const TypeInfo pxa2xx_rtc_sysbus_info = { .instance_init = pxa2xx_rtc_init, .class_init = pxa2xx_rtc_sysbus_class_init, }; +TYPE_INFO(pxa2xx_rtc_sysbus_info) /* I2C Interface */ @@ -1497,6 +1498,7 @@ static const TypeInfo pxa2xx_i2c_slave_info = { .instance_size = sizeof(PXA2xxI2CSlaveState), .class_init = pxa2xx_i2c_slave_class_init, }; +TYPE_INFO(pxa2xx_i2c_slave_info) PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base, qemu_irq irq, uint32_t region_size) @@ -1567,6 +1569,7 @@ static const TypeInfo pxa2xx_i2c_info = { .instance_init = pxa2xx_i2c_initfn, .class_init = pxa2xx_i2c_class_init, }; +TYPE_INFO(pxa2xx_i2c_info) /* PXA Inter-IC Sound Controller */ static void pxa2xx_i2s_reset(PXA2xxI2SState *i2s) @@ -2057,6 +2060,7 @@ static const TypeInfo pxa2xx_fir_info = { .class_init = pxa2xx_fir_class_init, .instance_init = pxa2xx_fir_instance_init, }; +TYPE_INFO(pxa2xx_fir_info) static PXA2xxFIrState *pxa2xx_fir_init(MemoryRegion *sysmem, hwaddr base, @@ -2353,14 +2357,6 @@ static const TypeInfo pxa2xx_ssp_info = { .instance_init = pxa2xx_ssp_init, .class_init = pxa2xx_ssp_class_init, }; +TYPE_INFO(pxa2xx_ssp_info) -static void pxa2xx_register_types(void) -{ - type_register_static(&pxa2xx_i2c_slave_info); - type_register_static(&pxa2xx_ssp_info); - type_register_static(&pxa2xx_i2c_info); - type_register_static(&pxa2xx_rtc_sysbus_info); - type_register_static(&pxa2xx_fir_info); -} -type_init(pxa2xx_register_types) diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index d6d0d0b08e..a0f3592f17 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -361,10 +361,6 @@ static const TypeInfo pxa2xx_gpio_info = { .instance_init = pxa2xx_gpio_initfn, .class_init = pxa2xx_gpio_class_init, }; +TYPE_INFO(pxa2xx_gpio_info) -static void pxa2xx_gpio_register_types(void) -{ - type_register_static(&pxa2xx_gpio_info); -} -type_init(pxa2xx_gpio_register_types) diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index ceee6aa48d..bfc0dd8df6 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -330,10 +330,6 @@ static const TypeInfo pxa2xx_pic_info = { .instance_size = sizeof(PXA2xxPICState), .class_init = pxa2xx_pic_class_init, }; +TYPE_INFO(pxa2xx_pic_info) -static void pxa2xx_pic_register_types(void) -{ - type_register_static(&pxa2xx_pic_info); -} -type_init(pxa2xx_pic_register_types) diff --git a/hw/arm/realview.c b/hw/arm/realview.c index c1ff172b13..493097b1c5 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -394,6 +394,7 @@ static const TypeInfo realview_eb_type = { .parent = TYPE_MACHINE, .class_init = realview_eb_class_init, }; +TYPE_INFO(realview_eb_type) static void realview_eb_mpcore_class_init(ObjectClass *oc, void *data) { @@ -412,6 +413,7 @@ static const TypeInfo realview_eb_mpcore_type = { .parent = TYPE_MACHINE, .class_init = realview_eb_mpcore_class_init, }; +TYPE_INFO(realview_eb_mpcore_type) static void realview_pb_a8_class_init(ObjectClass *oc, void *data) { @@ -428,6 +430,7 @@ static const TypeInfo realview_pb_a8_type = { .parent = TYPE_MACHINE, .class_init = realview_pb_a8_class_init, }; +TYPE_INFO(realview_pb_a8_type) static void realview_pbx_a9_class_init(ObjectClass *oc, void *data) { @@ -445,13 +448,6 @@ static const TypeInfo realview_pbx_a9_type = { .parent = TYPE_MACHINE, .class_init = realview_pbx_a9_class_init, }; +TYPE_INFO(realview_pbx_a9_type) -static void realview_machine_init(void) -{ - type_register_static(&realview_eb_type); - type_register_static(&realview_eb_mpcore_type); - type_register_static(&realview_pb_a8_type); - type_register_static(&realview_pbx_a9_type); -} -type_init(realview_machine_init) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index f030a416fd..e6715ab638 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -797,10 +797,6 @@ static const TypeInfo sbsa_ref_info = { .class_init = sbsa_ref_class_init, .instance_size = sizeof(SBSAMachineState), }; +TYPE_INFO(sbsa_ref_info) -static void sbsa_ref_machine_init(void) -{ - type_register_static(&sbsa_ref_info); -} -type_init(sbsa_ref_machine_init); diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index e13a5f4a7c..265eed7b5b 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -477,11 +477,7 @@ static const TypeInfo smmu_base_info = { .class_init = smmu_base_class_init, .abstract = true, }; +TYPE_INFO(smmu_base_info) -static void smmu_base_register_types(void) -{ - type_register_static(&smmu_base_info); -} -type_init(smmu_base_register_types) diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index 7ac8254aa6..9c762ecedd 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -1055,6 +1055,7 @@ static const TypeInfo spitz_common_info = { .class_size = sizeof(SpitzMachineClass), .class_init = spitz_common_class_init, }; +TYPE_INFO(spitz_common_info) static void akitapda_class_init(ObjectClass *oc, void *data) { @@ -1072,6 +1073,7 @@ static const TypeInfo akitapda_type = { .parent = TYPE_SPITZ_MACHINE, .class_init = akitapda_class_init, }; +TYPE_INFO(akitapda_type) static void spitzpda_class_init(ObjectClass *oc, void *data) { @@ -1089,6 +1091,7 @@ static const TypeInfo spitzpda_type = { .parent = TYPE_SPITZ_MACHINE, .class_init = spitzpda_class_init, }; +TYPE_INFO(spitzpda_type) static void borzoipda_class_init(ObjectClass *oc, void *data) { @@ -1106,6 +1109,7 @@ static const TypeInfo borzoipda_type = { .parent = TYPE_SPITZ_MACHINE, .class_init = borzoipda_class_init, }; +TYPE_INFO(borzoipda_type) static void terrierpda_class_init(ObjectClass *oc, void *data) { @@ -1123,17 +1127,9 @@ static const TypeInfo terrierpda_type = { .parent = TYPE_SPITZ_MACHINE, .class_init = terrierpda_class_init, }; +TYPE_INFO(terrierpda_type) -static void spitz_machine_init(void) -{ - type_register_static(&spitz_common_info); - type_register_static(&akitapda_type); - type_register_static(&spitzpda_type); - type_register_static(&borzoipda_type); - type_register_static(&terrierpda_type); -} -type_init(spitz_machine_init) static bool is_version_0(void *opaque, int version_id) { @@ -1175,6 +1171,7 @@ static const TypeInfo sl_nand_info = { .instance_init = sl_nand_init, .class_init = sl_nand_class_init, }; +TYPE_INFO(sl_nand_info) static VMStateDescription vmstate_spitz_kbd = { .name = "spitz-keyboard", @@ -1204,6 +1201,7 @@ static const TypeInfo spitz_keyboard_info = { .instance_init = spitz_keyboard_init, .class_init = spitz_keyboard_class_init, }; +TYPE_INFO(spitz_keyboard_info) static const VMStateDescription vmstate_corgi_ssp_regs = { .name = "corgi-ssp", @@ -1232,6 +1230,7 @@ static const TypeInfo corgi_ssp_info = { .instance_size = sizeof(CorgiSSPState), .class_init = corgi_ssp_class_init, }; +TYPE_INFO(corgi_ssp_info) static const VMStateDescription vmstate_spitz_lcdtg_regs = { .name = "spitz-lcdtg", @@ -1261,6 +1260,7 @@ static const TypeInfo spitz_lcdtg_info = { .instance_size = sizeof(SpitzLCDTG), .class_init = spitz_lcdtg_class_init, }; +TYPE_INFO(spitz_lcdtg_info) static const TypeInfo spitz_misc_gpio_info = { .name = TYPE_SPITZ_MISC_GPIO, @@ -1272,14 +1272,6 @@ static const TypeInfo spitz_misc_gpio_info = { * need to set up reset or vmstate, and does not have a realize method. */ }; +TYPE_INFO(spitz_misc_gpio_info) -static void spitz_register_types(void) -{ - type_register_static(&corgi_ssp_info); - type_register_static(&spitz_lcdtg_info); - type_register_static(&spitz_keyboard_info); - type_register_static(&sl_nand_info); - type_register_static(&spitz_misc_gpio_info); -} -type_init(spitz_register_types) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 5f9d080180..0bf2be0e27 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1482,6 +1482,7 @@ static const TypeInfo lm3s811evb_type = { .parent = TYPE_MACHINE, .class_init = lm3s811evb_class_init, }; +TYPE_INFO(lm3s811evb_type) static void lm3s6965evb_class_init(ObjectClass *oc, void *data) { @@ -1498,14 +1499,9 @@ static const TypeInfo lm3s6965evb_type = { .parent = TYPE_MACHINE, .class_init = lm3s6965evb_class_init, }; +TYPE_INFO(lm3s6965evb_type) -static void stellaris_machine_init(void) -{ - type_register_static(&lm3s811evb_type); - type_register_static(&lm3s6965evb_type); -} -type_init(stellaris_machine_init) static void stellaris_i2c_class_init(ObjectClass *klass, void *data) { @@ -1521,6 +1517,7 @@ static const TypeInfo stellaris_i2c_info = { .instance_init = stellaris_i2c_init, .class_init = stellaris_i2c_class_init, }; +TYPE_INFO(stellaris_i2c_info) static void stellaris_gptm_class_init(ObjectClass *klass, void *data) { @@ -1537,6 +1534,7 @@ static const TypeInfo stellaris_gptm_info = { .instance_init = stellaris_gptm_init, .class_init = stellaris_gptm_class_init, }; +TYPE_INFO(stellaris_gptm_info) static void stellaris_adc_class_init(ObjectClass *klass, void *data) { @@ -1552,12 +1550,6 @@ static const TypeInfo stellaris_adc_info = { .instance_init = stellaris_adc_init, .class_init = stellaris_adc_class_init, }; +TYPE_INFO(stellaris_adc_info) -static void stellaris_register_types(void) -{ - type_register_static(&stellaris_i2c_info); - type_register_static(&stellaris_gptm_info); - type_register_static(&stellaris_adc_info); -} -type_init(stellaris_register_types) diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index a4f3344db2..38d2ea8b77 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -195,10 +195,6 @@ static const TypeInfo stm32f205_soc_info = { .instance_init = stm32f205_soc_initfn, .class_init = stm32f205_soc_class_init, }; +TYPE_INFO(stm32f205_soc_info) -static void stm32f205_soc_types(void) -{ - type_register_static(&stm32f205_soc_info); -} -type_init(stm32f205_soc_types) diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index cb04c11198..e24ff4c472 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -271,10 +271,6 @@ static const TypeInfo stm32f405_soc_info = { .instance_init = stm32f405_soc_initfn, .class_init = stm32f405_soc_class_init, }; +TYPE_INFO(stm32f405_soc_info) -static void stm32f405_soc_types(void) -{ - type_register_static(&stm32f405_soc_info); -} -type_init(stm32f405_soc_types) diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 2639b9ae55..5c1fb66b98 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -235,6 +235,7 @@ static const TypeInfo strongarm_pic_info = { .instance_init = strongarm_pic_initfn, .class_init = strongarm_pic_class_init, }; +TYPE_INFO(strongarm_pic_info) /* Real-Time Clock */ #define RTAR 0x00 /* RTC Alarm register */ @@ -466,6 +467,7 @@ static const TypeInfo strongarm_rtc_sysbus_info = { .instance_init = strongarm_rtc_init, .class_init = strongarm_rtc_sysbus_class_init, }; +TYPE_INFO(strongarm_rtc_sysbus_info) /* GPIO */ #define GPLR 0x00 @@ -708,6 +710,7 @@ static const TypeInfo strongarm_gpio_info = { .instance_init = strongarm_gpio_initfn, .class_init = strongarm_gpio_class_init, }; +TYPE_INFO(strongarm_gpio_info) /* Peripheral Pin Controller */ #define PPDR 0x00 @@ -878,6 +881,7 @@ static const TypeInfo strongarm_ppc_info = { .instance_init = strongarm_ppc_init, .class_init = strongarm_ppc_class_init, }; +TYPE_INFO(strongarm_ppc_info) /* UART Ports */ #define UTCR0 0x00 @@ -1345,6 +1349,7 @@ static const TypeInfo strongarm_uart_info = { .instance_init = strongarm_uart_init, .class_init = strongarm_uart_class_init, }; +TYPE_INFO(strongarm_uart_info) /* Synchronous Serial Ports */ @@ -1591,6 +1596,7 @@ static const TypeInfo strongarm_ssp_info = { .instance_init = strongarm_ssp_init, .class_init = strongarm_ssp_class_init, }; +TYPE_INFO(strongarm_ssp_info) /* Main CPU functions */ StrongARMState *sa1110_init(const char *cpu_type) @@ -1643,14 +1649,4 @@ StrongARMState *sa1110_init(const char *cpu_type) return s; } -static void strongarm_register_types(void) -{ - type_register_static(&strongarm_pic_info); - type_register_static(&strongarm_rtc_sysbus_info); - type_register_static(&strongarm_gpio_info); - type_register_static(&strongarm_ppc_info); - type_register_static(&strongarm_uart_info); - type_register_static(&strongarm_ssp_info); -} -type_init(strongarm_register_types) diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c index e29566f7b3..86a1a21adf 100644 --- a/hw/arm/tosa.c +++ b/hw/arm/tosa.c @@ -299,6 +299,7 @@ static const TypeInfo tosa_dac_info = { .instance_size = sizeof(TosaDACState), .class_init = tosa_dac_class_init, }; +TYPE_INFO(tosa_dac_info) static void tosa_ssp_class_init(ObjectClass *klass, void *data) { @@ -314,6 +315,7 @@ static const TypeInfo tosa_ssp_info = { .instance_size = sizeof(SSISlave), .class_init = tosa_ssp_class_init, }; +TYPE_INFO(tosa_ssp_info) static const TypeInfo tosa_misc_gpio_info = { .name = "tosa-misc-gpio", @@ -325,12 +327,6 @@ static const TypeInfo tosa_misc_gpio_info = { * need to set up reset or vmstate, and has no realize method. */ }; +TYPE_INFO(tosa_misc_gpio_info) -static void tosa_register_types(void) -{ - type_register_static(&tosa_dac_info); - type_register_static(&tosa_ssp_info); - type_register_static(&tosa_misc_gpio_info); -} -type_init(tosa_register_types) diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 9dc93182b6..c89fe65d97 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -404,6 +404,7 @@ static const TypeInfo versatilepb_type = { .parent = TYPE_MACHINE, .class_init = versatilepb_class_init, }; +TYPE_INFO(versatilepb_type) static void versatileab_class_init(ObjectClass *oc, void *data) { @@ -422,14 +423,9 @@ static const TypeInfo versatileab_type = { .parent = TYPE_MACHINE, .class_init = versatileab_class_init, }; +TYPE_INFO(versatileab_type) -static void versatile_machine_init(void) -{ - type_register_static(&versatilepb_type); - type_register_static(&versatileab_type); -} -type_init(versatile_machine_init) static void vpb_sic_class_init(ObjectClass *klass, void *data) { @@ -445,10 +441,6 @@ static const TypeInfo vpb_sic_info = { .instance_init = vpb_sic_init, .class_init = vpb_sic_class_init, }; +TYPE_INFO(vpb_sic_info) -static void versatilepb_register_types(void) -{ - type_register_static(&vpb_sic_info); -} -type_init(versatilepb_register_types) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 1dc971c34f..4efbe82cb3 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -822,6 +822,7 @@ static const TypeInfo vexpress_info = { .class_size = sizeof(VexpressMachineClass), .class_init = vexpress_class_init, }; +TYPE_INFO(vexpress_info) static const TypeInfo vexpress_a9_info = { .name = TYPE_VEXPRESS_A9_MACHINE, @@ -829,6 +830,7 @@ static const TypeInfo vexpress_a9_info = { .class_init = vexpress_a9_class_init, .instance_init = vexpress_a9_instance_init, }; +TYPE_INFO(vexpress_a9_info) static const TypeInfo vexpress_a15_info = { .name = TYPE_VEXPRESS_A15_MACHINE, @@ -836,12 +838,6 @@ static const TypeInfo vexpress_a15_info = { .class_init = vexpress_a15_class_init, .instance_init = vexpress_a15_instance_init, }; +TYPE_INFO(vexpress_a15_info) -static void vexpress_machine_init(void) -{ - type_register_static(&vexpress_info); - type_register_static(&vexpress_a9_info); - type_register_static(&vexpress_a15_info); -} -type_init(vexpress_machine_init); diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ecfee362a1..5528121d37 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2539,12 +2539,8 @@ static const TypeInfo virt_machine_info = { { } }, }; +TYPE_INFO(virt_machine_info) -static void machvirt_machine_init(void) -{ - type_register_static(&virt_machine_info); -} -type_init(machvirt_machine_init); static void virt_machine_5_1_options(MachineClass *mc) { diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 32aa7323d9..0ba9e8c708 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -355,10 +355,6 @@ static const TypeInfo zynq_machine_type = { .class_init = zynq_machine_class_init, .instance_size = sizeof(ZynqMachineState), }; +TYPE_INFO(zynq_machine_type) -static void zynq_machine_register_types(void) -{ - type_register_static(&zynq_machine_type); -} -type_init(zynq_machine_register_types) diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 4b3152ee77..f55295a816 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -574,11 +574,7 @@ static const TypeInfo versal_virt_machine_init_typeinfo = { .instance_init = versal_virt_machine_instance_init, .instance_size = sizeof(VersalVirt), }; +TYPE_INFO(versal_virt_machine_init_typeinfo) -static void versal_virt_machine_init_register_types(void) -{ - type_register_static(&versal_virt_machine_init_typeinfo); -} -type_init(versal_virt_machine_init_register_types) diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index e3aa4bd1e5..7f3bc84962 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -378,10 +378,6 @@ static const TypeInfo versal_info = { .instance_init = versal_init, .class_init = versal_class_init, }; +TYPE_INFO(versal_info) -static void versal_register_types(void) -{ - type_register_static(&versal_info); -} -type_init(versal_register_types); diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 5997262459..6d1f38a99c 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -244,10 +244,6 @@ static const TypeInfo xlnx_zcu102_machine_init_typeinfo = { .instance_init = xlnx_zcu102_machine_instance_init, .instance_size = sizeof(XlnxZCU102), }; +TYPE_INFO(xlnx_zcu102_machine_init_typeinfo) -static void xlnx_zcu102_machine_init_register_types(void) -{ - type_register_static(&xlnx_zcu102_machine_init_typeinfo); -} -type_init(xlnx_zcu102_machine_init_register_types) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index c435b9d52a..9448e71059 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -637,10 +637,6 @@ static const TypeInfo xlnx_zynqmp_type_info = { .instance_init = xlnx_zynqmp_init, .class_init = xlnx_zynqmp_class_init, }; +TYPE_INFO(xlnx_zynqmp_type_info) -static void xlnx_zynqmp_register_types(void) -{ - type_register_static(&xlnx_zynqmp_type_info); -} -type_init(xlnx_zynqmp_register_types) diff --git a/hw/audio/cs4231.c b/hw/audio/cs4231.c index 11a6328fc2..2f8f75845e 100644 --- a/hw/audio/cs4231.c +++ b/hw/audio/cs4231.c @@ -178,10 +178,6 @@ static const TypeInfo cs4231_info = { .instance_init = cs4231_init, .class_init = cs4231_class_init, }; +TYPE_INFO(cs4231_info) -static void cs4231_register_types(void) -{ - type_register_static(&cs4231_info); -} -type_init(cs4231_register_types) diff --git a/hw/audio/hda-codec.c b/hw/audio/hda-codec.c index cbd92b72f2..b6ea5b3b75 100644 --- a/hw/audio/hda-codec.c +++ b/hw/audio/hda-codec.c @@ -901,6 +901,7 @@ static const TypeInfo hda_audio_info = { .class_init = hda_audio_base_class_init, .abstract = true, }; +TYPE_INFO(hda_audio_info) static void hda_audio_output_class_init(ObjectClass *klass, void *data) { @@ -917,6 +918,7 @@ static const TypeInfo hda_audio_output_info = { .instance_size = sizeof(HDAAudioState), .class_init = hda_audio_output_class_init, }; +TYPE_INFO(hda_audio_output_info) static void hda_audio_duplex_class_init(ObjectClass *klass, void *data) { @@ -933,6 +935,7 @@ static const TypeInfo hda_audio_duplex_info = { .instance_size = sizeof(HDAAudioState), .class_init = hda_audio_duplex_class_init, }; +TYPE_INFO(hda_audio_duplex_info) static void hda_audio_micro_class_init(ObjectClass *klass, void *data) { @@ -949,13 +952,6 @@ static const TypeInfo hda_audio_micro_info = { .instance_size = sizeof(HDAAudioState), .class_init = hda_audio_micro_class_init, }; +TYPE_INFO(hda_audio_micro_info) -static void hda_audio_register_types(void) -{ - type_register_static(&hda_audio_info); - type_register_static(&hda_audio_output_info); - type_register_static(&hda_audio_duplex_info); - type_register_static(&hda_audio_micro_info); -} -type_init(hda_audio_register_types) diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index f6cea49686..ceae0b33af 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -46,6 +46,7 @@ static const TypeInfo hda_codec_bus_info = { .parent = TYPE_BUS, .instance_size = sizeof(HDACodecBus), }; +TYPE_INFO(hda_codec_bus_info) void hda_codec_bus_init(DeviceState *dev, HDACodecBus *bus, size_t bus_size, hda_codec_response_func response, @@ -1266,18 +1267,21 @@ static const TypeInfo intel_hda_info = { { }, }, }; +TYPE_INFO(intel_hda_info) static const TypeInfo intel_hda_info_ich6 = { .name = "intel-hda", .parent = TYPE_INTEL_HDA_GENERIC, .class_init = intel_hda_class_init_ich6, }; +TYPE_INFO(intel_hda_info_ich6) static const TypeInfo intel_hda_info_ich9 = { .name = "ich9-intel-hda", .parent = TYPE_INTEL_HDA_GENERIC, .class_init = intel_hda_class_init_ich9, }; +TYPE_INFO(intel_hda_info_ich9) static void hda_codec_device_class_init(ObjectClass *klass, void *data) { @@ -1297,6 +1301,7 @@ static const TypeInfo hda_codec_device_type_info = { .class_size = sizeof(HDACodecDeviceClass), .class_init = hda_codec_device_class_init, }; +TYPE_INFO(hda_codec_device_type_info) /* * create intel hda controller with codec attached to it, @@ -1319,11 +1324,6 @@ static int intel_hda_and_codec_init(PCIBus *bus) static void intel_hda_register_types(void) { - type_register_static(&hda_codec_bus_info); - type_register_static(&intel_hda_info); - type_register_static(&intel_hda_info_ich6); - type_register_static(&intel_hda_info_ich9); - type_register_static(&hda_codec_device_type_info); pci_register_soundhw("hda", "Intel HD Audio", intel_hda_and_codec_init); } diff --git a/hw/audio/marvell_88w8618.c b/hw/audio/marvell_88w8618.c index 8dfacec693..1dcee64ef0 100644 --- a/hw/audio/marvell_88w8618.c +++ b/hw/audio/marvell_88w8618.c @@ -304,10 +304,6 @@ static const TypeInfo mv88w8618_audio_info = { .instance_init = mv88w8618_audio_init, .class_init = mv88w8618_audio_class_init, }; +TYPE_INFO(mv88w8618_audio_info) -static void mv88w8618_register_types(void) -{ - type_register_static(&mv88w8618_audio_info); -} -type_init(mv88w8618_register_types) diff --git a/hw/audio/milkymist-ac97.c b/hw/audio/milkymist-ac97.c index 0fa38adbe2..051dc3bfad 100644 --- a/hw/audio/milkymist-ac97.c +++ b/hw/audio/milkymist-ac97.c @@ -352,10 +352,6 @@ static const TypeInfo milkymist_ac97_info = { .instance_init = milkymist_ac97_init, .class_init = milkymist_ac97_class_init, }; +TYPE_INFO(milkymist_ac97_info) -static void milkymist_ac97_register_types(void) -{ - type_register_static(&milkymist_ac97_info); -} -type_init(milkymist_ac97_register_types) diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c index ea539e7605..ed7730fc18 100644 --- a/hw/audio/pcspk.c +++ b/hw/audio/pcspk.c @@ -244,6 +244,7 @@ static const TypeInfo pcspk_info = { .instance_init = pcspk_initfn, .class_init = pcspk_class_initfn, }; +TYPE_INFO(pcspk_info) static int pcspk_audio_init_soundhw(ISABus *bus) { @@ -256,7 +257,6 @@ static int pcspk_audio_init_soundhw(ISABus *bus) static void pcspk_register(void) { - type_register_static(&pcspk_info); isa_register_soundhw("pcspk", "PC speaker", pcspk_audio_init_soundhw); } type_init(pcspk_register) diff --git a/hw/audio/pl041.c b/hw/audio/pl041.c index c3d3eab6ed..96748cb15a 100644 --- a/hw/audio/pl041.c +++ b/hw/audio/pl041.c @@ -650,10 +650,6 @@ static const TypeInfo pl041_device_info = { .instance_init = pl041_init, .class_init = pl041_device_class_init, }; +TYPE_INFO(pl041_device_info) -static void pl041_register_types(void) -{ - type_register_static(&pl041_device_info); -} -type_init(pl041_register_types) diff --git a/hw/audio/wm8750.c b/hw/audio/wm8750.c index 92b2902a10..d867442d29 100644 --- a/hw/audio/wm8750.c +++ b/hw/audio/wm8750.c @@ -726,10 +726,6 @@ static const TypeInfo wm8750_info = { .instance_size = sizeof(WM8750State), .class_init = wm8750_class_init, }; +TYPE_INFO(wm8750_info) -static void wm8750_register_types(void) -{ - type_register_static(&wm8750_info); -} -type_init(wm8750_register_types) diff --git a/hw/block/fdc.c b/hw/block/fdc.c index e9ed3eef45..5e7013a752 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -80,6 +80,7 @@ static const TypeInfo floppy_bus_info = { .parent = TYPE_BUS, .instance_size = sizeof(FloppyBus), }; +TYPE_INFO(floppy_bus_info) static void floppy_bus_create(FDCtrl *fdc, FloppyBus *bus, DeviceState *dev) { @@ -620,6 +621,7 @@ static const TypeInfo floppy_drive_info = { .instance_size = sizeof(FloppyDrive), .class_init = floppy_drive_class_init, }; +TYPE_INFO(floppy_drive_info) /********************************************************/ /* Intel 82078 floppy disk controller emulation */ @@ -2940,6 +2942,7 @@ static const TypeInfo isa_fdc_info = { .class_init = isabus_fdc_class_init, .instance_init = isabus_fdc_instance_init, }; +TYPE_INFO(isa_fdc_info) static const VMStateDescription vmstate_sysbus_fdc ={ .name = "fdc", @@ -2980,6 +2983,7 @@ static const TypeInfo sysbus_fdc_info = { .instance_init = sysbus_fdc_initfn, .class_init = sysbus_fdc_class_init, }; +TYPE_INFO(sysbus_fdc_info) static Property sun4m_fdc_properties[] = { DEFINE_PROP_DRIVE("drive", FDCtrlSysBus, state.qdev_for_drives[0].blk), @@ -3006,6 +3010,7 @@ static const TypeInfo sun4m_fdc_info = { .instance_init = sun4m_fdc_initfn, .class_init = sun4m_fdc_class_init, }; +TYPE_INFO(sun4m_fdc_info) static void sysbus_fdc_common_class_init(ObjectClass *klass, void *data) { @@ -3024,15 +3029,6 @@ static const TypeInfo sysbus_fdc_type_info = { .abstract = true, .class_init = sysbus_fdc_common_class_init, }; +TYPE_INFO(sysbus_fdc_type_info) -static void fdc_register_types(void) -{ - type_register_static(&isa_fdc_info); - type_register_static(&sysbus_fdc_type_info); - type_register_static(&sysbus_fdc_info); - type_register_static(&sun4m_fdc_info); - type_register_static(&floppy_bus_info); - type_register_static(&floppy_drive_info); -} -type_init(fdc_register_types) diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index 8227088441..7f9492eee6 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -1407,12 +1407,12 @@ static const TypeInfo m25p80_info = { .class_size = sizeof(M25P80Class), .abstract = true, }; +TYPE_INFO(m25p80_info) static void m25p80_register_types(void) { int i; - type_register_static(&m25p80_info); for (i = 0; i < ARRAY_SIZE(known_devices); ++i) { TypeInfo ti = { .name = known_devices[i].part_name, diff --git a/hw/block/nand.c b/hw/block/nand.c index 654e0cb5d1..991a6e13e8 100644 --- a/hw/block/nand.c +++ b/hw/block/nand.c @@ -457,11 +457,8 @@ static const TypeInfo nand_info = { .instance_size = sizeof(NANDFlashState), .class_init = nand_class_init, }; +TYPE_INFO(nand_info) -static void nand_register_types(void) -{ - type_register_static(&nand_info); -} /* * Chip inputs are CLE, ALE, CE, WP, GND and eight I/O pins. Chip @@ -655,7 +652,6 @@ DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id) return dev; } -type_init(nand_register_types) #else diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 3426e17e65..a8fe997626 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -1697,10 +1697,6 @@ static const TypeInfo nvme_info = { { } }, }; +TYPE_INFO(nvme_info) -static void nvme_register_types(void) -{ - type_register_static(&nvme_info); -} -type_init(nvme_register_types) diff --git a/hw/block/onenand.c b/hw/block/onenand.c index 898ac563a3..d2c4e140e9 100644 --- a/hw/block/onenand.c +++ b/hw/block/onenand.c @@ -854,11 +854,8 @@ static const TypeInfo onenand_info = { .instance_size = sizeof(OneNANDState), .class_init = onenand_class_init, }; +TYPE_INFO(onenand_info) -static void onenand_register_types(void) -{ - type_register_static(&onenand_info); -} void *onenand_raw_otp(DeviceState *onenand_device) { @@ -867,4 +864,3 @@ void *onenand_raw_otp(DeviceState *onenand_device) return s->otp; } -type_init(onenand_register_types) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 8ab1d66310..252a6e340b 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -940,13 +940,9 @@ static const TypeInfo pflash_cfi01_info = { .instance_size = sizeof(PFlashCFI01), .class_init = pflash_cfi01_class_init, }; +TYPE_INFO(pflash_cfi01_info) -static void pflash_cfi01_register_types(void) -{ - type_register_static(&pflash_cfi01_info); -} -type_init(pflash_cfi01_register_types) PFlashCFI01 *pflash_cfi01_register(hwaddr base, const char *name, diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index eb02fccfa5..4806761e9c 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -977,13 +977,9 @@ static const TypeInfo pflash_cfi02_info = { .instance_size = sizeof(PFlashCFI02), .class_init = pflash_cfi02_class_init, }; +TYPE_INFO(pflash_cfi02_info) -static void pflash_cfi02_register_types(void) -{ - type_register_static(&pflash_cfi02_info); -} -type_init(pflash_cfi02_register_types) PFlashCFI02 *pflash_cfi02_register(hwaddr base, const char *name, diff --git a/hw/block/swim.c b/hw/block/swim.c index 74f56e8f46..1c7edecd93 100644 --- a/hw/block/swim.c +++ b/hw/block/swim.c @@ -252,12 +252,14 @@ static const TypeInfo swim_drive_info = { .instance_size = sizeof(SWIMDrive), .class_init = swim_drive_class_init, }; +TYPE_INFO(swim_drive_info) static const TypeInfo swim_bus_info = { .name = TYPE_SWIM_BUS, .parent = TYPE_BUS, .instance_size = sizeof(SWIMBus), }; +TYPE_INFO(swim_bus_info) static void iwmctrl_write(void *opaque, hwaddr reg, uint64_t value, unsigned size) @@ -481,12 +483,6 @@ static const TypeInfo sysbus_swim_info = { .instance_init = sysbus_swim_init, .class_init = sysbus_swim_class_init, }; +TYPE_INFO(sysbus_swim_info) -static void swim_register_types(void) -{ - type_register_static(&sysbus_swim_info); - type_register_static(&swim_bus_info); - type_register_static(&swim_drive_info); -} -type_init(swim_register_types) diff --git a/hw/block/vhost-user-blk.c b/hw/block/vhost-user-blk.c index a00b854736..f8490ece8f 100644 --- a/hw/block/vhost-user-blk.c +++ b/hw/block/vhost-user-blk.c @@ -561,10 +561,6 @@ static const TypeInfo vhost_user_blk_info = { .instance_init = vhost_user_blk_instance_init, .class_init = vhost_user_blk_class_init, }; +TYPE_INFO(vhost_user_blk_info) -static void virtio_register_types(void) -{ - type_register_static(&vhost_user_blk_info); -} -type_init(virtio_register_types) diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c index 413783693c..aedc9dbeec 100644 --- a/hw/block/virtio-blk.c +++ b/hw/block/virtio-blk.c @@ -1327,10 +1327,6 @@ static const TypeInfo virtio_blk_info = { .instance_init = virtio_blk_instance_init, .class_init = virtio_blk_class_init, }; +TYPE_INFO(virtio_blk_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_blk_info); -} -type_init(virtio_register_types) diff --git a/hw/block/xen-block.c b/hw/block/xen-block.c index 8a7a3f5452..055b55dcf6 100644 --- a/hw/block/xen-block.c +++ b/hw/block/xen-block.c @@ -555,6 +555,7 @@ static const TypeInfo xen_block_type_info = { .class_size = sizeof(XenBlockDeviceClass), .class_init = xen_block_class_init, }; +TYPE_INFO(xen_block_type_info) static void xen_disk_unrealize(XenBlockDevice *blockdev) { @@ -594,6 +595,7 @@ static const TypeInfo xen_disk_type_info = { .instance_size = sizeof(XenDiskDevice), .class_init = xen_disk_class_init, }; +TYPE_INFO(xen_disk_type_info) static void xen_cdrom_unrealize(XenBlockDevice *blockdev) { @@ -641,15 +643,9 @@ static const TypeInfo xen_cdrom_type_info = { .instance_size = sizeof(XenCDRomDevice), .class_init = xen_cdrom_class_init, }; +TYPE_INFO(xen_cdrom_type_info) -static void xen_block_register_types(void) -{ - type_register_static(&xen_block_type_info); - type_register_static(&xen_disk_type_info); - type_register_static(&xen_cdrom_type_info); -} -type_init(xen_block_register_types) static void xen_block_blockdev_del(const char *node_name, Error **errp) { diff --git a/hw/char/avr_usart.c b/hw/char/avr_usart.c index fbe2a112b7..da605c9f96 100644 --- a/hw/char/avr_usart.c +++ b/hw/char/avr_usart.c @@ -311,10 +311,6 @@ static const TypeInfo avr_usart_info = { .instance_init = avr_usart_init, .class_init = avr_usart_class_init, }; +TYPE_INFO(avr_usart_info) -static void avr_usart_register_types(void) -{ - type_register_static(&avr_usart_info); -} -type_init(avr_usart_register_types) diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c index ee3dd40e3c..7f19205355 100644 --- a/hw/char/bcm2835_aux.c +++ b/hw/char/bcm2835_aux.c @@ -309,10 +309,6 @@ static const TypeInfo bcm2835_aux_info = { .instance_init = bcm2835_aux_init, .class_init = bcm2835_aux_class_init, }; +TYPE_INFO(bcm2835_aux_info) -static void bcm2835_aux_register_types(void) -{ - type_register_static(&bcm2835_aux_info); -} -type_init(bcm2835_aux_register_types) diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c index e196906c92..cdc8b9c71d 100644 --- a/hw/char/cadence_uart.c +++ b/hw/char/cadence_uart.c @@ -613,10 +613,6 @@ static const TypeInfo cadence_uart_info = { .instance_init = cadence_uart_init, .class_init = cadence_uart_class_init, }; +TYPE_INFO(cadence_uart_info) -static void cadence_uart_register_types(void) -{ - type_register_static(&cadence_uart_info); -} -type_init(cadence_uart_register_types) diff --git a/hw/char/cmsdk-apb-uart.c b/hw/char/cmsdk-apb-uart.c index 626b68f2ec..2b5e10a5e9 100644 --- a/hw/char/cmsdk-apb-uart.c +++ b/hw/char/cmsdk-apb-uart.c @@ -399,10 +399,6 @@ static const TypeInfo cmsdk_apb_uart_info = { .instance_init = cmsdk_apb_uart_init, .class_init = cmsdk_apb_uart_class_init, }; +TYPE_INFO(cmsdk_apb_uart_info) -static void cmsdk_apb_uart_register_types(void) -{ - type_register_static(&cmsdk_apb_uart_info); -} -type_init(cmsdk_apb_uart_register_types); diff --git a/hw/char/debugcon.c b/hw/char/debugcon.c index c8d938efb5..7c29b9cbcf 100644 --- a/hw/char/debugcon.c +++ b/hw/char/debugcon.c @@ -135,10 +135,6 @@ static const TypeInfo debugcon_isa_info = { .instance_size = sizeof(ISADebugconState), .class_init = debugcon_isa_class_initfn, }; +TYPE_INFO(debugcon_isa_info) -static void debugcon_register_types(void) -{ - type_register_static(&debugcon_isa_info); -} -type_init(debugcon_register_types) diff --git a/hw/char/digic-uart.c b/hw/char/digic-uart.c index e130cb4692..c86059ed0b 100644 --- a/hw/char/digic-uart.c +++ b/hw/char/digic-uart.c @@ -193,10 +193,6 @@ static const TypeInfo digic_uart_info = { .instance_init = digic_uart_init, .class_init = digic_uart_class_init, }; +TYPE_INFO(digic_uart_info) -static void digic_uart_register_types(void) -{ - type_register_static(&digic_uart_info); -} -type_init(digic_uart_register_types) diff --git a/hw/char/escc.c b/hw/char/escc.c index 7d16ee8688..da8e089407 100644 --- a/hw/char/escc.c +++ b/hw/char/escc.c @@ -876,10 +876,6 @@ static const TypeInfo escc_info = { .instance_init = escc_init1, .class_init = escc_class_init, }; +TYPE_INFO(escc_info) -static void escc_register_types(void) -{ - type_register_static(&escc_info); -} -type_init(escc_register_types) diff --git a/hw/char/etraxfs_ser.c b/hw/char/etraxfs_ser.c index 947bdb649a..5b70c85b9b 100644 --- a/hw/char/etraxfs_ser.c +++ b/hw/char/etraxfs_ser.c @@ -255,10 +255,6 @@ static const TypeInfo etraxfs_ser_info = { .instance_init = etraxfs_ser_init, .class_init = etraxfs_ser_class_init, }; +TYPE_INFO(etraxfs_ser_info) -static void etraxfs_serial_register_types(void) -{ - type_register_static(&etraxfs_ser_info); -} -type_init(etraxfs_serial_register_types) diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c index 9c8ab3a77d..a59826a3df 100644 --- a/hw/char/exynos4210_uart.c +++ b/hw/char/exynos4210_uart.c @@ -723,10 +723,6 @@ static const TypeInfo exynos4210_uart_info = { .instance_init = exynos4210_uart_init, .class_init = exynos4210_uart_class_init, }; +TYPE_INFO(exynos4210_uart_info) -static void exynos4210_uart_register(void) -{ - type_register_static(&exynos4210_uart_info); -} -type_init(exynos4210_uart_register) diff --git a/hw/char/grlib_apbuart.c b/hw/char/grlib_apbuart.c index 16d0feac59..581111ce75 100644 --- a/hw/char/grlib_apbuart.c +++ b/hw/char/grlib_apbuart.c @@ -294,10 +294,6 @@ static const TypeInfo grlib_apbuart_info = { .instance_size = sizeof(UART), .class_init = grlib_apbuart_class_init, }; +TYPE_INFO(grlib_apbuart_info) -static void grlib_apbuart_register_types(void) -{ - type_register_static(&grlib_apbuart_info); -} -type_init(grlib_apbuart_register_types) diff --git a/hw/char/ibex_uart.c b/hw/char/ibex_uart.c index cc49a35013..f88f69f98c 100644 --- a/hw/char/ibex_uart.c +++ b/hw/char/ibex_uart.c @@ -507,10 +507,6 @@ static const TypeInfo ibex_uart_info = { .instance_init = ibex_uart_init, .class_init = ibex_uart_class_init, }; +TYPE_INFO(ibex_uart_info) -static void ibex_uart_register_types(void) -{ - type_register_static(&ibex_uart_info); -} -type_init(ibex_uart_register_types) diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c index 731b8fc64c..17abb067ea 100644 --- a/hw/char/imx_serial.c +++ b/hw/char/imx_serial.c @@ -382,10 +382,6 @@ static const TypeInfo imx_serial_info = { .instance_init = imx_serial_init, .class_init = imx_serial_class_init, }; +TYPE_INFO(imx_serial_info) -static void imx_serial_register_types(void) -{ - type_register_static(&imx_serial_info); -} -type_init(imx_serial_register_types) diff --git a/hw/char/ipoctal232.c b/hw/char/ipoctal232.c index d7c497b939..b94ebf2791 100644 --- a/hw/char/ipoctal232.c +++ b/hw/char/ipoctal232.c @@ -598,10 +598,6 @@ static const TypeInfo ipoctal_info = { .instance_size = sizeof(IPOctalState), .class_init = ipoctal_class_init, }; +TYPE_INFO(ipoctal_info) -static void ipoctal_register_types(void) -{ - type_register_static(&ipoctal_info); -} -type_init(ipoctal_register_types) diff --git a/hw/char/lm32_juart.c b/hw/char/lm32_juart.c index 3f34861233..bd4a778d38 100644 --- a/hw/char/lm32_juart.c +++ b/hw/char/lm32_juart.c @@ -156,10 +156,6 @@ static const TypeInfo lm32_juart_info = { .instance_size = sizeof(LM32JuartState), .class_init = lm32_juart_class_init, }; +TYPE_INFO(lm32_juart_info) -static void lm32_juart_register_types(void) -{ - type_register_static(&lm32_juart_info); -} -type_init(lm32_juart_register_types) diff --git a/hw/char/lm32_uart.c b/hw/char/lm32_uart.c index b0b1092889..266808790f 100644 --- a/hw/char/lm32_uart.c +++ b/hw/char/lm32_uart.c @@ -304,10 +304,6 @@ static const TypeInfo lm32_uart_info = { .instance_init = lm32_uart_init, .class_init = lm32_uart_class_init, }; +TYPE_INFO(lm32_uart_info) -static void lm32_uart_register_types(void) -{ - type_register_static(&lm32_uart_info); -} -type_init(lm32_uart_register_types) diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c index 8d1b7f2bca..ec41736980 100644 --- a/hw/char/mcf_uart.c +++ b/hw/char/mcf_uart.c @@ -332,13 +332,9 @@ static const TypeInfo mcf_uart_info = { .instance_init = mcf_uart_instance_init, .class_init = mcf_uart_class_init, }; +TYPE_INFO(mcf_uart_info) -static void mcf_uart_register(void) -{ - type_register_static(&mcf_uart_info); -} -type_init(mcf_uart_register) void *mcf_uart_init(qemu_irq irq, Chardev *chrdrv) { diff --git a/hw/char/milkymist-uart.c b/hw/char/milkymist-uart.c index 1439efb42a..d3cb7c9140 100644 --- a/hw/char/milkymist-uart.c +++ b/hw/char/milkymist-uart.c @@ -249,10 +249,6 @@ static const TypeInfo milkymist_uart_info = { .instance_init = milkymist_uart_init, .class_init = milkymist_uart_class_init, }; +TYPE_INFO(milkymist_uart_info) -static void milkymist_uart_register_types(void) -{ - type_register_static(&milkymist_uart_info); -} -type_init(milkymist_uart_register_types) diff --git a/hw/char/nrf51_uart.c b/hw/char/nrf51_uart.c index d1fef77acd..0715f8b019 100644 --- a/hw/char/nrf51_uart.c +++ b/hw/char/nrf51_uart.c @@ -325,10 +325,6 @@ static const TypeInfo nrf51_uart_info = { .instance_init = nrf51_uart_init, .class_init = nrf51_uart_class_init }; +TYPE_INFO(nrf51_uart_info) -static void nrf51_uart_register_types(void) -{ - type_register_static(&nrf51_uart_info); -} -type_init(nrf51_uart_register_types) diff --git a/hw/char/parallel.c b/hw/char/parallel.c index c0f34bf924..8f09384066 100644 --- a/hw/char/parallel.c +++ b/hw/char/parallel.c @@ -659,10 +659,6 @@ static const TypeInfo parallel_isa_info = { .instance_size = sizeof(ISAParallelState), .class_init = parallel_isa_class_initfn, }; +TYPE_INFO(parallel_isa_info) -static void parallel_register_types(void) -{ - type_register_static(¶llel_isa_info); -} -type_init(parallel_register_types) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 13e784f9d9..422c9e660a 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -366,6 +366,7 @@ static const TypeInfo pl011_arm_info = { .instance_init = pl011_init, .class_init = pl011_class_init, }; +TYPE_INFO(pl011_arm_info) static void pl011_luminary_init(Object *obj) { @@ -379,11 +380,6 @@ static const TypeInfo pl011_luminary_info = { .parent = TYPE_PL011, .instance_init = pl011_luminary_init, }; +TYPE_INFO(pl011_luminary_info) -static void pl011_register_types(void) -{ - type_register_static(&pl011_arm_info); - type_register_static(&pl011_luminary_info); -} -type_init(pl011_register_types) diff --git a/hw/char/renesas_sci.c b/hw/char/renesas_sci.c index 5d7c6e6523..041557a4f1 100644 --- a/hw/char/renesas_sci.c +++ b/hw/char/renesas_sci.c @@ -341,10 +341,6 @@ static const TypeInfo rsci_info = { .instance_init = rsci_init, .class_init = rsci_class_init, }; +TYPE_INFO(rsci_info) -static void rsci_register_types(void) -{ - type_register_static(&rsci_info); -} -type_init(rsci_register_types) diff --git a/hw/char/sclpconsole-lm.c b/hw/char/sclpconsole-lm.c index 2b5f37b6a2..0a277b8c37 100644 --- a/hw/char/sclpconsole-lm.c +++ b/hw/char/sclpconsole-lm.c @@ -361,10 +361,6 @@ static const TypeInfo sclp_console_info = { .class_init = console_class_init, .class_size = sizeof(SCLPEventClass), }; +TYPE_INFO(sclp_console_info) -static void register_types(void) -{ - type_register_static(&sclp_console_info); -} -type_init(register_types) diff --git a/hw/char/sclpconsole.c b/hw/char/sclpconsole.c index 5c7664905e..2e960973e2 100644 --- a/hw/char/sclpconsole.c +++ b/hw/char/sclpconsole.c @@ -277,10 +277,6 @@ static const TypeInfo sclp_console_info = { .class_init = console_class_init, .class_size = sizeof(SCLPEventClass), }; +TYPE_INFO(sclp_console_info) -static void register_types(void) -{ - type_register_static(&sclp_console_info); -} -type_init(register_types) diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index b4c65949cd..35a1ee3a30 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -146,13 +146,9 @@ static const TypeInfo serial_isa_info = { .instance_init = serial_isa_initfn, .class_init = serial_isa_class_initfn, }; +TYPE_INFO(serial_isa_info) -static void serial_register_types(void) -{ - type_register_static(&serial_isa_info); -} -type_init(serial_register_types) static void serial_isa_init(ISABus *bus, int index, Chardev *chr) { diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 2cf3e44177..591c625b1d 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -199,6 +199,7 @@ static const TypeInfo multi_2x_serial_pci_info = { { }, }, }; +TYPE_INFO(multi_2x_serial_pci_info) static const TypeInfo multi_4x_serial_pci_info = { .name = "pci-serial-4x", @@ -211,11 +212,6 @@ static const TypeInfo multi_4x_serial_pci_info = { { }, }, }; +TYPE_INFO(multi_4x_serial_pci_info) -static void multi_serial_pci_register_types(void) -{ - type_register_static(&multi_2x_serial_pci_info); - type_register_static(&multi_4x_serial_pci_info); -} -type_init(multi_serial_pci_register_types) diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index cd56924a43..02264f8b73 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -119,10 +119,6 @@ static const TypeInfo serial_pci_info = { { }, }, }; +TYPE_INFO(serial_pci_info) -static void serial_pci_register_types(void) -{ - type_register_static(&serial_pci_info); -} -type_init(serial_pci_register_types) diff --git a/hw/char/serial.c b/hw/char/serial.c index 2386479492..a40d967d70 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1024,6 +1024,7 @@ static const TypeInfo serial_io_info = { .instance_init = serial_io_instance_init, .class_init = serial_io_class_init, }; +TYPE_INFO(serial_io_info) static Property serial_properties[] = { DEFINE_PROP_CHR("chardev", SerialState, chr), @@ -1048,6 +1049,7 @@ static const TypeInfo serial_info = { .instance_size = sizeof(SerialState), .class_init = serial_class_init, }; +TYPE_INFO(serial_info) /* Memory mapped interface */ static uint64_t serial_mm_read(void *opaque, hwaddr addr, @@ -1174,12 +1176,6 @@ static const TypeInfo serial_mm_info = { .instance_size = sizeof(SerialMM), .class_init = serial_mm_class_init, }; +TYPE_INFO(serial_mm_info) -static void serial_register_types(void) -{ - type_register_static(&serial_info); - type_register_static(&serial_io_info); - type_register_static(&serial_mm_info); -} -type_init(serial_register_types) diff --git a/hw/char/spapr_vty.c b/hw/char/spapr_vty.c index 464a52342a..236dc2194a 100644 --- a/hw/char/spapr_vty.c +++ b/hw/char/spapr_vty.c @@ -203,6 +203,7 @@ static const TypeInfo spapr_vty_info = { .instance_size = sizeof(SpaprVioVty), .class_init = spapr_vty_class_init, }; +TYPE_INFO(spapr_vty_info) SpaprVioDevice *spapr_vty_get_default(SpaprVioBus *bus) { @@ -266,7 +267,6 @@ static void spapr_vty_register_types(void) { spapr_register_hypercall(H_PUT_TERM_CHAR, h_put_term_char); spapr_register_hypercall(H_GET_TERM_CHAR, h_get_term_char); - type_register_static(&spapr_vty_info); } type_init(spapr_vty_register_types) diff --git a/hw/char/stm32f2xx_usart.c b/hw/char/stm32f2xx_usart.c index 0d661be6d3..f66bdbf796 100644 --- a/hw/char/stm32f2xx_usart.c +++ b/hw/char/stm32f2xx_usart.c @@ -233,10 +233,6 @@ static const TypeInfo stm32f2xx_usart_info = { .instance_init = stm32f2xx_usart_init, .class_init = stm32f2xx_usart_class_init, }; +TYPE_INFO(stm32f2xx_usart_info) -static void stm32f2xx_usart_register_types(void) -{ - type_register_static(&stm32f2xx_usart_info); -} -type_init(stm32f2xx_usart_register_types) diff --git a/hw/char/terminal3270.c b/hw/char/terminal3270.c index 2c47ebf007..6ba6052ac9 100644 --- a/hw/char/terminal3270.c +++ b/hw/char/terminal3270.c @@ -302,10 +302,6 @@ static const TypeInfo ccw_terminal_info = { .class_init = terminal_class_init, .class_size = sizeof(EmulatedCcw3270Class), }; +TYPE_INFO(ccw_terminal_info) -static void register_types(void) -{ - type_register_static(&ccw_terminal_info); -} -type_init(register_types) diff --git a/hw/char/virtio-console.c b/hw/char/virtio-console.c index 4f46753ea3..0ac862df15 100644 --- a/hw/char/virtio-console.c +++ b/hw/char/virtio-console.c @@ -270,6 +270,7 @@ static const TypeInfo virtconsole_info = { .parent = TYPE_VIRTIO_CONSOLE_SERIAL_PORT, .class_init = virtconsole_class_init, }; +TYPE_INFO(virtconsole_info) static Property virtserialport_properties[] = { DEFINE_PROP_CHR("chardev", VirtConsole, chr), @@ -296,11 +297,6 @@ static const TypeInfo virtserialport_info = { .instance_size = sizeof(VirtConsole), .class_init = virtserialport_class_init, }; +TYPE_INFO(virtserialport_info) -static void virtconsole_register_types(void) -{ - type_register_static(&virtserialport_info); - type_register_static(&virtconsole_info); -} -type_init(virtconsole_register_types) diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c index cf08ef9728..daf6274223 100644 --- a/hw/char/virtio-serial-bus.c +++ b/hw/char/virtio-serial-bus.c @@ -855,6 +855,7 @@ static const TypeInfo virtser_bus_info = { .instance_size = sizeof(VirtIOSerialBus), .class_init = virtser_bus_class_init, }; +TYPE_INFO(virtser_bus_info) static void virtser_bus_dev_print(Monitor *mon, DeviceState *qdev, int indent) { @@ -1117,6 +1118,7 @@ static const TypeInfo virtio_serial_port_type_info = { .class_size = sizeof(VirtIOSerialPortClass), .class_init = virtio_serial_port_class_init, }; +TYPE_INFO(virtio_serial_port_type_info) static void virtio_serial_device_unrealize(DeviceState *dev) { @@ -1201,12 +1203,6 @@ static const TypeInfo virtio_device_info = { { } } }; +TYPE_INFO(virtio_device_info) -static void virtio_serial_register_types(void) -{ - type_register_static(&virtser_bus_info); - type_register_static(&virtio_serial_port_type_info); - type_register_static(&virtio_device_info); -} -type_init(virtio_serial_register_types) diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c index ae4ccd00c7..aad3fbc31e 100644 --- a/hw/char/xilinx_uartlite.c +++ b/hw/char/xilinx_uartlite.c @@ -247,10 +247,6 @@ static const TypeInfo xilinx_uartlite_info = { .instance_init = xilinx_uartlite_init, .class_init = xilinx_uartlite_class_init, }; +TYPE_INFO(xilinx_uartlite_info) -static void xilinx_uart_register_types(void) -{ - type_register_static(&xilinx_uartlite_info); -} -type_init(xilinx_uart_register_types) diff --git a/hw/core/bus.c b/hw/core/bus.c index 6b987b6946..76762e3ab3 100644 --- a/hw/core/bus.c +++ b/hw/core/bus.c @@ -325,10 +325,6 @@ static const TypeInfo bus_info = { { } }, }; +TYPE_INFO(bus_info) -static void bus_register_types(void) -{ - type_register_static(&bus_info); -} -type_init(bus_register_types) diff --git a/hw/core/clock.c b/hw/core/clock.c index 3c0daf7d4c..9ee9aeb932 100644 --- a/hw/core/clock.c +++ b/hw/core/clock.c @@ -121,10 +121,6 @@ static const TypeInfo clock_info = { .instance_init = clock_initfn, .instance_finalize = clock_finalizefn, }; +TYPE_INFO(clock_info) -static void clock_register_types(void) -{ - type_register_static(&clock_info); -} -type_init(clock_register_types) diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 594441a150..df4d43bac4 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -449,10 +449,6 @@ static const TypeInfo cpu_type_info = { .class_size = sizeof(CPUClass), .class_init = cpu_class_init, }; +TYPE_INFO(cpu_type_info) -static void cpu_register_types(void) -{ - type_register_static(&cpu_type_info); -} -type_init(cpu_register_types) diff --git a/hw/core/fw-path-provider.c b/hw/core/fw-path-provider.c index 4840faefd1..7f9f7eff15 100644 --- a/hw/core/fw-path-provider.c +++ b/hw/core/fw-path-provider.c @@ -45,10 +45,6 @@ static const TypeInfo fw_path_provider_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(FWPathProviderClass), }; +TYPE_INFO(fw_path_provider_info) -static void fw_path_provider_register_types(void) -{ - type_register_static(&fw_path_provider_info); -} -type_init(fw_path_provider_register_types) diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index a242c076f6..e463b0dc18 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -212,10 +212,6 @@ static TypeInfo generic_loader_info = { .instance_size = sizeof(GenericLoaderState), .class_init = generic_loader_class_init, }; +TYPE_INFO(generic_loader_info) -static void generic_loader_register_type(void) -{ - type_register_static(&generic_loader_info); -} -type_init(generic_loader_register_type) diff --git a/hw/core/hotplug.c b/hw/core/hotplug.c index 17ac986685..6460ac5e8f 100644 --- a/hw/core/hotplug.c +++ b/hw/core/hotplug.c @@ -62,10 +62,6 @@ static const TypeInfo hotplug_handler_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(HotplugHandlerClass), }; +TYPE_INFO(hotplug_handler_info) -static void hotplug_handler_register_types(void) -{ - type_register_static(&hotplug_handler_info); -} -type_init(hotplug_handler_register_types) diff --git a/hw/core/irq.c b/hw/core/irq.c index fb3045b912..8aebc22cb2 100644 --- a/hw/core/irq.c +++ b/hw/core/irq.c @@ -136,10 +136,6 @@ static const TypeInfo irq_type_info = { .parent = TYPE_OBJECT, .instance_size = sizeof(struct IRQState), }; +TYPE_INFO(irq_type_info) -static void irq_register_types(void) -{ - type_register_static(&irq_type_info); -} -type_init(irq_register_types) diff --git a/hw/core/machine.c b/hw/core/machine.c index 8d1a90c6cf..f8fb5cf259 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -1146,10 +1146,6 @@ static const TypeInfo machine_info = { .instance_init = machine_initfn, .instance_finalize = machine_finalize, }; +TYPE_INFO(machine_info) -static void machine_register_types(void) -{ - type_register_static(&machine_info); -} -type_init(machine_register_types) diff --git a/hw/core/nmi.c b/hw/core/nmi.c index 481c4b3c7e..e14906f74d 100644 --- a/hw/core/nmi.c +++ b/hw/core/nmi.c @@ -79,10 +79,6 @@ static const TypeInfo nmi_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(NMIClass), }; +TYPE_INFO(nmi_info) -static void nmi_register_types(void) -{ - type_register_static(&nmi_info); -} -type_init(nmi_register_types) diff --git a/hw/core/or-irq.c b/hw/core/or-irq.c index d8f3754e96..4ff195b3e2 100644 --- a/hw/core/or-irq.c +++ b/hw/core/or-irq.c @@ -140,10 +140,6 @@ static const TypeInfo or_irq_type_info = { .instance_init = or_irq_init, .class_init = or_irq_class_init, }; +TYPE_INFO(or_irq_type_info) -static void or_irq_register_types(void) -{ - type_register_static(&or_irq_type_info); -} -type_init(or_irq_register_types) diff --git a/hw/core/platform-bus.c b/hw/core/platform-bus.c index 5037ca265e..5398bf92f5 100644 --- a/hw/core/platform-bus.c +++ b/hw/core/platform-bus.c @@ -221,10 +221,6 @@ static const TypeInfo platform_bus_info = { .instance_size = sizeof(PlatformBusDevice), .class_init = platform_bus_class_init, }; +TYPE_INFO(platform_bus_info) -static void platform_bus_register_types(void) -{ - type_register_static(&platform_bus_info); -} -type_init(platform_bus_register_types) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 96772a15bd..1b82b3fbf9 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -1251,10 +1251,6 @@ static const TypeInfo device_type_info = { { } } }; +TYPE_INFO(device_type_info) -static void qdev_register_types(void) -{ - type_register_static(&device_type_info); -} -type_init(qdev_register_types) diff --git a/hw/core/register.c b/hw/core/register.c index ddf91eb445..2b25f993ce 100644 --- a/hw/core/register.c +++ b/hw/core/register.c @@ -330,10 +330,6 @@ static const TypeInfo register_info = { .parent = TYPE_DEVICE, .class_init = register_class_init, }; +TYPE_INFO(register_info) -static void register_register_types(void) -{ - type_register_static(®ister_info); -} -type_init(register_register_types) diff --git a/hw/core/resettable.c b/hw/core/resettable.c index 96a99ce39e..88ba81de71 100644 --- a/hw/core/resettable.c +++ b/hw/core/resettable.c @@ -292,10 +292,6 @@ static const TypeInfo resettable_interface_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(ResettableClass), }; +TYPE_INFO(resettable_interface_info) -static void reset_register_types(void) -{ - type_register_static(&resettable_interface_info); -} -type_init(reset_register_types) diff --git a/hw/core/split-irq.c b/hw/core/split-irq.c index 3b90af2e8f..35653c5d4d 100644 --- a/hw/core/split-irq.c +++ b/hw/core/split-irq.c @@ -83,10 +83,6 @@ static const TypeInfo split_irq_type_info = { .instance_init = split_irq_init, .class_init = split_irq_class_init, }; +TYPE_INFO(split_irq_type_info) -static void split_irq_register_types(void) -{ - type_register_static(&split_irq_type_info); -} -type_init(split_irq_register_types) diff --git a/hw/core/stream.c b/hw/core/stream.c index a65ad1208d..c1bb12537e 100644 --- a/hw/core/stream.c +++ b/hw/core/stream.c @@ -24,11 +24,7 @@ static const TypeInfo stream_slave_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(StreamSlaveClass), }; +TYPE_INFO(stream_slave_info) -static void stream_slave_register_types(void) -{ - type_register_static(&stream_slave_info); -} -type_init(stream_slave_register_types) diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 70239b7e7d..9e89bfd8d4 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -86,6 +86,7 @@ static const TypeInfo system_bus_info = { .instance_size = sizeof(BusState), .class_init = system_bus_class_init, }; +TYPE_INFO(system_bus_info) /* Check whether an IRQ source exists */ bool sysbus_has_irq(SysBusDevice *dev, int n) @@ -334,6 +335,7 @@ static const TypeInfo sysbus_device_type_info = { .class_size = sizeof(SysBusDeviceClass), .class_init = sysbus_device_class_init, }; +TYPE_INFO(sysbus_device_type_info) static BusState *main_system_bus; @@ -355,10 +357,4 @@ BusState *sysbus_get_default(void) return main_system_bus; } -static void sysbus_register_types(void) -{ - type_register_static(&system_bus_info); - type_register_static(&sysbus_device_type_info); -} -type_init(sysbus_register_types) diff --git a/hw/core/vmstate-if.c b/hw/core/vmstate-if.c index bf453620fe..3ad0c95df0 100644 --- a/hw/core/vmstate-if.c +++ b/hw/core/vmstate-if.c @@ -14,10 +14,6 @@ static const TypeInfo vmstate_if_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(VMStateIfClass), }; +TYPE_INFO(vmstate_if_info) -static void vmstate_register_types(void) -{ - type_register_static(&vmstate_if_info); -} -type_init(vmstate_register_types); diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index c377be398d..78eb2a9517 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -171,10 +171,6 @@ static const TypeInfo a15mp_priv_info = { .instance_init = a15mp_priv_initfn, .class_init = a15mp_priv_class_init, }; +TYPE_INFO(a15mp_priv_info) -static void a15mp_register_types(void) -{ - type_register_static(&a15mp_priv_info); -} -type_init(a15mp_register_types) diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index 351295e518..a21de66857 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -175,10 +175,6 @@ static const TypeInfo a9mp_priv_info = { .instance_init = a9mp_priv_initfn, .class_init = a9mp_priv_class_init, }; +TYPE_INFO(a9mp_priv_info) -static void a9mp_register_types(void) -{ - type_register_static(&a9mp_priv_info); -} -type_init(a9mp_register_types) diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c index 89c4e35143..55b0f0aaad 100644 --- a/hw/cpu/arm11mpcore.c +++ b/hw/cpu/arm11mpcore.c @@ -160,10 +160,6 @@ static const TypeInfo mpcore_priv_info = { .instance_init = mpcore_priv_initfn, .class_init = mpcore_priv_class_init, }; +TYPE_INFO(mpcore_priv_info) -static void arm11mpcore_register_types(void) -{ - type_register_static(&mpcore_priv_info); -} -type_init(arm11mpcore_register_types) diff --git a/hw/cpu/cluster.c b/hw/cpu/cluster.c index e444b7c29d..016b320889 100644 --- a/hw/cpu/cluster.c +++ b/hw/cpu/cluster.c @@ -91,10 +91,6 @@ static const TypeInfo cpu_cluster_type_info = { .instance_size = sizeof(CPUClusterState), .class_init = cpu_cluster_class_init, }; +TYPE_INFO(cpu_cluster_type_info) -static void cpu_cluster_register_types(void) -{ - type_register_static(&cpu_cluster_type_info); -} -type_init(cpu_cluster_register_types) diff --git a/hw/cpu/core.c b/hw/cpu/core.c index 3a659291ea..2fc8b72a74 100644 --- a/hw/cpu/core.c +++ b/hw/cpu/core.c @@ -91,10 +91,6 @@ static const TypeInfo cpu_core_type_info = { .instance_size = sizeof(CPUCore), .instance_init = cpu_core_instance_init, }; +TYPE_INFO(cpu_core_type_info) -static void cpu_core_register_types(void) -{ - type_register_static(&cpu_core_type_info); -} -type_init(cpu_core_register_types) diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c index 96f4d2517a..0ae3019045 100644 --- a/hw/cpu/realview_mpcore.c +++ b/hw/cpu/realview_mpcore.c @@ -128,10 +128,6 @@ static const TypeInfo mpcore_rirq_info = { .instance_init = mpcore_rirq_init, .class_init = mpcore_rirq_class_init, }; +TYPE_INFO(mpcore_rirq_info) -static void realview_mpcore_register_types(void) -{ - type_register_static(&mpcore_rirq_info); -} -type_init(realview_mpcore_register_types) diff --git a/hw/display/ads7846.c b/hw/display/ads7846.c index 56bf82fe07..94bb9db052 100644 --- a/hw/display/ads7846.c +++ b/hw/display/ads7846.c @@ -174,10 +174,6 @@ static const TypeInfo ads7846_info = { .instance_size = sizeof(ADS7846State), .class_init = ads7846_class_init, }; +TYPE_INFO(ads7846_info) -static void ads7846_register_types(void) -{ - type_register_static(&ads7846_info); -} -type_init(ads7846_register_types) diff --git a/hw/display/artist.c b/hw/display/artist.c index 6261bfe65b..2e1b793a86 100644 --- a/hw/display/artist.c +++ b/hw/display/artist.c @@ -1434,10 +1434,6 @@ static const TypeInfo artist_info = { .instance_init = artist_initfn, .class_init = artist_class_init, }; +TYPE_INFO(artist_info) -static void artist_register_types(void) -{ - type_register_static(&artist_info); -} -type_init(artist_register_types) diff --git a/hw/display/ati.c b/hw/display/ati.c index 4c3ad8f47b..5ddd252f34 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -1043,10 +1043,6 @@ static const TypeInfo ati_vga_info = { { }, }, }; +TYPE_INFO(ati_vga_info) -static void ati_vga_register_types(void) -{ - type_register_static(&ati_vga_info); -} -type_init(ati_vga_register_types) diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c index 986c994522..e1f85fa948 100644 --- a/hw/display/bcm2835_fb.c +++ b/hw/display/bcm2835_fb.c @@ -461,10 +461,6 @@ static TypeInfo bcm2835_fb_info = { .class_init = bcm2835_fb_class_init, .instance_init = bcm2835_fb_init, }; +TYPE_INFO(bcm2835_fb_info) -static void bcm2835_fb_register_types(void) -{ - type_register_static(&bcm2835_fb_info); -} -type_init(bcm2835_fb_register_types) diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index a8e8ab8325..86869778ed 100644 --- a/hw/display/bochs-display.c +++ b/hw/display/bochs-display.c @@ -381,10 +381,6 @@ static const TypeInfo bochs_display_type_info = { { }, }, }; +TYPE_INFO(bochs_display_type_info) -static void bochs_display_register_types(void) -{ - type_register_static(&bochs_display_type_info); -} -type_init(bochs_display_register_types) diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 7cbe6e56ff..0e7e260ccf 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -385,10 +385,6 @@ static const TypeInfo cg3_info = { .instance_init = cg3_initfn, .class_init = cg3_class_init, }; +TYPE_INFO(cg3_info) -static void cg3_register_types(void) -{ - type_register_static(&cg3_info); -} -type_init(cg3_register_types) diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index 212d6f5e61..fe4d8a4fb8 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -3028,10 +3028,6 @@ static const TypeInfo cirrus_vga_info = { { }, }, }; +TYPE_INFO(cirrus_vga_info) -static void cirrus_vga_register_types(void) -{ - type_register_static(&cirrus_vga_info); -} -type_init(cirrus_vga_register_types) diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c index 825ba57298..4d0e54b0f2 100644 --- a/hw/display/cirrus_vga_isa.c +++ b/hw/display/cirrus_vga_isa.c @@ -90,10 +90,6 @@ static const TypeInfo isa_cirrus_vga_info = { .instance_size = sizeof(ISACirrusVGAState), .class_init = isa_cirrus_vga_class_init, }; +TYPE_INFO(isa_cirrus_vga_info) -static void cirrus_vga_isa_register_types(void) -{ - type_register_static(&isa_cirrus_vga_info); -} -type_init(cirrus_vga_isa_register_types) diff --git a/hw/display/dpcd.c b/hw/display/dpcd.c index 64463654a1..ff5b655f0e 100644 --- a/hw/display/dpcd.c +++ b/hw/display/dpcd.c @@ -156,10 +156,6 @@ static const TypeInfo dpcd_info = { .class_init = dpcd_class_init, .instance_init = dpcd_init, }; +TYPE_INFO(dpcd_info) -static void dpcd_register_types(void) -{ - type_register_static(&dpcd_info); -} -type_init(dpcd_register_types) diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index 4b7286b7c9..bfd7f4fc6f 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -1961,10 +1961,6 @@ static const TypeInfo exynos4210_fimd_info = { .instance_init = exynos4210_fimd_init, .class_init = exynos4210_fimd_class_init, }; +TYPE_INFO(exynos4210_fimd_info) -static void exynos4210_fimd_register_types(void) -{ - type_register_static(&exynos4210_fimd_info); -} -type_init(exynos4210_fimd_register_types) diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c index adcba96e34..33f2822445 100644 --- a/hw/display/g364fb.c +++ b/hw/display/g364fb.c @@ -536,10 +536,6 @@ static const TypeInfo g364fb_sysbus_info = { .instance_size = sizeof(G364SysBusState), .class_init = g364fb_sysbus_class_init, }; +TYPE_INFO(g364fb_sysbus_info) -static void g364fb_register_types(void) -{ - type_register_static(&g364fb_sysbus_info); -} -type_init(g364fb_register_types) diff --git a/hw/display/i2c-ddc.c b/hw/display/i2c-ddc.c index 13eb529fc1..5c5c255eb1 100644 --- a/hw/display/i2c-ddc.c +++ b/hw/display/i2c-ddc.c @@ -120,10 +120,6 @@ static TypeInfo i2c_ddc_info = { .instance_init = i2c_ddc_init, .class_init = i2c_ddc_class_init }; +TYPE_INFO(i2c_ddc_info) -static void ddc_register_devices(void) -{ - type_register_static(&i2c_ddc_info); -} -type_init(ddc_register_devices); diff --git a/hw/display/jazz_led.c b/hw/display/jazz_led.c index 1d845597f9..1b1002e14a 100644 --- a/hw/display/jazz_led.c +++ b/hw/display/jazz_led.c @@ -310,10 +310,6 @@ static const TypeInfo jazz_led_info = { .instance_init = jazz_led_init, .class_init = jazz_led_class_init, }; +TYPE_INFO(jazz_led_info) -static void jazz_led_register(void) -{ - type_register_static(&jazz_led_info); -} -type_init(jazz_led_register); diff --git a/hw/display/macfb.c b/hw/display/macfb.c index b68faff4bb..1cac29e549 100644 --- a/hw/display/macfb.c +++ b/hw/display/macfb.c @@ -459,6 +459,7 @@ static TypeInfo macfb_sysbus_info = { .instance_size = sizeof(MacfbSysBusState), .class_init = macfb_sysbus_class_init, }; +TYPE_INFO(macfb_sysbus_info) static TypeInfo macfb_nubus_info = { .name = TYPE_NUBUS_MACFB, @@ -467,11 +468,6 @@ static TypeInfo macfb_nubus_info = { .class_init = macfb_nubus_class_init, .class_size = sizeof(MacfbNubusDeviceClass), }; +TYPE_INFO(macfb_nubus_info) -static void macfb_register_types(void) -{ - type_register_static(&macfb_sysbus_info); - type_register_static(&macfb_nubus_info); -} -type_init(macfb_register_types) diff --git a/hw/display/milkymist-tmu2.c b/hw/display/milkymist-tmu2.c index c34ef1a1bf..495b6c960f 100644 --- a/hw/display/milkymist-tmu2.c +++ b/hw/display/milkymist-tmu2.c @@ -495,13 +495,9 @@ static const TypeInfo milkymist_tmu2_info = { .instance_init = milkymist_tmu2_init, .class_init = milkymist_tmu2_class_init, }; +TYPE_INFO(milkymist_tmu2_info) -static void milkymist_tmu2_register_types(void) -{ - type_register_static(&milkymist_tmu2_info); -} -type_init(milkymist_tmu2_register_types) DeviceState *milkymist_tmu2_create(hwaddr base, qemu_irq irq) { diff --git a/hw/display/milkymist-vgafb.c b/hw/display/milkymist-vgafb.c index 6a6441e6ea..634bf4571a 100644 --- a/hw/display/milkymist-vgafb.c +++ b/hw/display/milkymist-vgafb.c @@ -352,10 +352,6 @@ static const TypeInfo milkymist_vgafb_info = { .instance_init = milkymist_vgafb_init, .class_init = milkymist_vgafb_class_init, }; +TYPE_INFO(milkymist_vgafb_info) -static void milkymist_vgafb_register_types(void) -{ - type_register_static(&milkymist_vgafb_info); -} -type_init(milkymist_vgafb_register_types) diff --git a/hw/display/next-fb.c b/hw/display/next-fb.c index b0513a8fba..7839643757 100644 --- a/hw/display/next-fb.c +++ b/hw/display/next-fb.c @@ -137,10 +137,6 @@ static const TypeInfo nextfb_info = { .instance_size = sizeof(NeXTFbState), .class_init = nextfb_class_init, }; +TYPE_INFO(nextfb_info) -static void nextfb_register_types(void) -{ - type_register_static(&nextfb_info); -} -type_init(nextfb_register_types) diff --git a/hw/display/pl110.c b/hw/display/pl110.c index 61fefbffb3..0a65733a23 100644 --- a/hw/display/pl110.c +++ b/hw/display/pl110.c @@ -546,24 +546,20 @@ static const TypeInfo pl110_info = { .instance_init = pl110_init, .class_init = pl110_class_init, }; +TYPE_INFO(pl110_info) static const TypeInfo pl110_versatile_info = { .name = "pl110_versatile", .parent = TYPE_PL110, .instance_init = pl110_versatile_init, }; +TYPE_INFO(pl110_versatile_info) static const TypeInfo pl111_info = { .name = "pl111", .parent = TYPE_PL110, .instance_init = pl111_init, }; +TYPE_INFO(pl111_info) -static void pl110_register_types(void) -{ - type_register_static(&pl110_info); - type_register_static(&pl110_versatile_info); - type_register_static(&pl111_info); -} -type_init(pl110_register_types) diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 11871340e7..4b9f97f5aa 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -2503,6 +2503,7 @@ static const TypeInfo qxl_pci_type_info = { { }, }, }; +TYPE_INFO(qxl_pci_type_info) static void qxl_primary_class_init(ObjectClass *klass, void *data) { @@ -2521,6 +2522,7 @@ static const TypeInfo qxl_primary_info = { .parent = TYPE_PCI_QXL, .class_init = qxl_primary_class_init, }; +TYPE_INFO(qxl_primary_info) static void qxl_secondary_class_init(ObjectClass *klass, void *data) { @@ -2537,12 +2539,6 @@ static const TypeInfo qxl_secondary_info = { .parent = TYPE_PCI_QXL, .class_init = qxl_secondary_class_init, }; +TYPE_INFO(qxl_secondary_info) -static void qxl_register_types(void) -{ - type_register_static(&qxl_pci_type_info); - type_register_static(&qxl_primary_info); - type_register_static(&qxl_secondary_info); -} -type_init(qxl_register_types) diff --git a/hw/display/ramfb-standalone.c b/hw/display/ramfb-standalone.c index b18db97eeb..28e25acc96 100644 --- a/hw/display/ramfb-standalone.c +++ b/hw/display/ramfb-standalone.c @@ -53,10 +53,6 @@ static const TypeInfo ramfb_info = { .instance_size = sizeof(RAMFBStandaloneState), .class_init = ramfb_class_initfn, }; +TYPE_INFO(ramfb_info) -static void ramfb_register_types(void) -{ - type_register_static(&ramfb_info); -} -type_init(ramfb_register_types) diff --git a/hw/display/sii9022.c b/hw/display/sii9022.c index 3b82a8567f..7d0a97da6c 100644 --- a/hw/display/sii9022.c +++ b/hw/display/sii9022.c @@ -183,10 +183,6 @@ static const TypeInfo sii9022_info = { .instance_size = sizeof(sii9022_state), .class_init = sii9022_class_init, }; +TYPE_INFO(sii9022_info) -static void sii9022_register_types(void) -{ - type_register_static(&sii9022_info); -} -type_init(sii9022_register_types) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 9cccc68c35..626f7393a0 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -2032,6 +2032,7 @@ static const TypeInfo sm501_sysbus_info = { .class_init = sm501_sysbus_class_init, .instance_init = sm501_sysbus_init, }; +TYPE_INFO(sm501_sysbus_info) #define TYPE_PCI_SM501 "sm501" #define PCI_SM501(obj) OBJECT_CHECK(SM501PCIState, (obj), TYPE_PCI_SM501) @@ -2112,11 +2113,6 @@ static const TypeInfo sm501_pci_info = { { }, }, }; +TYPE_INFO(sm501_pci_info) -static void sm501_register_types(void) -{ - type_register_static(&sm501_sysbus_info); - type_register_static(&sm501_pci_info); -} -type_init(sm501_register_types) diff --git a/hw/display/ssd0303.c b/hw/display/ssd0303.c index 718378f6de..24e7fc1598 100644 --- a/hw/display/ssd0303.c +++ b/hw/display/ssd0303.c @@ -326,10 +326,6 @@ static const TypeInfo ssd0303_info = { .instance_size = sizeof(ssd0303_state), .class_init = ssd0303_class_init, }; +TYPE_INFO(ssd0303_info) -static void ssd0303_register_types(void) -{ - type_register_static(&ssd0303_info); -} -type_init(ssd0303_register_types) diff --git a/hw/display/ssd0323.c b/hw/display/ssd0323.c index 32d27f008a..056cc0b094 100644 --- a/hw/display/ssd0323.c +++ b/hw/display/ssd0323.c @@ -377,10 +377,6 @@ static const TypeInfo ssd0323_info = { .instance_size = sizeof(ssd0323_state), .class_init = ssd0323_class_init, }; +TYPE_INFO(ssd0323_info) -static void ssd03232_register_types(void) -{ - type_register_static(&ssd0323_info); -} -type_init(ssd03232_register_types) diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 1fb45b1aab..0d05421868 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -902,10 +902,6 @@ static const TypeInfo tcx_info = { .instance_init = tcx_initfn, .class_init = tcx_class_init, }; +TYPE_INFO(tcx_info) -static void tcx_register_types(void) -{ - type_register_static(&tcx_info); -} -type_init(tcx_register_types) diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c index 3aaeeeca1e..1561f702b9 100644 --- a/hw/display/vga-isa.c +++ b/hw/display/vga-isa.c @@ -105,10 +105,6 @@ static const TypeInfo vga_isa_info = { .instance_size = sizeof(ISAVGAState), .class_init = vga_isa_class_initfn, }; +TYPE_INFO(vga_isa_info) -static void vga_isa_register_types(void) -{ - type_register_static(&vga_isa_info); -} -type_init(vga_isa_register_types) diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index a640fd866d..5e8ddc9ac5 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -374,6 +374,7 @@ static const TypeInfo vga_pci_type_info = { { }, }, }; +TYPE_INFO(vga_pci_type_info) static void vga_class_init(ObjectClass *klass, void *data) { @@ -405,6 +406,7 @@ static const TypeInfo vga_info = { .instance_init = pci_std_vga_init, .class_init = vga_class_init, }; +TYPE_INFO(vga_info) static const TypeInfo secondary_info = { .name = "secondary-vga", @@ -412,12 +414,6 @@ static const TypeInfo secondary_info = { .instance_init = pci_secondary_vga_init, .class_init = secondary_class_init, }; +TYPE_INFO(secondary_info) -static void vga_register_types(void) -{ - type_register_static(&vga_pci_type_info); - type_register_static(&vga_info); - type_register_static(&secondary_info); -} -type_init(vga_register_types) diff --git a/hw/display/vhost-user-gpu.c b/hw/display/vhost-user-gpu.c index 51f1747c4a..b892774ce7 100644 --- a/hw/display/vhost-user-gpu.c +++ b/hw/display/vhost-user-gpu.c @@ -596,10 +596,6 @@ static const TypeInfo vhost_user_gpu_info = { .instance_finalize = vhost_user_gpu_instance_finalize, .class_init = vhost_user_gpu_class_init, }; +TYPE_INFO(vhost_user_gpu_info) -static void vhost_user_gpu_register_types(void) -{ - type_register_static(&vhost_user_gpu_info); -} -type_init(vhost_user_gpu_register_types) diff --git a/hw/display/virtio-gpu-base.c b/hw/display/virtio-gpu-base.c index 7961308606..6cc4858daa 100644 --- a/hw/display/virtio-gpu-base.c +++ b/hw/display/virtio-gpu-base.c @@ -232,14 +232,9 @@ static const TypeInfo virtio_gpu_base_info = { .class_init = virtio_gpu_base_class_init, .abstract = true }; +TYPE_INFO(virtio_gpu_base_info) -static void -virtio_register_types(void) -{ - type_register_static(&virtio_gpu_base_info); -} -type_init(virtio_register_types) QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctrl_hdr) != 24); QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_update_cursor) != 56); diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 34d8e93f28..8a71ee4f7e 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -63,6 +63,7 @@ static const TypeInfo virtio_gpu_pci_base_info = { .class_init = virtio_gpu_pci_base_class_init, .abstract = true }; +TYPE_INFO(virtio_gpu_pci_base_info) #define TYPE_VIRTIO_GPU_PCI "virtio-gpu-pci" #define VIRTIO_GPU_PCI(obj) \ @@ -91,7 +92,6 @@ static const VirtioPCIDeviceTypeInfo virtio_gpu_pci_info = { static void virtio_gpu_pci_register_types(void) { - type_register_static(&virtio_gpu_pci_base_info); virtio_pci_types_register(&virtio_gpu_pci_info); } diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 5f0dd7c150..790ea40637 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1263,10 +1263,6 @@ static const TypeInfo virtio_gpu_info = { .instance_size = sizeof(VirtIOGPU), .class_init = virtio_gpu_class_init, }; +TYPE_INFO(virtio_gpu_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_gpu_info); -} -type_init(virtio_register_types) diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index f533d7d1b4..e1342c2ea1 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -199,6 +199,7 @@ static TypeInfo virtio_vga_base_info = { .class_init = virtio_vga_base_class_init, .abstract = true, }; +TYPE_INFO(virtio_vga_base_info) #define TYPE_VIRTIO_VGA "virtio-vga" @@ -230,7 +231,6 @@ static VirtioPCIDeviceTypeInfo virtio_vga_info = { static void virtio_vga_register_types(void) { - type_register_static(&virtio_vga_base_info); virtio_pci_types_register(&virtio_vga_info); } diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index 2579f6b218..487d29f5c0 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -1357,10 +1357,6 @@ static const TypeInfo vmsvga_info = { { }, }, }; +TYPE_INFO(vmsvga_info) -static void vmsvga_register_types(void) -{ - type_register_static(&vmsvga_info); -} -type_init(vmsvga_register_types) diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index c56e6ec593..95accb9442 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1361,10 +1361,6 @@ static const TypeInfo xlnx_dp_info = { .instance_init = xlnx_dp_init, .class_init = xlnx_dp_class_init, }; +TYPE_INFO(xlnx_dp_info) -static void xlnx_dp_register_types(void) -{ - type_register_static(&xlnx_dp_info); -} -type_init(xlnx_dp_register_types) diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c index eb0002a2b9..f7478c3954 100644 --- a/hw/dma/bcm2835_dma.c +++ b/hw/dma/bcm2835_dma.c @@ -401,10 +401,6 @@ static TypeInfo bcm2835_dma_info = { .class_init = bcm2835_dma_class_init, .instance_init = bcm2835_dma_init, }; +TYPE_INFO(bcm2835_dma_info) -static void bcm2835_dma_register_types(void) -{ - type_register_static(&bcm2835_dma_info); -} -type_init(bcm2835_dma_register_types) diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c index 6977d85ef8..6c433137a0 100644 --- a/hw/dma/i82374.c +++ b/hw/dma/i82374.c @@ -158,10 +158,6 @@ static const TypeInfo i82374_info = { .instance_size = sizeof(I82374State), .class_init = i82374_class_init, }; +TYPE_INFO(i82374_info) -static void i82374_register_types(void) -{ - type_register_static(&i82374_info); -} -type_init(i82374_register_types) diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index de5f696919..fe1639443b 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -624,13 +624,9 @@ static const TypeInfo i8257_info = { { } } }; +TYPE_INFO(i8257_info) -static void i8257_register_types(void) -{ - type_register_static(&i8257_info); -} -type_init(i8257_register_types) void i8257_dma_init(ISABus *bus, bool high_page_enable) { diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c index f1a586b1d7..823646a29a 100644 --- a/hw/dma/pl080.c +++ b/hw/dma/pl080.c @@ -432,19 +432,15 @@ static const TypeInfo pl080_info = { .instance_init = pl080_init, .class_init = pl080_class_init, }; +TYPE_INFO(pl080_info) static const TypeInfo pl081_info = { .name = TYPE_PL081, .parent = TYPE_PL080, .instance_init = pl081_init, }; +TYPE_INFO(pl081_info) /* The PL080 and PL081 are the same except for the number of channels they implement (8 and 2 respectively). */ -static void pl080_register_types(void) -{ - type_register_static(&pl080_info); - type_register_static(&pl081_info); -} -type_init(pl080_register_types) diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c index 0bd63a43f5..3288f31678 100644 --- a/hw/dma/pl330.c +++ b/hw/dma/pl330.c @@ -1674,10 +1674,6 @@ static const TypeInfo pl330_type_info = { .instance_size = sizeof(PL330State), .class_init = pl330_class_init, }; +TYPE_INFO(pl330_type_info) -static void pl330_register_types(void) -{ - type_register_static(&pl330_type_info); -} -type_init(pl330_register_types) diff --git a/hw/dma/puv3_dma.c b/hw/dma/puv3_dma.c index 7fa979180f..225aa5146f 100644 --- a/hw/dma/puv3_dma.c +++ b/hw/dma/puv3_dma.c @@ -109,10 +109,6 @@ static const TypeInfo puv3_dma_info = { .instance_size = sizeof(PUV3DMAState), .class_init = puv3_dma_class_init, }; +TYPE_INFO(puv3_dma_info) -static void puv3_dma_register_type(void) -{ - type_register_static(&puv3_dma_info); -} -type_init(puv3_dma_register_type) diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c index 78b2849bcb..b2f1f1b236 100644 --- a/hw/dma/pxa2xx_dma.c +++ b/hw/dma/pxa2xx_dma.c @@ -581,10 +581,6 @@ static const TypeInfo pxa2xx_dma_info = { .instance_init = pxa2xx_dma_init, .class_init = pxa2xx_dma_class_init, }; +TYPE_INFO(pxa2xx_dma_info) -static void pxa2xx_dma_register_types(void) -{ - type_register_static(&pxa2xx_dma_info); -} -type_init(pxa2xx_dma_register_types) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 7eddc9a776..ccbda2ce82 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -718,6 +718,7 @@ static const TypeInfo rc4030_info = { .instance_init = rc4030_initfn, .class_init = rc4030_class_init, }; +TYPE_INFO(rc4030_info) static void rc4030_iommu_memory_region_class_init(ObjectClass *klass, void *data) @@ -732,14 +733,9 @@ static const TypeInfo rc4030_iommu_memory_region_info = { .name = TYPE_RC4030_IOMMU_MEMORY_REGION, .class_init = rc4030_iommu_memory_region_class_init, }; +TYPE_INFO(rc4030_iommu_memory_region_info) -static void rc4030_register_types(void) -{ - type_register_static(&rc4030_info); - type_register_static(&rc4030_iommu_memory_region_info); -} -type_init(rc4030_register_types) DeviceState *rc4030_init(rc4030_dma **dmas, IOMMUMemoryRegion **dma_mr) { diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index bcd1626fbd..774669345b 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -286,6 +286,7 @@ static const TypeInfo sparc32_dma_device_info = { .instance_init = sparc32_dma_device_init, .class_init = sparc32_dma_device_class_init, }; +TYPE_INFO(sparc32_dma_device_info) static void sparc32_espdma_device_init(Object *obj) { @@ -327,6 +328,7 @@ static const TypeInfo sparc32_espdma_device_info = { .instance_init = sparc32_espdma_device_init, .class_init = sparc32_espdma_device_class_init, }; +TYPE_INFO(sparc32_espdma_device_info) static void sparc32_ledma_device_init(Object *obj) { @@ -365,6 +367,7 @@ static const TypeInfo sparc32_ledma_device_info = { .instance_init = sparc32_ledma_device_init, .class_init = sparc32_ledma_device_class_init, }; +TYPE_INFO(sparc32_ledma_device_info) static void sparc32_dma_realize(DeviceState *dev, Error **errp) { @@ -437,14 +440,7 @@ static const TypeInfo sparc32_dma_info = { .instance_init = sparc32_dma_init, .class_init = sparc32_dma_class_init, }; +TYPE_INFO(sparc32_dma_info) -static void sparc32_dma_register_types(void) -{ - type_register_static(&sparc32_dma_device_info); - type_register_static(&sparc32_espdma_device_info); - type_register_static(&sparc32_ledma_device_info); - type_register_static(&sparc32_dma_info); -} -type_init(sparc32_dma_register_types) diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index a4812e480a..4c5c0c994b 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -630,6 +630,7 @@ static const TypeInfo axidma_info = { .class_init = axidma_class_init, .instance_init = xilinx_axidma_init, }; +TYPE_INFO(axidma_info) static const TypeInfo xilinx_axidma_data_stream_info = { .name = TYPE_XILINX_AXI_DMA_DATA_STREAM, @@ -642,6 +643,7 @@ static const TypeInfo xilinx_axidma_data_stream_info = { { } } }; +TYPE_INFO(xilinx_axidma_data_stream_info) static const TypeInfo xilinx_axidma_control_stream_info = { .name = TYPE_XILINX_AXI_DMA_CONTROL_STREAM, @@ -654,12 +656,6 @@ static const TypeInfo xilinx_axidma_control_stream_info = { { } } }; +TYPE_INFO(xilinx_axidma_control_stream_info) -static void xilinx_axidma_register_types(void) -{ - type_register_static(&axidma_info); - type_register_static(&xilinx_axidma_data_stream_info); - type_register_static(&xilinx_axidma_control_stream_info); -} -type_init(xilinx_axidma_register_types) diff --git a/hw/dma/xlnx-zdma.c b/hw/dma/xlnx-zdma.c index fa38a55634..6d7df3a589 100644 --- a/hw/dma/xlnx-zdma.c +++ b/hw/dma/xlnx-zdma.c @@ -838,10 +838,6 @@ static const TypeInfo zdma_info = { .class_init = zdma_class_init, .instance_init = zdma_init, }; +TYPE_INFO(zdma_info) -static void zdma_register_types(void) -{ - type_register_static(&zdma_info); -} -type_init(zdma_register_types) diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c index e33112b6f0..4ee247d855 100644 --- a/hw/dma/xlnx-zynq-devcfg.c +++ b/hw/dma/xlnx-zynq-devcfg.c @@ -393,10 +393,6 @@ static const TypeInfo xlnx_zynq_devcfg_info = { .instance_init = xlnx_zynq_devcfg_init, .class_init = xlnx_zynq_devcfg_class_init, }; +TYPE_INFO(xlnx_zynq_devcfg_info) -static void xlnx_zynq_devcfg_register_types(void) -{ - type_register_static(&xlnx_zynq_devcfg_info); -} -type_init(xlnx_zynq_devcfg_register_types) diff --git a/hw/dma/xlnx_dpdma.c b/hw/dma/xlnx_dpdma.c index b40c897de2..c5b0864a08 100644 --- a/hw/dma/xlnx_dpdma.c +++ b/hw/dma/xlnx_dpdma.c @@ -608,11 +608,8 @@ static const TypeInfo xlnx_dpdma_info = { .instance_init = xlnx_dpdma_init, .class_init = xlnx_dpdma_class_init, }; +TYPE_INFO(xlnx_dpdma_info) -static void xlnx_dpdma_register_types(void) -{ - type_register_static(&xlnx_dpdma_info); -} size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel, bool one_desc) @@ -787,4 +784,3 @@ void xlnx_dpdma_trigger_vsync_irq(XlnxDPDMAState *s) xlnx_dpdma_update_irq(s); } -type_init(xlnx_dpdma_register_types) diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c index 985a259e05..f00630e2ea 100644 --- a/hw/gpio/aspeed_gpio.c +++ b/hw/gpio/aspeed_gpio.c @@ -971,6 +971,7 @@ static const TypeInfo aspeed_gpio_info = { .class_init = aspeed_gpio_class_init, .abstract = true, }; +TYPE_INFO(aspeed_gpio_info) static const TypeInfo aspeed_gpio_ast2400_info = { .name = TYPE_ASPEED_GPIO "-ast2400", @@ -978,6 +979,7 @@ static const TypeInfo aspeed_gpio_ast2400_info = { .class_init = aspeed_gpio_ast2400_class_init, .instance_init = aspeed_gpio_init, }; +TYPE_INFO(aspeed_gpio_ast2400_info) static const TypeInfo aspeed_gpio_ast2500_info = { .name = TYPE_ASPEED_GPIO "-ast2500", @@ -985,6 +987,7 @@ static const TypeInfo aspeed_gpio_ast2500_info = { .class_init = aspeed_gpio_2500_class_init, .instance_init = aspeed_gpio_init, }; +TYPE_INFO(aspeed_gpio_ast2500_info) static const TypeInfo aspeed_gpio_ast2600_3_6v_info = { .name = TYPE_ASPEED_GPIO "-ast2600", @@ -992,6 +995,7 @@ static const TypeInfo aspeed_gpio_ast2600_3_6v_info = { .class_init = aspeed_gpio_ast2600_3_6v_class_init, .instance_init = aspeed_gpio_init, }; +TYPE_INFO(aspeed_gpio_ast2600_3_6v_info) static const TypeInfo aspeed_gpio_ast2600_1_8v_info = { .name = TYPE_ASPEED_GPIO "-ast2600-1_8v", @@ -999,14 +1003,6 @@ static const TypeInfo aspeed_gpio_ast2600_1_8v_info = { .class_init = aspeed_gpio_ast2600_1_8v_class_init, .instance_init = aspeed_gpio_init, }; +TYPE_INFO(aspeed_gpio_ast2600_1_8v_info) -static void aspeed_gpio_register_types(void) -{ - type_register_static(&aspeed_gpio_info); - type_register_static(&aspeed_gpio_ast2400_info); - type_register_static(&aspeed_gpio_ast2500_info); - type_register_static(&aspeed_gpio_ast2600_3_6v_info); - type_register_static(&aspeed_gpio_ast2600_1_8v_info); -} -type_init(aspeed_gpio_register_types); diff --git a/hw/gpio/bcm2835_gpio.c b/hw/gpio/bcm2835_gpio.c index abdddbc67c..2ea64a77e8 100644 --- a/hw/gpio/bcm2835_gpio.c +++ b/hw/gpio/bcm2835_gpio.c @@ -336,10 +336,6 @@ static const TypeInfo bcm2835_gpio_info = { .instance_init = bcm2835_gpio_init, .class_init = bcm2835_gpio_class_init, }; +TYPE_INFO(bcm2835_gpio_info) -static void bcm2835_gpio_register_types(void) -{ - type_register_static(&bcm2835_gpio_info); -} -type_init(bcm2835_gpio_register_types) diff --git a/hw/gpio/gpio_key.c b/hw/gpio/gpio_key.c index 46bbd42772..571b74a5e5 100644 --- a/hw/gpio/gpio_key.c +++ b/hw/gpio/gpio_key.c @@ -99,10 +99,6 @@ static const TypeInfo gpio_key_info = { .instance_size = sizeof(GPIOKEYState), .class_init = gpio_key_class_init, }; +TYPE_INFO(gpio_key_info) -static void gpio_key_register_types(void) -{ - type_register_static(&gpio_key_info); -} -type_init(gpio_key_register_types) diff --git a/hw/gpio/imx_gpio.c b/hw/gpio/imx_gpio.c index 7a591804a9..df533846f7 100644 --- a/hw/gpio/imx_gpio.c +++ b/hw/gpio/imx_gpio.c @@ -346,10 +346,6 @@ static const TypeInfo imx_gpio_info = { .instance_size = sizeof(IMXGPIOState), .class_init = imx_gpio_class_init, }; +TYPE_INFO(imx_gpio_info) -static void imx_gpio_register_types(void) -{ - type_register_static(&imx_gpio_info); -} -type_init(imx_gpio_register_types) diff --git a/hw/gpio/max7310.c b/hw/gpio/max7310.c index bebb4030d2..3a8e4ab1d5 100644 --- a/hw/gpio/max7310.c +++ b/hw/gpio/max7310.c @@ -215,10 +215,6 @@ static const TypeInfo max7310_info = { .instance_size = sizeof(MAX7310State), .class_init = max7310_class_init, }; +TYPE_INFO(max7310_info) -static void max7310_register_types(void) -{ - type_register_static(&max7310_info); -} -type_init(max7310_register_types) diff --git a/hw/gpio/mpc8xxx.c b/hw/gpio/mpc8xxx.c index 1d99667094..b1bdcc2851 100644 --- a/hw/gpio/mpc8xxx.c +++ b/hw/gpio/mpc8xxx.c @@ -214,10 +214,6 @@ static const TypeInfo mpc8xxx_gpio_info = { .instance_init = mpc8xxx_gpio_initfn, .class_init = mpc8xxx_gpio_class_init, }; +TYPE_INFO(mpc8xxx_gpio_info) -static void mpc8xxx_gpio_register_types(void) -{ - type_register_static(&mpc8xxx_gpio_info); -} -type_init(mpc8xxx_gpio_register_types) diff --git a/hw/gpio/nrf51_gpio.c b/hw/gpio/nrf51_gpio.c index b47fddf4ed..e59d975a0c 100644 --- a/hw/gpio/nrf51_gpio.c +++ b/hw/gpio/nrf51_gpio.c @@ -309,10 +309,6 @@ static const TypeInfo nrf51_gpio_info = { .instance_init = nrf51_gpio_init, .class_init = nrf51_gpio_class_init }; +TYPE_INFO(nrf51_gpio_info) -static void nrf51_gpio_register_types(void) -{ - type_register_static(&nrf51_gpio_info); -} -type_init(nrf51_gpio_register_types) diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c index f662c4cb95..f8ab9a49df 100644 --- a/hw/gpio/omap_gpio.c +++ b/hw/gpio/omap_gpio.c @@ -767,6 +767,7 @@ static const TypeInfo omap_gpio_info = { .instance_init = omap_gpio_init, .class_init = omap_gpio_class_init, }; +TYPE_INFO(omap_gpio_info) void omap2_gpio_set_iclk(omap2_gpif *gpio, omap_clk clk) { @@ -801,11 +802,6 @@ static const TypeInfo omap2_gpio_info = { .instance_size = sizeof(struct omap2_gpif_s), .class_init = omap2_gpio_class_init, }; +TYPE_INFO(omap2_gpio_info) -static void omap_gpio_register_types(void) -{ - type_register_static(&omap_gpio_info); - type_register_static(&omap2_gpio_info); -} -type_init(omap_gpio_register_types) diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c index 6d3c36bc16..b6ef1c7340 100644 --- a/hw/gpio/pl061.c +++ b/hw/gpio/pl061.c @@ -385,17 +385,13 @@ static const TypeInfo pl061_info = { .instance_init = pl061_init, .class_init = pl061_class_init, }; +TYPE_INFO(pl061_info) static const TypeInfo pl061_luminary_info = { .name = "pl061_luminary", .parent = TYPE_PL061, .instance_init = pl061_luminary_init, }; +TYPE_INFO(pl061_luminary_info) -static void pl061_register_types(void) -{ - type_register_static(&pl061_info); - type_register_static(&pl061_luminary_info); -} -type_init(pl061_register_types) diff --git a/hw/gpio/puv3_gpio.c b/hw/gpio/puv3_gpio.c index 7362b6715f..4c2edda889 100644 --- a/hw/gpio/puv3_gpio.c +++ b/hw/gpio/puv3_gpio.c @@ -144,10 +144,6 @@ static const TypeInfo puv3_gpio_info = { .instance_size = sizeof(PUV3GPIOState), .class_init = puv3_gpio_class_init, }; +TYPE_INFO(puv3_gpio_info) -static void puv3_gpio_register_type(void) -{ - type_register_static(&puv3_gpio_info); -} -type_init(puv3_gpio_register_type) diff --git a/hw/gpio/zaurus.c b/hw/gpio/zaurus.c index 258e926493..1100850a6c 100644 --- a/hw/gpio/zaurus.c +++ b/hw/gpio/zaurus.c @@ -255,13 +255,9 @@ static const TypeInfo scoop_sysbus_info = { .instance_init = scoop_init, .class_init = scoop_sysbus_class_init, }; +TYPE_INFO(scoop_sysbus_info) -static void scoop_register_types(void) -{ - type_register_static(&scoop_sysbus_info); -} -type_init(scoop_register_types) /* Write the bootloader parameters memory area. */ diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c index 7f0c6223a8..27faa97644 100644 --- a/hw/hppa/dino.c +++ b/hw/hppa/dino.c @@ -601,10 +601,6 @@ static const TypeInfo dino_pcihost_info = { .instance_size = sizeof(DinoState), .class_init = dino_pcihost_class_init, }; +TYPE_INFO(dino_pcihost_info) -static void dino_register_types(void) -{ - type_register_static(&dino_pcihost_info); -} -type_init(dino_register_types) diff --git a/hw/hppa/lasi.c b/hw/hppa/lasi.c index 19974034f3..8a54923c26 100644 --- a/hw/hppa/lasi.c +++ b/hw/hppa/lasi.c @@ -359,10 +359,6 @@ static const TypeInfo lasi_pcihost_info = { .instance_size = sizeof(LasiState), .class_init = lasi_class_init, }; +TYPE_INFO(lasi_pcihost_info) -static void lasi_register_types(void) -{ - type_register_static(&lasi_pcihost_info); -} -type_init(lasi_register_types) diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c index 844d00776d..07c9214bf1 100644 --- a/hw/hyperv/hyperv.c +++ b/hw/hyperv/hyperv.c @@ -159,13 +159,9 @@ static const TypeInfo synic_type_info = { .instance_size = sizeof(SynICState), .class_init = synic_class_init, }; +TYPE_INFO(synic_type_info) -static void synic_register_types(void) -{ - type_register_static(&synic_type_info); -} -type_init(synic_register_types) /* * KVM has its own message producers (SynIC timers). To guarantee diff --git a/hw/hyperv/hyperv_testdev.c b/hw/hyperv/hyperv_testdev.c index 88a5a63782..c83d0a9325 100644 --- a/hw/hyperv/hyperv_testdev.c +++ b/hw/hyperv/hyperv_testdev.c @@ -319,9 +319,5 @@ static const TypeInfo hv_test_dev_info = { .instance_size = sizeof(HypervTestDev), .class_init = hv_test_dev_class_init, }; +TYPE_INFO(hv_test_dev_info) -static void hv_test_dev_register_types(void) -{ - type_register_static(&hv_test_dev_info); -} -type_init(hv_test_dev_register_types); diff --git a/hw/hyperv/vmbus.c b/hw/hyperv/vmbus.c index 75af6b83dd..d4cc8edfba 100644 --- a/hw/hyperv/vmbus.c +++ b/hw/hyperv/vmbus.c @@ -2485,6 +2485,7 @@ static const TypeInfo vmbus_dev_type_info = { .class_init = vmbus_dev_class_init, .instance_init = vmbus_dev_instance_init, }; +TYPE_INFO(vmbus_dev_type_info) static void vmbus_realize(BusState *bus, Error **errp) { @@ -2697,6 +2698,7 @@ static const TypeInfo vmbus_type_info = { .instance_size = sizeof(VMBus), .class_init = vmbus_class_init, }; +TYPE_INFO(vmbus_type_info) static void vmbus_bridge_realize(DeviceState *dev, Error **errp) { @@ -2762,12 +2764,6 @@ static const TypeInfo vmbus_bridge_type_info = { .instance_size = sizeof(VMBusBridge), .class_init = vmbus_bridge_class_init, }; +TYPE_INFO(vmbus_bridge_type_info) -static void vmbus_register_types(void) -{ - type_register_static(&vmbus_bridge_type_info); - type_register_static(&vmbus_dev_type_info); - type_register_static(&vmbus_type_info); -} -type_init(vmbus_register_types) diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c index 518a3f5c6f..ecbbc22524 100644 --- a/hw/i2c/aspeed_i2c.c +++ b/hw/i2c/aspeed_i2c.c @@ -845,6 +845,7 @@ static const TypeInfo aspeed_i2c_info = { .class_size = sizeof(AspeedI2CClass), .abstract = true, }; +TYPE_INFO(aspeed_i2c_info) static qemu_irq aspeed_2400_i2c_bus_get_irq(AspeedI2CBus *bus) { @@ -880,6 +881,7 @@ static const TypeInfo aspeed_2400_i2c_info = { .parent = TYPE_ASPEED_I2C, .class_init = aspeed_2400_i2c_class_init, }; +TYPE_INFO(aspeed_2400_i2c_info) static qemu_irq aspeed_2500_i2c_bus_get_irq(AspeedI2CBus *bus) { @@ -914,6 +916,7 @@ static const TypeInfo aspeed_2500_i2c_info = { .parent = TYPE_ASPEED_I2C, .class_init = aspeed_2500_i2c_class_init, }; +TYPE_INFO(aspeed_2500_i2c_info) static qemu_irq aspeed_2600_i2c_bus_get_irq(AspeedI2CBus *bus) { @@ -947,16 +950,9 @@ static const TypeInfo aspeed_2600_i2c_info = { .parent = TYPE_ASPEED_I2C, .class_init = aspeed_2600_i2c_class_init, }; +TYPE_INFO(aspeed_2600_i2c_info) -static void aspeed_i2c_register_types(void) -{ - type_register_static(&aspeed_i2c_info); - type_register_static(&aspeed_2400_i2c_info); - type_register_static(&aspeed_2500_i2c_info); - type_register_static(&aspeed_2600_i2c_info); -} -type_init(aspeed_i2c_register_types) I2CBus *aspeed_i2c_get_bus(AspeedI2CState *s, int busnr) diff --git a/hw/i2c/bitbang_i2c.c b/hw/i2c/bitbang_i2c.c index b000952b98..566ccf0d74 100644 --- a/hw/i2c/bitbang_i2c.c +++ b/hw/i2c/bitbang_i2c.c @@ -216,10 +216,6 @@ static const TypeInfo gpio_i2c_info = { .instance_init = gpio_i2c_init, .class_init = gpio_i2c_class_init, }; +TYPE_INFO(gpio_i2c_info) -static void bitbang_i2c_register_types(void) -{ - type_register_static(&gpio_i2c_info); -} -type_init(bitbang_i2c_register_types) diff --git a/hw/i2c/core.c b/hw/i2c/core.c index 21ec52ac5a..81bfce2797 100644 --- a/hw/i2c/core.c +++ b/hw/i2c/core.c @@ -27,6 +27,7 @@ static const TypeInfo i2c_bus_info = { .parent = TYPE_BUS, .instance_size = sizeof(I2CBus), }; +TYPE_INFO(i2c_bus_info) static int i2c_bus_pre_save(void *opaque) { @@ -306,11 +307,6 @@ static const TypeInfo i2c_slave_type_info = { .class_size = sizeof(I2CSlaveClass), .class_init = i2c_slave_class_init, }; +TYPE_INFO(i2c_slave_type_info) -static void i2c_slave_register_types(void) -{ - type_register_static(&i2c_bus_info); - type_register_static(&i2c_slave_type_info); -} -type_init(i2c_slave_register_types) diff --git a/hw/i2c/exynos4210_i2c.c b/hw/i2c/exynos4210_i2c.c index a600f65560..3a803ebc8b 100644 --- a/hw/i2c/exynos4210_i2c.c +++ b/hw/i2c/exynos4210_i2c.c @@ -324,10 +324,6 @@ static const TypeInfo exynos4210_i2c_type_info = { .instance_init = exynos4210_i2c_init, .class_init = exynos4210_i2c_class_init, }; +TYPE_INFO(exynos4210_i2c_type_info) -static void exynos4210_i2c_register_types(void) -{ - type_register_static(&exynos4210_i2c_type_info); -} -type_init(exynos4210_i2c_register_types) diff --git a/hw/i2c/imx_i2c.c b/hw/i2c/imx_i2c.c index 2e02e1c4fa..a38eb18e33 100644 --- a/hw/i2c/imx_i2c.c +++ b/hw/i2c/imx_i2c.c @@ -324,10 +324,6 @@ static const TypeInfo imx_i2c_type_info = { .instance_size = sizeof(IMXI2CState), .class_init = imx_i2c_class_init, }; +TYPE_INFO(imx_i2c_type_info) -static void imx_i2c_register_types(void) -{ - type_register_static(&imx_i2c_type_info); -} -type_init(imx_i2c_register_types) diff --git a/hw/i2c/microbit_i2c.c b/hw/i2c/microbit_i2c.c index 8024739820..51eb28bf21 100644 --- a/hw/i2c/microbit_i2c.c +++ b/hw/i2c/microbit_i2c.c @@ -120,10 +120,6 @@ static const TypeInfo microbit_i2c_info = { .instance_size = sizeof(MicrobitI2CState), .class_init = microbit_i2c_class_init, }; +TYPE_INFO(microbit_i2c_info) -static void microbit_i2c_register_types(void) -{ - type_register_static(µbit_i2c_info); -} -type_init(microbit_i2c_register_types) diff --git a/hw/i2c/mpc_i2c.c b/hw/i2c/mpc_i2c.c index 9a724f3a3e..c65fb2775b 100644 --- a/hw/i2c/mpc_i2c.c +++ b/hw/i2c/mpc_i2c.c @@ -351,10 +351,6 @@ static const TypeInfo mpc_i2c_type_info = { .instance_size = sizeof(MPCI2CState), .class_init = mpc_i2c_class_init, }; +TYPE_INFO(mpc_i2c_type_info) -static void mpc_i2c_register_types(void) -{ - type_register_static(&mpc_i2c_type_info); -} -type_init(mpc_i2c_register_types) diff --git a/hw/i2c/omap_i2c.c b/hw/i2c/omap_i2c.c index e5d205dda5..ba7b7ee734 100644 --- a/hw/i2c/omap_i2c.c +++ b/hw/i2c/omap_i2c.c @@ -534,11 +534,8 @@ static const TypeInfo omap_i2c_info = { .instance_init = omap_i2c_init, .class_init = omap_i2c_class_init, }; +TYPE_INFO(omap_i2c_info) -static void omap_i2c_register_types(void) -{ - type_register_static(&omap_i2c_info); -} I2CBus *omap_i2c_bus(DeviceState *omap_i2c) { @@ -546,4 +543,3 @@ I2CBus *omap_i2c_bus(DeviceState *omap_i2c) return s->bus; } -type_init(omap_i2c_register_types) diff --git a/hw/i2c/ppc4xx_i2c.c b/hw/i2c/ppc4xx_i2c.c index c0a8e04567..49ca51516e 100644 --- a/hw/i2c/ppc4xx_i2c.c +++ b/hw/i2c/ppc4xx_i2c.c @@ -363,10 +363,6 @@ static const TypeInfo ppc4xx_i2c_type_info = { .instance_init = ppc4xx_i2c_init, .class_init = ppc4xx_i2c_class_init, }; +TYPE_INFO(ppc4xx_i2c_type_info) -static void ppc4xx_i2c_register_types(void) -{ - type_register_static(&ppc4xx_i2c_type_info); -} -type_init(ppc4xx_i2c_register_types) diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c index b7def9eeb8..cc506b6d4a 100644 --- a/hw/i2c/smbus_eeprom.c +++ b/hw/i2c/smbus_eeprom.c @@ -157,13 +157,9 @@ static const TypeInfo smbus_eeprom_info = { .instance_size = sizeof(SMBusEEPROMDevice), .class_init = smbus_eeprom_class_initfn, }; +TYPE_INFO(smbus_eeprom_info) -static void smbus_eeprom_register_types(void) -{ - type_register_static(&smbus_eeprom_info); -} -type_init(smbus_eeprom_register_types) void smbus_eeprom_init_one(I2CBus *smbus, uint8_t address, uint8_t *eeprom_buf) { diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c index 48f1ff4191..37a41b5b77 100644 --- a/hw/i2c/smbus_ich9.c +++ b/hw/i2c/smbus_ich9.c @@ -146,10 +146,6 @@ static const TypeInfo ich9_smb_info = { { }, }, }; +TYPE_INFO(ich9_smb_info) -static void ich9_smb_register(void) -{ - type_register_static(&ich9_smb_info); -} -type_init(ich9_smb_register); diff --git a/hw/i2c/smbus_slave.c b/hw/i2c/smbus_slave.c index 5d10e27664..6a8b0846c7 100644 --- a/hw/i2c/smbus_slave.c +++ b/hw/i2c/smbus_slave.c @@ -228,10 +228,6 @@ static const TypeInfo smbus_device_type_info = { .class_size = sizeof(SMBusDeviceClass), .class_init = smbus_device_class_init, }; +TYPE_INFO(smbus_device_type_info) -static void smbus_device_register_types(void) -{ - type_register_static(&smbus_device_type_info); -} -type_init(smbus_device_register_types) diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c index da8cda2ec1..13ddddef90 100644 --- a/hw/i2c/versatile_i2c.c +++ b/hw/i2c/versatile_i2c.c @@ -102,10 +102,6 @@ static const TypeInfo versatile_i2c_info = { .instance_size = sizeof(VersatileI2CState), .instance_init = versatile_i2c_init, }; +TYPE_INFO(versatile_i2c_info) -static void versatile_i2c_register_types(void) -{ - type_register_static(&versatile_i2c_info); -} -type_init(versatile_i2c_register_types) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 087f601666..54bc1acbac 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1620,6 +1620,7 @@ static const TypeInfo amdvi = { .instance_init = amdvi_instance_init, .class_init = amdvi_class_init }; +TYPE_INFO(amdvi) static const TypeInfo amdviPCI = { .name = "AMDVI-PCI", @@ -1630,6 +1631,7 @@ static const TypeInfo amdviPCI = { { }, }, }; +TYPE_INFO(amdviPCI) static void amdvi_iommu_memory_region_class_init(ObjectClass *klass, void *data) { @@ -1644,12 +1646,6 @@ static const TypeInfo amdvi_iommu_memory_region_info = { .name = TYPE_AMD_IOMMU_MEMORY_REGION, .class_init = amdvi_iommu_memory_region_class_init, }; +TYPE_INFO(amdvi_iommu_memory_region_info) -static void amdviPCI_register_types(void) -{ - type_register_static(&amdviPCI); - type_register_static(&amdvi); - type_register_static(&amdvi_iommu_memory_region_info); -} -type_init(amdviPCI_register_types); diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 5284bb68b6..5e9101cd52 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3874,6 +3874,7 @@ static const TypeInfo vtd_info = { .instance_size = sizeof(IntelIOMMUState), .class_init = vtd_class_init, }; +TYPE_INFO(vtd_info) static void vtd_iommu_memory_region_class_init(ObjectClass *klass, void *data) @@ -3890,11 +3891,6 @@ static const TypeInfo vtd_iommu_memory_region_info = { .name = TYPE_INTEL_IOMMU_MEMORY_REGION, .class_init = vtd_iommu_memory_region_class_init, }; +TYPE_INFO(vtd_iommu_memory_region_info) -static void vtd_register_types(void) -{ - type_register_static(&vtd_info); - type_register_static(&vtd_iommu_memory_region_info); -} -type_init(vtd_register_types) diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c index 4eb2d77b87..06dd7f8c9a 100644 --- a/hw/i386/kvm/apic.c +++ b/hw/i386/kvm/apic.c @@ -257,10 +257,6 @@ static const TypeInfo kvm_apic_info = { .instance_size = sizeof(APICCommonState), .class_init = kvm_apic_class_init, }; +TYPE_INFO(kvm_apic_info) -static void kvm_apic_register_types(void) -{ - type_register_static(&kvm_apic_info); -} -type_init(kvm_apic_register_types) diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c index 64283358f9..e9f57d0e2b 100644 --- a/hw/i386/kvm/clock.c +++ b/hw/i386/kvm/clock.c @@ -326,6 +326,7 @@ static const TypeInfo kvmclock_info = { .instance_size = sizeof(KVMClockState), .class_init = kvmclock_class_init, }; +TYPE_INFO(kvmclock_info) /* Note: Must be called after VCPU initialization. */ void kvmclock_create(void) @@ -339,9 +340,4 @@ void kvmclock_create(void) } } -static void kvmclock_register_types(void) -{ - type_register_static(&kvmclock_info); -} -type_init(kvmclock_register_types) diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c index 876f5aa6fa..0f3d10d123 100644 --- a/hw/i386/kvm/i8254.c +++ b/hw/i386/kvm/i8254.c @@ -332,10 +332,6 @@ static const TypeInfo kvm_pit_info = { .class_init = kvm_pit_class_init, .class_size = sizeof(KVMPITClass), }; +TYPE_INFO(kvm_pit_info) -static void kvm_pit_register(void) -{ - type_register_static(&kvm_pit_info); -} -type_init(kvm_pit_register) diff --git a/hw/i386/kvm/i8259.c b/hw/i386/kvm/i8259.c index e404fdcdac..f7844260d5 100644 --- a/hw/i386/kvm/i8259.c +++ b/hw/i386/kvm/i8259.c @@ -158,10 +158,6 @@ static const TypeInfo kvm_i8259_info = { .class_init = kvm_i8259_class_init, .class_size = sizeof(KVMPICClass), }; +TYPE_INFO(kvm_i8259_info) -static void kvm_pic_register_types(void) -{ - type_register_static(&kvm_i8259_info); -} -type_init(kvm_pic_register_types) diff --git a/hw/i386/kvm/ioapic.c b/hw/i386/kvm/ioapic.c index 4ba8e47251..751cc5b6e0 100644 --- a/hw/i386/kvm/ioapic.c +++ b/hw/i386/kvm/ioapic.c @@ -158,10 +158,6 @@ static const TypeInfo kvm_ioapic_info = { .instance_size = sizeof(KVMIOAPICState), .class_init = kvm_ioapic_class_init, }; +TYPE_INFO(kvm_ioapic_info) -static void kvm_ioapic_register_types(void) -{ - type_register_static(&kvm_ioapic_info); -} -type_init(kvm_ioapic_register_types) diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index 51639202c2..a08519ee70 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -863,10 +863,6 @@ static const TypeInfo vapic_type = { .instance_size = sizeof(VAPICROMState), .class_init = vapic_class_init, }; +TYPE_INFO(vapic_type) -static void vapic_register(void) -{ - type_register_static(&vapic_type); -} -type_init(vapic_register); diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index 81d0888930..a332e9b9e1 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -527,9 +527,5 @@ static const TypeInfo microvm_machine_info = { { } }, }; +TYPE_INFO(microvm_machine_info) -static void microvm_machine_init(void) -{ - type_register_static(µvm_machine_info); -} -type_init(microvm_machine_init); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 47c5ca3e34..e67ed86091 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -2018,10 +2018,6 @@ static const TypeInfo pc_machine_info = { { } }, }; +TYPE_INFO(pc_machine_info) -static void pc_machine_register_types(void) -{ - type_register_static(&pc_machine_info); -} -type_init(pc_machine_register_types) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index b789e83f9a..a79ab9aa38 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -906,12 +906,8 @@ static TypeInfo isa_bridge_info = { { }, }, }; +TYPE_INFO(isa_bridge_info) -static void pt_graphics_register_types(void) -{ - type_register_static(&isa_bridge_info); -} -type_init(pt_graphics_register_types) void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) { diff --git a/hw/i386/port92.c b/hw/i386/port92.c index 19866c44ef..cc41fb034f 100644 --- a/hw/i386/port92.c +++ b/hw/i386/port92.c @@ -117,10 +117,6 @@ static const TypeInfo port92_info = { .instance_init = port92_initfn, .class_init = port92_class_initfn, }; +TYPE_INFO(port92_info) -static void port92_register_types(void) -{ - type_register_static(&port92_info); -} -type_init(port92_register_types) diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c index ba5c987bd2..cea1924e69 100644 --- a/hw/i386/vmmouse.c +++ b/hw/i386/vmmouse.c @@ -316,10 +316,6 @@ static const TypeInfo vmmouse_info = { .instance_size = sizeof(VMMouseState), .class_init = vmmouse_class_initfn, }; +TYPE_INFO(vmmouse_info) -static void vmmouse_register_types(void) -{ - type_register_static(&vmmouse_info); -} -type_init(vmmouse_register_types) diff --git a/hw/i386/vmport.c b/hw/i386/vmport.c index 89bda9108e..6379e14401 100644 --- a/hw/i386/vmport.c +++ b/hw/i386/vmport.c @@ -303,10 +303,6 @@ static const TypeInfo vmport_info = { .instance_size = sizeof(VMPortState), .class_init = vmport_class_initfn, }; +TYPE_INFO(vmport_info) -static void vmport_register_types(void) -{ - type_register_static(&vmport_info); -} -type_init(vmport_register_types) diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index 4104060e68..ab1d4fb9e4 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -169,10 +169,6 @@ static const TypeInfo x86_iommu_info = { .class_size = sizeof(X86IOMMUClass), .abstract = true, }; +TYPE_INFO(x86_iommu_info) -static void x86_iommu_register_types(void) -{ - type_register_static(&x86_iommu_info); -} -type_init(x86_iommu_register_types) diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 67bee1bcb8..cf77c1e4bb 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -965,10 +965,6 @@ static const TypeInfo x86_machine_info = { { } }, }; +TYPE_INFO(x86_machine_info) -static void x86_machine_register_types(void) -{ - type_register_static(&x86_machine_info); -} -type_init(x86_machine_register_types) diff --git a/hw/i386/xen/xen_apic.c b/hw/i386/xen/xen_apic.c index 7c7a60b166..9578463a48 100644 --- a/hw/i386/xen/xen_apic.c +++ b/hw/i386/xen/xen_apic.c @@ -94,10 +94,6 @@ static const TypeInfo xen_apic_info = { .instance_size = sizeof(APICCommonState), .class_init = xen_apic_class_init, }; +TYPE_INFO(xen_apic_info) -static void xen_apic_register_types(void) -{ - type_register_static(&xen_apic_info); -} -type_init(xen_apic_register_types) diff --git a/hw/i386/xen/xen_platform.c b/hw/i386/xen/xen_platform.c index a1492fdecd..93de73323b 100644 --- a/hw/i386/xen/xen_platform.c +++ b/hw/i386/xen/xen_platform.c @@ -523,10 +523,6 @@ static const TypeInfo xen_platform_info = { { }, }, }; +TYPE_INFO(xen_platform_info) -static void xen_platform_register_types(void) -{ - type_register_static(&xen_platform_info); -} -type_init(xen_platform_register_types) diff --git a/hw/i386/xen/xen_pvdevice.c b/hw/i386/xen/xen_pvdevice.c index ee2610c7a0..d62d26e0b6 100644 --- a/hw/i386/xen/xen_pvdevice.c +++ b/hw/i386/xen/xen_pvdevice.c @@ -145,10 +145,6 @@ static const TypeInfo xen_pv_type_info = { { }, }, }; +TYPE_INFO(xen_pv_type_info) -static void xen_pv_register_types(void) -{ - type_register_static(&xen_pv_type_info); -} -type_init(xen_pv_register_types) diff --git a/hw/ide/ahci-allwinner.c b/hw/ide/ahci-allwinner.c index 227e747ba7..84197b794d 100644 --- a/hw/ide/ahci-allwinner.c +++ b/hw/ide/ahci-allwinner.c @@ -118,10 +118,6 @@ static const TypeInfo allwinner_ahci_info = { .instance_init = allwinner_ahci_init, .class_init = allwinner_ahci_class_init, }; +TYPE_INFO(allwinner_ahci_info) -static void sysbus_ahci_register_types(void) -{ - type_register_static(&allwinner_ahci_info); -} -type_init(sysbus_ahci_register_types) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 009120f88b..299a9bba56 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -1808,13 +1808,9 @@ static const TypeInfo sysbus_ahci_info = { .instance_init = sysbus_ahci_init, .class_init = sysbus_ahci_class_init, }; +TYPE_INFO(sysbus_ahci_info) -static void sysbus_ahci_register_types(void) -{ - type_register_static(&sysbus_ahci_info); -} -type_init(sysbus_ahci_register_types) int32_t ahci_get_num_ports(PCIDevice *dev) { diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index c254631485..390a3dc679 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -342,10 +342,6 @@ static const TypeInfo cmd646_ide_info = { .parent = TYPE_PCI_IDE, .class_init = cmd646_ide_class_init, }; +TYPE_INFO(cmd646_ide_info) -static void cmd646_ide_register_types(void) -{ - type_register_static(&cmd646_ide_info); -} -type_init(cmd646_ide_register_types) diff --git a/hw/ide/ich.c b/hw/ide/ich.c index eff3188fff..f7fb430a3c 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -188,10 +188,6 @@ static const TypeInfo ich_ahci_info = { { }, }, }; +TYPE_INFO(ich_ahci_info) -static void ich_ahci_register_types(void) -{ - type_register_static(&ich_ahci_info); -} -type_init(ich_ahci_register_types) diff --git a/hw/ide/isa.c b/hw/ide/isa.c index f28c8fba6c..f63166f31d 100644 --- a/hw/ide/isa.c +++ b/hw/ide/isa.c @@ -128,10 +128,6 @@ static const TypeInfo isa_ide_info = { .instance_size = sizeof(ISAIDEState), .class_init = isa_ide_class_initfn, }; +TYPE_INFO(isa_ide_info) -static void isa_ide_register_types(void) -{ - type_register_static(&isa_ide_info); -} -type_init(isa_ide_register_types) diff --git a/hw/ide/macio.c b/hw/ide/macio.c index 62a599a075..4e74dafa03 100644 --- a/hw/ide/macio.c +++ b/hw/ide/macio.c @@ -486,11 +486,8 @@ static const TypeInfo macio_ide_type_info = { .instance_init = macio_ide_initfn, .class_init = macio_ide_class_init, }; +TYPE_INFO(macio_ide_type_info) -static void macio_ide_register_types(void) -{ - type_register_static(&macio_ide_type_info); -} /* hd_table must contain 2 block drivers */ void macio_ide_init_drives(MACIOIDEState *s, DriveInfo **hd_table) @@ -510,4 +507,3 @@ void macio_ide_register_dma(MACIOIDEState *s) pmac_ide_transfer, pmac_ide_flush, s); } -type_init(macio_ide_register_types) diff --git a/hw/ide/microdrive.c b/hw/ide/microdrive.c index c4cc0a84eb..97483e5836 100644 --- a/hw/ide/microdrive.c +++ b/hw/ide/microdrive.c @@ -592,6 +592,7 @@ static const TypeInfo dscm1xxxx_type_info = { .parent = TYPE_MICRODRIVE, .class_init = dscm1xxxx_class_init, }; +TYPE_INFO(dscm1xxxx_type_info) static void microdrive_realize(DeviceState *dev, Error **errp) { @@ -632,11 +633,6 @@ static const TypeInfo microdrive_type_info = { .abstract = true, .class_init = microdrive_class_init, }; +TYPE_INFO(microdrive_type_info) -static void microdrive_register_types(void) -{ - type_register_static(µdrive_type_info); - type_register_static(&dscm1xxxx_type_info); -} -type_init(microdrive_register_types) diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c index d233bd8c01..83f0d4a583 100644 --- a/hw/ide/mmio.c +++ b/hw/ide/mmio.c @@ -165,11 +165,8 @@ static const TypeInfo mmio_ide_type_info = { .instance_init = mmio_ide_initfn, .class_init = mmio_ide_class_init, }; +TYPE_INFO(mmio_ide_type_info) -static void mmio_ide_register_types(void) -{ - type_register_static(&mmio_ide_type_info); -} void mmio_ide_init_drives(DeviceState *dev, DriveInfo *hd0, DriveInfo *hd1) { @@ -183,4 +180,3 @@ void mmio_ide_init_drives(DeviceState *dev, DriveInfo *hd0, DriveInfo *hd1) } } -type_init(mmio_ide_register_types) diff --git a/hw/ide/pci.c b/hw/ide/pci.c index 5e85c4ad17..7b20224754 100644 --- a/hw/ide/pci.c +++ b/hw/ide/pci.c @@ -525,10 +525,6 @@ static const TypeInfo pci_ide_type_info = { { }, }, }; +TYPE_INFO(pci_ide_type_info) -static void pci_ide_register_types(void) -{ - type_register_static(&pci_ide_type_info); -} -type_init(pci_ide_register_types) diff --git a/hw/ide/piix.c b/hw/ide/piix.c index b402a93636..804c241c1f 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -229,12 +229,14 @@ static const TypeInfo piix3_ide_info = { .parent = TYPE_PCI_IDE, .class_init = piix3_ide_class_init, }; +TYPE_INFO(piix3_ide_info) static const TypeInfo piix3_ide_xen_info = { .name = "piix3-ide-xen", .parent = TYPE_PCI_IDE, .class_init = piix3_ide_class_init, }; +TYPE_INFO(piix3_ide_xen_info) /* NOTE: for the PIIX4, the IRQs and IOports are hardcoded */ static void piix4_ide_class_init(ObjectClass *klass, void *data) @@ -257,12 +259,6 @@ static const TypeInfo piix4_ide_info = { .parent = TYPE_PCI_IDE, .class_init = piix4_ide_class_init, }; +TYPE_INFO(piix4_ide_info) -static void piix_ide_register_types(void) -{ - type_register_static(&piix3_ide_info); - type_register_static(&piix3_ide_xen_info); - type_register_static(&piix4_ide_info); -} -type_init(piix_ide_register_types) diff --git a/hw/ide/qdev.c b/hw/ide/qdev.c index 27ff1f7f66..4e03200438 100644 --- a/hw/ide/qdev.c +++ b/hw/ide/qdev.c @@ -66,6 +66,7 @@ static const TypeInfo ide_bus_info = { .instance_size = sizeof(IDEBus), .class_init = ide_bus_class_init, }; +TYPE_INFO(ide_bus_info) void ide_bus_new(IDEBus *idebus, size_t idebus_size, DeviceState *dev, int bus_id, int max_units) @@ -330,6 +331,7 @@ static const TypeInfo ide_hd_info = { .instance_size = sizeof(IDEDrive), .class_init = ide_hd_class_init, }; +TYPE_INFO(ide_hd_info) static Property ide_cd_properties[] = { DEFINE_IDE_DEV_PROPERTIES(), @@ -353,6 +355,7 @@ static const TypeInfo ide_cd_info = { .instance_size = sizeof(IDEDrive), .class_init = ide_cd_class_init, }; +TYPE_INFO(ide_cd_info) static Property ide_drive_properties[] = { DEFINE_IDE_DEV_PROPERTIES(), @@ -376,6 +379,7 @@ static const TypeInfo ide_drive_info = { .instance_size = sizeof(IDEDrive), .class_init = ide_drive_class_init, }; +TYPE_INFO(ide_drive_info) static void ide_device_class_init(ObjectClass *klass, void *data) { @@ -395,14 +399,6 @@ static const TypeInfo ide_device_type_info = { .class_init = ide_device_class_init, .instance_init = ide_dev_instance_init, }; +TYPE_INFO(ide_device_type_info) -static void ide_register_types(void) -{ - type_register_static(&ide_bus_info); - type_register_static(&ide_hd_info); - type_register_static(&ide_cd_info); - type_register_static(&ide_drive_info); - type_register_static(&ide_device_type_info); -} -type_init(ide_register_types) diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c index 94d2b57f95..68279530fd 100644 --- a/hw/ide/sii3112.c +++ b/hw/ide/sii3112.c @@ -313,10 +313,6 @@ static const TypeInfo sii3112_pci_info = { .instance_size = sizeof(SiI3112PCIState), .class_init = sii3112_pci_class_init, }; +TYPE_INFO(sii3112_pci_info) -static void sii3112_register_types(void) -{ - type_register_static(&sii3112_pci_info); -} -type_init(sii3112_register_types) diff --git a/hw/ide/via.c b/hw/ide/via.c index be09912b33..00a995acd7 100644 --- a/hw/ide/via.c +++ b/hw/ide/via.c @@ -231,10 +231,6 @@ static const TypeInfo via_ide_info = { .parent = TYPE_PCI_IDE, .class_init = via_ide_class_init, }; +TYPE_INFO(via_ide_info) -static void via_ide_register_types(void) -{ - type_register_static(&via_ide_info); -} -type_init(via_ide_register_types) diff --git a/hw/input/adb-kbd.c b/hw/input/adb-kbd.c index 3cfb6a7a20..4f0f546581 100644 --- a/hw/input/adb-kbd.c +++ b/hw/input/adb-kbd.c @@ -402,10 +402,6 @@ static const TypeInfo adb_kbd_type_info = { .class_init = adb_kbd_class_init, .class_size = sizeof(ADBKeyboardClass), }; +TYPE_INFO(adb_kbd_type_info) -static void adb_kbd_register_types(void) -{ - type_register_static(&adb_kbd_type_info); -} -type_init(adb_kbd_register_types) diff --git a/hw/input/adb-mouse.c b/hw/input/adb-mouse.c index 577a38ff2e..c0c8dead39 100644 --- a/hw/input/adb-mouse.c +++ b/hw/input/adb-mouse.c @@ -273,10 +273,6 @@ static const TypeInfo adb_mouse_type_info = { .class_init = adb_mouse_class_init, .class_size = sizeof(ADBMouseClass), }; +TYPE_INFO(adb_mouse_type_info) -static void adb_mouse_register_types(void) -{ - type_register_static(&adb_mouse_type_info); -} -type_init(adb_mouse_register_types) diff --git a/hw/input/adb.c b/hw/input/adb.c index 013fcc9c54..3afbe59217 100644 --- a/hw/input/adb.c +++ b/hw/input/adb.c @@ -274,6 +274,7 @@ static const TypeInfo adb_bus_type_info = { .instance_size = sizeof(ADBBusState), .class_init = adb_bus_class_init, }; +TYPE_INFO(adb_bus_type_info) const VMStateDescription vmstate_adb_device = { .name = "adb_device", @@ -313,11 +314,6 @@ static const TypeInfo adb_device_type_info = { .abstract = true, .class_init = adb_device_class_init, }; +TYPE_INFO(adb_device_type_info) -static void adb_register_types(void) -{ - type_register_static(&adb_bus_type_info); - type_register_static(&adb_device_type_info); -} -type_init(adb_register_types) diff --git a/hw/input/lm832x.c b/hw/input/lm832x.c index aa629ddbf1..ffe68b081a 100644 --- a/hw/input/lm832x.c +++ b/hw/input/lm832x.c @@ -518,10 +518,6 @@ static const TypeInfo lm8323_info = { .instance_size = sizeof(LM823KbdState), .class_init = lm8323_class_init, }; +TYPE_INFO(lm8323_info) -static void lm832x_register_types(void) -{ - type_register_static(&lm8323_info); -} -type_init(lm832x_register_types) diff --git a/hw/input/milkymist-softusb.c b/hw/input/milkymist-softusb.c index 3e0a7eb0bd..73ee7edbd0 100644 --- a/hw/input/milkymist-softusb.c +++ b/hw/input/milkymist-softusb.c @@ -311,10 +311,6 @@ static const TypeInfo milkymist_softusb_info = { .instance_size = sizeof(MilkymistSoftUsbState), .class_init = milkymist_softusb_class_init, }; +TYPE_INFO(milkymist_softusb_info) -static void milkymist_softusb_register_types(void) -{ - type_register_static(&milkymist_softusb_info); -} -type_init(milkymist_softusb_register_types) diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c index dde85ba6c6..4caa5b3ce3 100644 --- a/hw/input/pckbd.c +++ b/hw/input/pckbd.c @@ -606,10 +606,6 @@ static const TypeInfo i8042_info = { .instance_init = i8042_initfn, .class_init = i8042_class_initfn, }; +TYPE_INFO(i8042_info) -static void i8042_register_types(void) -{ - type_register_static(&i8042_info); -} -type_init(i8042_register_types) diff --git a/hw/input/pl050.c b/hw/input/pl050.c index 1123037b38..b018e708a6 100644 --- a/hw/input/pl050.c +++ b/hw/input/pl050.c @@ -176,12 +176,14 @@ static const TypeInfo pl050_kbd_info = { .parent = TYPE_PL050, .instance_init = pl050_keyboard_init, }; +TYPE_INFO(pl050_kbd_info) static const TypeInfo pl050_mouse_info = { .name = "pl050_mouse", .parent = TYPE_PL050, .instance_init = pl050_mouse_init, }; +TYPE_INFO(pl050_mouse_info) static void pl050_class_init(ObjectClass *oc, void *data) { @@ -198,12 +200,6 @@ static const TypeInfo pl050_type_info = { .abstract = true, .class_init = pl050_class_init, }; +TYPE_INFO(pl050_type_info) -static void pl050_register_types(void) -{ - type_register_static(&pl050_type_info); - type_register_static(&pl050_kbd_info); - type_register_static(&pl050_mouse_info); -} -type_init(pl050_register_types) diff --git a/hw/input/vhost-user-input.c b/hw/input/vhost-user-input.c index 63984a8ba7..32318bf1ca 100644 --- a/hw/input/vhost-user-input.c +++ b/hw/input/vhost-user-input.c @@ -119,10 +119,6 @@ static const TypeInfo vhost_input_info = { .instance_finalize = vhost_input_finalize, .class_init = vhost_input_class_init, }; +TYPE_INFO(vhost_input_info) -static void vhost_input_register_types(void) -{ - type_register_static(&vhost_input_info); -} -type_init(vhost_input_register_types) diff --git a/hw/input/virtio-input-hid.c b/hw/input/virtio-input-hid.c index a7a244a95d..70e27e2c64 100644 --- a/hw/input/virtio-input-hid.c +++ b/hw/input/virtio-input-hid.c @@ -235,6 +235,7 @@ static const TypeInfo virtio_input_hid_info = { .class_init = virtio_input_hid_class_init, .abstract = true, }; +TYPE_INFO(virtio_input_hid_info) /* ----------------------------------------------------------------- */ @@ -291,6 +292,7 @@ static const TypeInfo virtio_keyboard_info = { .instance_size = sizeof(VirtIOInputHID), .instance_init = virtio_keyboard_init, }; +TYPE_INFO(virtio_keyboard_info) /* ----------------------------------------------------------------- */ @@ -384,6 +386,7 @@ static const TypeInfo virtio_mouse_info = { .instance_init = virtio_mouse_init, .class_init = virtio_mouse_class_init, }; +TYPE_INFO(virtio_mouse_info) /* ----------------------------------------------------------------- */ @@ -508,15 +511,8 @@ static const TypeInfo virtio_tablet_info = { .instance_init = virtio_tablet_init, .class_init = virtio_tablet_class_init, }; +TYPE_INFO(virtio_tablet_info) /* ----------------------------------------------------------------- */ -static void virtio_register_types(void) -{ - type_register_static(&virtio_input_hid_info); - type_register_static(&virtio_keyboard_info); - type_register_static(&virtio_mouse_info); - type_register_static(&virtio_tablet_info); -} -type_init(virtio_register_types) diff --git a/hw/input/virtio-input-host.c b/hw/input/virtio-input-host.c index 85daf73f1a..aa4d17a903 100644 --- a/hw/input/virtio-input-host.c +++ b/hw/input/virtio-input-host.c @@ -246,12 +246,8 @@ static const TypeInfo virtio_input_host_info = { .instance_init = virtio_input_host_init, .class_init = virtio_input_host_class_init, }; +TYPE_INFO(virtio_input_host_info) /* ----------------------------------------------------------------- */ -static void virtio_register_types(void) -{ - type_register_static(&virtio_input_host_info); -} -type_init(virtio_register_types) diff --git a/hw/input/virtio-input.c b/hw/input/virtio-input.c index 54bcb46c74..044d1599e4 100644 --- a/hw/input/virtio-input.c +++ b/hw/input/virtio-input.c @@ -332,12 +332,8 @@ static const TypeInfo virtio_input_info = { .abstract = true, .instance_finalize = virtio_input_finalize, }; +TYPE_INFO(virtio_input_info) /* ----------------------------------------------------------------- */ -static void virtio_register_types(void) -{ - type_register_static(&virtio_input_info); -} -type_init(virtio_register_types) diff --git a/hw/intc/allwinner-a10-pic.c b/hw/intc/allwinner-a10-pic.c index 8cca124807..63ad2de08f 100644 --- a/hw/intc/allwinner-a10-pic.c +++ b/hw/intc/allwinner-a10-pic.c @@ -206,10 +206,6 @@ static const TypeInfo aw_a10_pic_info = { .instance_init = aw_a10_pic_init, .class_init = aw_a10_pic_class_init, }; +TYPE_INFO(aw_a10_pic_info) -static void aw_a10_register_types(void) -{ - type_register_static(&aw_a10_pic_info); -} -type_init(aw_a10_register_types); diff --git a/hw/intc/apic.c b/hw/intc/apic.c index 38aabd60cd..770e14fc3e 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -913,10 +913,6 @@ static const TypeInfo apic_info = { .parent = TYPE_APIC_COMMON, .class_init = apic_class_init, }; +TYPE_INFO(apic_info) -static void apic_register_types(void) -{ - type_register_static(&apic_info); -} -type_init(apic_register_types) diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index 81addd6390..a4851ba64a 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -488,10 +488,6 @@ static const TypeInfo apic_common_type = { .class_init = apic_common_class_init, .abstract = true, }; +TYPE_INFO(apic_common_type) -static void apic_common_register_types(void) -{ - type_register_static(&apic_common_type); -} -type_init(apic_common_register_types) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index c60dc6b5e6..cf16727da2 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -2134,10 +2134,6 @@ static const TypeInfo arm_gic_info = { .class_init = arm_gic_class_init, .class_size = sizeof(ARMGICClass), }; +TYPE_INFO(arm_gic_info) -static void arm_gic_register_types(void) -{ - type_register_static(&arm_gic_info); -} -type_init(arm_gic_register_types) diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c index 7b44d5625b..fef492f476 100644 --- a/hw/intc/arm_gic_common.c +++ b/hw/intc/arm_gic_common.c @@ -385,10 +385,6 @@ static const TypeInfo arm_gic_common_type = { { }, }, }; +TYPE_INFO(arm_gic_common_type) -static void register_types(void) -{ - type_register_static(&arm_gic_common_type); -} -type_init(register_types) diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c index 07b95143c9..b0379ea4c5 100644 --- a/hw/intc/arm_gic_kvm.c +++ b/hw/intc/arm_gic_kvm.c @@ -613,10 +613,6 @@ static const TypeInfo kvm_arm_gic_info = { .class_init = kvm_arm_gic_class_init, .class_size = sizeof(KVMARMGICClass), }; +TYPE_INFO(kvm_arm_gic_info) -static void kvm_arm_gic_register_types(void) -{ - type_register_static(&kvm_arm_gic_info); -} -type_init(kvm_arm_gic_register_types) diff --git a/hw/intc/arm_gicv2m.c b/hw/intc/arm_gicv2m.c index 0b7e2b4f84..d129a8c9f1 100644 --- a/hw/intc/arm_gicv2m.c +++ b/hw/intc/arm_gicv2m.c @@ -190,10 +190,6 @@ static const TypeInfo gicv2m_info = { .instance_init = gicv2m_init, .class_init = gicv2m_class_init, }; +TYPE_INFO(gicv2m_info) -static void gicv2m_register_types(void) -{ - type_register_static(&gicv2m_info); -} -type_init(gicv2m_register_types) diff --git a/hw/intc/arm_gicv3.c b/hw/intc/arm_gicv3.c index 66eaa97198..17f169087d 100644 --- a/hw/intc/arm_gicv3.c +++ b/hw/intc/arm_gicv3.c @@ -406,10 +406,6 @@ static const TypeInfo arm_gicv3_info = { .class_init = arm_gicv3_class_init, .class_size = sizeof(ARMGICv3Class), }; +TYPE_INFO(arm_gicv3_info) -static void arm_gicv3_register_types(void) -{ - type_register_static(&arm_gicv3_info); -} -type_init(arm_gicv3_register_types) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 58ef65f589..3cb906125a 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -525,10 +525,6 @@ static const TypeInfo arm_gicv3_common_type = { { }, }, }; +TYPE_INFO(arm_gicv3_common_type) -static void register_types(void) -{ - type_register_static(&arm_gicv3_common_type); -} -type_init(register_types) diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c index 66c4c6a188..05e385222d 100644 --- a/hw/intc/arm_gicv3_its_common.c +++ b/hw/intc/arm_gicv3_its_common.c @@ -149,10 +149,6 @@ static const TypeInfo gicv3_its_common_info = { .class_init = gicv3_its_common_class_init, .abstract = true, }; +TYPE_INFO(gicv3_its_common_info) -static void gicv3_its_common_register_types(void) -{ - type_register_static(&gicv3_its_common_info); -} -type_init(gicv3_its_common_register_types) diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c index 46835ed085..ddd3a5a665 100644 --- a/hw/intc/arm_gicv3_its_kvm.c +++ b/hw/intc/arm_gicv3_its_kvm.c @@ -257,10 +257,6 @@ static const TypeInfo kvm_arm_its_info = { .class_init = kvm_arm_its_class_init, .class_size = sizeof(KVMARMITSClass), }; +TYPE_INFO(kvm_arm_its_info) -static void kvm_arm_its_register_types(void) -{ - type_register_static(&kvm_arm_its_info); -} -type_init(kvm_arm_its_register_types) diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c index eddd07c743..30d09d307e 100644 --- a/hw/intc/arm_gicv3_kvm.c +++ b/hw/intc/arm_gicv3_kvm.c @@ -889,10 +889,6 @@ static const TypeInfo kvm_arm_gicv3_info = { .class_init = kvm_arm_gicv3_class_init, .class_size = sizeof(KVMARMGICv3Class), }; +TYPE_INFO(kvm_arm_gicv3_info) -static void kvm_arm_gicv3_register_types(void) -{ - type_register_static(&kvm_arm_gicv3_info); -} -type_init(kvm_arm_gicv3_register_types) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 277a98b87b..819a77ceb4 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -2775,10 +2775,6 @@ static const TypeInfo armv7m_nvic_info = { .class_init = armv7m_nvic_class_init, .class_size = sizeof(SysBusDeviceClass), }; +TYPE_INFO(armv7m_nvic_info) -static void armv7m_nvic_register_types(void) -{ - type_register_static(&armv7m_nvic_info); -} -type_init(armv7m_nvic_register_types) diff --git a/hw/intc/aspeed_vic.c b/hw/intc/aspeed_vic.c index 5ba06c5262..e60d23bc34 100644 --- a/hw/intc/aspeed_vic.c +++ b/hw/intc/aspeed_vic.c @@ -354,10 +354,6 @@ static const TypeInfo aspeed_vic_info = { .instance_size = sizeof(AspeedVICState), .class_init = aspeed_vic_class_init, }; +TYPE_INFO(aspeed_vic_info) -static void aspeed_vic_register_types(void) -{ - type_register_static(&aspeed_vic_info); -} -type_init(aspeed_vic_register_types); diff --git a/hw/intc/bcm2835_ic.c b/hw/intc/bcm2835_ic.c index 53ab8f5881..4a0b62a356 100644 --- a/hw/intc/bcm2835_ic.c +++ b/hw/intc/bcm2835_ic.c @@ -232,10 +232,6 @@ static TypeInfo bcm2835_ic_info = { .class_init = bcm2835_ic_class_init, .instance_init = bcm2835_ic_init, }; +TYPE_INFO(bcm2835_ic_info) -static void bcm2835_ic_register_types(void) -{ - type_register_static(&bcm2835_ic_info); -} -type_init(bcm2835_ic_register_types) diff --git a/hw/intc/bcm2836_control.c b/hw/intc/bcm2836_control.c index 53dba0080c..7c9568f5ff 100644 --- a/hw/intc/bcm2836_control.c +++ b/hw/intc/bcm2836_control.c @@ -399,10 +399,6 @@ static TypeInfo bcm2836_control_info = { .class_init = bcm2836_control_class_init, .instance_init = bcm2836_control_init, }; +TYPE_INFO(bcm2836_control_info) -static void bcm2836_control_register_types(void) -{ - type_register_static(&bcm2836_control_info); -} -type_init(bcm2836_control_register_types) diff --git a/hw/intc/etraxfs_pic.c b/hw/intc/etraxfs_pic.c index 12988c7aa9..d77d65ed38 100644 --- a/hw/intc/etraxfs_pic.c +++ b/hw/intc/etraxfs_pic.c @@ -162,10 +162,6 @@ static const TypeInfo etraxfs_pic_info = { .instance_size = sizeof(struct etrax_pic), .instance_init = etraxfs_pic_init, }; +TYPE_INFO(etraxfs_pic_info) -static void etraxfs_pic_register_types(void) -{ - type_register_static(&etraxfs_pic_info); -} -type_init(etraxfs_pic_register_types) diff --git a/hw/intc/exynos4210_combiner.c b/hw/intc/exynos4210_combiner.c index b8561e4180..d0365915af 100644 --- a/hw/intc/exynos4210_combiner.c +++ b/hw/intc/exynos4210_combiner.c @@ -453,10 +453,6 @@ static const TypeInfo exynos4210_combiner_info = { .instance_init = exynos4210_combiner_init, .class_init = exynos4210_combiner_class_init, }; +TYPE_INFO(exynos4210_combiner_info) -static void exynos4210_combiner_register_types(void) -{ - type_register_static(&exynos4210_combiner_info); -} -type_init(exynos4210_combiner_register_types) diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c index 0aa3b843a9..a01ab137eb 100644 --- a/hw/intc/exynos4210_gic.c +++ b/hw/intc/exynos4210_gic.c @@ -366,13 +366,9 @@ static const TypeInfo exynos4210_gic_info = { .instance_size = sizeof(Exynos4210GicState), .class_init = exynos4210_gic_class_init, }; +TYPE_INFO(exynos4210_gic_info) -static void exynos4210_gic_register_types(void) -{ - type_register_static(&exynos4210_gic_info); -} -type_init(exynos4210_gic_register_types) /* IRQ OR Gate struct. * @@ -474,10 +470,6 @@ static const TypeInfo exynos4210_irq_gate_info = { .instance_init = exynos4210_irq_gate_init, .class_init = exynos4210_irq_gate_class_init, }; +TYPE_INFO(exynos4210_irq_gate_info) -static void exynos4210_irq_gate_register_types(void) -{ - type_register_static(&exynos4210_irq_gate_info); -} -type_init(exynos4210_irq_gate_register_types) diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index 794c643af2..1a3c846cee 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -350,10 +350,6 @@ static const TypeInfo grlib_irqmp_info = { .instance_init = grlib_irqmp_init, .class_init = grlib_irqmp_class_init, }; +TYPE_INFO(grlib_irqmp_info) -static void grlib_irqmp_register_types(void) -{ - type_register_static(&grlib_irqmp_info); -} -type_init(grlib_irqmp_register_types) diff --git a/hw/intc/heathrow_pic.c b/hw/intc/heathrow_pic.c index cb97c315da..8faa8a5582 100644 --- a/hw/intc/heathrow_pic.c +++ b/hw/intc/heathrow_pic.c @@ -201,10 +201,6 @@ static const TypeInfo heathrow_type_info = { .instance_init = heathrow_init, .class_init = heathrow_class_init, }; +TYPE_INFO(heathrow_type_info) -static void heathrow_register_types(void) -{ - type_register_static(&heathrow_type_info); -} -type_init(heathrow_register_types) diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c index 51b27f6a34..a213683f44 100644 --- a/hw/intc/i8259.c +++ b/hw/intc/i8259.c @@ -455,10 +455,6 @@ static const TypeInfo i8259_info = { .class_init = i8259_class_init, .class_size = sizeof(PICClass), }; +TYPE_INFO(i8259_info) -static void pic_register_types(void) -{ - type_register_static(&i8259_info); -} -type_init(pic_register_types) diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c index d90b40fe4c..a859ec4783 100644 --- a/hw/intc/i8259_common.c +++ b/hw/intc/i8259_common.c @@ -210,10 +210,6 @@ static const TypeInfo pic_common_type = { { } }, }; +TYPE_INFO(pic_common_type) -static void pic_common_register_types(void) -{ - type_register_static(&pic_common_type); -} -type_init(pic_common_register_types) diff --git a/hw/intc/ibex_plic.c b/hw/intc/ibex_plic.c index 41079518c6..381658d827 100644 --- a/hw/intc/ibex_plic.c +++ b/hw/intc/ibex_plic.c @@ -252,10 +252,6 @@ static const TypeInfo ibex_plic_info = { .instance_init = ibex_plic_init, .class_init = ibex_plic_class_init, }; +TYPE_INFO(ibex_plic_info) -static void ibex_plic_register_types(void) -{ - type_register_static(&ibex_plic_info); -} -type_init(ibex_plic_register_types) diff --git a/hw/intc/imx_avic.c b/hw/intc/imx_avic.c index 63fc602a1a..805da5e2f2 100644 --- a/hw/intc/imx_avic.c +++ b/hw/intc/imx_avic.c @@ -357,10 +357,6 @@ static const TypeInfo imx_avic_info = { .instance_init = imx_avic_init, .class_init = imx_avic_class_init, }; +TYPE_INFO(imx_avic_info) -static void imx_avic_register_types(void) -{ - type_register_static(&imx_avic_info); -} -type_init(imx_avic_register_types) diff --git a/hw/intc/imx_gpcv2.c b/hw/intc/imx_gpcv2.c index 17007a4078..b04fa35211 100644 --- a/hw/intc/imx_gpcv2.c +++ b/hw/intc/imx_gpcv2.c @@ -119,9 +119,5 @@ static const TypeInfo imx_gpcv2_info = { .instance_init = imx_gpcv2_init, .class_init = imx_gpcv2_class_init, }; +TYPE_INFO(imx_gpcv2_info) -static void imx_gpcv2_register_type(void) -{ - type_register_static(&imx_gpcv2_info); -} -type_init(imx_gpcv2_register_type) diff --git a/hw/intc/intc.c b/hw/intc/intc.c index 2e1e29e753..c526f90672 100644 --- a/hw/intc/intc.c +++ b/hw/intc/intc.c @@ -31,11 +31,7 @@ static const TypeInfo intctrl_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(InterruptStatsProviderClass), }; +TYPE_INFO(intctrl_info) -static void intc_register_types(void) -{ - type_register_static(&intctrl_info); -} -type_init(intc_register_types) diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index bca71b5934..4e865aac74 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -505,10 +505,6 @@ static const TypeInfo ioapic_info = { .instance_size = sizeof(IOAPICCommonState), .class_init = ioapic_class_init, }; +TYPE_INFO(ioapic_info) -static void ioapic_register_types(void) -{ - type_register_static(&ioapic_info); -} -type_init(ioapic_register_types) diff --git a/hw/intc/ioapic_common.c b/hw/intc/ioapic_common.c index 5538b5b86e..98a20fddf7 100644 --- a/hw/intc/ioapic_common.c +++ b/hw/intc/ioapic_common.c @@ -215,10 +215,6 @@ static const TypeInfo ioapic_common_type = { { } }, }; +TYPE_INFO(ioapic_common_type) -static void ioapic_common_register_types(void) -{ - type_register_static(&ioapic_common_type); -} -type_init(ioapic_common_register_types) diff --git a/hw/intc/lm32_pic.c b/hw/intc/lm32_pic.c index 36de670c9e..2f609dc93f 100644 --- a/hw/intc/lm32_pic.c +++ b/hw/intc/lm32_pic.c @@ -186,10 +186,6 @@ static const TypeInfo lm32_pic_info = { { } }, }; +TYPE_INFO(lm32_pic_info) -static void lm32_pic_register_types(void) -{ - type_register_static(&lm32_pic_info); -} -type_init(lm32_pic_register_types) diff --git a/hw/intc/loongson_liointc.c b/hw/intc/loongson_liointc.c index 23ca51cc2e..10e4c7278b 100644 --- a/hw/intc/loongson_liointc.c +++ b/hw/intc/loongson_liointc.c @@ -233,10 +233,6 @@ static const TypeInfo loongson_liointc_info = { .instance_size = sizeof(struct loongson_liointc), .instance_init = loongson_liointc_init, }; +TYPE_INFO(loongson_liointc_info) -static void loongson_liointc_register_types(void) -{ - type_register_static(&loongson_liointc_info); -} -type_init(loongson_liointc_register_types) diff --git a/hw/intc/mips_gic.c b/hw/intc/mips_gic.c index bda4549925..1d2efed60a 100644 --- a/hw/intc/mips_gic.c +++ b/hw/intc/mips_gic.c @@ -459,10 +459,6 @@ static const TypeInfo mips_gic_info = { .instance_init = mips_gic_init, .class_init = mips_gic_class_init, }; +TYPE_INFO(mips_gic_info) -static void mips_gic_register_types(void) -{ - type_register_static(&mips_gic_info); -} -type_init(mips_gic_register_types) diff --git a/hw/intc/nios2_iic.c b/hw/intc/nios2_iic.c index 1a5df8c89a..43abcd95aa 100644 --- a/hw/intc/nios2_iic.c +++ b/hw/intc/nios2_iic.c @@ -86,10 +86,6 @@ static TypeInfo altera_iic_info = { .instance_init = altera_iic_init, .class_init = altera_iic_class_init, }; +TYPE_INFO(altera_iic_info) -static void altera_iic_register(void) -{ - type_register_static(&altera_iic_info); -} -type_init(altera_iic_register) diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c index b8a1d1fd7d..6f6a490db9 100644 --- a/hw/intc/omap_intc.c +++ b/hw/intc/omap_intc.c @@ -419,6 +419,7 @@ static const TypeInfo omap_intc_info = { .instance_init = omap_intc_init, .class_init = omap_intc_class_init, }; +TYPE_INFO(omap_intc_info) static uint64_t omap2_inth_read(void *opaque, hwaddr addr, unsigned size) @@ -672,6 +673,7 @@ static const TypeInfo omap2_intc_info = { .instance_init = omap2_intc_init, .class_init = omap2_intc_class_init, }; +TYPE_INFO(omap2_intc_info) static const TypeInfo omap_intc_type_info = { .name = TYPE_OMAP_INTC, @@ -679,12 +681,6 @@ static const TypeInfo omap_intc_type_info = { .instance_size = sizeof(struct omap_intr_handler_s), .abstract = true, }; +TYPE_INFO(omap_intc_type_info) -static void omap_intc_register_types(void) -{ - type_register_static(&omap_intc_type_info); - type_register_static(&omap_intc_info); - type_register_static(&omap2_intc_info); -} -type_init(omap_intc_register_types) diff --git a/hw/intc/ompic.c b/hw/intc/ompic.c index c354427a61..d01b593cc4 100644 --- a/hw/intc/ompic.c +++ b/hw/intc/ompic.c @@ -173,10 +173,6 @@ static const TypeInfo or1k_ompic_info = { .instance_init = or1k_ompic_init, .class_init = or1k_ompic_class_init, }; +TYPE_INFO(or1k_ompic_info) -static void or1k_ompic_register_types(void) -{ - type_register_static(&or1k_ompic_info); -} -type_init(or1k_ompic_register_types) diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c index 65970e1b37..1d86d5b6b1 100644 --- a/hw/intc/openpic.c +++ b/hw/intc/openpic.c @@ -1641,10 +1641,6 @@ static const TypeInfo openpic_info = { .instance_init = openpic_init, .class_init = openpic_class_init, }; +TYPE_INFO(openpic_info) -static void openpic_register_types(void) -{ - type_register_static(&openpic_info); -} -type_init(openpic_register_types) diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c index e4bf47d885..f0add3e3ee 100644 --- a/hw/intc/openpic_kvm.c +++ b/hw/intc/openpic_kvm.c @@ -286,10 +286,6 @@ static const TypeInfo kvm_openpic_info = { .instance_init = kvm_openpic_init, .class_init = kvm_openpic_class_init, }; +TYPE_INFO(kvm_openpic_info) -static void kvm_openpic_register_types(void) -{ - type_register_static(&kvm_openpic_info); -} -type_init(kvm_openpic_register_types) diff --git a/hw/intc/pl190.c b/hw/intc/pl190.c index e3bd3dd121..5b237c0920 100644 --- a/hw/intc/pl190.c +++ b/hw/intc/pl190.c @@ -287,10 +287,6 @@ static const TypeInfo pl190_info = { .instance_init = pl190_init, .class_init = pl190_class_init, }; +TYPE_INFO(pl190_info) -static void pl190_register_types(void) -{ - type_register_static(&pl190_info); -} -type_init(pl190_register_types) diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index 5f69626b3a..e333c85162 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -1975,10 +1975,6 @@ static const TypeInfo pnv_xive_info = { { } } }; +TYPE_INFO(pnv_xive_info) -static void pnv_xive_register_types(void) -{ - type_register_static(&pnv_xive_info); -} -type_init(pnv_xive_register_types) diff --git a/hw/intc/puv3_intc.c b/hw/intc/puv3_intc.c index 090d4839d1..3f43aea812 100644 --- a/hw/intc/puv3_intc.c +++ b/hw/intc/puv3_intc.c @@ -137,10 +137,6 @@ static const TypeInfo puv3_intc_info = { .instance_size = sizeof(PUV3INTCState), .class_init = puv3_intc_class_init, }; +TYPE_INFO(puv3_intc_info) -static void puv3_intc_register_type(void) -{ - type_register_static(&puv3_intc_info); -} -type_init(puv3_intc_register_type) diff --git a/hw/intc/realview_gic.c b/hw/intc/realview_gic.c index 9b12116b2a..e85422f40d 100644 --- a/hw/intc/realview_gic.c +++ b/hw/intc/realview_gic.c @@ -77,10 +77,6 @@ static const TypeInfo realview_gic_info = { .instance_init = realview_gic_init, .class_init = realview_gic_class_init, }; +TYPE_INFO(realview_gic_info) -static void realview_gic_register_types(void) -{ - type_register_static(&realview_gic_info); -} -type_init(realview_gic_register_types) diff --git a/hw/intc/rx_icu.c b/hw/intc/rx_icu.c index df4b6a8d22..2e47e6e099 100644 --- a/hw/intc/rx_icu.c +++ b/hw/intc/rx_icu.c @@ -388,10 +388,6 @@ static const TypeInfo rxicu_info = { .instance_finalize = rxicu_fini, .class_init = rxicu_class_init, }; +TYPE_INFO(rxicu_info) -static void rxicu_register_types(void) -{ - type_register_static(&rxicu_info); -} -type_init(rxicu_register_types) diff --git a/hw/intc/s390_flic.c b/hw/intc/s390_flic.c index aacdb1bbc2..d9a51ddb2a 100644 --- a/hw/intc/s390_flic.c +++ b/hw/intc/s390_flic.c @@ -438,6 +438,7 @@ static const TypeInfo qemu_s390_flic_info = { .instance_init = qemu_s390_flic_instance_init, .class_init = qemu_s390_flic_class_init, }; +TYPE_INFO(qemu_s390_flic_info) static const TypeInfo s390_flic_common_info = { @@ -447,14 +448,9 @@ static const TypeInfo s390_flic_common_info = { .class_init = s390_flic_class_init, .class_size = sizeof(S390FLICStateClass), }; +TYPE_INFO(s390_flic_common_info) -static void qemu_s390_flic_register_types(void) -{ - type_register_static(&s390_flic_common_info); - type_register_static(&qemu_s390_flic_info); -} -type_init(qemu_s390_flic_register_types) static bool adapter_info_so_needed(void *opaque) { diff --git a/hw/intc/s390_flic_kvm.c b/hw/intc/s390_flic_kvm.c index dbd4e682ce..a48adef68d 100644 --- a/hw/intc/s390_flic_kvm.c +++ b/hw/intc/s390_flic_kvm.c @@ -672,10 +672,6 @@ static const TypeInfo kvm_s390_flic_info = { .class_size = sizeof(KVMS390FLICStateClass), .class_init = kvm_s390_flic_class_init, }; +TYPE_INFO(kvm_s390_flic_info) -static void kvm_s390_flic_register_types(void) -{ - type_register_static(&kvm_s390_flic_info); -} -type_init(kvm_s390_flic_register_types) diff --git a/hw/intc/slavio_intctl.c b/hw/intc/slavio_intctl.c index c4cf9096eb..65aea84cf3 100644 --- a/hw/intc/slavio_intctl.c +++ b/hw/intc/slavio_intctl.c @@ -466,10 +466,6 @@ static const TypeInfo slavio_intctl_info = { { } }, }; +TYPE_INFO(slavio_intctl_info) -static void slavio_intctl_register_types(void) -{ - type_register_static(&slavio_intctl_info); -} -type_init(slavio_intctl_register_types) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 89c8cd9667..202783388c 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -802,13 +802,9 @@ static const TypeInfo spapr_xive_info = { { } }, }; +TYPE_INFO(spapr_xive_info) -static void spapr_xive_register_types(void) -{ - type_register_static(&spapr_xive_info); -} -type_init(spapr_xive_register_types) /* * XIVE hcalls diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 68f9d44feb..12cae926cc 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -373,6 +373,7 @@ static const TypeInfo icp_info = { .class_init = icp_class_init, .class_size = sizeof(ICPStateClass), }; +TYPE_INFO(icp_info) Object *icp_create(Object *cpu, const char *type, XICSFabric *xi, Error **errp) { @@ -707,12 +708,14 @@ static const TypeInfo ics_info = { .class_init = ics_class_init, .class_size = sizeof(ICSStateClass), }; +TYPE_INFO(ics_info) static const TypeInfo xics_fabric_info = { .name = TYPE_XICS_FABRIC, .parent = TYPE_INTERFACE, .class_size = sizeof(XICSFabricClass), }; +TYPE_INFO(xics_fabric_info) /* * Exported functions @@ -742,11 +745,4 @@ void ics_set_irq_type(ICSState *ics, int srcno, bool lsi) } } -static void xics_register_types(void) -{ - type_register_static(&ics_info); - type_register_static(&icp_info); - type_register_static(&xics_fabric_info); -} -type_init(xics_register_types) diff --git a/hw/intc/xics_pnv.c b/hw/intc/xics_pnv.c index 35f3811264..dd7cb00a16 100644 --- a/hw/intc/xics_pnv.c +++ b/hw/intc/xics_pnv.c @@ -193,10 +193,6 @@ static const TypeInfo pnv_icp_info = { .class_init = pnv_icp_class_init, .class_size = sizeof(ICPStateClass), }; +TYPE_INFO(pnv_icp_info) -static void pnv_icp_register_types(void) -{ - type_register_static(&pnv_icp_info); -} -type_init(pnv_icp_register_types) diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index 8ae4f41459..01a9481b9a 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -468,10 +468,6 @@ static const TypeInfo ics_spapr_info = { { } }, }; +TYPE_INFO(ics_spapr_info) -static void xics_spapr_register_types(void) -{ - type_register_static(&ics_spapr_info); -} -type_init(xics_spapr_register_types) diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c index 3e65e68619..4efd6297ca 100644 --- a/hw/intc/xilinx_intc.c +++ b/hw/intc/xilinx_intc.c @@ -195,10 +195,6 @@ static const TypeInfo xilinx_intc_info = { .instance_init = xilinx_intc_init, .class_init = xilinx_intc_class_init, }; +TYPE_INFO(xilinx_intc_info) -static void xilinx_intc_register_types(void) -{ - type_register_static(&xilinx_intc_info); -} -type_init(xilinx_intc_register_types) diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 9a162431e0..c61a7b5b28 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -754,6 +754,7 @@ static const TypeInfo xive_tctx_info = { .instance_size = sizeof(XiveTCTX), .class_init = xive_tctx_class_init, }; +TYPE_INFO(xive_tctx_info) Object *xive_tctx_create(Object *cpu, XivePresenter *xptr, Error **errp) { @@ -1201,6 +1202,7 @@ static const TypeInfo xive_source_info = { .instance_size = sizeof(XiveSource), .class_init = xive_source_class_init, }; +TYPE_INFO(xive_source_info) /* * XiveEND helpers @@ -1748,6 +1750,7 @@ static const TypeInfo xive_router_info = { { } } }; +TYPE_INFO(xive_router_info) void xive_eas_pic_print_info(XiveEAS *eas, uint32_t lisn, Monitor *mon) { @@ -1907,6 +1910,7 @@ static const TypeInfo xive_end_source_info = { .instance_size = sizeof(XiveENDSource), .class_init = xive_end_source_class_init, }; +TYPE_INFO(xive_end_source_info) /* * XIVE Notifier @@ -1916,6 +1920,7 @@ static const TypeInfo xive_notifier_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(XiveNotifierClass), }; +TYPE_INFO(xive_notifier_info) /* * XIVE Presenter @@ -1925,6 +1930,7 @@ static const TypeInfo xive_presenter_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(XivePresenterClass), }; +TYPE_INFO(xive_presenter_info) /* * XIVE Fabric @@ -1934,16 +1940,6 @@ static const TypeInfo xive_fabric_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(XiveFabricClass), }; +TYPE_INFO(xive_fabric_info) -static void xive_register_types(void) -{ - type_register_static(&xive_fabric_info); - type_register_static(&xive_source_info); - type_register_static(&xive_notifier_info); - type_register_static(&xive_presenter_info); - type_register_static(&xive_router_info); - type_register_static(&xive_end_source_info); - type_register_static(&xive_tctx_info); -} -type_init(xive_register_types) diff --git a/hw/intc/xlnx-pmu-iomod-intc.c b/hw/intc/xlnx-pmu-iomod-intc.c index acaa1c3e6f..bc1f431407 100644 --- a/hw/intc/xlnx-pmu-iomod-intc.c +++ b/hw/intc/xlnx-pmu-iomod-intc.c @@ -549,10 +549,6 @@ static const TypeInfo xlnx_pmu_io_intc_info = { .class_init = xlnx_pmu_io_intc_class_init, .instance_init = xlnx_pmu_io_intc_init, }; +TYPE_INFO(xlnx_pmu_io_intc_info) -static void xlnx_pmu_io_intc_register_types(void) -{ - type_register_static(&xlnx_pmu_io_intc_info); -} -type_init(xlnx_pmu_io_intc_register_types) diff --git a/hw/intc/xlnx-zynqmp-ipi.c b/hw/intc/xlnx-zynqmp-ipi.c index adc1179014..3895061f87 100644 --- a/hw/intc/xlnx-zynqmp-ipi.c +++ b/hw/intc/xlnx-zynqmp-ipi.c @@ -371,10 +371,6 @@ static const TypeInfo xlnx_zynqmp_ipi_info = { .class_init = xlnx_zynqmp_ipi_class_init, .instance_init = xlnx_zynqmp_ipi_init, }; +TYPE_INFO(xlnx_zynqmp_ipi_info) -static void xlnx_zynqmp_ipi_register_types(void) -{ - type_register_static(&xlnx_zynqmp_ipi_info); -} -type_init(xlnx_zynqmp_ipi_register_types) diff --git a/hw/ipack/ipack.c b/hw/ipack/ipack.c index f19ecaeb1c..9cb74e3d32 100644 --- a/hw/ipack/ipack.c +++ b/hw/ipack/ipack.c @@ -107,17 +107,13 @@ static const TypeInfo ipack_device_info = { .class_init = ipack_device_class_init, .abstract = true, }; +TYPE_INFO(ipack_device_info) static const TypeInfo ipack_bus_info = { .name = TYPE_IPACK_BUS, .parent = TYPE_BUS, .instance_size = sizeof(IPackBus), }; +TYPE_INFO(ipack_bus_info) -static void ipack_register_types(void) -{ - type_register_static(&ipack_device_info); - type_register_static(&ipack_bus_info); -} -type_init(ipack_register_types) diff --git a/hw/ipack/tpci200.c b/hw/ipack/tpci200.c index f931d4df62..292836b379 100644 --- a/hw/ipack/tpci200.c +++ b/hw/ipack/tpci200.c @@ -655,10 +655,6 @@ static const TypeInfo tpci200_info = { { }, }, }; +TYPE_INFO(tpci200_info) -static void tpci200_register_types(void) -{ - type_register_static(&tpci200_info); -} -type_init(tpci200_register_types) diff --git a/hw/ipmi/ipmi.c b/hw/ipmi/ipmi.c index 8d35c9fdd6..aa5428e7e9 100644 --- a/hw/ipmi/ipmi.c +++ b/hw/ipmi/ipmi.c @@ -91,6 +91,7 @@ static TypeInfo ipmi_interface_type_info = { .class_size = sizeof(IPMIInterfaceClass), .class_init = ipmi_interface_class_init, }; +TYPE_INFO(ipmi_interface_type_info) static void isa_ipmi_bmc_check(const Object *obj, const char *name, Object *val, Error **errp) @@ -128,11 +129,6 @@ static TypeInfo ipmi_bmc_type_info = { .class_size = sizeof(IPMIBmcClass), .class_init = bmc_class_init, }; +TYPE_INFO(ipmi_bmc_type_info) -static void ipmi_register_types(void) -{ - type_register_static(&ipmi_interface_type_info); - type_register_static(&ipmi_bmc_type_info); -} -type_init(ipmi_register_types) diff --git a/hw/ipmi/ipmi_bmc_sim.c b/hw/ipmi/ipmi_bmc_sim.c index f78e92d3d5..caa4d75915 100644 --- a/hw/ipmi/ipmi_bmc_sim.c +++ b/hw/ipmi/ipmi_bmc_sim.c @@ -2222,10 +2222,6 @@ static const TypeInfo ipmi_sim_type = { .instance_size = sizeof(IPMIBmcSim), .class_init = ipmi_sim_class_init, }; +TYPE_INFO(ipmi_sim_type) -static void ipmi_sim_register_types(void) -{ - type_register_static(&ipmi_sim_type); -} -type_init(ipmi_sim_register_types) diff --git a/hw/ipmi/isa_ipmi_bt.c b/hw/ipmi/isa_ipmi_bt.c index c8dc0a09dc..389b4ece7f 100644 --- a/hw/ipmi/isa_ipmi_bt.c +++ b/hw/ipmi/isa_ipmi_bt.c @@ -165,10 +165,6 @@ static const TypeInfo isa_ipmi_bt_info = { { } } }; +TYPE_INFO(isa_ipmi_bt_info) -static void ipmi_register_types(void) -{ - type_register_static(&isa_ipmi_bt_info); -} -type_init(ipmi_register_types) diff --git a/hw/ipmi/isa_ipmi_kcs.c b/hw/ipmi/isa_ipmi_kcs.c index 4b421c33f4..465aba5ac8 100644 --- a/hw/ipmi/isa_ipmi_kcs.c +++ b/hw/ipmi/isa_ipmi_kcs.c @@ -172,10 +172,6 @@ static const TypeInfo isa_ipmi_kcs_info = { { } } }; +TYPE_INFO(isa_ipmi_kcs_info) -static void ipmi_register_types(void) -{ - type_register_static(&isa_ipmi_kcs_info); -} -type_init(ipmi_register_types) diff --git a/hw/ipmi/pci_ipmi_bt.c b/hw/ipmi/pci_ipmi_bt.c index ba9cf016b5..4d20d36ed1 100644 --- a/hw/ipmi/pci_ipmi_bt.c +++ b/hw/ipmi/pci_ipmi_bt.c @@ -139,10 +139,6 @@ static const TypeInfo pci_ipmi_bt_info = { { } } }; +TYPE_INFO(pci_ipmi_bt_info) -static void pci_ipmi_bt_register_types(void) -{ - type_register_static(&pci_ipmi_bt_info); -} -type_init(pci_ipmi_bt_register_types) diff --git a/hw/ipmi/pci_ipmi_kcs.c b/hw/ipmi/pci_ipmi_kcs.c index 99f46152f4..f3f4cee8f5 100644 --- a/hw/ipmi/pci_ipmi_kcs.c +++ b/hw/ipmi/pci_ipmi_kcs.c @@ -139,10 +139,6 @@ static const TypeInfo pci_ipmi_kcs_info = { { } } }; +TYPE_INFO(pci_ipmi_kcs_info) -static void pci_ipmi_kcs_register_types(void) -{ - type_register_static(&pci_ipmi_kcs_info); -} -type_init(pci_ipmi_kcs_register_types) diff --git a/hw/ipmi/smbus_ipmi.c b/hw/ipmi/smbus_ipmi.c index f1a0148755..dbfe949890 100644 --- a/hw/ipmi/smbus_ipmi.c +++ b/hw/ipmi/smbus_ipmi.c @@ -375,10 +375,6 @@ static const TypeInfo smbus_ipmi_info = { { } } }; +TYPE_INFO(smbus_ipmi_info) -static void smbus_ipmi_register_types(void) -{ - type_register_static(&smbus_ipmi_info); -} -type_init(smbus_ipmi_register_types) diff --git a/hw/isa/i82378.c b/hw/isa/i82378.c index 75a2da2881..2341e13bc3 100644 --- a/hw/isa/i82378.c +++ b/hw/isa/i82378.c @@ -142,10 +142,6 @@ static const TypeInfo i82378_type_info = { { }, }, }; +TYPE_INFO(i82378_type_info) -static void i82378_register_types(void) -{ - type_register_static(&i82378_type_info); -} -type_init(i82378_register_types) diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 58fde178f9..6a52f350a5 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -45,6 +45,7 @@ static const TypeInfo isa_dma_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(IsaDmaClass), }; +TYPE_INFO(isa_dma_info) static const TypeInfo isa_bus_info = { .name = TYPE_ISA_BUS, @@ -52,6 +53,7 @@ static const TypeInfo isa_bus_info = { .instance_size = sizeof(ISABus), .class_init = isa_bus_class_init, }; +TYPE_INFO(isa_bus_info) ISABus *isa_bus_new(DeviceState *dev, MemoryRegion* address_space, MemoryRegion *address_space_io, Error **errp) @@ -248,6 +250,7 @@ static const TypeInfo isabus_bridge_info = { .instance_size = sizeof(SysBusDevice), .class_init = isabus_bridge_class_init, }; +TYPE_INFO(isabus_bridge_info) static void isa_device_class_init(ObjectClass *klass, void *data) { @@ -264,14 +267,8 @@ static const TypeInfo isa_device_type_info = { .class_size = sizeof(ISADeviceClass), .class_init = isa_device_class_init, }; +TYPE_INFO(isa_device_type_info) -static void isabus_register_types(void) -{ - type_register_static(&isa_dma_info); - type_register_static(&isa_bus_info); - type_register_static(&isabus_bridge_info); - type_register_static(&isa_device_type_info); -} static char *isabus_get_fw_dev_path(DeviceState *dev) { @@ -305,4 +302,3 @@ MemoryRegion *isa_address_space_io(ISADevice *dev) return isabus->address_space_io; } -type_init(isabus_register_types) diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c index e2e47d8fd9..803cf27f6b 100644 --- a/hw/isa/isa-superio.c +++ b/hw/isa/isa-superio.c @@ -185,6 +185,7 @@ static const TypeInfo isa_superio_type_info = { .class_size = sizeof(ISASuperIOClass), .class_init = isa_superio_class_init, }; +TYPE_INFO(isa_superio_type_info) /* SMS FDC37M817 Super I/O */ static void fdc37m81x_class_init(ObjectClass *klass, void *data) @@ -203,11 +204,6 @@ static const TypeInfo fdc37m81x_type_info = { .instance_size = sizeof(ISASuperIODevice), .class_init = fdc37m81x_class_init, }; +TYPE_INFO(fdc37m81x_type_info) -static void isa_superio_register_types(void) -{ - type_register_static(&isa_superio_type_info); - type_register_static(&fdc37m81x_type_info); -} -type_init(isa_superio_register_types) diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index cd6e169d47..6011ae073f 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -802,10 +802,6 @@ static const TypeInfo ich9_lpc_info = { { } } }; +TYPE_INFO(ich9_lpc_info) -static void ich9_lpc_register(void) -{ - type_register_static(&ich9_lpc_info); -} -type_init(ich9_lpc_register); diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c index 0cacbbc91b..db22a75e28 100644 --- a/hw/isa/pc87312.c +++ b/hw/isa/pc87312.c @@ -378,10 +378,6 @@ static const TypeInfo pc87312_type_info = { .class_init = pc87312_class_init, /* FIXME use a qdev drive property instead of drive_get() */ }; +TYPE_INFO(pc87312_type_info) -static void pc87312_register_types(void) -{ - type_register_static(&pc87312_type_info); -} -type_init(pc87312_register_types) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 587850b888..14a30f274f 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -318,6 +318,7 @@ static const TypeInfo piix3_pci_type_info = { { }, }, }; +TYPE_INFO(piix3_pci_type_info) static void piix3_class_init(ObjectClass *klass, void *data) { @@ -331,6 +332,7 @@ static const TypeInfo piix3_info = { .parent = TYPE_PIIX3_PCI_DEVICE, .class_init = piix3_class_init, }; +TYPE_INFO(piix3_info) static void piix3_xen_class_init(ObjectClass *klass, void *data) { @@ -344,15 +346,9 @@ static const TypeInfo piix3_xen_info = { .parent = TYPE_PIIX3_PCI_DEVICE, .class_init = piix3_xen_class_init, }; +TYPE_INFO(piix3_xen_info) -static void piix3_register_types(void) -{ - type_register_static(&piix3_pci_type_info); - type_register_static(&piix3_info); - type_register_static(&piix3_xen_info); -} -type_init(piix3_register_types) /* * Return the global irq number corresponding to a given device irq diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index ac044afa95..705c5c5567 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -228,13 +228,9 @@ static const TypeInfo piix4_info = { { }, }, }; +TYPE_INFO(piix4_info) -static void piix4_register_types(void) -{ - type_register_static(&piix4_info); -} -type_init(piix4_register_types) DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) { diff --git a/hw/isa/smc37c669-superio.c b/hw/isa/smc37c669-superio.c index 18287741cb..f26769ba6d 100644 --- a/hw/isa/smc37c669-superio.c +++ b/hw/isa/smc37c669-superio.c @@ -107,10 +107,6 @@ static const TypeInfo smc37c669_type_info = { .class_size = sizeof(ISASuperIOClass), .class_init = smc37c669_class_init, }; +TYPE_INFO(smc37c669_type_info) -static void smc37c669_register_types(void) -{ - type_register_static(&smc37c669_type_info); -} -type_init(smc37c669_register_types) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 18160ca445..2b68111629 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -305,6 +305,7 @@ static const TypeInfo via_ac97_info = { { }, }, }; +TYPE_INFO(via_ac97_info) static void vt82c686b_mc97_realize(PCIDevice *dev, Error **errp) { @@ -349,6 +350,7 @@ static const TypeInfo via_mc97_info = { { }, }, }; +TYPE_INFO(via_mc97_info) /* vt82c686 pm init */ static void vt82c686b_pm_realize(PCIDevice *dev, Error **errp) @@ -431,6 +433,7 @@ static const TypeInfo via_pm_info = { { }, }, }; +TYPE_INFO(via_pm_info) static const VMStateDescription vmstate_via = { .name = "vt82c686b", @@ -519,6 +522,7 @@ static const TypeInfo via_info = { { }, }, }; +TYPE_INFO(via_info) static void vt82c686b_superio_class_init(ObjectClass *klass, void *data) { @@ -537,14 +541,6 @@ static const TypeInfo via_superio_info = { .class_size = sizeof(ISASuperIOClass), .class_init = vt82c686b_superio_class_init, }; +TYPE_INFO(via_superio_info) -static void vt82c686b_register_types(void) -{ - type_register_static(&via_ac97_info); - type_register_static(&via_mc97_info); - type_register_static(&via_pm_info); - type_register_static(&via_superio_info); - type_register_static(&via_info); -} -type_init(vt82c686b_register_types) diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c index b842f74344..1541d53b5e 100644 --- a/hw/lm32/lm32_boards.c +++ b/hw/lm32/lm32_boards.c @@ -306,6 +306,7 @@ static const TypeInfo lm32_evr_type = { .parent = TYPE_MACHINE, .class_init = lm32_evr_class_init, }; +TYPE_INFO(lm32_evr_type) static void lm32_uclinux_class_init(ObjectClass *oc, void *data) { @@ -323,11 +324,6 @@ static const TypeInfo lm32_uclinux_type = { .parent = TYPE_MACHINE, .class_init = lm32_uclinux_class_init, }; +TYPE_INFO(lm32_uclinux_type) -static void lm32_machine_init(void) -{ - type_register_static(&lm32_evr_type); - type_register_static(&lm32_uclinux_type); -} -type_init(lm32_machine_init) diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index e01e2e111b..e6e9d7c03e 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -190,13 +190,9 @@ static const TypeInfo mcf_intc_gate_info = { .instance_init = mcf_intc_instance_init, .class_init = mcf_intc_class_init, }; +TYPE_INFO(mcf_intc_gate_info) -static void mcf_intc_register_types(void) -{ - type_register_static(&mcf_intc_gate_info); -} -type_init(mcf_intc_register_types) qemu_irq *mcf_intc_init(MemoryRegion *sysmem, hwaddr base, diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index d3f25cd6d7..e839765cb7 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -975,10 +975,6 @@ static const TypeInfo next_typeinfo = { .class_init = next_machine_class_init, .instance_size = sizeof(NeXTState), }; +TYPE_INFO(next_typeinfo) -static void next_register_type(void) -{ - type_register_static(&next_typeinfo); -} -type_init(next_register_type) diff --git a/hw/m68k/next-kbd.c b/hw/m68k/next-kbd.c index 2dff87be15..fc000ae694 100644 --- a/hw/m68k/next-kbd.c +++ b/hw/m68k/next-kbd.c @@ -282,10 +282,6 @@ static const TypeInfo nextkbd_info = { .instance_size = sizeof(NextKBDState), .class_init = nextkbd_class_init, }; +TYPE_INFO(nextkbd_info) -static void nextkbd_register_types(void) -{ - type_register_static(&nextkbd_info); -} -type_init(nextkbd_register_types) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 1ca482ad81..35dfb8d858 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -445,10 +445,6 @@ static const TypeInfo q800_machine_typeinfo = { .parent = TYPE_MACHINE, .class_init = q800_machine_class_init, }; +TYPE_INFO(q800_machine_typeinfo) -static void q800_machine_register_types(void) -{ - type_register_static(&q800_machine_typeinfo); -} -type_init(q800_machine_register_types) diff --git a/hw/mem/memory-device.c b/hw/mem/memory-device.c index 4bc9cf0917..cc5b67da8b 100644 --- a/hw/mem/memory-device.c +++ b/hw/mem/memory-device.c @@ -337,10 +337,6 @@ static const TypeInfo memory_device_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(MemoryDeviceClass), }; +TYPE_INFO(memory_device_info) -static void memory_device_register_types(void) -{ - type_register_static(&memory_device_info); -} -type_init(memory_device_register_types) diff --git a/hw/mem/nvdimm.c b/hw/mem/nvdimm.c index e1574bc07c..dff6e553de 100644 --- a/hw/mem/nvdimm.c +++ b/hw/mem/nvdimm.c @@ -247,10 +247,6 @@ static TypeInfo nvdimm_info = { .instance_init = nvdimm_init, .instance_finalize = nvdimm_finalize, }; +TYPE_INFO(nvdimm_info) -static void nvdimm_register_types(void) -{ - type_register_static(&nvdimm_info); -} -type_init(nvdimm_register_types) diff --git a/hw/mem/pc-dimm.c b/hw/mem/pc-dimm.c index c30351070b..58657be673 100644 --- a/hw/mem/pc-dimm.c +++ b/hw/mem/pc-dimm.c @@ -296,10 +296,6 @@ static TypeInfo pc_dimm_info = { { } }, }; +TYPE_INFO(pc_dimm_info) -static void pc_dimm_register_types(void) -{ - type_register_static(&pc_dimm_info); -} -type_init(pc_dimm_register_types) diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index 5f994547f7..e025070a9b 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -135,13 +135,9 @@ static const TypeInfo xlnx_zynqmp_pmu_soc_type_info = { .instance_init = xlnx_zynqmp_pmu_soc_init, .class_init = xlnx_zynqmp_pmu_soc_class_init, }; +TYPE_INFO(xlnx_zynqmp_pmu_soc_type_info) -static void xlnx_zynqmp_pmu_soc_register_types(void) -{ - type_register_static(&xlnx_zynqmp_pmu_soc_type_info); -} -type_init(xlnx_zynqmp_pmu_soc_register_types) /* Define the PMU Machine */ diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 766458c015..55deb9c74a 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -253,12 +253,8 @@ static const TypeInfo boston_device = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(BostonState), }; +TYPE_INFO(boston_device) -static void boston_register_types(void) -{ - type_register_static(&boston_device); -} -type_init(boston_register_types) static void gen_firmware(uint32_t *p, hwaddr kernel_entry, hwaddr fdt_addr, bool is_64b) diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 615e1a1ad2..d1a3b59638 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -186,10 +186,6 @@ static const TypeInfo mips_cps_info = { .instance_init = mips_cps_init, .class_init = mips_cps_class_init, }; +TYPE_INFO(mips_cps_info) -static void mips_cps_register_types(void) -{ - type_register_static(&mips_cps_info); -} -type_init(mips_cps_register_types) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 756ac9ae12..1a69c18e38 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1264,6 +1264,7 @@ static const TypeInfo gt64120_pci_info = { { }, }, }; +TYPE_INFO(gt64120_pci_info) static void gt64120_class_init(ObjectClass *klass, void *data) { @@ -1280,11 +1281,6 @@ static const TypeInfo gt64120_info = { .instance_size = sizeof(GT64120State), .class_init = gt64120_class_init, }; +TYPE_INFO(gt64120_info) -static void gt64120_pci_register_types(void) -{ - type_register_static(>64120_info); - type_register_static(>64120_pci_info); -} -type_init(gt64120_pci_register_types) diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c index 82a6e3220e..acac5ab567 100644 --- a/hw/mips/jazz.c +++ b/hw/mips/jazz.c @@ -401,6 +401,7 @@ static const TypeInfo mips_magnum_type = { .parent = TYPE_MACHINE, .class_init = mips_magnum_class_init, }; +TYPE_INFO(mips_magnum_type) static void mips_pica61_class_init(ObjectClass *oc, void *data) { @@ -418,11 +419,6 @@ static const TypeInfo mips_pica61_type = { .parent = TYPE_MACHINE, .class_init = mips_pica61_class_init, }; +TYPE_INFO(mips_pica61_type) -static void mips_jazz_machine_init(void) -{ - type_register_static(&mips_magnum_type); - type_register_static(&mips_pica61_type); -} -type_init(mips_jazz_machine_init) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index a59e20c81c..1c16bc6c0c 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1425,6 +1425,7 @@ static const TypeInfo mips_malta_device = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(MaltaState), }; +TYPE_INFO(mips_malta_device) static void mips_malta_machine_init(MachineClass *mc) { @@ -1443,9 +1444,4 @@ static void mips_malta_machine_init(MachineClass *mc) DEFINE_MACHINE("malta", mips_malta_machine_init) -static void mips_malta_register_types(void) -{ - type_register_static(&mips_malta_device); -} -type_init(mips_malta_register_types) diff --git a/hw/misc/a9scu.c b/hw/misc/a9scu.c index 324371a1c0..3d68782cd5 100644 --- a/hw/misc/a9scu.c +++ b/hw/misc/a9scu.c @@ -147,10 +147,6 @@ static const TypeInfo a9_scu_info = { .instance_init = a9_scu_init, .class_init = a9_scu_class_init, }; +TYPE_INFO(a9_scu_info) -static void a9mp_register_types(void) -{ - type_register_static(&a9_scu_info); -} -type_init(a9mp_register_types) diff --git a/hw/misc/allwinner-cpucfg.c b/hw/misc/allwinner-cpucfg.c index bbd33a7dac..36327860bf 100644 --- a/hw/misc/allwinner-cpucfg.c +++ b/hw/misc/allwinner-cpucfg.c @@ -273,10 +273,6 @@ static const TypeInfo allwinner_cpucfg_info = { .instance_size = sizeof(AwCpuCfgState), .class_init = allwinner_cpucfg_class_init, }; +TYPE_INFO(allwinner_cpucfg_info) -static void allwinner_cpucfg_register(void) -{ - type_register_static(&allwinner_cpucfg_info); -} -type_init(allwinner_cpucfg_register) diff --git a/hw/misc/allwinner-h3-ccu.c b/hw/misc/allwinner-h3-ccu.c index 18d1074545..0ac0efcd18 100644 --- a/hw/misc/allwinner-h3-ccu.c +++ b/hw/misc/allwinner-h3-ccu.c @@ -233,10 +233,6 @@ static const TypeInfo allwinner_h3_ccu_info = { .instance_size = sizeof(AwH3ClockCtlState), .class_init = allwinner_h3_ccu_class_init, }; +TYPE_INFO(allwinner_h3_ccu_info) -static void allwinner_h3_ccu_register(void) -{ - type_register_static(&allwinner_h3_ccu_info); -} -type_init(allwinner_h3_ccu_register) diff --git a/hw/misc/allwinner-h3-dramc.c b/hw/misc/allwinner-h3-dramc.c index 1d37cf422c..015f5c71dd 100644 --- a/hw/misc/allwinner-h3-dramc.c +++ b/hw/misc/allwinner-h3-dramc.c @@ -349,10 +349,6 @@ static const TypeInfo allwinner_h3_dramc_info = { .instance_size = sizeof(AwH3DramCtlState), .class_init = allwinner_h3_dramc_class_init, }; +TYPE_INFO(allwinner_h3_dramc_info) -static void allwinner_h3_dramc_register(void) -{ - type_register_static(&allwinner_h3_dramc_info); -} -type_init(allwinner_h3_dramc_register) diff --git a/hw/misc/allwinner-h3-sysctrl.c b/hw/misc/allwinner-h3-sysctrl.c index 1d07efa880..3f404ab0e7 100644 --- a/hw/misc/allwinner-h3-sysctrl.c +++ b/hw/misc/allwinner-h3-sysctrl.c @@ -131,10 +131,6 @@ static const TypeInfo allwinner_h3_sysctrl_info = { .instance_size = sizeof(AwH3SysCtrlState), .class_init = allwinner_h3_sysctrl_class_init, }; +TYPE_INFO(allwinner_h3_sysctrl_info) -static void allwinner_h3_sysctrl_register(void) -{ - type_register_static(&allwinner_h3_sysctrl_info); -} -type_init(allwinner_h3_sysctrl_register) diff --git a/hw/misc/allwinner-sid.c b/hw/misc/allwinner-sid.c index 196380c33a..a0c870552a 100644 --- a/hw/misc/allwinner-sid.c +++ b/hw/misc/allwinner-sid.c @@ -159,10 +159,6 @@ static const TypeInfo allwinner_sid_info = { .instance_size = sizeof(AwSidState), .class_init = allwinner_sid_class_init, }; +TYPE_INFO(allwinner_sid_info) -static void allwinner_sid_register(void) -{ - type_register_static(&allwinner_sid_info); -} -type_init(allwinner_sid_register) diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c index 1c4addb201..8eebd48f81 100644 --- a/hw/misc/applesmc.c +++ b/hw/misc/applesmc.c @@ -363,10 +363,6 @@ static const TypeInfo applesmc_isa_info = { .instance_size = sizeof(AppleSMCState), .class_init = qdev_applesmc_class_init, }; +TYPE_INFO(applesmc_isa_info) -static void applesmc_register_types(void) -{ - type_register_static(&applesmc_isa_info); -} -type_init(applesmc_register_types) diff --git a/hw/misc/arm11scu.c b/hw/misc/arm11scu.c index 17c36a0545..a6d171b708 100644 --- a/hw/misc/arm11scu.c +++ b/hw/misc/arm11scu.c @@ -95,10 +95,6 @@ static const TypeInfo arm11_scu_type_info = { .instance_init = arm11_scu_init, .class_init = arm11_scu_class_init, }; +TYPE_INFO(arm11_scu_type_info) -static void arm11_scu_register_types(void) -{ - type_register_static(&arm11_scu_type_info); -} -type_init(arm11_scu_register_types) diff --git a/hw/misc/arm_integrator_debug.c b/hw/misc/arm_integrator_debug.c index 3e23201ae6..71b1c3c117 100644 --- a/hw/misc/arm_integrator_debug.c +++ b/hw/misc/arm_integrator_debug.c @@ -91,10 +91,6 @@ static const TypeInfo intdbg_info = { .instance_size = sizeof(IntegratorDebugState), .instance_init = intdbg_control_init, }; +TYPE_INFO(intdbg_info) -static void intdbg_register_types(void) -{ - type_register_static(&intdbg_info); -} -type_init(intdbg_register_types) diff --git a/hw/misc/arm_l2x0.c b/hw/misc/arm_l2x0.c index 2066c97f5f..d395a9f354 100644 --- a/hw/misc/arm_l2x0.c +++ b/hw/misc/arm_l2x0.c @@ -193,10 +193,6 @@ static const TypeInfo l2x0_info = { .instance_init = l2x0_priv_init, .class_init = l2x0_class_init, }; +TYPE_INFO(l2x0_info) -static void l2x0_register_types(void) -{ - type_register_static(&l2x0_info); -} -type_init(l2x0_register_types) diff --git a/hw/misc/arm_sysctl.c b/hw/misc/arm_sysctl.c index a474bbdd19..3f3d61ebb1 100644 --- a/hw/misc/arm_sysctl.c +++ b/hw/misc/arm_sysctl.c @@ -653,10 +653,6 @@ static const TypeInfo arm_sysctl_info = { .instance_finalize = arm_sysctl_finalize, .class_init = arm_sysctl_class_init, }; +TYPE_INFO(arm_sysctl_info) -static void arm_sysctl_register_types(void) -{ - type_register_static(&arm_sysctl_info); -} -type_init(arm_sysctl_register_types) diff --git a/hw/misc/armsse-cpuid.c b/hw/misc/armsse-cpuid.c index d58138dc28..d191ab1bda 100644 --- a/hw/misc/armsse-cpuid.c +++ b/hw/misc/armsse-cpuid.c @@ -126,10 +126,6 @@ static const TypeInfo armsse_cpuid_info = { .instance_init = armsse_cpuid_init, .class_init = armsse_cpuid_class_init, }; +TYPE_INFO(armsse_cpuid_info) -static void armsse_cpuid_register_types(void) -{ - type_register_static(&armsse_cpuid_info); -} -type_init(armsse_cpuid_register_types); diff --git a/hw/misc/armsse-mhu.c b/hw/misc/armsse-mhu.c index a45d97fada..4083d7e1d2 100644 --- a/hw/misc/armsse-mhu.c +++ b/hw/misc/armsse-mhu.c @@ -191,10 +191,6 @@ static const TypeInfo armsse_mhu_info = { .instance_init = armsse_mhu_init, .class_init = armsse_mhu_class_init, }; +TYPE_INFO(armsse_mhu_info) -static void armsse_mhu_register_types(void) -{ - type_register_static(&armsse_mhu_info); -} -type_init(armsse_mhu_register_types); diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index ec4fef900e..4dfc480e46 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -501,6 +501,7 @@ static const TypeInfo aspeed_scu_info = { .class_size = sizeof(AspeedSCUClass), .abstract = true, }; +TYPE_INFO(aspeed_scu_info) static void aspeed_2400_scu_class_init(ObjectClass *klass, void *data) { @@ -521,6 +522,7 @@ static const TypeInfo aspeed_2400_scu_info = { .instance_size = sizeof(AspeedSCUState), .class_init = aspeed_2400_scu_class_init, }; +TYPE_INFO(aspeed_2400_scu_info) static void aspeed_2500_scu_class_init(ObjectClass *klass, void *data) { @@ -541,6 +543,7 @@ static const TypeInfo aspeed_2500_scu_info = { .instance_size = sizeof(AspeedSCUState), .class_init = aspeed_2500_scu_class_init, }; +TYPE_INFO(aspeed_2500_scu_info) static uint64_t aspeed_ast2600_scu_read(void *opaque, hwaddr offset, unsigned size) @@ -696,13 +699,6 @@ static const TypeInfo aspeed_2600_scu_info = { .instance_size = sizeof(AspeedSCUState), .class_init = aspeed_2600_scu_class_init, }; +TYPE_INFO(aspeed_2600_scu_info) -static void aspeed_scu_register_types(void) -{ - type_register_static(&aspeed_scu_info); - type_register_static(&aspeed_2400_scu_info); - type_register_static(&aspeed_2500_scu_info); - type_register_static(&aspeed_2600_scu_info); -} -type_init(aspeed_scu_register_types); diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 855848b7d2..77365b46e3 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -297,6 +297,7 @@ static const TypeInfo aspeed_sdmc_info = { .class_size = sizeof(AspeedSDMCClass), .abstract = true, }; +TYPE_INFO(aspeed_sdmc_info) static uint32_t aspeed_2400_sdmc_compute_conf(AspeedSDMCState *s, uint32_t data) { @@ -353,6 +354,7 @@ static const TypeInfo aspeed_2400_sdmc_info = { .parent = TYPE_ASPEED_SDMC, .class_init = aspeed_2400_sdmc_class_init, }; +TYPE_INFO(aspeed_2400_sdmc_info) static uint32_t aspeed_2500_sdmc_compute_conf(AspeedSDMCState *s, uint32_t data) { @@ -420,6 +422,7 @@ static const TypeInfo aspeed_2500_sdmc_info = { .parent = TYPE_ASPEED_SDMC, .class_init = aspeed_2500_sdmc_class_init, }; +TYPE_INFO(aspeed_2500_sdmc_info) static uint32_t aspeed_2600_sdmc_compute_conf(AspeedSDMCState *s, uint32_t data) { @@ -497,13 +500,6 @@ static const TypeInfo aspeed_2600_sdmc_info = { .parent = TYPE_ASPEED_SDMC, .class_init = aspeed_2600_sdmc_class_init, }; +TYPE_INFO(aspeed_2600_sdmc_info) -static void aspeed_sdmc_register_types(void) -{ - type_register_static(&aspeed_sdmc_info); - type_register_static(&aspeed_2400_sdmc_info); - type_register_static(&aspeed_2500_sdmc_info); - type_register_static(&aspeed_2600_sdmc_info); -} -type_init(aspeed_sdmc_register_types); diff --git a/hw/misc/aspeed_xdma.c b/hw/misc/aspeed_xdma.c index dca5585a75..82d864fe68 100644 --- a/hw/misc/aspeed_xdma.c +++ b/hw/misc/aspeed_xdma.c @@ -159,9 +159,5 @@ static const TypeInfo aspeed_xdma_info = { .instance_size = sizeof(AspeedXDMAState), .class_init = aspeed_xdma_class_init, }; +TYPE_INFO(aspeed_xdma_info) -static void aspeed_xdma_register_type(void) -{ - type_register_static(&aspeed_xdma_info); -} -type_init(aspeed_xdma_register_type); diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 6c099ae2a2..909bc80f59 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -212,6 +212,7 @@ static const TypeInfo aux_bus_info = { .instance_size = sizeof(AUXBus), .class_init = aux_bus_class_init }; +TYPE_INFO(aux_bus_info) /* aux-i2c implementation (internal not public) */ struct AUXTOI2CState { @@ -251,6 +252,7 @@ static const TypeInfo aux_to_i2c_type_info = { .instance_size = sizeof(AUXTOI2CState), .instance_init = aux_bridge_init }; +TYPE_INFO(aux_to_i2c_type_info) /* aux-slave implementation */ static void aux_slave_dev_print(Monitor *mon, DeviceState *dev, int indent) @@ -292,12 +294,6 @@ static const TypeInfo aux_slave_type_info = { .abstract = true, .class_init = aux_slave_class_init, }; +TYPE_INFO(aux_slave_type_info) -static void aux_register_types(void) -{ - type_register_static(&aux_bus_info); - type_register_static(&aux_slave_type_info); - type_register_static(&aux_to_i2c_type_info); -} -type_init(aux_register_types) diff --git a/hw/misc/avr_power.c b/hw/misc/avr_power.c index a5412f2cfe..ca413fd5a5 100644 --- a/hw/misc/avr_power.c +++ b/hw/misc/avr_power.c @@ -104,10 +104,6 @@ static const TypeInfo avr_mask_info = { .class_init = avr_mask_class_init, .instance_init = avr_mask_init, }; +TYPE_INFO(avr_mask_info) -static void avr_mask_register_types(void) -{ - type_register_static(&avr_mask_info); -} -type_init(avr_mask_register_types) diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c index 9f73cbd5e4..eabe45eb96 100644 --- a/hw/misc/bcm2835_mbox.c +++ b/hw/misc/bcm2835_mbox.c @@ -331,10 +331,6 @@ static TypeInfo bcm2835_mbox_info = { .class_init = bcm2835_mbox_class_init, .instance_init = bcm2835_mbox_init, }; +TYPE_INFO(bcm2835_mbox_info) -static void bcm2835_mbox_register_types(void) -{ - type_register_static(&bcm2835_mbox_info); -} -type_init(bcm2835_mbox_register_types) diff --git a/hw/misc/bcm2835_mphi.c b/hw/misc/bcm2835_mphi.c index 0428e10ba5..7bf8156e69 100644 --- a/hw/misc/bcm2835_mphi.c +++ b/hw/misc/bcm2835_mphi.c @@ -182,10 +182,6 @@ static const TypeInfo bcm2835_mphi_type_info = { .instance_init = mphi_init, .class_init = mphi_class_init, }; +TYPE_INFO(bcm2835_mphi_type_info) -static void bcm2835_mphi_register_types(void) -{ - type_register_static(&bcm2835_mphi_type_info); -} -type_init(bcm2835_mphi_register_types) diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c index 73941bdae9..7b5375f264 100644 --- a/hw/misc/bcm2835_property.c +++ b/hw/misc/bcm2835_property.c @@ -427,10 +427,6 @@ static TypeInfo bcm2835_property_info = { .class_init = bcm2835_property_class_init, .instance_init = bcm2835_property_init, }; +TYPE_INFO(bcm2835_property_info) -static void bcm2835_property_register_types(void) -{ - type_register_static(&bcm2835_property_info); -} -type_init(bcm2835_property_register_types) diff --git a/hw/misc/bcm2835_rng.c b/hw/misc/bcm2835_rng.c index d0c4e64e88..ff99501644 100644 --- a/hw/misc/bcm2835_rng.c +++ b/hw/misc/bcm2835_rng.c @@ -138,10 +138,6 @@ static TypeInfo bcm2835_rng_info = { .class_init = bcm2835_rng_class_init, .instance_init = bcm2835_rng_init, }; +TYPE_INFO(bcm2835_rng_info) -static void bcm2835_rng_register_types(void) -{ - type_register_static(&bcm2835_rng_info); -} -type_init(bcm2835_rng_register_types) diff --git a/hw/misc/bcm2835_thermal.c b/hw/misc/bcm2835_thermal.c index c6f3b1ad60..210a943581 100644 --- a/hw/misc/bcm2835_thermal.c +++ b/hw/misc/bcm2835_thermal.c @@ -126,10 +126,6 @@ static const TypeInfo bcm2835_thermal_info = { .instance_size = sizeof(Bcm2835ThermalState), .class_init = bcm2835_thermal_class_init, }; +TYPE_INFO(bcm2835_thermal_info) -static void bcm2835_thermal_register_types(void) -{ - type_register_static(&bcm2835_thermal_info); -} -type_init(bcm2835_thermal_register_types) diff --git a/hw/misc/debugexit.c b/hw/misc/debugexit.c index 99a814f10c..e0f00d2a96 100644 --- a/hw/misc/debugexit.c +++ b/hw/misc/debugexit.c @@ -75,10 +75,6 @@ static const TypeInfo debug_exit_info = { .instance_size = sizeof(ISADebugExitState), .class_init = debug_exit_class_initfn, }; +TYPE_INFO(debug_exit_info) -static void debug_exit_register_types(void) -{ - type_register_static(&debug_exit_info); -} -type_init(debug_exit_register_types) diff --git a/hw/misc/eccmemctl.c b/hw/misc/eccmemctl.c index aec447368e..daf75f1335 100644 --- a/hw/misc/eccmemctl.c +++ b/hw/misc/eccmemctl.c @@ -346,11 +346,7 @@ static const TypeInfo ecc_info = { .instance_init = ecc_init, .class_init = ecc_class_init, }; +TYPE_INFO(ecc_info) -static void ecc_register_types(void) -{ - type_register_static(&ecc_info); -} -type_init(ecc_register_types) diff --git a/hw/misc/empty_slot.c b/hw/misc/empty_slot.c index 9a011b1c11..d1736d784d 100644 --- a/hw/misc/empty_slot.c +++ b/hw/misc/empty_slot.c @@ -99,10 +99,6 @@ static const TypeInfo empty_slot_info = { .instance_size = sizeof(EmptySlot), .class_init = empty_slot_class_init, }; +TYPE_INFO(empty_slot_info) -static void empty_slot_register_types(void) -{ - type_register_static(&empty_slot_info); -} -type_init(empty_slot_register_types) diff --git a/hw/misc/exynos4210_clk.c b/hw/misc/exynos4210_clk.c index bc1463ff89..da18bc974c 100644 --- a/hw/misc/exynos4210_clk.c +++ b/hw/misc/exynos4210_clk.c @@ -156,11 +156,11 @@ static const TypeInfo exynos4210_clk_info = { .instance_init = exynos4210_clk_init, .class_init = exynos4210_clk_class_init, }; +TYPE_INFO(exynos4210_clk_info) static void exynos4210_clk_register(void) { qemu_log_mask(LOG_GUEST_ERROR, "Clock init\n"); - type_register_static(&exynos4210_clk_info); } type_init(exynos4210_clk_register) diff --git a/hw/misc/exynos4210_pmu.c b/hw/misc/exynos4210_pmu.c index 500f28343f..12ce99969c 100644 --- a/hw/misc/exynos4210_pmu.c +++ b/hw/misc/exynos4210_pmu.c @@ -513,10 +513,6 @@ static const TypeInfo exynos4210_pmu_info = { .instance_init = exynos4210_pmu_init, .class_init = exynos4210_pmu_class_init, }; +TYPE_INFO(exynos4210_pmu_info) -static void exynos4210_pmu_register(void) -{ - type_register_static(&exynos4210_pmu_info); -} -type_init(exynos4210_pmu_register) diff --git a/hw/misc/exynos4210_rng.c b/hw/misc/exynos4210_rng.c index 38cd61c7ea..b4938fe848 100644 --- a/hw/misc/exynos4210_rng.c +++ b/hw/misc/exynos4210_rng.c @@ -268,10 +268,6 @@ static const TypeInfo exynos4210_rng_info = { .instance_init = exynos4210_rng_init, .class_init = exynos4210_rng_class_init, }; +TYPE_INFO(exynos4210_rng_info) -static void exynos4210_rng_register(void) -{ - type_register_static(&exynos4210_rng_info); -} -type_init(exynos4210_rng_register) diff --git a/hw/misc/grlib_ahb_apb_pnp.c b/hw/misc/grlib_ahb_apb_pnp.c index 43e001c3c7..1c0178deb3 100644 --- a/hw/misc/grlib_ahb_apb_pnp.c +++ b/hw/misc/grlib_ahb_apb_pnp.c @@ -180,6 +180,7 @@ static const TypeInfo grlib_ahb_pnp_info = { .instance_size = sizeof(AHBPnp), .class_init = grlib_ahb_pnp_class_init, }; +TYPE_INFO(grlib_ahb_pnp_info) /* APBPnp */ @@ -291,11 +292,6 @@ static const TypeInfo grlib_apb_pnp_info = { .instance_size = sizeof(APBPnp), .class_init = grlib_apb_pnp_class_init, }; +TYPE_INFO(grlib_apb_pnp_info) -static void grlib_ahb_apb_pnp_register_types(void) -{ - type_register_static(&grlib_ahb_pnp_info); - type_register_static(&grlib_apb_pnp_info); -} -type_init(grlib_ahb_apb_pnp_register_types) diff --git a/hw/misc/imx25_ccm.c b/hw/misc/imx25_ccm.c index d3107e5ca2..7b9d9dc5b5 100644 --- a/hw/misc/imx25_ccm.c +++ b/hw/misc/imx25_ccm.c @@ -311,10 +311,6 @@ static const TypeInfo imx25_ccm_info = { .instance_init = imx25_ccm_init, .class_init = imx25_ccm_class_init, }; +TYPE_INFO(imx25_ccm_info) -static void imx25_ccm_register_types(void) -{ - type_register_static(&imx25_ccm_info); -} -type_init(imx25_ccm_register_types) diff --git a/hw/misc/imx31_ccm.c b/hw/misc/imx31_ccm.c index 6e246827ab..c12610e69b 100644 --- a/hw/misc/imx31_ccm.c +++ b/hw/misc/imx31_ccm.c @@ -338,10 +338,6 @@ static const TypeInfo imx31_ccm_info = { .instance_init = imx31_ccm_init, .class_init = imx31_ccm_class_init, }; +TYPE_INFO(imx31_ccm_info) -static void imx31_ccm_register_types(void) -{ - type_register_static(&imx31_ccm_info); -} -type_init(imx31_ccm_register_types) diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c index 7fec8f0a47..582e070287 100644 --- a/hw/misc/imx6_ccm.c +++ b/hw/misc/imx6_ccm.c @@ -774,10 +774,6 @@ static const TypeInfo imx6_ccm_info = { .instance_init = imx6_ccm_init, .class_init = imx6_ccm_class_init, }; +TYPE_INFO(imx6_ccm_info) -static void imx6_ccm_register_types(void) -{ - type_register_static(&imx6_ccm_info); -} -type_init(imx6_ccm_register_types) diff --git a/hw/misc/imx6_src.c b/hw/misc/imx6_src.c index dd99cc7acf..00af88e31b 100644 --- a/hw/misc/imx6_src.c +++ b/hw/misc/imx6_src.c @@ -302,10 +302,6 @@ static const TypeInfo imx6_src_info = { .instance_size = sizeof(IMX6SRCState), .class_init = imx6_src_class_init, }; +TYPE_INFO(imx6_src_info) -static void imx6_src_register_types(void) -{ - type_register_static(&imx6_src_info); -} -type_init(imx6_src_register_types) diff --git a/hw/misc/imx6ul_ccm.c b/hw/misc/imx6ul_ccm.c index 5e0661dacf..48e10f644d 100644 --- a/hw/misc/imx6ul_ccm.c +++ b/hw/misc/imx6ul_ccm.c @@ -929,10 +929,6 @@ static const TypeInfo imx6ul_ccm_info = { .instance_init = imx6ul_ccm_init, .class_init = imx6ul_ccm_class_init, }; +TYPE_INFO(imx6ul_ccm_info) -static void imx6ul_ccm_register_types(void) -{ - type_register_static(&imx6ul_ccm_info); -} -type_init(imx6ul_ccm_register_types) diff --git a/hw/misc/imx7_ccm.c b/hw/misc/imx7_ccm.c index 02fc1ae8d0..08642e103b 100644 --- a/hw/misc/imx7_ccm.c +++ b/hw/misc/imx7_ccm.c @@ -242,6 +242,7 @@ static const TypeInfo imx7_ccm_info = { .instance_init = imx7_ccm_init, .class_init = imx7_ccm_class_init, }; +TYPE_INFO(imx7_ccm_info) static const VMStateDescription vmstate_imx7_analog = { .name = TYPE_IMX7_ANALOG, @@ -270,10 +271,5 @@ static const TypeInfo imx7_analog_info = { .instance_init = imx7_analog_init, .class_init = imx7_analog_class_init, }; +TYPE_INFO(imx7_analog_info) -static void imx7_ccm_register_type(void) -{ - type_register_static(&imx7_ccm_info); - type_register_static(&imx7_analog_info); -} -type_init(imx7_ccm_register_type) diff --git a/hw/misc/imx7_gpr.c b/hw/misc/imx7_gpr.c index b03341a2eb..d1ae539f59 100644 --- a/hw/misc/imx7_gpr.c +++ b/hw/misc/imx7_gpr.c @@ -116,9 +116,5 @@ static const TypeInfo imx7_gpr_info = { .instance_init = imx7_gpr_init, .class_init = imx7_gpr_class_init, }; +TYPE_INFO(imx7_gpr_info) -static void imx7_gpr_register_type(void) -{ - type_register_static(&imx7_gpr_info); -} -type_init(imx7_gpr_register_type) diff --git a/hw/misc/imx7_snvs.c b/hw/misc/imx7_snvs.c index 45972a5920..e92b3bd9a5 100644 --- a/hw/misc/imx7_snvs.c +++ b/hw/misc/imx7_snvs.c @@ -76,9 +76,5 @@ static const TypeInfo imx7_snvs_info = { .instance_init = imx7_snvs_init, .class_init = imx7_snvs_class_init, }; +TYPE_INFO(imx7_snvs_info) -static void imx7_snvs_register_type(void) -{ - type_register_static(&imx7_snvs_info); -} -type_init(imx7_snvs_register_type) diff --git a/hw/misc/imx_ccm.c b/hw/misc/imx_ccm.c index 2f81b0ad73..d2bba941e5 100644 --- a/hw/misc/imx_ccm.c +++ b/hw/misc/imx_ccm.c @@ -78,10 +78,6 @@ static const TypeInfo imx_ccm_info = { .class_size = sizeof(IMXCCMClass), .abstract = true, }; +TYPE_INFO(imx_ccm_info) -static void imx_ccm_register_types(void) -{ - type_register_static(&imx_ccm_info); -} -type_init(imx_ccm_register_types) diff --git a/hw/misc/imx_rngc.c b/hw/misc/imx_rngc.c index 4c270df2db..8e67d3ef2a 100644 --- a/hw/misc/imx_rngc.c +++ b/hw/misc/imx_rngc.c @@ -269,10 +269,6 @@ static const TypeInfo imx_rngc_info = { .instance_size = sizeof(IMXRNGCState), .class_init = imx_rngc_class_init, }; +TYPE_INFO(imx_rngc_info) -static void imx_rngc_register_types(void) -{ - type_register_static(&imx_rngc_info); -} -type_init(imx_rngc_register_types) diff --git a/hw/misc/iotkit-secctl.c b/hw/misc/iotkit-secctl.c index 9fdb82056a..0c93ed02d8 100644 --- a/hw/misc/iotkit-secctl.c +++ b/hw/misc/iotkit-secctl.c @@ -790,10 +790,6 @@ static const TypeInfo iotkit_secctl_info = { .instance_init = iotkit_secctl_init, .class_init = iotkit_secctl_class_init, }; +TYPE_INFO(iotkit_secctl_info) -static void iotkit_secctl_register_types(void) -{ - type_register_static(&iotkit_secctl_info); -} -type_init(iotkit_secctl_register_types); diff --git a/hw/misc/iotkit-sysctl.c b/hw/misc/iotkit-sysctl.c index 269783366d..b145a76680 100644 --- a/hw/misc/iotkit-sysctl.c +++ b/hw/misc/iotkit-sysctl.c @@ -519,10 +519,6 @@ static const TypeInfo iotkit_sysctl_info = { .instance_init = iotkit_sysctl_init, .class_init = iotkit_sysctl_class_init, }; +TYPE_INFO(iotkit_sysctl_info) -static void iotkit_sysctl_register_types(void) -{ - type_register_static(&iotkit_sysctl_info); -} -type_init(iotkit_sysctl_register_types); diff --git a/hw/misc/iotkit-sysinfo.c b/hw/misc/iotkit-sysinfo.c index b2dcfc4376..559f640cd1 100644 --- a/hw/misc/iotkit-sysinfo.c +++ b/hw/misc/iotkit-sysinfo.c @@ -131,10 +131,6 @@ static const TypeInfo iotkit_sysinfo_info = { .instance_init = iotkit_sysinfo_init, .class_init = iotkit_sysinfo_class_init, }; +TYPE_INFO(iotkit_sysinfo_info) -static void iotkit_sysinfo_register_types(void) -{ - type_register_static(&iotkit_sysinfo_info); -} -type_init(iotkit_sysinfo_register_types); diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c index 2b6882face..e61062a2ed 100644 --- a/hw/misc/ivshmem.c +++ b/hw/misc/ivshmem.c @@ -1007,6 +1007,7 @@ static const TypeInfo ivshmem_common_info = { { }, }, }; +TYPE_INFO(ivshmem_common_info) static const VMStateDescription ivshmem_plain_vmsd = { .name = TYPE_IVSHMEM_PLAIN, @@ -1061,6 +1062,7 @@ static const TypeInfo ivshmem_plain_info = { .instance_size = sizeof(IVShmemState), .class_init = ivshmem_plain_class_init, }; +TYPE_INFO(ivshmem_plain_info) static const VMStateDescription ivshmem_doorbell_vmsd = { .name = TYPE_IVSHMEM_DOORBELL, @@ -1122,12 +1124,6 @@ static const TypeInfo ivshmem_doorbell_info = { .instance_init = ivshmem_doorbell_init, .class_init = ivshmem_doorbell_class_init, }; +TYPE_INFO(ivshmem_doorbell_info) -static void ivshmem_register_types(void) -{ - type_register_static(&ivshmem_common_info); - type_register_static(&ivshmem_plain_info); - type_register_static(&ivshmem_doorbell_info); -} -type_init(ivshmem_register_types) diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index d76d7b28d3..79c660eb2d 100644 --- a/hw/misc/mac_via.c +++ b/hw/misc/mac_via.c @@ -1178,6 +1178,7 @@ static TypeInfo mac_via_info = { .instance_init = mac_via_init, .class_init = mac_via_class_init, }; +TYPE_INFO(mac_via_info) /* VIA 1 */ static void mos6522_q800_via1_reset(DeviceState *dev) @@ -1213,6 +1214,7 @@ static const TypeInfo mos6522_q800_via1_type_info = { .instance_init = mos6522_q800_via1_init, .class_init = mos6522_q800_via1_class_init, }; +TYPE_INFO(mos6522_q800_via1_type_info) /* VIA 2 */ static void mos6522_q800_via2_portB_write(MOS6522State *s) @@ -1259,12 +1261,6 @@ static const TypeInfo mos6522_q800_via2_type_info = { .instance_init = mos6522_q800_via2_init, .class_init = mos6522_q800_via2_class_init, }; +TYPE_INFO(mos6522_q800_via2_type_info) -static void mac_via_register_types(void) -{ - type_register_static(&mos6522_q800_via1_type_info); - type_register_static(&mos6522_q800_via2_type_info); - type_register_static(&mac_via_info); -} -type_init(mac_via_register_types); diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 286e7a55f4..751aa7c240 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -580,6 +580,7 @@ static const TypeInfo cuda_type_info = { .instance_init = cuda_init, .class_init = cuda_class_init, }; +TYPE_INFO(cuda_type_info) static void mos6522_cuda_portB_write(MOS6522State *s) { @@ -619,11 +620,6 @@ static const TypeInfo mos6522_cuda_type_info = { .instance_size = sizeof(MOS6522CUDAState), .class_init = mos6522_cuda_class_init, }; +TYPE_INFO(mos6522_cuda_type_info) -static void cuda_register_types(void) -{ - type_register_static(&mos6522_cuda_type_info); - type_register_static(&cuda_type_info); -} -type_init(cuda_register_types) diff --git a/hw/misc/macio/gpio.c b/hw/misc/macio/gpio.c index 0fef8fb335..f77db07c67 100644 --- a/hw/misc/macio/gpio.c +++ b/hw/misc/macio/gpio.c @@ -224,10 +224,6 @@ static const TypeInfo macio_gpio_init_info = { { } }, }; +TYPE_INFO(macio_gpio_init_info) -static void macio_gpio_register_types(void) -{ - type_register_static(&macio_gpio_init_info); -} -type_init(macio_gpio_register_types) diff --git a/hw/misc/macio/mac_dbdma.c b/hw/misc/macio/mac_dbdma.c index e220f1a927..13c201c74f 100644 --- a/hw/misc/macio/mac_dbdma.c +++ b/hw/misc/macio/mac_dbdma.c @@ -931,10 +931,6 @@ static const TypeInfo mac_dbdma_type_info = { .instance_init = mac_dbdma_init, .class_init = mac_dbdma_class_init }; +TYPE_INFO(mac_dbdma_type_info) -static void mac_dbdma_register_types(void) -{ - type_register_static(&mac_dbdma_type_info); -} -type_init(mac_dbdma_register_types) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 679722628e..b9aba19d18 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -467,6 +467,7 @@ static const TypeInfo macio_bus_info = { .parent = TYPE_SYSTEM_BUS, .instance_size = sizeof(MacIOBusState), }; +TYPE_INFO(macio_bus_info) static const TypeInfo macio_oldworld_type_info = { .name = TYPE_OLDWORLD_MACIO, @@ -475,6 +476,7 @@ static const TypeInfo macio_oldworld_type_info = { .instance_init = macio_oldworld_init, .class_init = macio_oldworld_class_init, }; +TYPE_INFO(macio_oldworld_type_info) static const TypeInfo macio_newworld_type_info = { .name = TYPE_NEWWORLD_MACIO, @@ -483,6 +485,7 @@ static const TypeInfo macio_newworld_type_info = { .instance_init = macio_newworld_init, .class_init = macio_newworld_class_init, }; +TYPE_INFO(macio_newworld_type_info) static const TypeInfo macio_type_info = { .name = TYPE_MACIO, @@ -496,13 +499,6 @@ static const TypeInfo macio_type_info = { { }, }, }; +TYPE_INFO(macio_type_info) -static void macio_register_types(void) -{ - type_register_static(&macio_bus_info); - type_register_static(&macio_type_info); - type_register_static(&macio_oldworld_type_info); - type_register_static(&macio_newworld_type_info); -} -type_init(macio_register_types) diff --git a/hw/misc/macio/pmu.c b/hw/misc/macio/pmu.c index 09022995ad..0f1d73e267 100644 --- a/hw/misc/macio/pmu.c +++ b/hw/misc/macio/pmu.c @@ -801,6 +801,7 @@ static const TypeInfo pmu_type_info = { .instance_init = pmu_init, .class_init = pmu_class_init, }; +TYPE_INFO(pmu_type_info) static void mos6522_pmu_portB_write(MOS6522State *s) { @@ -860,11 +861,6 @@ static const TypeInfo mos6522_pmu_type_info = { .instance_size = sizeof(MOS6522PMUState), .class_init = mos6522_pmu_class_init, }; +TYPE_INFO(mos6522_pmu_type_info) -static void pmu_register_types(void) -{ - type_register_static(&pmu_type_info); - type_register_static(&mos6522_pmu_type_info); -} -type_init(pmu_register_types) diff --git a/hw/misc/max111x.c b/hw/misc/max111x.c index 7e6723f343..3db545c99a 100644 --- a/hw/misc/max111x.c +++ b/hw/misc/max111x.c @@ -194,6 +194,7 @@ static const TypeInfo max111x_info = { .class_init = max111x_class_init, .abstract = true, }; +TYPE_INFO(max111x_info) static void max1110_class_init(ObjectClass *klass, void *data) { @@ -209,6 +210,7 @@ static const TypeInfo max1110_info = { .parent = TYPE_MAX_111X, .class_init = max1110_class_init, }; +TYPE_INFO(max1110_info) static void max1111_class_init(ObjectClass *klass, void *data) { @@ -224,12 +226,6 @@ static const TypeInfo max1111_info = { .parent = TYPE_MAX_111X, .class_init = max1111_class_init, }; +TYPE_INFO(max1111_info) -static void max111x_register_types(void) -{ - type_register_static(&max111x_info); - type_register_static(&max1110_info); - type_register_static(&max1111_info); -} -type_init(max111x_register_types) diff --git a/hw/misc/milkymist-hpdmc.c b/hw/misc/milkymist-hpdmc.c index 61e86e6b34..bb21fd7a4b 100644 --- a/hw/misc/milkymist-hpdmc.c +++ b/hw/misc/milkymist-hpdmc.c @@ -164,10 +164,6 @@ static const TypeInfo milkymist_hpdmc_info = { .instance_size = sizeof(MilkymistHpdmcState), .class_init = milkymist_hpdmc_class_init, }; +TYPE_INFO(milkymist_hpdmc_info) -static void milkymist_hpdmc_register_types(void) -{ - type_register_static(&milkymist_hpdmc_info); -} -type_init(milkymist_hpdmc_register_types) diff --git a/hw/misc/milkymist-pfpu.c b/hw/misc/milkymist-pfpu.c index 516825e83d..f78de71df4 100644 --- a/hw/misc/milkymist-pfpu.c +++ b/hw/misc/milkymist-pfpu.c @@ -540,10 +540,6 @@ static const TypeInfo milkymist_pfpu_info = { .instance_size = sizeof(MilkymistPFPUState), .class_init = milkymist_pfpu_class_init, }; +TYPE_INFO(milkymist_pfpu_info) -static void milkymist_pfpu_register_types(void) -{ - type_register_static(&milkymist_pfpu_info); -} -type_init(milkymist_pfpu_register_types) diff --git a/hw/misc/mips_cmgcr.c b/hw/misc/mips_cmgcr.c index 3c8b37f700..ddb46df9fa 100644 --- a/hw/misc/mips_cmgcr.c +++ b/hw/misc/mips_cmgcr.c @@ -246,10 +246,6 @@ static const TypeInfo mips_gcr_info = { .instance_init = mips_gcr_init, .class_init = mips_gcr_class_init, }; +TYPE_INFO(mips_gcr_info) -static void mips_gcr_register_types(void) -{ - type_register_static(&mips_gcr_info); -} -type_init(mips_gcr_register_types) diff --git a/hw/misc/mips_cpc.c b/hw/misc/mips_cpc.c index 2f7b2c9592..9b155b1326 100644 --- a/hw/misc/mips_cpc.c +++ b/hw/misc/mips_cpc.c @@ -185,10 +185,6 @@ static const TypeInfo mips_cpc_info = { .instance_init = mips_cpc_init, .class_init = mips_cpc_class_init, }; +TYPE_INFO(mips_cpc_info) -static void mips_cpc_register_types(void) -{ - type_register_static(&mips_cpc_info); -} -type_init(mips_cpc_register_types) diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c index 3540985258..7afc7c053d 100644 --- a/hw/misc/mips_itu.c +++ b/hw/misc/mips_itu.c @@ -573,10 +573,6 @@ static const TypeInfo mips_itu_info = { .instance_init = mips_itu_init, .class_init = mips_itu_class_init, }; +TYPE_INFO(mips_itu_info) -static void mips_itu_register_types(void) -{ - type_register_static(&mips_itu_info); -} -type_init(mips_itu_register_types) diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c index 19e154b870..240839e994 100644 --- a/hw/misc/mos6522.c +++ b/hw/misc/mos6522.c @@ -523,10 +523,6 @@ static const TypeInfo mos6522_type_info = { .class_size = sizeof(MOS6522DeviceClass), .class_init = mos6522_class_init, }; +TYPE_INFO(mos6522_type_info) -static void mos6522_register_types(void) -{ - type_register_static(&mos6522_type_info); -} -type_init(mos6522_register_types) diff --git a/hw/misc/mps2-fpgaio.c b/hw/misc/mps2-fpgaio.c index 2f3fbeef34..83c060f0ca 100644 --- a/hw/misc/mps2-fpgaio.c +++ b/hw/misc/mps2-fpgaio.c @@ -310,10 +310,6 @@ static const TypeInfo mps2_fpgaio_info = { .instance_init = mps2_fpgaio_init, .class_init = mps2_fpgaio_class_init, }; +TYPE_INFO(mps2_fpgaio_info) -static void mps2_fpgaio_register_types(void) -{ - type_register_static(&mps2_fpgaio_info); -} -type_init(mps2_fpgaio_register_types); diff --git a/hw/misc/mps2-scc.c b/hw/misc/mps2-scc.c index 9d0909e7b3..c3de3813e8 100644 --- a/hw/misc/mps2-scc.c +++ b/hw/misc/mps2-scc.c @@ -303,10 +303,6 @@ static const TypeInfo mps2_scc_info = { .instance_init = mps2_scc_init, .class_init = mps2_scc_class_init, }; +TYPE_INFO(mps2_scc_info) -static void mps2_scc_register_types(void) -{ - type_register_static(&mps2_scc_info); -} -type_init(mps2_scc_register_types); diff --git a/hw/misc/msf2-sysreg.c b/hw/misc/msf2-sysreg.c index 2dce55c364..6ea5b97456 100644 --- a/hw/misc/msf2-sysreg.c +++ b/hw/misc/msf2-sysreg.c @@ -154,10 +154,6 @@ static const TypeInfo msf2_sysreg_info = { .instance_size = sizeof(MSF2SysregState), .instance_init = msf2_sysreg_init, }; +TYPE_INFO(msf2_sysreg_info) -static void msf2_sysreg_register_types(void) -{ - type_register_static(&msf2_sysreg_info); -} -type_init(msf2_sysreg_register_types) diff --git a/hw/misc/mst_fpga.c b/hw/misc/mst_fpga.c index 81abdf8ede..fc4100e1b5 100644 --- a/hw/misc/mst_fpga.c +++ b/hw/misc/mst_fpga.c @@ -260,10 +260,6 @@ static const TypeInfo mst_fpga_info = { .instance_init = mst_fpga_init, .class_init = mst_fpga_class_init, }; +TYPE_INFO(mst_fpga_info) -static void mst_fpga_register_types(void) -{ - type_register_static(&mst_fpga_info); -} -type_init(mst_fpga_register_types) diff --git a/hw/misc/nrf51_rng.c b/hw/misc/nrf51_rng.c index fc86e1b697..1f71b295f5 100644 --- a/hw/misc/nrf51_rng.c +++ b/hw/misc/nrf51_rng.c @@ -257,10 +257,6 @@ static const TypeInfo nrf51_rng_info = { .instance_init = nrf51_rng_init, .class_init = nrf51_rng_class_init }; +TYPE_INFO(nrf51_rng_info) -static void nrf51_rng_register_types(void) -{ - type_register_static(&nrf51_rng_info); -} -type_init(nrf51_rng_register_types) diff --git a/hw/misc/pc-testdev.c b/hw/misc/pc-testdev.c index 8aa8e6549f..9d5a17f747 100644 --- a/hw/misc/pc-testdev.c +++ b/hw/misc/pc-testdev.c @@ -207,10 +207,6 @@ static const TypeInfo testdev_info = { .instance_size = sizeof(PCTestdev), .class_init = testdev_class_init, }; +TYPE_INFO(testdev_info) -static void testdev_register_types(void) -{ - type_register_static(&testdev_info); -} -type_init(testdev_register_types) diff --git a/hw/misc/pca9552.c b/hw/misc/pca9552.c index e4ccdeaf78..60f73dd257 100644 --- a/hw/misc/pca9552.c +++ b/hw/misc/pca9552.c @@ -410,6 +410,7 @@ static const TypeInfo pca955x_info = { .class_size = sizeof(PCA955xClass), .abstract = true, }; +TYPE_INFO(pca955x_info) static void pca9552_class_init(ObjectClass *oc, void *data) { @@ -427,11 +428,6 @@ static const TypeInfo pca9552_info = { .parent = TYPE_PCA955X, .class_init = pca9552_class_init, }; +TYPE_INFO(pca9552_info) -static void pca955x_register_types(void) -{ - type_register_static(&pca955x_info); - type_register_static(&pca9552_info); -} -type_init(pca955x_register_types) diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c index 188de4d9cc..1b0aba0429 100644 --- a/hw/misc/pci-testdev.c +++ b/hw/misc/pci-testdev.c @@ -352,10 +352,6 @@ static const TypeInfo pci_testdev_info = { { }, }, }; +TYPE_INFO(pci_testdev_info) -static void pci_testdev_register_types(void) -{ - type_register_static(&pci_testdev_info); -} -type_init(pci_testdev_register_types) diff --git a/hw/misc/puv3_pm.c b/hw/misc/puv3_pm.c index 8989d363cd..8cc3d44efa 100644 --- a/hw/misc/puv3_pm.c +++ b/hw/misc/puv3_pm.c @@ -149,10 +149,6 @@ static const TypeInfo puv3_pm_info = { .instance_size = sizeof(PUV3PMState), .class_init = puv3_pm_class_init, }; +TYPE_INFO(puv3_pm_info) -static void puv3_pm_register_type(void) -{ - type_register_static(&puv3_pm_info); -} -type_init(puv3_pm_register_type) diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c index abb10bbcaf..98ce4e3289 100644 --- a/hw/misc/pvpanic.c +++ b/hw/misc/pvpanic.c @@ -129,10 +129,6 @@ static TypeInfo pvpanic_isa_info = { .instance_init = pvpanic_isa_initfn, .class_init = pvpanic_isa_class_init, }; +TYPE_INFO(pvpanic_isa_info) -static void pvpanic_register_types(void) -{ - type_register_static(&pvpanic_isa_info); -} -type_init(pvpanic_register_types) diff --git a/hw/misc/sga.c b/hw/misc/sga.c index 6866bf72cb..c1a5625d6a 100644 --- a/hw/misc/sga.c +++ b/hw/misc/sga.c @@ -59,10 +59,6 @@ static const TypeInfo sga_info = { .instance_size = sizeof(ISASGAState), .class_init = sga_class_initfn, }; +TYPE_INFO(sga_info) -static void sga_register_types(void) -{ - type_register_static(&sga_info); -} -type_init(sga_register_types) diff --git a/hw/misc/slavio_misc.c b/hw/misc/slavio_misc.c index 279b38dfc7..41be8d7598 100644 --- a/hw/misc/slavio_misc.c +++ b/hw/misc/slavio_misc.c @@ -495,6 +495,7 @@ static const TypeInfo slavio_misc_info = { .instance_init = slavio_misc_init, .class_init = slavio_misc_class_init, }; +TYPE_INFO(slavio_misc_info) static const TypeInfo apc_info = { .name = TYPE_APC, @@ -502,11 +503,6 @@ static const TypeInfo apc_info = { .instance_size = sizeof(MiscState), .instance_init = apc_init, }; +TYPE_INFO(apc_info) -static void slavio_misc_register_types(void) -{ - type_register_static(&slavio_misc_info); - type_register_static(&apc_info); -} -type_init(slavio_misc_register_types) diff --git a/hw/misc/stm32f2xx_syscfg.c b/hw/misc/stm32f2xx_syscfg.c index aa59b43549..c106f28257 100644 --- a/hw/misc/stm32f2xx_syscfg.c +++ b/hw/misc/stm32f2xx_syscfg.c @@ -154,10 +154,6 @@ static const TypeInfo stm32f2xx_syscfg_info = { .instance_init = stm32f2xx_syscfg_init, .class_init = stm32f2xx_syscfg_class_init, }; +TYPE_INFO(stm32f2xx_syscfg_info) -static void stm32f2xx_syscfg_register_types(void) -{ - type_register_static(&stm32f2xx_syscfg_info); -} -type_init(stm32f2xx_syscfg_register_types) diff --git a/hw/misc/stm32f4xx_exti.c b/hw/misc/stm32f4xx_exti.c index 02e7810046..d00a0240ef 100644 --- a/hw/misc/stm32f4xx_exti.c +++ b/hw/misc/stm32f4xx_exti.c @@ -179,10 +179,6 @@ static const TypeInfo stm32f4xx_exti_info = { .instance_init = stm32f4xx_exti_init, .class_init = stm32f4xx_exti_class_init, }; +TYPE_INFO(stm32f4xx_exti_info) -static void stm32f4xx_exti_register_types(void) -{ - type_register_static(&stm32f4xx_exti_info); -} -type_init(stm32f4xx_exti_register_types) diff --git a/hw/misc/stm32f4xx_syscfg.c b/hw/misc/stm32f4xx_syscfg.c index f960e4ea1e..fe70ba4c7b 100644 --- a/hw/misc/stm32f4xx_syscfg.c +++ b/hw/misc/stm32f4xx_syscfg.c @@ -162,10 +162,6 @@ static const TypeInfo stm32f4xx_syscfg_info = { .instance_init = stm32f4xx_syscfg_init, .class_init = stm32f4xx_syscfg_class_init, }; +TYPE_INFO(stm32f4xx_syscfg_info) -static void stm32f4xx_syscfg_register_types(void) -{ - type_register_static(&stm32f4xx_syscfg_info); -} -type_init(stm32f4xx_syscfg_register_types) diff --git a/hw/misc/tmp105.c b/hw/misc/tmp105.c index b47120492a..59cea18752 100644 --- a/hw/misc/tmp105.c +++ b/hw/misc/tmp105.c @@ -264,10 +264,6 @@ static const TypeInfo tmp105_info = { .instance_init = tmp105_initfn, .class_init = tmp105_class_init, }; +TYPE_INFO(tmp105_info) -static void tmp105_register_types(void) -{ - type_register_static(&tmp105_info); -} -type_init(tmp105_register_types) diff --git a/hw/misc/tmp421.c b/hw/misc/tmp421.c index 49abe2d246..7ae88322b7 100644 --- a/hw/misc/tmp421.c +++ b/hw/misc/tmp421.c @@ -378,12 +378,12 @@ static const TypeInfo tmp421_info = { .instance_init = tmp421_initfn, .abstract = true, }; +TYPE_INFO(tmp421_info) static void tmp421_register_types(void) { int i; - type_register_static(&tmp421_info); for (i = 0; i < ARRAY_SIZE(devices); ++i) { TypeInfo ti = { .name = devices[i].name, diff --git a/hw/misc/tz-mpc.c b/hw/misc/tz-mpc.c index 98f151237f..415e067676 100644 --- a/hw/misc/tz-mpc.c +++ b/hw/misc/tz-mpc.c @@ -606,6 +606,7 @@ static const TypeInfo tz_mpc_info = { .instance_init = tz_mpc_init, .class_init = tz_mpc_class_init, }; +TYPE_INFO(tz_mpc_info) static void tz_mpc_iommu_memory_region_class_init(ObjectClass *klass, void *data) @@ -622,11 +623,6 @@ static const TypeInfo tz_mpc_iommu_memory_region_info = { .parent = TYPE_IOMMU_MEMORY_REGION, .class_init = tz_mpc_iommu_memory_region_class_init, }; +TYPE_INFO(tz_mpc_iommu_memory_region_info) -static void tz_mpc_register_types(void) -{ - type_register_static(&tz_mpc_info); - type_register_static(&tz_mpc_iommu_memory_region_info); -} -type_init(tz_mpc_register_types); diff --git a/hw/misc/tz-msc.c b/hw/misc/tz-msc.c index acbe94400b..6ece4c15a5 100644 --- a/hw/misc/tz-msc.c +++ b/hw/misc/tz-msc.c @@ -303,10 +303,6 @@ static const TypeInfo tz_msc_info = { .instance_init = tz_msc_init, .class_init = tz_msc_class_init, }; +TYPE_INFO(tz_msc_info) -static void tz_msc_register_types(void) -{ - type_register_static(&tz_msc_info); -} -type_init(tz_msc_register_types); diff --git a/hw/misc/tz-ppc.c b/hw/misc/tz-ppc.c index 6431257b52..58c39757d4 100644 --- a/hw/misc/tz-ppc.c +++ b/hw/misc/tz-ppc.c @@ -329,10 +329,6 @@ static const TypeInfo tz_ppc_info = { .instance_init = tz_ppc_init, .class_init = tz_ppc_class_init, }; +TYPE_INFO(tz_ppc_info) -static void tz_ppc_register_types(void) -{ - type_register_static(&tz_ppc_info); -} -type_init(tz_ppc_register_types); diff --git a/hw/misc/unimp.c b/hw/misc/unimp.c index bc4084d344..cb5ba7b363 100644 --- a/hw/misc/unimp.c +++ b/hw/misc/unimp.c @@ -88,10 +88,6 @@ static const TypeInfo unimp_info = { .instance_size = sizeof(UnimplementedDeviceState), .class_init = unimp_class_init, }; +TYPE_INFO(unimp_info) -static void unimp_register_types(void) -{ - type_register_static(&unimp_info); -} -type_init(unimp_register_types) diff --git a/hw/misc/vmcoreinfo.c b/hw/misc/vmcoreinfo.c index a9d718fc23..7b88db0413 100644 --- a/hw/misc/vmcoreinfo.c +++ b/hw/misc/vmcoreinfo.c @@ -99,10 +99,6 @@ static const TypeInfo vmcoreinfo_device_info = { .instance_size = sizeof(VMCoreInfoState), .class_init = vmcoreinfo_device_class_init, }; +TYPE_INFO(vmcoreinfo_device_info) -static void vmcoreinfo_register_types(void) -{ - type_register_static(&vmcoreinfo_device_info); -} -type_init(vmcoreinfo_register_types) diff --git a/hw/misc/zynq-xadc.c b/hw/misc/zynq-xadc.c index 7b1972ce06..f95ccd4c85 100644 --- a/hw/misc/zynq-xadc.c +++ b/hw/misc/zynq-xadc.c @@ -296,10 +296,6 @@ static const TypeInfo zynq_xadc_info = { .instance_size = sizeof(ZynqXADCState), .instance_init = zynq_xadc_init, }; +TYPE_INFO(zynq_xadc_info) -static void zynq_xadc_register_types(void) -{ - type_register_static(&zynq_xadc_info); -} -type_init(zynq_xadc_register_types) diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c index f7472d1f3c..51d14a29a1 100644 --- a/hw/misc/zynq_slcr.c +++ b/hw/misc/zynq_slcr.c @@ -616,10 +616,6 @@ static const TypeInfo zynq_slcr_info = { .instance_size = sizeof(ZynqSLCRState), .instance_init = zynq_slcr_init, }; +TYPE_INFO(zynq_slcr_info) -static void zynq_slcr_register_types(void) -{ - type_register_static(&zynq_slcr_info); -} -type_init(zynq_slcr_register_types) diff --git a/hw/net/allwinner-sun8i-emac.c b/hw/net/allwinner-sun8i-emac.c index 28637ff4c1..d2f1df3a84 100644 --- a/hw/net/allwinner-sun8i-emac.c +++ b/hw/net/allwinner-sun8i-emac.c @@ -858,10 +858,6 @@ static const TypeInfo allwinner_sun8i_emac_info = { .instance_init = allwinner_sun8i_emac_init, .class_init = allwinner_sun8i_emac_class_init, }; +TYPE_INFO(allwinner_sun8i_emac_info) -static void allwinner_sun8i_emac_register_types(void) -{ - type_register_static(&allwinner_sun8i_emac_info); -} -type_init(allwinner_sun8i_emac_register_types) diff --git a/hw/net/allwinner_emac.c b/hw/net/allwinner_emac.c index ddddf35c45..bdd4c97162 100644 --- a/hw/net/allwinner_emac.c +++ b/hw/net/allwinner_emac.c @@ -531,10 +531,6 @@ static const TypeInfo aw_emac_info = { .instance_init = aw_emac_init, .class_init = aw_emac_class_init, }; +TYPE_INFO(aw_emac_info) -static void aw_emac_register_types(void) -{ - type_register_static(&aw_emac_info); -} -type_init(aw_emac_register_types) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index a93b5c07ce..b39b289104 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -1710,10 +1710,6 @@ static const TypeInfo gem_info = { .instance_init = gem_init, .class_init = gem_class_init, }; +TYPE_INFO(gem_info) -static void gem_register_types(void) -{ - type_register_static(&gem_info); -} -type_init(gem_register_types) diff --git a/hw/net/can/can_kvaser_pci.c b/hw/net/can/can_kvaser_pci.c index 4b941370d0..ae35e51434 100644 --- a/hw/net/can/can_kvaser_pci.c +++ b/hw/net/can/can_kvaser_pci.c @@ -313,10 +313,6 @@ static const TypeInfo kvaser_pci_info = { { }, }, }; +TYPE_INFO(kvaser_pci_info) -static void kvaser_pci_register_types(void) -{ - type_register_static(&kvaser_pci_info); -} -type_init(kvaser_pci_register_types) diff --git a/hw/net/can/can_mioe3680_pci.c b/hw/net/can/can_mioe3680_pci.c index 695e762a8d..271f44d5af 100644 --- a/hw/net/can/can_mioe3680_pci.c +++ b/hw/net/can/can_mioe3680_pci.c @@ -256,10 +256,6 @@ static const TypeInfo mioe3680_pci_info = { { }, }, }; +TYPE_INFO(mioe3680_pci_info) -static void mioe3680_pci_register_types(void) -{ - type_register_static(&mioe3680_pci_info); -} -type_init(mioe3680_pci_register_types) diff --git a/hw/net/can/can_pcm3680_pci.c b/hw/net/can/can_pcm3680_pci.c index 4218e63eb2..e3173a6f1c 100644 --- a/hw/net/can/can_pcm3680_pci.c +++ b/hw/net/can/can_pcm3680_pci.c @@ -257,10 +257,6 @@ static const TypeInfo pcm3680i_pci_info = { { }, }, }; +TYPE_INFO(pcm3680i_pci_info) -static void pcm3680i_pci_register_types(void) -{ - type_register_static(&pcm3680i_pci_info); -} -type_init(pcm3680i_pci_register_types) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index c54db0d62d..86bb2b6529 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -1040,10 +1040,6 @@ static const TypeInfo dp8393x_info = { .instance_init = dp8393x_instance_init, .class_init = dp8393x_class_init, }; +TYPE_INFO(dp8393x_info) -static void dp8393x_register_types(void) -{ - type_register_static(&dp8393x_info); -} -type_init(dp8393x_register_types) diff --git a/hw/net/e1000.c b/hw/net/e1000.c index c4d896a9e6..ce0540face 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -1789,6 +1789,7 @@ static const TypeInfo e1000_base_info = { { }, }, }; +TYPE_INFO(e1000_base_info) static const E1000Info e1000_devices[] = { { @@ -1815,7 +1816,6 @@ static void e1000_register_types(void) { int i; - type_register_static(&e1000_base_info); for (i = 0; i < ARRAY_SIZE(e1000_devices); i++) { const E1000Info *info = &e1000_devices[i]; TypeInfo type_info = {}; diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c index fda34518c9..b955f76869 100644 --- a/hw/net/e1000e.c +++ b/hw/net/e1000e.c @@ -719,10 +719,6 @@ static const TypeInfo e1000e_info = { { } }, }; +TYPE_INFO(e1000e_info) -static void e1000e_register_types(void) -{ - type_register_static(&e1000e_info); -} -type_init(e1000e_register_types) diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c index 3408ceacb5..d7712e2924 100644 --- a/hw/net/etraxfs_eth.c +++ b/hw/net/etraxfs_eth.c @@ -680,10 +680,6 @@ static const TypeInfo etraxfs_eth_info = { .instance_size = sizeof(ETRAXFSEthState), .class_init = etraxfs_eth_class_init, }; +TYPE_INFO(etraxfs_eth_info) -static void etraxfs_eth_register_types(void) -{ - type_register_static(&etraxfs_eth_info); -} -type_init(etraxfs_eth_register_types) diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etsec.c index 7035cf4eb9..410ae10553 100644 --- a/hw/net/fsl_etsec/etsec.c +++ b/hw/net/fsl_etsec/etsec.c @@ -436,13 +436,9 @@ static TypeInfo etsec_info = { .class_init = etsec_class_init, .instance_init = etsec_instance_init, }; +TYPE_INFO(etsec_info) -static void etsec_register_types(void) -{ - type_register_static(&etsec_info); -} -type_init(etsec_register_types) DeviceState *etsec_create(hwaddr base, MemoryRegion * mr, diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c index 5f4b26fc5f..70620d864b 100644 --- a/hw/net/ftgmac100.c +++ b/hw/net/ftgmac100.c @@ -1123,6 +1123,7 @@ static const TypeInfo ftgmac100_info = { .instance_size = sizeof(FTGMAC100State), .class_init = ftgmac100_class_init, }; +TYPE_INFO(ftgmac100_info) /* * AST2600 MII controller @@ -1282,11 +1283,6 @@ static const TypeInfo aspeed_mii_info = { .instance_size = sizeof(AspeedMiiState), .class_init = aspeed_mii_class_init, }; +TYPE_INFO(aspeed_mii_info) -static void ftgmac100_register_types(void) -{ - type_register_static(&ftgmac100_info); - type_register_static(&aspeed_mii_info); -} -type_init(ftgmac100_register_types) diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c index 2c14804041..372fdd839b 100644 --- a/hw/net/imx_fec.c +++ b/hw/net/imx_fec.c @@ -1360,17 +1360,13 @@ static const TypeInfo imx_fec_info = { .instance_init = imx_fec_init, .class_init = imx_eth_class_init, }; +TYPE_INFO(imx_fec_info) static const TypeInfo imx_enet_info = { .name = TYPE_IMX_ENET, .parent = TYPE_IMX_FEC, .instance_init = imx_enet_init, }; +TYPE_INFO(imx_enet_info) -static void imx_eth_register_types(void) -{ - type_register_static(&imx_fec_info); - type_register_static(&imx_enet_info); -} -type_init(imx_eth_register_types) diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index 8e2a432179..32cee7b116 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -1381,11 +1381,8 @@ static const TypeInfo lan9118_info = { .instance_size = sizeof(lan9118_state), .class_init = lan9118_class_init, }; +TYPE_INFO(lan9118_info) -static void lan9118_register_types(void) -{ - type_register_static(&lan9118_info); -} /* Legacy helper function. Should go away when machine config files are implemented. */ @@ -1403,4 +1400,3 @@ void lan9118_init(NICInfo *nd, uint32_t base, qemu_irq irq) sysbus_connect_irq(s, 0, irq); } -type_init(lan9118_register_types) diff --git a/hw/net/lance.c b/hw/net/lance.c index 4c5f01baad..9190a4f178 100644 --- a/hw/net/lance.c +++ b/hw/net/lance.c @@ -163,10 +163,6 @@ static const TypeInfo lance_info = { .class_init = lance_class_init, .instance_init = lance_instance_init, }; +TYPE_INFO(lance_info) -static void lance_register_types(void) -{ - type_register_static(&lance_info); -} -type_init(lance_register_types) diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c index 820b63f350..e17ab6d394 100644 --- a/hw/net/lasi_i82596.c +++ b/hw/net/lasi_i82596.c @@ -181,10 +181,6 @@ static const TypeInfo lasi_82596_info = { .class_init = lasi_82596_class_init, .instance_init = lasi_82596_instance_init, }; +TYPE_INFO(lasi_82596_info) -static void lasi_82596_register_types(void) -{ - type_register_static(&lasi_82596_info); -} -type_init(lasi_82596_register_types) diff --git a/hw/net/mcf_fec.c b/hw/net/mcf_fec.c index 25e3e453ab..1da49cf688 100644 --- a/hw/net/mcf_fec.c +++ b/hw/net/mcf_fec.c @@ -683,10 +683,6 @@ static const TypeInfo mcf_fec_info = { .instance_init = mcf_fec_instance_init, .class_init = mcf_fec_class_init, }; +TYPE_INFO(mcf_fec_info) -static void mcf_fec_register_types(void) -{ - type_register_static(&mcf_fec_info); -} -type_init(mcf_fec_register_types) diff --git a/hw/net/milkymist-minimac2.c b/hw/net/milkymist-minimac2.c index 1ba01754ee..c1531a8637 100644 --- a/hw/net/milkymist-minimac2.c +++ b/hw/net/milkymist-minimac2.c @@ -539,10 +539,6 @@ static const TypeInfo milkymist_minimac2_info = { .instance_size = sizeof(MilkymistMinimac2State), .class_init = milkymist_minimac2_class_init, }; +TYPE_INFO(milkymist_minimac2_info) -static void milkymist_minimac2_register_types(void) -{ - type_register_static(&milkymist_minimac2_info); -} -type_init(milkymist_minimac2_register_types) diff --git a/hw/net/mipsnet.c b/hw/net/mipsnet.c index 0c578c430c..137a964795 100644 --- a/hw/net/mipsnet.c +++ b/hw/net/mipsnet.c @@ -287,10 +287,6 @@ static const TypeInfo mipsnet_info = { .instance_size = sizeof(MIPSnetState), .class_init = mipsnet_class_init, }; +TYPE_INFO(mipsnet_info) -static void mipsnet_register_types(void) -{ - type_register_static(&mipsnet_info); -} -type_init(mipsnet_register_types) diff --git a/hw/net/msf2-emac.c b/hw/net/msf2-emac.c index 32ba9e8412..8bc6bcf46d 100644 --- a/hw/net/msf2-emac.c +++ b/hw/net/msf2-emac.c @@ -580,10 +580,6 @@ static const TypeInfo msf2_emac_info = { .instance_init = msf2_emac_init, .class_init = msf2_emac_class_init, }; +TYPE_INFO(msf2_emac_info) -static void msf2_emac_register_types(void) -{ - type_register_static(&msf2_emac_info); -} -type_init(msf2_emac_register_types) diff --git a/hw/net/ne2000-isa.c b/hw/net/ne2000-isa.c index a878056426..8d1fa0fc32 100644 --- a/hw/net/ne2000-isa.c +++ b/hw/net/ne2000-isa.c @@ -142,10 +142,6 @@ static const TypeInfo ne2000_isa_info = { .class_init = isa_ne2000_class_initfn, .instance_init = isa_ne2000_instance_init, }; +TYPE_INFO(ne2000_isa_info) -static void ne2000_isa_register_types(void) -{ - type_register_static(&ne2000_isa_info); -} -type_init(ne2000_isa_register_types) diff --git a/hw/net/ne2000-pci.c b/hw/net/ne2000-pci.c index 9e5d10859a..7508125610 100644 --- a/hw/net/ne2000-pci.c +++ b/hw/net/ne2000-pci.c @@ -127,10 +127,6 @@ static const TypeInfo ne2000_info = { { }, }, }; +TYPE_INFO(ne2000_info) -static void ne2000_register_types(void) -{ - type_register_static(&ne2000_info); -} -type_init(ne2000_register_types) diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c index 2ba0dc8c2f..8ef1197157 100644 --- a/hw/net/opencores_eth.c +++ b/hw/net/opencores_eth.c @@ -763,10 +763,6 @@ static const TypeInfo open_eth_info = { .instance_size = sizeof(OpenEthState), .class_init = open_eth_class_init, }; +TYPE_INFO(open_eth_info) -static void open_eth_register_types(void) -{ - type_register_static(&open_eth_info); -} -type_init(open_eth_register_types) diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index 49d3e42e83..aba8f19048 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -287,10 +287,6 @@ static const TypeInfo pcnet_info = { { }, }, }; +TYPE_INFO(pcnet_info) -static void pci_pcnet_register_types(void) -{ - type_register_static(&pcnet_info); -} -type_init(pci_pcnet_register_types) diff --git a/hw/net/rocker/rocker.c b/hw/net/rocker/rocker.c index 1af1e6fa2f..0f9d4660a9 100644 --- a/hw/net/rocker/rocker.c +++ b/hw/net/rocker/rocker.c @@ -1531,10 +1531,6 @@ static const TypeInfo rocker_info = { { }, }, }; +TYPE_INFO(rocker_info) -static void rocker_register_types(void) -{ - type_register_static(&rocker_info); -} -type_init(rocker_register_types) diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c index ab93d78ab3..c6e9207f74 100644 --- a/hw/net/rtl8139.c +++ b/hw/net/rtl8139.c @@ -3452,10 +3452,6 @@ static const TypeInfo rtl8139_info = { { }, }, }; +TYPE_INFO(rtl8139_info) -static void rtl8139_register_types(void) -{ - type_register_static(&rtl8139_info); -} -type_init(rtl8139_register_types) diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c index a347b6a4d5..bf7e3e6830 100644 --- a/hw/net/smc91c111.c +++ b/hw/net/smc91c111.c @@ -808,11 +808,8 @@ static const TypeInfo smc91c111_info = { .instance_size = sizeof(smc91c111_state), .class_init = smc91c111_class_init, }; +TYPE_INFO(smc91c111_info) -static void smc91c111_register_types(void) -{ - type_register_static(&smc91c111_info); -} /* Legacy helper function. Should go away when machine config files are implemented. */ @@ -830,4 +827,3 @@ void smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq) sysbus_connect_irq(s, 0, irq); } -type_init(smc91c111_register_types) diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c index 4cd02dda01..a6139568bb 100644 --- a/hw/net/spapr_llan.c +++ b/hw/net/spapr_llan.c @@ -869,6 +869,7 @@ static const TypeInfo spapr_vlan_info = { .instance_init = spapr_vlan_instance_init, .instance_finalize = spapr_vlan_instance_finalize, }; +TYPE_INFO(spapr_vlan_info) static void spapr_vlan_register_types(void) { @@ -880,7 +881,6 @@ static void spapr_vlan_register_types(void) spapr_register_hypercall(H_MULTICAST_CTRL, h_multicast_ctrl); spapr_register_hypercall(H_CHANGE_LOGICAL_LAN_MAC, h_change_logical_lan_mac); - type_register_static(&spapr_vlan_info); } type_init(spapr_vlan_register_types) diff --git a/hw/net/stellaris_enet.c b/hw/net/stellaris_enet.c index cb6e2509ea..87399c89b6 100644 --- a/hw/net/stellaris_enet.c +++ b/hw/net/stellaris_enet.c @@ -517,10 +517,6 @@ static const TypeInfo stellaris_enet_info = { .instance_size = sizeof(stellaris_enet_state), .class_init = stellaris_enet_class_init, }; +TYPE_INFO(stellaris_enet_info) -static void stellaris_enet_register_types(void) -{ - type_register_static(&stellaris_enet_info); -} -type_init(stellaris_enet_register_types) diff --git a/hw/net/sungem.c b/hw/net/sungem.c index e4b7b57704..4c9e2bbda5 100644 --- a/hw/net/sungem.c +++ b/hw/net/sungem.c @@ -1444,10 +1444,6 @@ static const TypeInfo sungem_info = { { } } }; +TYPE_INFO(sungem_info) -static void sungem_register_types(void) -{ - type_register_static(&sungem_info); -} -type_init(sungem_register_types) diff --git a/hw/net/sunhme.c b/hw/net/sunhme.c index bc48d46b9f..6c38d3d5c6 100644 --- a/hw/net/sunhme.c +++ b/hw/net/sunhme.c @@ -973,10 +973,6 @@ static const TypeInfo sunhme_info = { { } } }; +TYPE_INFO(sunhme_info) -static void sunhme_register_types(void) -{ - type_register_static(&sunhme_info); -} -type_init(sunhme_register_types) diff --git a/hw/net/tulip.c b/hw/net/tulip.c index ca69f7ea5e..21f9a18655 100644 --- a/hw/net/tulip.c +++ b/hw/net/tulip.c @@ -1038,10 +1038,6 @@ static const TypeInfo tulip_info = { { }, }, }; +TYPE_INFO(tulip_info) -static void tulip_register_types(void) -{ - type_register_static(&tulip_info); -} -type_init(tulip_register_types) diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c index a1fe9e9285..1c0c9184ef 100644 --- a/hw/net/virtio-net.c +++ b/hw/net/virtio-net.c @@ -3602,10 +3602,6 @@ static const TypeInfo virtio_net_info = { .instance_init = virtio_net_instance_init, .class_init = virtio_net_class_init, }; +TYPE_INFO(virtio_net_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_net_info); -} -type_init(virtio_register_types) diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c index 7a6ca4ec35..b484a2faf2 100644 --- a/hw/net/vmxnet3.c +++ b/hw/net/vmxnet3.c @@ -2523,11 +2523,11 @@ static const TypeInfo vmxnet3_info = { { } }, }; +TYPE_INFO(vmxnet3_info) static void vmxnet3_register_types(void) { VMW_CBPRN("vmxnet3_register_types called..."); - type_register_static(&vmxnet3_info); } type_init(vmxnet3_register_types) diff --git a/hw/net/xgmac.c b/hw/net/xgmac.c index 5bf1b61012..00f71dc951 100644 --- a/hw/net/xgmac.c +++ b/hw/net/xgmac.c @@ -433,10 +433,6 @@ static const TypeInfo xgmac_enet_info = { .instance_size = sizeof(XgmacState), .class_init = xgmac_enet_class_init, }; +TYPE_INFO(xgmac_enet_info) -static void xgmac_enet_register_types(void) -{ - type_register_static(&xgmac_enet_info); -} -type_init(xgmac_enet_register_types) diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c index 1e48eb70c9..9711a1dd8e 100644 --- a/hw/net/xilinx_axienet.c +++ b/hw/net/xilinx_axienet.c @@ -1065,6 +1065,7 @@ static const TypeInfo xilinx_enet_info = { .class_init = xilinx_enet_class_init, .instance_init = xilinx_enet_init, }; +TYPE_INFO(xilinx_enet_info) static const TypeInfo xilinx_enet_data_stream_info = { .name = TYPE_XILINX_AXI_ENET_DATA_STREAM, @@ -1076,6 +1077,7 @@ static const TypeInfo xilinx_enet_data_stream_info = { { } } }; +TYPE_INFO(xilinx_enet_data_stream_info) static const TypeInfo xilinx_enet_control_stream_info = { .name = TYPE_XILINX_AXI_ENET_CONTROL_STREAM, @@ -1087,12 +1089,6 @@ static const TypeInfo xilinx_enet_control_stream_info = { { } } }; +TYPE_INFO(xilinx_enet_control_stream_info) -static void xilinx_enet_register_types(void) -{ - type_register_static(&xilinx_enet_info); - type_register_static(&xilinx_enet_data_stream_info); - type_register_static(&xilinx_enet_control_stream_info); -} -type_init(xilinx_enet_register_types) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 71d16fef3d..735236cb0d 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -272,10 +272,6 @@ static const TypeInfo xilinx_ethlite_info = { .instance_init = xilinx_ethlite_init, .class_init = xilinx_ethlite_class_init, }; +TYPE_INFO(xilinx_ethlite_info) -static void xilinx_ethlite_register_types(void) -{ - type_register_static(&xilinx_ethlite_info); -} -type_init(xilinx_ethlite_register_types) diff --git a/hw/nubus/mac-nubus-bridge.c b/hw/nubus/mac-nubus-bridge.c index 7c329300b8..42e32ff107 100644 --- a/hw/nubus/mac-nubus-bridge.c +++ b/hw/nubus/mac-nubus-bridge.c @@ -36,10 +36,6 @@ static const TypeInfo mac_nubus_bridge_info = { .instance_size = sizeof(MacNubusState), .class_init = mac_nubus_bridge_class_init, }; +TYPE_INFO(mac_nubus_bridge_info) -static void mac_nubus_bridge_register_types(void) -{ - type_register_static(&mac_nubus_bridge_info); -} -type_init(mac_nubus_bridge_register_types) diff --git a/hw/nubus/nubus-bridge.c b/hw/nubus/nubus-bridge.c index cd8c6a91eb..678da60ddd 100644 --- a/hw/nubus/nubus-bridge.c +++ b/hw/nubus/nubus-bridge.c @@ -25,10 +25,6 @@ static const TypeInfo nubus_bridge_info = { .instance_size = sizeof(SysBusDevice), .class_init = nubus_bridge_class_init, }; +TYPE_INFO(nubus_bridge_info) -static void nubus_register_types(void) -{ - type_register_static(&nubus_bridge_info); -} -type_init(nubus_register_types) diff --git a/hw/nubus/nubus-bus.c b/hw/nubus/nubus-bus.c index 942a6d5342..0b44ce3c34 100644 --- a/hw/nubus/nubus-bus.c +++ b/hw/nubus/nubus-bus.c @@ -102,10 +102,6 @@ static const TypeInfo nubus_bus_info = { .instance_init = nubus_init, .class_init = nubus_class_init, }; +TYPE_INFO(nubus_bus_info) -static void nubus_register_types(void) -{ - type_register_static(&nubus_bus_info); -} -type_init(nubus_register_types) diff --git a/hw/nubus/nubus-device.c b/hw/nubus/nubus-device.c index ffe78a8823..5a2f5a55d5 100644 --- a/hw/nubus/nubus-device.c +++ b/hw/nubus/nubus-device.c @@ -206,10 +206,6 @@ static const TypeInfo nubus_device_type_info = { .instance_size = sizeof(NubusDevice), .class_init = nubus_device_class_init, }; +TYPE_INFO(nubus_device_type_info) -static void nubus_register_types(void) -{ - type_register_static(&nubus_device_type_info); -} -type_init(nubus_register_types) diff --git a/hw/nvram/ds1225y.c b/hw/nvram/ds1225y.c index d5cb922287..6daef757aa 100644 --- a/hw/nvram/ds1225y.c +++ b/hw/nvram/ds1225y.c @@ -162,10 +162,6 @@ static const TypeInfo nvram_sysbus_info = { .instance_size = sizeof(SysBusNvRamState), .class_init = nvram_sysbus_class_init, }; +TYPE_INFO(nvram_sysbus_info) -static void nvram_register_types(void) -{ - type_register_static(&nvram_sysbus_info); -} -type_init(nvram_register_types) diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index d46a2bec3f..95582d67a7 100644 --- a/hw/nvram/eeprom_at24c.c +++ b/hw/nvram/eeprom_at24c.c @@ -194,10 +194,6 @@ const TypeInfo at24c_eeprom_type = { .class_size = sizeof(I2CSlaveClass), .class_init = at24c_eeprom_class_init, }; +TYPE_INFO(at24c_eeprom_type) -static void at24c_eeprom_register(void) -{ - type_register_static(&at24c_eeprom_type); -} -type_init(at24c_eeprom_register) diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index f3a4728288..0615197196 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1224,6 +1224,7 @@ static const TypeInfo fw_cfg_info = { .instance_size = sizeof(FWCfgState), .class_init = fw_cfg_class_init, }; +TYPE_INFO(fw_cfg_info) static void fw_cfg_file_slots_allocate(FWCfgState *s, Error **errp) { @@ -1297,6 +1298,7 @@ static const TypeInfo fw_cfg_io_info = { .instance_size = sizeof(FWCfgIoState), .class_init = fw_cfg_io_class_init, }; +TYPE_INFO(fw_cfg_io_info) static Property fw_cfg_mem_properties[] = { @@ -1359,19 +1361,13 @@ static const TypeInfo fw_cfg_mem_info = { .instance_size = sizeof(FWCfgMemState), .class_init = fw_cfg_mem_class_init, }; +TYPE_INFO(fw_cfg_mem_info) static const TypeInfo fw_cfg_data_generator_interface_info = { .parent = TYPE_INTERFACE, .name = TYPE_FW_CFG_DATA_GENERATOR_INTERFACE, .class_size = sizeof(FWCfgDataGeneratorClass), }; +TYPE_INFO(fw_cfg_data_generator_interface_info) -static void fw_cfg_register_types(void) -{ - type_register_static(&fw_cfg_info); - type_register_static(&fw_cfg_io_info); - type_register_static(&fw_cfg_mem_info); - type_register_static(&fw_cfg_data_generator_interface_info); -} -type_init(fw_cfg_register_types) diff --git a/hw/nvram/mac_nvram.c b/hw/nvram/mac_nvram.c index beec1c4e4d..4ab7b31761 100644 --- a/hw/nvram/mac_nvram.c +++ b/hw/nvram/mac_nvram.c @@ -127,11 +127,8 @@ static const TypeInfo macio_nvram_type_info = { .instance_size = sizeof(MacIONVRAMState), .class_init = macio_nvram_class_init, }; +TYPE_INFO(macio_nvram_type_info) -static void macio_nvram_register_types(void) -{ - type_register_static(&macio_nvram_type_info); -} /* Set up a system OpenBIOS NVRAM partition */ static void pmac_format_nvram_partition_of(MacIONVRAMState *nvr, int off, @@ -182,4 +179,3 @@ void pmac_format_nvram_partition(MacIONVRAMState *nvr, int len) pmac_format_nvram_partition_of(nvr, 0, len / 2); pmac_format_nvram_partition_osx(nvr, len / 2, len / 2); } -type_init(macio_nvram_register_types) diff --git a/hw/nvram/nrf51_nvm.c b/hw/nvram/nrf51_nvm.c index f2283c1a8d..c410a4c483 100644 --- a/hw/nvram/nrf51_nvm.c +++ b/hw/nvram/nrf51_nvm.c @@ -382,10 +382,6 @@ static const TypeInfo nrf51_nvm_info = { .instance_init = nrf51_nvm_init, .class_init = nrf51_nvm_class_init }; +TYPE_INFO(nrf51_nvm_info) -static void nrf51_nvm_register_types(void) -{ - type_register_static(&nrf51_nvm_info); -} -type_init(nrf51_nvm_register_types) diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c index 15d08281d4..f2b095480b 100644 --- a/hw/nvram/spapr_nvram.c +++ b/hw/nvram/spapr_nvram.c @@ -281,10 +281,6 @@ static const TypeInfo spapr_nvram_type_info = { .instance_size = sizeof(SpaprNvram), .class_init = spapr_nvram_class_init, }; +TYPE_INFO(spapr_nvram_type_info) -static void spapr_nvram_register_types(void) -{ - type_register_static(&spapr_nvram_type_info); -} -type_init(spapr_nvram_register_types) diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c index 677a310b96..b36e7f90a3 100644 --- a/hw/pci-bridge/dec.c +++ b/hw/pci-bridge/dec.c @@ -76,6 +76,7 @@ static const TypeInfo dec_21154_pci_bridge_info = { { }, }, }; +TYPE_INFO(dec_21154_pci_bridge_info) PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn) { @@ -138,6 +139,7 @@ static const TypeInfo dec_21154_pci_host_info = { { }, }, }; +TYPE_INFO(dec_21154_pci_host_info) static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data) { @@ -152,12 +154,6 @@ static const TypeInfo pci_dec_21154_device_info = { .instance_size = sizeof(DECState), .class_init = pci_dec_21154_device_class_init, }; +TYPE_INFO(pci_dec_21154_device_info) -static void dec_register_types(void) -{ - type_register_static(&pci_dec_21154_device_info); - type_register_static(&dec_21154_pci_host_info); - type_register_static(&dec_21154_pci_bridge_info); -} -type_init(dec_register_types) diff --git a/hw/pci-bridge/i82801b11.c b/hw/pci-bridge/i82801b11.c index 2b3907655b..1ff0c82142 100644 --- a/hw/pci-bridge/i82801b11.c +++ b/hw/pci-bridge/i82801b11.c @@ -113,10 +113,6 @@ static const TypeInfo i82801b11_bridge_info = { { }, }, }; +TYPE_INFO(i82801b11_bridge_info) -static void d2pbr_register(void) -{ - type_register_static(&i82801b11_bridge_info); -} -type_init(d2pbr_register); diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c index f1e16135a3..c16bb0aafc 100644 --- a/hw/pci-bridge/ioh3420.c +++ b/hw/pci-bridge/ioh3420.c @@ -121,10 +121,6 @@ static const TypeInfo ioh3420_info = { .parent = TYPE_PCIE_ROOT_PORT, .class_init = ioh3420_class_init, }; +TYPE_INFO(ioh3420_info) -static void ioh3420_register_types(void) -{ - type_register_static(&ioh3420_info); -} -type_init(ioh3420_register_types) diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index 4a080b7c7b..d080a0ca18 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -278,6 +278,7 @@ static const TypeInfo pci_bridge_dev_info = { { } } }; +TYPE_INFO(pci_bridge_dev_info) /* * Multiseat bridge. Same as the standard pci bridge, only with a @@ -299,11 +300,6 @@ static const TypeInfo pci_bridge_dev_seat_info = { .instance_size = sizeof(PCIBridgeDev), .class_init = pci_bridge_dev_seat_class_init, }; +TYPE_INFO(pci_bridge_dev_seat_info) -static void pci_bridge_dev_register(void) -{ - type_register_static(&pci_bridge_dev_info); - type_register_static(&pci_bridge_dev_seat_info); -} -type_init(pci_bridge_dev_register); diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index 22f9fc223b..4c19a5051b 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -90,6 +90,7 @@ static const TypeInfo pxb_bus_info = { .instance_size = sizeof(PXBBus), .class_init = pxb_bus_class_init, }; +TYPE_INFO(pxb_bus_info) static const TypeInfo pxb_pcie_bus_info = { .name = TYPE_PXB_PCIE_BUS, @@ -97,6 +98,7 @@ static const TypeInfo pxb_pcie_bus_info = { .instance_size = sizeof(PXBBus), .class_init = pxb_bus_class_init, }; +TYPE_INFO(pxb_pcie_bus_info) static const char *pxb_host_root_bus_path(PCIHostState *host_bridge, PCIBus *rootbus) @@ -157,6 +159,7 @@ static const TypeInfo pxb_host_info = { .parent = TYPE_PCI_HOST_BRIDGE, .class_init = pxb_host_class_init, }; +TYPE_INFO(pxb_host_info) /* * Registers the PXB bus as a child of pci host root bus. @@ -324,6 +327,7 @@ static const TypeInfo pxb_dev_info = { { }, }, }; +TYPE_INFO(pxb_dev_info) static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp) { @@ -362,14 +366,6 @@ static const TypeInfo pxb_pcie_dev_info = { { }, }, }; +TYPE_INFO(pxb_pcie_dev_info) -static void pxb_register_types(void) -{ - type_register_static(&pxb_bus_info); - type_register_static(&pxb_pcie_bus_info); - type_register_static(&pxb_host_info); - type_register_static(&pxb_dev_info); - type_register_static(&pxb_pcie_dev_info); -} -type_init(pxb_register_types) diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c index eade133968..00b30b2a4b 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -171,10 +171,6 @@ static const TypeInfo pcie_pci_bridge_info = { { }, } }; +TYPE_INFO(pcie_pci_bridge_info) -static void pciepci_register(void) -{ - type_register_static(&pcie_pci_bridge_info); -} -type_init(pciepci_register); diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index f1cfe9d14a..b48d4b0ef1 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -189,10 +189,6 @@ static const TypeInfo rp_info = { { } }, }; +TYPE_INFO(rp_info) -static void rp_register_types(void) -{ - type_register_static(&rp_info); -} -type_init(rp_register_types) diff --git a/hw/pci-bridge/simba.c b/hw/pci-bridge/simba.c index ba55ab1939..c2783b3c0e 100644 --- a/hw/pci-bridge/simba.c +++ b/hw/pci-bridge/simba.c @@ -93,10 +93,6 @@ static const TypeInfo simba_pci_bridge_info = { { }, }, }; +TYPE_INFO(simba_pci_bridge_info) -static void simba_register_types(void) -{ - type_register_static(&simba_pci_bridge_info); -} -type_init(simba_register_types) diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c index 04aae72cd6..1ff57a0358 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -181,10 +181,6 @@ static const TypeInfo xio3130_downstream_info = { { } }, }; +TYPE_INFO(xio3130_downstream_info) -static void xio3130_downstream_register_types(void) -{ - type_register_static(&xio3130_downstream_info); -} -type_init(xio3130_downstream_register_types) diff --git a/hw/pci-bridge/xio3130_upstream.c b/hw/pci-bridge/xio3130_upstream.c index 5cd3af4fbc..4fe1695278 100644 --- a/hw/pci-bridge/xio3130_upstream.c +++ b/hw/pci-bridge/xio3130_upstream.c @@ -150,10 +150,6 @@ static const TypeInfo xio3130_upstream_info = { { } }, }; +TYPE_INFO(xio3130_upstream_info) -static void xio3130_upstream_register_types(void) -{ - type_register_static(&xio3130_upstream_info); -} -type_init(xio3130_upstream_register_types) diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 1405b3fc70..ea7e30155c 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -788,6 +788,7 @@ static const TypeInfo bonito_info = { { }, }, }; +TYPE_INFO(bonito_info) static void bonito_pcihost_class_init(ObjectClass *klass, void *data) { @@ -802,11 +803,6 @@ static const TypeInfo bonito_pcihost_info = { .instance_size = sizeof(BonitoState), .class_init = bonito_pcihost_class_init, }; +TYPE_INFO(bonito_pcihost_info) -static void bonito_register_types(void) -{ - type_register_static(&bonito_pcihost_info); - type_register_static(&bonito_info); -} -type_init(bonito_register_types) diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 8492c18991..d96f3a3a3a 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -737,6 +737,7 @@ static const TypeInfo designware_pcie_root_info = { { } }, }; +TYPE_INFO(designware_pcie_root_info) static const TypeInfo designware_pcie_host_info = { .name = TYPE_DESIGNWARE_PCIE_HOST, @@ -745,10 +746,5 @@ static const TypeInfo designware_pcie_host_info = { .instance_init = designware_pcie_host_init, .class_init = designware_pcie_host_class_init, }; +TYPE_INFO(designware_pcie_host_info) -static void designware_pcie_register(void) -{ - type_register_static(&designware_pcie_root_info); - type_register_static(&designware_pcie_host_info); -} -type_init(designware_pcie_register) diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index 2bdbe7b456..fa1d12744e 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -136,6 +136,7 @@ static const TypeInfo gpex_host_info = { .instance_init = gpex_host_initfn, .class_init = gpex_host_class_init, }; +TYPE_INFO(gpex_host_info) /**************************************************************************** * GPEX Root D0:F0 @@ -180,11 +181,6 @@ static const TypeInfo gpex_root_info = { { }, }, }; +TYPE_INFO(gpex_root_info) -static void gpex_register(void) -{ - type_register_static(&gpex_root_info); - type_register_static(&gpex_host_info); -} -type_init(gpex_register) diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index 4b3af0c704..066dc773e2 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -149,6 +149,7 @@ static const TypeInfo grackle_pci_info = { { }, }, }; +TYPE_INFO(grackle_pci_info) static char *grackle_ofw_unit_address(const SysBusDevice *dev) { @@ -181,11 +182,6 @@ static const TypeInfo grackle_host_info = { .instance_init = grackle_init, .class_init = grackle_class_init, }; +TYPE_INFO(grackle_host_info) -static void grackle_register_types(void) -{ - type_register_static(&grackle_pci_info); - type_register_static(&grackle_host_info); -} -type_init(grackle_register_types) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 8ed2417f0c..56ac1089b6 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -369,6 +369,7 @@ static const TypeInfo i440fx_info = { { }, }, }; +TYPE_INFO(i440fx_info) static const char *i440fx_pcihost_root_bus_path(PCIHostState *host_bridge, PCIBus *rootbus) @@ -410,11 +411,6 @@ static const TypeInfo i440fx_pcihost_info = { .instance_init = i440fx_pcihost_initfn, .class_init = i440fx_pcihost_class_init, }; +TYPE_INFO(i440fx_pcihost_info) -static void i440fx_register_types(void) -{ - type_register_static(&i440fx_info); - type_register_static(&i440fx_pcihost_info); -} -type_init(i440fx_register_types) diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 82132c12ca..171e4e1c71 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -893,6 +893,7 @@ static const TypeInfo pnv_phb3_iommu_memory_region_info = { .name = TYPE_PNV_PHB3_IOMMU_MEMORY_REGION, .class_init = pnv_phb3_iommu_memory_region_class_init, }; +TYPE_INFO(pnv_phb3_iommu_memory_region_info) /* * MSI/MSIX memory region implementation. @@ -1113,6 +1114,7 @@ static const TypeInfo pnv_phb3_type_info = { .class_init = pnv_phb3_class_init, .instance_init = pnv_phb3_instance_init, }; +TYPE_INFO(pnv_phb3_type_info) static void pnv_phb3_root_bus_class_init(ObjectClass *klass, void *data) { @@ -1134,6 +1136,7 @@ static const TypeInfo pnv_phb3_root_bus_info = { { } }, }; +TYPE_INFO(pnv_phb3_root_bus_info) static void pnv_phb3_root_port_realize(DeviceState *dev, Error **errp) { @@ -1173,13 +1176,6 @@ static const TypeInfo pnv_phb3_root_port_info = { .instance_size = sizeof(PnvPHB3RootPort), .class_init = pnv_phb3_root_port_class_init, }; +TYPE_INFO(pnv_phb3_root_port_info) -static void pnv_phb3_register_types(void) -{ - type_register_static(&pnv_phb3_root_bus_info); - type_register_static(&pnv_phb3_root_port_info); - type_register_static(&pnv_phb3_type_info); - type_register_static(&pnv_phb3_iommu_memory_region_info); -} -type_init(pnv_phb3_register_types) diff --git a/hw/pci-host/pnv_phb3_msi.c b/hw/pci-host/pnv_phb3_msi.c index 099d2092a2..a57a34c405 100644 --- a/hw/pci-host/pnv_phb3_msi.c +++ b/hw/pci-host/pnv_phb3_msi.c @@ -310,13 +310,9 @@ static const TypeInfo phb3_msi_info = { .class_size = sizeof(ICSStateClass), .instance_init = phb3_msi_instance_init, }; +TYPE_INFO(phb3_msi_info) -static void pnv_phb3_msi_register_types(void) -{ - type_register_static(&phb3_msi_info); -} -type_init(pnv_phb3_msi_register_types); void pnv_phb3_msi_pic_print_info(Phb3MsiState *msi, Monitor *mon) { diff --git a/hw/pci-host/pnv_phb3_pbcq.c b/hw/pci-host/pnv_phb3_pbcq.c index a0526aa1ec..edb7eb1f70 100644 --- a/hw/pci-host/pnv_phb3_pbcq.c +++ b/hw/pci-host/pnv_phb3_pbcq.c @@ -349,10 +349,6 @@ static const TypeInfo pnv_pbcq_type_info = { { } } }; +TYPE_INFO(pnv_pbcq_type_info) -static void pnv_pbcq_register_types(void) -{ - type_register_static(&pnv_pbcq_type_info); -} -type_init(pnv_pbcq_register_types) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 75ad766fe0..6e8c45e200 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1058,6 +1058,7 @@ static const TypeInfo pnv_phb4_iommu_memory_region_info = { .name = TYPE_PNV_PHB4_IOMMU_MEMORY_REGION, .class_init = pnv_phb4_iommu_memory_region_class_init, }; +TYPE_INFO(pnv_phb4_iommu_memory_region_info) /* * MSI/MSIX memory region implementation. @@ -1301,6 +1302,7 @@ static const TypeInfo pnv_phb4_type_info = { { }, } }; +TYPE_INFO(pnv_phb4_type_info) static void pnv_phb4_root_bus_class_init(ObjectClass *klass, void *data) { @@ -1322,6 +1324,7 @@ static const TypeInfo pnv_phb4_root_bus_info = { { } }, }; +TYPE_INFO(pnv_phb4_root_bus_info) static void pnv_phb4_root_port_reset(DeviceState *dev) { @@ -1385,16 +1388,9 @@ static const TypeInfo pnv_phb4_root_port_info = { .instance_size = sizeof(PnvPHB4RootPort), .class_init = pnv_phb4_root_port_class_init, }; +TYPE_INFO(pnv_phb4_root_port_info) -static void pnv_phb4_register_types(void) -{ - type_register_static(&pnv_phb4_root_bus_info); - type_register_static(&pnv_phb4_root_port_info); - type_register_static(&pnv_phb4_type_info); - type_register_static(&pnv_phb4_iommu_memory_region_info); -} -type_init(pnv_phb4_register_types); void pnv_phb4_update_regions(PnvPhb4PecStack *stack) { diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index 741ddc90ed..dcbbce0d20 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -513,6 +513,7 @@ static const TypeInfo pnv_pec_type_info = { { } } }; +TYPE_INFO(pnv_pec_type_info) static void pnv_pec_stk_instance_init(Object *obj) { @@ -583,11 +584,6 @@ static const TypeInfo pnv_pec_stk_type_info = { { } } }; +TYPE_INFO(pnv_pec_stk_type_info) -static void pnv_pec_register_types(void) -{ - type_register_static(&pnv_pec_type_info); - type_register_static(&pnv_pec_stk_type_info); -} -type_init(pnv_pec_register_types); diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index d71072731d..c2a8527521 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -518,6 +518,7 @@ static const TypeInfo e500_host_bridge_info = { { }, }, }; +TYPE_INFO(e500_host_bridge_info) static Property pcihost_properties[] = { DEFINE_PROP_UINT32("first_slot", PPCE500PCIState, first_slot, 0x11), @@ -541,11 +542,6 @@ static const TypeInfo e500_pcihost_info = { .instance_size = sizeof(PPCE500PCIState), .class_init = e500_pcihost_class_init, }; +TYPE_INFO(e500_pcihost_info) -static void e500_pci_register_types(void) -{ - type_register_static(&e500_pcihost_info); - type_register_static(&e500_host_bridge_info); -} -type_init(e500_pci_register_types) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 4b93fd2b01..5de4ab83f9 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -395,6 +395,7 @@ static const TypeInfo raven_info = { { }, }, }; +TYPE_INFO(raven_info) static Property raven_pcihost_properties[] = { DEFINE_PROP_UINT32("elf-machine", PREPPCIState, pci_dev.elf_machine, @@ -423,11 +424,6 @@ static const TypeInfo raven_pcihost_info = { .instance_init = raven_pcihost_initfn, .class_init = raven_pcihost_class_init, }; +TYPE_INFO(raven_pcihost_info) -static void raven_register_types(void) -{ - type_register_static(&raven_pcihost_info); - type_register_static(&raven_info); -} -type_init(raven_register_types) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index b67cb9c29f..df0e50d1b9 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -261,6 +261,7 @@ static const TypeInfo q35_host_info = { .instance_init = q35_host_initfn, .class_init = q35_host_class_init, }; +TYPE_INFO(q35_host_info) /**************************************************************************** * MCH D0:F0 @@ -706,11 +707,6 @@ static const TypeInfo mch_info = { { }, }, }; +TYPE_INFO(mch_info) -static void q35_register(void) -{ - type_register_static(&mch_info); - type_register_static(&q35_host_info); -} -type_init(q35_register); diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 0cc68585f8..5a67f55a11 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -499,6 +499,7 @@ static const TypeInfo sabre_pci_info = { { }, }, }; +TYPE_INFO(sabre_pci_info) static char *sabre_ofw_unit_address(const SysBusDevice *dev) { @@ -535,11 +536,6 @@ static const TypeInfo sabre_info = { .instance_init = sabre_init, .class_init = sabre_class_init, }; +TYPE_INFO(sabre_info) -static void sabre_register_types(void) -{ - type_register_static(&sabre_info); - type_register_static(&sabre_pci_info); -} -type_init(sabre_register_types) diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 1ed1072eeb..b1aa37101b 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -380,6 +380,7 @@ static const TypeInfo unin_main_pci_host_info = { { }, }, }; +TYPE_INFO(unin_main_pci_host_info) static void u3_agp_pci_host_class_init(ObjectClass *klass, void *data) { @@ -408,6 +409,7 @@ static const TypeInfo u3_agp_pci_host_info = { { }, }, }; +TYPE_INFO(u3_agp_pci_host_info) static void unin_agp_pci_host_class_init(ObjectClass *klass, void *data) { @@ -436,6 +438,7 @@ static const TypeInfo unin_agp_pci_host_info = { { }, }, }; +TYPE_INFO(unin_agp_pci_host_info) static void unin_internal_pci_host_class_init(ObjectClass *klass, void *data) { @@ -464,6 +467,7 @@ static const TypeInfo unin_internal_pci_host_info = { { }, }, }; +TYPE_INFO(unin_internal_pci_host_info) static Property pci_unin_main_pci_host_props[] = { DEFINE_PROP_UINT32("ofw-addr", UNINHostState, ofw_addr, -1), @@ -489,6 +493,7 @@ static const TypeInfo pci_unin_main_info = { .instance_init = pci_unin_main_init, .class_init = pci_unin_main_class_init, }; +TYPE_INFO(pci_unin_main_info) static void pci_u3_agp_class_init(ObjectClass *klass, void *data) { @@ -505,6 +510,7 @@ static const TypeInfo pci_u3_agp_info = { .instance_init = pci_u3_agp_init, .class_init = pci_u3_agp_class_init, }; +TYPE_INFO(pci_u3_agp_info) static void pci_unin_agp_class_init(ObjectClass *klass, void *data) { @@ -521,6 +527,7 @@ static const TypeInfo pci_unin_agp_info = { .instance_init = pci_unin_agp_init, .class_init = pci_unin_agp_class_init, }; +TYPE_INFO(pci_unin_agp_info) static void pci_unin_internal_class_init(ObjectClass *klass, void *data) { @@ -537,6 +544,7 @@ static const TypeInfo pci_unin_internal_info = { .instance_init = pci_unin_internal_init, .class_init = pci_unin_internal_class_init, }; +TYPE_INFO(pci_unin_internal_info) /* UniN device */ static void unin_write(void *opaque, hwaddr addr, uint64_t value, @@ -592,20 +600,12 @@ static const TypeInfo unin_info = { .instance_init = unin_init, .class_init = unin_class_init, }; +TYPE_INFO(unin_info) static void unin_register_types(void) { - type_register_static(&unin_main_pci_host_info); - type_register_static(&u3_agp_pci_host_info); - type_register_static(&unin_agp_pci_host_info); - type_register_static(&unin_internal_pci_host_info); - type_register_static(&pci_unin_main_info); - type_register_static(&pci_u3_agp_info); - type_register_static(&pci_unin_agp_info); - type_register_static(&pci_unin_internal_info); - type_register_static(&unin_info); } type_init(unin_register_types) diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index 7e4aa467a2..fd71ae8d19 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -494,6 +494,7 @@ static const TypeInfo versatile_pci_host_info = { { }, }, }; +TYPE_INFO(versatile_pci_host_info) static Property pci_vpb_properties[] = { DEFINE_PROP_UINT8("broken-irq-mapping", PCIVPBState, irq_mapping_prop, @@ -518,6 +519,7 @@ static const TypeInfo pci_vpb_info = { .instance_init = pci_vpb_init, .class_init = pci_vpb_class_init, }; +TYPE_INFO(pci_vpb_info) static void pci_realview_init(Object *obj) { @@ -535,12 +537,6 @@ static const TypeInfo pci_realview_info = { .parent = TYPE_VERSATILE_PCI, .instance_init = pci_realview_init, }; +TYPE_INFO(pci_realview_info) -static void versatile_pci_register_types(void) -{ - type_register_static(&pci_vpb_info); - type_register_static(&pci_realview_info); - type_register_static(&versatile_pci_host_info); -} -type_init(versatile_pci_register_types) diff --git a/hw/pci-host/xen_igd_pt.c b/hw/pci-host/xen_igd_pt.c index d094b675d6..27e2e475c6 100644 --- a/hw/pci-host/xen_igd_pt.c +++ b/hw/pci-host/xen_igd_pt.c @@ -110,10 +110,6 @@ static const TypeInfo igd_passthrough_i440fx_info = { .instance_size = sizeof(PCII440FXState), .class_init = igd_passthrough_i440fx_class_init, }; +TYPE_INFO(igd_passthrough_i440fx_info) -static void igd_pt_i440fx_register_types(void) -{ - type_register_static(&igd_passthrough_i440fx_info); -} -type_init(igd_pt_i440fx_register_types) diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index 3b321421b6..896a0d7b22 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -185,6 +185,7 @@ static const TypeInfo xilinx_pcie_host_info = { .instance_init = xilinx_pcie_host_init, .class_init = xilinx_pcie_host_class_init, }; +TYPE_INFO(xilinx_pcie_host_info) static uint32_t xilinx_pcie_root_config_read(PCIDevice *d, uint32_t address, int len) @@ -321,11 +322,6 @@ static const TypeInfo xilinx_pcie_root_info = { { } }, }; +TYPE_INFO(xilinx_pcie_root_info) -static void xilinx_pcie_register(void) -{ - type_register_static(&xilinx_pcie_root_info); - type_register_static(&xilinx_pcie_host_info); -} -type_init(xilinx_pcie_register) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index de0fae10ab..938a307b86 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -191,16 +191,19 @@ static const TypeInfo pci_bus_info = { .class_size = sizeof(PCIBusClass), .class_init = pci_bus_class_init, }; +TYPE_INFO(pci_bus_info) static const TypeInfo pcie_interface_info = { .name = INTERFACE_PCIE_DEVICE, .parent = TYPE_INTERFACE, }; +TYPE_INFO(pcie_interface_info) static const TypeInfo conventional_pci_interface_info = { .name = INTERFACE_CONVENTIONAL_PCI_DEVICE, .parent = TYPE_INTERFACE, }; +TYPE_INFO(conventional_pci_interface_info) static void pcie_bus_class_init(ObjectClass *klass, void *data) { @@ -214,6 +217,7 @@ static const TypeInfo pcie_bus_info = { .parent = TYPE_PCI_BUS, .class_init = pcie_bus_class_init, }; +TYPE_INFO(pcie_bus_info) static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num); static void pci_update_mappings(PCIDevice *d); @@ -2824,14 +2828,6 @@ static const TypeInfo pci_device_type_info = { .class_init = pci_device_class_init, .class_base_init = pci_device_class_base_init, }; +TYPE_INFO(pci_device_type_info) -static void pci_register_types(void) -{ - type_register_static(&pci_bus_info); - type_register_static(&pcie_bus_info); - type_register_static(&conventional_pci_interface_info); - type_register_static(&pcie_interface_info); - type_register_static(&pci_device_type_info); -} -type_init(pci_register_types) diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 3789c17edc..622779a55c 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -473,10 +473,6 @@ static const TypeInfo pci_bridge_type_info = { .instance_size = sizeof(PCIBridge), .abstract = true, }; +TYPE_INFO(pci_bridge_type_info) -static void pci_bridge_register_types(void) -{ - type_register_static(&pci_bridge_type_info); -} -type_init(pci_bridge_register_types) diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index 8ca5fadcbd..9348314164 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -240,10 +240,6 @@ static const TypeInfo pci_host_type_info = { .instance_size = sizeof(PCIHostState), .class_init = pci_host_class_init, }; +TYPE_INFO(pci_host_type_info) -static void pci_host_register_types(void) -{ - type_register_static(&pci_host_type_info); -} -type_init(pci_host_register_types) diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c index 3534006f99..5f0136694b 100644 --- a/hw/pci/pcie_host.c +++ b/hw/pci/pcie_host.c @@ -128,10 +128,6 @@ static const TypeInfo pcie_host_type_info = { .instance_size = sizeof(PCIExpressHost), .instance_init = pcie_host_init, }; +TYPE_INFO(pcie_host_type_info) -static void pcie_host_register_types(void) -{ - type_register_static(&pcie_host_type_info); -} -type_init(pcie_host_register_types) diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c index eb563ad435..dee5065217 100644 --- a/hw/pci/pcie_port.c +++ b/hw/pci/pcie_port.c @@ -143,6 +143,7 @@ static const TypeInfo pcie_port_type_info = { .abstract = true, .class_init = pcie_port_class_init, }; +TYPE_INFO(pcie_port_type_info) static Property pcie_slot_props[] = { DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0), @@ -174,11 +175,6 @@ static const TypeInfo pcie_slot_type_info = { { } } }; +TYPE_INFO(pcie_slot_type_info) -static void pcie_port_register_types(void) -{ - type_register_static(&pcie_port_type_info); - type_register_static(&pcie_slot_type_info); -} -type_init(pcie_port_register_types) diff --git a/hw/pcmcia/pcmcia.c b/hw/pcmcia/pcmcia.c index 03d13e7d67..c53a1ab47e 100644 --- a/hw/pcmcia/pcmcia.c +++ b/hw/pcmcia/pcmcia.c @@ -15,10 +15,6 @@ static const TypeInfo pcmcia_card_type_info = { .abstract = true, .class_size = sizeof(PCMCIACardClass), }; +TYPE_INFO(pcmcia_card_type_info) -static void pcmcia_register_types(void) -{ - type_register_static(&pcmcia_card_type_info); -} -type_init(pcmcia_register_types) diff --git a/hw/pcmcia/pxa2xx.c b/hw/pcmcia/pxa2xx.c index fcca7e571b..a755ae9116 100644 --- a/hw/pcmcia/pxa2xx.c +++ b/hw/pcmcia/pxa2xx.c @@ -254,10 +254,6 @@ static const TypeInfo pxa2xx_pcmcia_type_info = { .instance_size = sizeof(PXA2xxPCMCIAState), .instance_init = pxa2xx_pcmcia_initfn, }; +TYPE_INFO(pxa2xx_pcmcia_type_info) -static void pxa2xx_pcmcia_register_types(void) -{ - type_register_static(&pxa2xx_pcmcia_type_info); -} -type_init(pxa2xx_pcmcia_register_types) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index ab9884e315..2ddc55e5c5 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -1147,6 +1147,7 @@ static const TypeInfo e500_ccsr_info = { .instance_size = sizeof(PPCE500CCSRState), .instance_init = e500_ccsr_initfn, }; +TYPE_INFO(e500_ccsr_info) static const TypeInfo ppce500_info = { .name = TYPE_PPCE500_MACHINE, @@ -1155,11 +1156,6 @@ static const TypeInfo ppce500_info = { .instance_size = sizeof(PPCE500MachineState), .class_size = sizeof(PPCE500MachineClass), }; +TYPE_INFO(ppce500_info) -static void e500_register_types(void) -{ - type_register_static(&e500_ccsr_info); - type_register_static(&ppce500_info); -} -type_init(e500_register_types) diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c index bddd5e7c48..711c2f04eb 100644 --- a/hw/ppc/e500plat.c +++ b/hw/ppc/e500plat.c @@ -110,9 +110,5 @@ static const TypeInfo e500plat_info = { { } } }; +TYPE_INFO(e500plat_info) -static void e500plat_register_types(void) -{ - type_register_static(&e500plat_info); -} -type_init(e500plat_register_types) diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index e42bd7a626..0ce36a743f 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -645,10 +645,6 @@ static const TypeInfo core99_machine_info = { { } }, }; +TYPE_INFO(core99_machine_info) -static void mac_machine_register_types(void) -{ - type_register_static(&core99_machine_info); -} -type_init(mac_machine_register_types) diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 7aba040f1b..55e17988ca 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -454,10 +454,6 @@ static const TypeInfo ppc_heathrow_machine_info = { { } }, }; +TYPE_INFO(ppc_heathrow_machine_info) -static void ppc_heathrow_register_types(void) -{ - type_register_static(&ppc_heathrow_machine_info); -} -type_init(ppc_heathrow_register_types); diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c index b96ea36f98..3a2a6f5f5d 100644 --- a/hw/ppc/mpc8544_guts.c +++ b/hw/ppc/mpc8544_guts.c @@ -133,10 +133,6 @@ static const TypeInfo mpc8544_guts_info = { .instance_size = sizeof(GutsState), .instance_init = mpc8544_guts_initfn, }; +TYPE_INFO(mpc8544_guts_info) -static void mpc8544_guts_register_types(void) -{ - type_register_static(&mpc8544_guts_info); -} -type_init(mpc8544_guts_register_types) diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c index 81177505f0..c9a0d0069d 100644 --- a/hw/ppc/mpc8544ds.c +++ b/hw/ppc/mpc8544ds.c @@ -65,10 +65,6 @@ static const TypeInfo mpc8544ds_info = { .parent = TYPE_PPCE500_MACHINE, .class_init = e500plat_machine_class_init, }; +TYPE_INFO(mpc8544ds_info) -static void mpc8544ds_register_types(void) -{ - type_register_static(&mpc8544ds_info); -} -type_init(mpc8544ds_register_types) diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 4724ddf96c..06fbe76c5c 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -431,10 +431,6 @@ static const TypeInfo pnv_quad_info = { .instance_size = sizeof(PnvQuad), .class_init = pnv_quad_class_init, }; +TYPE_INFO(pnv_quad_info) -static void pnv_core_register_types(void) -{ - type_register_static(&pnv_quad_info); -} -type_init(pnv_core_register_types) diff --git a/hw/ppc/pnv_homer.c b/hw/ppc/pnv_homer.c index 9a262629b7..08d2d36722 100644 --- a/hw/ppc/pnv_homer.c +++ b/hw/ppc/pnv_homer.c @@ -188,6 +188,7 @@ static const TypeInfo pnv_homer_power8_type_info = { .instance_size = sizeof(PnvHomer), .class_init = pnv_homer_power8_class_init, }; +TYPE_INFO(pnv_homer_power8_type_info) /* P9 Pstate table */ @@ -331,6 +332,7 @@ static const TypeInfo pnv_homer_power9_type_info = { .instance_size = sizeof(PnvHomer), .class_init = pnv_homer_power9_class_init, }; +TYPE_INFO(pnv_homer_power9_type_info) static void pnv_homer_realize(DeviceState *dev, Error **errp) { @@ -371,12 +373,6 @@ static const TypeInfo pnv_homer_type_info = { .class_size = sizeof(PnvHomerClass), .abstract = true, }; +TYPE_INFO(pnv_homer_type_info) -static void pnv_homer_register_types(void) -{ - type_register_static(&pnv_homer_type_info); - type_register_static(&pnv_homer_power8_type_info); - type_register_static(&pnv_homer_power9_type_info); -} -type_init(pnv_homer_register_types); diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index b5ffa48dac..d6fe6d1d25 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -653,6 +653,7 @@ static const TypeInfo pnv_lpc_power8_info = { { } } }; +TYPE_INFO(pnv_lpc_power8_info) static void pnv_lpc_power9_realize(DeviceState *dev, Error **errp) { @@ -690,6 +691,7 @@ static const TypeInfo pnv_lpc_power9_info = { .instance_size = sizeof(PnvLpcController), .class_init = pnv_lpc_power9_class_init, }; +TYPE_INFO(pnv_lpc_power9_info) static void pnv_lpc_power10_class_init(ObjectClass *klass, void *data) { @@ -703,6 +705,7 @@ static const TypeInfo pnv_lpc_power10_info = { .parent = TYPE_PNV9_LPC, .class_init = pnv_lpc_power10_class_init, }; +TYPE_INFO(pnv_lpc_power10_info) static void pnv_lpc_realize(DeviceState *dev, Error **errp) { @@ -772,16 +775,9 @@ static const TypeInfo pnv_lpc_info = { .class_size = sizeof(PnvLpcClass), .abstract = true, }; +TYPE_INFO(pnv_lpc_info) -static void pnv_lpc_register_types(void) -{ - type_register_static(&pnv_lpc_info); - type_register_static(&pnv_lpc_power8_info); - type_register_static(&pnv_lpc_power9_info); - type_register_static(&pnv_lpc_power10_info); -} -type_init(pnv_lpc_register_types) /* If we don't use the built-in LPC interrupt deserializer, we need * to provide a set of qirqs for the ISA bus or things will go bad. diff --git a/hw/ppc/pnv_occ.c b/hw/ppc/pnv_occ.c index 5a716c256e..9fde6cde7d 100644 --- a/hw/ppc/pnv_occ.c +++ b/hw/ppc/pnv_occ.c @@ -177,6 +177,7 @@ static const TypeInfo pnv_occ_power8_type_info = { .instance_size = sizeof(PnvOCC), .class_init = pnv_occ_power8_class_init, }; +TYPE_INFO(pnv_occ_power8_type_info) #define P9_OCB_OCI_OCCMISC 0x6080 #define P9_OCB_OCI_OCCMISC_CLEAR 0x6081 @@ -248,6 +249,7 @@ static const TypeInfo pnv_occ_power9_type_info = { .instance_size = sizeof(PnvOCC), .class_init = pnv_occ_power9_class_init, }; +TYPE_INFO(pnv_occ_power9_type_info) static void pnv_occ_realize(DeviceState *dev, Error **errp) { @@ -291,12 +293,6 @@ static const TypeInfo pnv_occ_type_info = { .class_size = sizeof(PnvOCCClass), .abstract = true, }; +TYPE_INFO(pnv_occ_type_info) -static void pnv_occ_register_types(void) -{ - type_register_static(&pnv_occ_type_info); - type_register_static(&pnv_occ_power8_type_info); - type_register_static(&pnv_occ_power9_type_info); -} -type_init(pnv_occ_register_types); diff --git a/hw/ppc/pnv_pnor.c b/hw/ppc/pnv_pnor.c index c365ee58b8..ab549a50ad 100644 --- a/hw/ppc/pnv_pnor.c +++ b/hw/ppc/pnv_pnor.c @@ -132,10 +132,6 @@ static const TypeInfo pnv_pnor_info = { .instance_size = sizeof(PnvPnor), .class_init = pnv_pnor_class_init, }; +TYPE_INFO(pnv_pnor_info) -static void pnv_pnor_register_types(void) -{ - type_register_static(&pnv_pnor_info); -} -type_init(pnv_pnor_register_types) diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 6a479cac53..80e5d5b7b1 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -589,6 +589,7 @@ static const TypeInfo pnv_psi_power8_info = { .instance_init = pnv_psi_power8_instance_init, .class_init = pnv_psi_power8_class_init, }; +TYPE_INFO(pnv_psi_power8_info) /* Common registers */ @@ -898,6 +899,7 @@ static const TypeInfo pnv_psi_power9_info = { { }, }, }; +TYPE_INFO(pnv_psi_power9_info) static void pnv_psi_power10_class_init(ObjectClass *klass, void *data) { @@ -918,6 +920,7 @@ static const TypeInfo pnv_psi_power10_info = { .parent = TYPE_PNV9_PSI, .class_init = pnv_psi_power10_class_init, }; +TYPE_INFO(pnv_psi_power10_info) static void pnv_psi_class_init(ObjectClass *klass, void *data) { @@ -944,16 +947,9 @@ static const TypeInfo pnv_psi_info = { { } } }; +TYPE_INFO(pnv_psi_info) -static void pnv_psi_register_types(void) -{ - type_register_static(&pnv_psi_info); - type_register_static(&pnv_psi_power8_info); - type_register_static(&pnv_psi_power9_info); - type_register_static(&pnv_psi_power10_info); -} -type_init(pnv_psi_register_types); void pnv_psi_pic_print_info(Pnv9Psi *psi9, Monitor *mon) { diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index b681c72575..74f1e042c6 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -240,13 +240,9 @@ static const TypeInfo pnv_xscom_interface_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(PnvXScomInterfaceClass), }; +TYPE_INFO(pnv_xscom_interface_info) -static void pnv_xscom_register_types(void) -{ - type_register_static(&pnv_xscom_interface_info); -} -type_init(pnv_xscom_register_types) typedef struct ForeachPopulateArgs { void *fdt; diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index 6198ec1035..d86f8c5f11 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -319,6 +319,7 @@ static const TypeInfo ref405ep_type = { .parent = TYPE_MACHINE, .class_init = ref405ep_class_init, }; +TYPE_INFO(ref405ep_type) /*****************************************************************************/ /* AMCC Taihu evaluation board */ @@ -550,11 +551,6 @@ static const TypeInfo taihu_type = { .parent = TYPE_MACHINE, .class_init = taihu_class_init, }; +TYPE_INFO(taihu_type) -static void ppc405_machine_init(void) -{ - type_register_static(&ref405ep_type); - type_register_static(&taihu_type); -} -type_init(ppc405_machine_init) diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c index 2ee2d4f4fc..37feaa2f06 100644 --- a/hw/ppc/ppc440_pcix.c +++ b/hw/ppc/ppc440_pcix.c @@ -516,10 +516,6 @@ static const TypeInfo ppc440_pcix_info = { .instance_size = sizeof(PPC440PCIXState), .class_init = ppc440_pcix_class_init, }; +TYPE_INFO(ppc440_pcix_info) -static void ppc440_pcix_register_types(void) -{ - type_register_static(&ppc440_pcix_info); -} -type_init(ppc440_pcix_register_types) diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 38fc392438..c1167aa6da 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -1305,13 +1305,9 @@ static const TypeInfo ppc460ex_pcie_host_info = { .instance_size = sizeof(PPC460EXPCIEState), .class_init = ppc460ex_pcie_class_init, }; +TYPE_INFO(ppc460ex_pcie_host_info) -static void ppc460ex_pcie_register(void) -{ - type_register_static(&ppc460ex_pcie_host_info); -} -type_init(ppc460ex_pcie_register) static void ppc460ex_pcie_register_dcrs(PPC460EXPCIEState *s, CPUPPCState *env) { diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c index 3ea47df71f..b22df26c70 100644 --- a/hw/ppc/ppc4xx_pci.c +++ b/hw/ppc/ppc4xx_pci.c @@ -366,6 +366,7 @@ static const TypeInfo ppc4xx_host_bridge_info = { { }, }, }; +TYPE_INFO(ppc4xx_host_bridge_info) static void ppc4xx_pcihost_class_init(ObjectClass *klass, void *data) { @@ -381,11 +382,6 @@ static const TypeInfo ppc4xx_pcihost_info = { .instance_size = sizeof(PPC4xxPCIState), .class_init = ppc4xx_pcihost_class_init, }; +TYPE_INFO(ppc4xx_pcihost_info) -static void ppc4xx_pci_register_types(void) -{ - type_register_static(&ppc4xx_pcihost_info); - type_register_static(&ppc4xx_host_bridge_info); -} -type_init(ppc4xx_pci_register_types) diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c index 66c1065db2..a5d13ec583 100644 --- a/hw/ppc/ppce500_spin.c +++ b/hw/ppc/ppce500_spin.c @@ -199,10 +199,6 @@ static const TypeInfo ppce500_spin_info = { .instance_init = ppce500_spin_initfn, .class_init = ppce500_spin_class_init, }; +TYPE_INFO(ppce500_spin_info) -static void ppce500_spin_register_types(void) -{ - type_register_static(&ppce500_spin_info); -} -type_init(ppce500_spin_register_types) diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c index bbc51b6e9a..c326518509 100644 --- a/hw/ppc/prep_systemio.c +++ b/hw/ppc/prep_systemio.c @@ -298,10 +298,6 @@ static TypeInfo prep_systemio800_info = { .instance_size = sizeof(PrepSystemIoState), .class_init = prep_systemio_class_initfn, }; +TYPE_INFO(prep_systemio800_info) -static void prep_systemio_register_types(void) -{ - type_register_static(&prep_systemio800_info); -} -type_init(prep_systemio_register_types) diff --git a/hw/ppc/rs6000_mc.c b/hw/ppc/rs6000_mc.c index ce97365f5e..a5c32c8ed5 100644 --- a/hw/ppc/rs6000_mc.c +++ b/hw/ppc/rs6000_mc.c @@ -230,10 +230,6 @@ static const TypeInfo rs6000mc_info = { .instance_size = sizeof(RS6000MCState), .class_init = rs6000mc_class_initfn, }; +TYPE_INFO(rs6000mc_info) -static void rs6000mc_types(void) -{ - type_register_static(&rs6000mc_info); -} -type_init(rs6000mc_types) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 0ae293ec94..0b5439902f 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -4551,6 +4551,7 @@ static const TypeInfo spapr_machine_info = { { } }, }; +TYPE_INFO(spapr_machine_info) static void spapr_machine_latest_class_options(MachineClass *mc) { @@ -4988,9 +4989,4 @@ static void spapr_machine_2_1_class_options(MachineClass *mc) } DEFINE_SPAPR_MACHINE(2_1, "2.1", false); -static void spapr_machine_register_types(void) -{ - type_register_static(&spapr_machine_info); -} -type_init(spapr_machine_register_types) diff --git a/hw/ppc/spapr_drc.c b/hw/ppc/spapr_drc.c index fe998d8108..2c058a1eb2 100644 --- a/hw/ppc/spapr_drc.c +++ b/hw/ppc/spapr_drc.c @@ -742,6 +742,7 @@ static const TypeInfo spapr_dr_connector_info = { .class_init = spapr_dr_connector_class_init, .abstract = true, }; +TYPE_INFO(spapr_dr_connector_info) static const TypeInfo spapr_drc_physical_info = { .name = TYPE_SPAPR_DRC_PHYSICAL, @@ -750,6 +751,7 @@ static const TypeInfo spapr_drc_physical_info = { .class_init = spapr_drc_physical_class_init, .abstract = true, }; +TYPE_INFO(spapr_drc_physical_info) static const TypeInfo spapr_drc_logical_info = { .name = TYPE_SPAPR_DRC_LOGICAL, @@ -757,24 +759,28 @@ static const TypeInfo spapr_drc_logical_info = { .class_init = spapr_drc_logical_class_init, .abstract = true, }; +TYPE_INFO(spapr_drc_logical_info) static const TypeInfo spapr_drc_cpu_info = { .name = TYPE_SPAPR_DRC_CPU, .parent = TYPE_SPAPR_DRC_LOGICAL, .class_init = spapr_drc_cpu_class_init, }; +TYPE_INFO(spapr_drc_cpu_info) static const TypeInfo spapr_drc_pci_info = { .name = TYPE_SPAPR_DRC_PCI, .parent = TYPE_SPAPR_DRC_PHYSICAL, .class_init = spapr_drc_pci_class_init, }; +TYPE_INFO(spapr_drc_pci_info) static const TypeInfo spapr_drc_lmb_info = { .name = TYPE_SPAPR_DRC_LMB, .parent = TYPE_SPAPR_DRC_LOGICAL, .class_init = spapr_drc_lmb_class_init, }; +TYPE_INFO(spapr_drc_lmb_info) static const TypeInfo spapr_drc_phb_info = { .name = TYPE_SPAPR_DRC_PHB, @@ -782,12 +788,14 @@ static const TypeInfo spapr_drc_phb_info = { .instance_size = sizeof(SpaprDrc), .class_init = spapr_drc_phb_class_init, }; +TYPE_INFO(spapr_drc_phb_info) static const TypeInfo spapr_drc_pmem_info = { .name = TYPE_SPAPR_DRC_PMEM, .parent = TYPE_SPAPR_DRC_LOGICAL, .class_init = spapr_drc_pmem_class_init, }; +TYPE_INFO(spapr_drc_pmem_info) /* helper functions for external users */ @@ -1252,14 +1260,6 @@ out: static void spapr_drc_register_types(void) { - type_register_static(&spapr_dr_connector_info); - type_register_static(&spapr_drc_physical_info); - type_register_static(&spapr_drc_logical_info); - type_register_static(&spapr_drc_cpu_info); - type_register_static(&spapr_drc_pci_info); - type_register_static(&spapr_drc_lmb_info); - type_register_static(&spapr_drc_phb_info); - type_register_static(&spapr_drc_pmem_info); spapr_rtas_register(RTAS_SET_INDICATOR, "set-indicator", rtas_set_indicator); diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index 0fecabc135..eb21773d69 100644 --- a/hw/ppc/spapr_iommu.c +++ b/hw/ppc/spapr_iommu.c @@ -686,6 +686,7 @@ static TypeInfo spapr_tce_table_info = { .instance_size = sizeof(SpaprTceTable), .class_init = spapr_tce_table_class_init, }; +TYPE_INFO(spapr_tce_table_info) static void spapr_iommu_memory_region_class_init(ObjectClass *klass, void *data) { @@ -703,11 +704,6 @@ static const TypeInfo spapr_iommu_memory_region_info = { .name = TYPE_SPAPR_IOMMU_MEMORY_REGION, .class_init = spapr_iommu_memory_region_class_init, }; +TYPE_INFO(spapr_iommu_memory_region_info) -static void register_types(void) -{ - type_register_static(&spapr_tce_table_info); - type_register_static(&spapr_iommu_memory_region_info); -} -type_init(register_types); diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 2f8f7d62f8..e6066b39c0 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -28,6 +28,7 @@ static const TypeInfo spapr_intc_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(SpaprInterruptControllerClass), }; +TYPE_INFO(spapr_intc_info) static void spapr_irq_msi_init(SpaprMachineState *spapr) { @@ -585,9 +586,4 @@ SpaprIrq spapr_irq_xics_legacy = { .xive = false, }; -static void spapr_irq_register_types(void) -{ - type_register_static(&spapr_intc_info); -} -type_init(spapr_irq_register_types) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 363cdb3f7b..7ae68dbf10 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -2243,6 +2243,7 @@ static const TypeInfo spapr_phb_info = { { } } }; +TYPE_INFO(spapr_phb_info) static void spapr_phb_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev, void *opaque) @@ -2459,12 +2460,7 @@ void spapr_pci_rtas_init(void) rtas_ibm_slot_error_detail); } -static void spapr_pci_register_types(void) -{ - type_register_static(&spapr_phb_info); -} -type_init(spapr_pci_register_types) static int spapr_switch_one_vga(DeviceState *dev, void *opaque) { diff --git a/hw/ppc/spapr_rng.c b/hw/ppc/spapr_rng.c index 85bf64d68e..f25a10d26a 100644 --- a/hw/ppc/spapr_rng.c +++ b/hw/ppc/spapr_rng.c @@ -156,9 +156,5 @@ static const TypeInfo spapr_rng_info = { .instance_init = spapr_rng_instance_init, .class_init = spapr_rng_class_init, }; +TYPE_INFO(spapr_rng_info) -static void spapr_rng_register_type(void) -{ - type_register_static(&spapr_rng_info); -} -type_init(spapr_rng_register_type) diff --git a/hw/ppc/spapr_rtc.c b/hw/ppc/spapr_rtc.c index 68cfc578a3..4761bc4c76 100644 --- a/hw/ppc/spapr_rtc.c +++ b/hw/ppc/spapr_rtc.c @@ -183,9 +183,5 @@ static const TypeInfo spapr_rtc_info = { .instance_size = sizeof(SpaprRtcState), .class_init = spapr_rtc_class_init, }; +TYPE_INFO(spapr_rtc_info) -static void spapr_rtc_register_types(void) -{ - type_register_static(&spapr_rtc_info); -} -type_init(spapr_rtc_register_types) diff --git a/hw/ppc/spapr_tpm_proxy.c b/hw/ppc/spapr_tpm_proxy.c index a01f81f9e0..a6e4d61cfb 100644 --- a/hw/ppc/spapr_tpm_proxy.c +++ b/hw/ppc/spapr_tpm_proxy.c @@ -168,10 +168,10 @@ static const TypeInfo spapr_tpm_proxy_info = { .instance_size = sizeof(SpaprTpmProxy), .class_init = spapr_tpm_proxy_class_init, }; +TYPE_INFO(spapr_tpm_proxy_info) static void spapr_tpm_proxy_register_types(void) { - type_register_static(&spapr_tpm_proxy_info); spapr_register_hypercall(SVM_H_TPM_COMM, h_tpm_comm); } diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 731080d989..387f7f196c 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -65,6 +65,7 @@ static const TypeInfo spapr_vio_bus_info = { .class_init = spapr_vio_bus_class_init, .instance_size = sizeof(SpaprVioBus), }; +TYPE_INFO(spapr_vio_bus_info) SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg) { @@ -613,6 +614,7 @@ static const TypeInfo spapr_vio_bridge_info = { .parent = TYPE_SYS_BUS_DEVICE, .class_init = spapr_vio_bridge_class_init, }; +TYPE_INFO(spapr_vio_bridge_info) const VMStateDescription vmstate_spapr_vio = { .name = "spapr_vio", @@ -649,15 +651,9 @@ static const TypeInfo spapr_vio_type_info = { .class_size = sizeof(SpaprVioDeviceClass), .class_init = vio_spapr_device_class_init, }; +TYPE_INFO(spapr_vio_type_info) -static void spapr_vio_register_types(void) -{ - type_register_static(&spapr_vio_bus_info); - type_register_static(&spapr_vio_bridge_info); - type_register_static(&spapr_vio_type_info); -} -type_init(spapr_vio_register_types) static int compare_reg(const void *p1, const void *p2) { diff --git a/hw/rdma/rdma.c b/hw/rdma/rdma.c index 7bec0d0d2c..969d21fa4d 100644 --- a/hw/rdma/rdma.c +++ b/hw/rdma/rdma.c @@ -21,10 +21,6 @@ static const TypeInfo rdma_hmp_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(RdmaProviderClass), }; +TYPE_INFO(rdma_hmp_info) -static void rdma_register_types(void) -{ - type_register_static(&rdma_hmp_info); -} -type_init(rdma_register_types) diff --git a/hw/rdma/vmw/pvrdma_main.c b/hw/rdma/vmw/pvrdma_main.c index 3254aadb6e..0f62d73f82 100644 --- a/hw/rdma/vmw/pvrdma_main.c +++ b/hw/rdma/vmw/pvrdma_main.c @@ -707,10 +707,6 @@ static const TypeInfo pvrdma_info = { { } } }; +TYPE_INFO(pvrdma_info) -static void register_types(void) -{ - type_register_static(&pvrdma_info); -} -type_init(register_types) diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 23ba3b4bfc..818764aa03 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -196,10 +196,6 @@ static const TypeInfo lowrisc_ibex_soc_type_info = { .instance_init = lowrisc_ibex_soc_init, .class_init = lowrisc_ibex_soc_class_init, }; +TYPE_INFO(lowrisc_ibex_soc_type_info) -static void lowrisc_ibex_soc_register_types(void) -{ - type_register_static(&lowrisc_ibex_soc_type_info); -} -type_init(lowrisc_ibex_soc_register_types) diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index f59fe52f0f..d2ce03c4e6 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -77,10 +77,6 @@ static const TypeInfo riscv_harts_info = { .instance_size = sizeof(RISCVHartArrayState), .class_init = riscv_harts_class_init, }; +TYPE_INFO(riscv_harts_info) -static void riscv_harts_register_types(void) -{ - type_register_static(&riscv_harts_info); -} -type_init(riscv_harts_register_types) diff --git a/hw/riscv/sifive_clint.c b/hw/riscv/sifive_clint.c index 669c21adc2..456a722de5 100644 --- a/hw/riscv/sifive_clint.c +++ b/hw/riscv/sifive_clint.c @@ -215,13 +215,9 @@ static const TypeInfo sifive_clint_info = { .instance_size = sizeof(SiFiveCLINTState), .class_init = sifive_clint_class_init, }; +TYPE_INFO(sifive_clint_info) -static void sifive_clint_register_types(void) -{ - type_register_static(&sifive_clint_info); -} -type_init(sifive_clint_register_types) /* diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 88b4524117..5750936ed1 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -161,13 +161,9 @@ static const TypeInfo sifive_e_machine_typeinfo = { .instance_init = sifive_e_machine_instance_init, .instance_size = sizeof(SiFiveEState), }; +TYPE_INFO(sifive_e_machine_typeinfo) -static void sifive_e_machine_init_register_types(void) -{ - type_register_static(&sifive_e_machine_typeinfo); -} -type_init(sifive_e_machine_init_register_types) static void sifive_e_soc_init(Object *obj) { @@ -276,10 +272,6 @@ static const TypeInfo sifive_e_soc_type_info = { .instance_init = sifive_e_soc_init, .class_init = sifive_e_soc_class_init, }; +TYPE_INFO(sifive_e_soc_type_info) -static void sifive_e_soc_register_types(void) -{ - type_register_static(&sifive_e_soc_type_info); -} -type_init(sifive_e_soc_register_types) diff --git a/hw/riscv/sifive_e_prci.c b/hw/riscv/sifive_e_prci.c index 17dfa74715..c32f469876 100644 --- a/hw/riscv/sifive_e_prci.c +++ b/hw/riscv/sifive_e_prci.c @@ -104,13 +104,9 @@ static const TypeInfo sifive_e_prci_info = { .instance_size = sizeof(SiFiveEPRCIState), .instance_init = sifive_e_prci_init, }; +TYPE_INFO(sifive_e_prci_info) -static void sifive_e_prci_register_types(void) -{ - type_register_static(&sifive_e_prci_info); -} -type_init(sifive_e_prci_register_types) /* diff --git a/hw/riscv/sifive_gpio.c b/hw/riscv/sifive_gpio.c index aac6b44cac..25a47c7531 100644 --- a/hw/riscv/sifive_gpio.c +++ b/hw/riscv/sifive_gpio.c @@ -388,10 +388,6 @@ static const TypeInfo sifive_gpio_info = { .instance_size = sizeof(SIFIVEGPIOState), .class_init = sifive_gpio_class_init }; +TYPE_INFO(sifive_gpio_info) -static void sifive_gpio_register_types(void) -{ - type_register_static(&sifive_gpio_info); -} -type_init(sifive_gpio_register_types) diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c index c20c192034..7235e13ebd 100644 --- a/hw/riscv/sifive_plic.c +++ b/hw/riscv/sifive_plic.c @@ -485,13 +485,9 @@ static const TypeInfo sifive_plic_info = { .instance_size = sizeof(SiFivePLICState), .class_init = sifive_plic_class_init, }; +TYPE_INFO(sifive_plic_info) -static void sifive_plic_register_types(void) -{ - type_register_static(&sifive_plic_info); -} -type_init(sifive_plic_register_types) /* * Create PLIC device. diff --git a/hw/riscv/sifive_test.c b/hw/riscv/sifive_test.c index 0c78fb2c93..d3c646cb69 100644 --- a/hw/riscv/sifive_test.c +++ b/hw/riscv/sifive_test.c @@ -79,13 +79,9 @@ static const TypeInfo sifive_test_info = { .instance_size = sizeof(SiFiveTestState), .instance_init = sifive_test_init, }; +TYPE_INFO(sifive_test_info) -static void sifive_test_register_types(void) -{ - type_register_static(&sifive_test_info); -} -type_init(sifive_test_register_types) /* diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 0dfbcb5160..201950933a 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -571,13 +571,9 @@ static const TypeInfo sifive_u_machine_typeinfo = { .instance_init = sifive_u_machine_instance_init, .instance_size = sizeof(SiFiveUState), }; +TYPE_INFO(sifive_u_machine_typeinfo) -static void sifive_u_machine_init_register_types(void) -{ - type_register_static(&sifive_u_machine_typeinfo); -} -type_init(sifive_u_machine_init_register_types) static void sifive_u_soc_instance_init(Object *obj) { @@ -757,10 +753,6 @@ static const TypeInfo sifive_u_soc_type_info = { .instance_init = sifive_u_soc_instance_init, .class_init = sifive_u_soc_class_init, }; +TYPE_INFO(sifive_u_soc_type_info) -static void sifive_u_soc_register_types(void) -{ - type_register_static(&sifive_u_soc_type_info); -} -type_init(sifive_u_soc_register_types) diff --git a/hw/riscv/sifive_u_otp.c b/hw/riscv/sifive_u_otp.c index f6ecbaa2ca..145f98c25d 100644 --- a/hw/riscv/sifive_u_otp.c +++ b/hw/riscv/sifive_u_otp.c @@ -182,10 +182,6 @@ static const TypeInfo sifive_u_otp_info = { .instance_size = sizeof(SiFiveUOTPState), .class_init = sifive_u_otp_class_init, }; +TYPE_INFO(sifive_u_otp_info) -static void sifive_u_otp_register_types(void) -{ - type_register_static(&sifive_u_otp_info); -} -type_init(sifive_u_otp_register_types) diff --git a/hw/riscv/sifive_u_prci.c b/hw/riscv/sifive_u_prci.c index 4fa590c064..ebddf9c568 100644 --- a/hw/riscv/sifive_u_prci.c +++ b/hw/riscv/sifive_u_prci.c @@ -160,10 +160,6 @@ static const TypeInfo sifive_u_prci_info = { .instance_size = sizeof(SiFiveUPRCIState), .class_init = sifive_u_prci_class_init, }; +TYPE_INFO(sifive_u_prci_info) -static void sifive_u_prci_register_types(void) -{ - type_register_static(&sifive_u_prci_info); -} -type_init(sifive_u_prci_register_types) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 55a907bb35..9c72ae7e25 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -630,10 +630,6 @@ static const TypeInfo virt_machine_typeinfo = { .instance_init = virt_machine_instance_init, .instance_size = sizeof(RISCVVirtState), }; +TYPE_INFO(virt_machine_typeinfo) -static void virt_machine_init_register_types(void) -{ - type_register_static(&virt_machine_typeinfo); -} -type_init(virt_machine_init_register_types) diff --git a/hw/rtc/allwinner-rtc.c b/hw/rtc/allwinner-rtc.c index 5606a51d5c..0b07c24043 100644 --- a/hw/rtc/allwinner-rtc.c +++ b/hw/rtc/allwinner-rtc.c @@ -378,6 +378,7 @@ static const TypeInfo allwinner_rtc_info = { .class_size = sizeof(AwRtcClass), .abstract = true, }; +TYPE_INFO(allwinner_rtc_info) static const TypeInfo allwinner_rtc_sun4i_info = { .name = TYPE_AW_RTC_SUN4I, @@ -385,6 +386,7 @@ static const TypeInfo allwinner_rtc_sun4i_info = { .class_init = allwinner_rtc_sun4i_class_init, .instance_init = allwinner_rtc_sun4i_init, }; +TYPE_INFO(allwinner_rtc_sun4i_info) static const TypeInfo allwinner_rtc_sun6i_info = { .name = TYPE_AW_RTC_SUN6I, @@ -392,6 +394,7 @@ static const TypeInfo allwinner_rtc_sun6i_info = { .class_init = allwinner_rtc_sun6i_class_init, .instance_init = allwinner_rtc_sun6i_init, }; +TYPE_INFO(allwinner_rtc_sun6i_info) static const TypeInfo allwinner_rtc_sun7i_info = { .name = TYPE_AW_RTC_SUN7I, @@ -399,13 +402,6 @@ static const TypeInfo allwinner_rtc_sun7i_info = { .class_init = allwinner_rtc_sun7i_class_init, .instance_init = allwinner_rtc_sun7i_init, }; +TYPE_INFO(allwinner_rtc_sun7i_info) -static void allwinner_rtc_register(void) -{ - type_register_static(&allwinner_rtc_info); - type_register_static(&allwinner_rtc_sun4i_info); - type_register_static(&allwinner_rtc_sun6i_info); - type_register_static(&allwinner_rtc_sun7i_info); -} -type_init(allwinner_rtc_register) diff --git a/hw/rtc/aspeed_rtc.c b/hw/rtc/aspeed_rtc.c index 3ca1183558..e9d217d66b 100644 --- a/hw/rtc/aspeed_rtc.c +++ b/hw/rtc/aspeed_rtc.c @@ -172,10 +172,6 @@ static const TypeInfo aspeed_rtc_info = { .instance_size = sizeof(AspeedRtcState), .class_init = aspeed_rtc_class_init, }; +TYPE_INFO(aspeed_rtc_info) -static void aspeed_rtc_register_types(void) -{ - type_register_static(&aspeed_rtc_info); -} -type_init(aspeed_rtc_register_types) diff --git a/hw/rtc/ds1338.c b/hw/rtc/ds1338.c index 588a9ba9be..985d07f8f1 100644 --- a/hw/rtc/ds1338.c +++ b/hw/rtc/ds1338.c @@ -232,10 +232,6 @@ static const TypeInfo ds1338_info = { .instance_size = sizeof(DS1338State), .class_init = ds1338_class_init, }; +TYPE_INFO(ds1338_info) -static void ds1338_register_types(void) -{ - type_register_static(&ds1338_info); -} -type_init(ds1338_register_types) diff --git a/hw/rtc/exynos4210_rtc.c b/hw/rtc/exynos4210_rtc.c index f85483a07f..375f682f5d 100644 --- a/hw/rtc/exynos4210_rtc.c +++ b/hw/rtc/exynos4210_rtc.c @@ -599,10 +599,6 @@ static const TypeInfo exynos4210_rtc_info = { .instance_init = exynos4210_rtc_init, .class_init = exynos4210_rtc_class_init, }; +TYPE_INFO(exynos4210_rtc_info) -static void exynos4210_rtc_register_types(void) -{ - type_register_static(&exynos4210_rtc_info); -} -type_init(exynos4210_rtc_register_types) diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c index 6ddd45cce0..1473761de1 100644 --- a/hw/rtc/goldfish_rtc.c +++ b/hw/rtc/goldfish_rtc.c @@ -287,10 +287,6 @@ static const TypeInfo goldfish_rtc_info = { .instance_size = sizeof(GoldfishRTCState), .class_init = goldfish_rtc_class_init, }; +TYPE_INFO(goldfish_rtc_info) -static void goldfish_rtc_register_types(void) -{ - type_register_static(&goldfish_rtc_info); -} -type_init(goldfish_rtc_register_types) diff --git a/hw/rtc/m41t80.c b/hw/rtc/m41t80.c index 914ecac8f4..8b44b70eba 100644 --- a/hw/rtc/m41t80.c +++ b/hw/rtc/m41t80.c @@ -110,10 +110,6 @@ static const TypeInfo m41t80_info = { .instance_size = sizeof(M41t80State), .class_init = m41t80_class_init, }; +TYPE_INFO(m41t80_info) -static void m41t80_register_types(void) -{ - type_register_static(&m41t80_info); -} -type_init(m41t80_register_types) diff --git a/hw/rtc/m48t59-isa.c b/hw/rtc/m48t59-isa.c index 50430b7a85..6e72e132e4 100644 --- a/hw/rtc/m48t59-isa.c +++ b/hw/rtc/m48t59-isa.c @@ -165,6 +165,7 @@ static const TypeInfo m48txx_isa_type_info = { { } } }; +TYPE_INFO(m48txx_isa_type_info) static void m48t59_isa_register_types(void) { @@ -175,7 +176,6 @@ static void m48t59_isa_register_types(void) }; int i; - type_register_static(&m48txx_isa_type_info); for (i = 0; i < ARRAY_SIZE(m48txx_isa_info); i++) { isa_type_info.name = m48txx_isa_info[i].bus_name; diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c index b428a06045..1057e225d0 100644 --- a/hw/rtc/m48t59.c +++ b/hw/rtc/m48t59.c @@ -687,6 +687,7 @@ static const TypeInfo nvram_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(NvramClass), }; +TYPE_INFO(nvram_info) static const TypeInfo m48txx_sysbus_type_info = { .name = TYPE_M48TXX_SYS_BUS, @@ -700,6 +701,7 @@ static const TypeInfo m48txx_sysbus_type_info = { { } } }; +TYPE_INFO(m48txx_sysbus_type_info) static void m48t59_register_types(void) { @@ -710,8 +712,6 @@ static void m48t59_register_types(void) }; int i; - type_register_static(&nvram_info); - type_register_static(&m48txx_sysbus_type_info); for (i = 0; i < ARRAY_SIZE(m48txx_sysbus_info); i++) { sysbus_type_info.name = m48txx_sysbus_info[i].bus_name; diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c index 7a38540cb9..336ebe03ff 100644 --- a/hw/rtc/mc146818rtc.c +++ b/hw/rtc/mc146818rtc.c @@ -1047,10 +1047,6 @@ static const TypeInfo mc146818rtc_info = { .instance_size = sizeof(RTCState), .class_init = rtc_class_initfn, }; +TYPE_INFO(mc146818rtc_info) -static void mc146818rtc_register_types(void) -{ - type_register_static(&mc146818rtc_info); -} -type_init(mc146818rtc_register_types) diff --git a/hw/rtc/pl031.c b/hw/rtc/pl031.c index ae47f09635..9c702916ee 100644 --- a/hw/rtc/pl031.c +++ b/hw/rtc/pl031.c @@ -331,10 +331,6 @@ static const TypeInfo pl031_info = { .instance_init = pl031_init, .class_init = pl031_class_init, }; +TYPE_INFO(pl031_info) -static void pl031_register_types(void) -{ - type_register_static(&pl031_info); -} -type_init(pl031_register_types) diff --git a/hw/rtc/sun4v-rtc.c b/hw/rtc/sun4v-rtc.c index 52caea8654..8e242e8416 100644 --- a/hw/rtc/sun4v-rtc.c +++ b/hw/rtc/sun4v-rtc.c @@ -87,10 +87,6 @@ static const TypeInfo sun4v_rtc_info = { .instance_size = sizeof(Sun4vRtc), .class_init = sun4v_rtc_class_init, }; +TYPE_INFO(sun4v_rtc_info) -static void sun4v_rtc_register_types(void) -{ - type_register_static(&sun4v_rtc_info); -} -type_init(sun4v_rtc_register_types) diff --git a/hw/rtc/twl92230.c b/hw/rtc/twl92230.c index d0011be89e..782d77d6fc 100644 --- a/hw/rtc/twl92230.c +++ b/hw/rtc/twl92230.c @@ -888,10 +888,6 @@ static const TypeInfo twl92230_info = { .instance_size = sizeof(MenelausState), .class_init = twl92230_class_init, }; +TYPE_INFO(twl92230_info) -static void twl92230_register_types(void) -{ - type_register_static(&twl92230_info); -} -type_init(twl92230_register_types) diff --git a/hw/rtc/xlnx-zynqmp-rtc.c b/hw/rtc/xlnx-zynqmp-rtc.c index 2bcd14d779..5d130d4d6c 100644 --- a/hw/rtc/xlnx-zynqmp-rtc.c +++ b/hw/rtc/xlnx-zynqmp-rtc.c @@ -266,10 +266,6 @@ static const TypeInfo rtc_info = { .class_init = rtc_class_init, .instance_init = rtc_init, }; +TYPE_INFO(rtc_info) -static void rtc_register_types(void) -{ - type_register_static(&rtc_info); -} -type_init(rtc_register_types) diff --git a/hw/s390x/3270-ccw.c b/hw/s390x/3270-ccw.c index 821319eee6..9acbf36920 100644 --- a/hw/s390x/3270-ccw.c +++ b/hw/s390x/3270-ccw.c @@ -170,10 +170,6 @@ static const TypeInfo emulated_ccw_3270_info = { .class_size = sizeof(EmulatedCcw3270Class), .abstract = true, }; +TYPE_INFO(emulated_ccw_3270_info) -static void emulated_ccw_register(void) -{ - type_register_static(&emulated_ccw_3270_info); -} -type_init(emulated_ccw_register) diff --git a/hw/s390x/ap-bridge.c b/hw/s390x/ap-bridge.c index 8bcf8ece9d..e6e1ff3310 100644 --- a/hw/s390x/ap-bridge.c +++ b/hw/s390x/ap-bridge.c @@ -37,6 +37,7 @@ static const TypeInfo ap_bus_info = { .instance_size = 0, .class_init = ap_bus_class_init, }; +TYPE_INFO(ap_bus_info) void s390_init_ap(void) { @@ -80,11 +81,6 @@ static const TypeInfo ap_bridge_info = { { } } }; +TYPE_INFO(ap_bridge_info) -static void ap_register(void) -{ - type_register_static(&ap_bridge_info); - type_register_static(&ap_bus_info); -} -type_init(ap_register) diff --git a/hw/s390x/ap-device.c b/hw/s390x/ap-device.c index fc0b41e937..0e82d9918c 100644 --- a/hw/s390x/ap-device.c +++ b/hw/s390x/ap-device.c @@ -28,10 +28,6 @@ static const TypeInfo ap_device_info = { .class_init = ap_class_init, .abstract = true, }; +TYPE_INFO(ap_device_info) -static void ap_device_register(void) -{ - type_register_static(&ap_device_info); -} -type_init(ap_device_register) diff --git a/hw/s390x/ccw-device.c b/hw/s390x/ccw-device.c index c9707110e9..7484c2a5ca 100644 --- a/hw/s390x/ccw-device.c +++ b/hw/s390x/ccw-device.c @@ -79,10 +79,6 @@ static const TypeInfo ccw_device_info = { .class_init = ccw_device_class_init, .abstract = true, }; +TYPE_INFO(ccw_device_info) -static void ccw_device_register(void) -{ - type_register_static(&ccw_device_info); -} -type_init(ccw_device_register) diff --git a/hw/s390x/css-bridge.c b/hw/s390x/css-bridge.c index 9d793d671e..2ebb07a181 100644 --- a/hw/s390x/css-bridge.c +++ b/hw/s390x/css-bridge.c @@ -93,6 +93,7 @@ static const TypeInfo virtual_css_bus_info = { .instance_size = sizeof(VirtualCssBus), .class_init = virtual_css_bus_class_init, }; +TYPE_INFO(virtual_css_bus_info) VirtualCssBus *virtual_css_bus_init(void) { @@ -157,11 +158,6 @@ static const TypeInfo virtual_css_bridge_info = { { } } }; +TYPE_INFO(virtual_css_bridge_info) -static void virtual_css_register(void) -{ - type_register_static(&virtual_css_bridge_info); - type_register_static(&virtual_css_bus_info); -} -type_init(virtual_css_register) diff --git a/hw/s390x/event-facility.c b/hw/s390x/event-facility.c index 645b4080c5..60b28fa720 100644 --- a/hw/s390x/event-facility.c +++ b/hw/s390x/event-facility.c @@ -333,6 +333,7 @@ static const TypeInfo sclp_events_bus_info = { .name = TYPE_SCLP_EVENTS_BUS, .parent = TYPE_BUS, }; +TYPE_INFO(sclp_events_bus_info) static void command_handler(SCLPEventFacility *ef, SCCB *sccb, uint64_t code) { @@ -483,6 +484,7 @@ static const TypeInfo sclp_event_facility_info = { .class_init = init_event_facility_class, .class_size = sizeof(SCLPEventFacilityClass), }; +TYPE_INFO(sclp_event_facility_info) static void event_realize(DeviceState *qdev, Error **errp) { @@ -514,15 +516,9 @@ static const TypeInfo sclp_event_type_info = { .class_size = sizeof(SCLPEventClass), .abstract = true, }; +TYPE_INFO(sclp_event_type_info) -static void register_types(void) -{ - type_register_static(&sclp_events_bus_info); - type_register_static(&sclp_event_facility_info); - type_register_static(&sclp_event_type_info); -} -type_init(register_types) BusState *sclp_get_event_facility_bus(void) { diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c index 3d2652d75a..89e89acd79 100644 --- a/hw/s390x/ipl.c +++ b/hw/s390x/ipl.c @@ -765,10 +765,6 @@ static const TypeInfo s390_ipl_info = { .name = TYPE_S390_IPL, .instance_size = sizeof(S390IPLState), }; +TYPE_INFO(s390_ipl_info) -static void s390_ipl_register_types(void) -{ - type_register_static(&s390_ipl_info); -} -type_init(s390_ipl_register_types) diff --git a/hw/s390x/s390-ccw.c b/hw/s390x/s390-ccw.c index b497571863..24edbfcd2f 100644 --- a/hw/s390x/s390-ccw.c +++ b/hw/s390x/s390-ccw.c @@ -194,10 +194,6 @@ static const TypeInfo s390_ccw_info = { .class_init = s390_ccw_class_init, .abstract = true, }; +TYPE_INFO(s390_ccw_info) -static void register_s390_ccw_type(void) -{ - type_register_static(&s390_ccw_info); -} -type_init(register_s390_ccw_type) diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 92146a2119..d4ca1c3c20 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -1140,12 +1140,14 @@ static const TypeInfo s390_pcihost_info = { { } } }; +TYPE_INFO(s390_pcihost_info) static const TypeInfo s390_pcibus_info = { .name = TYPE_S390_PCI_BUS, .parent = TYPE_BUS, .instance_size = sizeof(S390PCIBus), }; +TYPE_INFO(s390_pcibus_info) static uint16_t s390_pci_generate_uid(S390pciState *s) { @@ -1316,12 +1318,14 @@ static const TypeInfo s390_pci_device_info = { .instance_size = sizeof(S390PCIBusDevice), .class_init = s390_pci_device_class_init, }; +TYPE_INFO(s390_pci_device_info) static TypeInfo s390_pci_iommu_info = { .name = TYPE_S390_PCI_IOMMU, .parent = TYPE_OBJECT, .instance_size = sizeof(S390PCIIOMMU), }; +TYPE_INFO(s390_pci_iommu_info) static void s390_iommu_memory_region_class_init(ObjectClass *klass, void *data) { @@ -1336,14 +1340,6 @@ static const TypeInfo s390_iommu_memory_region_info = { .name = TYPE_S390_IOMMU_MEMORY_REGION, .class_init = s390_iommu_memory_region_class_init, }; +TYPE_INFO(s390_iommu_memory_region_info) -static void s390_pci_register_types(void) -{ - type_register_static(&s390_pcihost_info); - type_register_static(&s390_pcibus_info); - type_register_static(&s390_pci_device_info); - type_register_static(&s390_pci_iommu_info); - type_register_static(&s390_iommu_memory_region_info); -} -type_init(s390_pci_register_types) diff --git a/hw/s390x/s390-skeys-kvm.c b/hw/s390x/s390-skeys-kvm.c index 1c4d805ad8..eed05d265e 100644 --- a/hw/s390x/s390-skeys-kvm.c +++ b/hw/s390x/s390-skeys-kvm.c @@ -72,10 +72,6 @@ static const TypeInfo kvm_s390_skeys_info = { .class_init = kvm_s390_skeys_class_init, .class_size = sizeof(S390SKeysClass), }; +TYPE_INFO(kvm_s390_skeys_info) -static void kvm_s390_skeys_register_types(void) -{ - type_register_static(&kvm_s390_skeys_info); -} -type_init(kvm_s390_skeys_register_types) diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c index db2f49cb27..0ac3b29520 100644 --- a/hw/s390x/s390-skeys.c +++ b/hw/s390x/s390-skeys.c @@ -251,6 +251,7 @@ static const TypeInfo qemu_s390_skeys_info = { .class_init = qemu_s390_skeys_class_init, .class_size = sizeof(S390SKeysClass), }; +TYPE_INFO(qemu_s390_skeys_info) static void s390_storage_keys_save(QEMUFile *f, void *opaque) { @@ -421,11 +422,6 @@ static const TypeInfo s390_skeys_info = { .class_size = sizeof(S390SKeysClass), .abstract = true, }; +TYPE_INFO(s390_skeys_info) -static void qemu_s390_skeys_register_types(void) -{ - type_register_static(&s390_skeys_info); - type_register_static(&qemu_s390_skeys_info); -} -type_init(qemu_s390_skeys_register_types) diff --git a/hw/s390x/s390-stattrib-kvm.c b/hw/s390x/s390-stattrib-kvm.c index f89d8d9d16..d9eadfd8f7 100644 --- a/hw/s390x/s390-stattrib-kvm.c +++ b/hw/s390x/s390-stattrib-kvm.c @@ -187,10 +187,6 @@ static const TypeInfo kvm_s390_stattrib_info = { .class_init = kvm_s390_stattrib_class_init, .class_size = sizeof(S390StAttribClass), }; +TYPE_INFO(kvm_s390_stattrib_info) -static void kvm_s390_stattrib_register_types(void) -{ - type_register_static(&kvm_s390_stattrib_info); -} -type_init(kvm_s390_stattrib_register_types) diff --git a/hw/s390x/s390-stattrib.c b/hw/s390x/s390-stattrib.c index 4441e1d331..394072e898 100644 --- a/hw/s390x/s390-stattrib.c +++ b/hw/s390x/s390-stattrib.c @@ -330,6 +330,7 @@ static const TypeInfo qemu_s390_stattrib_info = { .class_init = qemu_s390_stattrib_class_init, .class_size = sizeof(S390StAttribClass), }; +TYPE_INFO(qemu_s390_stattrib_info) /* Generic abstract object: */ @@ -401,11 +402,6 @@ static const TypeInfo s390_stattrib_info = { .class_size = sizeof(S390StAttribClass), .abstract = true, }; +TYPE_INFO(s390_stattrib_info) -static void s390_stattrib_register_types(void) -{ - type_register_static(&s390_stattrib_info); - type_register_static(&qemu_s390_stattrib_info); -} -type_init(s390_stattrib_register_types) diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index e72c61d2ea..820d8cb279 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -765,6 +765,7 @@ static const TypeInfo ccw_machine_info = { { } }, }; +TYPE_INFO(ccw_machine_info) bool css_migration_enabled(void) { @@ -1054,9 +1055,4 @@ static void ccw_machine_2_4_class_options(MachineClass *mc) } DEFINE_CCW_MACHINE(2_4, "2.4", false); -static void ccw_machine_register_types(void) -{ - type_register_static(&ccw_machine_info); -} -type_init(ccw_machine_register_types) diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c index a0ce444b4b..35bc750d31 100644 --- a/hw/s390x/sclp.c +++ b/hw/s390x/sclp.c @@ -411,9 +411,5 @@ static TypeInfo sclp_info = { .class_init = sclp_class_init, .class_size = sizeof(SCLPDeviceClass), }; +TYPE_INFO(sclp_info) -static void register_types(void) -{ - type_register_static(&sclp_info); -} -type_init(register_types); diff --git a/hw/s390x/sclpcpu.c b/hw/s390x/sclpcpu.c index 62806d3273..dd38d7ea4f 100644 --- a/hw/s390x/sclpcpu.c +++ b/hw/s390x/sclpcpu.c @@ -98,10 +98,6 @@ static const TypeInfo sclp_cpu_info = { .class_init = cpu_class_init, .class_size = sizeof(SCLPEventClass), }; +TYPE_INFO(sclp_cpu_info) -static void sclp_cpu_register_types(void) -{ - type_register_static(&sclp_cpu_info); -} -type_init(sclp_cpu_register_types) diff --git a/hw/s390x/sclpquiesce.c b/hw/s390x/sclpquiesce.c index ce07b16884..5ec767f5bc 100644 --- a/hw/s390x/sclpquiesce.c +++ b/hw/s390x/sclpquiesce.c @@ -141,10 +141,6 @@ static const TypeInfo sclp_quiesce_info = { .class_init = quiesce_class_init, .class_size = sizeof(SCLPEventClass), }; +TYPE_INFO(sclp_quiesce_info) -static void register_types(void) -{ - type_register_static(&sclp_quiesce_info); -} -type_init(register_types) diff --git a/hw/s390x/tod-kvm.c b/hw/s390x/tod-kvm.c index 6e21d83181..ce17950f2f 100644 --- a/hw/s390x/tod-kvm.c +++ b/hw/s390x/tod-kvm.c @@ -155,9 +155,5 @@ static TypeInfo kvm_s390_tod_info = { .class_init = kvm_s390_tod_class_init, .class_size = sizeof(S390TODClass), }; +TYPE_INFO(kvm_s390_tod_info) -static void register_types(void) -{ - type_register_static(&kvm_s390_tod_info); -} -type_init(register_types); diff --git a/hw/s390x/tod-qemu.c b/hw/s390x/tod-qemu.c index e91b9590f5..bdc900be3c 100644 --- a/hw/s390x/tod-qemu.c +++ b/hw/s390x/tod-qemu.c @@ -81,9 +81,5 @@ static TypeInfo qemu_s390_tod_info = { .class_init = qemu_s390_tod_class_init, .class_size = sizeof(S390TODClass), }; +TYPE_INFO(qemu_s390_tod_info) -static void register_types(void) -{ - type_register_static(&qemu_s390_tod_info); -} -type_init(register_types); diff --git a/hw/s390x/tod.c b/hw/s390x/tod.c index 3c2979175e..7b3b0b3205 100644 --- a/hw/s390x/tod.c +++ b/hw/s390x/tod.c @@ -124,9 +124,5 @@ static TypeInfo s390_tod_info = { .class_size = sizeof(S390TODClass), .abstract = true, }; +TYPE_INFO(s390_tod_info) -static void register_types(void) -{ - type_register_static(&s390_tod_info); -} -type_init(register_types); diff --git a/hw/s390x/vhost-vsock-ccw.c b/hw/s390x/vhost-vsock-ccw.c index 0822ecca89..f30409bc19 100644 --- a/hw/s390x/vhost-vsock-ccw.c +++ b/hw/s390x/vhost-vsock-ccw.c @@ -52,10 +52,6 @@ static const TypeInfo vhost_vsock_ccw_info = { .instance_init = vhost_vsock_ccw_instance_init, .class_init = vhost_vsock_ccw_class_init, }; +TYPE_INFO(vhost_vsock_ccw_info) -static void vhost_vsock_ccw_register(void) -{ - type_register_static(&vhost_vsock_ccw_info); -} -type_init(vhost_vsock_ccw_register) diff --git a/hw/s390x/virtio-ccw-9p.c b/hw/s390x/virtio-ccw-9p.c index 88c8884fc5..dd8c451cc5 100644 --- a/hw/s390x/virtio-ccw-9p.c +++ b/hw/s390x/virtio-ccw-9p.c @@ -57,10 +57,6 @@ static const TypeInfo virtio_ccw_9p_info = { .instance_init = virtio_ccw_9p_instance_init, .class_init = virtio_ccw_9p_class_init, }; +TYPE_INFO(virtio_ccw_9p_info) -static void virtio_ccw_9p_register(void) -{ - type_register_static(&virtio_ccw_9p_info); -} -type_init(virtio_ccw_9p_register) diff --git a/hw/s390x/virtio-ccw-balloon.c b/hw/s390x/virtio-ccw-balloon.c index 4c7631a433..5e3acd91b2 100644 --- a/hw/s390x/virtio-ccw-balloon.c +++ b/hw/s390x/virtio-ccw-balloon.c @@ -62,10 +62,6 @@ static const TypeInfo virtio_ccw_balloon = { .instance_init = virtio_ccw_balloon_instance_init, .class_init = virtio_ccw_balloon_class_init, }; +TYPE_INFO(virtio_ccw_balloon) -static void virtio_ccw_balloon_register(void) -{ - type_register_static(&virtio_ccw_balloon); -} -type_init(virtio_ccw_balloon_register) diff --git a/hw/s390x/virtio-ccw-blk.c b/hw/s390x/virtio-ccw-blk.c index 2294ce1ce4..25cc528f34 100644 --- a/hw/s390x/virtio-ccw-blk.c +++ b/hw/s390x/virtio-ccw-blk.c @@ -59,10 +59,6 @@ static const TypeInfo virtio_ccw_blk = { .instance_init = virtio_ccw_blk_instance_init, .class_init = virtio_ccw_blk_class_init, }; +TYPE_INFO(virtio_ccw_blk) -static void virtio_ccw_blk_register(void) -{ - type_register_static(&virtio_ccw_blk); -} -type_init(virtio_ccw_blk_register) diff --git a/hw/s390x/virtio-ccw-crypto.c b/hw/s390x/virtio-ccw-crypto.c index 358c74fb4b..65e6ac1cf5 100644 --- a/hw/s390x/virtio-ccw-crypto.c +++ b/hw/s390x/virtio-ccw-crypto.c @@ -60,10 +60,6 @@ static const TypeInfo virtio_ccw_crypto = { .instance_init = virtio_ccw_crypto_instance_init, .class_init = virtio_ccw_crypto_class_init, }; +TYPE_INFO(virtio_ccw_crypto) -static void virtio_ccw_crypto_register(void) -{ - type_register_static(&virtio_ccw_crypto); -} -type_init(virtio_ccw_crypto_register) diff --git a/hw/s390x/virtio-ccw-gpu.c b/hw/s390x/virtio-ccw-gpu.c index c301e2586b..de63cb04e9 100644 --- a/hw/s390x/virtio-ccw-gpu.c +++ b/hw/s390x/virtio-ccw-gpu.c @@ -59,10 +59,6 @@ static const TypeInfo virtio_ccw_gpu = { .instance_init = virtio_ccw_gpu_instance_init, .class_init = virtio_ccw_gpu_class_init, }; +TYPE_INFO(virtio_ccw_gpu) -static void virtio_ccw_gpu_register(void) -{ - type_register_static(&virtio_ccw_gpu); -} -type_init(virtio_ccw_gpu_register) diff --git a/hw/s390x/virtio-ccw-input.c b/hw/s390x/virtio-ccw-input.c index 5601e25dee..42528ebd8a 100644 --- a/hw/s390x/virtio-ccw-input.c +++ b/hw/s390x/virtio-ccw-input.c @@ -78,6 +78,7 @@ static const TypeInfo virtio_ccw_input = { .class_init = virtio_ccw_input_class_init, .abstract = true, }; +TYPE_INFO(virtio_ccw_input) static const TypeInfo virtio_ccw_input_hid = { .name = TYPE_VIRTIO_INPUT_HID_CCW, @@ -85,6 +86,7 @@ static const TypeInfo virtio_ccw_input_hid = { .instance_size = sizeof(VirtIOInputHIDCcw), .abstract = true, }; +TYPE_INFO(virtio_ccw_input_hid) static const TypeInfo virtio_ccw_keyboard = { .name = TYPE_VIRTIO_KEYBOARD_CCW, @@ -92,6 +94,7 @@ static const TypeInfo virtio_ccw_keyboard = { .instance_size = sizeof(VirtIOInputHIDCcw), .instance_init = virtio_ccw_keyboard_instance_init, }; +TYPE_INFO(virtio_ccw_keyboard) static const TypeInfo virtio_ccw_mouse = { .name = TYPE_VIRTIO_MOUSE_CCW, @@ -99,6 +102,7 @@ static const TypeInfo virtio_ccw_mouse = { .instance_size = sizeof(VirtIOInputHIDCcw), .instance_init = virtio_ccw_mouse_instance_init, }; +TYPE_INFO(virtio_ccw_mouse) static const TypeInfo virtio_ccw_tablet = { .name = TYPE_VIRTIO_TABLET_CCW, @@ -106,14 +110,6 @@ static const TypeInfo virtio_ccw_tablet = { .instance_size = sizeof(VirtIOInputHIDCcw), .instance_init = virtio_ccw_tablet_instance_init, }; +TYPE_INFO(virtio_ccw_tablet) -static void virtio_ccw_input_register(void) -{ - type_register_static(&virtio_ccw_input); - type_register_static(&virtio_ccw_input_hid); - type_register_static(&virtio_ccw_keyboard); - type_register_static(&virtio_ccw_mouse); - type_register_static(&virtio_ccw_tablet); -} -type_init(virtio_ccw_input_register) diff --git a/hw/s390x/virtio-ccw-net.c b/hw/s390x/virtio-ccw-net.c index 3860d4e6ea..00bd695a9c 100644 --- a/hw/s390x/virtio-ccw-net.c +++ b/hw/s390x/virtio-ccw-net.c @@ -62,10 +62,6 @@ static const TypeInfo virtio_ccw_net = { .instance_init = virtio_ccw_net_instance_init, .class_init = virtio_ccw_net_class_init, }; +TYPE_INFO(virtio_ccw_net) -static void virtio_ccw_net_register(void) -{ - type_register_static(&virtio_ccw_net); -} -type_init(virtio_ccw_net_register) diff --git a/hw/s390x/virtio-ccw-rng.c b/hw/s390x/virtio-ccw-rng.c index 2e3a9da5e8..98cdba0d26 100644 --- a/hw/s390x/virtio-ccw-rng.c +++ b/hw/s390x/virtio-ccw-rng.c @@ -59,10 +59,6 @@ static const TypeInfo virtio_ccw_rng = { .instance_init = virtio_ccw_rng_instance_init, .class_init = virtio_ccw_rng_class_init, }; +TYPE_INFO(virtio_ccw_rng) -static void virtio_ccw_rng_register(void) -{ - type_register_static(&virtio_ccw_rng); -} -type_init(virtio_ccw_rng_register) diff --git a/hw/s390x/virtio-ccw-scsi.c b/hw/s390x/virtio-ccw-scsi.c index 6e4beef700..3ec7a35e53 100644 --- a/hw/s390x/virtio-ccw-scsi.c +++ b/hw/s390x/virtio-ccw-scsi.c @@ -69,6 +69,7 @@ static const TypeInfo virtio_ccw_scsi = { .instance_init = virtio_ccw_scsi_instance_init, .class_init = virtio_ccw_scsi_class_init, }; +TYPE_INFO(virtio_ccw_scsi) #ifdef CONFIG_VHOST_SCSI @@ -111,14 +112,13 @@ static const TypeInfo vhost_ccw_scsi = { .instance_init = vhost_ccw_scsi_instance_init, .class_init = vhost_ccw_scsi_class_init, }; +TYPE_INFO(vhost_ccw_scsi) #endif static void virtio_ccw_scsi_register(void) { - type_register_static(&virtio_ccw_scsi); #ifdef CONFIG_VHOST_SCSI - type_register_static(&vhost_ccw_scsi); #endif } diff --git a/hw/s390x/virtio-ccw-serial.c b/hw/s390x/virtio-ccw-serial.c index 61958228d1..c821eb57b3 100644 --- a/hw/s390x/virtio-ccw-serial.c +++ b/hw/s390x/virtio-ccw-serial.c @@ -70,10 +70,6 @@ static const TypeInfo virtio_ccw_serial = { .instance_init = virtio_ccw_serial_instance_init, .class_init = virtio_ccw_serial_class_init, }; +TYPE_INFO(virtio_ccw_serial) -static void virtio_ccw_serial_register(void) -{ - type_register_static(&virtio_ccw_serial); -} -type_init(virtio_ccw_serial_register) diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c index 0e60270297..666e9768ed 100644 --- a/hw/s390x/virtio-ccw.c +++ b/hw/s390x/virtio-ccw.c @@ -1199,6 +1199,7 @@ static const TypeInfo virtio_ccw_device_info = { .class_size = sizeof(VirtIOCCWDeviceClass), .abstract = true, }; +TYPE_INFO(virtio_ccw_device_info) /* virtio-ccw-bus */ @@ -1239,11 +1240,6 @@ static const TypeInfo virtio_ccw_bus_info = { .instance_size = sizeof(VirtioCcwBusState), .class_init = virtio_ccw_bus_class_init, }; +TYPE_INFO(virtio_ccw_bus_info) -static void virtio_ccw_register(void) -{ - type_register_static(&virtio_ccw_bus_info); - type_register_static(&virtio_ccw_device_info); -} -type_init(virtio_ccw_register) diff --git a/hw/scsi/esp-pci.c b/hw/scsi/esp-pci.c index 497a8d5901..0fa2e1cc45 100644 --- a/hw/scsi/esp-pci.c +++ b/hw/scsi/esp-pci.c @@ -407,6 +407,7 @@ static const TypeInfo esp_pci_info = { { }, }, }; +TYPE_INFO(esp_pci_info) typedef struct { PCIESPState pci; @@ -526,11 +527,6 @@ static const TypeInfo dc390_info = { .instance_size = sizeof(DC390State), .class_init = dc390_class_init, }; +TYPE_INFO(dc390_info) -static void esp_pci_register_types(void) -{ - type_register_static(&esp_pci_info); - type_register_static(&dc390_info); -} -type_init(esp_pci_register_types) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 405f8b7cbc..735529089d 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -997,10 +997,6 @@ static const TypeInfo sysbus_esp_info = { .instance_size = sizeof(SysBusESPState), .class_init = sysbus_esp_class_init, }; +TYPE_INFO(sysbus_esp_info) -static void esp_register_types(void) -{ - type_register_static(&sysbus_esp_info); -} -type_init(esp_register_types) diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c index 63ff4181de..4c02f32182 100644 --- a/hw/scsi/lsi53c895a.c +++ b/hw/scsi/lsi53c895a.c @@ -2345,6 +2345,7 @@ static const TypeInfo lsi_info = { { }, }, }; +TYPE_INFO(lsi_info) static void lsi53c810_class_init(ObjectClass *klass, void *data) { @@ -2358,14 +2359,9 @@ static TypeInfo lsi53c810_info = { .parent = TYPE_LSI53C895A, .class_init = lsi53c810_class_init, }; +TYPE_INFO(lsi53c810_info) -static void lsi53c895a_register_types(void) -{ - type_register_static(&lsi_info); - type_register_static(&lsi53c810_info); -} -type_init(lsi53c895a_register_types) void lsi53c8xx_handle_legacy_cmdline(DeviceState *lsi_dev) { diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index 390c2f2edb..eda0c22f03 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -2535,12 +2535,12 @@ static const TypeInfo megasas_info = { .class_size = sizeof(MegasasBaseClass), .abstract = true, }; +TYPE_INFO(megasas_info) static void megasas_register_types(void) { int i; - type_register_static(&megasas_info); for (i = 0; i < ARRAY_SIZE(megasas_devices); i++) { const MegasasInfo *info = &megasas_devices[i]; TypeInfo type_info = {}; diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c index df65cc2223..06eccf3239 100644 --- a/hw/scsi/scsi-bus.c +++ b/hw/scsi/scsi-bus.c @@ -49,6 +49,7 @@ static const TypeInfo scsi_bus_info = { { } } }; +TYPE_INFO(scsi_bus_info) static int next_scsi_bus; static void scsi_device_realize(SCSIDevice *s, Error **errp) @@ -1738,11 +1739,6 @@ static const TypeInfo scsi_device_type_info = { .class_init = scsi_device_class_init, .instance_init = scsi_dev_instance_init, }; +TYPE_INFO(scsi_device_type_info) -static void scsi_register_types(void) -{ - type_register_static(&scsi_bus_info); - type_register_static(&scsi_device_type_info); -} -type_init(scsi_register_types) diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c index 8ce68a9dd6..f0777dd4ee 100644 --- a/hw/scsi/scsi-disk.c +++ b/hw/scsi/scsi-disk.c @@ -2976,6 +2976,7 @@ static const TypeInfo scsi_disk_base_info = { .class_size = sizeof(SCSIDiskClass), .abstract = true, }; +TYPE_INFO(scsi_disk_base_info) #define DEFINE_SCSI_DISK_PROPERTIES() \ DEFINE_PROP_DRIVE_IOTHREAD("drive", SCSIDiskState, qdev.conf.blk), \ @@ -3042,6 +3043,7 @@ static const TypeInfo scsi_hd_info = { .parent = TYPE_SCSI_DISK_BASE, .class_init = scsi_hd_class_initfn, }; +TYPE_INFO(scsi_hd_info) static Property scsi_cd_properties[] = { DEFINE_SCSI_DISK_PROPERTIES(), @@ -3073,6 +3075,7 @@ static const TypeInfo scsi_cd_info = { .parent = TYPE_SCSI_DISK_BASE, .class_init = scsi_cd_class_initfn, }; +TYPE_INFO(scsi_cd_info) #ifdef __linux__ static Property scsi_block_properties[] = { @@ -3112,6 +3115,7 @@ static const TypeInfo scsi_block_info = { .parent = TYPE_SCSI_DISK_BASE, .class_init = scsi_block_class_initfn, }; +TYPE_INFO(scsi_block_info) #endif static Property scsi_disk_properties[] = { @@ -3152,16 +3156,12 @@ static const TypeInfo scsi_disk_info = { .parent = TYPE_SCSI_DISK_BASE, .class_init = scsi_disk_class_initfn, }; +TYPE_INFO(scsi_disk_info) static void scsi_disk_register_types(void) { - type_register_static(&scsi_disk_base_info); - type_register_static(&scsi_hd_info); - type_register_static(&scsi_cd_info); #ifdef __linux__ - type_register_static(&scsi_block_info); #endif - type_register_static(&scsi_disk_info); } type_init(scsi_disk_register_types) diff --git a/hw/scsi/scsi-generic.c b/hw/scsi/scsi-generic.c index 86ed0a3822..dc7ca649de 100644 --- a/hw/scsi/scsi-generic.c +++ b/hw/scsi/scsi-generic.c @@ -778,12 +778,8 @@ static const TypeInfo scsi_generic_info = { .instance_size = sizeof(SCSIDevice), .class_init = scsi_generic_class_initfn, }; +TYPE_INFO(scsi_generic_info) -static void scsi_generic_register_types(void) -{ - type_register_static(&scsi_generic_info); -} -type_init(scsi_generic_register_types) #endif /* __linux__ */ diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c index d17dc03c73..10c64396d6 100644 --- a/hw/scsi/spapr_vscsi.c +++ b/hw/scsi/spapr_vscsi.c @@ -1290,10 +1290,6 @@ static const TypeInfo spapr_vscsi_info = { .instance_size = sizeof(VSCSIState), .class_init = spapr_vscsi_class_init, }; +TYPE_INFO(spapr_vscsi_info) -static void spapr_vscsi_register_types(void) -{ - type_register_static(&spapr_vscsi_info); -} -type_init(spapr_vscsi_register_types) diff --git a/hw/scsi/vhost-scsi-common.c b/hw/scsi/vhost-scsi-common.c index 8ec49d7fef..cd025155e8 100644 --- a/hw/scsi/vhost-scsi-common.c +++ b/hw/scsi/vhost-scsi-common.c @@ -135,10 +135,6 @@ static const TypeInfo vhost_scsi_common_info = { .instance_size = sizeof(VHostSCSICommon), .abstract = true, }; +TYPE_INFO(vhost_scsi_common_info) -static void virtio_register_types(void) -{ - type_register_static(&vhost_scsi_common_info); -} -type_init(virtio_register_types) diff --git a/hw/scsi/vhost-scsi.c b/hw/scsi/vhost-scsi.c index 13b05af29b..2341e62744 100644 --- a/hw/scsi/vhost-scsi.c +++ b/hw/scsi/vhost-scsi.c @@ -323,10 +323,6 @@ static const TypeInfo vhost_scsi_info = { { } }, }; +TYPE_INFO(vhost_scsi_info) -static void virtio_register_types(void) -{ - type_register_static(&vhost_scsi_info); -} -type_init(virtio_register_types) diff --git a/hw/scsi/vhost-user-scsi.c b/hw/scsi/vhost-user-scsi.c index f2e524438a..ef8f8f05d9 100644 --- a/hw/scsi/vhost-user-scsi.c +++ b/hw/scsi/vhost-user-scsi.c @@ -230,10 +230,6 @@ static const TypeInfo vhost_user_scsi_info = { { } }, }; +TYPE_INFO(vhost_user_scsi_info) -static void virtio_register_types(void) -{ - type_register_static(&vhost_user_scsi_info); -} -type_init(virtio_register_types) diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c index b49775269e..f8af093d88 100644 --- a/hw/scsi/virtio-scsi.c +++ b/hw/scsi/virtio-scsi.c @@ -1028,6 +1028,7 @@ static const TypeInfo virtio_scsi_common_info = { .abstract = true, .class_init = virtio_scsi_common_class_init, }; +TYPE_INFO(virtio_scsi_common_info) static const TypeInfo virtio_scsi_info = { .name = TYPE_VIRTIO_SCSI, @@ -1039,11 +1040,6 @@ static const TypeInfo virtio_scsi_info = { { } } }; +TYPE_INFO(virtio_scsi_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_scsi_common_info); - type_register_static(&virtio_scsi_info); -} -type_init(virtio_register_types) diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index c071e0c7aa..796dbc14d6 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -1312,11 +1312,6 @@ static const TypeInfo pvscsi_info = { { } } }; +TYPE_INFO(pvscsi_info) -static void -pvscsi_register_types(void) -{ - type_register_static(&pvscsi_info); -} -type_init(pvscsi_register_types); diff --git a/hw/sd/allwinner-sdhost.c b/hw/sd/allwinner-sdhost.c index f404e1fdb4..980015cf94 100644 --- a/hw/sd/allwinner-sdhost.c +++ b/hw/sd/allwinner-sdhost.c @@ -823,18 +823,21 @@ static TypeInfo allwinner_sdhost_info = { .class_size = sizeof(AwSdHostClass), .abstract = true, }; +TYPE_INFO(allwinner_sdhost_info) static const TypeInfo allwinner_sdhost_sun4i_info = { .name = TYPE_AW_SDHOST_SUN4I, .parent = TYPE_AW_SDHOST, .class_init = allwinner_sdhost_sun4i_class_init, }; +TYPE_INFO(allwinner_sdhost_sun4i_info) static const TypeInfo allwinner_sdhost_sun5i_info = { .name = TYPE_AW_SDHOST_SUN5I, .parent = TYPE_AW_SDHOST, .class_init = allwinner_sdhost_sun5i_class_init, }; +TYPE_INFO(allwinner_sdhost_sun5i_info) static const TypeInfo allwinner_sdhost_bus_info = { .name = TYPE_AW_SDHOST_BUS, @@ -842,13 +845,6 @@ static const TypeInfo allwinner_sdhost_bus_info = { .instance_size = sizeof(SDBus), .class_init = allwinner_sdhost_bus_class_init, }; +TYPE_INFO(allwinner_sdhost_bus_info) -static void allwinner_sdhost_register_types(void) -{ - type_register_static(&allwinner_sdhost_info); - type_register_static(&allwinner_sdhost_sun4i_info); - type_register_static(&allwinner_sdhost_sun5i_info); - type_register_static(&allwinner_sdhost_bus_info); -} -type_init(allwinner_sdhost_register_types) diff --git a/hw/sd/aspeed_sdhci.c b/hw/sd/aspeed_sdhci.c index 22cafce0fb..fe080b9465 100644 --- a/hw/sd/aspeed_sdhci.c +++ b/hw/sd/aspeed_sdhci.c @@ -189,10 +189,6 @@ static TypeInfo aspeed_sdhci_info = { .instance_size = sizeof(AspeedSDHCIState), .class_init = aspeed_sdhci_class_init, }; +TYPE_INFO(aspeed_sdhci_info) -static void aspeed_sdhci_register_types(void) -{ - type_register_static(&aspeed_sdhci_info); -} -type_init(aspeed_sdhci_register_types) diff --git a/hw/sd/bcm2835_sdhost.c b/hw/sd/bcm2835_sdhost.c index 4a80fbcc86..ab912fc45b 100644 --- a/hw/sd/bcm2835_sdhost.c +++ b/hw/sd/bcm2835_sdhost.c @@ -441,17 +441,13 @@ static TypeInfo bcm2835_sdhost_info = { .class_init = bcm2835_sdhost_class_init, .instance_init = bcm2835_sdhost_init, }; +TYPE_INFO(bcm2835_sdhost_info) static const TypeInfo bcm2835_sdhost_bus_info = { .name = TYPE_BCM2835_SDHOST_BUS, .parent = TYPE_SD_BUS, .instance_size = sizeof(SDBus), }; +TYPE_INFO(bcm2835_sdhost_bus_info) -static void bcm2835_sdhost_register_types(void) -{ - type_register_static(&bcm2835_sdhost_info); - type_register_static(&bcm2835_sdhost_bus_info); -} -type_init(bcm2835_sdhost_register_types) diff --git a/hw/sd/core.c b/hw/sd/core.c index abec48bccb..5992760093 100644 --- a/hw/sd/core.c +++ b/hw/sd/core.c @@ -221,10 +221,6 @@ static const TypeInfo sd_bus_info = { .instance_size = sizeof(SDBus), .class_size = sizeof(SDBusClass), }; +TYPE_INFO(sd_bus_info) -static void sd_bus_register_types(void) -{ - type_register_static(&sd_bus_info); -} -type_init(sd_bus_register_types) diff --git a/hw/sd/milkymist-memcard.c b/hw/sd/milkymist-memcard.c index 11f61294fc..64a369a04b 100644 --- a/hw/sd/milkymist-memcard.c +++ b/hw/sd/milkymist-memcard.c @@ -322,10 +322,6 @@ static const TypeInfo milkymist_memcard_info = { .instance_init = milkymist_memcard_init, .class_init = milkymist_memcard_class_init, }; +TYPE_INFO(milkymist_memcard_info) -static void milkymist_memcard_register_types(void) -{ - type_register_static(&milkymist_memcard_info); -} -type_init(milkymist_memcard_register_types) diff --git a/hw/sd/pl181.c b/hw/sd/pl181.c index 2b3776a6a0..f937bb1add 100644 --- a/hw/sd/pl181.c +++ b/hw/sd/pl181.c @@ -529,10 +529,6 @@ static const TypeInfo pl181_info = { .instance_init = pl181_init, .class_init = pl181_class_init, }; +TYPE_INFO(pl181_info) -static void pl181_register_types(void) -{ - type_register_static(&pl181_info); -} -type_init(pl181_register_types) diff --git a/hw/sd/pxa2xx_mmci.c b/hw/sd/pxa2xx_mmci.c index c400197815..e8c6008488 100644 --- a/hw/sd/pxa2xx_mmci.c +++ b/hw/sd/pxa2xx_mmci.c @@ -593,6 +593,7 @@ static const TypeInfo pxa2xx_mmci_info = { .instance_init = pxa2xx_mmci_instance_init, .class_init = pxa2xx_mmci_class_init, }; +TYPE_INFO(pxa2xx_mmci_info) static const TypeInfo pxa2xx_mmci_bus_info = { .name = TYPE_PXA2XX_MMCI_BUS, @@ -600,11 +601,6 @@ static const TypeInfo pxa2xx_mmci_bus_info = { .instance_size = sizeof(SDBus), .class_init = pxa2xx_mmci_bus_class_init, }; +TYPE_INFO(pxa2xx_mmci_bus_info) -static void pxa2xx_mmci_register_types(void) -{ - type_register_static(&pxa2xx_mmci_info); - type_register_static(&pxa2xx_mmci_bus_info); -} -type_init(pxa2xx_mmci_register_types) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index fad9cf1ee7..0b17afa46d 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -2208,10 +2208,6 @@ static const TypeInfo sd_info = { .instance_init = sd_instance_init, .instance_finalize = sd_instance_finalize, }; +TYPE_INFO(sd_info) -static void sd_register_types(void) -{ - type_register_static(&sd_info); -} -type_init(sd_register_types) diff --git a/hw/sd/sdhci-pci.c b/hw/sd/sdhci-pci.c index c737c8b930..5d6f7ce25f 100644 --- a/hw/sd/sdhci-pci.c +++ b/hw/sd/sdhci-pci.c @@ -78,10 +78,6 @@ static const TypeInfo sdhci_pci_info = { { }, }, }; +TYPE_INFO(sdhci_pci_info) -static void sdhci_pci_register_type(void) -{ - type_register_static(&sdhci_pci_info); -} -type_init(sdhci_pci_register_type) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index deac181865..7902b8c12d 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1506,6 +1506,7 @@ static const TypeInfo sdhci_sysbus_info = { .instance_finalize = sdhci_sysbus_finalize, .class_init = sdhci_sysbus_class_init, }; +TYPE_INFO(sdhci_sysbus_info) /* --- qdev bus master --- */ @@ -1523,6 +1524,7 @@ static const TypeInfo sdhci_bus_info = { .instance_size = sizeof(SDBus), .class_init = sdhci_bus_class_init, }; +TYPE_INFO(sdhci_bus_info) /* --- qdev i.MX eSDHC --- */ @@ -1768,6 +1770,7 @@ static const TypeInfo imx_usdhc_info = { .parent = TYPE_SYSBUS_SDHCI, .instance_init = imx_usdhc_init, }; +TYPE_INFO(imx_usdhc_info) /* --- qdev Samsung s3c --- */ @@ -1832,13 +1835,6 @@ static const TypeInfo sdhci_s3c_info = { .parent = TYPE_SYSBUS_SDHCI, .instance_init = sdhci_s3c_init, }; +TYPE_INFO(sdhci_s3c_info) -static void sdhci_register_types(void) -{ - type_register_static(&sdhci_sysbus_info); - type_register_static(&sdhci_bus_info); - type_register_static(&imx_usdhc_info); - type_register_static(&sdhci_s3c_info); -} -type_init(sdhci_register_types) diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c index 9210ef567f..70b864366b 100644 --- a/hw/sd/ssi-sd.c +++ b/hw/sd/ssi-sd.c @@ -307,10 +307,6 @@ static const TypeInfo ssi_sd_info = { .instance_size = sizeof(ssi_sd_state), .class_init = ssi_sd_class_init, }; +TYPE_INFO(ssi_sd_info) -static void ssi_sd_register_types(void) -{ - type_register_static(&ssi_sd_info); -} -type_init(ssi_sd_register_types) diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c index 0a3e86f949..b6f5a54781 100644 --- a/hw/sh4/sh_pci.c +++ b/hw/sh4/sh_pci.c @@ -180,6 +180,7 @@ static const TypeInfo sh_pci_host_info = { { }, }, }; +TYPE_INFO(sh_pci_host_info) static void sh_pci_device_class_init(ObjectClass *klass, void *data) { @@ -194,11 +195,6 @@ static const TypeInfo sh_pci_device_info = { .instance_size = sizeof(SHPCIState), .class_init = sh_pci_device_class_init, }; +TYPE_INFO(sh_pci_device_info) -static void sh_pci_register_types(void) -{ - type_register_static(&sh_pci_device_info); - type_register_static(&sh_pci_host_info); -} -type_init(sh_pci_register_types) diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 9be930415f..d53a0faf82 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -631,6 +631,7 @@ static const TypeInfo idreg_info = { .instance_size = sizeof(IDRegState), .class_init = idreg_class_init, }; +TYPE_INFO(idreg_info) #define TYPE_TCX_AFX "tcx_afx" #define TCX_AFX(obj) OBJECT_CHECK(AFXState, (obj), TYPE_TCX_AFX) @@ -684,6 +685,7 @@ static const TypeInfo afx_info = { .instance_size = sizeof(AFXState), .class_init = afx_class_init, }; +TYPE_INFO(afx_info) #define TYPE_OPENPROM "openprom" #define OPENPROM(obj) OBJECT_CHECK(PROMState, (obj), TYPE_OPENPROM) @@ -772,6 +774,7 @@ static const TypeInfo prom_info = { .instance_size = sizeof(PROMState), .class_init = prom_class_init, }; +TYPE_INFO(prom_info) #define TYPE_SUN4M_MEMORY "memory" #define SUN4M_RAM(obj) OBJECT_CHECK(RamDevice, (obj), TYPE_SUN4M_MEMORY) @@ -815,6 +818,7 @@ static const TypeInfo ram_info = { .instance_init = ram_initfn, .class_init = ram_class_init, }; +TYPE_INFO(ram_info) static void cpu_devinit(const char *cpu_type, unsigned int id, uint64_t prom_addr, qemu_irq **cpu_irqs) @@ -1420,6 +1424,7 @@ static const TypeInfo ss5_type = { .parent = TYPE_MACHINE, .class_init = ss5_class_init, }; +TYPE_INFO(ss5_type) static void ss10_class_init(ObjectClass *oc, void *data) { @@ -1440,6 +1445,7 @@ static const TypeInfo ss10_type = { .parent = TYPE_MACHINE, .class_init = ss10_class_init, }; +TYPE_INFO(ss10_type) static void ss600mp_class_init(ObjectClass *oc, void *data) { @@ -1460,6 +1466,7 @@ static const TypeInfo ss600mp_type = { .parent = TYPE_MACHINE, .class_init = ss600mp_class_init, }; +TYPE_INFO(ss600mp_type) static void ss20_class_init(ObjectClass *oc, void *data) { @@ -1480,6 +1487,7 @@ static const TypeInfo ss20_type = { .parent = TYPE_MACHINE, .class_init = ss20_class_init, }; +TYPE_INFO(ss20_type) static void voyager_class_init(ObjectClass *oc, void *data) { @@ -1499,6 +1507,7 @@ static const TypeInfo voyager_type = { .parent = TYPE_MACHINE, .class_init = voyager_class_init, }; +TYPE_INFO(voyager_type) static void ss_lx_class_init(ObjectClass *oc, void *data) { @@ -1518,6 +1527,7 @@ static const TypeInfo ss_lx_type = { .parent = TYPE_MACHINE, .class_init = ss_lx_class_init, }; +TYPE_INFO(ss_lx_type) static void ss4_class_init(ObjectClass *oc, void *data) { @@ -1537,6 +1547,7 @@ static const TypeInfo ss4_type = { .parent = TYPE_MACHINE, .class_init = ss4_class_init, }; +TYPE_INFO(ss4_type) static void scls_class_init(ObjectClass *oc, void *data) { @@ -1556,6 +1567,7 @@ static const TypeInfo scls_type = { .parent = TYPE_MACHINE, .class_init = scls_class_init, }; +TYPE_INFO(scls_type) static void sbook_class_init(ObjectClass *oc, void *data) { @@ -1575,23 +1587,11 @@ static const TypeInfo sbook_type = { .parent = TYPE_MACHINE, .class_init = sbook_class_init, }; +TYPE_INFO(sbook_type) static void sun4m_register_types(void) { - type_register_static(&idreg_info); - type_register_static(&afx_info); - type_register_static(&prom_info); - type_register_static(&ram_info); - - type_register_static(&ss5_type); - type_register_static(&ss10_type); - type_register_static(&ss600mp_type); - type_register_static(&ss20_type); - type_register_static(&voyager_type); - type_register_static(&ss_lx_type); - type_register_static(&ss4_type); - type_register_static(&scls_type); - type_register_static(&sbook_type); + } type_init(sun4m_register_types) diff --git a/hw/sparc/sun4m_iommu.c b/hw/sparc/sun4m_iommu.c index 71f5465249..ce19fe0488 100644 --- a/hw/sparc/sun4m_iommu.c +++ b/hw/sparc/sun4m_iommu.c @@ -389,6 +389,7 @@ static const TypeInfo iommu_info = { .instance_init = iommu_init, .class_init = iommu_class_init, }; +TYPE_INFO(iommu_info) static void sun4m_iommu_memory_region_class_init(ObjectClass *klass, void *data) { @@ -402,11 +403,6 @@ static const TypeInfo sun4m_iommu_memory_region_info = { .name = TYPE_SUN4M_IOMMU_MEMORY_REGION, .class_init = sun4m_iommu_memory_region_class_init, }; +TYPE_INFO(sun4m_iommu_memory_region_info) -static void iommu_register_types(void) -{ - type_register_static(&iommu_info); - type_register_static(&sun4m_iommu_memory_region_info); -} -type_init(iommu_register_types) diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c index a87d55f6bb..706bbafc38 100644 --- a/hw/sparc64/niagara.c +++ b/hw/sparc64/niagara.c @@ -174,10 +174,6 @@ static const TypeInfo niagara_type = { .parent = TYPE_MACHINE, .class_init = niagara_class_init, }; +TYPE_INFO(niagara_type) -static void niagara_register_types(void) -{ - type_register_static(&niagara_type); -} -type_init(niagara_register_types) diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 9e30203dcc..73e6b0eed6 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -283,6 +283,7 @@ static const TypeInfo power_info = { .instance_size = sizeof(PowerDevice), .class_init = power_class_init, }; +TYPE_INFO(power_info) static void ebus_isa_irq_handler(void *opaque, int n, int level) { @@ -397,6 +398,7 @@ static const TypeInfo ebus_info = { { }, }, }; +TYPE_INFO(ebus_info) #define TYPE_OPENPROM "openprom" #define OPENPROM(obj) OBJECT_CHECK(PROMState, (obj), TYPE_OPENPROM) @@ -484,6 +486,7 @@ static const TypeInfo prom_info = { .instance_size = sizeof(PROMState), .class_init = prom_class_init, }; +TYPE_INFO(prom_info) #define TYPE_SUN4U_MEMORY "memory" @@ -544,6 +547,7 @@ static const TypeInfo ram_info = { .instance_size = sizeof(RamDevice), .class_init = ram_class_init, }; +TYPE_INFO(ram_info) static void sun4uv_init(MemoryRegion *address_space_mem, MachineState *machine, @@ -828,6 +832,7 @@ static const TypeInfo sun4u_type = { { } }, }; +TYPE_INFO(sun4u_type) static void sun4v_class_init(ObjectClass *oc, void *data) { @@ -847,16 +852,11 @@ static const TypeInfo sun4v_type = { .parent = TYPE_MACHINE, .class_init = sun4v_class_init, }; +TYPE_INFO(sun4v_type) static void sun4u_register_types(void) { - type_register_static(&power_info); - type_register_static(&ebus_info); - type_register_static(&prom_info); - type_register_static(&ram_info); - type_register_static(&sun4u_type); - type_register_static(&sun4v_type); } type_init(sun4u_register_types) diff --git a/hw/sparc64/sun4u_iommu.c b/hw/sparc64/sun4u_iommu.c index 9178277f82..25ed3d51c6 100644 --- a/hw/sparc64/sun4u_iommu.c +++ b/hw/sparc64/sun4u_iommu.c @@ -319,6 +319,7 @@ static const TypeInfo iommu_info = { .instance_init = iommu_init, .class_init = iommu_class_init, }; +TYPE_INFO(iommu_info) static void sun4u_iommu_memory_region_class_init(ObjectClass *klass, void *data) { @@ -332,11 +333,6 @@ static const TypeInfo sun4u_iommu_memory_region_info = { .name = TYPE_SUN4U_IOMMU_MEMORY_REGION, .class_init = sun4u_iommu_memory_region_class_init, }; +TYPE_INFO(sun4u_iommu_memory_region_info) -static void iommu_register_types(void) -{ - type_register_static(&iommu_info); - type_register_static(&sun4u_iommu_memory_region_info); -} -type_init(iommu_register_types) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index 4fab1f5f85..a1f08cb7ee 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -1447,12 +1447,12 @@ static const TypeInfo aspeed_smc_info = { .class_size = sizeof(AspeedSMCClass), .abstract = true, }; +TYPE_INFO(aspeed_smc_info) static void aspeed_smc_register_types(void) { int i; - type_register_static(&aspeed_smc_info); for (i = 0; i < ARRAY_SIZE(controllers); ++i) { TypeInfo ti = { .name = controllers[i].name, diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c index 7f703d8328..0d888b0ae5 100644 --- a/hw/ssi/imx_spi.c +++ b/hw/ssi/imx_spi.c @@ -450,10 +450,6 @@ static const TypeInfo imx_spi_info = { .instance_size = sizeof(IMXSPIState), .class_init = imx_spi_class_init, }; +TYPE_INFO(imx_spi_info) -static void imx_spi_register_types(void) -{ - type_register_static(&imx_spi_info); -} -type_init(imx_spi_register_types) diff --git a/hw/ssi/mss-spi.c b/hw/ssi/mss-spi.c index b2432c5a13..d49e79ac79 100644 --- a/hw/ssi/mss-spi.c +++ b/hw/ssi/mss-spi.c @@ -413,10 +413,6 @@ static const TypeInfo mss_spi_info = { .instance_size = sizeof(MSSSpiState), .class_init = mss_spi_class_init, }; +TYPE_INFO(mss_spi_info) -static void mss_spi_register_types(void) -{ - type_register_static(&mss_spi_info); -} -type_init(mss_spi_register_types) diff --git a/hw/ssi/pl022.c b/hw/ssi/pl022.c index cade2e92a8..e8705c470c 100644 --- a/hw/ssi/pl022.c +++ b/hw/ssi/pl022.c @@ -307,10 +307,6 @@ static const TypeInfo pl022_info = { .instance_size = sizeof(PL022State), .class_init = pl022_class_init, }; +TYPE_INFO(pl022_info) -static void pl022_register_types(void) -{ - type_register_static(&pl022_info); -} -type_init(pl022_register_types) diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index a35d7ebb26..9461e57b8b 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -30,6 +30,7 @@ static const TypeInfo ssi_bus_info = { .parent = TYPE_BUS, .instance_size = sizeof(SSIBus), }; +TYPE_INFO(ssi_bus_info) static void ssi_cs_default(void *opaque, int n, int level) { @@ -89,6 +90,7 @@ static const TypeInfo ssi_slave_info = { .class_size = sizeof(SSISlaveClass), .abstract = true, }; +TYPE_INFO(ssi_slave_info) bool ssi_realize_and_unref(DeviceState *dev, SSIBus *bus, Error **errp) { @@ -136,10 +138,4 @@ const VMStateDescription vmstate_ssi_slave = { } }; -static void ssi_slave_register_types(void) -{ - type_register_static(&ssi_bus_info); - type_register_static(&ssi_slave_info); -} -type_init(ssi_slave_register_types) diff --git a/hw/ssi/stm32f2xx_spi.c b/hw/ssi/stm32f2xx_spi.c index cd6e8443db..7080454ce4 100644 --- a/hw/ssi/stm32f2xx_spi.c +++ b/hw/ssi/stm32f2xx_spi.c @@ -217,10 +217,6 @@ static const TypeInfo stm32f2xx_spi_info = { .instance_init = stm32f2xx_spi_init, .class_init = stm32f2xx_spi_class_init, }; +TYPE_INFO(stm32f2xx_spi_info) -static void stm32f2xx_spi_register_types(void) -{ - type_register_static(&stm32f2xx_spi_info); -} -type_init(stm32f2xx_spi_register_types) diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c index 80d1488dc7..4f6f50e313 100644 --- a/hw/ssi/xilinx_spi.c +++ b/hw/ssi/xilinx_spi.c @@ -381,10 +381,6 @@ static const TypeInfo xilinx_spi_info = { .instance_size = sizeof(XilinxSPI), .class_init = xilinx_spi_class_init, }; +TYPE_INFO(xilinx_spi_info) -static void xilinx_spi_register_types(void) -{ - type_register_static(&xilinx_spi_info); -} -type_init(xilinx_spi_register_types) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index b9371dbf8d..fbae9bc013 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -1479,6 +1479,7 @@ static const TypeInfo xilinx_spips_info = { .class_init = xilinx_spips_class_init, .class_size = sizeof(XilinxSPIPSClass), }; +TYPE_INFO(xilinx_spips_info) static const TypeInfo xilinx_qspips_info = { .name = TYPE_XILINX_QSPIPS, @@ -1486,6 +1487,7 @@ static const TypeInfo xilinx_qspips_info = { .instance_size = sizeof(XilinxQSPIPS), .class_init = xilinx_qspips_class_init, }; +TYPE_INFO(xilinx_qspips_info) static const TypeInfo xlnx_zynqmp_qspips_info = { .name = TYPE_XLNX_ZYNQMP_QSPIPS, @@ -1494,12 +1496,6 @@ static const TypeInfo xlnx_zynqmp_qspips_info = { .instance_init = xlnx_zynqmp_qspips_init, .class_init = xlnx_zynqmp_qspips_class_init, }; +TYPE_INFO(xlnx_zynqmp_qspips_info) -static void xilinx_spips_register_types(void) -{ - type_register_static(&xilinx_spips_info); - type_register_static(&xilinx_qspips_info); - type_register_static(&xlnx_zynqmp_qspips_info); -} -type_init(xilinx_spips_register_types) diff --git a/hw/timer/a9gtimer.c b/hw/timer/a9gtimer.c index 7233068a37..27d99c74b4 100644 --- a/hw/timer/a9gtimer.c +++ b/hw/timer/a9gtimer.c @@ -368,10 +368,6 @@ static const TypeInfo a9_gtimer_info = { .instance_size = sizeof(A9GTimerState), .class_init = a9_gtimer_class_init, }; +TYPE_INFO(a9_gtimer_info) -static void a9_gtimer_register_types(void) -{ - type_register_static(&a9_gtimer_info); -} -type_init(a9_gtimer_register_types) diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c index f84fc0ea25..fcd3176656 100644 --- a/hw/timer/allwinner-a10-pit.c +++ b/hw/timer/allwinner-a10-pit.c @@ -296,10 +296,6 @@ static const TypeInfo a10_pit_info = { .instance_init = a10_pit_init, .class_init = a10_pit_class_init, }; +TYPE_INFO(a10_pit_info) -static void a10_register_types(void) -{ - type_register_static(&a10_pit_info); -} -type_init(a10_register_types); diff --git a/hw/timer/altera_timer.c b/hw/timer/altera_timer.c index be81b7a518..922b14c335 100644 --- a/hw/timer/altera_timer.c +++ b/hw/timer/altera_timer.c @@ -235,10 +235,6 @@ static const TypeInfo altera_timer_info = { .instance_init = altera_timer_init, .class_init = altera_timer_class_init, }; +TYPE_INFO(altera_timer_info) -static void altera_timer_register(void) -{ - type_register_static(&altera_timer_info); -} -type_init(altera_timer_register) diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c index cdfca3000b..9d37535bc2 100644 --- a/hw/timer/arm_mptimer.c +++ b/hw/timer/arm_mptimer.c @@ -322,10 +322,6 @@ static const TypeInfo arm_mptimer_info = { .instance_init = arm_mptimer_init, .class_init = arm_mptimer_class_init, }; +TYPE_INFO(arm_mptimer_info) -static void arm_mptimer_register_types(void) -{ - type_register_static(&arm_mptimer_info); -} -type_init(arm_mptimer_register_types) diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index 9607366d78..664c2d9bfc 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -385,6 +385,7 @@ static const TypeInfo icp_pit_info = { .instance_size = sizeof(icp_pit_state), .instance_init = icp_pit_init, }; +TYPE_INFO(icp_pit_info) static Property sp804_properties[] = { DEFINE_PROP_UINT32("freq0", SP804State, freq0, 1000000), @@ -408,11 +409,6 @@ static const TypeInfo sp804_info = { .instance_init = sp804_init, .class_init = sp804_class_init, }; +TYPE_INFO(sp804_info) -static void arm_timer_register_types(void) -{ - type_register_static(&icp_pit_info); - type_register_static(&sp804_info); -} -type_init(arm_timer_register_types) diff --git a/hw/timer/armv7m_systick.c b/hw/timer/armv7m_systick.c index 74c58bcf24..9fc69a0e90 100644 --- a/hw/timer/armv7m_systick.c +++ b/hw/timer/armv7m_systick.c @@ -253,10 +253,6 @@ static const TypeInfo armv7m_systick_info = { .instance_size = sizeof(SysTickState), .class_init = systick_class_init, }; +TYPE_INFO(armv7m_systick_info) -static void armv7m_systick_register_types(void) -{ - type_register_static(&armv7m_systick_info); -} -type_init(armv7m_systick_register_types) diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c index 42c47d2ce6..ca7a10dc33 100644 --- a/hw/timer/aspeed_timer.c +++ b/hw/timer/aspeed_timer.c @@ -696,6 +696,7 @@ static const TypeInfo aspeed_timer_info = { .class_size = sizeof(AspeedTimerClass), .abstract = true, }; +TYPE_INFO(aspeed_timer_info) static void aspeed_2400_timer_class_init(ObjectClass *klass, void *data) { @@ -712,6 +713,7 @@ static const TypeInfo aspeed_2400_timer_info = { .parent = TYPE_ASPEED_TIMER, .class_init = aspeed_2400_timer_class_init, }; +TYPE_INFO(aspeed_2400_timer_info) static void aspeed_2500_timer_class_init(ObjectClass *klass, void *data) { @@ -728,6 +730,7 @@ static const TypeInfo aspeed_2500_timer_info = { .parent = TYPE_ASPEED_TIMER, .class_init = aspeed_2500_timer_class_init, }; +TYPE_INFO(aspeed_2500_timer_info) static void aspeed_2600_timer_class_init(ObjectClass *klass, void *data) { @@ -744,13 +747,6 @@ static const TypeInfo aspeed_2600_timer_info = { .parent = TYPE_ASPEED_TIMER, .class_init = aspeed_2600_timer_class_init, }; +TYPE_INFO(aspeed_2600_timer_info) -static void aspeed_timer_register_types(void) -{ - type_register_static(&aspeed_timer_info); - type_register_static(&aspeed_2400_timer_info); - type_register_static(&aspeed_2500_timer_info); - type_register_static(&aspeed_2600_timer_info); -} -type_init(aspeed_timer_register_types) diff --git a/hw/timer/avr_timer16.c b/hw/timer/avr_timer16.c index c48555da52..dfd940a0c5 100644 --- a/hw/timer/avr_timer16.c +++ b/hw/timer/avr_timer16.c @@ -612,10 +612,6 @@ static const TypeInfo avr_timer16_info = { .instance_init = avr_timer16_init, .class_init = avr_timer16_class_init, }; +TYPE_INFO(avr_timer16_info) -static void avr_timer16_register_types(void) -{ - type_register_static(&avr_timer16_info); -} -type_init(avr_timer16_register_types) diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c index 3387a6214a..28a0c16637 100644 --- a/hw/timer/bcm2835_systmr.c +++ b/hw/timer/bcm2835_systmr.c @@ -154,10 +154,6 @@ static const TypeInfo bcm2835_systmr_info = { .instance_size = sizeof(BCM2835SystemTimerState), .class_init = bcm2835_systmr_class_init, }; +TYPE_INFO(bcm2835_systmr_info) -static void bcm2835_systmr_register_types(void) -{ - type_register_static(&bcm2835_systmr_info); -} -type_init(bcm2835_systmr_register_types); diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c index b0ba6b2bba..9ab120cf9c 100644 --- a/hw/timer/cadence_ttc.c +++ b/hw/timer/cadence_ttc.c @@ -494,10 +494,6 @@ static const TypeInfo cadence_ttc_info = { .instance_init = cadence_ttc_init, .class_init = cadence_ttc_class_init, }; +TYPE_INFO(cadence_ttc_info) -static void cadence_ttc_register_types(void) -{ - type_register_static(&cadence_ttc_info); -} -type_init(cadence_ttc_register_types) diff --git a/hw/timer/cmsdk-apb-dualtimer.c b/hw/timer/cmsdk-apb-dualtimer.c index f6534241b9..57f959a040 100644 --- a/hw/timer/cmsdk-apb-dualtimer.c +++ b/hw/timer/cmsdk-apb-dualtimer.c @@ -520,10 +520,6 @@ static const TypeInfo cmsdk_apb_dualtimer_info = { .instance_init = cmsdk_apb_dualtimer_init, .class_init = cmsdk_apb_dualtimer_class_init, }; +TYPE_INFO(cmsdk_apb_dualtimer_info) -static void cmsdk_apb_dualtimer_register_types(void) -{ - type_register_static(&cmsdk_apb_dualtimer_info); -} -type_init(cmsdk_apb_dualtimer_register_types); diff --git a/hw/timer/cmsdk-apb-timer.c b/hw/timer/cmsdk-apb-timer.c index f85f1309f3..570e9beb29 100644 --- a/hw/timer/cmsdk-apb-timer.c +++ b/hw/timer/cmsdk-apb-timer.c @@ -270,10 +270,6 @@ static const TypeInfo cmsdk_apb_timer_info = { .instance_init = cmsdk_apb_timer_init, .class_init = cmsdk_apb_timer_class_init, }; +TYPE_INFO(cmsdk_apb_timer_info) -static void cmsdk_apb_timer_register_types(void) -{ - type_register_static(&cmsdk_apb_timer_info); -} -type_init(cmsdk_apb_timer_register_types); diff --git a/hw/timer/digic-timer.c b/hw/timer/digic-timer.c index 32612228da..6300add9d4 100644 --- a/hw/timer/digic-timer.c +++ b/hw/timer/digic-timer.c @@ -169,10 +169,6 @@ static const TypeInfo digic_timer_info = { .instance_init = digic_timer_init, .class_init = digic_timer_class_init, }; +TYPE_INFO(digic_timer_info) -static void digic_timer_register_type(void) -{ - type_register_static(&digic_timer_info); -} -type_init(digic_timer_register_type) diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c index afe3d30a8e..77767a1beb 100644 --- a/hw/timer/etraxfs_timer.c +++ b/hw/timer/etraxfs_timer.c @@ -357,10 +357,6 @@ static const TypeInfo etraxfs_timer_info = { .instance_size = sizeof(ETRAXTimerState), .class_init = etraxfs_timer_class_init, }; +TYPE_INFO(etraxfs_timer_info) -static void etraxfs_timer_register_types(void) -{ - type_register_static(&etraxfs_timer_info); -} -type_init(etraxfs_timer_register_types) diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index 29a4b10676..077c820f3b 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -1545,10 +1545,6 @@ static const TypeInfo exynos4210_mct_info = { .instance_init = exynos4210_mct_init, .class_init = exynos4210_mct_class_init, }; +TYPE_INFO(exynos4210_mct_info) -static void exynos4210_mct_register_types(void) -{ - type_register_static(&exynos4210_mct_info); -} -type_init(exynos4210_mct_register_types) diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c index 59a8c08db0..c71063f6b0 100644 --- a/hw/timer/exynos4210_pwm.c +++ b/hw/timer/exynos4210_pwm.c @@ -425,10 +425,6 @@ static const TypeInfo exynos4210_pwm_info = { .instance_init = exynos4210_pwm_init, .class_init = exynos4210_pwm_class_init, }; +TYPE_INFO(exynos4210_pwm_info) -static void exynos4210_pwm_register_types(void) -{ - type_register_static(&exynos4210_pwm_info); -} -type_init(exynos4210_pwm_register_types) diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index eff0ee3491..d5bf6cb1f7 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -424,10 +424,6 @@ static const TypeInfo grlib_gptimer_info = { .instance_size = sizeof(GPTimerUnit), .class_init = grlib_gptimer_class_init, }; +TYPE_INFO(grlib_gptimer_info) -static void grlib_gptimer_register_types(void) -{ - type_register_static(&grlib_gptimer_info); -} -type_init(grlib_gptimer_register_types) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 380acfa7c8..37f02c3c34 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -810,10 +810,6 @@ static const TypeInfo hpet_device_info = { .instance_init = hpet_init, .class_init = hpet_device_class_init, }; +TYPE_INFO(hpet_device_info) -static void hpet_register_types(void) -{ - type_register_static(&hpet_device_info); -} -type_init(hpet_register_types) diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c index 29f62e5356..f20d3d53e2 100644 --- a/hw/timer/i8254.c +++ b/hw/timer/i8254.c @@ -374,10 +374,6 @@ static const TypeInfo pit_info = { .class_init = pit_class_initfn, .class_size = sizeof(PITClass), }; +TYPE_INFO(pit_info) -static void pit_register_types(void) -{ - type_register_static(&pit_info); -} -type_init(pit_register_types) diff --git a/hw/timer/i8254_common.c b/hw/timer/i8254_common.c index 050875b497..dc8536f392 100644 --- a/hw/timer/i8254_common.c +++ b/hw/timer/i8254_common.c @@ -262,10 +262,6 @@ static const TypeInfo pit_common_type = { .class_init = pit_common_class_init, .abstract = true, }; +TYPE_INFO(pit_common_type) -static void register_devices(void) -{ - type_register_static(&pit_common_type); -} -type_init(register_devices); diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index ebd58254d1..a13cca7c4e 100644 --- a/hw/timer/imx_epit.c +++ b/hw/timer/imx_epit.c @@ -368,10 +368,6 @@ static const TypeInfo imx_epit_info = { .instance_size = sizeof(IMXEPITState), .class_init = imx_epit_class_init, }; +TYPE_INFO(imx_epit_info) -static void imx_epit_register_types(void) -{ - type_register_static(&imx_epit_info); -} -type_init(imx_epit_register_types) diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c index 5c0d9a269c..8d6805b464 100644 --- a/hw/timer/imx_gpt.c +++ b/hw/timer/imx_gpt.c @@ -553,31 +553,27 @@ static const TypeInfo imx25_gpt_info = { .instance_init = imx25_gpt_init, .class_init = imx_gpt_class_init, }; +TYPE_INFO(imx25_gpt_info) static const TypeInfo imx31_gpt_info = { .name = TYPE_IMX31_GPT, .parent = TYPE_IMX25_GPT, .instance_init = imx31_gpt_init, }; +TYPE_INFO(imx31_gpt_info) static const TypeInfo imx6_gpt_info = { .name = TYPE_IMX6_GPT, .parent = TYPE_IMX25_GPT, .instance_init = imx6_gpt_init, }; +TYPE_INFO(imx6_gpt_info) static const TypeInfo imx7_gpt_info = { .name = TYPE_IMX7_GPT, .parent = TYPE_IMX25_GPT, .instance_init = imx7_gpt_init, }; +TYPE_INFO(imx7_gpt_info) -static void imx_gpt_register_types(void) -{ - type_register_static(&imx25_gpt_info); - type_register_static(&imx31_gpt_info); - type_register_static(&imx6_gpt_info); - type_register_static(&imx7_gpt_info); -} -type_init(imx_gpt_register_types) diff --git a/hw/timer/lm32_timer.c b/hw/timer/lm32_timer.c index f703f407f5..929e8fee10 100644 --- a/hw/timer/lm32_timer.c +++ b/hw/timer/lm32_timer.c @@ -240,10 +240,6 @@ static const TypeInfo lm32_timer_info = { .instance_init = lm32_timer_init, .class_init = lm32_timer_class_init, }; +TYPE_INFO(lm32_timer_info) -static void lm32_timer_register_types(void) -{ - type_register_static(&lm32_timer_info); -} -type_init(lm32_timer_register_types) diff --git a/hw/timer/milkymist-sysctl.c b/hw/timer/milkymist-sysctl.c index 94389820b2..0e3787546a 100644 --- a/hw/timer/milkymist-sysctl.c +++ b/hw/timer/milkymist-sysctl.c @@ -353,10 +353,6 @@ static const TypeInfo milkymist_sysctl_info = { .instance_init = milkymist_sysctl_init, .class_init = milkymist_sysctl_class_init, }; +TYPE_INFO(milkymist_sysctl_info) -static void milkymist_sysctl_register_types(void) -{ - type_register_static(&milkymist_sysctl_info); -} -type_init(milkymist_sysctl_register_types) diff --git a/hw/timer/mss-timer.c b/hw/timer/mss-timer.c index 29943fd744..38976a4bca 100644 --- a/hw/timer/mss-timer.c +++ b/hw/timer/mss-timer.c @@ -289,10 +289,6 @@ static const TypeInfo mss_timer_info = { .instance_init = mss_timer_init, .class_init = mss_timer_class_init, }; +TYPE_INFO(mss_timer_info) -static void mss_timer_register_types(void) -{ - type_register_static(&mss_timer_info); -} -type_init(mss_timer_register_types) diff --git a/hw/timer/nrf51_timer.c b/hw/timer/nrf51_timer.c index 42be79c736..4cabc7e7d2 100644 --- a/hw/timer/nrf51_timer.c +++ b/hw/timer/nrf51_timer.c @@ -395,10 +395,6 @@ static const TypeInfo nrf51_timer_info = { .instance_init = nrf51_timer_init, .class_init = nrf51_timer_class_init }; +TYPE_INFO(nrf51_timer_info) -static void nrf51_timer_register_types(void) -{ - type_register_static(&nrf51_timer_info); -} -type_init(nrf51_timer_register_types) diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c index f76b0bb1ca..a9fff5b89f 100644 --- a/hw/timer/puv3_ost.c +++ b/hw/timer/puv3_ost.c @@ -156,10 +156,6 @@ static const TypeInfo puv3_ost_info = { .instance_size = sizeof(PUV3OSTState), .class_init = puv3_ost_class_init, }; +TYPE_INFO(puv3_ost_info) -static void puv3_ost_register_type(void) -{ - type_register_static(&puv3_ost_info); -} -type_init(puv3_ost_register_type) diff --git a/hw/timer/pxa2xx_timer.c b/hw/timer/pxa2xx_timer.c index 944c165889..46a315e6db 100644 --- a/hw/timer/pxa2xx_timer.c +++ b/hw/timer/pxa2xx_timer.c @@ -572,6 +572,7 @@ static const TypeInfo pxa25x_timer_dev_info = { .instance_size = sizeof(PXA2xxTimerInfo), .class_init = pxa25x_timer_dev_class_init, }; +TYPE_INFO(pxa25x_timer_dev_info) static Property pxa27x_timer_dev_properties[] = { DEFINE_PROP_UINT32("freq", PXA2xxTimerInfo, freq, PXA27X_FREQ), @@ -594,6 +595,7 @@ static const TypeInfo pxa27x_timer_dev_info = { .instance_size = sizeof(PXA2xxTimerInfo), .class_init = pxa27x_timer_dev_class_init, }; +TYPE_INFO(pxa27x_timer_dev_info) static void pxa2xx_timer_class_init(ObjectClass *oc, void *data) { @@ -611,12 +613,6 @@ static const TypeInfo pxa2xx_timer_type_info = { .abstract = true, .class_init = pxa2xx_timer_class_init, }; +TYPE_INFO(pxa2xx_timer_type_info) -static void pxa2xx_timer_register_types(void) -{ - type_register_static(&pxa2xx_timer_type_info); - type_register_static(&pxa25x_timer_dev_info); - type_register_static(&pxa27x_timer_dev_info); -} -type_init(pxa2xx_timer_register_types) diff --git a/hw/timer/renesas_cmt.c b/hw/timer/renesas_cmt.c index 2e0fd21a36..92934f5cc5 100644 --- a/hw/timer/renesas_cmt.c +++ b/hw/timer/renesas_cmt.c @@ -274,10 +274,6 @@ static const TypeInfo rcmt_info = { .instance_init = rcmt_init, .class_init = rcmt_class_init, }; +TYPE_INFO(rcmt_info) -static void rcmt_register_types(void) -{ - type_register_static(&rcmt_info); -} -type_init(rcmt_register_types) diff --git a/hw/timer/renesas_tmr.c b/hw/timer/renesas_tmr.c index 446f2eacdd..5be0c71497 100644 --- a/hw/timer/renesas_tmr.c +++ b/hw/timer/renesas_tmr.c @@ -468,10 +468,6 @@ static const TypeInfo rtmr_info = { .instance_init = rtmr_init, .class_init = rtmr_class_init, }; +TYPE_INFO(rtmr_info) -static void rtmr_register_types(void) -{ - type_register_static(&rtmr_info); -} -type_init(rtmr_register_types) diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c index 4c5d65e391..36734c07e6 100644 --- a/hw/timer/slavio_timer.c +++ b/hw/timer/slavio_timer.c @@ -437,10 +437,6 @@ static const TypeInfo slavio_timer_info = { .instance_init = slavio_timer_init, .class_init = slavio_timer_class_init, }; +TYPE_INFO(slavio_timer_info) -static void slavio_timer_register_types(void) -{ - type_register_static(&slavio_timer_info); -} -type_init(slavio_timer_register_types) diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c index ba8694dcd3..6cc466f2f3 100644 --- a/hw/timer/stm32f2xx_timer.c +++ b/hw/timer/stm32f2xx_timer.c @@ -338,10 +338,6 @@ static const TypeInfo stm32f2xx_timer_info = { .instance_init = stm32f2xx_timer_init, .class_init = stm32f2xx_timer_class_init, }; +TYPE_INFO(stm32f2xx_timer_info) -static void stm32f2xx_timer_register_types(void) -{ - type_register_static(&stm32f2xx_timer_info); -} -type_init(stm32f2xx_timer_register_types) diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c index 0190aa47d0..f14d4c14bb 100644 --- a/hw/timer/xilinx_timer.c +++ b/hw/timer/xilinx_timer.c @@ -263,10 +263,6 @@ static const TypeInfo xilinx_timer_info = { .instance_init = xilinx_timer_init, .class_init = xilinx_timer_class_init, }; +TYPE_INFO(xilinx_timer_info) -static void xilinx_timer_register_types(void) -{ - type_register_static(&xilinx_timer_info); -} -type_init(xilinx_timer_register_types) diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 60247295d4..788d05adc5 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -334,10 +334,6 @@ static const TypeInfo tpm_crb_info = { { } } }; +TYPE_INFO(tpm_crb_info) -static void tpm_crb_register(void) -{ - type_register_static(&tpm_crb_info); -} -type_init(tpm_crb_register) diff --git a/hw/tpm/tpm_spapr.c b/hw/tpm/tpm_spapr.c index 8288ab0a15..7f83a8b3b2 100644 --- a/hw/tpm/tpm_spapr.c +++ b/hw/tpm/tpm_spapr.c @@ -423,10 +423,6 @@ static const TypeInfo tpm_spapr_info = { { } } }; +TYPE_INFO(tpm_spapr_info) -static void tpm_spapr_register_types(void) -{ - type_register_static(&tpm_spapr_info); -} -type_init(tpm_spapr_register_types) diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c index 5faf6231c0..3bb4ec10fa 100644 --- a/hw/tpm/tpm_tis_isa.c +++ b/hw/tpm/tpm_tis_isa.c @@ -162,10 +162,6 @@ static const TypeInfo tpm_tis_isa_info = { { } } }; +TYPE_INFO(tpm_tis_isa_info) -static void tpm_tis_isa_register(void) -{ - type_register_static(&tpm_tis_isa_info); -} -type_init(tpm_tis_isa_register) diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c index 4a3bc70625..2a63c68f22 100644 --- a/hw/tpm/tpm_tis_sysbus.c +++ b/hw/tpm/tpm_tis_sysbus.c @@ -151,10 +151,6 @@ static const TypeInfo tpm_tis_sysbus_info = { { } } }; +TYPE_INFO(tpm_tis_sysbus_info) -static void tpm_tis_sysbus_register(void) -{ - type_register_static(&tpm_tis_sysbus_info); -} -type_init(tpm_tis_sysbus_register) diff --git a/hw/usb/bus.c b/hw/usb/bus.c index b17bda3b29..75c5dd5d27 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -47,6 +47,7 @@ static const TypeInfo usb_bus_info = { { } } }; +TYPE_INFO(usb_bus_info) static int next_usb_bus = 0; static QTAILQ_HEAD(, USBBus) busses = QTAILQ_HEAD_INITIALIZER(busses); @@ -767,11 +768,6 @@ static const TypeInfo usb_device_type_info = { .class_size = sizeof(USBDeviceClass), .class_init = usb_device_class_init, }; +TYPE_INFO(usb_device_type_info) -static void usb_register_types(void) -{ - type_register_static(&usb_bus_info); - type_register_static(&usb_device_type_info); -} -type_init(usb_register_types) diff --git a/hw/usb/ccid-card-emulated.c b/hw/usb/ccid-card-emulated.c index 7d6105ef34..e4647413c6 100644 --- a/hw/usb/ccid-card-emulated.c +++ b/hw/usb/ccid-card-emulated.c @@ -612,10 +612,6 @@ static const TypeInfo emulated_card_info = { .instance_size = sizeof(EmulatedState), .class_init = emulated_class_initfn, }; +TYPE_INFO(emulated_card_info) -static void ccid_card_emulated_register_types(void) -{ - type_register_static(&emulated_card_info); -} -type_init(ccid_card_emulated_register_types) diff --git a/hw/usb/ccid-card-passthru.c b/hw/usb/ccid-card-passthru.c index bb325dbc4a..4a53ab2742 100644 --- a/hw/usb/ccid-card-passthru.c +++ b/hw/usb/ccid-card-passthru.c @@ -412,10 +412,6 @@ static const TypeInfo passthru_card_info = { .instance_size = sizeof(PassthruState), .class_init = passthru_class_initfn, }; +TYPE_INFO(passthru_card_info) -static void ccid_card_passthru_register_types(void) -{ - type_register_static(&passthru_card_info); -} -type_init(ccid_card_passthru_register_types) diff --git a/hw/usb/chipidea.c b/hw/usb/chipidea.c index 3dcd22ccba..ebf45f9a9c 100644 --- a/hw/usb/chipidea.c +++ b/hw/usb/chipidea.c @@ -169,9 +169,5 @@ static const TypeInfo chipidea_info = { .instance_init = chipidea_init, .class_init = chipidea_class_init, }; +TYPE_INFO(chipidea_info) -static void chipidea_register_type(void) -{ - type_register_static(&chipidea_info); -} -type_init(chipidea_register_type) diff --git a/hw/usb/dev-audio.c b/hw/usb/dev-audio.c index 1371c44f48..eaef43d2b9 100644 --- a/hw/usb/dev-audio.c +++ b/hw/usb/dev-audio.c @@ -1019,10 +1019,10 @@ static const TypeInfo usb_audio_info = { .instance_size = sizeof(USBAudioState), .class_init = usb_audio_class_init, }; +TYPE_INFO(usb_audio_info) static void usb_audio_register_types(void) { - type_register_static(&usb_audio_info); usb_legacy_register(TYPE_USB_AUDIO, "audio", NULL); } diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c index 89f63b698b..30aff4499f 100644 --- a/hw/usb/dev-hid.c +++ b/hw/usb/dev-hid.c @@ -803,6 +803,7 @@ static const TypeInfo usb_hid_type_info = { .abstract = true, .class_init = usb_hid_class_initfn, }; +TYPE_INFO(usb_hid_type_info) static Property usb_tablet_properties[] = { DEFINE_PROP_UINT32("usb_version", USBHIDState, usb_version, 2), @@ -828,6 +829,7 @@ static const TypeInfo usb_tablet_info = { .parent = TYPE_USB_HID, .class_init = usb_tablet_class_initfn, }; +TYPE_INFO(usb_tablet_info) static Property usb_mouse_properties[] = { DEFINE_PROP_UINT32("usb_version", USBHIDState, usb_version, 2), @@ -851,6 +853,7 @@ static const TypeInfo usb_mouse_info = { .parent = TYPE_USB_HID, .class_init = usb_mouse_class_initfn, }; +TYPE_INFO(usb_mouse_info) static Property usb_keyboard_properties[] = { DEFINE_PROP_UINT32("usb_version", USBHIDState, usb_version, 2), @@ -875,15 +878,12 @@ static const TypeInfo usb_keyboard_info = { .parent = TYPE_USB_HID, .class_init = usb_keyboard_class_initfn, }; +TYPE_INFO(usb_keyboard_info) static void usb_hid_register_types(void) { - type_register_static(&usb_hid_type_info); - type_register_static(&usb_tablet_info); usb_legacy_register("usb-tablet", "tablet", NULL); - type_register_static(&usb_mouse_info); usb_legacy_register("usb-mouse", "mouse", NULL); - type_register_static(&usb_keyboard_info); usb_legacy_register("usb-kbd", "keyboard", NULL); } diff --git a/hw/usb/dev-hub.c b/hw/usb/dev-hub.c index 5f19dd9fb5..f4193dfe85 100644 --- a/hw/usb/dev-hub.c +++ b/hw/usb/dev-hub.c @@ -695,10 +695,6 @@ static const TypeInfo hub_info = { .instance_size = sizeof(USBHubState), .class_init = usb_hub_class_initfn, }; +TYPE_INFO(hub_info) -static void usb_hub_register_types(void) -{ - type_register_static(&hub_info); -} -type_init(usb_hub_register_types) diff --git a/hw/usb/dev-mtp.c b/hw/usb/dev-mtp.c index 15a2243101..2e42a799eb 100644 --- a/hw/usb/dev-mtp.c +++ b/hw/usb/dev-mtp.c @@ -2113,10 +2113,6 @@ static TypeInfo mtp_info = { .instance_size = sizeof(MTPState), .class_init = usb_mtp_class_initfn, }; +TYPE_INFO(mtp_info) -static void usb_mtp_register_types(void) -{ - type_register_static(&mtp_info); -} -type_init(usb_mtp_register_types) diff --git a/hw/usb/dev-network.c b/hw/usb/dev-network.c index c69756709b..e5eb181d9e 100644 --- a/hw/usb/dev-network.c +++ b/hw/usb/dev-network.c @@ -1419,10 +1419,6 @@ static const TypeInfo net_info = { .class_init = usb_net_class_initfn, .instance_init = usb_net_instance_init, }; +TYPE_INFO(net_info) -static void usb_net_register_types(void) -{ - type_register_static(&net_info); -} -type_init(usb_net_register_types) diff --git a/hw/usb/dev-serial.c b/hw/usb/dev-serial.c index 7e50e3ba47..a6d85abd12 100644 --- a/hw/usb/dev-serial.c +++ b/hw/usb/dev-serial.c @@ -586,6 +586,7 @@ static const TypeInfo usb_serial_dev_type_info = { .abstract = true, .class_init = usb_serial_dev_class_init, }; +TYPE_INFO(usb_serial_dev_type_info) static void usb_serial_class_initfn(ObjectClass *klass, void *data) { @@ -602,6 +603,7 @@ static const TypeInfo serial_info = { .parent = TYPE_USB_SERIAL, .class_init = usb_serial_class_initfn, }; +TYPE_INFO(serial_info) static Property braille_properties[] = { DEFINE_PROP_CHR("chardev", USBSerialState, cs), @@ -623,12 +625,10 @@ static const TypeInfo braille_info = { .parent = TYPE_USB_SERIAL, .class_init = usb_braille_class_initfn, }; +TYPE_INFO(braille_info) static void usb_serial_register_types(void) { - type_register_static(&usb_serial_dev_type_info); - type_register_static(&serial_info); - type_register_static(&braille_info); usb_legacy_register("usb-braille", "braille", usb_braille_init); } diff --git a/hw/usb/dev-smartcard-reader.c b/hw/usb/dev-smartcard-reader.c index fcfe216594..a34aba700f 100644 --- a/hw/usb/dev-smartcard-reader.c +++ b/hw/usb/dev-smartcard-reader.c @@ -1180,6 +1180,7 @@ static const TypeInfo ccid_bus_info = { .parent = TYPE_BUS, .instance_size = sizeof(CCIDBus), }; +TYPE_INFO(ccid_bus_info) void ccid_card_send_apdu_to_guest(CCIDCardState *card, uint8_t *apdu, uint32_t len) @@ -1466,6 +1467,7 @@ static const TypeInfo ccid_info = { { } } }; +TYPE_INFO(ccid_info) static void ccid_card_class_init(ObjectClass *klass, void *data) { @@ -1484,12 +1486,10 @@ static const TypeInfo ccid_card_type_info = { .class_size = sizeof(CCIDCardClass), .class_init = ccid_card_class_init, }; +TYPE_INFO(ccid_card_type_info) static void ccid_register_types(void) { - type_register_static(&ccid_bus_info); - type_register_static(&ccid_card_type_info); - type_register_static(&ccid_info); usb_legacy_register(CCID_DEV_NAME, "ccid", NULL); } diff --git a/hw/usb/dev-storage.c b/hw/usb/dev-storage.c index 405a4ccfe7..1b1b42016b 100644 --- a/hw/usb/dev-storage.c +++ b/hw/usb/dev-storage.c @@ -762,6 +762,7 @@ static const TypeInfo usb_storage_dev_type_info = { .abstract = true, .class_init = usb_msd_class_initfn_common, }; +TYPE_INFO(usb_storage_dev_type_info) static void usb_msd_instance_init(Object *obj) { @@ -785,18 +786,13 @@ static const TypeInfo msd_info = { .class_init = usb_msd_class_storage_initfn, .instance_init = usb_msd_instance_init, }; +TYPE_INFO(msd_info) static const TypeInfo bot_info = { .name = "usb-bot", .parent = TYPE_USB_STORAGE, .class_init = usb_msd_class_bot_initfn, }; +TYPE_INFO(bot_info) -static void usb_msd_register_types(void) -{ - type_register_static(&usb_storage_dev_type_info); - type_register_static(&msd_info); - type_register_static(&bot_info); -} -type_init(usb_msd_register_types) diff --git a/hw/usb/dev-uas.c b/hw/usb/dev-uas.c index a3a4d41c07..57f38da477 100644 --- a/hw/usb/dev-uas.c +++ b/hw/usb/dev-uas.c @@ -961,10 +961,6 @@ static const TypeInfo uas_info = { .instance_size = sizeof(UASDevice), .class_init = usb_uas_class_initfn, }; +TYPE_INFO(uas_info) -static void usb_uas_register_types(void) -{ - type_register_static(&uas_info); -} -type_init(usb_uas_register_types) diff --git a/hw/usb/dev-wacom.c b/hw/usb/dev-wacom.c index 8aba44b8bc..cb8f156f8f 100644 --- a/hw/usb/dev-wacom.c +++ b/hw/usb/dev-wacom.c @@ -378,10 +378,10 @@ static const TypeInfo wacom_info = { .instance_size = sizeof(USBWacomState), .class_init = usb_wacom_class_init, }; +TYPE_INFO(wacom_info) static void usb_wacom_register_types(void) { - type_register_static(&wacom_info); usb_legacy_register(TYPE_USB_WACOM, "wacom-tablet", NULL); } diff --git a/hw/usb/hcd-dwc2.c b/hw/usb/hcd-dwc2.c index 97688d21bf..8a6b906e5f 100644 --- a/hw/usb/hcd-dwc2.c +++ b/hw/usb/hcd-dwc2.c @@ -1401,10 +1401,6 @@ static const TypeInfo dwc2_usb_type_info = { .class_size = sizeof(DWC2Class), .class_init = dwc2_class_init, }; +TYPE_INFO(dwc2_usb_type_info) -static void dwc2_usb_register_types(void) -{ - type_register_static(&dwc2_usb_type_info); -} -type_init(dwc2_usb_register_types) diff --git a/hw/usb/hcd-ehci-pci.c b/hw/usb/hcd-ehci-pci.c index 4c37c8e227..6c97b8ceea 100644 --- a/hw/usb/hcd-ehci-pci.c +++ b/hw/usb/hcd-ehci-pci.c @@ -178,6 +178,7 @@ static const TypeInfo ehci_pci_type_info = { { }, }, }; +TYPE_INFO(ehci_pci_type_info) static void ehci_data_class_init(ObjectClass *klass, void *data) { @@ -223,7 +224,6 @@ static void ehci_pci_register_types(void) }; int i; - type_register_static(&ehci_pci_type_info); for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) { ehci_type_info.name = ehci_pci_info[i].name; diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c index 3730736540..7419494528 100644 --- a/hw/usb/hcd-ehci-sysbus.c +++ b/hw/usb/hcd-ehci-sysbus.c @@ -98,6 +98,7 @@ static const TypeInfo ehci_type_info = { .class_init = ehci_sysbus_class_init, .class_size = sizeof(SysBusEHCIClass), }; +TYPE_INFO(ehci_type_info) static void ehci_platform_class_init(ObjectClass *oc, void *data) { @@ -114,6 +115,7 @@ static const TypeInfo ehci_platform_type_info = { .parent = TYPE_SYS_BUS_EHCI, .class_init = ehci_platform_class_init, }; +TYPE_INFO(ehci_platform_type_info) static void ehci_exynos4210_class_init(ObjectClass *oc, void *data) { @@ -130,6 +132,7 @@ static const TypeInfo ehci_exynos4210_type_info = { .parent = TYPE_SYS_BUS_EHCI, .class_init = ehci_exynos4210_class_init, }; +TYPE_INFO(ehci_exynos4210_type_info) static void ehci_aw_h3_class_init(ObjectClass *oc, void *data) { @@ -146,6 +149,7 @@ static const TypeInfo ehci_aw_h3_type_info = { .parent = TYPE_SYS_BUS_EHCI, .class_init = ehci_aw_h3_class_init, }; +TYPE_INFO(ehci_aw_h3_type_info) static void ehci_tegra2_class_init(ObjectClass *oc, void *data) { @@ -162,6 +166,7 @@ static const TypeInfo ehci_tegra2_type_info = { .parent = TYPE_SYS_BUS_EHCI, .class_init = ehci_tegra2_class_init, }; +TYPE_INFO(ehci_tegra2_type_info) static void ehci_ppc4xx_init(Object *o) { @@ -186,6 +191,7 @@ static const TypeInfo ehci_ppc4xx_type_info = { .class_init = ehci_ppc4xx_class_init, .instance_init = ehci_ppc4xx_init, }; +TYPE_INFO(ehci_ppc4xx_type_info) /* * Faraday FUSBH200 USB 2.0 EHCI @@ -262,16 +268,6 @@ static const TypeInfo ehci_fusbh200_type_info = { .instance_init = fusbh200_ehci_init, .class_init = fusbh200_ehci_class_init, }; +TYPE_INFO(ehci_fusbh200_type_info) -static void ehci_sysbus_register_types(void) -{ - type_register_static(&ehci_type_info); - type_register_static(&ehci_platform_type_info); - type_register_static(&ehci_exynos4210_type_info); - type_register_static(&ehci_aw_h3_type_info); - type_register_static(&ehci_tegra2_type_info); - type_register_static(&ehci_ppc4xx_type_info); - type_register_static(&ehci_fusbh200_type_info); -} -type_init(ehci_sysbus_register_types) diff --git a/hw/usb/hcd-ohci-pci.c b/hw/usb/hcd-ohci-pci.c index a7fb1666af..aa461de292 100644 --- a/hw/usb/hcd-ohci-pci.c +++ b/hw/usb/hcd-ohci-pci.c @@ -155,10 +155,6 @@ static const TypeInfo ohci_pci_info = { { }, }, }; +TYPE_INFO(ohci_pci_info) -static void ohci_pci_register_types(void) -{ - type_register_static(&ohci_pci_info); -} -type_init(ohci_pci_register_types) diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 1e6e85e86a..d69956e998 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -1995,10 +1995,6 @@ static const TypeInfo ohci_sysbus_info = { .instance_size = sizeof(OHCISysBusState), .class_init = ohci_sysbus_class_init, }; +TYPE_INFO(ohci_sysbus_info) -static void ohci_register_types(void) -{ - type_register_static(&ohci_sysbus_info); -} -type_init(ohci_register_types) diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index 37f7beb3fa..a30964ac2c 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -1333,6 +1333,7 @@ static const TypeInfo uhci_pci_type_info = { { }, }, }; +TYPE_INFO(uhci_pci_type_info) static void uhci_data_class_init(ObjectClass *klass, void *data) { @@ -1432,7 +1433,6 @@ static void uhci_register_types(void) }; int i; - type_register_static(&uhci_pci_type_info); for (i = 0; i < ARRAY_SIZE(uhci_info); i++) { uhci_type_info.name = uhci_info[i].name; diff --git a/hw/usb/hcd-xhci-nec.c b/hw/usb/hcd-xhci-nec.c index e6a5a22b6d..91e27b64e1 100644 --- a/hw/usb/hcd-xhci-nec.c +++ b/hw/usb/hcd-xhci-nec.c @@ -55,10 +55,6 @@ static const TypeInfo nec_xhci_info = { .parent = TYPE_XHCI, .class_init = nec_xhci_class_init, }; +TYPE_INFO(nec_xhci_info) -static void nec_xhci_register_types(void) -{ - type_register_static(&nec_xhci_info); -} -type_init(nec_xhci_register_types) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 67a18fe2b6..7d2d8f854e 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -3728,6 +3728,7 @@ static const TypeInfo xhci_info = { { } }, }; +TYPE_INFO(xhci_info) static void qemu_xhci_class_init(ObjectClass *klass, void *data) { @@ -3755,11 +3756,6 @@ static const TypeInfo qemu_xhci_info = { .class_init = qemu_xhci_class_init, .instance_init = qemu_xhci_instance_init, }; +TYPE_INFO(qemu_xhci_info) -static void xhci_register_types(void) -{ - type_register_static(&xhci_info); - type_register_static(&qemu_xhci_info); -} -type_init(xhci_register_types) diff --git a/hw/usb/host-libusb.c b/hw/usb/host-libusb.c index c474551d84..89d313e7e1 100644 --- a/hw/usb/host-libusb.c +++ b/hw/usb/host-libusb.c @@ -1708,13 +1708,9 @@ static TypeInfo usb_host_dev_info = { .class_init = usb_host_class_initfn, .instance_init = usb_host_instance_init, }; +TYPE_INFO(usb_host_dev_info) -static void usb_host_register_types(void) -{ - type_register_static(&usb_host_dev_info); -} -type_init(usb_host_register_types) /* ------------------------------------------------------------------------ */ diff --git a/hw/usb/imx-usb-phy.c b/hw/usb/imx-usb-phy.c index e705a03a1f..59ed520aae 100644 --- a/hw/usb/imx-usb-phy.c +++ b/hw/usb/imx-usb-phy.c @@ -216,10 +216,6 @@ static const TypeInfo imx_usbphy_info = { .instance_size = sizeof(IMXUSBPHYState), .class_init = imx_usbphy_class_init, }; +TYPE_INFO(imx_usbphy_info) -static void imx_usbphy_register_types(void) -{ - type_register_static(&imx_usbphy_info); -} -type_init(imx_usbphy_register_types) diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c index 417a60a2e6..b5c1e656bd 100644 --- a/hw/usb/redirect.c +++ b/hw/usb/redirect.c @@ -2605,10 +2605,6 @@ static const TypeInfo usbredir_dev_info = { .class_init = usbredir_class_initfn, .instance_init = usbredir_instance_init, }; +TYPE_INFO(usbredir_dev_info) -static void usbredir_register_types(void) -{ - type_register_static(&usbredir_dev_info); -} -type_init(usbredir_register_types) diff --git a/hw/usb/tusb6010.c b/hw/usb/tusb6010.c index 27eb28d3e4..fc1263fcd0 100644 --- a/hw/usb/tusb6010.c +++ b/hw/usb/tusb6010.c @@ -840,10 +840,6 @@ static const TypeInfo tusb6010_info = { .instance_size = sizeof(TUSBState), .class_init = tusb6010_class_init, }; +TYPE_INFO(tusb6010_info) -static void tusb6010_register_types(void) -{ - type_register_static(&tusb6010_info); -} -type_init(tusb6010_register_types) diff --git a/hw/vfio/amd-xgbe.c b/hw/vfio/amd-xgbe.c index 96bd608b8d..324fb4808e 100644 --- a/hw/vfio/amd-xgbe.c +++ b/hw/vfio/amd-xgbe.c @@ -52,10 +52,6 @@ static const TypeInfo vfio_amd_xgbe_dev_info = { .class_init = vfio_amd_xgbe_class_init, .class_size = sizeof(VFIOAmdXgbeDeviceClass), }; +TYPE_INFO(vfio_amd_xgbe_dev_info) -static void register_amd_xgbe_dev_type(void) -{ - type_register_static(&vfio_amd_xgbe_dev_info); -} -type_init(register_amd_xgbe_dev_type) diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c index b9330a8e6f..a45da2aa82 100644 --- a/hw/vfio/ap.c +++ b/hw/vfio/ap.c @@ -178,10 +178,6 @@ static const TypeInfo vfio_ap_info = { .instance_size = sizeof(VFIOAPDevice), .class_init = vfio_ap_class_init, }; +TYPE_INFO(vfio_ap_info) -static void vfio_ap_type_init(void) -{ - type_register_static(&vfio_ap_info); -} -type_init(vfio_ap_type_init) diff --git a/hw/vfio/calxeda-xgmac.c b/hw/vfio/calxeda-xgmac.c index 87c382e736..da37db3837 100644 --- a/hw/vfio/calxeda-xgmac.c +++ b/hw/vfio/calxeda-xgmac.c @@ -52,10 +52,6 @@ static const TypeInfo vfio_calxeda_xgmac_dev_info = { .class_init = vfio_calxeda_xgmac_class_init, .class_size = sizeof(VFIOCalxedaXgmacDeviceClass), }; +TYPE_INFO(vfio_calxeda_xgmac_dev_info) -static void register_calxeda_xgmac_dev_type(void) -{ - type_register_static(&vfio_calxeda_xgmac_dev_info); -} -type_init(register_calxeda_xgmac_dev_type) diff --git a/hw/vfio/ccw.c b/hw/vfio/ccw.c index ff7f369779..96488335ed 100644 --- a/hw/vfio/ccw.c +++ b/hw/vfio/ccw.c @@ -740,10 +740,6 @@ static const TypeInfo vfio_ccw_info = { .instance_size = sizeof(VFIOCCWDevice), .class_init = vfio_ccw_class_init, }; +TYPE_INFO(vfio_ccw_info) -static void register_vfio_ccw_type(void) -{ - type_register_static(&vfio_ccw_info); -} -type_init(register_vfio_ccw_type) diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c index 64e332746b..5a2aa3c06d 100644 --- a/hw/vfio/igd.c +++ b/hw/vfio/igd.c @@ -208,13 +208,9 @@ static TypeInfo vfio_pci_igd_lpc_bridge_info = { { }, }, }; +TYPE_INFO(vfio_pci_igd_lpc_bridge_info) -static void vfio_pci_igd_register_types(void) -{ - type_register_static(&vfio_pci_igd_lpc_bridge_info); -} -type_init(vfio_pci_igd_register_types) static int vfio_pci_igd_lpc_init(VFIOPCIDevice *vdev, struct vfio_region_info *info) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 3611dcd38b..a96821c86d 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -3207,6 +3207,7 @@ static const TypeInfo vfio_pci_dev_info = { { } }, }; +TYPE_INFO(vfio_pci_dev_info) static Property vfio_pci_dev_nohotplug_properties[] = { DEFINE_PROP_BOOL("ramfb", VFIOPCIDevice, enable_ramfb, false), @@ -3227,11 +3228,6 @@ static const TypeInfo vfio_pci_nohotplug_dev_info = { .instance_size = sizeof(VFIOPCIDevice), .class_init = vfio_pci_nohotplug_dev_class_init, }; +TYPE_INFO(vfio_pci_nohotplug_dev_info) -static void register_vfio_pci_dev_type(void) -{ - type_register_static(&vfio_pci_dev_info); - type_register_static(&vfio_pci_nohotplug_dev_info); -} -type_init(register_vfio_pci_dev_type) diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c index ac2cefc9b1..16688f040f 100644 --- a/hw/vfio/platform.c +++ b/hw/vfio/platform.c @@ -714,10 +714,6 @@ static const TypeInfo vfio_platform_dev_info = { .class_init = vfio_platform_class_init, .class_size = sizeof(VFIOPlatformDeviceClass), }; +TYPE_INFO(vfio_platform_dev_info) -static void register_vfio_platform_dev_type(void) -{ - type_register_static(&vfio_platform_dev_info); -} -type_init(register_vfio_platform_dev_type) diff --git a/hw/virtio/vhost-user-fs.c b/hw/virtio/vhost-user-fs.c index 1bc5d03a00..bc9165c2ad 100644 --- a/hw/virtio/vhost-user-fs.c +++ b/hw/virtio/vhost-user-fs.c @@ -301,10 +301,6 @@ static const TypeInfo vuf_info = { .instance_size = sizeof(VHostUserFS), .class_init = vuf_class_init, }; +TYPE_INFO(vuf_info) -static void vuf_register_types(void) -{ - type_register_static(&vuf_info); -} -type_init(vuf_register_types) diff --git a/hw/virtio/vhost-user-vsock.c b/hw/virtio/vhost-user-vsock.c index 3534a39d62..0e8f403bd5 100644 --- a/hw/virtio/vhost-user-vsock.c +++ b/hw/virtio/vhost-user-vsock.c @@ -172,10 +172,6 @@ static const TypeInfo vuv_info = { .instance_size = sizeof(VHostUserVSock), .class_init = vuv_class_init, }; +TYPE_INFO(vuv_info) -static void vuv_register_types(void) -{ - type_register_static(&vuv_info); -} -type_init(vuv_register_types) diff --git a/hw/virtio/vhost-vsock-common.c b/hw/virtio/vhost-vsock-common.c index 5b2ebf3496..33c356e67a 100644 --- a/hw/virtio/vhost-vsock-common.c +++ b/hw/virtio/vhost-vsock-common.c @@ -249,10 +249,6 @@ static const TypeInfo vhost_vsock_common_info = { .class_init = vhost_vsock_common_class_init, .abstract = true, }; +TYPE_INFO(vhost_vsock_common_info) -static void vhost_vsock_common_register_types(void) -{ - type_register_static(&vhost_vsock_common_info); -} -type_init(vhost_vsock_common_register_types) diff --git a/hw/virtio/vhost-vsock.c b/hw/virtio/vhost-vsock.c index c8f0699b4f..dde39257e4 100644 --- a/hw/virtio/vhost-vsock.c +++ b/hw/virtio/vhost-vsock.c @@ -224,10 +224,6 @@ static const TypeInfo vhost_vsock_info = { .instance_size = sizeof(VHostVSock), .class_init = vhost_vsock_class_init, }; +TYPE_INFO(vhost_vsock_info) -static void vhost_vsock_register_types(void) -{ - type_register_static(&vhost_vsock_info); -} -type_init(vhost_vsock_register_types) diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c index 22cb5df717..070f3e8364 100644 --- a/hw/virtio/virtio-balloon.c +++ b/hw/virtio/virtio-balloon.c @@ -1071,10 +1071,6 @@ static const TypeInfo virtio_balloon_info = { .instance_init = virtio_balloon_instance_init, .class_init = virtio_balloon_class_init, }; +TYPE_INFO(virtio_balloon_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_balloon_info); -} -type_init(virtio_register_types) diff --git a/hw/virtio/virtio-bus.c b/hw/virtio/virtio-bus.c index d6332d45c3..29d49173bd 100644 --- a/hw/virtio/virtio-bus.c +++ b/hw/virtio/virtio-bus.c @@ -335,10 +335,6 @@ static const TypeInfo virtio_bus_info = { .class_size = sizeof(VirtioBusClass), .class_init = virtio_bus_class_init }; +TYPE_INFO(virtio_bus_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_bus_info); -} -type_init(virtio_register_types) diff --git a/hw/virtio/virtio-crypto.c b/hw/virtio/virtio-crypto.c index 6da12e315f..86c4076860 100644 --- a/hw/virtio/virtio-crypto.c +++ b/hw/virtio/virtio-crypto.c @@ -986,10 +986,6 @@ static const TypeInfo virtio_crypto_info = { .instance_init = virtio_crypto_instance_init, .class_init = virtio_crypto_class_init, }; +TYPE_INFO(virtio_crypto_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_crypto_info); -} -type_init(virtio_register_types) diff --git a/hw/virtio/virtio-input-pci.c b/hw/virtio/virtio-input-pci.c index 74651a42ea..29c633b3d8 100644 --- a/hw/virtio/virtio-input-pci.c +++ b/hw/virtio/virtio-input-pci.c @@ -112,6 +112,7 @@ static const TypeInfo virtio_input_pci_info = { .class_init = virtio_input_pci_class_init, .abstract = true, }; +TYPE_INFO(virtio_input_pci_info) static const TypeInfo virtio_input_hid_pci_info = { .name = TYPE_VIRTIO_INPUT_HID_PCI, @@ -119,6 +120,7 @@ static const TypeInfo virtio_input_hid_pci_info = { .instance_size = sizeof(VirtIOInputHIDPCI), .abstract = true, }; +TYPE_INFO(virtio_input_hid_pci_info) static const VirtioPCIDeviceTypeInfo virtio_keyboard_pci_info = { .generic_name = TYPE_VIRTIO_KEYBOARD_PCI, @@ -146,8 +148,6 @@ static const VirtioPCIDeviceTypeInfo virtio_tablet_pci_info = { static void virtio_pci_input_register(void) { /* Base types: */ - type_register_static(&virtio_input_pci_info); - type_register_static(&virtio_input_hid_pci_info); /* Implementations: */ virtio_pci_types_register(&virtio_keyboard_pci_info); diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index 5d56865e56..ad7665dad3 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -984,17 +984,13 @@ static const TypeInfo virtio_iommu_info = { .instance_init = virtio_iommu_instance_init, .class_init = virtio_iommu_class_init, }; +TYPE_INFO(virtio_iommu_info) static const TypeInfo virtio_iommu_memory_region_info = { .parent = TYPE_IOMMU_MEMORY_REGION, .name = TYPE_VIRTIO_IOMMU_MEMORY_REGION, .class_init = virtio_iommu_memory_region_class_init, }; +TYPE_INFO(virtio_iommu_memory_region_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_iommu_info); - type_register_static(&virtio_iommu_memory_region_info); -} -type_init(virtio_register_types) diff --git a/hw/virtio/virtio-mem.c b/hw/virtio/virtio-mem.c index 7740fc613f..2d0fee731f 100644 --- a/hw/virtio/virtio-mem.c +++ b/hw/virtio/virtio-mem.c @@ -862,10 +862,6 @@ static const TypeInfo virtio_mem_info = { .class_init = virtio_mem_class_init, .class_size = sizeof(VirtIOMEMClass), }; +TYPE_INFO(virtio_mem_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_mem_info); -} -type_init(virtio_register_types) diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c index f12d1595aa..fddb3d8d15 100644 --- a/hw/virtio/virtio-mmio.c +++ b/hw/virtio/virtio-mmio.c @@ -721,6 +721,7 @@ static const TypeInfo virtio_mmio_info = { .instance_size = sizeof(VirtIOMMIOProxy), .class_init = virtio_mmio_class_init, }; +TYPE_INFO(virtio_mmio_info) /* virtio-mmio-bus. */ @@ -790,11 +791,6 @@ static const TypeInfo virtio_mmio_bus_info = { .instance_size = sizeof(VirtioBusState), .class_init = virtio_mmio_bus_class_init, }; +TYPE_INFO(virtio_mmio_bus_info) -static void virtio_mmio_register_types(void) -{ - type_register_static(&virtio_mmio_bus_info); - type_register_static(&virtio_mmio_info); -} -type_init(virtio_mmio_register_types) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index ccdf54e81c..a619acc264 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1940,6 +1940,7 @@ static const TypeInfo virtio_pci_info = { .class_size = sizeof(VirtioPCIClass), .abstract = true, }; +TYPE_INFO(virtio_pci_info) static Property virtio_pci_generic_properties[] = { DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy, @@ -2103,12 +2104,11 @@ static const TypeInfo virtio_pci_bus_info = { .instance_size = sizeof(VirtioPCIBusState), .class_init = virtio_pci_bus_class_init, }; +TYPE_INFO(virtio_pci_bus_info) static void virtio_pci_register_types(void) { /* Base types: */ - type_register_static(&virtio_pci_bus_info); - type_register_static(&virtio_pci_info); } type_init(virtio_pci_register_types) diff --git a/hw/virtio/virtio-pmem.c b/hw/virtio/virtio-pmem.c index 1e0c137497..f085a8687a 100644 --- a/hw/virtio/virtio-pmem.c +++ b/hw/virtio/virtio-pmem.c @@ -183,10 +183,6 @@ static TypeInfo virtio_pmem_info = { .class_init = virtio_pmem_class_init, .instance_size = sizeof(VirtIOPMEM), }; +TYPE_INFO(virtio_pmem_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_pmem_info); -} -type_init(virtio_register_types) diff --git a/hw/virtio/virtio-rng.c b/hw/virtio/virtio-rng.c index 2886c0ce2a..0606aea8dc 100644 --- a/hw/virtio/virtio-rng.c +++ b/hw/virtio/virtio-rng.c @@ -281,10 +281,6 @@ static const TypeInfo virtio_rng_info = { .instance_size = sizeof(VirtIORNG), .class_init = virtio_rng_class_init, }; +TYPE_INFO(virtio_rng_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_rng_info); -} -type_init(virtio_register_types) diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index e983025217..e3788a037b 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -3853,10 +3853,6 @@ static const TypeInfo virtio_device_info = { .abstract = true, .class_size = sizeof(VirtioDeviceClass), }; +TYPE_INFO(virtio_device_info) -static void virtio_register_types(void) -{ - type_register_static(&virtio_device_info); -} -type_init(virtio_register_types) diff --git a/hw/watchdog/cmsdk-apb-watchdog.c b/hw/watchdog/cmsdk-apb-watchdog.c index 5bbadadfa6..24cc0aa703 100644 --- a/hw/watchdog/cmsdk-apb-watchdog.c +++ b/hw/watchdog/cmsdk-apb-watchdog.c @@ -382,6 +382,7 @@ static const TypeInfo cmsdk_apb_watchdog_info = { .instance_init = cmsdk_apb_watchdog_init, .class_init = cmsdk_apb_watchdog_class_init, }; +TYPE_INFO(cmsdk_apb_watchdog_info) static void luminary_watchdog_init(Object *obj) { @@ -396,11 +397,6 @@ static const TypeInfo luminary_watchdog_info = { .parent = TYPE_CMSDK_APB_WATCHDOG, .instance_init = luminary_watchdog_init }; +TYPE_INFO(luminary_watchdog_info) -static void cmsdk_apb_watchdog_register_types(void) -{ - type_register_static(&cmsdk_apb_watchdog_info); - type_register_static(&luminary_watchdog_info); -} -type_init(cmsdk_apb_watchdog_register_types); diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c index 6352ba1b0e..b8a5cb8a55 100644 --- a/hw/watchdog/wdt_aspeed.c +++ b/hw/watchdog/wdt_aspeed.c @@ -282,6 +282,7 @@ static const TypeInfo aspeed_wdt_info = { .class_size = sizeof(AspeedWDTClass), .abstract = true, }; +TYPE_INFO(aspeed_wdt_info) static void aspeed_2400_wdt_class_init(ObjectClass *klass, void *data) { @@ -301,6 +302,7 @@ static const TypeInfo aspeed_2400_wdt_info = { .instance_size = sizeof(AspeedWDTState), .class_init = aspeed_2400_wdt_class_init, }; +TYPE_INFO(aspeed_2400_wdt_info) static void aspeed_2500_wdt_reset_pulse(AspeedWDTState *s, uint32_t property) { @@ -336,6 +338,7 @@ static const TypeInfo aspeed_2500_wdt_info = { .instance_size = sizeof(AspeedWDTState), .class_init = aspeed_2500_wdt_class_init, }; +TYPE_INFO(aspeed_2500_wdt_info) static void aspeed_2600_wdt_class_init(ObjectClass *klass, void *data) { @@ -356,14 +359,11 @@ static const TypeInfo aspeed_2600_wdt_info = { .instance_size = sizeof(AspeedWDTState), .class_init = aspeed_2600_wdt_class_init, }; +TYPE_INFO(aspeed_2600_wdt_info) static void wdt_aspeed_register_types(void) { watchdog_add_model(&model); - type_register_static(&aspeed_wdt_info); - type_register_static(&aspeed_2400_wdt_info); - type_register_static(&aspeed_2500_wdt_info); - type_register_static(&aspeed_2600_wdt_info); } type_init(wdt_aspeed_register_types) diff --git a/hw/watchdog/wdt_diag288.c b/hw/watchdog/wdt_diag288.c index 71a945f0bd..fb32d70be6 100644 --- a/hw/watchdog/wdt_diag288.c +++ b/hw/watchdog/wdt_diag288.c @@ -137,11 +137,11 @@ static const TypeInfo wdt_diag288_info = { .instance_size = sizeof(DIAG288State), .class_size = sizeof(DIAG288Class), }; +TYPE_INFO(wdt_diag288_info) static void wdt_diag288_register_types(void) { watchdog_add_model(&model); - type_register_static(&wdt_diag288_info); } type_init(wdt_diag288_register_types) diff --git a/hw/watchdog/wdt_i6300esb.c b/hw/watchdog/wdt_i6300esb.c index 370cf92e85..989713fa4b 100644 --- a/hw/watchdog/wdt_i6300esb.c +++ b/hw/watchdog/wdt_i6300esb.c @@ -491,11 +491,11 @@ static const TypeInfo i6300esb_info = { { }, }, }; +TYPE_INFO(i6300esb_info) static void i6300esb_register_types(void) { watchdog_add_model(&model); - type_register_static(&i6300esb_info); } type_init(i6300esb_register_types) diff --git a/hw/watchdog/wdt_ib700.c b/hw/watchdog/wdt_ib700.c index 985944a84a..ead7d0dbbd 100644 --- a/hw/watchdog/wdt_ib700.c +++ b/hw/watchdog/wdt_ib700.c @@ -146,11 +146,11 @@ static const TypeInfo wdt_ib700_info = { .instance_size = sizeof(IB700State), .class_init = wdt_ib700_class_init, }; +TYPE_INFO(wdt_ib700_info) static void wdt_ib700_register_types(void) { watchdog_add_model(&model); - type_register_static(&wdt_ib700_info); } type_init(wdt_ib700_register_types) diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c index a5fb76308f..0e71e54c02 100644 --- a/hw/watchdog/wdt_imx2.c +++ b/hw/watchdog/wdt_imx2.c @@ -290,6 +290,7 @@ static const TypeInfo imx2_wdt_info = { .instance_size = sizeof(IMX2WdtState), .class_init = imx2_wdt_class_init, }; +TYPE_INFO(imx2_wdt_info) static WatchdogTimerModel model = { .wdt_name = "imx2-watchdog", @@ -299,6 +300,5 @@ static WatchdogTimerModel model = { static void imx2_wdt_register_type(void) { watchdog_add_model(&model); - type_register_static(&imx2_wdt_info); } type_init(imx2_wdt_register_type) diff --git a/hw/xen/xen-bus.c b/hw/xen/xen-bus.c index 9ce1c9540b..ff65360545 100644 --- a/hw/xen/xen-bus.c +++ b/hw/xen/xen-bus.c @@ -517,6 +517,7 @@ static const TypeInfo xen_bus_type_info = { { } }, }; +TYPE_INFO(xen_bus_type_info) void xen_device_backend_printf(XenDevice *xendev, const char *key, const char *fmt, ...) @@ -1349,6 +1350,7 @@ static const TypeInfo xen_device_type_info = { .class_size = sizeof(XenDeviceClass), .class_init = xen_device_class_init, }; +TYPE_INFO(xen_device_type_info) typedef struct XenBridge { SysBusDevice busdev; @@ -1361,15 +1363,9 @@ static const TypeInfo xen_bridge_type_info = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(XenBridge), }; +TYPE_INFO(xen_bridge_type_info) -static void xen_register_types(void) -{ - type_register_static(&xen_bridge_type_info); - type_register_static(&xen_bus_type_info); - type_register_static(&xen_device_type_info); -} -type_init(xen_register_types) void xen_bus_init(void) { diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c index b61a4855b7..2fdac398e1 100644 --- a/hw/xen/xen-legacy-backend.c +++ b/hw/xen/xen-legacy-backend.c @@ -797,6 +797,7 @@ static const TypeInfo xendev_type_info = { .class_init = xendev_class_init, .instance_size = sizeof(struct XenLegacyDevice), }; +TYPE_INFO(xendev_type_info) static void xen_sysbus_class_init(ObjectClass *klass, void *data) { @@ -814,6 +815,7 @@ static const TypeInfo xensysbus_info = { { } } }; +TYPE_INFO(xensysbus_info) static Property xen_sysdev_properties[] = { {/* end of property list */}, @@ -832,12 +834,6 @@ static const TypeInfo xensysdev_info = { .instance_size = sizeof(SysBusDevice), .class_init = xen_sysdev_class_init, }; +TYPE_INFO(xensysdev_info) -static void xenbe_register_types(void) -{ - type_register_static(&xensysbus_info); - type_register_static(&xensysdev_info); - type_register_static(&xendev_type_info); -} -type_init(xenbe_register_types) diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index 6d359ee486..e6a860c76b 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -994,10 +994,6 @@ static const TypeInfo xen_pci_passthrough_info = { { }, }, }; +TYPE_INFO(xen_pci_passthrough_info) -static void xen_pci_passthrough_register_types(void) -{ - type_register_static(&xen_pci_passthrough_info); -} -type_init(xen_pci_passthrough_register_types) diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 10de15855a..1a611e883b 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -614,6 +614,7 @@ static const TypeInfo xtfpga_lx60_type = { .parent = TYPE_MACHINE, .class_init = xtfpga_lx60_class_init, }; +TYPE_INFO(xtfpga_lx60_type) static void xtfpga_lx60_nommu_class_init(ObjectClass *oc, void *data) { @@ -631,6 +632,7 @@ static const TypeInfo xtfpga_lx60_nommu_type = { .parent = TYPE_MACHINE, .class_init = xtfpga_lx60_nommu_class_init, }; +TYPE_INFO(xtfpga_lx60_nommu_type) static void xtfpga_lx200_class_init(ObjectClass *oc, void *data) { @@ -648,6 +650,7 @@ static const TypeInfo xtfpga_lx200_type = { .parent = TYPE_MACHINE, .class_init = xtfpga_lx200_class_init, }; +TYPE_INFO(xtfpga_lx200_type) static void xtfpga_lx200_nommu_class_init(ObjectClass *oc, void *data) { @@ -665,6 +668,7 @@ static const TypeInfo xtfpga_lx200_nommu_type = { .parent = TYPE_MACHINE, .class_init = xtfpga_lx200_nommu_class_init, }; +TYPE_INFO(xtfpga_lx200_nommu_type) static void xtfpga_ml605_class_init(ObjectClass *oc, void *data) { @@ -682,6 +686,7 @@ static const TypeInfo xtfpga_ml605_type = { .parent = TYPE_MACHINE, .class_init = xtfpga_ml605_class_init, }; +TYPE_INFO(xtfpga_ml605_type) static void xtfpga_ml605_nommu_class_init(ObjectClass *oc, void *data) { @@ -699,6 +704,7 @@ static const TypeInfo xtfpga_ml605_nommu_type = { .parent = TYPE_MACHINE, .class_init = xtfpga_ml605_nommu_class_init, }; +TYPE_INFO(xtfpga_ml605_nommu_type) static void xtfpga_kc705_class_init(ObjectClass *oc, void *data) { @@ -716,6 +722,7 @@ static const TypeInfo xtfpga_kc705_type = { .parent = TYPE_MACHINE, .class_init = xtfpga_kc705_class_init, }; +TYPE_INFO(xtfpga_kc705_type) static void xtfpga_kc705_nommu_class_init(ObjectClass *oc, void *data) { @@ -733,17 +740,6 @@ static const TypeInfo xtfpga_kc705_nommu_type = { .parent = TYPE_MACHINE, .class_init = xtfpga_kc705_nommu_class_init, }; +TYPE_INFO(xtfpga_kc705_nommu_type) -static void xtfpga_machines_init(void) -{ - type_register_static(&xtfpga_lx60_type); - type_register_static(&xtfpga_lx200_type); - type_register_static(&xtfpga_ml605_type); - type_register_static(&xtfpga_kc705_type); - type_register_static(&xtfpga_lx60_nommu_type); - type_register_static(&xtfpga_lx200_nommu_type); - type_register_static(&xtfpga_ml605_nommu_type); - type_register_static(&xtfpga_kc705_nommu_type); -} -type_init(xtfpga_machines_init) diff --git a/io/channel-buffer.c b/io/channel-buffer.c index 5402e0cced..efc86f94a6 100644 --- a/io/channel-buffer.c +++ b/io/channel-buffer.c @@ -242,10 +242,6 @@ static const TypeInfo qio_channel_buffer_info = { .instance_finalize = qio_channel_buffer_finalize, .class_init = qio_channel_buffer_class_init, }; +TYPE_INFO(qio_channel_buffer_info) -static void qio_channel_buffer_register_types(void) -{ - type_register_static(&qio_channel_buffer_info); -} -type_init(qio_channel_buffer_register_types); diff --git a/io/channel-command.c b/io/channel-command.c index 368dd62b7e..32382e2b91 100644 --- a/io/channel-command.c +++ b/io/channel-command.c @@ -383,10 +383,6 @@ static const TypeInfo qio_channel_command_info = { .instance_finalize = qio_channel_command_finalize, .class_init = qio_channel_command_class_init, }; +TYPE_INFO(qio_channel_command_info) -static void qio_channel_command_register_types(void) -{ - type_register_static(&qio_channel_command_info); -} -type_init(qio_channel_command_register_types); diff --git a/io/channel-file.c b/io/channel-file.c index dac21f6012..335773edf0 100644 --- a/io/channel-file.c +++ b/io/channel-file.c @@ -225,10 +225,6 @@ static const TypeInfo qio_channel_file_info = { .instance_finalize = qio_channel_file_finalize, .class_init = qio_channel_file_class_init, }; +TYPE_INFO(qio_channel_file_info) -static void qio_channel_file_register_types(void) -{ - type_register_static(&qio_channel_file_info); -} -type_init(qio_channel_file_register_types); diff --git a/io/channel-socket.c b/io/channel-socket.c index e1b4667087..e91b6b9756 100644 --- a/io/channel-socket.c +++ b/io/channel-socket.c @@ -797,10 +797,6 @@ static const TypeInfo qio_channel_socket_info = { .instance_finalize = qio_channel_socket_finalize, .class_init = qio_channel_socket_class_init, }; +TYPE_INFO(qio_channel_socket_info) -static void qio_channel_socket_register_types(void) -{ - type_register_static(&qio_channel_socket_info); -} -type_init(qio_channel_socket_register_types); diff --git a/io/channel-tls.c b/io/channel-tls.c index 7ec8ceff2f..4c330ae540 100644 --- a/io/channel-tls.c +++ b/io/channel-tls.c @@ -423,10 +423,6 @@ static const TypeInfo qio_channel_tls_info = { .instance_finalize = qio_channel_tls_finalize, .class_init = qio_channel_tls_class_init, }; +TYPE_INFO(qio_channel_tls_info) -static void qio_channel_tls_register_types(void) -{ - type_register_static(&qio_channel_tls_info); -} -type_init(qio_channel_tls_register_types); diff --git a/io/channel-websock.c b/io/channel-websock.c index 47a0e941d9..4b6ee3ddb8 100644 --- a/io/channel-websock.c +++ b/io/channel-websock.c @@ -1332,10 +1332,6 @@ static const TypeInfo qio_channel_websock_info = { .instance_finalize = qio_channel_websock_finalize, .class_init = qio_channel_websock_class_init, }; +TYPE_INFO(qio_channel_websock_info) -static void qio_channel_websock_register_types(void) -{ - type_register_static(&qio_channel_websock_info); -} -type_init(qio_channel_websock_register_types); diff --git a/io/channel.c b/io/channel.c index e4376eb0bc..236fa1e343 100644 --- a/io/channel.c +++ b/io/channel.c @@ -539,12 +539,8 @@ static const TypeInfo qio_channel_info = { .abstract = true, .class_size = sizeof(QIOChannelClass), }; +TYPE_INFO(qio_channel_info) -static void qio_channel_register_types(void) -{ - type_register_static(&qio_channel_info); -} -type_init(qio_channel_register_types); diff --git a/io/dns-resolver.c b/io/dns-resolver.c index 6ebe2a5650..2c79ea8949 100644 --- a/io/dns-resolver.c +++ b/io/dns-resolver.c @@ -269,12 +269,8 @@ static const TypeInfo qio_dns_resolver_info = { .instance_size = sizeof(QIODNSResolver), .class_size = sizeof(QIODNSResolverClass), }; +TYPE_INFO(qio_dns_resolver_info) -static void qio_dns_resolver_register_types(void) -{ - type_register_static(&qio_dns_resolver_info); -} -type_init(qio_dns_resolver_register_types); diff --git a/io/net-listener.c b/io/net-listener.c index 5d8a226872..7b06b60ff0 100644 --- a/io/net-listener.c +++ b/io/net-listener.c @@ -309,12 +309,8 @@ static const TypeInfo qio_net_listener_info = { .instance_finalize = qio_net_listener_finalize, .class_size = sizeof(QIONetListenerClass), }; +TYPE_INFO(qio_net_listener_info) -static void qio_net_listener_register_types(void) -{ - type_register_static(&qio_net_listener_info); -} -type_init(qio_net_listener_register_types); diff --git a/iothread.c b/iothread.c index 263ec6e5bc..c94d139e16 100644 --- a/iothread.c +++ b/iothread.c @@ -292,13 +292,9 @@ static const TypeInfo iothread_info = { {} }, }; +TYPE_INFO(iothread_info) -static void iothread_register_types(void) -{ - type_register_static(&iothread_info); -} -type_init(iothread_register_types) char *iothread_get_id(IOThread *iothread) { diff --git a/migration/migration.c b/migration/migration.c index 8fe36339db..1847320bb9 100644 --- a/migration/migration.c +++ b/migration/migration.c @@ -3814,10 +3814,6 @@ static const TypeInfo migration_type = { .instance_init = migration_instance_init, .instance_finalize = migration_instance_finalize, }; +TYPE_INFO(migration_type) -static void register_migration_types(void) -{ - type_register_static(&migration_type); -} -type_init(register_migration_types); diff --git a/migration/rdma.c b/migration/rdma.c index bea6532813..15ad985d26 100644 --- a/migration/rdma.c +++ b/migration/rdma.c @@ -3942,13 +3942,9 @@ static const TypeInfo qio_channel_rdma_info = { .instance_finalize = qio_channel_rdma_finalize, .class_init = qio_channel_rdma_class_init, }; +TYPE_INFO(qio_channel_rdma_info) -static void qio_channel_rdma_register_types(void) -{ - type_register_static(&qio_channel_rdma_info); -} -type_init(qio_channel_rdma_register_types); static QEMUFile *qemu_fopen_rdma(RDMAContext *rdma, const char *mode) { diff --git a/net/can/can_core.c b/net/can/can_core.c index 90f4d8576a..9e7228cb9d 100644 --- a/net/can/can_core.c +++ b/net/can/can_core.c @@ -131,10 +131,6 @@ static const TypeInfo can_bus_info = { { } } }; +TYPE_INFO(can_bus_info) -static void can_bus_register_types(void) -{ - type_register_static(&can_bus_info); -} -type_init(can_bus_register_types); diff --git a/net/can/can_host.c b/net/can/can_host.c index be4547d913..8b57a40de6 100644 --- a/net/can/can_host.c +++ b/net/can/can_host.c @@ -104,10 +104,6 @@ static const TypeInfo can_host_info = { { } } }; +TYPE_INFO(can_host_info) -static void can_host_register_types(void) -{ - type_register_static(&can_host_info); -} -type_init(can_host_register_types); diff --git a/net/can/can_socketcan.c b/net/can/can_socketcan.c index b7ef63ec0e..c083e92735 100644 --- a/net/can/can_socketcan.c +++ b/net/can/can_socketcan.c @@ -278,10 +278,6 @@ static const TypeInfo can_host_socketcan_info = { .instance_init = can_host_socketcan_instance_init, .class_init = can_host_socketcan_class_init, }; +TYPE_INFO(can_host_socketcan_info) -static void can_host_register_types(void) -{ - type_register_static(&can_host_socketcan_info); -} -type_init(can_host_register_types); diff --git a/net/colo-compare.c b/net/colo-compare.c index 2c20de1537..b6f56fc915 100644 --- a/net/colo-compare.c +++ b/net/colo-compare.c @@ -1495,10 +1495,6 @@ static const TypeInfo colo_compare_info = { { } } }; +TYPE_INFO(colo_compare_info) -static void register_types(void) -{ - type_register_static(&colo_compare_info); -} -type_init(register_types); diff --git a/net/dump.c b/net/dump.c index 11a737a4bc..ec9f20bea5 100644 --- a/net/dump.c +++ b/net/dump.c @@ -256,10 +256,6 @@ static const TypeInfo filter_dump_info = { .instance_finalize = filter_dump_instance_finalize, .instance_size = sizeof(NetFilterDumpState), }; +TYPE_INFO(filter_dump_info) -static void filter_dump_register_types(void) -{ - type_register_static(&filter_dump_info); -} -type_init(filter_dump_register_types); diff --git a/net/filter-buffer.c b/net/filter-buffer.c index dfa211794b..9a6b8132ea 100644 --- a/net/filter-buffer.c +++ b/net/filter-buffer.c @@ -197,10 +197,6 @@ static const TypeInfo filter_buffer_info = { .instance_init = filter_buffer_init, .instance_size = sizeof(FilterBufferState), }; +TYPE_INFO(filter_buffer_info) -static void register_types(void) -{ - type_register_static(&filter_buffer_info); -} -type_init(register_types); diff --git a/net/filter-mirror.c b/net/filter-mirror.c index e9379ce248..09cb97332d 100644 --- a/net/filter-mirror.c +++ b/net/filter-mirror.c @@ -438,6 +438,7 @@ static const TypeInfo filter_redirector_info = { .instance_finalize = filter_redirector_fini, .instance_size = sizeof(MirrorState), }; +TYPE_INFO(filter_redirector_info) static const TypeInfo filter_mirror_info = { .name = TYPE_FILTER_MIRROR, @@ -447,11 +448,6 @@ static const TypeInfo filter_mirror_info = { .instance_finalize = filter_mirror_fini, .instance_size = sizeof(MirrorState), }; +TYPE_INFO(filter_mirror_info) -static void register_types(void) -{ - type_register_static(&filter_mirror_info); - type_register_static(&filter_redirector_info); -} -type_init(register_types); diff --git a/net/filter-replay.c b/net/filter-replay.c index 9dda193928..9f95ee305b 100644 --- a/net/filter-replay.c +++ b/net/filter-replay.c @@ -82,10 +82,6 @@ static const TypeInfo filter_replay_info = { .instance_finalize = filter_replay_instance_finalize, .instance_size = sizeof(NetFilterReplayState), }; +TYPE_INFO(filter_replay_info) -static void filter_replay_register_types(void) -{ - type_register_static(&filter_replay_info); -} -type_init(filter_replay_register_types); diff --git a/net/filter-rewriter.c b/net/filter-rewriter.c index 1aaad101b6..891fa95264 100644 --- a/net/filter-rewriter.c +++ b/net/filter-rewriter.c @@ -433,10 +433,6 @@ static const TypeInfo colo_rewriter_info = { .instance_init = filter_rewriter_init, .instance_size = sizeof(RewriterState), }; +TYPE_INFO(colo_rewriter_info) -static void register_types(void) -{ - type_register_static(&colo_rewriter_info); -} -type_init(register_types); diff --git a/net/filter.c b/net/filter.c index eac8ba1e9c..8dd47bead0 100644 --- a/net/filter.c +++ b/net/filter.c @@ -368,10 +368,6 @@ static const TypeInfo netfilter_info = { { } } }; +TYPE_INFO(netfilter_info) -static void register_types(void) -{ - type_register_static(&netfilter_info); -} -type_init(register_types); diff --git a/qom/container.c b/qom/container.c index 455e8410c6..4c0f5fcce3 100644 --- a/qom/container.c +++ b/qom/container.c @@ -18,11 +18,8 @@ static const TypeInfo container_info = { .name = "container", .parent = TYPE_OBJECT, }; +TYPE_INFO(container_info) -static void container_register_types(void) -{ - type_register_static(&container_info); -} Object *container_get(Object *root, const char *path) { @@ -49,4 +46,3 @@ Object *container_get(Object *root, const char *path) } -type_init(container_register_types) diff --git a/scsi/pr-manager-helper.c b/scsi/pr-manager-helper.c index 5acccfb4e3..466f11f4c8 100644 --- a/scsi/pr-manager-helper.c +++ b/scsi/pr-manager-helper.c @@ -320,10 +320,6 @@ static const TypeInfo pr_manager_helper_info = { .instance_finalize = pr_manager_helper_instance_finalize, .class_init = pr_manager_helper_class_init, }; +TYPE_INFO(pr_manager_helper_info) -static void pr_manager_helper_register_types(void) -{ - type_register_static(&pr_manager_helper_info); -} -type_init(pr_manager_helper_register_types); diff --git a/scsi/pr-manager.c b/scsi/pr-manager.c index 32b9287e68..f95f658b1c 100644 --- a/scsi/pr-manager.c +++ b/scsi/pr-manager.c @@ -83,6 +83,7 @@ static const TypeInfo pr_manager_info = { { } } }; +TYPE_INFO(pr_manager_info) PRManager *pr_manager_lookup(const char *id, Error **errp) { @@ -108,11 +109,6 @@ PRManager *pr_manager_lookup(const char *id, Error **errp) return pr_mgr; } -static void -pr_manager_register_types(void) -{ - type_register_static(&pr_manager_info); -} static int query_one_pr_manager(Object *object, void *opaque) { @@ -148,4 +144,3 @@ PRManagerInfoList *qmp_query_pr_managers(Error **errp) return head; } -type_init(pr_manager_register_types); diff --git a/softmmu/memory.c b/softmmu/memory.c index af25987518..e572a5ede2 100644 --- a/softmmu/memory.c +++ b/softmmu/memory.c @@ -3231,6 +3231,7 @@ static const TypeInfo memory_region_info = { .instance_init = memory_region_initfn, .instance_finalize = memory_region_finalize, }; +TYPE_INFO(memory_region_info) static const TypeInfo iommu_memory_region_info = { .parent = TYPE_MEMORY_REGION, @@ -3240,11 +3241,6 @@ static const TypeInfo iommu_memory_region_info = { .instance_init = iommu_memory_region_initfn, .abstract = true, }; +TYPE_INFO(iommu_memory_region_info) -static void memory_register_types(void) -{ - type_register_static(&memory_region_info); - type_register_static(&iommu_memory_region_info); -} -type_init(memory_register_types) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 111579554f..9b5f3ffcb1 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2316,18 +2316,19 @@ static const TypeInfo arm_cpu_type_info = { .class_size = sizeof(ARMCPUClass), .class_init = arm_cpu_class_init, }; +TYPE_INFO(arm_cpu_type_info) static const TypeInfo idau_interface_type_info = { .name = TYPE_IDAU_INTERFACE, .parent = TYPE_INTERFACE, .class_size = sizeof(IDAUInterfaceClass), }; +TYPE_INFO(idau_interface_type_info) static void arm_cpu_register_types(void) { const size_t cpu_count = ARRAY_SIZE(arm_cpus); - type_register_static(&arm_cpu_type_info); #ifdef CONFIG_KVM type_register_static(&host_arm_cpu_type_info); @@ -2336,7 +2337,6 @@ static void arm_cpu_register_types(void) if (cpu_count) { size_t i; - type_register_static(&idau_interface_type_info); for (i = 0; i < cpu_count; ++i) { arm_cpu_register(&arm_cpus[i]); } diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index dd696183df..33a2fa6125 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -831,12 +831,12 @@ static const TypeInfo aarch64_cpu_type_info = { .class_size = sizeof(AArch64CPUClass), .class_init = aarch64_cpu_class_init, }; +TYPE_INFO(aarch64_cpu_type_info) static void aarch64_cpu_register_types(void) { size_t i; - type_register_static(&aarch64_cpu_type_info); for (i = 0; i < ARRAY_SIZE(aarch64_cpus); ++i) { aarch64_cpu_register(&aarch64_cpus[i]); diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 71b6aca45d..c04b9c814d 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -167,10 +167,6 @@ static const TypeInfo hppa_cpu_type_info = { .class_size = sizeof(HPPACPUClass), .class_init = hppa_cpu_class_init, }; +TYPE_INFO(hppa_cpu_type_info) -static void hppa_cpu_register_types(void) -{ - type_register_static(&hppa_cpu_type_info); -} -type_init(hppa_cpu_register_types) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 588f32e136..ce20b0dff0 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4335,6 +4335,7 @@ static const TypeInfo max_x86_cpu_type_info = { .instance_init = max_x86_cpu_initfn, .class_init = max_x86_cpu_class_init, }; +TYPE_INFO(max_x86_cpu_type_info) #if defined(CONFIG_KVM) || defined(CONFIG_HVF) static void host_x86_cpu_class_init(ObjectClass *oc, void *data) @@ -4358,6 +4359,7 @@ static const TypeInfo host_x86_cpu_type_info = { .parent = X86_CPU_TYPE_NAME("max"), .class_init = host_x86_cpu_class_init, }; +TYPE_INFO(host_x86_cpu_type_info) #endif @@ -7349,6 +7351,7 @@ static const TypeInfo x86_cpu_type_info = { .class_size = sizeof(X86CPUClass), .class_init = x86_cpu_common_class_init, }; +TYPE_INFO(x86_cpu_type_info) /* "base" CPU model, used by query-cpu-model-expansion */ @@ -7367,19 +7370,16 @@ static const TypeInfo x86_base_cpu_type_info = { .parent = TYPE_X86_CPU, .class_init = x86_cpu_base_class_init, }; +TYPE_INFO(x86_base_cpu_type_info) static void x86_cpu_register_types(void) { int i; - type_register_static(&x86_cpu_type_info); for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { x86_register_cpudef_types(&builtin_x86_defs[i]); } - type_register_static(&max_x86_cpu_type_info); - type_register_static(&x86_base_cpu_type_info); #if defined(CONFIG_KVM) || defined(CONFIG_HVF) - type_register_static(&host_x86_cpu_type_info); #endif } diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c index c93bb23a44..377dfbf523 100644 --- a/target/i386/hax-all.c +++ b/target/i386/hax-all.c @@ -1141,10 +1141,6 @@ static const TypeInfo hax_accel_type = { .parent = TYPE_ACCEL, .class_init = hax_accel_class_init, }; +TYPE_INFO(hax_accel_type) -static void hax_type_init(void) -{ - type_register_static(&hax_accel_type); -} -type_init(hax_type_init); diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index d81f569aed..b82253e1d3 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -910,10 +910,6 @@ static const TypeInfo hvf_accel_type = { .parent = TYPE_ACCEL, .class_init = hvf_accel_class_init, }; +TYPE_INFO(hvf_accel_type) -static void hvf_type_init(void) -{ - type_register_static(&hvf_accel_type); -} -type_init(hvf_type_init); diff --git a/target/i386/sev.c b/target/i386/sev.c index c3ecf86704..404762b68f 100644 --- a/target/i386/sev.c +++ b/target/i386/sev.c @@ -332,6 +332,7 @@ static const TypeInfo sev_guest_info = { { } } }; +TYPE_INFO(sev_guest_info) static SevGuestState * lookup_sev_guest_info(const char *id) @@ -785,10 +786,4 @@ sev_encrypt_data(void *handle, uint8_t *ptr, uint64_t len) return 0; } -static void -sev_register_types(void) -{ - type_register_static(&sev_guest_info); -} -type_init(sev_register_types); diff --git a/target/i386/whpx-all.c b/target/i386/whpx-all.c index c78baac6df..64d8903e99 100644 --- a/target/i386/whpx-all.c +++ b/target/i386/whpx-all.c @@ -1608,11 +1608,8 @@ static const TypeInfo whpx_accel_type = { .parent = TYPE_ACCEL, .class_init = whpx_accel_class_init, }; +TYPE_INFO(whpx_accel_type) -static void whpx_type_init(void) -{ - type_register_static(&whpx_accel_type); -} bool init_whp_dispatch(void) { @@ -1645,4 +1642,3 @@ error: return false; } -type_init(whpx_type_init); diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 51e5c85b10..4e62a7cbcd 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -343,10 +343,6 @@ static const TypeInfo mb_cpu_type_info = { .class_size = sizeof(MicroBlazeCPUClass), .class_init = mb_cpu_class_init, }; +TYPE_INFO(mb_cpu_type_info) -static void mb_cpu_register_types(void) -{ - type_register_static(&mb_cpu_type_info); -} -type_init(mb_cpu_register_types) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index e86cd06548..b4482a8594 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -225,6 +225,7 @@ static const TypeInfo mips_cpu_type_info = { .class_size = sizeof(MIPSCPUClass), .class_init = mips_cpu_class_init, }; +TYPE_INFO(mips_cpu_type_info) static void mips_cpu_cpudef_class_init(ObjectClass *oc, void *data) { @@ -250,7 +251,6 @@ static void mips_cpu_register_types(void) { int i; - type_register_static(&mips_cpu_type_info); for (i = 0; i < mips_defs_number; i++) { mips_register_cpudef_type(&mips_defs[i]); } diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 8f7011fcb9..2b9385ee84 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -216,10 +216,6 @@ static const TypeInfo nios2_cpu_type_info = { .class_size = sizeof(Nios2CPUClass), .class_init = nios2_cpu_class_init, }; +TYPE_INFO(nios2_cpu_type_info) -static void nios2_cpu_register_types(void) -{ - type_register_static(&nios2_cpu_type_info); -} -type_init(nios2_cpu_register_types) diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index 7e66822b5d..1cd3a7b6f8 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -10936,6 +10936,7 @@ static const TypeInfo ppc_cpu_type_info = { .class_size = sizeof(PowerPCCPUClass), .class_init = ppc_cpu_class_init, }; +TYPE_INFO(ppc_cpu_type_info) #ifndef CONFIG_USER_ONLY static const TypeInfo ppc_vhyp_type_info = { @@ -10943,13 +10944,12 @@ static const TypeInfo ppc_vhyp_type_info = { .parent = TYPE_INTERFACE, .class_size = sizeof(PPCVirtualHypervisorClass), }; +TYPE_INFO(ppc_vhyp_type_info) #endif static void ppc_cpu_register_types(void) { - type_register_static(&ppc_cpu_type_info); #ifndef CONFIG_USER_ONLY - type_register_static(&ppc_vhyp_type_info); #endif } diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 219e05397b..35672a9670 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -210,16 +210,12 @@ static const TypeInfo rx_cpu_info = { .class_size = sizeof(RXCPUClass), .class_init = rx_cpu_class_init, }; +TYPE_INFO(rx_cpu_info) static const TypeInfo rx62n_rx_cpu_info = { .name = TYPE_RX62N_CPU, .parent = TYPE_RX_CPU, }; +TYPE_INFO(rx62n_rx_cpu_info) -static void rx_cpu_register_types(void) -{ - type_register_static(&rx_cpu_info); - type_register_static(&rx62n_rx_cpu_info); -} -type_init(rx_cpu_register_types) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 08eb674d22..bb48c652fa 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -523,10 +523,6 @@ static const TypeInfo s390_cpu_type_info = { .class_size = sizeof(S390CPUClass), .class_init = s390_cpu_class_init, }; +TYPE_INFO(s390_cpu_type_info) -static void s390_cpu_register_types(void) -{ - type_register_static(&s390_cpu_type_info); -} -type_init(s390_cpu_register_types) diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index c2af226174..46aaad1f7e 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -1305,6 +1305,7 @@ static const TypeInfo qemu_s390_cpu_type_info = { .instance_finalize = s390_cpu_model_finalize, .class_init = s390_qemu_cpu_model_class_init, }; +TYPE_INFO(qemu_s390_cpu_type_info) static const TypeInfo max_s390_cpu_type_info = { .name = S390_CPU_TYPE_NAME("max"), @@ -1313,6 +1314,7 @@ static const TypeInfo max_s390_cpu_type_info = { .instance_finalize = s390_cpu_model_finalize, .class_init = s390_max_cpu_model_class_init, }; +TYPE_INFO(max_s390_cpu_type_info) #ifdef CONFIG_KVM static const TypeInfo host_s390_cpu_type_info = { @@ -1320,6 +1322,7 @@ static const TypeInfo host_s390_cpu_type_info = { .parent = S390_CPU_TYPE_NAME("max"), .class_init = s390_host_cpu_model_class_init, }; +TYPE_INFO(host_s390_cpu_type_info) #endif static void init_ignored_base_feat(void) @@ -1395,10 +1398,7 @@ static void register_types(void) g_free(name); } - type_register_static(&qemu_s390_cpu_type_info); - type_register_static(&max_s390_cpu_type_info); #ifdef CONFIG_KVM - type_register_static(&host_s390_cpu_type_info); #endif } diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index cf21efd85f..aed0cafb13 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -897,6 +897,7 @@ static const TypeInfo sparc_cpu_type_info = { .class_size = sizeof(SPARCCPUClass), .class_init = sparc_cpu_class_init, }; +TYPE_INFO(sparc_cpu_type_info) static void sparc_cpu_cpudef_class_init(ObjectClass *oc, void *data) { @@ -922,7 +923,6 @@ static void sparc_cpu_register_types(void) { int i; - type_register_static(&sparc_cpu_type_info); for (i = 0; i < ARRAY_SIZE(sparc_defs); i++) { sparc_register_cpudef_type(&sparc_defs[i]); } diff --git a/target/tilegx/cpu.c b/target/tilegx/cpu.c index 1fee87c094..93070229de 100644 --- a/target/tilegx/cpu.c +++ b/target/tilegx/cpu.c @@ -164,10 +164,6 @@ static const TypeInfo tilegx_cpu_type_info = { .class_size = sizeof(TileGXCPUClass), .class_init = tilegx_cpu_class_init, }; +TYPE_INFO(tilegx_cpu_type_info) -static void tilegx_cpu_register_types(void) -{ - type_register_static(&tilegx_cpu_type_info); -} -type_init(tilegx_cpu_register_types) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 82c2ee0679..666b8050f7 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -216,10 +216,6 @@ static const TypeInfo xtensa_cpu_type_info = { .class_size = sizeof(XtensaCPUClass), .class_init = xtensa_cpu_class_init, }; +TYPE_INFO(xtensa_cpu_type_info) -static void xtensa_cpu_register_types(void) -{ - type_register_static(&xtensa_cpu_type_info); -} -type_init(xtensa_cpu_register_types) diff --git a/ui/console.c b/ui/console.c index 0579be792f..ae54bf6c1a 100644 --- a/ui/console.c +++ b/ui/console.c @@ -2388,6 +2388,7 @@ static const TypeInfo qemu_console_info = { .instance_size = sizeof(QemuConsole), .class_size = sizeof(QemuConsoleClass), }; +TYPE_INFO(qemu_console_info) static void char_vc_class_init(ObjectClass *oc, void *data) { @@ -2414,9 +2415,4 @@ void qemu_console_early_init(void) } } -static void register_types(void) -{ - type_register_static(&qemu_console_info); -} -type_init(register_types); diff --git a/ui/input-barrier.c b/ui/input-barrier.c index 1cdf0c5f82..2082f5dd1e 100644 --- a/ui/input-barrier.c +++ b/ui/input-barrier.c @@ -741,10 +741,6 @@ static const TypeInfo input_barrier_info = { { } } }; +TYPE_INFO(input_barrier_info) -static void register_types(void) -{ - type_register_static(&input_barrier_info); -} -type_init(register_types); diff --git a/ui/input-linux.c b/ui/input-linux.c index 4925ce1af1..3709800898 100644 --- a/ui/input-linux.c +++ b/ui/input-linux.c @@ -532,10 +532,6 @@ static const TypeInfo input_linux_info = { { } } }; +TYPE_INFO(input_linux_info) -static void register_types(void) -{ - type_register_static(&input_linux_info); -} -type_init(register_types); From patchwork Thu Aug 20 00:12:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 275471 Return-Path: Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B288BC433E1 for ; Thu, 20 Aug 2020 00:48:03 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 93BFC2075E for ; Thu, 20 Aug 2020 00:48:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="JHxpawYE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 93BFC2075E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:38292 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YkL-0005Go-Ir for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:48:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50164) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YEe-0001bw-C8 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:15:16 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:51159 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YEX-0002bp-GA for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:15:16 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882508; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=N8m9vv8SXK0j7+6Of0QJQsqj0S5AGN6A1d0Co2FW5lo=; b=JHxpawYEZLDye0s8hhFYvpR/OAC+9OqAwL1A6v/QV+i6IRM6pjTWJOCH4t+OnMOjGFa0nl L/G7FSZIG6r102KXQaYnSQacVcuja0MiKObia9GyVAmadAkheKHr1jyPqM//Ndd0XCeYb7 7S53fgkPTRl7aR1ah16ZBeo8Fh/LZGY= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-218-519Amk5FNJyRXgFrNttWOg-1; Wed, 19 Aug 2020 20:14:36 -0400 X-MC-Unique: 519Amk5FNJyRXgFrNttWOg-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id BA6918030A1 for ; Thu, 20 Aug 2020 00:14:35 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 89ECC16D4B; Thu, 20 Aug 2020 00:14:34 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 52/58] [automated] Move QOM typedefs and add missing includes Date: Wed, 19 Aug 2020 20:12:30 -0400 Message-Id: <20200820001236.1284548-53-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.004 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 18:27:43 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Signed-off-by: Eduardo Habkost Reviewed-by: Daniel P. Berrangé --- Changes v1 -> v2: * Re-ran script after moving a few macros and typedefs. Now the patch also changes: - SysbusAHCIState at hw/ide/ahci.h - VhostUserGPU at hw/virtio/virtio-gpu.h - I8257State at hw/dma/i8257.h - AllwinnerAHCIState at hw/ide/ahci.h - ISAKBDState at hw/input/i8042.h - PIIXState at hw/southbridge/piix.h - VFIOPCIDevice at hw/vfio/pci.h - missing include at hw/net/rocker/rocker.h - missing include at hw/scsi/mptsas.h - missing include at include/hw/arm/pxa.h - missing include at include/sysemu/kvm.h --- chardev/chardev-internal.h | 5 +- hw/9pfs/virtio-9p.h | 7 ++- hw/audio/intel-hda.h | 11 ++-- hw/avr/atmega.h | 6 +- hw/block/nvme.h | 6 +- hw/display/ati_int.h | 6 +- hw/display/qxl.h | 6 +- hw/display/virtio-vga.h | 11 ++-- hw/i386/amd_iommu.h | 6 +- hw/misc/tmp105.h | 6 +- hw/net/fsl_etsec/etsec.h | 6 +- hw/net/rocker/rocker.h | 1 + hw/net/tulip.h | 1 + hw/net/vmxnet3_defs.h | 6 +- hw/ppc/e500-ccsr.h | 6 +- hw/ppc/e500.h | 11 ++-- hw/ppc/mac.h | 11 ++-- hw/rdma/vmw/pvrdma.h | 6 +- hw/s390x/ccw-device.h | 10 ++-- hw/s390x/ipl.h | 3 +- hw/s390x/s390-pci-bus.h | 18 +++--- hw/s390x/virtio-ccw.h | 73 ++++++++++++++---------- hw/scsi/mptsas.h | 1 + hw/usb/ccid.h | 6 +- hw/usb/hcd-dwc2.h | 1 + hw/usb/hcd-ehci.h | 21 ++++--- hw/usb/hcd-ohci.h | 6 +- hw/usb/hcd-xhci.h | 3 +- hw/vfio/pci.h | 6 +- hw/virtio/virtio-mem-pci.h | 1 + hw/virtio/virtio-pci.h | 6 +- hw/virtio/virtio-pmem-pci.h | 1 + hw/xen/xen_pt.h | 1 + include/authz/base.h | 4 +- include/authz/list.h | 5 +- include/authz/listfile.h | 5 +- include/authz/pamacct.h | 5 +- include/authz/simple.h | 5 +- include/block/throttle-groups.h | 1 + include/chardev/char-fd.h | 6 +- include/chardev/char-win.h | 6 +- include/chardev/char.h | 5 +- include/chardev/spice.h | 6 +- include/crypto/secret.h | 2 +- include/crypto/secret_common.h | 4 +- include/crypto/secret_keyring.h | 4 +- include/crypto/tls-cipher-suites.h | 5 +- include/crypto/tlscreds.h | 2 +- include/crypto/tlscredsanon.h | 3 +- include/crypto/tlscredspsk.h | 3 +- include/crypto/tlscredsx509.h | 3 +- include/exec/memory.h | 5 +- include/hw/acpi/acpi_dev_interface.h | 5 +- include/hw/acpi/generic_event_device.h | 6 +- include/hw/acpi/vmgenid.h | 6 +- include/hw/adc/stm32f2xx_adc.h | 6 +- include/hw/arm/allwinner-a10.h | 6 +- include/hw/arm/allwinner-h3.h | 5 +- include/hw/arm/armsse.h | 11 ++-- include/hw/arm/armv7m.h | 11 ++-- include/hw/arm/aspeed.h | 6 +- include/hw/arm/aspeed_soc.h | 11 ++-- include/hw/arm/bcm2835_peripherals.h | 6 +- include/hw/arm/bcm2836.h | 11 ++-- include/hw/arm/digic.h | 6 +- include/hw/arm/exynos4210.h | 6 +- include/hw/arm/fsl-imx25.h | 6 +- include/hw/arm/fsl-imx31.h | 6 +- include/hw/arm/fsl-imx6.h | 6 +- include/hw/arm/fsl-imx6ul.h | 6 +- include/hw/arm/fsl-imx7.h | 6 +- include/hw/arm/linux-boot-if.h | 5 +- include/hw/arm/msf2-soc.h | 6 +- include/hw/arm/nrf51_soc.h | 6 +- include/hw/arm/omap.h | 5 +- include/hw/arm/pxa.h | 1 + include/hw/arm/smmu-common.h | 11 ++-- include/hw/arm/smmuv3.h | 11 ++-- include/hw/arm/stm32f205_soc.h | 6 +- include/hw/arm/stm32f405_soc.h | 6 +- include/hw/arm/virt.h | 11 ++-- include/hw/arm/xlnx-versal.h | 6 +- include/hw/arm/xlnx-zynqmp.h | 6 +- include/hw/block/flash.h | 5 +- include/hw/block/swim.h | 6 +- include/hw/char/avr_usart.h | 6 +- include/hw/char/bcm2835_aux.h | 6 +- include/hw/char/cadence_uart.h | 6 +- include/hw/char/cmsdk-apb-uart.h | 6 +- include/hw/char/digic-uart.h | 6 +- include/hw/char/escc.h | 6 +- include/hw/char/ibex_uart.h | 6 +- include/hw/char/imx_serial.h | 6 +- include/hw/char/nrf51_uart.h | 6 +- include/hw/char/pl011.h | 6 +- include/hw/char/renesas_sci.h | 6 +- include/hw/char/serial.h | 16 ++++-- include/hw/char/stm32f2xx_usart.h | 6 +- include/hw/clock.h | 2 +- include/hw/core/cpu.h | 6 +- include/hw/core/generic-loader.h | 6 +- include/hw/cpu/a15mpcore.h | 6 +- include/hw/cpu/a9mpcore.h | 6 +- include/hw/cpu/arm11mpcore.h | 6 +- include/hw/cpu/cluster.h | 6 +- include/hw/cpu/core.h | 6 +- include/hw/display/bcm2835_fb.h | 6 +- include/hw/display/dpcd.h | 1 + include/hw/display/i2c-ddc.h | 1 + include/hw/display/macfb.h | 18 +++--- include/hw/display/xlnx_dp.h | 6 +- include/hw/dma/bcm2835_dma.h | 6 +- include/hw/dma/i8257.h | 6 +- include/hw/dma/pl080.h | 6 +- include/hw/dma/xlnx-zdma.h | 6 +- include/hw/dma/xlnx-zynq-devcfg.h | 6 +- include/hw/dma/xlnx_dpdma.h | 1 + include/hw/fw-path-provider.h | 5 +- include/hw/gpio/aspeed_gpio.h | 11 ++-- include/hw/gpio/bcm2835_gpio.h | 6 +- include/hw/gpio/imx_gpio.h | 6 +- include/hw/gpio/nrf51_gpio.h | 6 +- include/hw/hotplug.h | 5 +- include/hw/hyperv/vmbus-bridge.h | 6 +- include/hw/hyperv/vmbus.h | 8 ++- include/hw/i2c/arm_sbcon_i2c.h | 6 +- include/hw/i2c/aspeed_i2c.h | 11 ++-- include/hw/i2c/i2c.h | 6 +- include/hw/i2c/imx_i2c.h | 6 +- include/hw/i2c/microbit_i2c.h | 6 +- include/hw/i2c/ppc4xx_i2c.h | 6 +- include/hw/i2c/smbus_slave.h | 9 +-- include/hw/i386/apic_internal.h | 7 ++- include/hw/i386/ich9.h | 6 +- include/hw/i386/intel_iommu.h | 3 +- include/hw/i386/ioapic_internal.h | 6 +- include/hw/i386/microvm.h | 11 ++-- include/hw/i386/pc.h | 6 +- include/hw/i386/x86-iommu.h | 5 +- include/hw/i386/x86.h | 11 ++-- include/hw/ide/ahci.h | 11 ++-- include/hw/ide/internal.h | 6 +- include/hw/ide/pci.h | 6 +- include/hw/input/adb.h | 6 +- include/hw/input/i8042.h | 3 +- include/hw/intc/allwinner-a10-pic.h | 6 +- include/hw/intc/arm_gic.h | 6 +- include/hw/intc/arm_gic_common.h | 11 ++-- include/hw/intc/arm_gicv3.h | 6 +- include/hw/intc/arm_gicv3_common.h | 6 +- include/hw/intc/arm_gicv3_its_common.h | 3 +- include/hw/intc/armv7m_nvic.h | 6 +- include/hw/intc/aspeed_vic.h | 6 +- include/hw/intc/bcm2835_ic.h | 6 +- include/hw/intc/bcm2836_control.h | 6 +- include/hw/intc/heathrow_pic.h | 6 +- include/hw/intc/ibex_plic.h | 6 +- include/hw/intc/imx_avic.h | 6 +- include/hw/intc/imx_gpcv2.h | 6 +- include/hw/intc/intc.h | 5 +- include/hw/intc/mips_gic.h | 3 +- include/hw/intc/realview_gic.h | 6 +- include/hw/intc/rx_icu.h | 1 + include/hw/intc/xlnx-pmu-iomod-intc.h | 6 +- include/hw/intc/xlnx-zynqmp-ipi.h | 6 +- include/hw/ipack/ipack.h | 1 + include/hw/ipmi/ipmi.h | 18 +++--- include/hw/isa/i8259_internal.h | 7 ++- include/hw/isa/isa.h | 11 ++-- include/hw/isa/pc87312.h | 6 +- include/hw/isa/superio.h | 11 ++-- include/hw/m68k/mcf_fec.h | 1 + include/hw/mem/memory-device.h | 5 +- include/hw/mem/nvdimm.h | 5 +- include/hw/mem/pc-dimm.h | 11 ++-- include/hw/mips/cps.h | 6 +- include/hw/misc/a9scu.h | 6 +- include/hw/misc/allwinner-cpucfg.h | 5 +- include/hw/misc/allwinner-h3-ccu.h | 5 +- include/hw/misc/allwinner-h3-dramc.h | 5 +- include/hw/misc/allwinner-h3-sysctrl.h | 5 +- include/hw/misc/allwinner-sid.h | 5 +- include/hw/misc/arm11scu.h | 6 +- include/hw/misc/armsse-cpuid.h | 6 +- include/hw/misc/armsse-mhu.h | 6 +- include/hw/misc/aspeed_scu.h | 11 ++-- include/hw/misc/aspeed_sdmc.h | 11 ++-- include/hw/misc/aspeed_xdma.h | 6 +- include/hw/misc/auxbus.h | 1 + include/hw/misc/avr_power.h | 6 +- include/hw/misc/bcm2835_mbox.h | 6 +- include/hw/misc/bcm2835_mphi.h | 1 + include/hw/misc/bcm2835_property.h | 6 +- include/hw/misc/bcm2835_rng.h | 6 +- include/hw/misc/bcm2835_thermal.h | 6 +- include/hw/misc/grlib_ahb_apb_pnp.h | 5 +- include/hw/misc/imx25_ccm.h | 6 +- include/hw/misc/imx31_ccm.h | 6 +- include/hw/misc/imx6_ccm.h | 6 +- include/hw/misc/imx6_src.h | 6 +- include/hw/misc/imx6ul_ccm.h | 6 +- include/hw/misc/imx7_ccm.h | 11 ++-- include/hw/misc/imx7_gpr.h | 6 +- include/hw/misc/imx7_snvs.h | 6 +- include/hw/misc/imx_ccm.h | 11 ++-- include/hw/misc/imx_rngc.h | 6 +- include/hw/misc/iotkit-secctl.h | 3 +- include/hw/misc/iotkit-sysctl.h | 6 +- include/hw/misc/iotkit-sysinfo.h | 6 +- include/hw/misc/mac_via.h | 16 ++++-- include/hw/misc/macio/cuda.h | 11 ++-- include/hw/misc/macio/gpio.h | 6 +- include/hw/misc/macio/macio.h | 26 +++++---- include/hw/misc/macio/pmu.h | 11 ++-- include/hw/misc/max111x.h | 6 +- include/hw/misc/mips_cmgcr.h | 3 +- include/hw/misc/mips_cpc.h | 6 +- include/hw/misc/mips_itu.h | 6 +- include/hw/misc/mos6522.h | 11 ++-- include/hw/misc/mps2-fpgaio.h | 6 +- include/hw/misc/mps2-scc.h | 6 +- include/hw/misc/msf2-sysreg.h | 6 +- include/hw/misc/nrf51_rng.h | 6 +- include/hw/misc/pca9552.h | 6 +- include/hw/misc/stm32f2xx_syscfg.h | 6 +- include/hw/misc/stm32f4xx_exti.h | 6 +- include/hw/misc/stm32f4xx_syscfg.h | 6 +- include/hw/misc/tz-mpc.h | 3 +- include/hw/misc/tz-msc.h | 6 +- include/hw/misc/tz-ppc.h | 3 +- include/hw/misc/unimp.h | 6 +- include/hw/misc/vmcoreinfo.h | 6 +- include/hw/misc/zynq-xadc.h | 6 +- include/hw/net/allwinner-sun8i-emac.h | 5 +- include/hw/net/allwinner_emac.h | 6 +- include/hw/net/cadence_gem.h | 6 +- include/hw/net/ftgmac100.h | 11 ++-- include/hw/net/imx_fec.h | 6 +- include/hw/net/lance.h | 6 +- include/hw/net/lasi_82596.h | 6 +- include/hw/net/msf2-emac.h | 6 +- include/hw/nmi.h | 5 +- include/hw/nubus/mac-nubus-bridge.h | 6 +- include/hw/nubus/nubus.h | 11 ++-- include/hw/nvram/fw_cfg.h | 6 +- include/hw/nvram/nrf51_nvm.h | 6 +- include/hw/pci-bridge/simba.h | 6 +- include/hw/pci-host/designware.h | 8 ++- include/hw/pci-host/gpex.h | 11 ++-- include/hw/pci-host/i440fx.h | 6 +- include/hw/pci-host/pnv_phb3.h | 11 ++-- include/hw/pci-host/pnv_phb4.h | 6 +- include/hw/pci-host/q35.h | 11 ++-- include/hw/pci-host/sabre.h | 11 ++-- include/hw/pci-host/spapr.h | 3 +- include/hw/pci-host/uninorth.h | 11 ++-- include/hw/pci-host/xilinx-pcie.h | 11 ++-- include/hw/pci/pci.h | 6 +- include/hw/pci/pci_bridge.h | 1 + include/hw/pci/pci_host.h | 6 +- include/hw/pci/pcie_host.h | 1 + include/hw/pci/pcie_port.h | 6 +- include/hw/pcmcia.h | 11 ++-- include/hw/platform-bus.h | 1 + include/hw/ppc/mac_dbdma.h | 6 +- include/hw/ppc/openpic.h | 6 +- include/hw/ppc/pnv.h | 33 ++++++----- include/hw/ppc/pnv_core.h | 16 ++++-- include/hw/ppc/pnv_homer.h | 11 ++-- include/hw/ppc/pnv_lpc.h | 11 ++-- include/hw/ppc/pnv_occ.h | 11 ++-- include/hw/ppc/pnv_pnor.h | 6 +- include/hw/ppc/pnv_psi.h | 21 ++++--- include/hw/ppc/pnv_xive.h | 11 ++-- include/hw/ppc/pnv_xscom.h | 5 +- include/hw/ppc/spapr.h | 3 +- include/hw/ppc/spapr_cpu_core.h | 11 ++-- include/hw/ppc/spapr_drc.h | 15 +++-- include/hw/ppc/spapr_irq.h | 6 +- include/hw/ppc/spapr_tpm_proxy.h | 5 +- include/hw/ppc/spapr_vio.h | 10 ++-- include/hw/ppc/spapr_xive.h | 11 ++-- include/hw/ppc/xics.h | 6 +- include/hw/ppc/xics_spapr.h | 1 + include/hw/ppc/xive.h | 41 +++++++------ include/hw/qdev-core.h | 5 +- include/hw/rdma/rdma.h | 5 +- include/hw/register.h | 1 + include/hw/resettable.h | 5 +- include/hw/riscv/opentitan.h | 6 +- include/hw/riscv/riscv_hart.h | 6 +- include/hw/riscv/sifive_clint.h | 6 +- include/hw/riscv/sifive_e.h | 11 ++-- include/hw/riscv/sifive_e_prci.h | 6 +- include/hw/riscv/sifive_gpio.h | 6 +- include/hw/riscv/sifive_plic.h | 6 +- include/hw/riscv/sifive_test.h | 6 +- include/hw/riscv/sifive_u.h | 11 ++-- include/hw/riscv/sifive_u_otp.h | 6 +- include/hw/riscv/sifive_u_prci.h | 6 +- include/hw/riscv/sifive_uart.h | 6 +- include/hw/riscv/virt.h | 6 +- include/hw/rtc/allwinner-rtc.h | 10 ++-- include/hw/rtc/aspeed_rtc.h | 6 +- include/hw/rtc/goldfish_rtc.h | 6 +- include/hw/rtc/m48t59.h | 5 +- include/hw/rtc/mc146818rtc.h | 6 +- include/hw/rtc/pl031.h | 6 +- include/hw/rtc/xlnx-zynqmp-rtc.h | 6 +- include/hw/rx/rx62n.h | 6 +- include/hw/s390x/3270-ccw.h | 11 ++-- include/hw/s390x/ap-device.h | 6 +- include/hw/s390x/css-bridge.h | 10 ++-- include/hw/s390x/event-facility.h | 16 ++++-- include/hw/s390x/s390-ccw.h | 11 ++-- include/hw/s390x/s390-virtio-ccw.h | 11 ++-- include/hw/s390x/s390_flic.h | 16 ++++-- include/hw/s390x/sclp.h | 11 ++-- include/hw/s390x/storage-attributes.h | 21 ++++--- include/hw/s390x/storage-keys.h | 16 ++++-- include/hw/s390x/tod.h | 11 ++-- include/hw/s390x/vfio-ccw.h | 3 +- include/hw/scsi/esp.h | 6 +- include/hw/scsi/scsi.h | 6 +- include/hw/sd/allwinner-sdhost.h | 10 ++-- include/hw/sd/aspeed_sdhci.h | 6 +- include/hw/sd/bcm2835_sdhost.h | 6 +- include/hw/sd/sd.h | 11 ++-- include/hw/sd/sdhci.h | 6 +- include/hw/southbridge/piix.h | 6 +- include/hw/sparc/sparc32_dma.h | 18 +++--- include/hw/sparc/sun4m_iommu.h | 6 +- include/hw/sparc/sun4u_iommu.h | 6 +- include/hw/ssi/aspeed_smc.h | 11 ++-- include/hw/ssi/imx_spi.h | 6 +- include/hw/ssi/mss-spi.h | 6 +- include/hw/ssi/pl022.h | 6 +- include/hw/ssi/ssi.h | 1 + include/hw/ssi/stm32f2xx_spi.h | 6 +- include/hw/ssi/xilinx_spips.h | 16 ++++-- include/hw/stream.h | 5 +- include/hw/sysbus.h | 6 +- include/hw/timer/a9gtimer.h | 3 +- include/hw/timer/allwinner-a10-pit.h | 3 +- include/hw/timer/arm_mptimer.h | 6 +- include/hw/timer/armv7m_systick.h | 6 +- include/hw/timer/aspeed_timer.h | 13 +++-- include/hw/timer/avr_timer16.h | 6 +- include/hw/timer/bcm2835_systmr.h | 6 +- include/hw/timer/cmsdk-apb-dualtimer.h | 3 +- include/hw/timer/cmsdk-apb-timer.h | 6 +- include/hw/timer/digic-timer.h | 6 +- include/hw/timer/i8254.h | 1 + include/hw/timer/imx_epit.h | 6 +- include/hw/timer/imx_gpt.h | 6 +- include/hw/timer/mss-timer.h | 6 +- include/hw/timer/nrf51_timer.h | 6 +- include/hw/timer/renesas_cmt.h | 6 +- include/hw/timer/renesas_tmr.h | 6 +- include/hw/timer/stm32f2xx_timer.h | 6 +- include/hw/usb.h | 6 +- include/hw/usb/chipidea.h | 6 +- include/hw/usb/imx-usb-phy.h | 6 +- include/hw/vfio/vfio-amd-xgbe.h | 1 + include/hw/vfio/vfio-calxeda-xgmac.h | 11 ++-- include/hw/vfio/vfio-platform.h | 11 ++-- include/hw/virtio/vhost-scsi-common.h | 6 +- include/hw/virtio/vhost-scsi.h | 6 +- include/hw/virtio/vhost-user-blk.h | 6 +- include/hw/virtio/vhost-user-fs.h | 6 +- include/hw/virtio/vhost-user-scsi.h | 6 +- include/hw/virtio/vhost-user-vsock.h | 6 +- include/hw/virtio/vhost-vsock-common.h | 6 +- include/hw/virtio/vhost-vsock.h | 6 +- include/hw/virtio/virtio-balloon.h | 6 +- include/hw/virtio/virtio-blk.h | 6 +- include/hw/virtio/virtio-bus.h | 8 ++- include/hw/virtio/virtio-crypto.h | 6 +- include/hw/virtio/virtio-gpu-pci.h | 1 + include/hw/virtio/virtio-gpu.h | 21 ++++--- include/hw/virtio/virtio-input.h | 11 ++-- include/hw/virtio/virtio-iommu.h | 6 +- include/hw/virtio/virtio-mem.h | 11 ++-- include/hw/virtio/virtio-mmio.h | 6 +- include/hw/virtio/virtio-net.h | 3 +- include/hw/virtio/virtio-pmem.h | 11 ++-- include/hw/virtio/virtio-rng.h | 6 +- include/hw/virtio/virtio-scsi.h | 11 ++-- include/hw/virtio/virtio-serial.h | 8 ++- include/hw/virtio/virtio.h | 6 +- include/hw/vmstate-if.h | 5 +- include/hw/watchdog/cmsdk-apb-watchdog.h | 6 +- include/hw/watchdog/wdt_aspeed.h | 11 ++-- include/hw/watchdog/wdt_diag288.h | 11 ++-- include/hw/watchdog/wdt_imx2.h | 6 +- include/hw/xen/xen-block.h | 21 ++++--- include/hw/xen/xen-bus.h | 21 ++++--- include/hw/xen/xen-legacy-backend.h | 1 + include/io/channel-buffer.h | 3 +- include/io/channel-command.h | 3 +- include/io/channel-file.h | 3 +- include/io/channel-socket.h | 3 +- include/io/channel-tls.h | 3 +- include/io/channel-websock.h | 3 +- include/io/channel.h | 4 +- include/io/dns-resolver.h | 4 +- include/io/net-listener.h | 5 +- include/net/can_host.h | 11 ++-- include/net/filter.h | 5 +- include/qom/object.h | 1 + include/qom/object_interfaces.h | 5 +- include/scsi/pr-manager.h | 10 ++-- include/sysemu/accel.h | 10 ++-- include/sysemu/cryptodev.h | 7 ++- include/sysemu/hostmem.h | 4 +- include/sysemu/hvf.h | 1 + include/sysemu/iothread.h | 5 +- include/sysemu/kvm.h | 1 + include/sysemu/rng-random.h | 2 +- include/sysemu/rng.h | 4 +- include/sysemu/tpm.h | 5 +- include/sysemu/tpm_backend.h | 4 +- include/sysemu/vhost-user-backend.h | 4 +- include/ui/console.h | 2 +- migration/migration.h | 6 +- target/alpha/cpu-qom.h | 8 ++- target/arm/cpu-qom.h | 13 +++-- target/arm/idau.h | 5 +- target/avr/cpu-qom.h | 8 ++- target/cris/cpu-qom.h | 8 ++- target/hppa/cpu-qom.h | 8 ++- target/i386/cpu-qom.h | 8 ++- target/lm32/cpu-qom.h | 8 ++- target/m68k/cpu-qom.h | 8 ++- target/microblaze/cpu-qom.h | 8 ++- target/mips/cpu-qom.h | 8 ++- target/moxie/cpu.h | 11 ++-- target/nios2/cpu.h | 11 ++-- target/openrisc/cpu.h | 11 ++-- target/ppc/cpu-qom.h | 8 ++- target/ppc/cpu.h | 1 + target/riscv/cpu.h | 11 ++-- target/rx/cpu-qom.h | 6 +- target/s390x/cpu-qom.h | 8 ++- target/sh4/cpu-qom.h | 8 ++- target/sparc/cpu-qom.h | 8 ++- target/tilegx/cpu.h | 11 ++-- target/tricore/cpu-qom.h | 8 ++- target/unicore32/cpu-qom.h | 8 ++- target/xtensa/cpu-qom.h | 8 ++- accel/tcg/tcg-all.c | 5 +- backends/cryptodev-builtin.c | 5 +- backends/cryptodev-vhost-user.c | 6 +- backends/dbus-vmstate.c | 1 + backends/hostmem-file.c | 3 +- backends/hostmem-memfd.c | 3 +- backends/rng-builtin.c | 6 +- backends/rng-egd.c | 7 ++- backends/tpm/tpm_emulator.c | 6 +- backends/tpm/tpm_passthrough.c | 3 +- chardev/baum.c | 6 +- chardev/char-parallel.c | 11 ++-- chardev/char-pty.c | 6 +- chardev/char-ringbuf.c | 6 +- chardev/char-socket.c | 6 +- chardev/char-udp.c | 6 +- chardev/char-win-stdio.c | 6 +- chardev/msmouse.c | 6 +- chardev/testdev.c | 6 +- chardev/wctablet.c | 6 +- hw/acpi/piix4.c | 6 +- hw/alpha/typhoon.c | 6 +- hw/arm/collie.c | 6 +- hw/arm/highbank.c | 6 +- hw/arm/integratorcp.c | 16 ++++-- hw/arm/microbit.c | 6 +- hw/arm/mps2-tz.c | 11 ++-- hw/arm/mps2.c | 11 ++-- hw/arm/musca.c | 11 ++-- hw/arm/musicpal.c | 41 +++++++------ hw/arm/palm.c | 6 +- hw/arm/pxa2xx.c | 16 ++++-- hw/arm/pxa2xx_gpio.c | 3 +- hw/arm/pxa2xx_pic.c | 6 +- hw/arm/raspi.c | 11 ++-- hw/arm/sbsa-ref.c | 6 +- hw/arm/spitz.c | 36 +++++++----- hw/arm/stellaris.c | 16 ++++-- hw/arm/strongarm.c | 25 ++++---- hw/arm/tosa.c | 11 ++-- hw/arm/versatilepb.c | 6 +- hw/arm/vexpress.c | 11 ++-- hw/arm/xilinx_zynq.c | 6 +- hw/arm/xlnx-versal-virt.c | 6 +- hw/arm/xlnx-zcu102.c | 6 +- hw/arm/z2.c | 11 ++-- hw/audio/ac97.c | 6 +- hw/audio/adlib.c | 6 +- hw/audio/cs4231.c | 6 +- hw/audio/cs4231a.c | 6 +- hw/audio/es1370.c | 6 +- hw/audio/gus.c | 6 +- hw/audio/hda-codec.c | 1 + hw/audio/intel-hda.c | 1 + hw/audio/marvell_88w8618.c | 6 +- hw/audio/milkymist-ac97.c | 3 +- hw/audio/pcspk.c | 6 +- hw/audio/pl041.c | 6 +- hw/audio/sb16.c | 6 +- hw/audio/wm8750.c | 6 +- hw/avr/arduino.c | 11 ++-- hw/avr/atmega.c | 6 +- hw/block/fdc.c | 21 ++++--- hw/block/m25p80.c | 11 ++-- hw/block/nand.c | 1 + hw/block/onenand.c | 6 +- hw/char/debugcon.c | 6 +- hw/char/etraxfs_ser.c | 6 +- hw/char/exynos4210_uart.c | 6 +- hw/char/grlib_apbuart.c | 6 +- hw/char/ipoctal232.c | 1 + hw/char/lm32_juart.c | 3 +- hw/char/lm32_uart.c | 3 +- hw/char/mcf_uart.c | 6 +- hw/char/milkymist-uart.c | 3 +- hw/char/parallel.c | 6 +- hw/char/sclpconsole-lm.c | 6 +- hw/char/sclpconsole.c | 6 +- hw/char/serial-isa.c | 6 +- hw/char/serial-pci.c | 6 +- hw/char/spapr_vty.c | 6 +- hw/char/terminal3270.c | 6 +- hw/char/virtio-console.c | 6 +- hw/char/xilinx_uartlite.c | 6 +- hw/cpu/realview_mpcore.c | 6 +- hw/display/ads7846.c | 6 +- hw/display/artist.c | 6 +- hw/display/bochs-display.c | 6 +- hw/display/cg3.c | 6 +- hw/display/cirrus_vga.c | 6 +- hw/display/cirrus_vga_isa.c | 6 +- hw/display/exynos4210_fimd.c | 6 +- hw/display/g364fb.c | 6 +- hw/display/jazz_led.c | 6 +- hw/display/milkymist-tmu2.c | 3 +- hw/display/milkymist-vgafb.c | 3 +- hw/display/next-fb.c | 3 +- hw/display/pl110.c | 6 +- hw/display/ramfb-standalone.c | 6 +- hw/display/sii9022.c | 6 +- hw/display/sm501.c | 11 ++-- hw/display/ssd0303.c | 6 +- hw/display/ssd0323.c | 6 +- hw/display/tcx.c | 6 +- hw/display/vga-isa.c | 6 +- hw/display/vga-pci.c | 6 +- hw/display/vhost-user-gpu-pci.c | 6 +- hw/display/vhost-user-vga.c | 6 +- hw/display/virtio-gpu-pci.c | 6 +- hw/display/virtio-vga.c | 6 +- hw/display/vmware_vga.c | 1 + hw/dma/i82374.c | 6 +- hw/dma/pl330.c | 1 + hw/dma/puv3_dma.c | 6 +- hw/dma/pxa2xx_dma.c | 6 +- hw/dma/rc4030.c | 6 +- hw/dma/xilinx_axidma.c | 5 +- hw/gpio/gpio_key.c | 6 +- hw/gpio/max7310.c | 6 +- hw/gpio/mpc8xxx.c | 6 +- hw/gpio/pl061.c | 6 +- hw/gpio/puv3_gpio.c | 6 +- hw/gpio/zaurus.c | 3 +- hw/hppa/dino.c | 6 +- hw/hppa/lasi.c | 6 +- hw/hyperv/hyperv.c | 6 +- hw/hyperv/hyperv_testdev.c | 1 + hw/i2c/bitbang_i2c.c | 6 +- hw/i2c/exynos4210_i2c.c | 6 +- hw/i2c/mpc_i2c.c | 6 +- hw/i2c/smbus_eeprom.c | 6 +- hw/i2c/smbus_ich9.c | 6 +- hw/i2c/versatile_i2c.c | 3 +- hw/i386/kvm/clock.c | 6 +- hw/i386/kvm/i8254.c | 11 ++-- hw/i386/kvm/i8259.c | 6 +- hw/i386/kvmvapic.c | 6 +- hw/i386/port92.c | 6 +- hw/i386/vmmouse.c | 7 ++- hw/i386/vmport.c | 6 +- hw/i386/xen/xen_platform.c | 6 +- hw/i386/xen/xen_pvdevice.c | 6 +- hw/ide/isa.c | 6 +- hw/ide/microdrive.c | 6 +- hw/ide/mmio.c | 6 +- hw/ide/sii3112.c | 6 +- hw/input/adb-kbd.c | 11 ++-- hw/input/adb-mouse.c | 11 ++-- hw/input/lm832x.c | 6 +- hw/input/milkymist-softusb.c | 3 +- hw/input/pl050.c | 6 +- hw/intc/apic.c | 1 + hw/intc/arm_gic_kvm.c | 6 +- hw/intc/arm_gicv2m.c | 6 +- hw/intc/arm_gicv3_its_kvm.c | 6 +- hw/intc/arm_gicv3_kvm.c | 6 +- hw/intc/etraxfs_pic.c | 1 + hw/intc/exynos4210_combiner.c | 6 +- hw/intc/exynos4210_gic.c | 11 ++-- hw/intc/grlib_irqmp.c | 6 +- hw/intc/i8259.c | 6 +- hw/intc/lm32_pic.c | 3 +- hw/intc/loongson_liointc.c | 1 + hw/intc/nios2_iic.c | 6 +- hw/intc/ompic.c | 3 +- hw/intc/openpic_kvm.c | 6 +- hw/intc/pl190.c | 6 +- hw/intc/puv3_intc.c | 6 +- hw/intc/s390_flic_kvm.c | 6 +- hw/intc/slavio_intctl.c | 6 +- hw/intc/xilinx_intc.c | 1 + hw/ipack/tpci200.c | 6 +- hw/ipmi/ipmi_bmc_extern.c | 6 +- hw/ipmi/isa_ipmi_bt.c | 6 +- hw/ipmi/isa_ipmi_kcs.c | 6 +- hw/ipmi/pci_ipmi_bt.c | 6 +- hw/ipmi/pci_ipmi_kcs.c | 6 +- hw/ipmi/smbus_ipmi.c | 6 +- hw/isa/i82378.c | 6 +- hw/isa/piix4.c | 6 +- hw/isa/vt82c686.c | 21 ++++--- hw/m68k/mcf_intc.c | 6 +- hw/m68k/next-cube.c | 6 +- hw/m68k/next-kbd.c | 6 +- hw/microblaze/xlnx-zynqmp-pmu.c | 6 +- hw/mips/boston.c | 6 +- hw/mips/gt64xxx_pci.c | 6 +- hw/mips/malta.c | 6 +- hw/misc/applesmc.c | 3 +- hw/misc/arm_integrator_debug.c | 6 +- hw/misc/arm_l2x0.c | 6 +- hw/misc/arm_sysctl.c | 6 +- hw/misc/debugexit.c | 6 +- hw/misc/eccmemctl.c | 6 +- hw/misc/edu.c | 6 +- hw/misc/empty_slot.c | 6 +- hw/misc/exynos4210_clk.c | 6 +- hw/misc/exynos4210_pmu.c | 6 +- hw/misc/exynos4210_rng.c | 6 +- hw/misc/ivshmem.c | 6 +- hw/misc/milkymist-hpdmc.c | 3 +- hw/misc/milkymist-pfpu.c | 3 +- hw/misc/mst_fpga.c | 6 +- hw/misc/pc-testdev.c | 6 +- hw/misc/pca9552.c | 6 +- hw/misc/pci-testdev.c | 6 +- hw/misc/puv3_pm.c | 6 +- hw/misc/pvpanic.c | 6 +- hw/misc/sga.c | 6 +- hw/misc/slavio_misc.c | 11 ++-- hw/misc/tmp421.c | 11 ++-- hw/misc/zynq_slcr.c | 6 +- hw/net/can/can_kvaser_pci.c | 6 +- hw/net/can/can_mioe3680_pci.c | 6 +- hw/net/can/can_pcm3680_pci.c | 6 +- hw/net/dp8393x.c | 6 +- hw/net/e1000.c | 11 ++-- hw/net/e1000e.c | 6 +- hw/net/etraxfs_eth.c | 7 ++- hw/net/lan9118.c | 6 +- hw/net/milkymist-minimac2.c | 3 +- hw/net/mipsnet.c | 6 +- hw/net/ne2000-isa.c | 6 +- hw/net/opencores_eth.c | 6 +- hw/net/pcnet-pci.c | 6 +- hw/net/rtl8139.c | 6 +- hw/net/smc91c111.c | 6 +- hw/net/spapr_llan.c | 6 +- hw/net/stellaris_enet.c | 6 +- hw/net/sungem.c | 6 +- hw/net/sunhme.c | 6 +- hw/net/vmxnet3.c | 6 +- hw/net/xgmac.c | 6 +- hw/net/xilinx_axienet.c | 5 +- hw/net/xilinx_ethlite.c | 1 + hw/nvram/ds1225y.c | 6 +- hw/nvram/eeprom_at24c.c | 6 +- hw/nvram/spapr_nvram.c | 6 +- hw/pci-bridge/dec.c | 6 +- hw/pci-bridge/gen_pcie_root_port.c | 6 +- hw/pci-bridge/pci_bridge_dev.c | 3 +- hw/pci-bridge/pci_expander_bridge.c | 11 ++-- hw/pci-bridge/pcie_pci_bridge.c | 6 +- hw/pci-host/bonito.c | 6 +- hw/pci-host/grackle.c | 6 +- hw/pci-host/i440fx.c | 6 +- hw/pci-host/pnv_phb3.c | 1 + hw/pci-host/pnv_phb4.c | 1 + hw/pci-host/ppce500.c | 5 +- hw/pci-host/prep.c | 11 ++-- hw/pci-host/versatile.c | 6 +- hw/ppc/mpc8544_guts.c | 3 +- hw/ppc/ppc440_pcix.c | 6 +- hw/ppc/ppc440_uc.c | 6 +- hw/ppc/ppc4xx_pci.c | 3 +- hw/ppc/ppce500_spin.c | 6 +- hw/ppc/prep_systemio.c | 6 +- hw/ppc/rs6000_mc.c | 6 +- hw/ppc/spapr_rng.c | 3 +- hw/rtc/ds1338.c | 6 +- hw/rtc/exynos4210_rtc.c | 6 +- hw/rtc/m41t80.c | 6 +- hw/rtc/m48t59-isa.c | 11 ++-- hw/rtc/m48t59.c | 11 ++-- hw/rtc/sun4v-rtc.c | 6 +- hw/rtc/twl92230.c | 6 +- hw/rx/rx-gdbsim.c | 11 ++-- hw/rx/rx62n.c | 6 +- hw/scsi/esp-pci.c | 11 ++-- hw/scsi/lsi53c895a.c | 6 +- hw/scsi/megasas.c | 11 ++-- hw/scsi/scsi-disk.c | 12 ++-- hw/scsi/spapr_vscsi.c | 6 +- hw/scsi/vmw_pvscsi.c | 11 ++-- hw/sd/allwinner-sdhost.c | 1 + hw/sd/bcm2835_sdhost.c | 1 + hw/sd/milkymist-memcard.c | 3 +- hw/sd/pl181.c | 6 +- hw/sd/pxa2xx_mmci.c | 1 + hw/sd/sdhci.c | 1 + hw/sd/ssi-sd.c | 6 +- hw/sh4/sh_pci.c | 6 +- hw/sparc/sun4m.c | 21 ++++--- hw/sparc64/sun4u.c | 21 ++++--- hw/ssi/ssi.c | 1 + hw/ssi/xilinx_spi.c | 6 +- hw/timer/altera_timer.c | 6 +- hw/timer/arm_timer.c | 11 ++-- hw/timer/cadence_ttc.c | 6 +- hw/timer/etraxfs_timer.c | 6 +- hw/timer/exynos4210_mct.c | 6 +- hw/timer/exynos4210_pwm.c | 6 +- hw/timer/grlib_gptimer.c | 3 +- hw/timer/hpet.c | 6 +- hw/timer/i8254.c | 6 +- hw/timer/lm32_timer.c | 3 +- hw/timer/milkymist-sysctl.c | 3 +- hw/timer/puv3_ost.c | 6 +- hw/timer/pxa2xx_timer.c | 3 +- hw/timer/slavio_timer.c | 6 +- hw/timer/xilinx_timer.c | 1 + hw/tpm/tpm_crb.c | 6 +- hw/tpm/tpm_spapr.c | 6 +- hw/tpm/tpm_tis_isa.c | 6 +- hw/tpm/tpm_tis_sysbus.c | 6 +- hw/usb/ccid-card-emulated.c | 3 +- hw/usb/ccid-card-passthru.c | 1 + hw/usb/dev-audio.c | 6 +- hw/usb/dev-hid.c | 6 +- hw/usb/dev-hub.c | 6 +- hw/usb/dev-mtp.c | 1 + hw/usb/dev-network.c | 6 +- hw/usb/dev-serial.c | 6 +- hw/usb/dev-smartcard-reader.c | 11 ++-- hw/usb/dev-storage.c | 6 +- hw/usb/dev-uas.c | 1 + hw/usb/dev-wacom.c | 6 +- hw/usb/hcd-ohci-pci.c | 6 +- hw/usb/hcd-uhci.c | 1 + hw/usb/host-libusb.c | 3 +- hw/usb/redirect.c | 1 + hw/usb/tusb6010.c | 6 +- hw/vfio/ap.c | 6 +- hw/virtio/vhost-scsi-pci.c | 1 + hw/virtio/vhost-user-blk-pci.c | 1 + hw/virtio/vhost-user-fs-pci.c | 1 + hw/virtio/vhost-user-input-pci.c | 1 + hw/virtio/vhost-user-scsi-pci.c | 1 + hw/virtio/vhost-user-vsock-pci.c | 1 + hw/virtio/vhost-vsock-pci.c | 1 + hw/virtio/virtio-9p-pci.c | 6 +- hw/virtio/virtio-balloon-pci.c | 1 + hw/virtio/virtio-blk-pci.c | 1 + hw/virtio/virtio-crypto-pci.c | 1 + hw/virtio/virtio-input-host-pci.c | 1 + hw/virtio/virtio-input-pci.c | 1 + hw/virtio/virtio-iommu-pci.c | 1 + hw/virtio/virtio-net-pci.c | 1 + hw/virtio/virtio-rng-pci.c | 1 + hw/virtio/virtio-scsi-pci.c | 1 + hw/virtio/virtio-serial-pci.c | 1 + hw/watchdog/wdt_i6300esb.c | 1 + hw/watchdog/wdt_ib700.c | 6 +- migration/rdma.c | 3 +- net/can/can_socketcan.c | 6 +- net/colo-compare.c | 5 +- net/dump.c | 3 +- net/filter-buffer.c | 5 +- net/filter-mirror.c | 9 +-- net/filter-replay.c | 3 +- net/filter-rewriter.c | 7 ++- scsi/pr-manager-helper.c | 6 +- target/i386/sev.c | 3 +- tests/check-qom-interface.c | 5 +- tests/test-qdev-global-props.c | 5 +- ui/console.c | 6 +- ui/gtk.c | 5 +- ui/input-barrier.c | 5 +- ui/input-linux.c | 5 +- ui/spice-app.c | 6 +- 810 files changed, 3453 insertions(+), 1865 deletions(-) diff --git a/chardev/chardev-internal.h b/chardev/chardev-internal.h index f4d0429763..2926a326e0 100644 --- a/chardev/chardev-internal.h +++ b/chardev/chardev-internal.h @@ -32,7 +32,7 @@ #define MUX_BUFFER_SIZE 32 /* Must be a power of 2. */ #define MUX_BUFFER_MASK (MUX_BUFFER_SIZE - 1) -typedef struct MuxChardev { +struct MuxChardev { Chardev parent; CharBackend *backends[MAX_MUX]; CharBackend chr; @@ -51,7 +51,8 @@ typedef struct MuxChardev { /* Protected by the Chardev chr_write_lock. */ int linestart; int64_t timestamps_start; -} MuxChardev; +}; +typedef struct MuxChardev MuxChardev; #define MUX_CHARDEV(obj) OBJECT_CHECK(MuxChardev, (obj), TYPE_CHARDEV_MUX) #define CHARDEV_IS_MUX(chr) \ diff --git a/hw/9pfs/virtio-9p.h b/hw/9pfs/virtio-9p.h index e763da2c02..6dd945ecda 100644 --- a/hw/9pfs/virtio-9p.h +++ b/hw/9pfs/virtio-9p.h @@ -4,15 +4,16 @@ #include "standard-headers/linux/virtio_9p.h" #include "hw/virtio/virtio.h" #include "9p.h" +#include "qom/object.h" -typedef struct V9fsVirtioState -{ +struct V9fsVirtioState { VirtIODevice parent_obj; VirtQueue *vq; size_t config_size; VirtQueueElement *elems[MAX_REQ]; V9fsState state; -} V9fsVirtioState; +}; +typedef struct V9fsVirtioState V9fsVirtioState; #define TYPE_VIRTIO_9P "virtio-9p-device" #define VIRTIO_9P(obj) \ diff --git a/hw/audio/intel-hda.h b/hw/audio/intel-hda.h index eee6fee5af..44a2897fff 100644 --- a/hw/audio/intel-hda.h +++ b/hw/audio/intel-hda.h @@ -2,11 +2,14 @@ #define HW_INTEL_HDA_H #include "hw/qdev-core.h" +#include "qom/object.h" /* --------------------------------------------------------------------- */ /* hda bus */ #define TYPE_HDA_CODEC_DEVICE "hda-codec" +typedef struct HDACodecDevice HDACodecDevice; +typedef struct HDACodecDeviceClass HDACodecDeviceClass; #define HDA_CODEC_DEVICE(obj) \ OBJECT_CHECK(HDACodecDevice, (obj), TYPE_HDA_CODEC_DEVICE) #define HDA_CODEC_DEVICE_CLASS(klass) \ @@ -15,10 +18,9 @@ OBJECT_GET_CLASS(HDACodecDeviceClass, (obj), TYPE_HDA_CODEC_DEVICE) #define TYPE_HDA_BUS "HDA" +typedef struct HDACodecBus HDACodecBus; #define HDA_BUS(obj) OBJECT_CHECK(HDACodecBus, (obj), TYPE_HDA_BUS) -typedef struct HDACodecBus HDACodecBus; -typedef struct HDACodecDevice HDACodecDevice; typedef void (*hda_codec_response_func)(HDACodecDevice *dev, bool solicited, uint32_t response); @@ -33,15 +35,14 @@ struct HDACodecBus { hda_codec_xfer_func xfer; }; -typedef struct HDACodecDeviceClass -{ +struct HDACodecDeviceClass { DeviceClass parent_class; int (*init)(HDACodecDevice *dev); void (*exit)(HDACodecDevice *dev); void (*command)(HDACodecDevice *dev, uint32_t nid, uint32_t data); void (*stream)(HDACodecDevice *dev, uint32_t stnr, bool running, bool output); -} HDACodecDeviceClass; +}; struct HDACodecDevice { DeviceState qdev; diff --git a/hw/avr/atmega.h b/hw/avr/atmega.h index 0928cb0ce6..2c46ecb904 100644 --- a/hw/avr/atmega.h +++ b/hw/avr/atmega.h @@ -15,6 +15,7 @@ #include "hw/timer/avr_timer16.h" #include "hw/misc/avr_power.h" #include "target/avr/cpu.h" +#include "qom/object.h" #define TYPE_ATMEGA_MCU "ATmega" #define TYPE_ATMEGA168_MCU "ATmega168" @@ -22,6 +23,7 @@ #define TYPE_ATMEGA1280_MCU "ATmega1280" #define TYPE_ATMEGA2560_MCU "ATmega2560" +typedef struct AtmegaMcuState AtmegaMcuState; #define ATMEGA_MCU(obj) OBJECT_CHECK(AtmegaMcuState, (obj), TYPE_ATMEGA_MCU) #define POWER_MAX 2 @@ -29,7 +31,7 @@ #define TIMER_MAX 6 #define GPIO_MAX 12 -typedef struct AtmegaMcuState { +struct AtmegaMcuState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -43,6 +45,6 @@ typedef struct AtmegaMcuState { AVRUsartState usart[USART_MAX]; AVRTimer16State timer[TIMER_MAX]; uint64_t xtal_freq_hz; -} AtmegaMcuState; +}; #endif /* HW_AVR_ATMEGA_H */ diff --git a/hw/block/nvme.h b/hw/block/nvme.h index 1d30c0bca2..02d576d7b2 100644 --- a/hw/block/nvme.h +++ b/hw/block/nvme.h @@ -2,6 +2,7 @@ #define HW_NVME_H #include "block/nvme.h" +#include "qom/object.h" typedef struct NvmeParams { char *serial; @@ -74,10 +75,11 @@ static inline uint8_t nvme_ns_lbads(NvmeNamespace *ns) } #define TYPE_NVME "nvme" +typedef struct NvmeCtrl NvmeCtrl; #define NVME(obj) \ OBJECT_CHECK(NvmeCtrl, (obj), TYPE_NVME) -typedef struct NvmeCtrl { +struct NvmeCtrl { PCIDevice parent_obj; MemoryRegion iomem; MemoryRegion ctrl_mem; @@ -107,7 +109,7 @@ typedef struct NvmeCtrl { NvmeSQueue admin_sq; NvmeCQueue admin_cq; NvmeIdCtrl id_ctrl; -} NvmeCtrl; +}; /* calculate the number of LBAs that the namespace can accomodate */ static inline uint64_t nvme_ns_nlbas(NvmeCtrl *n, NvmeNamespace *ns) diff --git a/hw/display/ati_int.h b/hw/display/ati_int.h index 2a16708e4f..2a8a3306da 100644 --- a/hw/display/ati_int.h +++ b/hw/display/ati_int.h @@ -13,6 +13,7 @@ #include "hw/pci/pci.h" #include "hw/i2c/bitbang_i2c.h" #include "vga_int.h" +#include "qom/object.h" /*#define DEBUG_ATI*/ @@ -29,6 +30,7 @@ #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159 #define TYPE_ATI_VGA "ati-vga" +typedef struct ATIVGAState ATIVGAState; #define ATI_VGA(obj) OBJECT_CHECK(ATIVGAState, (obj), TYPE_ATI_VGA) typedef struct ATIVGARegs { @@ -82,7 +84,7 @@ typedef struct ATIVGARegs { uint32_t default_sc_bottom_right; } ATIVGARegs; -typedef struct ATIVGAState { +struct ATIVGAState { PCIDevice dev; VGACommonState vga; char *model; @@ -97,7 +99,7 @@ typedef struct ATIVGAState { MemoryRegion io; MemoryRegion mm; ATIVGARegs regs; -} ATIVGAState; +}; const char *ati_reg_name(int num); diff --git a/hw/display/qxl.h b/hw/display/qxl.h index 707631a1f5..4ecb6b2934 100644 --- a/hw/display/qxl.h +++ b/hw/display/qxl.h @@ -8,6 +8,7 @@ #include "ui/qemu-spice.h" #include "ui/spice-display.h" +#include "qom/object.h" enum qxl_mode { QXL_MODE_UNDEFINED, @@ -27,7 +28,7 @@ enum qxl_mode { #define QXL_PAGE_BITS 12 #define QXL_PAGE_SIZE (1 << QXL_PAGE_BITS); -typedef struct PCIQXLDevice { +struct PCIQXLDevice { PCIDevice pci; PortioList vga_port_list; SimpleSpiceDisplay ssd; @@ -126,7 +127,8 @@ typedef struct PCIQXLDevice { int num_dirty_rects; QXLRect dirty[QXL_NUM_DIRTY_RECTS]; QEMUBH *update_area_bh; -} PCIQXLDevice; +}; +typedef struct PCIQXLDevice PCIQXLDevice; #define TYPE_PCI_QXL "pci-qxl" #define PCI_QXL(obj) OBJECT_CHECK(PCIQXLDevice, (obj), TYPE_PCI_QXL) diff --git a/hw/display/virtio-vga.h b/hw/display/virtio-vga.h index c41281a010..2d3b765bf9 100644 --- a/hw/display/virtio-vga.h +++ b/hw/display/virtio-vga.h @@ -3,11 +3,14 @@ #include "hw/virtio/virtio-gpu-pci.h" #include "vga_int.h" +#include "qom/object.h" /* * virtio-vga-base: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_VGA_BASE "virtio-vga-base" +typedef struct VirtIOVGABase VirtIOVGABase; +typedef struct VirtIOVGABaseClass VirtIOVGABaseClass; #define VIRTIO_VGA_BASE(obj) \ OBJECT_CHECK(VirtIOVGABase, (obj), TYPE_VIRTIO_VGA_BASE) #define VIRTIO_VGA_BASE_GET_CLASS(obj) \ @@ -15,18 +18,18 @@ #define VIRTIO_VGA_BASE_CLASS(klass) \ OBJECT_CLASS_CHECK(VirtIOVGABaseClass, klass, TYPE_VIRTIO_VGA_BASE) -typedef struct VirtIOVGABase { +struct VirtIOVGABase { VirtIOPCIProxy parent_obj; VirtIOGPUBase *vgpu; VGACommonState vga; MemoryRegion vga_mrs[3]; -} VirtIOVGABase; +}; -typedef struct VirtIOVGABaseClass { +struct VirtIOVGABaseClass { VirtioPCIClass parent_class; DeviceReset parent_reset; -} VirtIOVGABaseClass; +}; #endif /* VIRTIO_VGA_H */ diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h index e05a4eff5d..85860c36dd 100644 --- a/hw/i386/amd_iommu.h +++ b/hw/i386/amd_iommu.h @@ -23,6 +23,7 @@ #include "hw/pci/pci.h" #include "hw/i386/x86-iommu.h" +#include "qom/object.h" /* Capability registers */ #define AMDVI_CAPAB_BAR_LOW 0x04 @@ -296,6 +297,7 @@ struct irte_ga { }; #define TYPE_AMD_IOMMU_DEVICE "amd-iommu" +typedef struct AMDVIState AMDVIState; #define AMD_IOMMU_DEVICE(obj)\ OBJECT_CHECK(AMDVIState, (obj), TYPE_AMD_IOMMU_DEVICE) @@ -310,7 +312,7 @@ typedef struct AMDVIPCIState { PCIDevice dev; /* The PCI device itself */ } AMDVIPCIState; -typedef struct AMDVIState { +struct AMDVIState { X86IOMMUState iommu; /* IOMMU bus device */ AMDVIPCIState pci; /* IOMMU PCI device */ @@ -367,6 +369,6 @@ typedef struct AMDVIState { /* Interrupt remapping */ bool ga_enabled; -} AMDVIState; +}; #endif diff --git a/hw/misc/tmp105.h b/hw/misc/tmp105.h index 9ba05ecc9c..634bb4a0d6 100644 --- a/hw/misc/tmp105.h +++ b/hw/misc/tmp105.h @@ -16,8 +16,10 @@ #include "hw/i2c/i2c.h" #include "hw/misc/tmp105_regs.h" +#include "qom/object.h" #define TYPE_TMP105 "tmp105" +typedef struct TMP105State TMP105State; #define TMP105(obj) OBJECT_CHECK(TMP105State, (obj), TYPE_TMP105) /** @@ -27,7 +29,7 @@ * * @see_also: http://www.ti.com/lit/gpn/tmp105 */ -typedef struct TMP105State { +struct TMP105State { /*< private >*/ I2CSlave i2c; /*< public >*/ @@ -42,6 +44,6 @@ typedef struct TMP105State { int16_t limit[2]; int faults; uint8_t alarm; -} TMP105State; +}; #endif diff --git a/hw/net/fsl_etsec/etsec.h b/hw/net/fsl_etsec/etsec.h index 7951c3ad65..132a87b1ba 100644 --- a/hw/net/fsl_etsec/etsec.h +++ b/hw/net/fsl_etsec/etsec.h @@ -28,6 +28,7 @@ #include "hw/sysbus.h" #include "net/net.h" #include "hw/ptimer.h" +#include "qom/object.h" /* Buffer Descriptors */ @@ -104,7 +105,7 @@ typedef struct eTSEC_Register { uint32_t value; } eTSEC_Register; -typedef struct eTSEC { +struct eTSEC { SysBusDevice busdev; MemoryRegion io_area; @@ -145,7 +146,8 @@ typedef struct eTSEC { /* Whether we should flush the rx queue when buffer becomes available. */ bool need_flush; -} eTSEC; +}; +typedef struct eTSEC eTSEC; #define TYPE_ETSEC_COMMON "eTSEC" #define ETSEC_COMMON(obj) \ diff --git a/hw/net/rocker/rocker.h b/hw/net/rocker/rocker.h index e4c22db4ff..0dd49d5f41 100644 --- a/hw/net/rocker/rocker.h +++ b/hw/net/rocker/rocker.h @@ -20,6 +20,7 @@ #define ROCKER_H #include "qemu/sockets.h" +#include "qom/object.h" #if defined(DEBUG_ROCKER) # define DPRINTF(fmt, ...) \ diff --git a/hw/net/tulip.h b/hw/net/tulip.h index c3fcd4d4e1..5fe4aee87d 100644 --- a/hw/net/tulip.h +++ b/hw/net/tulip.h @@ -3,6 +3,7 @@ #include "qemu/units.h" #include "net/net.h" +#include "qom/object.h" #define TYPE_TULIP "tulip" typedef struct TULIPState TULIPState; diff --git a/hw/net/vmxnet3_defs.h b/hw/net/vmxnet3_defs.h index 65780c576d..1df1e4c3a6 100644 --- a/hw/net/vmxnet3_defs.h +++ b/hw/net/vmxnet3_defs.h @@ -19,8 +19,10 @@ #include "net/net.h" #include "hw/net/vmxnet3.h" +#include "qom/object.h" #define TYPE_VMXNET3 "vmxnet3" +typedef struct VMXNET3State VMXNET3State; #define VMXNET3(obj) OBJECT_CHECK(VMXNET3State, (obj), TYPE_VMXNET3) /* Device state and helper functions */ @@ -58,7 +60,7 @@ typedef struct { bool is_asserted; } Vmxnet3IntState; -typedef struct { +struct VMXNET3State { PCIDevice parent_obj; NICState *nic; NICConf conf; @@ -132,6 +134,6 @@ typedef struct { /* Compatibility flags for migration */ uint32_t compat_flags; -} VMXNET3State; +}; #endif diff --git a/hw/ppc/e500-ccsr.h b/hw/ppc/e500-ccsr.h index 12a2ba4b97..f7fd73fc0d 100644 --- a/hw/ppc/e500-ccsr.h +++ b/hw/ppc/e500-ccsr.h @@ -2,14 +2,16 @@ #define E500_CCSR_H #include "hw/sysbus.h" +#include "qom/object.h" -typedef struct PPCE500CCSRState { +struct PPCE500CCSRState { /*< private >*/ SysBusDevice parent; /*< public >*/ MemoryRegion ccsr_space; -} PPCE500CCSRState; +}; +typedef struct PPCE500CCSRState PPCE500CCSRState; #define TYPE_CCSR "e500-ccsr" #define CCSR(obj) OBJECT_CHECK(PPCE500CCSRState, (obj), TYPE_CCSR) diff --git a/hw/ppc/e500.h b/hw/ppc/e500.h index 3fd9f825ca..5773460d5e 100644 --- a/hw/ppc/e500.h +++ b/hw/ppc/e500.h @@ -3,8 +3,9 @@ #include "hw/boards.h" #include "hw/platform-bus.h" +#include "qom/object.h" -typedef struct PPCE500MachineState { +struct PPCE500MachineState { /*< private >*/ MachineState parent_obj; @@ -12,9 +13,10 @@ typedef struct PPCE500MachineState { * board supports dynamic sysbus devices */ PlatformBusDevice *pbus_dev; -} PPCE500MachineState; +}; +typedef struct PPCE500MachineState PPCE500MachineState; -typedef struct PPCE500MachineClass { +struct PPCE500MachineClass { /*< private >*/ MachineClass parent_class; @@ -36,7 +38,8 @@ typedef struct PPCE500MachineClass { hwaddr pci_mmio_base; hwaddr pci_mmio_bus_base; hwaddr spin_base; -} PPCE500MachineClass; +}; +typedef struct PPCE500MachineClass PPCE500MachineClass; void ppce500_init(MachineState *machine); diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h index 6af87d1fa0..f4ef3f32b0 100644 --- a/hw/ppc/mac.h +++ b/hw/ppc/mac.h @@ -34,6 +34,7 @@ #include "hw/misc/mos6522.h" #include "hw/pci/pci_host.h" #include "hw/pci-host/uninorth.h" +#include "qom/object.h" /* SMP is not enabled, for now */ #define MAX_CPUS 1 @@ -71,6 +72,7 @@ /* Core99 machine */ #define TYPE_CORE99_MACHINE MACHINE_TYPE_NAME("mac99") +typedef struct Core99MachineState Core99MachineState; #define CORE99_MACHINE(obj) OBJECT_CHECK(Core99MachineState, (obj), \ TYPE_CORE99_MACHINE) @@ -78,22 +80,23 @@ #define CORE99_VIA_CONFIG_PMU 0x1 #define CORE99_VIA_CONFIG_PMU_ADB 0x2 -typedef struct Core99MachineState { +struct Core99MachineState { /*< private >*/ MachineState parent; uint8_t via_config; -} Core99MachineState; +}; /* Grackle PCI */ #define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost" /* Mac NVRAM */ #define TYPE_MACIO_NVRAM "macio-nvram" +typedef struct MacIONVRAMState MacIONVRAMState; #define MACIO_NVRAM(obj) \ OBJECT_CHECK(MacIONVRAMState, (obj), TYPE_MACIO_NVRAM) -typedef struct MacIONVRAMState { +struct MacIONVRAMState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -103,7 +106,7 @@ typedef struct MacIONVRAMState { MemoryRegion mem; uint8_t *data; -} MacIONVRAMState; +}; void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len); #endif /* PPC_MAC_H */ diff --git a/hw/rdma/vmw/pvrdma.h b/hw/rdma/vmw/pvrdma.h index a8a04a253c..db9d9e2c73 100644 --- a/hw/rdma/vmw/pvrdma.h +++ b/hw/rdma/vmw/pvrdma.h @@ -29,6 +29,7 @@ #include "standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_ring.h" #include "standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h" #include "pvrdma_dev_ring.h" +#include "qom/object.h" /* BARs */ #define RDMA_MSIX_BAR_IDX 0 @@ -78,7 +79,7 @@ typedef struct PVRDMADevStats { uint64_t interrupts; } PVRDMADevStats; -typedef struct PVRDMADev { +struct PVRDMADev { PCIDevice parent_obj; MemoryRegion msix; MemoryRegion regs; @@ -98,7 +99,8 @@ typedef struct PVRDMADev { VMXNET3State *func0; Notifier shutdown_notifier; PVRDMADevStats stats; -} PVRDMADev; +}; +typedef struct PVRDMADev PVRDMADev; #define PVRDMA_DEV(dev) OBJECT_CHECK(PVRDMADev, (dev), PVRDMA_HW_NAME) static inline int get_reg_val(PVRDMADev *dev, hwaddr addr, uint32_t *val) diff --git a/hw/s390x/ccw-device.h b/hw/s390x/ccw-device.h index 4e6af287e7..867547b4eb 100644 --- a/hw/s390x/ccw-device.h +++ b/hw/s390x/ccw-device.h @@ -15,7 +15,7 @@ #include "hw/qdev-core.h" #include "hw/s390x/css.h" -typedef struct CcwDevice { +struct CcwDevice { DeviceState parent_obj; SubchDev *sch; /* .. */ @@ -25,18 +25,20 @@ typedef struct CcwDevice { CssDevId dev_id; /* The actual busid of the virtual subchannel. */ CssDevId subch_id; -} CcwDevice; +}; +typedef struct CcwDevice CcwDevice; extern const VMStateDescription vmstate_ccw_dev; #define VMSTATE_CCW_DEVICE(_field, _state) \ VMSTATE_STRUCT(_field, _state, 1, vmstate_ccw_dev, CcwDevice) -typedef struct CCWDeviceClass { +struct CCWDeviceClass { DeviceClass parent_class; void (*unplug)(HotplugHandler *, DeviceState *, Error **); void (*realize)(CcwDevice *, Error **); void (*refill_ids)(CcwDevice *); -} CCWDeviceClass; +}; +typedef struct CCWDeviceClass CCWDeviceClass; static inline CcwDevice *to_ccw_dev_fast(DeviceState *d) { diff --git a/hw/s390x/ipl.h b/hw/s390x/ipl.h index 53cc9eb5ac..282b22cc4f 100644 --- a/hw/s390x/ipl.h +++ b/hw/s390x/ipl.h @@ -16,6 +16,7 @@ #include "cpu.h" #include "exec/address-spaces.h" #include "hw/qdev-core.h" +#include "qom/object.h" struct IPLBlockPVComp { uint64_t tweak_pref; @@ -152,6 +153,7 @@ struct QemuIplParameters { typedef struct QemuIplParameters QemuIplParameters; #define TYPE_S390_IPL "s390-ipl" +typedef struct S390IPLState S390IPLState; #define S390_IPL(obj) OBJECT_CHECK(S390IPLState, (obj), TYPE_S390_IPL) struct S390IPLState { @@ -183,7 +185,6 @@ struct S390IPLState { uint16_t devno; bool iplbext_migration; }; -typedef struct S390IPLState S390IPLState; QEMU_BUILD_BUG_MSG(offsetof(S390IPLState, iplb) & 3, "alignment of iplb wrong"); #define DIAG_308_RC_OK 0x0001 diff --git a/hw/s390x/s390-pci-bus.h b/hw/s390x/s390-pci-bus.h index 550f3cc5e9..06f046e73a 100644 --- a/hw/s390x/s390-pci-bus.h +++ b/hw/s390x/s390-pci-bus.h @@ -19,6 +19,7 @@ #include "hw/s390x/sclp.h" #include "hw/s390x/s390_flic.h" #include "hw/s390x/css.h" +#include "qom/object.h" #define TYPE_S390_PCI_HOST_BRIDGE "s390-pcihost" #define TYPE_S390_PCI_BUS "s390-pcibus" @@ -36,12 +37,16 @@ #define UID_UNDEFINED 0 #define UID_CHECKING_ENABLED 0x01 +typedef struct S390pciState S390pciState; #define S390_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(S390pciState, (obj), TYPE_S390_PCI_HOST_BRIDGE) +typedef struct S390PCIBus S390PCIBus; #define S390_PCI_BUS(obj) \ OBJECT_CHECK(S390PCIBus, (obj), TYPE_S390_PCI_BUS) +typedef struct S390PCIBusDevice S390PCIBusDevice; #define S390_PCI_DEVICE(obj) \ OBJECT_CHECK(S390PCIBusDevice, (obj), TYPE_S390_PCI_DEVICE) +typedef struct S390PCIIOMMU S390PCIIOMMU; #define S390_PCI_IOMMU(obj) \ OBJECT_CHECK(S390PCIIOMMU, (obj), TYPE_S390_PCI_IOMMU) @@ -265,8 +270,7 @@ typedef struct S390IOTLBEntry { uint64_t perm; } S390IOTLBEntry; -typedef struct S390PCIBusDevice S390PCIBusDevice; -typedef struct S390PCIIOMMU { +struct S390PCIIOMMU { Object parent_obj; S390PCIBusDevice *pbdev; AddressSpace as; @@ -277,7 +281,7 @@ typedef struct S390PCIIOMMU { uint64_t pba; uint64_t pal; GHashTable *iotlb; -} S390PCIIOMMU; +}; typedef struct S390PCIIOMMUTable { uint64_t key; @@ -339,11 +343,11 @@ struct S390PCIBusDevice { QTAILQ_ENTRY(S390PCIBusDevice) link; }; -typedef struct S390PCIBus { +struct S390PCIBus { BusState qbus; -} S390PCIBus; +}; -typedef struct S390pciState { +struct S390pciState { PCIHostState parent_obj; uint32_t next_idx; int bus_no; @@ -352,7 +356,7 @@ typedef struct S390pciState { GHashTable *zpci_table; QTAILQ_HEAD(, SeiContainer) pending_sei; QTAILQ_HEAD(, S390PCIBusDevice) zpci_devs; -} S390pciState; +}; S390pciState *s390_get_phb(void); int pci_chsc_sei_nt2_get_event(void *res); diff --git a/hw/s390x/virtio-ccw.h b/hw/s390x/virtio-ccw.h index b281896f7d..c046c816c9 100644 --- a/hw/s390x/virtio-ccw.h +++ b/hw/s390x/virtio-ccw.h @@ -17,6 +17,7 @@ #include "hw/virtio/virtio-net.h" #include "hw/virtio/virtio-serial.h" #include "hw/virtio/virtio-scsi.h" +#include "qom/object.h" #ifdef CONFIG_VHOST_SCSI #include "hw/virtio/vhost-scsi.h" #endif @@ -53,6 +54,8 @@ #define CCW_CMD_SET_VIRTIO_REV 0x83 #define TYPE_VIRTIO_CCW_DEVICE "virtio-ccw-device" +typedef struct VirtIOCCWDeviceClass VirtIOCCWDeviceClass; +typedef struct VirtioCcwDevice VirtioCcwDevice; #define VIRTIO_CCW_DEVICE(obj) \ OBJECT_CHECK(VirtioCcwDevice, (obj), TYPE_VIRTIO_CCW_DEVICE) #define VIRTIO_CCW_DEVICE_CLASS(klass) \ @@ -71,14 +74,13 @@ typedef struct VirtioBusClass VirtioCcwBusClass; #define VIRTIO_CCW_BUS_CLASS(klass) \ OBJECT_CLASS_CHECK(VirtioCcwBusClass, klass, TYPE_VIRTIO_CCW_BUS) -typedef struct VirtioCcwDevice VirtioCcwDevice; -typedef struct VirtIOCCWDeviceClass { +struct VirtIOCCWDeviceClass { CCWDeviceClass parent_class; void (*realize)(VirtioCcwDevice *dev, Error **errp); void (*unrealize)(VirtioCcwDevice *dev); void (*parent_reset)(DeviceState *dev); -} VirtIOCCWDeviceClass; +}; /* Performance improves when virtqueue kick processing is decoupled from the * vcpu thread using ioeventfd for some devices. */ @@ -111,92 +113,100 @@ static inline int virtio_ccw_rev_max(VirtioCcwDevice *dev) /* virtio-scsi-ccw */ #define TYPE_VIRTIO_SCSI_CCW "virtio-scsi-ccw" +typedef struct VirtIOSCSICcw VirtIOSCSICcw; #define VIRTIO_SCSI_CCW(obj) \ OBJECT_CHECK(VirtIOSCSICcw, (obj), TYPE_VIRTIO_SCSI_CCW) -typedef struct VirtIOSCSICcw { +struct VirtIOSCSICcw { VirtioCcwDevice parent_obj; VirtIOSCSI vdev; -} VirtIOSCSICcw; +}; #ifdef CONFIG_VHOST_SCSI /* vhost-scsi-ccw */ #define TYPE_VHOST_SCSI_CCW "vhost-scsi-ccw" +typedef struct VHostSCSICcw VHostSCSICcw; #define VHOST_SCSI_CCW(obj) \ OBJECT_CHECK(VHostSCSICcw, (obj), TYPE_VHOST_SCSI_CCW) -typedef struct VHostSCSICcw { +struct VHostSCSICcw { VirtioCcwDevice parent_obj; VHostSCSI vdev; -} VHostSCSICcw; +}; #endif /* virtio-blk-ccw */ #define TYPE_VIRTIO_BLK_CCW "virtio-blk-ccw" +typedef struct VirtIOBlkCcw VirtIOBlkCcw; #define VIRTIO_BLK_CCW(obj) \ OBJECT_CHECK(VirtIOBlkCcw, (obj), TYPE_VIRTIO_BLK_CCW) -typedef struct VirtIOBlkCcw { +struct VirtIOBlkCcw { VirtioCcwDevice parent_obj; VirtIOBlock vdev; -} VirtIOBlkCcw; +}; /* virtio-balloon-ccw */ #define TYPE_VIRTIO_BALLOON_CCW "virtio-balloon-ccw" +typedef struct VirtIOBalloonCcw VirtIOBalloonCcw; #define VIRTIO_BALLOON_CCW(obj) \ OBJECT_CHECK(VirtIOBalloonCcw, (obj), TYPE_VIRTIO_BALLOON_CCW) -typedef struct VirtIOBalloonCcw { +struct VirtIOBalloonCcw { VirtioCcwDevice parent_obj; VirtIOBalloon vdev; -} VirtIOBalloonCcw; +}; /* virtio-serial-ccw */ #define TYPE_VIRTIO_SERIAL_CCW "virtio-serial-ccw" +typedef struct VirtioSerialCcw VirtioSerialCcw; #define VIRTIO_SERIAL_CCW(obj) \ OBJECT_CHECK(VirtioSerialCcw, (obj), TYPE_VIRTIO_SERIAL_CCW) -typedef struct VirtioSerialCcw { +struct VirtioSerialCcw { VirtioCcwDevice parent_obj; VirtIOSerial vdev; -} VirtioSerialCcw; +}; /* virtio-net-ccw */ #define TYPE_VIRTIO_NET_CCW "virtio-net-ccw" +typedef struct VirtIONetCcw VirtIONetCcw; #define VIRTIO_NET_CCW(obj) \ OBJECT_CHECK(VirtIONetCcw, (obj), TYPE_VIRTIO_NET_CCW) -typedef struct VirtIONetCcw { +struct VirtIONetCcw { VirtioCcwDevice parent_obj; VirtIONet vdev; -} VirtIONetCcw; +}; /* virtio-rng-ccw */ #define TYPE_VIRTIO_RNG_CCW "virtio-rng-ccw" +typedef struct VirtIORNGCcw VirtIORNGCcw; #define VIRTIO_RNG_CCW(obj) \ OBJECT_CHECK(VirtIORNGCcw, (obj), TYPE_VIRTIO_RNG_CCW) -typedef struct VirtIORNGCcw { +struct VirtIORNGCcw { VirtioCcwDevice parent_obj; VirtIORNG vdev; -} VirtIORNGCcw; +}; /* virtio-crypto-ccw */ #define TYPE_VIRTIO_CRYPTO_CCW "virtio-crypto-ccw" +typedef struct VirtIOCryptoCcw VirtIOCryptoCcw; #define VIRTIO_CRYPTO_CCW(obj) \ OBJECT_CHECK(VirtIOCryptoCcw, (obj), TYPE_VIRTIO_CRYPTO_CCW) -typedef struct VirtIOCryptoCcw { +struct VirtIOCryptoCcw { VirtioCcwDevice parent_obj; VirtIOCrypto vdev; -} VirtIOCryptoCcw; +}; VirtIODevice *virtio_ccw_get_vdev(SubchDev *sch); @@ -204,56 +214,61 @@ VirtIODevice *virtio_ccw_get_vdev(SubchDev *sch); #include "hw/9pfs/virtio-9p.h" #define TYPE_VIRTIO_9P_CCW "virtio-9p-ccw" +typedef struct V9fsCCWState V9fsCCWState; #define VIRTIO_9P_CCW(obj) \ OBJECT_CHECK(V9fsCCWState, (obj), TYPE_VIRTIO_9P_CCW) -typedef struct V9fsCCWState { +struct V9fsCCWState { VirtioCcwDevice parent_obj; V9fsVirtioState vdev; -} V9fsCCWState; +}; #endif /* CONFIG_VIRTFS */ #ifdef CONFIG_VHOST_VSOCK #define TYPE_VHOST_VSOCK_CCW "vhost-vsock-ccw" +typedef struct VHostVSockCCWState VHostVSockCCWState; #define VHOST_VSOCK_CCW(obj) \ OBJECT_CHECK(VHostVSockCCWState, (obj), TYPE_VHOST_VSOCK_CCW) -typedef struct VHostVSockCCWState { +struct VHostVSockCCWState { VirtioCcwDevice parent_obj; VHostVSock vdev; -} VHostVSockCCWState; +}; #endif /* CONFIG_VHOST_VSOCK */ #define TYPE_VIRTIO_GPU_CCW "virtio-gpu-ccw" +typedef struct VirtIOGPUCcw VirtIOGPUCcw; #define VIRTIO_GPU_CCW(obj) \ OBJECT_CHECK(VirtIOGPUCcw, (obj), TYPE_VIRTIO_GPU_CCW) -typedef struct VirtIOGPUCcw { +struct VirtIOGPUCcw { VirtioCcwDevice parent_obj; VirtIOGPU vdev; -} VirtIOGPUCcw; +}; #define TYPE_VIRTIO_INPUT_CCW "virtio-input-ccw" +typedef struct VirtIOInputCcw VirtIOInputCcw; #define VIRTIO_INPUT_CCW(obj) \ OBJECT_CHECK(VirtIOInputCcw, (obj), TYPE_VIRTIO_INPUT_CCW) -typedef struct VirtIOInputCcw { +struct VirtIOInputCcw { VirtioCcwDevice parent_obj; VirtIOInput vdev; -} VirtIOInputCcw; +}; #define TYPE_VIRTIO_INPUT_HID_CCW "virtio-input-hid-ccw" #define TYPE_VIRTIO_KEYBOARD_CCW "virtio-keyboard-ccw" #define TYPE_VIRTIO_MOUSE_CCW "virtio-mouse-ccw" #define TYPE_VIRTIO_TABLET_CCW "virtio-tablet-ccw" +typedef struct VirtIOInputHIDCcw VirtIOInputHIDCcw; #define VIRTIO_INPUT_HID_CCW(obj) \ OBJECT_CHECK(VirtIOInputHIDCcw, (obj), TYPE_VIRTIO_INPUT_HID_CCW) -typedef struct VirtIOInputHIDCcw { +struct VirtIOInputHIDCcw { VirtioCcwDevice parent_obj; VirtIOInputHID vdev; -} VirtIOInputHIDCcw; +}; #endif diff --git a/hw/scsi/mptsas.h b/hw/scsi/mptsas.h index 9ac98fc20e..2e76bda79e 100644 --- a/hw/scsi/mptsas.h +++ b/hw/scsi/mptsas.h @@ -2,6 +2,7 @@ #define MPTSAS_H #include "mpi.h" +#include "qom/object.h" #define MPTSAS_NUM_PORTS 8 #define MPTSAS_MAX_FRAMES 2048 /* Firmware limit at 65535 */ diff --git a/hw/usb/ccid.h b/hw/usb/ccid.h index 531bf28fb0..b992d2ccf8 100644 --- a/hw/usb/ccid.h +++ b/hw/usb/ccid.h @@ -11,11 +11,13 @@ #define CCID_H #include "hw/qdev-core.h" +#include "qom/object.h" typedef struct CCIDCardState CCIDCardState; typedef struct CCIDCardInfo CCIDCardInfo; #define TYPE_CCID_CARD "ccid-card" +typedef struct CCIDCardClass CCIDCardClass; #define CCID_CARD(obj) \ OBJECT_CHECK(CCIDCardState, (obj), TYPE_CCID_CARD) #define CCID_CARD_CLASS(klass) \ @@ -27,7 +29,7 @@ typedef struct CCIDCardInfo CCIDCardInfo; * callbacks to be used by the CCID device (hw/usb-ccid.c) to call * into the smartcard device (hw/ccid-card-*.c) */ -typedef struct CCIDCardClass { +struct CCIDCardClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -37,7 +39,7 @@ typedef struct CCIDCardClass { uint32_t len); void (*realize)(CCIDCardState *card, Error **errp); void (*unrealize)(CCIDCardState *card); -} CCIDCardClass; +}; /* * state of the CCID Card device (i.e. hw/ccid-card-*.c) diff --git a/hw/usb/hcd-dwc2.h b/hw/usb/hcd-dwc2.h index 54111d835e..71b40f0d8a 100644 --- a/hw/usb/hcd-dwc2.h +++ b/hw/usb/hcd-dwc2.h @@ -24,6 +24,7 @@ #include "hw/sysbus.h" #include "hw/usb.h" #include "sysemu/dma.h" +#include "qom/object.h" #define DWC2_MMIO_SIZE 0x11000 diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h index 57b38cfc05..c12c9bae46 100644 --- a/hw/usb/hcd-ehci.h +++ b/hw/usb/hcd-ehci.h @@ -23,6 +23,7 @@ #include "sysemu/dma.h" #include "hw/pci/pci.h" #include "hw/sysbus.h" +#include "qom/object.h" #ifndef EHCI_DEBUG #define EHCI_DEBUG 0 @@ -328,15 +329,16 @@ void usb_ehci_unrealize(EHCIState *s, DeviceState *dev); void ehci_reset(void *opaque); #define TYPE_PCI_EHCI "pci-ehci-usb" +typedef struct EHCIPCIState EHCIPCIState; #define PCI_EHCI(obj) OBJECT_CHECK(EHCIPCIState, (obj), TYPE_PCI_EHCI) -typedef struct EHCIPCIState { +struct EHCIPCIState { /*< private >*/ PCIDevice pcidev; /*< public >*/ EHCIState ehci; -} EHCIPCIState; +}; #define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb" @@ -347,6 +349,8 @@ typedef struct EHCIPCIState { #define TYPE_PPC4xx_EHCI "ppc4xx-ehci-usb" #define TYPE_FUSBH200_EHCI "fusbh200-ehci-usb" +typedef struct EHCISysBusState EHCISysBusState; +typedef struct SysBusEHCIClass SysBusEHCIClass; #define SYS_BUS_EHCI(obj) \ OBJECT_CHECK(EHCISysBusState, (obj), TYPE_SYS_BUS_EHCI) #define SYS_BUS_EHCI_CLASS(class) \ @@ -354,15 +358,15 @@ typedef struct EHCIPCIState { #define SYS_BUS_EHCI_GET_CLASS(obj) \ OBJECT_GET_CLASS(SysBusEHCIClass, (obj), TYPE_SYS_BUS_EHCI) -typedef struct EHCISysBusState { +struct EHCISysBusState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ EHCIState ehci; -} EHCISysBusState; +}; -typedef struct SysBusEHCIClass { +struct SysBusEHCIClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ @@ -371,17 +375,18 @@ typedef struct SysBusEHCIClass { uint16_t opregbase; uint16_t portscbase; uint16_t portnr; -} SysBusEHCIClass; +}; +typedef struct FUSBH200EHCIState FUSBH200EHCIState; #define FUSBH200_EHCI(obj) \ OBJECT_CHECK(FUSBH200EHCIState, (obj), TYPE_FUSBH200_EHCI) -typedef struct FUSBH200EHCIState { +struct FUSBH200EHCIState { /*< private >*/ EHCISysBusState parent_obj; /*< public >*/ MemoryRegion mem_vendor; -} FUSBH200EHCIState; +}; #endif diff --git a/hw/usb/hcd-ohci.h b/hw/usb/hcd-ohci.h index 5c8819aedf..3e9053fb26 100644 --- a/hw/usb/hcd-ohci.h +++ b/hw/usb/hcd-ohci.h @@ -23,6 +23,7 @@ #include "sysemu/dma.h" #include "hw/usb.h" +#include "qom/object.h" /* Number of Downstream Ports on the root hub: */ #define OHCI_MAX_PORTS 15 @@ -92,9 +93,10 @@ typedef struct OHCIState { } OHCIState; #define TYPE_SYSBUS_OHCI "sysbus-ohci" +typedef struct OHCISysBusState OHCISysBusState; #define SYSBUS_OHCI(obj) OBJECT_CHECK(OHCISysBusState, (obj), TYPE_SYSBUS_OHCI) -typedef struct { +struct OHCISysBusState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -104,7 +106,7 @@ typedef struct { uint32_t num_ports; uint32_t firstport; dma_addr_t dma_offset; -} OHCISysBusState; +}; extern const VMStateDescription vmstate_ohci_state; diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 946af51fc2..867388a061 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -21,11 +21,13 @@ #ifndef HW_USB_HCD_XHCI_H #define HW_USB_HCD_XHCI_H +#include "qom/object.h" #define TYPE_XHCI "base-xhci" #define TYPE_NEC_XHCI "nec-usb-xhci" #define TYPE_QEMU_XHCI "qemu-xhci" +typedef struct XHCIState XHCIState; #define XHCI(obj) \ OBJECT_CHECK(XHCIState, (obj), TYPE_XHCI) @@ -39,7 +41,6 @@ /* Very pessimistic, let's hope it's enough for all cases */ #define EV_QUEUE (((3 * 24) + 16) * MAXSLOTS) -typedef struct XHCIState XHCIState; typedef struct XHCIStreamContext XHCIStreamContext; typedef struct XHCIEPContext XHCIEPContext; diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index 3c0dca024b..8c1f94118a 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -18,6 +18,7 @@ #include "qemu/event_notifier.h" #include "qemu/queue.h" #include "qemu/timer.h" +#include "qom/object.h" #define PCI_ANY_ID (~0) @@ -114,9 +115,10 @@ typedef struct VFIOMSIXInfo { } VFIOMSIXInfo; #define TYPE_VFIO_PCI "vfio-pci" +typedef struct VFIOPCIDevice VFIOPCIDevice; #define PCI_VFIO(obj) OBJECT_CHECK(VFIOPCIDevice, obj, TYPE_VFIO_PCI) -typedef struct VFIOPCIDevice { +struct VFIOPCIDevice { PCIDevice pdev; VFIODevice vbasedev; VFIOINTx intx; @@ -173,7 +175,7 @@ typedef struct VFIOPCIDevice { VFIODisplay *dpy; Error *migration_blocker; Notifier irqchip_change_notifier; -} VFIOPCIDevice; +}; /* Use uin32_t for vendor & device so PCI_ANY_ID expands and cannot match hw */ static inline bool vfio_pci_is(VFIOPCIDevice *vdev, uint32_t vendor, uint32_t device) diff --git a/hw/virtio/virtio-mem-pci.h b/hw/virtio/virtio-mem-pci.h index b51a28b275..65b86beac7 100644 --- a/hw/virtio/virtio-mem-pci.h +++ b/hw/virtio/virtio-mem-pci.h @@ -15,6 +15,7 @@ #include "hw/virtio/virtio-pci.h" #include "hw/virtio/virtio-mem.h" +#include "qom/object.h" typedef struct VirtIOMEMPCI VirtIOMEMPCI; diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index e2eaaa9182..9175da6e81 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -17,6 +17,7 @@ #include "hw/pci/msi.h" #include "hw/virtio/virtio-bus.h" +#include "qom/object.h" typedef struct VirtIOPCIProxy VirtIOPCIProxy; @@ -94,6 +95,7 @@ typedef struct { * virtio-pci: This is the PCIDevice which has a virtio-pci-bus. */ #define TYPE_VIRTIO_PCI "virtio-pci" +typedef struct VirtioPCIClass VirtioPCIClass; #define VIRTIO_PCI_GET_CLASS(obj) \ OBJECT_GET_CLASS(VirtioPCIClass, obj, TYPE_VIRTIO_PCI) #define VIRTIO_PCI_CLASS(klass) \ @@ -101,11 +103,11 @@ typedef struct { #define VIRTIO_PCI(obj) \ OBJECT_CHECK(VirtIOPCIProxy, (obj), TYPE_VIRTIO_PCI) -typedef struct VirtioPCIClass { +struct VirtioPCIClass { PCIDeviceClass parent_class; DeviceRealize parent_dc_realize; void (*realize)(VirtIOPCIProxy *vpci_dev, Error **errp); -} VirtioPCIClass; +}; typedef struct VirtIOPCIRegion { MemoryRegion mr; diff --git a/hw/virtio/virtio-pmem-pci.h b/hw/virtio/virtio-pmem-pci.h index 616abef093..5ac8099637 100644 --- a/hw/virtio/virtio-pmem-pci.h +++ b/hw/virtio/virtio-pmem-pci.h @@ -16,6 +16,7 @@ #include "hw/virtio/virtio-pci.h" #include "hw/virtio/virtio-pmem.h" +#include "qom/object.h" typedef struct VirtIOPMEMPCI VirtIOPMEMPCI; diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h index 6e9cec95f3..c367c7da27 100644 --- a/hw/xen/xen_pt.h +++ b/hw/xen/xen_pt.h @@ -4,6 +4,7 @@ #include "hw/xen/xen_common.h" #include "hw/pci/pci.h" #include "xen-host-pci-device.h" +#include "qom/object.h" bool xen_igd_gfx_pt_enabled(void); void xen_igd_gfx_pt_set(bool value, Error **errp); diff --git a/include/authz/base.h b/include/authz/base.h index 0782981ad8..c01946b4ce 100644 --- a/include/authz/base.h +++ b/include/authz/base.h @@ -27,6 +27,8 @@ #define TYPE_QAUTHZ "authz" +typedef struct QAuthZ QAuthZ; +typedef struct QAuthZClass QAuthZClass; #define QAUTHZ_CLASS(klass) \ OBJECT_CLASS_CHECK(QAuthZClass, (klass), \ TYPE_QAUTHZ) @@ -37,8 +39,6 @@ OBJECT_CHECK(QAuthZ, (obj), \ TYPE_QAUTHZ) -typedef struct QAuthZ QAuthZ; -typedef struct QAuthZClass QAuthZClass; /** * QAuthZ: diff --git a/include/authz/list.h b/include/authz/list.h index a88cdbbcf8..5d5e8e803f 100644 --- a/include/authz/list.h +++ b/include/authz/list.h @@ -23,9 +23,12 @@ #include "authz/base.h" #include "qapi/qapi-types-authz.h" +#include "qom/object.h" #define TYPE_QAUTHZ_LIST "authz-list" +typedef struct QAuthZList QAuthZList; +typedef struct QAuthZListClass QAuthZListClass; #define QAUTHZ_LIST_CLASS(klass) \ OBJECT_CLASS_CHECK(QAuthZListClass, (klass), \ TYPE_QAUTHZ_LIST) @@ -36,8 +39,6 @@ OBJECT_CHECK(QAuthZList, (obj), \ TYPE_QAUTHZ_LIST) -typedef struct QAuthZList QAuthZList; -typedef struct QAuthZListClass QAuthZListClass; /** diff --git a/include/authz/listfile.h b/include/authz/listfile.h index 24ae2e606c..11169ac882 100644 --- a/include/authz/listfile.h +++ b/include/authz/listfile.h @@ -23,9 +23,12 @@ #include "authz/list.h" #include "qemu/filemonitor.h" +#include "qom/object.h" #define TYPE_QAUTHZ_LIST_FILE "authz-list-file" +typedef struct QAuthZListFile QAuthZListFile; +typedef struct QAuthZListFileClass QAuthZListFileClass; #define QAUTHZ_LIST_FILE_CLASS(klass) \ OBJECT_CLASS_CHECK(QAuthZListFileClass, (klass), \ TYPE_QAUTHZ_LIST_FILE) @@ -36,8 +39,6 @@ OBJECT_CHECK(QAuthZListFile, (obj), \ TYPE_QAUTHZ_LIST_FILE) -typedef struct QAuthZListFile QAuthZListFile; -typedef struct QAuthZListFileClass QAuthZListFileClass; /** diff --git a/include/authz/pamacct.h b/include/authz/pamacct.h index f3a7ef1011..a14cf33fb4 100644 --- a/include/authz/pamacct.h +++ b/include/authz/pamacct.h @@ -22,10 +22,13 @@ #define QAUTHZ_PAMACCT_H #include "authz/base.h" +#include "qom/object.h" #define TYPE_QAUTHZ_PAM "authz-pam" +typedef struct QAuthZPAM QAuthZPAM; +typedef struct QAuthZPAMClass QAuthZPAMClass; #define QAUTHZ_PAM_CLASS(klass) \ OBJECT_CLASS_CHECK(QAuthZPAMClass, (klass), \ TYPE_QAUTHZ_PAM) @@ -36,8 +39,6 @@ OBJECT_CHECK(QAuthZPAM, (obj), \ TYPE_QAUTHZ_PAM) -typedef struct QAuthZPAM QAuthZPAM; -typedef struct QAuthZPAMClass QAuthZPAMClass; /** diff --git a/include/authz/simple.h b/include/authz/simple.h index 2b7ab0cdd9..df8c1bf39c 100644 --- a/include/authz/simple.h +++ b/include/authz/simple.h @@ -22,9 +22,12 @@ #define QAUTHZ_SIMPLE_H #include "authz/base.h" +#include "qom/object.h" #define TYPE_QAUTHZ_SIMPLE "authz-simple" +typedef struct QAuthZSimple QAuthZSimple; +typedef struct QAuthZSimpleClass QAuthZSimpleClass; #define QAUTHZ_SIMPLE_CLASS(klass) \ OBJECT_CLASS_CHECK(QAuthZSimpleClass, (klass), \ TYPE_QAUTHZ_SIMPLE) @@ -35,8 +38,6 @@ OBJECT_CHECK(QAuthZSimple, (obj), \ TYPE_QAUTHZ_SIMPLE) -typedef struct QAuthZSimple QAuthZSimple; -typedef struct QAuthZSimpleClass QAuthZSimpleClass; /** diff --git a/include/block/throttle-groups.h b/include/block/throttle-groups.h index 5e77db700f..7c6f572cf9 100644 --- a/include/block/throttle-groups.h +++ b/include/block/throttle-groups.h @@ -27,6 +27,7 @@ #include "qemu/throttle.h" #include "block/block_int.h" +#include "qom/object.h" /* The ThrottleGroupMember structure indicates membership in a ThrottleGroup * and holds related data. diff --git a/include/chardev/char-fd.h b/include/chardev/char-fd.h index e7c2b176f9..1442dcaa62 100644 --- a/include/chardev/char-fd.h +++ b/include/chardev/char-fd.h @@ -26,13 +26,15 @@ #include "io/channel.h" #include "chardev/char.h" +#include "qom/object.h" -typedef struct FDChardev { +struct FDChardev { Chardev parent; QIOChannel *ioc_in, *ioc_out; int max_size; -} FDChardev; +}; +typedef struct FDChardev FDChardev; #define TYPE_CHARDEV_FD "chardev-fd" diff --git a/include/chardev/char-win.h b/include/chardev/char-win.h index fa59e9e423..f1632330f1 100644 --- a/include/chardev/char-win.h +++ b/include/chardev/char-win.h @@ -25,8 +25,9 @@ #define CHAR_WIN_H #include "chardev/char.h" +#include "qom/object.h" -typedef struct { +struct WinChardev { Chardev parent; bool keep_open; /* console do not close file */ @@ -36,7 +37,8 @@ typedef struct { /* Protected by the Chardev chr_write_lock. */ OVERLAPPED osend; -} WinChardev; +}; +typedef struct WinChardev WinChardev; #define NSENDBUF 2048 #define NRECVBUF 2048 diff --git a/include/chardev/char.h b/include/chardev/char.h index 00589a6025..d91d851b33 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -226,6 +226,7 @@ int qemu_chr_write(Chardev *s, const uint8_t *buf, int len, bool write_all); int qemu_chr_wait_connected(Chardev *chr, Error **errp); #define TYPE_CHARDEV "chardev" +typedef struct ChardevClass ChardevClass; #define CHARDEV(obj) OBJECT_CHECK(Chardev, (obj), TYPE_CHARDEV) #define CHARDEV_CLASS(klass) \ OBJECT_CLASS_CHECK(ChardevClass, (klass), TYPE_CHARDEV) @@ -251,7 +252,7 @@ int qemu_chr_wait_connected(Chardev *chr, Error **errp); #define CHARDEV_IS_PTY(chr) \ object_dynamic_cast(OBJECT(chr), TYPE_CHARDEV_PTY) -typedef struct ChardevClass { +struct ChardevClass { ObjectClass parent_class; bool internal; /* TODO: eventually use TYPE_USER_CREATABLE */ @@ -276,7 +277,7 @@ typedef struct ChardevClass { void (*chr_be_event)(Chardev *s, QEMUChrEvent event); /* Return 0 if succeeded, 1 if failed */ int (*chr_machine_done)(Chardev *chr); -} ChardevClass; +}; Chardev *qemu_chardev_new(const char *id, const char *typename, ChardevBackend *backend, GMainContext *context, diff --git a/include/chardev/spice.h b/include/chardev/spice.h index 1f7339b649..5bccc47392 100644 --- a/include/chardev/spice.h +++ b/include/chardev/spice.h @@ -3,8 +3,9 @@ #include #include "chardev/char-fe.h" +#include "qom/object.h" -typedef struct SpiceChardev { +struct SpiceChardev { Chardev parent; SpiceCharDeviceInstance sin; @@ -13,7 +14,8 @@ typedef struct SpiceChardev { const uint8_t *datapos; int datalen; QLIST_ENTRY(SpiceChardev) next; -} SpiceChardev; +}; +typedef struct SpiceChardev SpiceChardev; #define TYPE_CHARDEV_SPICE "chardev-spice" #define TYPE_CHARDEV_SPICEVMC "chardev-spicevmc" diff --git a/include/crypto/secret.h b/include/crypto/secret.h index 2deb461d2f..8c03971e75 100644 --- a/include/crypto/secret.h +++ b/include/crypto/secret.h @@ -26,10 +26,10 @@ #include "crypto/secret_common.h" #define TYPE_QCRYPTO_SECRET "secret" +typedef struct QCryptoSecret QCryptoSecret; #define QCRYPTO_SECRET(obj) \ OBJECT_CHECK(QCryptoSecret, (obj), TYPE_QCRYPTO_SECRET) -typedef struct QCryptoSecret QCryptoSecret; typedef struct QCryptoSecretClass QCryptoSecretClass; /** diff --git a/include/crypto/secret_common.h b/include/crypto/secret_common.h index 980c02ab71..db282a3872 100644 --- a/include/crypto/secret_common.h +++ b/include/crypto/secret_common.h @@ -25,6 +25,8 @@ #include "qom/object.h" #define TYPE_QCRYPTO_SECRET_COMMON "secret_common" +typedef struct QCryptoSecretCommon QCryptoSecretCommon; +typedef struct QCryptoSecretCommonClass QCryptoSecretCommonClass; #define QCRYPTO_SECRET_COMMON(obj) \ OBJECT_CHECK(QCryptoSecretCommon, (obj), TYPE_QCRYPTO_SECRET_COMMON) #define QCRYPTO_SECRET_COMMON_CLASS(class) \ @@ -34,8 +36,6 @@ OBJECT_GET_CLASS(QCryptoSecretCommonClass, \ (obj), TYPE_QCRYPTO_SECRET_COMMON) -typedef struct QCryptoSecretCommon QCryptoSecretCommon; -typedef struct QCryptoSecretCommonClass QCryptoSecretCommonClass; struct QCryptoSecretCommon { Object parent_obj; diff --git a/include/crypto/secret_keyring.h b/include/crypto/secret_keyring.h index 4345eb048e..8b3b8ee67d 100644 --- a/include/crypto/secret_keyring.h +++ b/include/crypto/secret_keyring.h @@ -26,6 +26,8 @@ #include "crypto/secret_common.h" #define TYPE_QCRYPTO_SECRET_KEYRING "secret_keyring" +typedef struct QCryptoSecretKeyring QCryptoSecretKeyring; +typedef struct QCryptoSecretKeyringClass QCryptoSecretKeyringClass; #define QCRYPTO_SECRET_KEYRING(obj) \ OBJECT_CHECK(QCryptoSecretKeyring, (obj), \ TYPE_QCRYPTO_SECRET_KEYRING) @@ -36,8 +38,6 @@ OBJECT_GET_CLASS(QCryptoSecretKeyringClass, \ (class), TYPE_QCRYPTO_SECRET_KEYRING) -typedef struct QCryptoSecretKeyring QCryptoSecretKeyring; -typedef struct QCryptoSecretKeyringClass QCryptoSecretKeyringClass; struct QCryptoSecretKeyring { QCryptoSecretCommon parent; diff --git a/include/crypto/tls-cipher-suites.h b/include/crypto/tls-cipher-suites.h index 28b3a73ce1..23f031953f 100644 --- a/include/crypto/tls-cipher-suites.h +++ b/include/crypto/tls-cipher-suites.h @@ -15,14 +15,15 @@ #include "crypto/tlscreds.h" #define TYPE_QCRYPTO_TLS_CIPHER_SUITES "tls-cipher-suites" +typedef struct QCryptoTLSCipherSuites QCryptoTLSCipherSuites; #define QCRYPTO_TLS_CIPHER_SUITES(obj) \ OBJECT_CHECK(QCryptoTLSCipherSuites, (obj), TYPE_QCRYPTO_TLS_CIPHER_SUITES) -typedef struct QCryptoTLSCipherSuites { +struct QCryptoTLSCipherSuites { /* */ QCryptoTLSCreds parent_obj; /* */ -} QCryptoTLSCipherSuites; +}; /** * qcrypto_tls_cipher_suites_get_data: diff --git a/include/crypto/tlscreds.h b/include/crypto/tlscreds.h index fd7a284aa2..9f065a4def 100644 --- a/include/crypto/tlscreds.h +++ b/include/crypto/tlscreds.h @@ -29,10 +29,10 @@ #endif #define TYPE_QCRYPTO_TLS_CREDS "tls-creds" +typedef struct QCryptoTLSCreds QCryptoTLSCreds; #define QCRYPTO_TLS_CREDS(obj) \ OBJECT_CHECK(QCryptoTLSCreds, (obj), TYPE_QCRYPTO_TLS_CREDS) -typedef struct QCryptoTLSCreds QCryptoTLSCreds; typedef struct QCryptoTLSCredsClass QCryptoTLSCredsClass; #define QCRYPTO_TLS_CREDS_DH_PARAMS "dh-params.pem" diff --git a/include/crypto/tlscredsanon.h b/include/crypto/tlscredsanon.h index 9e9a5ce1a8..034ebd3fd9 100644 --- a/include/crypto/tlscredsanon.h +++ b/include/crypto/tlscredsanon.h @@ -22,13 +22,14 @@ #define QCRYPTO_TLSCREDSANON_H #include "crypto/tlscreds.h" +#include "qom/object.h" #define TYPE_QCRYPTO_TLS_CREDS_ANON "tls-creds-anon" +typedef struct QCryptoTLSCredsAnon QCryptoTLSCredsAnon; #define QCRYPTO_TLS_CREDS_ANON(obj) \ OBJECT_CHECK(QCryptoTLSCredsAnon, (obj), TYPE_QCRYPTO_TLS_CREDS_ANON) -typedef struct QCryptoTLSCredsAnon QCryptoTLSCredsAnon; typedef struct QCryptoTLSCredsAnonClass QCryptoTLSCredsAnonClass; /** diff --git a/include/crypto/tlscredspsk.h b/include/crypto/tlscredspsk.h index 907035a29b..6e361366eb 100644 --- a/include/crypto/tlscredspsk.h +++ b/include/crypto/tlscredspsk.h @@ -22,12 +22,13 @@ #define QCRYPTO_TLSCREDSPSK_H #include "crypto/tlscreds.h" +#include "qom/object.h" #define TYPE_QCRYPTO_TLS_CREDS_PSK "tls-creds-psk" +typedef struct QCryptoTLSCredsPSK QCryptoTLSCredsPSK; #define QCRYPTO_TLS_CREDS_PSK(obj) \ OBJECT_CHECK(QCryptoTLSCredsPSK, (obj), TYPE_QCRYPTO_TLS_CREDS_PSK) -typedef struct QCryptoTLSCredsPSK QCryptoTLSCredsPSK; typedef struct QCryptoTLSCredsPSKClass QCryptoTLSCredsPSKClass; #define QCRYPTO_TLS_CREDS_PSKFILE "keys.psk" diff --git a/include/crypto/tlscredsx509.h b/include/crypto/tlscredsx509.h index e1542e5c8c..e4d44ea22d 100644 --- a/include/crypto/tlscredsx509.h +++ b/include/crypto/tlscredsx509.h @@ -22,12 +22,13 @@ #define QCRYPTO_TLSCREDSX509_H #include "crypto/tlscreds.h" +#include "qom/object.h" #define TYPE_QCRYPTO_TLS_CREDS_X509 "tls-creds-x509" +typedef struct QCryptoTLSCredsX509 QCryptoTLSCredsX509; #define QCRYPTO_TLS_CREDS_X509(obj) \ OBJECT_CHECK(QCryptoTLSCredsX509, (obj), TYPE_QCRYPTO_TLS_CREDS_X509) -typedef struct QCryptoTLSCredsX509 QCryptoTLSCredsX509; typedef struct QCryptoTLSCredsX509Class QCryptoTLSCredsX509Class; #define QCRYPTO_TLS_CREDS_X509_CA_CERT "ca-cert.pem" diff --git a/include/exec/memory.h b/include/exec/memory.h index 307e527835..6be7072ac5 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -38,6 +38,7 @@ OBJECT_CHECK(MemoryRegion, (obj), TYPE_MEMORY_REGION) #define TYPE_IOMMU_MEMORY_REGION "qemu:iommu-memory-region" +typedef struct IOMMUMemoryRegionClass IOMMUMemoryRegionClass; #define IOMMU_MEMORY_REGION(obj) \ OBJECT_CHECK(IOMMUMemoryRegion, (obj), TYPE_IOMMU_MEMORY_REGION) #define IOMMU_MEMORY_REGION_CLASS(klass) \ @@ -242,7 +243,7 @@ enum IOMMUMemoryRegionAttr { * only a single IOMMU index. A more complex IOMMU might have one index * for secure transactions and one for non-secure transactions. */ -typedef struct IOMMUMemoryRegionClass { +struct IOMMUMemoryRegionClass { /* private */ MemoryRegionClass parent_class; @@ -355,7 +356,7 @@ typedef struct IOMMUMemoryRegionClass { * @iommu: the IOMMUMemoryRegion */ int (*num_indexes)(IOMMUMemoryRegion *iommu); -} IOMMUMemoryRegionClass; +}; typedef struct CoalescedMemoryRange CoalescedMemoryRange; typedef struct MemoryRegionIoeventfd MemoryRegionIoeventfd; diff --git a/include/hw/acpi/acpi_dev_interface.h b/include/hw/acpi/acpi_dev_interface.h index a2a12af9b9..4ef44d6fe8 100644 --- a/include/hw/acpi/acpi_dev_interface.h +++ b/include/hw/acpi/acpi_dev_interface.h @@ -18,6 +18,7 @@ typedef enum { #define TYPE_ACPI_DEVICE_IF "acpi-device-interface" +typedef struct AcpiDeviceIfClass AcpiDeviceIfClass; #define ACPI_DEVICE_IF_CLASS(klass) \ OBJECT_CLASS_CHECK(AcpiDeviceIfClass, (klass), \ TYPE_ACPI_DEVICE_IF) @@ -48,7 +49,7 @@ void acpi_send_event(DeviceState *dev, AcpiEventStatusBits event); * knowledge about internals of actual device that implements * ACPI interface. */ -typedef struct AcpiDeviceIfClass { +struct AcpiDeviceIfClass { /* */ InterfaceClass parent_class; @@ -57,5 +58,5 @@ typedef struct AcpiDeviceIfClass { void (*send_event)(AcpiDeviceIf *adev, AcpiEventStatusBits ev); void (*madt_cpu)(AcpiDeviceIf *adev, int uid, const CPUArchIdList *apic_ids, GArray *entry); -} AcpiDeviceIfClass; +}; #endif diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h index 90a9180db5..2208f0b939 100644 --- a/include/hw/acpi/generic_event_device.h +++ b/include/hw/acpi/generic_event_device.h @@ -62,10 +62,12 @@ #include "hw/sysbus.h" #include "hw/acpi/memory_hotplug.h" #include "hw/acpi/ghes.h" +#include "qom/object.h" #define ACPI_POWER_BUTTON_DEVICE "PWRB" #define TYPE_ACPI_GED "acpi-ged" +typedef struct AcpiGedState AcpiGedState; #define ACPI_GED(obj) \ OBJECT_CHECK(AcpiGedState, (obj), TYPE_ACPI_GED) @@ -90,7 +92,7 @@ typedef struct GEDState { uint32_t sel; } GEDState; -typedef struct AcpiGedState { +struct AcpiGedState { SysBusDevice parent_obj; MemHotplugState memhp_state; MemoryRegion container_memhp; @@ -98,7 +100,7 @@ typedef struct AcpiGedState { uint32_t ged_event_bitmap; qemu_irq irq; AcpiGhesState ghes_state; -} AcpiGedState; +}; void build_ged_aml(Aml *table, const char* name, HotplugHandler *hotplug_dev, uint32_t ged_irq, AmlRegionSpace rs, hwaddr ged_base); diff --git a/include/hw/acpi/vmgenid.h b/include/hw/acpi/vmgenid.h index c49d913f3e..0286fc0f09 100644 --- a/include/hw/acpi/vmgenid.h +++ b/include/hw/acpi/vmgenid.h @@ -4,6 +4,7 @@ #include "hw/acpi/bios-linker-loader.h" #include "hw/qdev-core.h" #include "qemu/uuid.h" +#include "qom/object.h" #define VMGENID_DEVICE "vmgenid" #define VMGENID_GUID "guid" @@ -15,13 +16,14 @@ * OVMF SDT Header Probe Supressor */ +typedef struct VmGenIdState VmGenIdState; #define VMGENID(obj) OBJECT_CHECK(VmGenIdState, (obj), VMGENID_DEVICE) -typedef struct VmGenIdState { +struct VmGenIdState { DeviceClass parent_obj; QemuUUID guid; /* The 128-bit GUID seen by the guest */ uint8_t vmgenid_addr_le[8]; /* Address of the GUID (little-endian) */ -} VmGenIdState; +}; /* returns NULL unless there is exactly one device */ static inline Object *find_vmgenid_dev(void) diff --git a/include/hw/adc/stm32f2xx_adc.h b/include/hw/adc/stm32f2xx_adc.h index 663b79f4f3..60d4b65570 100644 --- a/include/hw/adc/stm32f2xx_adc.h +++ b/include/hw/adc/stm32f2xx_adc.h @@ -26,6 +26,7 @@ #define HW_STM32F2XX_ADC_H #include "hw/sysbus.h" +#include "qom/object.h" #define ADC_SR 0x00 #define ADC_CR1 0x04 @@ -58,10 +59,11 @@ #define ADC_COMMON_ADDRESS 0x100 #define TYPE_STM32F2XX_ADC "stm32f2xx-adc" +typedef struct STM32F2XXADCState STM32F2XXADCState; #define STM32F2XX_ADC(obj) \ OBJECT_CHECK(STM32F2XXADCState, (obj), TYPE_STM32F2XX_ADC) -typedef struct { +struct STM32F2XXADCState { /* */ SysBusDevice parent_obj; @@ -84,6 +86,6 @@ typedef struct { uint32_t adc_dr; qemu_irq irq; -} STM32F2XXADCState; +}; #endif /* HW_STM32F2XX_ADC_H */ diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h index 77c82a9982..631454f1c7 100644 --- a/include/hw/arm/allwinner-a10.h +++ b/include/hw/arm/allwinner-a10.h @@ -14,6 +14,7 @@ #include "hw/rtc/allwinner-rtc.h" #include "target/arm/cpu.h" +#include "qom/object.h" #define AW_A10_SDRAM_BASE 0x40000000 @@ -21,9 +22,10 @@ #define AW_A10_NUM_USB 2 #define TYPE_AW_A10 "allwinner-a10" +typedef struct AwA10State AwA10State; #define AW_A10(obj) OBJECT_CHECK(AwA10State, (obj), TYPE_AW_A10) -typedef struct AwA10State { +struct AwA10State { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -38,6 +40,6 @@ typedef struct AwA10State { MemoryRegion sram_a; EHCISysBusState ehci[AW_A10_NUM_USB]; OHCISysBusState ohci[AW_A10_NUM_USB]; -} AwA10State; +}; #endif diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h index 626139dcb3..5fda95066f 100644 --- a/include/hw/arm/allwinner-h3.h +++ b/include/hw/arm/allwinner-h3.h @@ -106,6 +106,7 @@ enum { #define TYPE_AW_H3 "allwinner-h3" /** Convert input object to Allwinner H3 state object */ +typedef struct AwH3State AwH3State; #define AW_H3(obj) OBJECT_CHECK(AwH3State, (obj), TYPE_AW_H3) /** @} */ @@ -116,7 +117,7 @@ enum { * This struct contains the state of all the devices * which are currently emulated by the H3 SoC code. */ -typedef struct AwH3State { +struct AwH3State { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -136,7 +137,7 @@ typedef struct AwH3State { MemoryRegion sram_a1; MemoryRegion sram_a2; MemoryRegion sram_c; -} AwH3State; +}; /** * Emulate Boot ROM firmware setup functionality. diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 529816286d..dca241d47f 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -105,8 +105,11 @@ #include "hw/or-irq.h" #include "hw/core/split-irq.h" #include "hw/cpu/cluster.h" +#include "qom/object.h" #define TYPE_ARM_SSE "arm-sse" +typedef struct ARMSSE ARMSSE; +typedef struct ARMSSEClass ARMSSEClass; #define ARM_SSE(obj) OBJECT_CHECK(ARMSSE, (obj), TYPE_ARM_SSE) /* @@ -140,7 +143,7 @@ #define RAM3_PPU 6 #define NUM_PPUS 7 -typedef struct ARMSSE { +struct ARMSSE { /*< private >*/ SysBusDevice parent_obj; @@ -215,14 +218,14 @@ typedef struct ARMSSE { uint32_t init_svtor; bool cpu_fpu[SSE_MAX_CPUS]; bool cpu_dsp[SSE_MAX_CPUS]; -} ARMSSE; +}; typedef struct ARMSSEInfo ARMSSEInfo; -typedef struct ARMSSEClass { +struct ARMSSEClass { DeviceClass parent_class; const ARMSSEInfo *info; -} ARMSSEClass; +}; #define ARM_SSE_CLASS(klass) \ OBJECT_CLASS_CHECK(ARMSSEClass, (klass), TYPE_ARM_SSE) diff --git a/include/hw/arm/armv7m.h b/include/hw/arm/armv7m.h index a30e3c6471..c820d32ad5 100644 --- a/include/hw/arm/armv7m.h +++ b/include/hw/arm/armv7m.h @@ -13,11 +13,13 @@ #include "hw/sysbus.h" #include "hw/intc/armv7m_nvic.h" #include "target/arm/idau.h" +#include "qom/object.h" #define TYPE_BITBAND "ARM,bitband-memory" +typedef struct BitBandState BitBandState; #define BITBAND(obj) OBJECT_CHECK(BitBandState, (obj), TYPE_BITBAND) -typedef struct { +struct BitBandState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -26,9 +28,10 @@ typedef struct { MemoryRegion iomem; uint32_t base; MemoryRegion *source_memory; -} BitBandState; +}; #define TYPE_ARMV7M "armv7m" +typedef struct ARMv7MState ARMv7MState; #define ARMV7M(obj) OBJECT_CHECK(ARMv7MState, (obj), TYPE_ARMV7M) #define ARMV7M_NUM_BITBANDS 2 @@ -49,7 +52,7 @@ typedef struct { * + Property "dsp": enable DSP (forwarded to CPU object) * + Property "enable-bitband": expose bitbanded IO */ -typedef struct ARMv7MState { +struct ARMv7MState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -72,6 +75,6 @@ typedef struct ARMv7MState { bool start_powered_off; bool vfp; bool dsp; -} ARMv7MState; +}; #endif diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h index 09da9d9acc..4e5ec37acb 100644 --- a/include/hw/arm/aspeed.h +++ b/include/hw/arm/aspeed.h @@ -10,10 +10,12 @@ #define ARM_ASPEED_H #include "hw/boards.h" +#include "qom/object.h" typedef struct AspeedMachineState AspeedMachineState; #define TYPE_ASPEED_MACHINE MACHINE_TYPE_NAME("aspeed") +typedef struct AspeedMachineClass AspeedMachineClass; #define ASPEED_MACHINE(obj) \ OBJECT_CHECK(AspeedMachineState, (obj), TYPE_ASPEED_MACHINE) @@ -27,7 +29,7 @@ typedef struct AspeedMachineState AspeedMachineState; #define ASPEED_MACHINE_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedMachineClass, (obj), TYPE_ASPEED_MACHINE) -typedef struct AspeedMachineClass { +struct AspeedMachineClass { MachineClass parent_obj; const char *name; @@ -40,7 +42,7 @@ typedef struct AspeedMachineClass { uint32_t num_cs; uint32_t macs_mask; void (*i2c_init)(AspeedMachineState *bmc); -} AspeedMachineClass; +}; #endif diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index d46f197cbe..31679ee42e 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -27,6 +27,7 @@ #include "hw/gpio/aspeed_gpio.h" #include "hw/sd/aspeed_sdhci.h" #include "hw/usb/hcd-ehci.h" +#include "qom/object.h" #define ASPEED_SPIS_NUM 2 #define ASPEED_EHCIS_NUM 2 @@ -34,7 +35,7 @@ #define ASPEED_CPUS_NUM 2 #define ASPEED_MACS_NUM 4 -typedef struct AspeedSoCState { +struct AspeedSoCState { /*< private >*/ DeviceState parent; @@ -60,12 +61,14 @@ typedef struct AspeedSoCState { AspeedGPIOState gpio_1_8v; AspeedSDHCIState sdhci; AspeedSDHCIState emmc; -} AspeedSoCState; +}; +typedef struct AspeedSoCState AspeedSoCState; #define TYPE_ASPEED_SOC "aspeed-soc" +typedef struct AspeedSoCClass AspeedSoCClass; #define ASPEED_SOC(obj) OBJECT_CHECK(AspeedSoCState, (obj), TYPE_ASPEED_SOC) -typedef struct AspeedSoCClass { +struct AspeedSoCClass { DeviceClass parent_class; const char *name; @@ -79,7 +82,7 @@ typedef struct AspeedSoCClass { const int *irqmap; const hwaddr *memmap; uint32_t num_cpus; -} AspeedSoCClass; +}; #define ASPEED_SOC_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedSoCClass, (klass), TYPE_ASPEED_SOC) diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h index 48a0ad1633..67f5a5f8f5 100644 --- a/include/hw/arm/bcm2835_peripherals.h +++ b/include/hw/arm/bcm2835_peripherals.h @@ -29,12 +29,14 @@ #include "hw/timer/bcm2835_systmr.h" #include "hw/usb/hcd-dwc2.h" #include "hw/misc/unimp.h" +#include "qom/object.h" #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals" +typedef struct BCM2835PeripheralState BCM2835PeripheralState; #define BCM2835_PERIPHERALS(obj) \ OBJECT_CHECK(BCM2835PeripheralState, (obj), TYPE_BCM2835_PERIPHERALS) -typedef struct BCM2835PeripheralState { +struct BCM2835PeripheralState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -70,6 +72,6 @@ typedef struct BCM2835PeripheralState { UnimplementedDeviceState smi; DWC2State dwc2; UnimplementedDeviceState sdramc; -} BCM2835PeripheralState; +}; #endif /* BCM2835_PERIPHERALS_H */ diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h index 79dfff9d73..cf22dc96a0 100644 --- a/include/hw/arm/bcm2836.h +++ b/include/hw/arm/bcm2836.h @@ -15,8 +15,11 @@ #include "hw/arm/bcm2835_peripherals.h" #include "hw/intc/bcm2836_control.h" #include "target/arm/cpu.h" +#include "qom/object.h" #define TYPE_BCM283X "bcm283x" +typedef struct BCM283XClass BCM283XClass; +typedef struct BCM283XState BCM283XState; #define BCM283X(obj) OBJECT_CHECK(BCM283XState, (obj), TYPE_BCM283X) #define BCM283X_NCPUS 4 @@ -28,7 +31,7 @@ #define TYPE_BCM2836 "bcm2836" #define TYPE_BCM2837 "bcm2837" -typedef struct BCM283XState { +struct BCM283XState { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -40,14 +43,14 @@ typedef struct BCM283XState { } cpu[BCM283X_NCPUS]; BCM2836ControlState control; BCM2835PeripheralState peripherals; -} BCM283XState; +}; typedef struct BCM283XInfo BCM283XInfo; -typedef struct BCM283XClass { +struct BCM283XClass { DeviceClass parent_class; const BCM283XInfo *info; -} BCM283XClass; +}; #define BCM283X_CLASS(klass) \ OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X) diff --git a/include/hw/arm/digic.h b/include/hw/arm/digic.h index 63785baaa8..f77833f6e3 100644 --- a/include/hw/arm/digic.h +++ b/include/hw/arm/digic.h @@ -21,14 +21,16 @@ #include "cpu.h" #include "hw/timer/digic-timer.h" #include "hw/char/digic-uart.h" +#include "qom/object.h" #define TYPE_DIGIC "digic" +typedef struct DigicState DigicState; #define DIGIC(obj) OBJECT_CHECK(DigicState, (obj), TYPE_DIGIC) #define DIGIC4_NB_TIMERS 3 -typedef struct DigicState { +struct DigicState { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -37,6 +39,6 @@ typedef struct DigicState { DigicTimerState timer[DIGIC4_NB_TIMERS]; DigicUartState uart; -} DigicState; +}; #endif /* HW_ARM_DIGIC_H */ diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h index 55260394af..114c594cd2 100644 --- a/include/hw/arm/exynos4210.h +++ b/include/hw/arm/exynos4210.h @@ -27,6 +27,7 @@ #include "hw/or-irq.h" #include "hw/sysbus.h" #include "target/arm/cpu-qom.h" +#include "qom/object.h" #define EXYNOS4210_NCPUS 2 @@ -85,7 +86,7 @@ typedef struct Exynos4210Irq { qemu_irq board_irqs[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ]; } Exynos4210Irq; -typedef struct Exynos4210State { +struct Exynos4210State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -101,7 +102,8 @@ typedef struct Exynos4210State { MemoryRegion bootreg_mem; I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER]; qemu_or_irq pl330_irq_orgate[EXYNOS4210_NUM_DMA]; -} Exynos4210State; +}; +typedef struct Exynos4210State Exynos4210State; #define TYPE_EXYNOS4210_SOC "exynos4210" #define EXYNOS4210_SOC(obj) \ diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h index 54ee1bfd78..8b4c974f09 100644 --- a/include/hw/arm/fsl-imx25.h +++ b/include/hw/arm/fsl-imx25.h @@ -32,8 +32,10 @@ #include "hw/watchdog/wdt_imx2.h" #include "exec/memory.h" #include "target/arm/cpu.h" +#include "qom/object.h" #define TYPE_FSL_IMX25 "fsl,imx25" +typedef struct FslIMX25State FslIMX25State; #define FSL_IMX25(obj) OBJECT_CHECK(FslIMX25State, (obj), TYPE_FSL_IMX25) #define FSL_IMX25_NUM_UARTS 5 @@ -44,7 +46,7 @@ #define FSL_IMX25_NUM_ESDHCS 2 #define FSL_IMX25_NUM_USBS 2 -typedef struct FslIMX25State { +struct FslIMX25State { /*< private >*/ DeviceState parent_obj; @@ -66,7 +68,7 @@ typedef struct FslIMX25State { MemoryRegion iram; MemoryRegion iram_alias; uint32_t phy_num; -} FslIMX25State; +}; /** * i.MX25 memory map diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h index dd8561b309..12368f2c8f 100644 --- a/include/hw/arm/fsl-imx31.h +++ b/include/hw/arm/fsl-imx31.h @@ -28,8 +28,10 @@ #include "hw/watchdog/wdt_imx2.h" #include "exec/memory.h" #include "target/arm/cpu.h" +#include "qom/object.h" #define TYPE_FSL_IMX31 "fsl,imx31" +typedef struct FslIMX31State FslIMX31State; #define FSL_IMX31(obj) OBJECT_CHECK(FslIMX31State, (obj), TYPE_FSL_IMX31) #define FSL_IMX31_NUM_UARTS 2 @@ -37,7 +39,7 @@ #define FSL_IMX31_NUM_I2CS 3 #define FSL_IMX31_NUM_GPIOS 3 -typedef struct FslIMX31State { +struct FslIMX31State { /*< private >*/ DeviceState parent_obj; @@ -55,7 +57,7 @@ typedef struct FslIMX31State { MemoryRegion rom; MemoryRegion iram; MemoryRegion iram_alias; -} FslIMX31State; +}; #define FSL_IMX31_SECURE_ROM_ADDR 0x00000000 #define FSL_IMX31_SECURE_ROM_SIZE 0x4000 diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h index 162fe99375..e66ea1e917 100644 --- a/include/hw/arm/fsl-imx6.h +++ b/include/hw/arm/fsl-imx6.h @@ -34,8 +34,10 @@ #include "hw/usb/imx-usb-phy.h" #include "exec/memory.h" #include "cpu.h" +#include "qom/object.h" #define TYPE_FSL_IMX6 "fsl,imx6" +typedef struct FslIMX6State FslIMX6State; #define FSL_IMX6(obj) OBJECT_CHECK(FslIMX6State, (obj), TYPE_FSL_IMX6) #define FSL_IMX6_NUM_CPUS 4 @@ -49,7 +51,7 @@ #define FSL_IMX6_NUM_USB_PHYS 2 #define FSL_IMX6_NUM_USBS 4 -typedef struct FslIMX6State { +struct FslIMX6State { /*< private >*/ DeviceState parent_obj; @@ -74,7 +76,7 @@ typedef struct FslIMX6State { MemoryRegion ocram; MemoryRegion ocram_alias; uint32_t phy_num; -} FslIMX6State; +}; #define FSL_IMX6_MMDC_ADDR 0x10000000 diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h index fcbaf3dc86..e95c4820c6 100644 --- a/include/hw/arm/fsl-imx6ul.h +++ b/include/hw/arm/fsl-imx6ul.h @@ -38,8 +38,10 @@ #include "hw/usb/imx-usb-phy.h" #include "exec/memory.h" #include "cpu.h" +#include "qom/object.h" #define TYPE_FSL_IMX6UL "fsl,imx6ul" +typedef struct FslIMX6ULState FslIMX6ULState; #define FSL_IMX6UL(obj) OBJECT_CHECK(FslIMX6ULState, (obj), TYPE_FSL_IMX6UL) enum FslIMX6ULConfiguration { @@ -60,7 +62,7 @@ enum FslIMX6ULConfiguration { FSL_IMX6UL_NUM_USBS = 2, }; -typedef struct FslIMX6ULState { +struct FslIMX6ULState { /*< private >*/ DeviceState parent_obj; @@ -89,7 +91,7 @@ typedef struct FslIMX6ULState { MemoryRegion ocram_alias; uint32_t phy_num[FSL_IMX6UL_NUM_ETHS]; -} FslIMX6ULState; +}; enum FslIMX6ULMemoryMap { FSL_IMX6UL_MMDC_ADDR = 0x80000000, diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h index ad88923707..8095e5544b 100644 --- a/include/hw/arm/fsl-imx7.h +++ b/include/hw/arm/fsl-imx7.h @@ -39,8 +39,10 @@ #include "hw/pci-host/designware.h" #include "hw/usb/chipidea.h" #include "cpu.h" +#include "qom/object.h" #define TYPE_FSL_IMX7 "fsl,imx7" +typedef struct FslIMX7State FslIMX7State; #define FSL_IMX7(obj) OBJECT_CHECK(FslIMX7State, (obj), TYPE_FSL_IMX7) enum FslIMX7Configuration { @@ -59,7 +61,7 @@ enum FslIMX7Configuration { FSL_IMX7_NUM_ADCS = 2, }; -typedef struct FslIMX7State { +struct FslIMX7State { /*< private >*/ DeviceState parent_obj; @@ -82,7 +84,7 @@ typedef struct FslIMX7State { ChipideaState usb[FSL_IMX7_NUM_USBS]; DesignwarePCIEHost pcie; uint32_t phy_num[FSL_IMX7_NUM_ETHS]; -} FslIMX7State; +}; enum FslIMX7MemoryMap { FSL_IMX7_MMDC_ADDR = 0x80000000, diff --git a/include/hw/arm/linux-boot-if.h b/include/hw/arm/linux-boot-if.h index 7bbdfd1cc6..6d9e13fd36 100644 --- a/include/hw/arm/linux-boot-if.h +++ b/include/hw/arm/linux-boot-if.h @@ -9,6 +9,7 @@ #include "qom/object.h" #define TYPE_ARM_LINUX_BOOT_IF "arm-linux-boot-if" +typedef struct ARMLinuxBootIfClass ARMLinuxBootIfClass; #define ARM_LINUX_BOOT_IF_CLASS(klass) \ OBJECT_CLASS_CHECK(ARMLinuxBootIfClass, (klass), TYPE_ARM_LINUX_BOOT_IF) #define ARM_LINUX_BOOT_IF_GET_CLASS(obj) \ @@ -18,7 +19,7 @@ typedef struct ARMLinuxBootIf ARMLinuxBootIf; -typedef struct ARMLinuxBootIfClass { +struct ARMLinuxBootIfClass { /*< private >*/ InterfaceClass parent_class; @@ -35,6 +36,6 @@ typedef struct ARMLinuxBootIfClass { * (or for a CPU which doesn't support TrustZone) */ void (*arm_linux_init)(ARMLinuxBootIf *obj, bool secure_boot); -} ARMLinuxBootIfClass; +}; #endif diff --git a/include/hw/arm/msf2-soc.h b/include/hw/arm/msf2-soc.h index c9cb214aa6..b4bc5ef96a 100644 --- a/include/hw/arm/msf2-soc.h +++ b/include/hw/arm/msf2-soc.h @@ -30,8 +30,10 @@ #include "hw/misc/msf2-sysreg.h" #include "hw/ssi/mss-spi.h" #include "hw/net/msf2-emac.h" +#include "qom/object.h" #define TYPE_MSF2_SOC "msf2-soc" +typedef struct MSF2State MSF2State; #define MSF2_SOC(obj) OBJECT_CHECK(MSF2State, (obj), TYPE_MSF2_SOC) #define MSF2_NUM_SPIS 2 @@ -44,7 +46,7 @@ */ #define MSF2_NUM_TIMERS 2 -typedef struct MSF2State { +struct MSF2State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -64,6 +66,6 @@ typedef struct MSF2State { MSSTimerState timer; MSSSpiState spi[MSF2_NUM_SPIS]; MSF2EmacState emac; -} MSF2State; +}; #endif diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h index 0cb78aafea..727ac1ae04 100644 --- a/include/hw/arm/nrf51_soc.h +++ b/include/hw/arm/nrf51_soc.h @@ -17,14 +17,16 @@ #include "hw/gpio/nrf51_gpio.h" #include "hw/nvram/nrf51_nvm.h" #include "hw/timer/nrf51_timer.h" +#include "qom/object.h" #define TYPE_NRF51_SOC "nrf51-soc" +typedef struct NRF51State NRF51State; #define NRF51_SOC(obj) \ OBJECT_CHECK(NRF51State, (obj), TYPE_NRF51_SOC) #define NRF51_NUM_TIMERS 3 -typedef struct NRF51State { +struct NRF51State { /*< private >*/ SysBusDevice parent_obj; @@ -50,6 +52,6 @@ typedef struct NRF51State { MemoryRegion container; -} NRF51State; +}; #endif diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index 6be386d0e2..0d365edeec 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -24,6 +24,7 @@ #include "hw/input/tsc2xxx.h" #include "target/arm/cpu-qom.h" #include "qemu/log.h" +#include "qom/object.h" # define OMAP_EMIFS_BASE 0x00000000 # define OMAP2_Q0_BASE 0x00000000 @@ -69,10 +70,10 @@ void omap_clk_reparent(omap_clk clk, omap_clk parent); /* omap_intc.c */ #define TYPE_OMAP_INTC "common-omap-intc" +typedef struct omap_intr_handler_s omap_intr_handler; #define OMAP_INTC(obj) \ OBJECT_CHECK(omap_intr_handler, (obj), TYPE_OMAP_INTC) -typedef struct omap_intr_handler_s omap_intr_handler; /* * TODO: Ideally we should have a clock framework that @@ -93,9 +94,9 @@ void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk); /* omap_i2c.c */ #define TYPE_OMAP_I2C "omap_i2c" +typedef struct OMAPI2CState OMAPI2CState; #define OMAP_I2C(obj) OBJECT_CHECK(OMAPI2CState, (obj), TYPE_OMAP_I2C) -typedef struct OMAPI2CState OMAPI2CState; /* TODO: clock framework (see above) */ void omap_i2c_set_iclk(OMAPI2CState *i2c, omap_clk clk); diff --git a/include/hw/arm/pxa.h b/include/hw/arm/pxa.h index f6359fe7c9..db9df5f391 100644 --- a/include/hw/arm/pxa.h +++ b/include/hw/arm/pxa.h @@ -13,6 +13,7 @@ #include "exec/memory.h" #include "target/arm/cpu-qom.h" #include "hw/pcmcia.h" +#include "qom/object.h" /* Interrupt numbers */ # define PXA2XX_PIC_SSP3 0 diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index ca4a4b1ad1..832f216e1e 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -21,6 +21,7 @@ #include "hw/sysbus.h" #include "hw/pci/pci.h" +#include "qom/object.h" #define SMMU_PCI_BUS_MAX 256 #define SMMU_PCI_DEVFN_MAX 256 @@ -93,7 +94,7 @@ typedef struct SMMUIOTLBKey { uint16_t asid; } SMMUIOTLBKey; -typedef struct SMMUState { +struct SMMUState { /* */ SysBusDevice dev; const char *mrtypename; @@ -107,9 +108,10 @@ typedef struct SMMUState { QLIST_HEAD(, SMMUDevice) devices_with_notifiers; uint8_t bus_num; PCIBus *primary_bus; -} SMMUState; +}; +typedef struct SMMUState SMMUState; -typedef struct { +struct SMMUBaseClass { /* */ SysBusDeviceClass parent_class; @@ -117,7 +119,8 @@ typedef struct { DeviceRealize parent_realize; -} SMMUBaseClass; +}; +typedef struct SMMUBaseClass SMMUBaseClass; #define TYPE_ARM_SMMU "arm-smmu" #define ARM_SMMU(obj) OBJECT_CHECK(SMMUState, (obj), TYPE_ARM_SMMU) diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h index 36b2f45253..905a501044 100644 --- a/include/hw/arm/smmuv3.h +++ b/include/hw/arm/smmuv3.h @@ -21,6 +21,7 @@ #include "hw/arm/smmu-common.h" #include "hw/registerfields.h" +#include "qom/object.h" #define TYPE_SMMUV3_IOMMU_MEMORY_REGION "smmuv3-iommu-memory-region" @@ -32,7 +33,7 @@ typedef struct SMMUQueue { uint8_t log2size; } SMMUQueue; -typedef struct SMMUv3State { +struct SMMUv3State { SMMUState smmu_state; uint32_t features; @@ -60,7 +61,8 @@ typedef struct SMMUv3State { qemu_irq irq[4]; QemuMutex mutex; -} SMMUv3State; +}; +typedef struct SMMUv3State SMMUv3State; typedef enum { SMMU_IRQ_EVTQ, @@ -69,14 +71,15 @@ typedef enum { SMMU_IRQ_GERROR, } SMMUIrq; -typedef struct { +struct SMMUv3Class { /*< private >*/ SMMUBaseClass smmu_base_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} SMMUv3Class; +}; +typedef struct SMMUv3Class SMMUv3Class; #define TYPE_ARM_SMMUV3 "arm-smmuv3" #define ARM_SMMUV3(obj) OBJECT_CHECK(SMMUv3State, (obj), TYPE_ARM_SMMUV3) diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h index 922a733f88..6d86937e07 100644 --- a/include/hw/arm/stm32f205_soc.h +++ b/include/hw/arm/stm32f205_soc.h @@ -32,8 +32,10 @@ #include "hw/or-irq.h" #include "hw/ssi/stm32f2xx_spi.h" #include "hw/arm/armv7m.h" +#include "qom/object.h" #define TYPE_STM32F205_SOC "stm32f205-soc" +typedef struct STM32F205State STM32F205State; #define STM32F205_SOC(obj) \ OBJECT_CHECK(STM32F205State, (obj), TYPE_STM32F205_SOC) @@ -47,7 +49,7 @@ #define SRAM_BASE_ADDRESS 0x20000000 #define SRAM_SIZE (128 * 1024) -typedef struct STM32F205State { +struct STM32F205State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -63,6 +65,6 @@ typedef struct STM32F205State { STM32F2XXSPIState spi[STM_NUM_SPIS]; qemu_or_irq *adc_irqs; -} STM32F205State; +}; #endif diff --git a/include/hw/arm/stm32f405_soc.h b/include/hw/arm/stm32f405_soc.h index 1fe97f8c3a..8f44fb2046 100644 --- a/include/hw/arm/stm32f405_soc.h +++ b/include/hw/arm/stm32f405_soc.h @@ -33,8 +33,10 @@ #include "hw/or-irq.h" #include "hw/ssi/stm32f2xx_spi.h" #include "hw/arm/armv7m.h" +#include "qom/object.h" #define TYPE_STM32F405_SOC "stm32f405-soc" +typedef struct STM32F405State STM32F405State; #define STM32F405_SOC(obj) \ OBJECT_CHECK(STM32F405State, (obj), TYPE_STM32F405_SOC) @@ -48,7 +50,7 @@ #define SRAM_BASE_ADDRESS 0x20000000 #define SRAM_SIZE (192 * 1024) -typedef struct STM32F405State { +struct STM32F405State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -68,6 +70,6 @@ typedef struct STM32F405State { MemoryRegion sram; MemoryRegion flash; MemoryRegion flash_alias; -} STM32F405State; +}; #endif diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index dff67e1bef..49ad860943 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -37,6 +37,7 @@ #include "hw/block/flash.h" #include "sysemu/kvm.h" #include "hw/intc/arm_gicv3_common.h" +#include "qom/object.h" #define NUM_GICV2M_SPIS 64 #define NUM_VIRTIO_TRANSPORTS 32 @@ -115,7 +116,7 @@ typedef struct MemMapEntry { hwaddr size; } MemMapEntry; -typedef struct { +struct VirtMachineClass { MachineClass parent; bool disallow_affinity_adjustment; bool no_its; @@ -126,9 +127,10 @@ typedef struct { bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */ bool kvm_no_adjvtime; bool acpi_expose_flash; -} VirtMachineClass; +}; +typedef struct VirtMachineClass VirtMachineClass; -typedef struct { +struct VirtMachineState { MachineState parent; Notifier machine_done; DeviceState *platform_bus_dev; @@ -162,7 +164,8 @@ typedef struct { DeviceState *gic; DeviceState *acpi_dev; Notifier powerdown_notifier; -} VirtMachineState; +}; +typedef struct VirtMachineState VirtMachineState; #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 9c9f47ba9d..a960619ec9 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -20,8 +20,10 @@ #include "hw/dma/xlnx-zdma.h" #include "hw/net/cadence_gem.h" #include "hw/rtc/xlnx-zynqmp-rtc.h" +#include "qom/object.h" #define TYPE_XLNX_VERSAL "xlnx-versal" +typedef struct Versal Versal; #define XLNX_VERSAL(obj) OBJECT_CHECK(Versal, (obj), TYPE_XLNX_VERSAL) #define XLNX_VERSAL_NR_ACPUS 2 @@ -31,7 +33,7 @@ #define XLNX_VERSAL_NR_SDS 2 #define XLNX_VERSAL_NR_IRQS 192 -typedef struct Versal { +struct Versal { /*< private >*/ SysBusDevice parent_obj; @@ -74,7 +76,7 @@ typedef struct Versal { MemoryRegion *mr_ddr; uint32_t psci_conduit; } cfg; -} Versal; +}; /* Memory-map and IRQ definitions. Copied a subset from * auto-generated files. */ diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index 53076fa29a..6a24216abf 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -32,8 +32,10 @@ #include "hw/rtc/xlnx-zynqmp-rtc.h" #include "hw/cpu/cluster.h" #include "target/arm/cpu.h" +#include "qom/object.h" #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" +typedef struct XlnxZynqMPState XlnxZynqMPState; #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ TYPE_XLNX_ZYNQMP) @@ -73,7 +75,7 @@ #define XLNX_ZYNQMP_MAX_RAM_SIZE (XLNX_ZYNQMP_MAX_LOW_RAM_SIZE + \ XLNX_ZYNQMP_MAX_HIGH_RAM_SIZE) -typedef struct XlnxZynqMPState { +struct XlnxZynqMPState { /*< private >*/ DeviceState parent_obj; @@ -112,6 +114,6 @@ typedef struct XlnxZynqMPState { bool virt; /* Has the RPU subsystem? */ bool has_rpu; -} XlnxZynqMPState; +}; #endif diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 2136a2d5e4..9b2fa7e92c 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -4,14 +4,15 @@ /* NOR flash devices */ #include "exec/hwaddr.h" +#include "qom/object.h" /* pflash_cfi01.c */ #define TYPE_PFLASH_CFI01 "cfi.pflash01" +typedef struct PFlashCFI01 PFlashCFI01; #define PFLASH_CFI01(obj) \ OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01) -typedef struct PFlashCFI01 PFlashCFI01; PFlashCFI01 *pflash_cfi01_register(hwaddr base, const char *name, @@ -29,10 +30,10 @@ void pflash_cfi01_legacy_drive(PFlashCFI01 *dev, DriveInfo *dinfo); /* pflash_cfi02.c */ #define TYPE_PFLASH_CFI02 "cfi.pflash02" +typedef struct PFlashCFI02 PFlashCFI02; #define PFLASH_CFI02(obj) \ OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02) -typedef struct PFlashCFI02 PFlashCFI02; PFlashCFI02 *pflash_cfi02_register(hwaddr base, const char *name, diff --git a/include/hw/block/swim.h b/include/hw/block/swim.h index 6add3499d0..6eab9cf208 100644 --- a/include/hw/block/swim.h +++ b/include/hw/block/swim.h @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qom/object.h" #define SWIM_MAX_FD 2 @@ -67,10 +68,11 @@ struct SWIMCtrl { }; #define TYPE_SWIM "swim" +typedef struct SWIM SWIM; #define SWIM(obj) OBJECT_CHECK(SWIM, (obj), TYPE_SWIM) -typedef struct SWIM { +struct SWIM { SysBusDevice parent_obj; SWIMCtrl ctrl; -} SWIM; +}; #endif diff --git a/include/hw/char/avr_usart.h b/include/hw/char/avr_usart.h index 5739aaf26f..67ad345edd 100644 --- a/include/hw/char/avr_usart.h +++ b/include/hw/char/avr_usart.h @@ -25,6 +25,7 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" #include "hw/hw.h" +#include "qom/object.h" /* Offsets of registers. */ #define USART_DR 0x06 @@ -57,10 +58,11 @@ #define USART_CSRC_CSZ0 (1 << 1) #define TYPE_AVR_USART "avr-usart" +typedef struct AVRUsartState AVRUsartState; #define AVR_USART(obj) \ OBJECT_CHECK(AVRUsartState, (obj), TYPE_AVR_USART) -typedef struct { +struct AVRUsartState { /* */ SysBusDevice parent_obj; @@ -88,6 +90,6 @@ typedef struct { qemu_irq txc_irq; /* Data Register Empty */ qemu_irq dre_irq; -} AVRUsartState; +}; #endif /* HW_CHAR_AVR_USART_H */ diff --git a/include/hw/char/bcm2835_aux.h b/include/hw/char/bcm2835_aux.h index 934acf9c81..2647becc52 100644 --- a/include/hw/char/bcm2835_aux.h +++ b/include/hw/char/bcm2835_aux.h @@ -11,13 +11,15 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define TYPE_BCM2835_AUX "bcm2835-aux" +typedef struct BCM2835AuxState BCM2835AuxState; #define BCM2835_AUX(obj) OBJECT_CHECK(BCM2835AuxState, (obj), TYPE_BCM2835_AUX) #define BCM2835_AUX_RX_FIFO_LEN 8 -typedef struct { +struct BCM2835AuxState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -29,6 +31,6 @@ typedef struct { uint8_t read_fifo[BCM2835_AUX_RX_FIFO_LEN]; uint8_t read_pos, read_count; uint8_t ier, iir; -} BCM2835AuxState; +}; #endif diff --git a/include/hw/char/cadence_uart.h b/include/hw/char/cadence_uart.h index ed7b58d31d..3918ee8136 100644 --- a/include/hw/char/cadence_uart.h +++ b/include/hw/char/cadence_uart.h @@ -24,6 +24,7 @@ #include "chardev/char-fe.h" #include "qapi/error.h" #include "qemu/timer.h" +#include "qom/object.h" #define CADENCE_UART_RX_FIFO_SIZE 16 #define CADENCE_UART_TX_FIFO_SIZE 16 @@ -31,10 +32,11 @@ #define CADENCE_UART_R_MAX (0x48/4) #define TYPE_CADENCE_UART "cadence_uart" +typedef struct CadenceUARTState CadenceUARTState; #define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \ TYPE_CADENCE_UART) -typedef struct { +struct CadenceUARTState { /*< private >*/ SysBusDevice parent_obj; @@ -51,7 +53,7 @@ typedef struct { qemu_irq irq; QEMUTimer *fifo_trigger_handle; Clock *refclk; -} CadenceUARTState; +}; static inline DeviceState *cadence_uart_create(hwaddr addr, qemu_irq irq, diff --git a/include/hw/char/cmsdk-apb-uart.h b/include/hw/char/cmsdk-apb-uart.h index bc9069f9fd..32c0df9df3 100644 --- a/include/hw/char/cmsdk-apb-uart.h +++ b/include/hw/char/cmsdk-apb-uart.h @@ -15,12 +15,14 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define TYPE_CMSDK_APB_UART "cmsdk-apb-uart" +typedef struct CMSDKAPBUART CMSDKAPBUART; #define CMSDK_APB_UART(obj) OBJECT_CHECK(CMSDKAPBUART, (obj), \ TYPE_CMSDK_APB_UART) -typedef struct { +struct CMSDKAPBUART { /*< private >*/ SysBusDevice parent_obj; @@ -42,7 +44,7 @@ typedef struct { /* This UART has no FIFO, only a 1-character buffer for each of Tx and Rx */ uint8_t txbuf; uint8_t rxbuf; -} CMSDKAPBUART; +}; /** * cmsdk_apb_uart_create - convenience function to create TYPE_CMSDK_APB_UART diff --git a/include/hw/char/digic-uart.h b/include/hw/char/digic-uart.h index de9a3e3551..7c6ec2a5c5 100644 --- a/include/hw/char/digic-uart.h +++ b/include/hw/char/digic-uart.h @@ -20,8 +20,10 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define TYPE_DIGIC_UART "digic-uart" +typedef struct DigicUartState DigicUartState; #define DIGIC_UART(obj) \ OBJECT_CHECK(DigicUartState, (obj), TYPE_DIGIC_UART) @@ -32,7 +34,7 @@ enum { R_MAX }; -typedef struct DigicUartState { +struct DigicUartState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -42,6 +44,6 @@ typedef struct DigicUartState { uint32_t reg_rx; uint32_t reg_st; -} DigicUartState; +}; #endif /* HW_CHAR_DIGIC_UART_H */ diff --git a/include/hw/char/escc.h b/include/hw/char/escc.h index 794b653484..5de2a39e77 100644 --- a/include/hw/char/escc.h +++ b/include/hw/char/escc.h @@ -5,11 +5,13 @@ #include "chardev/char-serial.h" #include "hw/sysbus.h" #include "ui/input.h" +#include "qom/object.h" /* escc.c */ #define TYPE_ESCC "escc" #define ESCC_SIZE 4 +typedef struct ESCCState ESCCState; #define ESCC(obj) OBJECT_CHECK(ESCCState, (obj), TYPE_ESCC) typedef enum { @@ -46,7 +48,7 @@ typedef struct ESCCChannelState { QemuInputHandlerState *hs; } ESCCChannelState; -typedef struct ESCCState { +struct ESCCState { SysBusDevice parent_obj; struct ESCCChannelState chn[2]; @@ -55,6 +57,6 @@ typedef struct ESCCState { MemoryRegion mmio; uint32_t disabled; uint32_t frequency; -} ESCCState; +}; #endif diff --git a/include/hw/char/ibex_uart.h b/include/hw/char/ibex_uart.h index b6bd5a6700..ec9fcde8f0 100644 --- a/include/hw/char/ibex_uart.h +++ b/include/hw/char/ibex_uart.h @@ -29,6 +29,7 @@ #include "hw/registerfields.h" #include "chardev/char-fe.h" #include "qemu/timer.h" +#include "qom/object.h" REG32(INTR_STATE, 0x00) FIELD(INTR_STATE, TX_WATERMARK, 0, 1) @@ -69,10 +70,11 @@ REG32(TIMEOUT_CTRL, 0x2c) #define IBEX_UART_CLOCK 50000000 /* 50MHz clock */ #define TYPE_IBEX_UART "ibex-uart" +typedef struct IbexUartState IbexUartState; #define IBEX_UART(obj) \ OBJECT_CHECK(IbexUartState, (obj), TYPE_IBEX_UART) -typedef struct { +struct IbexUartState { /* */ SysBusDevice parent_obj; @@ -103,5 +105,5 @@ typedef struct { qemu_irq rx_watermark; qemu_irq tx_empty; qemu_irq rx_overflow; -} IbexUartState; +}; #endif /* HW_IBEX_UART_H */ diff --git a/include/hw/char/imx_serial.h b/include/hw/char/imx_serial.h index c8b74284f8..bfaf8ec695 100644 --- a/include/hw/char/imx_serial.h +++ b/include/hw/char/imx_serial.h @@ -20,8 +20,10 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define TYPE_IMX_SERIAL "imx.serial" +typedef struct IMXSerialState IMXSerialState; #define IMX_SERIAL(obj) OBJECT_CHECK(IMXSerialState, (obj), TYPE_IMX_SERIAL) #define URXD_CHARRDY (1<<15) /* character read is valid */ @@ -76,7 +78,7 @@ #define UTS1_TXFULL (1<<4) #define UTS1_RXFULL (1<<3) -typedef struct IMXSerialState { +struct IMXSerialState { /*< private >*/ SysBusDevice parent_obj; @@ -103,6 +105,6 @@ typedef struct IMXSerialState { qemu_irq irq; CharBackend chr; -} IMXSerialState; +}; #endif diff --git a/include/hw/char/nrf51_uart.h b/include/hw/char/nrf51_uart.h index eb1c15b490..20560ba6dc 100644 --- a/include/hw/char/nrf51_uart.h +++ b/include/hw/char/nrf51_uart.h @@ -14,11 +14,13 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" #include "hw/registerfields.h" +#include "qom/object.h" #define UART_FIFO_LENGTH 6 #define UART_SIZE 0x1000 #define TYPE_NRF51_UART "nrf51_soc.uart" +typedef struct NRF51UARTState NRF51UARTState; #define NRF51_UART(obj) OBJECT_CHECK(NRF51UARTState, (obj), TYPE_NRF51_UART) REG32(UART_STARTRX, 0x000) @@ -54,7 +56,7 @@ REG32(UART_TXD, 0x51C) REG32(UART_BAUDRATE, 0x524) REG32(UART_CONFIG, 0x56C) -typedef struct NRF51UARTState { +struct NRF51UARTState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -72,6 +74,6 @@ typedef struct NRF51UARTState { bool tx_started; bool pending_tx_byte; bool enabled; -} NRF51UARTState; +}; #endif diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h index bed758350f..ddbd8ad45b 100644 --- a/include/hw/char/pl011.h +++ b/include/hw/char/pl011.h @@ -19,14 +19,16 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" #include "qapi/error.h" +#include "qom/object.h" #define TYPE_PL011 "pl011" +typedef struct PL011State PL011State; #define PL011(obj) OBJECT_CHECK(PL011State, (obj), TYPE_PL011) /* This shares the same struct (and cast macro) as the base pl011 device */ #define TYPE_PL011_LUMINARY "pl011_luminary" -typedef struct PL011State { +struct PL011State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -49,7 +51,7 @@ typedef struct PL011State { CharBackend chr; qemu_irq irq[6]; const unsigned char *id; -} PL011State; +}; static inline DeviceState *pl011_create(hwaddr addr, qemu_irq irq, diff --git a/include/hw/char/renesas_sci.h b/include/hw/char/renesas_sci.h index efdebc620a..5a5ebfd28c 100644 --- a/include/hw/char/renesas_sci.h +++ b/include/hw/char/renesas_sci.h @@ -11,8 +11,10 @@ #include "chardev/char-fe.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_RENESAS_SCI "renesas-sci" +typedef struct RSCIState RSCIState; #define RSCI(obj) OBJECT_CHECK(RSCIState, (obj), TYPE_RENESAS_SCI) enum { @@ -23,7 +25,7 @@ enum { SCI_NR_IRQ = 4 }; -typedef struct { +struct RSCIState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -46,6 +48,6 @@ typedef struct { int64_t trtime; int64_t rx_next; uint64_t input_freq; -} RSCIState; +}; #endif diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index 535fa23a2b..dbeef43676 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -31,10 +31,11 @@ #include "qemu/fifo8.h" #include "chardev/char.h" #include "hw/sysbus.h" +#include "qom/object.h" #define UART_FIFO_LENGTH 16 /* 16550A Fifo Length */ -typedef struct SerialState { +struct SerialState { DeviceState parent; uint16_t divider; @@ -77,22 +78,25 @@ typedef struct SerialState { QEMUTimer *modem_status_poll; MemoryRegion io; -} SerialState; +}; +typedef struct SerialState SerialState; -typedef struct SerialMM { +struct SerialMM { SysBusDevice parent; SerialState serial; uint8_t regshift; uint8_t endianness; -} SerialMM; +}; +typedef struct SerialMM SerialMM; -typedef struct SerialIO { +struct SerialIO { SysBusDevice parent; SerialState serial; -} SerialIO; +}; +typedef struct SerialIO SerialIO; extern const VMStateDescription vmstate_serial; extern const MemoryRegionOps serial_io_ops; diff --git a/include/hw/char/stm32f2xx_usart.h b/include/hw/char/stm32f2xx_usart.h index 8e112671e3..c44faca751 100644 --- a/include/hw/char/stm32f2xx_usart.h +++ b/include/hw/char/stm32f2xx_usart.h @@ -27,6 +27,7 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define USART_SR 0x00 #define USART_DR 0x04 @@ -53,10 +54,11 @@ #define USART_CR1_RE (1 << 2) #define TYPE_STM32F2XX_USART "stm32f2xx-usart" +typedef struct STM32F2XXUsartState STM32F2XXUsartState; #define STM32F2XX_USART(obj) \ OBJECT_CHECK(STM32F2XXUsartState, (obj), TYPE_STM32F2XX_USART) -typedef struct { +struct STM32F2XXUsartState { /* */ SysBusDevice parent_obj; @@ -73,5 +75,5 @@ typedef struct { CharBackend chr; qemu_irq irq; -} STM32F2XXUsartState; +}; #endif /* HW_STM32F2XX_USART_H */ diff --git a/include/hw/clock.h b/include/hw/clock.h index f822a94220..cde89b3ef4 100644 --- a/include/hw/clock.h +++ b/include/hw/clock.h @@ -18,6 +18,7 @@ #include "qemu/queue.h" #define TYPE_CLOCK "clock" +typedef struct Clock Clock; #define CLOCK(obj) OBJECT_CHECK(Clock, (obj), TYPE_CLOCK) typedef void ClockCallback(void *opaque); @@ -54,7 +55,6 @@ typedef void ClockCallback(void *opaque); * @sibling: structure used to form a clock list */ -typedef struct Clock Clock; struct Clock { /*< private >*/ diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 8f145733ce..5f319b9d22 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -30,6 +30,7 @@ #include "qemu/queue.h" #include "qemu/thread.h" #include "qemu/plugin.h" +#include "qom/object.h" typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size, void *opaque); @@ -61,6 +62,7 @@ typedef uint64_t vaddr; */ #define CPU(obj) ((CPUState *)(obj)) +typedef struct CPUClass CPUClass; #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU) #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU) @@ -156,7 +158,7 @@ struct TranslationBlock; * * Represents a CPU family or model. */ -typedef struct CPUClass { +struct CPUClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -222,7 +224,7 @@ typedef struct CPUClass { /* Keep non-pointer data at the end to minimize holes. */ int gdb_num_core_regs; bool gdb_stop_before_watchpoint; -} CPUClass; +}; /* * Low 16 bits: number of cycles left, used only in icount mode. diff --git a/include/hw/core/generic-loader.h b/include/hw/core/generic-loader.h index 9ffce1c5a3..f435af1884 100644 --- a/include/hw/core/generic-loader.h +++ b/include/hw/core/generic-loader.h @@ -20,8 +20,9 @@ #include "elf.h" #include "hw/qdev-core.h" +#include "qom/object.h" -typedef struct GenericLoaderState { +struct GenericLoaderState { /* */ DeviceState parent_obj; @@ -38,7 +39,8 @@ typedef struct GenericLoaderState { bool force_raw; bool data_be; bool set_pc; -} GenericLoaderState; +}; +typedef struct GenericLoaderState GenericLoaderState; #define TYPE_GENERIC_LOADER "loader" #define GENERIC_LOADER(obj) OBJECT_CHECK(GenericLoaderState, (obj), \ diff --git a/include/hw/cpu/a15mpcore.h b/include/hw/cpu/a15mpcore.h index b423533d20..01415728d0 100644 --- a/include/hw/cpu/a15mpcore.h +++ b/include/hw/cpu/a15mpcore.h @@ -22,14 +22,16 @@ #include "hw/sysbus.h" #include "hw/intc/arm_gic.h" +#include "qom/object.h" /* A15MP private memory region. */ #define TYPE_A15MPCORE_PRIV "a15mpcore_priv" +typedef struct A15MPPrivState A15MPPrivState; #define A15MPCORE_PRIV(obj) \ OBJECT_CHECK(A15MPPrivState, (obj), TYPE_A15MPCORE_PRIV) -typedef struct A15MPPrivState { +struct A15MPPrivState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -39,6 +41,6 @@ typedef struct A15MPPrivState { MemoryRegion container; GICState gic; -} A15MPPrivState; +}; #endif diff --git a/include/hw/cpu/a9mpcore.h b/include/hw/cpu/a9mpcore.h index 5d67ca22c4..1a3b32cc4c 100644 --- a/include/hw/cpu/a9mpcore.h +++ b/include/hw/cpu/a9mpcore.h @@ -15,12 +15,14 @@ #include "hw/misc/a9scu.h" #include "hw/timer/arm_mptimer.h" #include "hw/timer/a9gtimer.h" +#include "qom/object.h" #define TYPE_A9MPCORE_PRIV "a9mpcore_priv" +typedef struct A9MPPrivState A9MPPrivState; #define A9MPCORE_PRIV(obj) \ OBJECT_CHECK(A9MPPrivState, (obj), TYPE_A9MPCORE_PRIV) -typedef struct A9MPPrivState { +struct A9MPPrivState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -34,6 +36,6 @@ typedef struct A9MPPrivState { A9GTimerState gtimer; ARMMPTimerState mptimer; ARMMPTimerState wdt; -} A9MPPrivState; +}; #endif diff --git a/include/hw/cpu/arm11mpcore.h b/include/hw/cpu/arm11mpcore.h index 6196109ca2..5a5575b86d 100644 --- a/include/hw/cpu/arm11mpcore.h +++ b/include/hw/cpu/arm11mpcore.h @@ -14,12 +14,14 @@ #include "hw/misc/arm11scu.h" #include "hw/intc/arm_gic.h" #include "hw/timer/arm_mptimer.h" +#include "qom/object.h" #define TYPE_ARM11MPCORE_PRIV "arm11mpcore_priv" +typedef struct ARM11MPCorePriveState ARM11MPCorePriveState; #define ARM11MPCORE_PRIV(obj) \ OBJECT_CHECK(ARM11MPCorePriveState, (obj), TYPE_ARM11MPCORE_PRIV) -typedef struct ARM11MPCorePriveState { +struct ARM11MPCorePriveState { SysBusDevice parent_obj; uint32_t num_cpu; @@ -30,6 +32,6 @@ typedef struct ARM11MPCorePriveState { GICState gic; ARMMPTimerState mptimer; ARMMPTimerState wdtimer; -} ARM11MPCorePriveState; +}; #endif diff --git a/include/hw/cpu/cluster.h b/include/hw/cpu/cluster.h index a616501a55..faacf9757e 100644 --- a/include/hw/cpu/cluster.h +++ b/include/hw/cpu/cluster.h @@ -21,6 +21,7 @@ #define HW_CPU_CLUSTER_H #include "hw/qdev-core.h" +#include "qom/object.h" /* * CPU Cluster type @@ -54,6 +55,7 @@ */ #define TYPE_CPU_CLUSTER "cpu-cluster" +typedef struct CPUClusterState CPUClusterState; #define CPU_CLUSTER(obj) \ OBJECT_CHECK(CPUClusterState, (obj), TYPE_CPU_CLUSTER) @@ -70,12 +72,12 @@ * * State of a CPU cluster. */ -typedef struct CPUClusterState { +struct CPUClusterState { /*< private >*/ DeviceState parent_obj; /*< public >*/ uint32_t cluster_id; -} CPUClusterState; +}; #endif diff --git a/include/hw/cpu/core.h b/include/hw/cpu/core.h index 555ad831bb..850191527e 100644 --- a/include/hw/cpu/core.h +++ b/include/hw/cpu/core.h @@ -10,20 +10,22 @@ #define HW_CPU_CORE_H #include "hw/qdev-core.h" +#include "qom/object.h" #define TYPE_CPU_CORE "cpu-core" +typedef struct CPUCore CPUCore; #define CPU_CORE(obj) \ OBJECT_CHECK(CPUCore, (obj), TYPE_CPU_CORE) -typedef struct CPUCore { +struct CPUCore { /*< private >*/ DeviceState parent_obj; /*< public >*/ int core_id; int nr_threads; -} CPUCore; +}; /* Note: topology field names need to be kept in sync with * 'CpuInstanceProperties' */ diff --git a/include/hw/display/bcm2835_fb.h b/include/hw/display/bcm2835_fb.h index 2246be74d8..5fc4d74a06 100644 --- a/include/hw/display/bcm2835_fb.h +++ b/include/hw/display/bcm2835_fb.h @@ -14,8 +14,10 @@ #include "hw/sysbus.h" #include "ui/console.h" +#include "qom/object.h" #define TYPE_BCM2835_FB "bcm2835-fb" +typedef struct BCM2835FBState BCM2835FBState; #define BCM2835_FB(obj) OBJECT_CHECK(BCM2835FBState, (obj), TYPE_BCM2835_FB) /* @@ -32,7 +34,7 @@ typedef struct { uint32_t alpha; } BCM2835FBConfig; -typedef struct { +struct BCM2835FBState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -49,7 +51,7 @@ typedef struct { BCM2835FBConfig config; BCM2835FBConfig initial_config; -} BCM2835FBState; +}; void bcm2835_fb_reconfigure(BCM2835FBState *s, BCM2835FBConfig *newconfig); diff --git a/include/hw/display/dpcd.h b/include/hw/display/dpcd.h index 6880ee36a3..6b96a463a7 100644 --- a/include/hw/display/dpcd.h +++ b/include/hw/display/dpcd.h @@ -24,6 +24,7 @@ #ifndef DPCD_H #define DPCD_H +#include "qom/object.h" typedef struct DPCDState DPCDState; diff --git a/include/hw/display/i2c-ddc.h b/include/hw/display/i2c-ddc.h index 1cf53a0c8d..8ab50641aa 100644 --- a/include/hw/display/i2c-ddc.h +++ b/include/hw/display/i2c-ddc.h @@ -21,6 +21,7 @@ #include "hw/display/edid.h" #include "hw/i2c/i2c.h" +#include "qom/object.h" /* A simple I2C slave which just returns the contents of its EDID blob. */ struct I2CDDCState { diff --git a/include/hw/display/macfb.h b/include/hw/display/macfb.h index 26367ae2c4..bccfee260f 100644 --- a/include/hw/display/macfb.h +++ b/include/hw/display/macfb.h @@ -16,6 +16,7 @@ #include "qemu/osdep.h" #include "exec/memory.h" #include "ui/console.h" +#include "qom/object.h" typedef struct MacfbState { MemoryRegion mem_vram; @@ -31,34 +32,37 @@ typedef struct MacfbState { } MacfbState; #define TYPE_MACFB "sysbus-macfb" +typedef struct MacfbSysBusState MacfbSysBusState; #define MACFB(obj) \ OBJECT_CHECK(MacfbSysBusState, (obj), TYPE_MACFB) -typedef struct { +struct MacfbSysBusState { SysBusDevice busdev; MacfbState macfb; -} MacfbSysBusState; +}; +#define TYPE_NUBUS_MACFB "nubus-macfb" +typedef struct MacfbNubusDeviceClass MacfbNubusDeviceClass; +typedef struct MacfbNubusState MacfbNubusState; #define MACFB_NUBUS_DEVICE_CLASS(class) \ OBJECT_CLASS_CHECK(MacfbNubusDeviceClass, (class), TYPE_NUBUS_MACFB) #define MACFB_NUBUS_GET_CLASS(obj) \ OBJECT_GET_CLASS(MacfbNubusDeviceClass, (obj), TYPE_NUBUS_MACFB) -typedef struct MacfbNubusDeviceClass { +struct MacfbNubusDeviceClass { DeviceClass parent_class; DeviceRealize parent_realize; -} MacfbNubusDeviceClass; +}; -#define TYPE_NUBUS_MACFB "nubus-macfb" #define NUBUS_MACFB(obj) \ OBJECT_CHECK(MacfbNubusState, (obj), TYPE_NUBUS_MACFB) -typedef struct { +struct MacfbNubusState { NubusDevice busdev; MacfbState macfb; -} MacfbNubusState; +}; #endif diff --git a/include/hw/display/xlnx_dp.h b/include/hw/display/xlnx_dp.h index ab0dd250cc..f76bde2e77 100644 --- a/include/hw/display/xlnx_dp.h +++ b/include/hw/display/xlnx_dp.h @@ -34,6 +34,7 @@ #include "qemu/units.h" #include "hw/dma/xlnx_dpdma.h" #include "audio/audio.h" +#include "qom/object.h" #define AUD_CHBUF_MAX_DEPTH (32 * KiB) #define MAX_QEMU_BUFFER_SIZE (4 * KiB) @@ -48,7 +49,7 @@ struct PixmanPlane { DisplaySurface *surface; }; -typedef struct XlnxDPState { +struct XlnxDPState { /*< private >*/ SysBusDevice parent_obj; @@ -101,7 +102,8 @@ typedef struct XlnxDPState { */ DPCDState *dpcd; I2CDDCState *edid; -} XlnxDPState; +}; +typedef struct XlnxDPState XlnxDPState; #define TYPE_XLNX_DP "xlnx.v-dp" #define XLNX_DP(obj) OBJECT_CHECK(XlnxDPState, (obj), TYPE_XLNX_DP) diff --git a/include/hw/dma/bcm2835_dma.h b/include/hw/dma/bcm2835_dma.h index a6747842b7..31f335ec5b 100644 --- a/include/hw/dma/bcm2835_dma.h +++ b/include/hw/dma/bcm2835_dma.h @@ -9,6 +9,7 @@ #define BCM2835_DMA_H #include "hw/sysbus.h" +#include "qom/object.h" typedef struct { uint32_t cs; @@ -25,12 +26,13 @@ typedef struct { } BCM2835DMAChan; #define TYPE_BCM2835_DMA "bcm2835-dma" +typedef struct BCM2835DMAState BCM2835DMAState; #define BCM2835_DMA(obj) \ OBJECT_CHECK(BCM2835DMAState, (obj), TYPE_BCM2835_DMA) #define BCM2835_DMA_NCHANS 16 -typedef struct { +struct BCM2835DMAState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -42,6 +44,6 @@ typedef struct { BCM2835DMAChan chan[BCM2835_DMA_NCHANS]; uint32_t int_status; uint32_t enable; -} BCM2835DMAState; +}; #endif diff --git a/include/hw/dma/i8257.h b/include/hw/dma/i8257.h index ee06371699..46eef1f581 100644 --- a/include/hw/dma/i8257.h +++ b/include/hw/dma/i8257.h @@ -3,8 +3,10 @@ #include "hw/isa/isa.h" #include "exec/ioport.h" +#include "qom/object.h" #define TYPE_I8257 "i8257" +typedef struct I8257State I8257State; #define I8257(obj) \ OBJECT_CHECK(I8257State, (obj), TYPE_I8257) @@ -20,7 +22,7 @@ typedef struct I8257Regs { void *opaque; } I8257Regs; -typedef struct I8257State { +struct I8257State { /* */ ISADevice parent_obj; @@ -43,7 +45,7 @@ typedef struct I8257State { int running; PortioList portio_page; PortioList portio_pageh; -} I8257State; +}; void i8257_dma_init(ISABus *bus, bool high_page_enable); diff --git a/include/hw/dma/pl080.h b/include/hw/dma/pl080.h index 9d4b3df143..55a645b055 100644 --- a/include/hw/dma/pl080.h +++ b/include/hw/dma/pl080.h @@ -29,6 +29,7 @@ #define HW_DMA_PL080_H #include "hw/sysbus.h" +#include "qom/object.h" #define PL080_MAX_CHANNELS 8 @@ -42,9 +43,10 @@ typedef struct { #define TYPE_PL080 "pl080" #define TYPE_PL081 "pl081" +typedef struct PL080State PL080State; #define PL080(obj) OBJECT_CHECK(PL080State, (obj), TYPE_PL080) -typedef struct PL080State { +struct PL080State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -66,6 +68,6 @@ typedef struct PL080State { MemoryRegion *downstream; AddressSpace downstream_as; -} PL080State; +}; #endif diff --git a/include/hw/dma/xlnx-zdma.h b/include/hw/dma/xlnx-zdma.h index 0b240b4c3c..8be9ee5cc2 100644 --- a/include/hw/dma/xlnx-zdma.h +++ b/include/hw/dma/xlnx-zdma.h @@ -32,6 +32,7 @@ #include "hw/sysbus.h" #include "hw/register.h" #include "sysemu/dma.h" +#include "qom/object.h" #define ZDMA_R_MAX (0x204 / 4) @@ -50,7 +51,7 @@ typedef union { uint32_t words[4]; } XlnxZDMADescr; -typedef struct XlnxZDMA { +struct XlnxZDMA { SysBusDevice parent_obj; MemoryRegion iomem; MemTxAttrs attr; @@ -74,7 +75,8 @@ typedef struct XlnxZDMA { /* We don't model the common bufs. Must be at least 16 bytes to model write only mode. */ uint8_t buf[2048]; -} XlnxZDMA; +}; +typedef struct XlnxZDMA XlnxZDMA; #define TYPE_XLNX_ZDMA "xlnx.zdma" diff --git a/include/hw/dma/xlnx-zynq-devcfg.h b/include/hw/dma/xlnx-zynq-devcfg.h index 1d3969d91f..52ba61b653 100644 --- a/include/hw/dma/xlnx-zynq-devcfg.h +++ b/include/hw/dma/xlnx-zynq-devcfg.h @@ -29,9 +29,11 @@ #include "hw/register.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_XLNX_ZYNQ_DEVCFG "xlnx.ps7-dev-cfg" +typedef struct XlnxZynqDevcfg XlnxZynqDevcfg; #define XLNX_ZYNQ_DEVCFG(obj) \ OBJECT_CHECK(XlnxZynqDevcfg, (obj), TYPE_XLNX_ZYNQ_DEVCFG) @@ -46,7 +48,7 @@ typedef struct XlnxZynqDevcfgDMACmd { uint32_t dest_len; } XlnxZynqDevcfgDMACmd; -typedef struct XlnxZynqDevcfg { +struct XlnxZynqDevcfg { SysBusDevice parent_obj; MemoryRegion iomem; @@ -57,6 +59,6 @@ typedef struct XlnxZynqDevcfg { uint32_t regs[XLNX_ZYNQ_DEVCFG_R_MAX]; RegisterInfo regs_info[XLNX_ZYNQ_DEVCFG_R_MAX]; -} XlnxZynqDevcfg; +}; #endif diff --git a/include/hw/dma/xlnx_dpdma.h b/include/hw/dma/xlnx_dpdma.h index 7a304a5bb4..50952dd7ce 100644 --- a/include/hw/dma/xlnx_dpdma.h +++ b/include/hw/dma/xlnx_dpdma.h @@ -28,6 +28,7 @@ #include "hw/sysbus.h" #include "ui/console.h" #include "sysemu/dma.h" +#include "qom/object.h" #define XLNX_DPDMA_REG_ARRAY_SIZE (0x1000 >> 2) diff --git a/include/hw/fw-path-provider.h b/include/hw/fw-path-provider.h index 10d1bd4959..1231cca63b 100644 --- a/include/hw/fw-path-provider.h +++ b/include/hw/fw-path-provider.h @@ -22,6 +22,7 @@ #define TYPE_FW_PATH_PROVIDER "fw-path-provider" +typedef struct FWPathProviderClass FWPathProviderClass; #define FW_PATH_PROVIDER_CLASS(klass) \ OBJECT_CLASS_CHECK(FWPathProviderClass, (klass), TYPE_FW_PATH_PROVIDER) #define FW_PATH_PROVIDER_GET_CLASS(obj) \ @@ -31,11 +32,11 @@ typedef struct FWPathProvider FWPathProvider; -typedef struct FWPathProviderClass { +struct FWPathProviderClass { InterfaceClass parent_class; char *(*get_dev_path)(FWPathProvider *p, BusState *bus, DeviceState *dev); -} FWPathProviderClass; +}; char *fw_path_provider_get_dev_path(FWPathProvider *p, BusState *bus, DeviceState *dev); diff --git a/include/hw/gpio/aspeed_gpio.h b/include/hw/gpio/aspeed_gpio.h index a2deac046a..4dc0bc3f3d 100644 --- a/include/hw/gpio/aspeed_gpio.h +++ b/include/hw/gpio/aspeed_gpio.h @@ -11,8 +11,11 @@ #define ASPEED_GPIO_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_GPIO "aspeed.gpio" +typedef struct AspeedGPIOClass AspeedGPIOClass; +typedef struct AspeedGPIOState AspeedGPIOState; #define ASPEED_GPIO(obj) OBJECT_CHECK(AspeedGPIOState, (obj), TYPE_ASPEED_GPIO) #define ASPEED_GPIO_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedGPIOClass, (klass), TYPE_ASPEED_GPIO) @@ -58,16 +61,16 @@ typedef struct AspeedGPIOReg { enum GPIORegType type; } AspeedGPIOReg; -typedef struct AspeedGPIOClass { +struct AspeedGPIOClass { SysBusDevice parent_obj; const GPIOSetProperties *props; uint32_t nr_gpio_pins; uint32_t nr_gpio_sets; uint32_t gap; const AspeedGPIOReg *reg_table; -} AspeedGPIOClass; +}; -typedef struct AspeedGPIOState { +struct AspeedGPIOState { /* */ SysBusDevice parent; @@ -95,6 +98,6 @@ typedef struct AspeedGPIOState { uint32_t debounce_2; uint32_t input_mask; } sets[ASPEED_GPIO_MAX_NR_SETS]; -} AspeedGPIOState; +}; #endif /* _ASPEED_GPIO_H_ */ diff --git a/include/hw/gpio/bcm2835_gpio.h b/include/hw/gpio/bcm2835_gpio.h index b0de0a3c74..d8268f1461 100644 --- a/include/hw/gpio/bcm2835_gpio.h +++ b/include/hw/gpio/bcm2835_gpio.h @@ -16,8 +16,9 @@ #include "hw/sd/sd.h" #include "hw/sysbus.h" +#include "qom/object.h" -typedef struct BCM2835GpioState { +struct BCM2835GpioState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -31,7 +32,8 @@ typedef struct BCM2835GpioState { uint32_t lev0, lev1; uint8_t sd_fsel; qemu_irq out[54]; -} BCM2835GpioState; +}; +typedef struct BCM2835GpioState BCM2835GpioState; #define TYPE_BCM2835_GPIO "bcm2835_gpio" #define BCM2835_GPIO(obj) \ diff --git a/include/hw/gpio/imx_gpio.h b/include/hw/gpio/imx_gpio.h index ffab437f23..b7dc689f73 100644 --- a/include/hw/gpio/imx_gpio.h +++ b/include/hw/gpio/imx_gpio.h @@ -21,8 +21,10 @@ #define IMX_GPIO_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IMX_GPIO "imx.gpio" +typedef struct IMXGPIOState IMXGPIOState; #define IMX_GPIO(obj) OBJECT_CHECK(IMXGPIOState, (obj), TYPE_IMX_GPIO) #define IMX_GPIO_MEM_SIZE 0x20 @@ -39,7 +41,7 @@ #define IMX_GPIO_PIN_COUNT 32 -typedef struct IMXGPIOState { +struct IMXGPIOState { /*< private >*/ SysBusDevice parent_obj; @@ -58,6 +60,6 @@ typedef struct IMXGPIOState { qemu_irq irq[2]; qemu_irq output[IMX_GPIO_PIN_COUNT]; -} IMXGPIOState; +}; #endif /* IMX_GPIO_H */ diff --git a/include/hw/gpio/nrf51_gpio.h b/include/hw/gpio/nrf51_gpio.h index 1d62bbc928..0c37dd74c0 100644 --- a/include/hw/gpio/nrf51_gpio.h +++ b/include/hw/gpio/nrf51_gpio.h @@ -27,7 +27,9 @@ #define NRF51_GPIO_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_NRF51_GPIO "nrf51_soc.gpio" +typedef struct NRF51GPIOState NRF51GPIOState; #define NRF51_GPIO(obj) OBJECT_CHECK(NRF51GPIOState, (obj), TYPE_NRF51_GPIO) #define NRF51_GPIO_PINS 32 @@ -47,7 +49,7 @@ #define NRF51_GPIO_PULLDOWN 1 #define NRF51_GPIO_PULLUP 3 -typedef struct NRF51GPIOState { +struct NRF51GPIOState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -63,7 +65,7 @@ typedef struct NRF51GPIOState { uint32_t old_out_connected; qemu_irq output[NRF51_GPIO_PINS]; -} NRF51GPIOState; +}; #endif diff --git a/include/hw/hotplug.h b/include/hw/hotplug.h index 6321e292fd..6536bb01a3 100644 --- a/include/hw/hotplug.h +++ b/include/hw/hotplug.h @@ -16,6 +16,7 @@ #define TYPE_HOTPLUG_HANDLER "hotplug-handler" +typedef struct HotplugHandlerClass HotplugHandlerClass; #define HOTPLUG_HANDLER_CLASS(klass) \ OBJECT_CLASS_CHECK(HotplugHandlerClass, (klass), TYPE_HOTPLUG_HANDLER) #define HOTPLUG_HANDLER_GET_CLASS(obj) \ @@ -50,7 +51,7 @@ typedef void (*hotplug_fn)(HotplugHandler *plug_handler, * Used for device removal with devices that implement * asynchronous and synchronous (surprise) removal. */ -typedef struct HotplugHandlerClass { +struct HotplugHandlerClass { /* */ InterfaceClass parent; @@ -59,7 +60,7 @@ typedef struct HotplugHandlerClass { hotplug_fn plug; hotplug_fn unplug_request; hotplug_fn unplug; -} HotplugHandlerClass; +}; /** * hotplug_handler_plug: diff --git a/include/hw/hyperv/vmbus-bridge.h b/include/hw/hyperv/vmbus-bridge.h index fe90bda01b..d090d46651 100644 --- a/include/hw/hyperv/vmbus-bridge.h +++ b/include/hw/hyperv/vmbus-bridge.h @@ -12,16 +12,18 @@ #include "hw/sysbus.h" #include "hw/hyperv/vmbus.h" +#include "qom/object.h" #define TYPE_VMBUS_BRIDGE "vmbus-bridge" -typedef struct VMBusBridge { +struct VMBusBridge { SysBusDevice parent_obj; uint8_t irq; VMBus *bus; -} VMBusBridge; +}; +typedef struct VMBusBridge VMBusBridge; #define VMBUS_BRIDGE(obj) OBJECT_CHECK(VMBusBridge, (obj), TYPE_VMBUS_BRIDGE) diff --git a/include/hw/hyperv/vmbus.h b/include/hw/hyperv/vmbus.h index cd98ec24e7..282399b8ce 100644 --- a/include/hw/hyperv/vmbus.h +++ b/include/hw/hyperv/vmbus.h @@ -16,9 +16,12 @@ #include "migration/vmstate.h" #include "hw/hyperv/vmbus-proto.h" #include "qemu/uuid.h" +#include "qom/object.h" #define TYPE_VMBUS_DEVICE "vmbus-dev" +typedef struct VMBusDevice VMBusDevice; +typedef struct VMBusDeviceClass VMBusDeviceClass; #define VMBUS_DEVICE(obj) \ OBJECT_CHECK(VMBusDevice, (obj), TYPE_VMBUS_DEVICE) #define VMBUS_DEVICE_CLASS(klass) \ @@ -44,11 +47,10 @@ typedef struct VMBusChannel VMBusChannel; * Base class for VMBus devices. Includes one or more channels. Identified by * class GUID and instance GUID. */ -typedef struct VMBusDevice VMBusDevice; typedef void(*VMBusChannelNotifyCb)(struct VMBusChannel *chan); -typedef struct VMBusDeviceClass { +struct VMBusDeviceClass { DeviceClass parent; QemuUUID classid; @@ -80,7 +82,7 @@ typedef struct VMBusDeviceClass { * side, when there's work to do with the data in the channel ring buffers. */ VMBusChannelNotifyCb chan_notify_cb; -} VMBusDeviceClass; +}; struct VMBusDevice { DeviceState parent; diff --git a/include/hw/i2c/arm_sbcon_i2c.h b/include/hw/i2c/arm_sbcon_i2c.h index 5d96507ab6..ca54867964 100644 --- a/include/hw/i2c/arm_sbcon_i2c.h +++ b/include/hw/i2c/arm_sbcon_i2c.h @@ -14,14 +14,16 @@ #include "hw/sysbus.h" #include "hw/i2c/bitbang_i2c.h" +#include "qom/object.h" #define TYPE_VERSATILE_I2C "versatile_i2c" #define TYPE_ARM_SBCON_I2C TYPE_VERSATILE_I2C +typedef struct ArmSbconI2CState ArmSbconI2CState; #define ARM_SBCON_I2C(obj) \ OBJECT_CHECK(ArmSbconI2CState, (obj), TYPE_ARM_SBCON_I2C) -typedef struct ArmSbconI2CState { +struct ArmSbconI2CState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -30,6 +32,6 @@ typedef struct ArmSbconI2CState { bitbang_i2c_interface bitbang; int out; int in; -} ArmSbconI2CState; +}; #endif /* HW_I2C_ARM_SBCON_H */ diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h index 243789ae5d..2c0198e314 100644 --- a/include/hw/i2c/aspeed_i2c.h +++ b/include/hw/i2c/aspeed_i2c.h @@ -23,11 +23,14 @@ #include "hw/i2c/i2c.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_I2C "aspeed.i2c" #define TYPE_ASPEED_2400_I2C TYPE_ASPEED_I2C "-ast2400" #define TYPE_ASPEED_2500_I2C TYPE_ASPEED_I2C "-ast2500" #define TYPE_ASPEED_2600_I2C TYPE_ASPEED_I2C "-ast2600" +typedef struct AspeedI2CClass AspeedI2CClass; +typedef struct AspeedI2CState AspeedI2CState; #define ASPEED_I2C(obj) \ OBJECT_CHECK(AspeedI2CState, (obj), TYPE_ASPEED_I2C) @@ -56,7 +59,7 @@ typedef struct AspeedI2CBus { uint32_t dma_len; } AspeedI2CBus; -typedef struct AspeedI2CState { +struct AspeedI2CState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -70,14 +73,14 @@ typedef struct AspeedI2CState { AspeedI2CBus busses[ASPEED_I2C_NR_BUSSES]; MemoryRegion *dram_mr; AddressSpace dram_as; -} AspeedI2CState; +}; #define ASPEED_I2C_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedI2CClass, (klass), TYPE_ASPEED_I2C) #define ASPEED_I2C_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedI2CClass, (obj), TYPE_ASPEED_I2C) -typedef struct AspeedI2CClass { +struct AspeedI2CClass { SysBusDeviceClass parent_class; uint8_t num_busses; @@ -91,7 +94,7 @@ typedef struct AspeedI2CClass { bool check_sram; bool has_dma; -} AspeedI2CClass; +}; I2CBus *aspeed_i2c_get_bus(AspeedI2CState *s, int busnr); diff --git a/include/hw/i2c/i2c.h b/include/hw/i2c/i2c.h index a9c030a512..bf501b9ac4 100644 --- a/include/hw/i2c/i2c.h +++ b/include/hw/i2c/i2c.h @@ -2,6 +2,7 @@ #define QEMU_I2C_H #include "hw/qdev-core.h" +#include "qom/object.h" /* The QEMU I2C implementation only supports simple transfers that complete immediately. It does not support slave devices that need to be able to @@ -18,6 +19,7 @@ enum i2c_event { typedef struct I2CSlave I2CSlave; #define TYPE_I2C_SLAVE "i2c-slave" +typedef struct I2CSlaveClass I2CSlaveClass; #define I2C_SLAVE(obj) \ OBJECT_CHECK(I2CSlave, (obj), TYPE_I2C_SLAVE) #define I2C_SLAVE_CLASS(klass) \ @@ -25,7 +27,7 @@ typedef struct I2CSlave I2CSlave; #define I2C_SLAVE_GET_CLASS(obj) \ OBJECT_GET_CLASS(I2CSlaveClass, (obj), TYPE_I2C_SLAVE) -typedef struct I2CSlaveClass { +struct I2CSlaveClass { DeviceClass parent_class; /* Master to slave. Returns non-zero for a NAK, 0 for success. */ @@ -43,7 +45,7 @@ typedef struct I2CSlaveClass { * return code is not used and should be zero. */ int (*event)(I2CSlave *s, enum i2c_event event); -} I2CSlaveClass; +}; struct I2CSlave { DeviceState qdev; diff --git a/include/hw/i2c/imx_i2c.h b/include/hw/i2c/imx_i2c.h index 7c73a1fa28..285a8f40a4 100644 --- a/include/hw/i2c/imx_i2c.h +++ b/include/hw/i2c/imx_i2c.h @@ -22,8 +22,10 @@ #define IMX_I2C_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IMX_I2C "imx.i2c" +typedef struct IMXI2CState IMXI2CState; #define IMX_I2C(obj) OBJECT_CHECK(IMXI2CState, (obj), TYPE_IMX_I2C) #define IMX_I2C_MEM_SIZE 0x14 @@ -65,7 +67,7 @@ #define ADDR_RESET 0xFF00 -typedef struct IMXI2CState { +struct IMXI2CState { /*< private >*/ SysBusDevice parent_obj; @@ -82,6 +84,6 @@ typedef struct IMXI2CState { uint16_t i2sr; uint16_t i2dr_read; uint16_t i2dr_write; -} IMXI2CState; +}; #endif /* IMX_I2C_H */ diff --git a/include/hw/i2c/microbit_i2c.h b/include/hw/i2c/microbit_i2c.h index 2bff36680c..76ffaff47a 100644 --- a/include/hw/i2c/microbit_i2c.h +++ b/include/hw/i2c/microbit_i2c.h @@ -13,6 +13,7 @@ #include "hw/sysbus.h" #include "hw/arm/nrf51.h" +#include "qom/object.h" #define NRF51_TWI_TASK_STARTRX 0x000 #define NRF51_TWI_TASK_STARTTX 0x008 @@ -26,17 +27,18 @@ #define NRF51_TWI_REG_ADDRESS 0x588 #define TYPE_MICROBIT_I2C "microbit.i2c" +typedef struct MicrobitI2CState MicrobitI2CState; #define MICROBIT_I2C(obj) \ OBJECT_CHECK(MicrobitI2CState, (obj), TYPE_MICROBIT_I2C) #define MICROBIT_I2C_NREGS (NRF51_PERIPHERAL_SIZE / sizeof(uint32_t)) -typedef struct { +struct MicrobitI2CState { SysBusDevice parent_obj; MemoryRegion iomem; uint32_t regs[MICROBIT_I2C_NREGS]; uint32_t read_idx; -} MicrobitI2CState; +}; #endif /* MICROBIT_I2C_H */ diff --git a/include/hw/i2c/ppc4xx_i2c.h b/include/hw/i2c/ppc4xx_i2c.h index f6f837fbec..3698e054b1 100644 --- a/include/hw/i2c/ppc4xx_i2c.h +++ b/include/hw/i2c/ppc4xx_i2c.h @@ -29,11 +29,13 @@ #include "hw/sysbus.h" #include "hw/i2c/bitbang_i2c.h" +#include "qom/object.h" #define TYPE_PPC4xx_I2C "ppc4xx-i2c" +typedef struct PPC4xxI2CState PPC4xxI2CState; #define PPC4xx_I2C(obj) OBJECT_CHECK(PPC4xxI2CState, (obj), TYPE_PPC4xx_I2C) -typedef struct PPC4xxI2CState { +struct PPC4xxI2CState { /*< private >*/ SysBusDevice parent_obj; @@ -57,6 +59,6 @@ typedef struct PPC4xxI2CState { uint8_t xfrcnt; uint8_t xtcntlss; uint8_t directcntl; -} PPC4xxI2CState; +}; #endif /* PPC4XX_I2C_H */ diff --git a/include/hw/i2c/smbus_slave.h b/include/hw/i2c/smbus_slave.h index ebe068304e..17f2cd2d8d 100644 --- a/include/hw/i2c/smbus_slave.h +++ b/include/hw/i2c/smbus_slave.h @@ -26,8 +26,11 @@ #define HW_SMBUS_SLAVE_H #include "hw/i2c/i2c.h" +#include "qom/object.h" #define TYPE_SMBUS_DEVICE "smbus-device" +typedef struct SMBusDevice SMBusDevice; +typedef struct SMBusDeviceClass SMBusDeviceClass; #define SMBUS_DEVICE(obj) \ OBJECT_CHECK(SMBusDevice, (obj), TYPE_SMBUS_DEVICE) #define SMBUS_DEVICE_CLASS(klass) \ @@ -35,10 +38,8 @@ #define SMBUS_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(SMBusDeviceClass, (obj), TYPE_SMBUS_DEVICE) -typedef struct SMBusDevice SMBusDevice; -typedef struct SMBusDeviceClass -{ +struct SMBusDeviceClass { I2CSlaveClass parent_class; /* @@ -67,7 +68,7 @@ typedef struct SMBusDeviceClass * return 0xff in that case. */ uint8_t (*receive_byte)(SMBusDevice *dev); -} SMBusDeviceClass; +}; #define SMBUS_DATA_MAX_LEN 34 /* command + len + 32 bytes of data. */ diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h index 2597000e03..124f1fad6f 100644 --- a/include/hw/i386/apic_internal.h +++ b/include/hw/i386/apic_internal.h @@ -25,6 +25,7 @@ #include "exec/memory.h" #include "qemu/timer.h" #include "target/i386/cpu-qom.h" +#include "qom/object.h" /* APIC Local Vector Table */ #define APIC_LVT_TIMER 0 @@ -125,6 +126,7 @@ typedef struct APICCommonState APICCommonState; #define TYPE_APIC_COMMON "apic-common" +typedef struct APICCommonClass APICCommonClass; #define APIC_COMMON(obj) \ OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC_COMMON) #define APIC_COMMON_CLASS(klass) \ @@ -132,8 +134,7 @@ typedef struct APICCommonState APICCommonState; #define APIC_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(APICCommonClass, (obj), TYPE_APIC_COMMON) -typedef struct APICCommonClass -{ +struct APICCommonClass { DeviceClass parent_class; DeviceRealize realize; @@ -151,7 +152,7 @@ typedef struct APICCommonClass * device, but it's convenient to have it here for now. */ void (*send_msi)(MSIMessage *msi); -} APICCommonClass; +}; struct APICCommonState { /*< private >*/ diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h index a98d10b252..8fdac227f2 100644 --- a/include/hw/i386/ich9.h +++ b/include/hw/i386/ich9.h @@ -11,6 +11,7 @@ #include "hw/acpi/acpi.h" #include "hw/acpi/ich9.h" #include "hw/pci/pci_bus.h" +#include "qom/object.h" void ich9_lpc_set_irq(void *opaque, int irq_num, int level); int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx); @@ -23,10 +24,11 @@ void ich9_generate_smi(void); #define ICH9_CC_SIZE (16 * 1024) /* 16KB. Chipset configuration registers */ #define TYPE_ICH9_LPC_DEVICE "ICH9-LPC" +typedef struct ICH9LPCState ICH9LPCState; #define ICH9_LPC_DEVICE(obj) \ OBJECT_CHECK(ICH9LPCState, (obj), TYPE_ICH9_LPC_DEVICE) -typedef struct ICH9LPCState { +struct ICH9LPCState { /* ICH9 LPC PCI to ISA bridge */ PCIDevice d; @@ -77,7 +79,7 @@ typedef struct ICH9LPCState { Notifier machine_ready; qemu_irq gsi[GSI_NUM_PINS]; -} ICH9LPCState; +}; #define Q35_MASK(bit, ms_bit, ls_bit) \ ((uint##bit##_t)(((1ULL << ((ms_bit) + 1)) - 1) & ~((1ULL << ls_bit) - 1))) diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index 3870052f5f..53e5d32d54 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -24,8 +24,10 @@ #include "hw/i386/x86-iommu.h" #include "qemu/iova-tree.h" +#include "qom/object.h" #define TYPE_INTEL_IOMMU_DEVICE "intel-iommu" +typedef struct IntelIOMMUState IntelIOMMUState; #define INTEL_IOMMU_DEVICE(obj) \ OBJECT_CHECK(IntelIOMMUState, (obj), TYPE_INTEL_IOMMU_DEVICE) @@ -56,7 +58,6 @@ typedef struct VTDContextEntry VTDContextEntry; typedef struct VTDContextCacheEntry VTDContextCacheEntry; -typedef struct IntelIOMMUState IntelIOMMUState; typedef struct VTDAddressSpace VTDAddressSpace; typedef struct VTDIOTLBEntry VTDIOTLBEntry; typedef struct VTDBus VTDBus; diff --git a/include/hw/i386/ioapic_internal.h b/include/hw/i386/ioapic_internal.h index fe06938bda..29ae150727 100644 --- a/include/hw/i386/ioapic_internal.h +++ b/include/hw/i386/ioapic_internal.h @@ -25,6 +25,7 @@ #include "exec/memory.h" #include "hw/sysbus.h" #include "qemu/notify.h" +#include "qom/object.h" #define MAX_IOAPICS 1 @@ -84,6 +85,7 @@ typedef struct IOAPICCommonState IOAPICCommonState; #define TYPE_IOAPIC_COMMON "ioapic-common" +typedef struct IOAPICCommonClass IOAPICCommonClass; #define IOAPIC_COMMON(obj) \ OBJECT_CHECK(IOAPICCommonState, (obj), TYPE_IOAPIC_COMMON) #define IOAPIC_COMMON_CLASS(klass) \ @@ -91,14 +93,14 @@ typedef struct IOAPICCommonState IOAPICCommonState; #define IOAPIC_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(IOAPICCommonClass, (obj), TYPE_IOAPIC_COMMON) -typedef struct IOAPICCommonClass { +struct IOAPICCommonClass { SysBusDeviceClass parent_class; DeviceRealize realize; DeviceUnrealize unrealize; void (*pre_save)(IOAPICCommonState *s); void (*post_load)(IOAPICCommonState *s); -} IOAPICCommonClass; +}; struct IOAPICCommonState { SysBusDevice busdev; diff --git a/include/hw/i386/microvm.h b/include/hw/i386/microvm.h index fd34b78e0d..0556f64206 100644 --- a/include/hw/i386/microvm.h +++ b/include/hw/i386/microvm.h @@ -24,6 +24,7 @@ #include "hw/boards.h" #include "hw/i386/x86.h" +#include "qom/object.h" /* Platform virtio definitions */ #define VIRTIO_MMIO_BASE 0xfeb00000 @@ -39,13 +40,14 @@ #define MICROVM_MACHINE_OPTION_ROMS "x-option-roms" #define MICROVM_MACHINE_AUTO_KERNEL_CMDLINE "auto-kernel-cmdline" -typedef struct { +struct MicrovmMachineClass { X86MachineClass parent; HotplugHandler *(*orig_hotplug_handler)(MachineState *machine, DeviceState *dev); -} MicrovmMachineClass; +}; +typedef struct MicrovmMachineClass MicrovmMachineClass; -typedef struct { +struct MicrovmMachineState { X86MachineState parent; /* Machine type options */ @@ -58,7 +60,8 @@ typedef struct { /* Machine state */ bool kernel_cmdline_fixed; -} MicrovmMachineState; +}; +typedef struct MicrovmMachineState MicrovmMachineState; #define TYPE_MICROVM_MACHINE MACHINE_TYPE_NAME("microvm") #define MICROVM_MACHINE(obj) \ diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 3d7ed3a55e..7c90730a0a 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -10,6 +10,7 @@ #include "hw/acpi/acpi_dev_interface.h" #include "hw/hotplug.h" +#include "qom/object.h" #define HPET_INTCAP "hpet-intcap" @@ -76,7 +77,7 @@ struct PCMachineState { * way we can use 1GByte pages in the host. * */ -typedef struct PCMachineClass { +struct PCMachineClass { /*< private >*/ X86MachineClass parent_class; @@ -118,7 +119,8 @@ typedef struct PCMachineClass { /* use PVH to load kernels that support this feature */ bool pvh_enabled; -} PCMachineClass; +}; +typedef struct PCMachineClass PCMachineClass; #define TYPE_PC_MACHINE "generic-pc-machine" #define PC_MACHINE(obj) \ diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h index 8e10383b11..805230c14b 100644 --- a/include/hw/i386/x86-iommu.h +++ b/include/hw/i386/x86-iommu.h @@ -23,8 +23,11 @@ #include "hw/sysbus.h" #include "hw/pci/pci.h" #include "hw/pci/msi.h" +#include "qom/object.h" #define TYPE_X86_IOMMU_DEVICE ("x86-iommu") +typedef struct X86IOMMUClass X86IOMMUClass; +typedef struct X86IOMMUState X86IOMMUState; #define X86_IOMMU_DEVICE(obj) \ OBJECT_CHECK(X86IOMMUState, (obj), TYPE_X86_IOMMU_DEVICE) #define X86_IOMMU_CLASS(klass) \ @@ -34,8 +37,6 @@ #define X86_IOMMU_SID_INVALID (0xffff) -typedef struct X86IOMMUState X86IOMMUState; -typedef struct X86IOMMUClass X86IOMMUClass; typedef struct X86IOMMUIrq X86IOMMUIrq; typedef struct X86IOMMU_MSIMessage X86IOMMU_MSIMessage; diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index b79f24e285..7084bb24e6 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -26,8 +26,9 @@ #include "hw/nmi.h" #include "hw/isa/isa.h" #include "hw/i386/ioapic.h" +#include "qom/object.h" -typedef struct { +struct X86MachineClass { /*< private >*/ MachineClass parent; @@ -37,9 +38,10 @@ typedef struct { bool save_tsc_khz; /* Enables contiguous-apic-ID mode */ bool compat_apic_id_mode; -} X86MachineClass; +}; +typedef struct X86MachineClass X86MachineClass; -typedef struct { +struct X86MachineState { /*< private >*/ MachineState parent; @@ -77,7 +79,8 @@ typedef struct { * will be translated to MSI messages in the address space. */ AddressSpace *ioapic_as; -} X86MachineState; +}; +typedef struct X86MachineState X86MachineState; #define X86_MACHINE_SMM "smm" #define X86_MACHINE_ACPI "acpi" diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index 41bb517047..110269f152 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -25,6 +25,7 @@ #define HW_IDE_AHCI_H #include "hw/sysbus.h" +#include "qom/object.h" typedef struct AHCIDevice AHCIDevice; @@ -60,31 +61,33 @@ int32_t ahci_get_num_ports(PCIDevice *dev); void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd); #define TYPE_SYSBUS_AHCI "sysbus-ahci" +typedef struct SysbusAHCIState SysbusAHCIState; #define SYSBUS_AHCI(obj) OBJECT_CHECK(SysbusAHCIState, (obj), TYPE_SYSBUS_AHCI) -typedef struct SysbusAHCIState { +struct SysbusAHCIState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ AHCIState ahci; uint32_t num_ports; -} SysbusAHCIState; +}; #define TYPE_ALLWINNER_AHCI "allwinner-ahci" +typedef struct AllwinnerAHCIState AllwinnerAHCIState; #define ALLWINNER_AHCI(obj) \ OBJECT_CHECK(AllwinnerAHCIState, (obj), TYPE_ALLWINNER_AHCI) #define ALLWINNER_AHCI_MMIO_OFF 0x80 #define ALLWINNER_AHCI_MMIO_SIZE 0x80 -typedef struct AllwinnerAHCIState { +struct AllwinnerAHCIState { /*< private >*/ SysbusAHCIState parent_obj; /*< public >*/ MemoryRegion mmio; uint32_t regs[ALLWINNER_AHCI_MMIO_SIZE/4]; -} AllwinnerAHCIState; +}; #endif /* HW_IDE_AHCI_H */ diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index 1a7869e85d..74ea1e324c 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -17,6 +17,7 @@ /* debug IDE devices */ #define USE_DMA_CDROM +#include "qom/object.h" typedef struct IDEBus IDEBus; typedef struct IDEDevice IDEDevice; @@ -486,6 +487,7 @@ struct IDEBus { }; #define TYPE_IDE_DEVICE "ide-device" +typedef struct IDEDeviceClass IDEDeviceClass; #define IDE_DEVICE(obj) \ OBJECT_CHECK(IDEDevice, (obj), TYPE_IDE_DEVICE) #define IDE_DEVICE_CLASS(klass) \ @@ -493,10 +495,10 @@ struct IDEBus { #define IDE_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(IDEDeviceClass, (obj), TYPE_IDE_DEVICE) -typedef struct IDEDeviceClass { +struct IDEDeviceClass { DeviceClass parent_class; void (*realize)(IDEDevice *dev, Error **errp); -} IDEDeviceClass; +}; struct IDEDevice { DeviceState qdev; diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h index dd504e5a0b..7ed1fa101d 100644 --- a/include/hw/ide/pci.h +++ b/include/hw/ide/pci.h @@ -3,6 +3,7 @@ #include "hw/ide/internal.h" #include "hw/pci/pci.h" +#include "qom/object.h" #define BM_STATUS_DMAING 0x01 #define BM_STATUS_ERROR 0x02 @@ -39,9 +40,10 @@ typedef struct BMDMAState { } BMDMAState; #define TYPE_PCI_IDE "pci-ide" +typedef struct PCIIDEState PCIIDEState; #define PCI_IDE(obj) OBJECT_CHECK(PCIIDEState, (obj), TYPE_PCI_IDE) -typedef struct PCIIDEState { +struct PCIIDEState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -52,7 +54,7 @@ typedef struct PCIIDEState { MemoryRegion bmdma_bar; MemoryRegion cmd_bar[2]; MemoryRegion data_bar[2]; -} PCIIDEState; +}; static inline IDEState *bmdma_active_if(BMDMAState *bmdma) { diff --git a/include/hw/input/adb.h b/include/hw/input/adb.h index bb75a7b1e3..ad89a21176 100644 --- a/include/hw/input/adb.h +++ b/include/hw/input/adb.h @@ -27,6 +27,7 @@ #define ADB_H #include "hw/qdev-core.h" +#include "qom/object.h" #define MAX_ADB_DEVICES 16 @@ -42,6 +43,7 @@ typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, typedef bool ADBDeviceHasData(ADBDevice *d); #define TYPE_ADB_DEVICE "adb-device" +typedef struct ADBDeviceClass ADBDeviceClass; #define ADB_DEVICE(obj) OBJECT_CHECK(ADBDevice, (obj), TYPE_ADB_DEVICE) struct ADBDevice { @@ -58,14 +60,14 @@ struct ADBDevice { #define ADB_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(ADBDeviceClass, (obj), TYPE_ADB_DEVICE) -typedef struct ADBDeviceClass { +struct ADBDeviceClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ ADBDeviceRequest *devreq; ADBDeviceHasData *devhasdata; -} ADBDeviceClass; +}; #define TYPE_ADB_BUS "apple-desktop-bus" #define ADB_BUS(obj) OBJECT_CHECK(ADBBusState, (obj), TYPE_ADB_BUS) diff --git a/include/hw/input/i8042.h b/include/hw/input/i8042.h index 4569dfddd9..d4bf584699 100644 --- a/include/hw/input/i8042.h +++ b/include/hw/input/i8042.h @@ -9,13 +9,14 @@ #define HW_INPUT_I8042_H #include "hw/isa/isa.h" +#include "qom/object.h" #define TYPE_I8042 "i8042" +typedef struct ISAKBDState ISAKBDState; #define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042) #define I8042_A20_LINE "a20" -typedef struct ISAKBDState ISAKBDState; void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, MemoryRegion *region, ram_addr_t size, diff --git a/include/hw/intc/allwinner-a10-pic.h b/include/hw/intc/allwinner-a10-pic.h index a5895401d1..692d2a88d0 100644 --- a/include/hw/intc/allwinner-a10-pic.h +++ b/include/hw/intc/allwinner-a10-pic.h @@ -2,8 +2,10 @@ #define ALLWINNER_A10_PIC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_AW_A10_PIC "allwinner-a10-pic" +typedef struct AwA10PICState AwA10PICState; #define AW_A10_PIC(obj) OBJECT_CHECK(AwA10PICState, (obj), TYPE_AW_A10_PIC) #define AW_A10_PIC_VECTOR 0 @@ -19,7 +21,7 @@ #define AW_A10_PIC_INT_NR 95 #define AW_A10_PIC_REG_NUM DIV_ROUND_UP(AW_A10_PIC_INT_NR, 32) -typedef struct AwA10PICState { +struct AwA10PICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -37,6 +39,6 @@ typedef struct AwA10PICState { uint32_t enable[AW_A10_PIC_REG_NUM]; uint32_t mask[AW_A10_PIC_REG_NUM]; /*priority setting here*/ -} AwA10PICState; +}; #endif diff --git a/include/hw/intc/arm_gic.h b/include/hw/intc/arm_gic.h index 303b9748cb..704ef2b751 100644 --- a/include/hw/intc/arm_gic.h +++ b/include/hw/intc/arm_gic.h @@ -65,6 +65,7 @@ #define HW_ARM_GIC_H #include "arm_gic_common.h" +#include "qom/object.h" /* Number of SGI target-list bits */ #define GIC_TARGETLIST_BITS 8 @@ -72,6 +73,7 @@ #define GIC_MIN_PRIORITY_BITS 4 #define TYPE_ARM_GIC "arm_gic" +typedef struct ARMGICClass ARMGICClass; #define ARM_GIC(obj) \ OBJECT_CHECK(GICState, (obj), TYPE_ARM_GIC) #define ARM_GIC_CLASS(klass) \ @@ -79,12 +81,12 @@ #define ARM_GIC_GET_CLASS(obj) \ OBJECT_GET_CLASS(ARMGICClass, (obj), TYPE_ARM_GIC) -typedef struct ARMGICClass { +struct ARMGICClass { /*< private >*/ ARMGICCommonClass parent_class; /*< public >*/ DeviceRealize parent_realize; -} ARMGICClass; +}; #endif diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h index 6e0d6b8a88..2cbde9b7a9 100644 --- a/include/hw/intc/arm_gic_common.h +++ b/include/hw/intc/arm_gic_common.h @@ -22,6 +22,7 @@ #define HW_ARM_GIC_COMMON_H #include "hw/sysbus.h" +#include "qom/object.h" /* Maximum number of possible interrupts, determined by the GIC architecture */ #define GIC_MAXIRQ 1020 @@ -61,7 +62,7 @@ typedef struct gic_irq_state { uint8_t group; } gic_irq_state; -typedef struct GICState { +struct GICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -143,9 +144,11 @@ typedef struct GICState { bool irq_reset_nonsecure; /* configure IRQs as group 1 (NS) on reset? */ int dev_fd; /* kvm device fd if backed by kvm vgic support */ Error *migration_blocker; -} GICState; +}; +typedef struct GICState GICState; #define TYPE_ARM_GIC_COMMON "arm_gic_common" +typedef struct ARMGICCommonClass ARMGICCommonClass; #define ARM_GIC_COMMON(obj) \ OBJECT_CHECK(GICState, (obj), TYPE_ARM_GIC_COMMON) #define ARM_GIC_COMMON_CLASS(klass) \ @@ -153,14 +156,14 @@ typedef struct GICState { #define ARM_GIC_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(ARMGICCommonClass, (obj), TYPE_ARM_GIC_COMMON) -typedef struct ARMGICCommonClass { +struct ARMGICCommonClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ void (*pre_save)(GICState *s); void (*post_load)(GICState *s); -} ARMGICCommonClass; +}; void gic_init_irqs_and_mmio(GICState *s, qemu_irq_handler handler, const MemoryRegionOps *ops, diff --git a/include/hw/intc/arm_gicv3.h b/include/hw/intc/arm_gicv3.h index 4a6fd85e22..58e9131a33 100644 --- a/include/hw/intc/arm_gicv3.h +++ b/include/hw/intc/arm_gicv3.h @@ -13,20 +13,22 @@ #define HW_ARM_GICV3_H #include "arm_gicv3_common.h" +#include "qom/object.h" #define TYPE_ARM_GICV3 "arm-gicv3" +typedef struct ARMGICv3Class ARMGICv3Class; #define ARM_GICV3(obj) OBJECT_CHECK(GICv3State, (obj), TYPE_ARM_GICV3) #define ARM_GICV3_CLASS(klass) \ OBJECT_CLASS_CHECK(ARMGICv3Class, (klass), TYPE_ARM_GICV3) #define ARM_GICV3_GET_CLASS(obj) \ OBJECT_GET_CLASS(ARMGICv3Class, (obj), TYPE_ARM_GICV3) -typedef struct ARMGICv3Class { +struct ARMGICv3Class { /*< private >*/ ARMGICv3CommonClass parent_class; /*< public >*/ DeviceRealize parent_realize; -} ARMGICv3Class; +}; #endif diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index 31ec9a1ae4..86fb060320 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -26,6 +26,7 @@ #include "hw/sysbus.h" #include "hw/intc/arm_gic_common.h" +#include "qom/object.h" /* * Maximum number of possible interrupts, determined by the GIC architecture. @@ -279,6 +280,7 @@ GICV3_BITMAP_ACCESSORS(level) GICV3_BITMAP_ACCESSORS(edge_trigger) #define TYPE_ARM_GICV3_COMMON "arm-gicv3-common" +typedef struct ARMGICv3CommonClass ARMGICv3CommonClass; #define ARM_GICV3_COMMON(obj) \ OBJECT_CHECK(GICv3State, (obj), TYPE_ARM_GICV3_COMMON) #define ARM_GICV3_COMMON_CLASS(klass) \ @@ -286,14 +288,14 @@ GICV3_BITMAP_ACCESSORS(edge_trigger) #define ARM_GICV3_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(ARMGICv3CommonClass, (obj), TYPE_ARM_GICV3_COMMON) -typedef struct ARMGICv3CommonClass { +struct ARMGICv3CommonClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ void (*pre_save)(GICv3State *s); void (*post_load)(GICv3State *s); -} ARMGICv3CommonClass; +}; void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler, const MemoryRegionOps *ops, Error **errp); diff --git a/include/hw/intc/arm_gicv3_its_common.h b/include/hw/intc/arm_gicv3_its_common.h index fd1fe64c03..03a0fa335b 100644 --- a/include/hw/intc/arm_gicv3_its_common.h +++ b/include/hw/intc/arm_gicv3_its_common.h @@ -23,6 +23,7 @@ #include "hw/sysbus.h" #include "hw/intc/arm_gicv3_common.h" +#include "qom/object.h" #define ITS_CONTROL_SIZE 0x10000 #define ITS_TRANS_SIZE 0x10000 @@ -64,6 +65,7 @@ typedef struct GICv3ITSState GICv3ITSState; void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops); #define TYPE_ARM_GICV3_ITS_COMMON "arm-gicv3-its-common" +typedef struct GICv3ITSCommonClass GICv3ITSCommonClass; #define ARM_GICV3_ITS_COMMON(obj) \ OBJECT_CHECK(GICv3ITSState, (obj), TYPE_ARM_GICV3_ITS_COMMON) #define ARM_GICV3_ITS_COMMON_CLASS(klass) \ @@ -81,6 +83,5 @@ struct GICv3ITSCommonClass { void (*post_load)(GICv3ITSState *s); }; -typedef struct GICv3ITSCommonClass GICv3ITSCommonClass; #endif diff --git a/include/hw/intc/armv7m_nvic.h b/include/hw/intc/armv7m_nvic.h index a472c9b8f0..63098822fa 100644 --- a/include/hw/intc/armv7m_nvic.h +++ b/include/hw/intc/armv7m_nvic.h @@ -13,9 +13,11 @@ #include "target/arm/cpu.h" #include "hw/sysbus.h" #include "hw/timer/armv7m_systick.h" +#include "qom/object.h" #define TYPE_NVIC "armv7m_nvic" +typedef struct NVICState NVICState; #define NVIC(obj) \ OBJECT_CHECK(NVICState, (obj), TYPE_NVIC) @@ -35,7 +37,7 @@ typedef struct VecInfo { uint8_t level; /* exceptions <=15 never set level */ } VecInfo; -typedef struct NVICState { +struct NVICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -88,6 +90,6 @@ typedef struct NVICState { qemu_irq sysresetreq; SysTickState systick[M_REG_NUM_BANKS]; -} NVICState; +}; #endif diff --git a/include/hw/intc/aspeed_vic.h b/include/hw/intc/aspeed_vic.h index 107ff17c3b..f8844b3327 100644 --- a/include/hw/intc/aspeed_vic.h +++ b/include/hw/intc/aspeed_vic.h @@ -14,13 +14,15 @@ #define ASPEED_VIC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_VIC "aspeed.vic" +typedef struct AspeedVICState AspeedVICState; #define ASPEED_VIC(obj) OBJECT_CHECK(AspeedVICState, (obj), TYPE_ASPEED_VIC) #define ASPEED_VIC_NR_IRQS 51 -typedef struct AspeedVICState { +struct AspeedVICState { /*< private >*/ SysBusDevice parent_obj; @@ -43,6 +45,6 @@ typedef struct AspeedVICState { /* 0=low-sensitive/falling-edge, 1=high-sensitive/rising-edge */ uint64_t event; -} AspeedVICState; +}; #endif /* ASPEED_VIC_H */ diff --git a/include/hw/intc/bcm2835_ic.h b/include/hw/intc/bcm2835_ic.h index 392ded1cb3..4a9f093025 100644 --- a/include/hw/intc/bcm2835_ic.h +++ b/include/hw/intc/bcm2835_ic.h @@ -9,14 +9,16 @@ #define BCM2835_IC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_BCM2835_IC "bcm2835-ic" +typedef struct BCM2835ICState BCM2835ICState; #define BCM2835_IC(obj) OBJECT_CHECK(BCM2835ICState, (obj), TYPE_BCM2835_IC) #define BCM2835_IC_GPU_IRQ "gpu-irq" #define BCM2835_IC_ARM_IRQ "arm-irq" -typedef struct BCM2835ICState { +struct BCM2835ICState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -30,6 +32,6 @@ typedef struct BCM2835ICState { uint8_t arm_irq_level, arm_irq_enable; bool fiq_enable; uint8_t fiq_select; -} BCM2835ICState; +}; #endif diff --git a/include/hw/intc/bcm2836_control.h b/include/hw/intc/bcm2836_control.h index 2c22405686..7d8a51fc72 100644 --- a/include/hw/intc/bcm2836_control.h +++ b/include/hw/intc/bcm2836_control.h @@ -17,16 +17,18 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qom/object.h" /* 4 mailboxes per core, for 16 total */ #define BCM2836_NCORES 4 #define BCM2836_MBPERCORE 4 #define TYPE_BCM2836_CONTROL "bcm2836-control" +typedef struct BCM2836ControlState BCM2836ControlState; #define BCM2836_CONTROL(obj) \ OBJECT_CHECK(BCM2836ControlState, (obj), TYPE_BCM2836_CONTROL) -typedef struct BCM2836ControlState { +struct BCM2836ControlState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -56,6 +58,6 @@ typedef struct BCM2836ControlState { /* outputs to CPU cores */ qemu_irq irq[BCM2836_NCORES]; qemu_irq fiq[BCM2836_NCORES]; -} BCM2836ControlState; +}; #endif diff --git a/include/hw/intc/heathrow_pic.h b/include/hw/intc/heathrow_pic.h index b163e27ab9..bd9fc115a8 100644 --- a/include/hw/intc/heathrow_pic.h +++ b/include/hw/intc/heathrow_pic.h @@ -27,8 +27,10 @@ #define HW_INTC_HEATHROW_PIC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_HEATHROW "heathrow" +typedef struct HeathrowState HeathrowState; #define HEATHROW(obj) OBJECT_CHECK(HeathrowState, (obj), TYPE_HEATHROW) typedef struct HeathrowPICState { @@ -38,13 +40,13 @@ typedef struct HeathrowPICState { uint32_t level_triggered; } HeathrowPICState; -typedef struct HeathrowState { +struct HeathrowState { SysBusDevice parent_obj; MemoryRegion mem; HeathrowPICState pics[2]; qemu_irq irqs[1]; -} HeathrowState; +}; #define HEATHROW_NUM_IRQS 64 diff --git a/include/hw/intc/ibex_plic.h b/include/hw/intc/ibex_plic.h index ddc7909903..de94a41ee7 100644 --- a/include/hw/intc/ibex_plic.h +++ b/include/hw/intc/ibex_plic.h @@ -20,12 +20,14 @@ #define HW_IBEX_PLIC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IBEX_PLIC "ibex-plic" +typedef struct IbexPlicState IbexPlicState; #define IBEX_PLIC(obj) \ OBJECT_CHECK(IbexPlicState, (obj), TYPE_IBEX_PLIC) -typedef struct IbexPlicState { +struct IbexPlicState { /*< private >*/ SysBusDevice parent_obj; @@ -58,6 +60,6 @@ typedef struct IbexPlicState { uint32_t threshold_base; uint32_t claim_base; -} IbexPlicState; +}; #endif /* HW_IBEX_PLIC_H */ diff --git a/include/hw/intc/imx_avic.h b/include/hw/intc/imx_avic.h index 1b80769018..124f29f763 100644 --- a/include/hw/intc/imx_avic.h +++ b/include/hw/intc/imx_avic.h @@ -18,8 +18,10 @@ #define IMX_AVIC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IMX_AVIC "imx.avic" +typedef struct IMXAVICState IMXAVICState; #define IMX_AVIC(obj) OBJECT_CHECK(IMXAVICState, (obj), TYPE_IMX_AVIC) #define IMX_AVIC_NUM_IRQS 64 @@ -36,7 +38,7 @@ #define PRIO_PER_WORD (sizeof(uint32_t) * 8 / 4) #define PRIO_WORDS (IMX_AVIC_NUM_IRQS/PRIO_PER_WORD) -typedef struct IMXAVICState{ +struct IMXAVICState { /*< private >*/ SysBusDevice parent_obj; @@ -50,6 +52,6 @@ typedef struct IMXAVICState{ qemu_irq irq; qemu_irq fiq; uint32_t prio[PRIO_WORDS]; /* Priorities are 4-bits each */ -} IMXAVICState; +}; #endif /* IMX_AVIC_H */ diff --git a/include/hw/intc/imx_gpcv2.h b/include/hw/intc/imx_gpcv2.h index ed978b24bb..66befda3fd 100644 --- a/include/hw/intc/imx_gpcv2.h +++ b/include/hw/intc/imx_gpcv2.h @@ -2,19 +2,21 @@ #define IMX_GPCV2_H #include "hw/sysbus.h" +#include "qom/object.h" enum IMXGPCv2Registers { GPC_NUM = 0xE00 / sizeof(uint32_t), }; -typedef struct IMXGPCv2State { +struct IMXGPCv2State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion iomem; uint32_t regs[GPC_NUM]; -} IMXGPCv2State; +}; +typedef struct IMXGPCv2State IMXGPCv2State; #define TYPE_IMX_GPCV2 "imx-gpcv2" #define IMX_GPCV2(obj) OBJECT_CHECK(IMXGPCv2State, (obj), TYPE_IMX_GPCV2) diff --git a/include/hw/intc/intc.h b/include/hw/intc/intc.h index fb3e8e621f..b51c0ac0f4 100644 --- a/include/hw/intc/intc.h +++ b/include/hw/intc/intc.h @@ -5,6 +5,7 @@ #define TYPE_INTERRUPT_STATS_PROVIDER "intctrl" +typedef struct InterruptStatsProviderClass InterruptStatsProviderClass; #define INTERRUPT_STATS_PROVIDER_CLASS(klass) \ OBJECT_CLASS_CHECK(InterruptStatsProviderClass, (klass), \ TYPE_INTERRUPT_STATS_PROVIDER) @@ -17,7 +18,7 @@ typedef struct InterruptStatsProvider InterruptStatsProvider; -typedef struct InterruptStatsProviderClass { +struct InterruptStatsProviderClass { InterfaceClass parent; /* The returned pointer and statistics must remain valid until @@ -26,6 +27,6 @@ typedef struct InterruptStatsProviderClass { bool (*get_statistics)(InterruptStatsProvider *obj, uint64_t **irq_counts, unsigned int *nb_irqs); void (*print_info)(InterruptStatsProvider *obj, Monitor *mon); -} InterruptStatsProviderClass; +}; #endif diff --git a/include/hw/intc/mips_gic.h b/include/hw/intc/mips_gic.h index 8428287bf9..5670421e62 100644 --- a/include/hw/intc/mips_gic.h +++ b/include/hw/intc/mips_gic.h @@ -15,6 +15,7 @@ #include "hw/timer/mips_gictimer.h" #include "hw/sysbus.h" #include "cpu.h" +#include "qom/object.h" /* * GIC Specific definitions */ @@ -170,13 +171,13 @@ #define GIC_LOCAL_INT_WD 0 /* GIC watchdog */ #define TYPE_MIPS_GIC "mips-gic" +typedef struct MIPSGICState MIPSGICState; #define MIPS_GIC(obj) OBJECT_CHECK(MIPSGICState, (obj), TYPE_MIPS_GIC) /* Support up to 32 VPs and 256 IRQs */ #define GIC_MAX_VPS 32 #define GIC_MAX_INTRS 256 -typedef struct MIPSGICState MIPSGICState; typedef struct MIPSGICIRQState MIPSGICIRQState; typedef struct MIPSGICVPState MIPSGICVPState; diff --git a/include/hw/intc/realview_gic.h b/include/hw/intc/realview_gic.h index 1783ea11b9..e633992b9c 100644 --- a/include/hw/intc/realview_gic.h +++ b/include/hw/intc/realview_gic.h @@ -12,17 +12,19 @@ #include "hw/sysbus.h" #include "hw/intc/arm_gic.h" +#include "qom/object.h" #define TYPE_REALVIEW_GIC "realview_gic" +typedef struct RealViewGICState RealViewGICState; #define REALVIEW_GIC(obj) \ OBJECT_CHECK(RealViewGICState, (obj), TYPE_REALVIEW_GIC) -typedef struct RealViewGICState { +struct RealViewGICState { SysBusDevice parent_obj; MemoryRegion container; GICState gic; -} RealViewGICState; +}; #endif diff --git a/include/hw/intc/rx_icu.h b/include/hw/intc/rx_icu.h index 7176015cd9..5660cb4e7f 100644 --- a/include/hw/intc/rx_icu.h +++ b/include/hw/intc/rx_icu.h @@ -22,6 +22,7 @@ #define HW_INTC_RX_ICU_H #include "hw/sysbus.h" +#include "qom/object.h" enum TRG_MODE { TRG_LEVEL = 0, diff --git a/include/hw/intc/xlnx-pmu-iomod-intc.h b/include/hw/intc/xlnx-pmu-iomod-intc.h index 0bd118884a..fce35ac941 100644 --- a/include/hw/intc/xlnx-pmu-iomod-intc.h +++ b/include/hw/intc/xlnx-pmu-iomod-intc.h @@ -27,16 +27,18 @@ #include "hw/sysbus.h" #include "hw/register.h" +#include "qom/object.h" #define TYPE_XLNX_PMU_IO_INTC "xlnx.pmu_io_intc" +typedef struct XlnxPMUIOIntc XlnxPMUIOIntc; #define XLNX_PMU_IO_INTC(obj) \ OBJECT_CHECK(XlnxPMUIOIntc, (obj), TYPE_XLNX_PMU_IO_INTC) /* This is R_PIT3_CONTROL + 1 */ #define XLNXPMUIOINTC_R_MAX (0x78 + 1) -typedef struct XlnxPMUIOIntc { +struct XlnxPMUIOIntc { SysBusDevice parent_obj; MemoryRegion iomem; @@ -52,6 +54,6 @@ typedef struct XlnxPMUIOIntc { uint32_t regs[XLNXPMUIOINTC_R_MAX]; RegisterInfo regs_info[XLNXPMUIOINTC_R_MAX]; -} XlnxPMUIOIntc; +}; #endif /* HW_INTC_XLNX_PMU_IOMOD_INTC_H */ diff --git a/include/hw/intc/xlnx-zynqmp-ipi.h b/include/hw/intc/xlnx-zynqmp-ipi.h index 866c719c6f..9044ca5afe 100644 --- a/include/hw/intc/xlnx-zynqmp-ipi.h +++ b/include/hw/intc/xlnx-zynqmp-ipi.h @@ -27,9 +27,11 @@ #include "hw/sysbus.h" #include "hw/register.h" +#include "qom/object.h" #define TYPE_XLNX_ZYNQMP_IPI "xlnx.zynqmp_ipi" +typedef struct XlnxZynqMPIPI XlnxZynqMPIPI; #define XLNX_ZYNQMP_IPI(obj) \ OBJECT_CHECK(XlnxZynqMPIPI, (obj), TYPE_XLNX_ZYNQMP_IPI) @@ -38,7 +40,7 @@ #define NUM_IPIS 11 -typedef struct XlnxZynqMPIPI { +struct XlnxZynqMPIPI { /* Private */ SysBusDevice parent_obj; @@ -51,6 +53,6 @@ typedef struct XlnxZynqMPIPI { uint32_t regs[R_XLNX_ZYNQMP_IPI_MAX]; RegisterInfo regs_info[R_XLNX_ZYNQMP_IPI_MAX]; -} XlnxZynqMPIPI; +}; #endif /* XLNX_ZYNQMP_IPI_H */ diff --git a/include/hw/ipack/ipack.h b/include/hw/ipack/ipack.h index 1c07969bc9..ac6105ff8b 100644 --- a/include/hw/ipack/ipack.h +++ b/include/hw/ipack/ipack.h @@ -12,6 +12,7 @@ #define QEMU_IPACK_H #include "hw/qdev-core.h" +#include "qom/object.h" typedef struct IPackBus IPackBus; diff --git a/include/hw/ipmi/ipmi.h b/include/hw/ipmi/ipmi.h index 8a99d958bb..742c400533 100644 --- a/include/hw/ipmi/ipmi.h +++ b/include/hw/ipmi/ipmi.h @@ -27,6 +27,7 @@ #include "exec/memory.h" #include "hw/qdev-core.h" +#include "qom/object.h" #define MAX_IPMI_MSG_SIZE 300 @@ -109,6 +110,7 @@ uint32_t ipmi_next_uuid(void); #define TYPE_IPMI_INTERFACE "ipmi-interface" #define IPMI_INTERFACE(obj) \ INTERFACE_CHECK(IPMIInterface, (obj), TYPE_IPMI_INTERFACE) +typedef struct IPMIInterfaceClass IPMIInterfaceClass; #define IPMI_INTERFACE_CLASS(class) \ OBJECT_CLASS_CHECK(IPMIInterfaceClass, (class), TYPE_IPMI_INTERFACE) #define IPMI_INTERFACE_GET_CLASS(class) \ @@ -116,7 +118,7 @@ uint32_t ipmi_next_uuid(void); typedef struct IPMIInterface IPMIInterface; -typedef struct IPMIInterfaceClass { +struct IPMIInterfaceClass { InterfaceClass parent; /* @@ -169,12 +171,14 @@ typedef struct IPMIInterfaceClass { * Return the firmware info for a device. */ void (*get_fwinfo)(struct IPMIInterface *s, IPMIFwInfo *info); -} IPMIInterfaceClass; +}; /* * Define a BMC simulator (or perhaps a connection to a real BMC) */ #define TYPE_IPMI_BMC "ipmi-bmc" +typedef struct IPMIBmc IPMIBmc; +typedef struct IPMIBmcClass IPMIBmcClass; #define IPMI_BMC(obj) \ OBJECT_CHECK(IPMIBmc, (obj), TYPE_IPMI_BMC) #define IPMI_BMC_CLASS(obj_class) \ @@ -182,15 +186,15 @@ typedef struct IPMIInterfaceClass { #define IPMI_BMC_GET_CLASS(obj) \ OBJECT_GET_CLASS(IPMIBmcClass, (obj), TYPE_IPMI_BMC) -typedef struct IPMIBmc { +struct IPMIBmc { DeviceState parent; uint8_t slave_addr; IPMIInterface *intf; -} IPMIBmc; +}; -typedef struct IPMIBmcClass { +struct IPMIBmcClass { DeviceClass parent; /* Called when the system resets to report to the bmc. */ @@ -203,7 +207,7 @@ typedef struct IPMIBmcClass { uint8_t *cmd, unsigned int cmd_len, unsigned int max_cmd_len, uint8_t msg_id); -} IPMIBmcClass; +}; /* * Add a link property to obj that points to a BMC. @@ -267,10 +271,10 @@ int ipmi_bmc_sdr_find(IPMIBmc *b, uint16_t recid, void ipmi_bmc_gen_event(IPMIBmc *b, uint8_t *evt, bool log); #define TYPE_IPMI_BMC_SIMULATOR "ipmi-bmc-sim" +typedef struct IPMIBmcSim IPMIBmcSim; #define IPMI_BMC_SIMULATOR(obj) OBJECT_CHECK(IPMIBmcSim, (obj), \ TYPE_IPMI_BMC_SIMULATOR) -typedef struct IPMIBmcSim IPMIBmcSim; typedef struct RspBuffer { uint8_t buffer[MAX_IPMI_MSG_SIZE]; diff --git a/include/hw/isa/i8259_internal.h b/include/hw/isa/i8259_internal.h index 861d70d8f8..69170df6f8 100644 --- a/include/hw/isa/i8259_internal.h +++ b/include/hw/isa/i8259_internal.h @@ -28,10 +28,12 @@ #include "hw/isa/isa.h" #include "hw/intc/intc.h" #include "hw/intc/i8259.h" +#include "qom/object.h" typedef struct PICCommonState PICCommonState; #define TYPE_PIC_COMMON "pic-common" +typedef struct PICCommonClass PICCommonClass; #define PIC_COMMON(obj) \ OBJECT_CHECK(PICCommonState, (obj), TYPE_PIC_COMMON) #define PIC_COMMON_CLASS(klass) \ @@ -39,13 +41,12 @@ typedef struct PICCommonState PICCommonState; #define PIC_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(PICCommonClass, (obj), TYPE_PIC_COMMON) -typedef struct PICCommonClass -{ +struct PICCommonClass { ISADeviceClass parent_class; void (*pre_save)(PICCommonState *s); void (*post_load)(PICCommonState *s); -} PICCommonClass; +}; struct PICCommonState { ISADevice parent_obj; diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 52b61eed88..c7f27d5aa9 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -6,10 +6,12 @@ #include "exec/memory.h" #include "exec/ioport.h" #include "hw/qdev-core.h" +#include "qom/object.h" #define ISA_NUM_IRQS 16 #define TYPE_ISA_DEVICE "isa-device" +typedef struct ISADeviceClass ISADeviceClass; #define ISA_DEVICE(obj) \ OBJECT_CHECK(ISADevice, (obj), TYPE_ISA_DEVICE) #define ISA_DEVICE_CLASS(klass) \ @@ -36,6 +38,7 @@ static inline uint16_t applesmc_port(void) #define TYPE_ISADMA "isa-dma" +typedef struct IsaDmaClass IsaDmaClass; #define ISADMA_CLASS(klass) \ OBJECT_CLASS_CHECK(IsaDmaClass, (klass), TYPE_ISADMA) #define ISADMA_GET_CLASS(obj) \ @@ -53,7 +56,7 @@ typedef enum { typedef int (*IsaDmaTransferHandler)(void *opaque, int nchan, int pos, int size); -typedef struct IsaDmaClass { +struct IsaDmaClass { InterfaceClass parent; bool (*has_autoinitialization)(IsaDma *obj, int nchan); @@ -65,12 +68,12 @@ typedef struct IsaDmaClass { void (*register_channel)(IsaDma *obj, int nchan, IsaDmaTransferHandler transfer_handler, void *opaque); -} IsaDmaClass; +}; -typedef struct ISADeviceClass { +struct ISADeviceClass { DeviceClass parent_class; void (*build_aml)(ISADevice *dev, Aml *scope); -} ISADeviceClass; +}; struct ISABus { /*< private >*/ diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h index e16263d4b1..c8e98ea029 100644 --- a/include/hw/isa/pc87312.h +++ b/include/hw/isa/pc87312.h @@ -26,12 +26,14 @@ #define QEMU_PC87312_H #include "hw/isa/superio.h" +#include "qom/object.h" #define TYPE_PC87312_SUPERIO "pc87312" +typedef struct PC87312State PC87312State; #define PC87312(obj) OBJECT_CHECK(PC87312State, (obj), TYPE_PC87312_SUPERIO) -typedef struct PC87312State { +struct PC87312State { /*< private >*/ ISASuperIODevice parent_dev; /*< public >*/ @@ -49,7 +51,7 @@ typedef struct PC87312State { uint8_t selected_index; uint8_t regs[3]; -} PC87312State; +}; #endif diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h index 147cc0a7b7..c782c8b64e 100644 --- a/include/hw/isa/superio.h +++ b/include/hw/isa/superio.h @@ -12,8 +12,11 @@ #include "sysemu/sysemu.h" #include "hw/isa/isa.h" +#include "qom/object.h" #define TYPE_ISA_SUPERIO "isa-superio" +typedef struct ISASuperIOClass ISASuperIOClass; +typedef struct ISASuperIODevice ISASuperIODevice; #define ISA_SUPERIO(obj) \ OBJECT_CHECK(ISASuperIODevice, (obj), TYPE_ISA_SUPERIO) #define ISA_SUPERIO_GET_CLASS(obj) \ @@ -23,7 +26,7 @@ #define SUPERIO_MAX_SERIAL_PORTS 4 -typedef struct ISASuperIODevice { +struct ISASuperIODevice { /*< private >*/ ISADevice parent_obj; /*< public >*/ @@ -33,7 +36,7 @@ typedef struct ISASuperIODevice { ISADevice *floppy; ISADevice *kbc; ISADevice *ide; -} ISASuperIODevice; +}; typedef struct ISASuperIOFuncs { size_t count; @@ -43,7 +46,7 @@ typedef struct ISASuperIOFuncs { unsigned int (*get_dma)(ISASuperIODevice *sio, uint8_t index); } ISASuperIOFuncs; -typedef struct ISASuperIOClass { +struct ISASuperIOClass { /*< private >*/ ISADeviceClass parent_class; /*< public >*/ @@ -53,7 +56,7 @@ typedef struct ISASuperIOClass { ISASuperIOFuncs serial; ISASuperIOFuncs floppy; ISASuperIOFuncs ide; -} ISASuperIOClass; +}; #define TYPE_FDC37M81X_SUPERIO "fdc37m81x-superio" #define TYPE_SMC37C669_SUPERIO "smc37c669-superio" diff --git a/include/hw/m68k/mcf_fec.h b/include/hw/m68k/mcf_fec.h index c09e33a57c..c8ece3cb4b 100644 --- a/include/hw/m68k/mcf_fec.h +++ b/include/hw/m68k/mcf_fec.h @@ -9,6 +9,7 @@ #ifndef HW_M68K_MCF_FEC_H #define HW_M68K_MCF_FEC_H +#include "qom/object.h" #define TYPE_MCF_FEC_NET "mcf-fec" typedef struct mcf_fec_state mcf_fec_state; diff --git a/include/hw/mem/memory-device.h b/include/hw/mem/memory-device.h index 04476acb8f..d19bca5942 100644 --- a/include/hw/mem/memory-device.h +++ b/include/hw/mem/memory-device.h @@ -19,6 +19,7 @@ #define TYPE_MEMORY_DEVICE "memory-device" +typedef struct MemoryDeviceClass MemoryDeviceClass; #define MEMORY_DEVICE_CLASS(klass) \ OBJECT_CLASS_CHECK(MemoryDeviceClass, (klass), TYPE_MEMORY_DEVICE) #define MEMORY_DEVICE_GET_CLASS(obj) \ @@ -43,7 +44,7 @@ typedef struct MemoryDeviceState MemoryDeviceState; * be provided. Scattered memory regions are not supported for single * devices. */ -typedef struct MemoryDeviceClass { +struct MemoryDeviceClass { /* private */ InterfaceClass parent_class; @@ -94,7 +95,7 @@ typedef struct MemoryDeviceClass { */ void (*fill_device_info)(const MemoryDeviceState *md, MemoryDeviceInfo *info); -} MemoryDeviceClass; +}; MemoryDeviceInfoList *qmp_memory_device_list(void); uint64_t get_plugged_memory_size(void); diff --git a/include/hw/mem/nvdimm.h b/include/hw/mem/nvdimm.h index b67a1aedf6..4b4a4b5b17 100644 --- a/include/hw/mem/nvdimm.h +++ b/include/hw/mem/nvdimm.h @@ -27,6 +27,7 @@ #include "hw/acpi/bios-linker-loader.h" #include "qemu/uuid.h" #include "hw/acpi/aml-build.h" +#include "qom/object.h" #define NVDIMM_DEBUG 0 #define nvdimm_debug(fmt, ...) \ @@ -45,6 +46,8 @@ #define MIN_NAMESPACE_LABEL_SIZE (128UL << 10) #define TYPE_NVDIMM "nvdimm" +typedef struct NVDIMMClass NVDIMMClass; +typedef struct NVDIMMDevice NVDIMMDevice; #define NVDIMM(obj) OBJECT_CHECK(NVDIMMDevice, (obj), TYPE_NVDIMM) #define NVDIMM_CLASS(oc) OBJECT_CLASS_CHECK(NVDIMMClass, (oc), TYPE_NVDIMM) #define NVDIMM_GET_CLASS(obj) OBJECT_GET_CLASS(NVDIMMClass, (obj), \ @@ -92,7 +95,6 @@ struct NVDIMMDevice { */ QemuUUID uuid; }; -typedef struct NVDIMMDevice NVDIMMDevice; struct NVDIMMClass { /* private */ @@ -107,7 +109,6 @@ struct NVDIMMClass { void (*write_label_data)(NVDIMMDevice *nvdimm, const void *buf, uint64_t size, uint64_t offset); }; -typedef struct NVDIMMClass NVDIMMClass; #define NVDIMM_DSM_MEM_FILE "etc/acpi/nvdimm-mem" diff --git a/include/hw/mem/pc-dimm.h b/include/hw/mem/pc-dimm.h index 289edc0f3d..41d4ff39ba 100644 --- a/include/hw/mem/pc-dimm.h +++ b/include/hw/mem/pc-dimm.h @@ -18,8 +18,11 @@ #include "exec/memory.h" #include "hw/qdev-core.h" +#include "qom/object.h" #define TYPE_PC_DIMM "pc-dimm" +typedef struct PCDIMMDevice PCDIMMDevice; +typedef struct PCDIMMDeviceClass PCDIMMDeviceClass; #define PC_DIMM(obj) \ OBJECT_CHECK(PCDIMMDevice, (obj), TYPE_PC_DIMM) #define PC_DIMM_CLASS(oc) \ @@ -44,7 +47,7 @@ * Default value: -1, means that slot is auto-allocated. * @hostmem: host memory backend providing memory for @PCDIMMDevice */ -typedef struct PCDIMMDevice { +struct PCDIMMDevice { /* private */ DeviceState parent_obj; @@ -53,7 +56,7 @@ typedef struct PCDIMMDevice { uint32_t node; int32_t slot; HostMemoryBackend *hostmem; -} PCDIMMDevice; +}; /** * PCDIMMDeviceClass: @@ -63,7 +66,7 @@ typedef struct PCDIMMDevice { * memory of @dimm should be kept during live migration. Will not fail * after the device was realized. */ -typedef struct PCDIMMDeviceClass { +struct PCDIMMDeviceClass { /* private */ DeviceClass parent_class; @@ -71,7 +74,7 @@ typedef struct PCDIMMDeviceClass { void (*realize)(PCDIMMDevice *dimm, Error **errp); MemoryRegion *(*get_vmstate_memory_region)(PCDIMMDevice *dimm, Error **errp); -} PCDIMMDeviceClass; +}; void pc_dimm_pre_plug(PCDIMMDevice *dimm, MachineState *machine, const uint64_t *legacy_align, Error **errp); diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h index a941c55f27..ab79a66b1d 100644 --- a/include/hw/mips/cps.h +++ b/include/hw/mips/cps.h @@ -26,11 +26,13 @@ #include "hw/misc/mips_cpc.h" #include "hw/misc/mips_itu.h" #include "target/mips/cpu.h" +#include "qom/object.h" #define TYPE_MIPS_CPS "mips-cps" +typedef struct MIPSCPSState MIPSCPSState; #define MIPS_CPS(obj) OBJECT_CHECK(MIPSCPSState, (obj), TYPE_MIPS_CPS) -typedef struct MIPSCPSState { +struct MIPSCPSState { SysBusDevice parent_obj; uint32_t num_vp; @@ -42,7 +44,7 @@ typedef struct MIPSCPSState { MIPSGICState gic; MIPSCPCState cpc; MIPSITUState itu; -} MIPSCPSState; +}; qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number); diff --git a/include/hw/misc/a9scu.h b/include/hw/misc/a9scu.h index efb0c305c2..c5481f4dbb 100644 --- a/include/hw/misc/a9scu.h +++ b/include/hw/misc/a9scu.h @@ -11,10 +11,11 @@ #define HW_MISC_A9SCU_H #include "hw/sysbus.h" +#include "qom/object.h" /* A9MP private memory region. */ -typedef struct A9SCUState { +struct A9SCUState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -23,7 +24,8 @@ typedef struct A9SCUState { uint32_t control; uint32_t status; uint32_t num_cpu; -} A9SCUState; +}; +typedef struct A9SCUState A9SCUState; #define TYPE_A9_SCU "a9-scu" #define A9_SCU(obj) OBJECT_CHECK(A9SCUState, (obj), TYPE_A9_SCU) diff --git a/include/hw/misc/allwinner-cpucfg.h b/include/hw/misc/allwinner-cpucfg.h index 2c3693a8be..f5420b11d5 100644 --- a/include/hw/misc/allwinner-cpucfg.h +++ b/include/hw/misc/allwinner-cpucfg.h @@ -29,6 +29,7 @@ */ #define TYPE_AW_CPUCFG "allwinner-cpucfg" +typedef struct AwCpuCfgState AwCpuCfgState; #define AW_CPUCFG(obj) \ OBJECT_CHECK(AwCpuCfgState, (obj), TYPE_AW_CPUCFG) @@ -37,7 +38,7 @@ /** * Allwinner CPU Configuration Module instance state */ -typedef struct AwCpuCfgState { +struct AwCpuCfgState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -47,6 +48,6 @@ typedef struct AwCpuCfgState { uint32_t super_standby; uint32_t entry_addr; -} AwCpuCfgState; +}; #endif /* HW_MISC_ALLWINNER_CPUCFG_H */ diff --git a/include/hw/misc/allwinner-h3-ccu.h b/include/hw/misc/allwinner-h3-ccu.h index eec59649f3..60f0c56cd9 100644 --- a/include/hw/misc/allwinner-h3-ccu.h +++ b/include/hw/misc/allwinner-h3-ccu.h @@ -42,6 +42,7 @@ */ #define TYPE_AW_H3_CCU "allwinner-h3-ccu" +typedef struct AwH3ClockCtlState AwH3ClockCtlState; #define AW_H3_CCU(obj) \ OBJECT_CHECK(AwH3ClockCtlState, (obj), TYPE_AW_H3_CCU) @@ -50,7 +51,7 @@ /** * Allwinner H3 CCU object instance state. */ -typedef struct AwH3ClockCtlState { +struct AwH3ClockCtlState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -61,6 +62,6 @@ typedef struct AwH3ClockCtlState { /** Array of hardware registers */ uint32_t regs[AW_H3_CCU_REGS_NUM]; -} AwH3ClockCtlState; +}; #endif /* HW_MISC_ALLWINNER_H3_CCU_H */ diff --git a/include/hw/misc/allwinner-h3-dramc.h b/include/hw/misc/allwinner-h3-dramc.h index bacdf236b7..0538e598b0 100644 --- a/include/hw/misc/allwinner-h3-dramc.h +++ b/include/hw/misc/allwinner-h3-dramc.h @@ -58,6 +58,7 @@ */ #define TYPE_AW_H3_DRAMC "allwinner-h3-dramc" +typedef struct AwH3DramCtlState AwH3DramCtlState; #define AW_H3_DRAMC(obj) \ OBJECT_CHECK(AwH3DramCtlState, (obj), TYPE_AW_H3_DRAMC) @@ -66,7 +67,7 @@ /** * Allwinner H3 SDRAM Controller object instance state. */ -typedef struct AwH3DramCtlState { +struct AwH3DramCtlState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -101,6 +102,6 @@ typedef struct AwH3DramCtlState { /** @} */ -} AwH3DramCtlState; +}; #endif /* HW_MISC_ALLWINNER_H3_DRAMC_H */ diff --git a/include/hw/misc/allwinner-h3-sysctrl.h b/include/hw/misc/allwinner-h3-sysctrl.h index af4119e026..7360698f8f 100644 --- a/include/hw/misc/allwinner-h3-sysctrl.h +++ b/include/hw/misc/allwinner-h3-sysctrl.h @@ -43,6 +43,7 @@ */ #define TYPE_AW_H3_SYSCTRL "allwinner-h3-sysctrl" +typedef struct AwH3SysCtrlState AwH3SysCtrlState; #define AW_H3_SYSCTRL(obj) \ OBJECT_CHECK(AwH3SysCtrlState, (obj), TYPE_AW_H3_SYSCTRL) @@ -51,7 +52,7 @@ /** * Allwinner H3 System Control object instance state */ -typedef struct AwH3SysCtrlState { +struct AwH3SysCtrlState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -62,6 +63,6 @@ typedef struct AwH3SysCtrlState { /** Array of hardware registers */ uint32_t regs[AW_H3_SYSCTRL_REGS_NUM]; -} AwH3SysCtrlState; +}; #endif /* HW_MISC_ALLWINNER_H3_SYSCTRL_H */ diff --git a/include/hw/misc/allwinner-sid.h b/include/hw/misc/allwinner-sid.h index 4c1fa4762b..70cd7cc7c0 100644 --- a/include/hw/misc/allwinner-sid.h +++ b/include/hw/misc/allwinner-sid.h @@ -30,6 +30,7 @@ */ #define TYPE_AW_SID "allwinner-sid" +typedef struct AwSidState AwSidState; #define AW_SID(obj) \ OBJECT_CHECK(AwSidState, (obj), TYPE_AW_SID) @@ -38,7 +39,7 @@ /** * Allwinner Security ID object instance state */ -typedef struct AwSidState { +struct AwSidState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -55,6 +56,6 @@ typedef struct AwSidState { /** Stores the emulated device identifier */ QemuUUID identifier; -} AwSidState; +}; #endif /* HW_MISC_ALLWINNER_SID_H */ diff --git a/include/hw/misc/arm11scu.h b/include/hw/misc/arm11scu.h index 5ad0f3d339..7e2e6d2b44 100644 --- a/include/hw/misc/arm11scu.h +++ b/include/hw/misc/arm11scu.h @@ -12,11 +12,13 @@ #define HW_MISC_ARM11SCU_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ARM11_SCU "arm11-scu" +typedef struct ARM11SCUState ARM11SCUState; #define ARM11_SCU(obj) OBJECT_CHECK(ARM11SCUState, (obj), TYPE_ARM11_SCU) -typedef struct ARM11SCUState { +struct ARM11SCUState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -24,6 +26,6 @@ typedef struct ARM11SCUState { uint32_t control; uint32_t num_cpu; MemoryRegion iomem; -} ARM11SCUState; +}; #endif diff --git a/include/hw/misc/armsse-cpuid.h b/include/hw/misc/armsse-cpuid.h index 0ef33fcaba..290a52cf10 100644 --- a/include/hw/misc/armsse-cpuid.h +++ b/include/hw/misc/armsse-cpuid.h @@ -23,11 +23,13 @@ #define HW_MISC_ARMSSE_CPUID_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ARMSSE_CPUID "armsse-cpuid" +typedef struct ARMSSECPUID ARMSSECPUID; #define ARMSSE_CPUID(obj) OBJECT_CHECK(ARMSSECPUID, (obj), TYPE_ARMSSE_CPUID) -typedef struct ARMSSECPUID { +struct ARMSSECPUID { /*< private >*/ SysBusDevice parent_obj; @@ -36,6 +38,6 @@ typedef struct ARMSSECPUID { /* Properties */ uint32_t cpuid; -} ARMSSECPUID; +}; #endif diff --git a/include/hw/misc/armsse-mhu.h b/include/hw/misc/armsse-mhu.h index cf5d8a73e6..d1ae4a463a 100644 --- a/include/hw/misc/armsse-mhu.h +++ b/include/hw/misc/armsse-mhu.h @@ -24,11 +24,13 @@ #define HW_MISC_ARMSSE_MHU_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ARMSSE_MHU "armsse-mhu" +typedef struct ARMSSEMHU ARMSSEMHU; #define ARMSSE_MHU(obj) OBJECT_CHECK(ARMSSEMHU, (obj), TYPE_ARMSSE_MHU) -typedef struct ARMSSEMHU { +struct ARMSSEMHU { /*< private >*/ SysBusDevice parent_obj; @@ -39,6 +41,6 @@ typedef struct ARMSSEMHU { uint32_t cpu0intr; uint32_t cpu1intr; -} ARMSSEMHU; +}; #endif diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h index a6739bb846..5e03f6db3a 100644 --- a/include/hw/misc/aspeed_scu.h +++ b/include/hw/misc/aspeed_scu.h @@ -12,8 +12,11 @@ #define ASPEED_SCU_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_SCU "aspeed.scu" +typedef struct AspeedSCUClass AspeedSCUClass; +typedef struct AspeedSCUState AspeedSCUState; #define ASPEED_SCU(obj) OBJECT_CHECK(AspeedSCUState, (obj), TYPE_ASPEED_SCU) #define TYPE_ASPEED_2400_SCU TYPE_ASPEED_SCU "-ast2400" #define TYPE_ASPEED_2500_SCU TYPE_ASPEED_SCU "-ast2500" @@ -22,7 +25,7 @@ #define ASPEED_SCU_NR_REGS (0x1A8 >> 2) #define ASPEED_AST2600_SCU_NR_REGS (0xE20 >> 2) -typedef struct AspeedSCUState { +struct AspeedSCUState { /*< private >*/ SysBusDevice parent_obj; @@ -34,7 +37,7 @@ typedef struct AspeedSCUState { uint32_t hw_strap1; uint32_t hw_strap2; uint32_t hw_prot_key; -} AspeedSCUState; +}; #define AST2400_A0_SILICON_REV 0x02000303U #define AST2400_A1_SILICON_REV 0x02010303U @@ -52,7 +55,7 @@ extern bool is_supported_silicon_rev(uint32_t silicon_rev); #define ASPEED_SCU_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedSCUClass, (obj), TYPE_ASPEED_SCU) -typedef struct AspeedSCUClass { +struct AspeedSCUClass { SysBusDeviceClass parent_class; const uint32_t *resets; @@ -60,7 +63,7 @@ typedef struct AspeedSCUClass { uint32_t apb_divider; uint32_t nr_regs; const MemoryRegionOps *ops; -} AspeedSCUClass; +}; #define ASPEED_SCU_PROT_KEY 0x1688A8A8 diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h index cea1e67fe3..8ee5e8e483 100644 --- a/include/hw/misc/aspeed_sdmc.h +++ b/include/hw/misc/aspeed_sdmc.h @@ -10,8 +10,11 @@ #define ASPEED_SDMC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_SDMC "aspeed.sdmc" +typedef struct AspeedSDMCClass AspeedSDMCClass; +typedef struct AspeedSDMCState AspeedSDMCState; #define ASPEED_SDMC(obj) OBJECT_CHECK(AspeedSDMCState, (obj), TYPE_ASPEED_SDMC) #define TYPE_ASPEED_2400_SDMC TYPE_ASPEED_SDMC "-ast2400" #define TYPE_ASPEED_2500_SDMC TYPE_ASPEED_SDMC "-ast2500" @@ -19,7 +22,7 @@ #define ASPEED_SDMC_NR_REGS (0x174 >> 2) -typedef struct AspeedSDMCState { +struct AspeedSDMCState { /*< private >*/ SysBusDevice parent_obj; @@ -29,20 +32,20 @@ typedef struct AspeedSDMCState { uint32_t regs[ASPEED_SDMC_NR_REGS]; uint64_t ram_size; uint64_t max_ram_size; -} AspeedSDMCState; +}; #define ASPEED_SDMC_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedSDMCClass, (klass), TYPE_ASPEED_SDMC) #define ASPEED_SDMC_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedSDMCClass, (obj), TYPE_ASPEED_SDMC) -typedef struct AspeedSDMCClass { +struct AspeedSDMCClass { SysBusDeviceClass parent_class; uint64_t max_ram_size; const uint64_t *valid_ram_sizes; uint32_t (*compute_conf)(AspeedSDMCState *s, uint32_t data); void (*write)(AspeedSDMCState *s, uint32_t reg, uint32_t data); -} AspeedSDMCClass; +}; #endif /* ASPEED_SDMC_H */ diff --git a/include/hw/misc/aspeed_xdma.h b/include/hw/misc/aspeed_xdma.h index 00b45d931f..e5177e2c02 100644 --- a/include/hw/misc/aspeed_xdma.h +++ b/include/hw/misc/aspeed_xdma.h @@ -10,14 +10,16 @@ #define ASPEED_XDMA_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_XDMA "aspeed.xdma" +typedef struct AspeedXDMAState AspeedXDMAState; #define ASPEED_XDMA(obj) OBJECT_CHECK(AspeedXDMAState, (obj), TYPE_ASPEED_XDMA) #define ASPEED_XDMA_NUM_REGS (ASPEED_XDMA_REG_SIZE / sizeof(uint32_t)) #define ASPEED_XDMA_REG_SIZE 0x7C -typedef struct AspeedXDMAState { +struct AspeedXDMAState { SysBusDevice parent; MemoryRegion iomem; @@ -25,6 +27,6 @@ typedef struct AspeedXDMAState { char bmc_cmdq_readp_set; uint32_t regs[ASPEED_XDMA_NUM_REGS]; -} AspeedXDMAState; +}; #endif /* ASPEED_XDMA_H */ diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h index 041edfc9e9..f24f2fd789 100644 --- a/include/hw/misc/auxbus.h +++ b/include/hw/misc/auxbus.h @@ -27,6 +27,7 @@ #include "exec/memory.h" #include "hw/qdev-core.h" +#include "qom/object.h" typedef struct AUXBus AUXBus; typedef struct AUXSlave AUXSlave; diff --git a/include/hw/misc/avr_power.h b/include/hw/misc/avr_power.h index e08e44f629..c230a2655c 100644 --- a/include/hw/misc/avr_power.h +++ b/include/hw/misc/avr_power.h @@ -27,12 +27,14 @@ #include "hw/sysbus.h" #include "hw/hw.h" +#include "qom/object.h" #define TYPE_AVR_MASK "avr-power" +typedef struct AVRMaskState AVRMaskState; #define AVR_MASK(obj) OBJECT_CHECK(AVRMaskState, (obj), TYPE_AVR_MASK) -typedef struct { +struct AVRMaskState { /* */ SysBusDevice parent_obj; @@ -41,6 +43,6 @@ typedef struct { uint8_t val; qemu_irq irq[8]; -} AVRMaskState; +}; #endif /* HW_MISC_AVR_POWER_H */ diff --git a/include/hw/misc/bcm2835_mbox.h b/include/hw/misc/bcm2835_mbox.h index 57f95cc35e..3ec6a2f0e8 100644 --- a/include/hw/misc/bcm2835_mbox.h +++ b/include/hw/misc/bcm2835_mbox.h @@ -10,8 +10,10 @@ #include "bcm2835_mbox_defs.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_BCM2835_MBOX "bcm2835-mbox" +typedef struct BCM2835MboxState BCM2835MboxState; #define BCM2835_MBOX(obj) \ OBJECT_CHECK(BCM2835MboxState, (obj), TYPE_BCM2835_MBOX) @@ -22,7 +24,7 @@ typedef struct { uint32_t config; } BCM2835Mbox; -typedef struct { +struct BCM2835MboxState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -34,6 +36,6 @@ typedef struct { bool mbox_irq_disabled; bool available[MBOX_CHAN_COUNT]; BCM2835Mbox mbox[2]; -} BCM2835MboxState; +}; #endif diff --git a/include/hw/misc/bcm2835_mphi.h b/include/hw/misc/bcm2835_mphi.h index e084314d0f..ce1c273cfb 100644 --- a/include/hw/misc/bcm2835_mphi.h +++ b/include/hw/misc/bcm2835_mphi.h @@ -19,6 +19,7 @@ #include "hw/irq.h" #include "hw/sysbus.h" +#include "qom/object.h" #define MPHI_MMIO_SIZE 0x1000 diff --git a/include/hw/misc/bcm2835_property.h b/include/hw/misc/bcm2835_property.h index b321f22499..28bf2b49b6 100644 --- a/include/hw/misc/bcm2835_property.h +++ b/include/hw/misc/bcm2835_property.h @@ -11,12 +11,14 @@ #include "hw/sysbus.h" #include "net/net.h" #include "hw/display/bcm2835_fb.h" +#include "qom/object.h" #define TYPE_BCM2835_PROPERTY "bcm2835-property" +typedef struct BCM2835PropertyState BCM2835PropertyState; #define BCM2835_PROPERTY(obj) \ OBJECT_CHECK(BCM2835PropertyState, (obj), TYPE_BCM2835_PROPERTY) -typedef struct { +struct BCM2835PropertyState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -31,6 +33,6 @@ typedef struct { uint32_t board_rev; uint32_t addr; bool pending; -} BCM2835PropertyState; +}; #endif diff --git a/include/hw/misc/bcm2835_rng.h b/include/hw/misc/bcm2835_rng.h index 41a531bce7..0921d9b3f1 100644 --- a/include/hw/misc/bcm2835_rng.h +++ b/include/hw/misc/bcm2835_rng.h @@ -11,17 +11,19 @@ #define BCM2835_RNG_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_BCM2835_RNG "bcm2835-rng" +typedef struct BCM2835RngState BCM2835RngState; #define BCM2835_RNG(obj) \ OBJECT_CHECK(BCM2835RngState, (obj), TYPE_BCM2835_RNG) -typedef struct { +struct BCM2835RngState { SysBusDevice busdev; MemoryRegion iomem; uint32_t rng_ctrl; uint32_t rng_status; -} BCM2835RngState; +}; #endif diff --git a/include/hw/misc/bcm2835_thermal.h b/include/hw/misc/bcm2835_thermal.h index c3651b27ec..2b937527eb 100644 --- a/include/hw/misc/bcm2835_thermal.h +++ b/include/hw/misc/bcm2835_thermal.h @@ -10,18 +10,20 @@ #define HW_MISC_BCM2835_THERMAL_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_BCM2835_THERMAL "bcm2835-thermal" +typedef struct Bcm2835ThermalState Bcm2835ThermalState; #define BCM2835_THERMAL(obj) \ OBJECT_CHECK(Bcm2835ThermalState, (obj), TYPE_BCM2835_THERMAL) -typedef struct { +struct Bcm2835ThermalState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion iomem; uint32_t ctl; -} Bcm2835ThermalState; +}; #endif diff --git a/include/hw/misc/grlib_ahb_apb_pnp.h b/include/hw/misc/grlib_ahb_apb_pnp.h index a0f6dcfda7..427606fd6b 100644 --- a/include/hw/misc/grlib_ahb_apb_pnp.h +++ b/include/hw/misc/grlib_ahb_apb_pnp.h @@ -23,16 +23,17 @@ #ifndef GRLIB_AHB_APB_PNP_H #define GRLIB_AHB_APB_PNP_H +#include "qom/object.h" #define TYPE_GRLIB_AHB_PNP "grlib,ahbpnp" +typedef struct AHBPnp AHBPnp; #define GRLIB_AHB_PNP(obj) \ OBJECT_CHECK(AHBPnp, (obj), TYPE_GRLIB_AHB_PNP) -typedef struct AHBPnp AHBPnp; #define TYPE_GRLIB_APB_PNP "grlib,apbpnp" +typedef struct APBPnp APBPnp; #define GRLIB_APB_PNP(obj) \ OBJECT_CHECK(APBPnp, (obj), TYPE_GRLIB_APB_PNP) -typedef struct APBPnp APBPnp; void grlib_ahb_pnp_add_entry(AHBPnp *dev, uint32_t address, uint32_t mask, uint8_t vendor, uint16_t device, int slave, diff --git a/include/hw/misc/imx25_ccm.h b/include/hw/misc/imx25_ccm.h index 296321c612..8a7a9b675f 100644 --- a/include/hw/misc/imx25_ccm.h +++ b/include/hw/misc/imx25_ccm.h @@ -12,6 +12,7 @@ #define IMX25_CCM_H #include "hw/misc/imx_ccm.h" +#include "qom/object.h" #define IMX25_CCM_MPCTL_REG 0 #define IMX25_CCM_UPCTL_REG 1 @@ -63,9 +64,10 @@ CCTL_##name##_SHIFT) #define TYPE_IMX25_CCM "imx25.ccm" +typedef struct IMX25CCMState IMX25CCMState; #define IMX25_CCM(obj) OBJECT_CHECK(IMX25CCMState, (obj), TYPE_IMX25_CCM) -typedef struct IMX25CCMState { +struct IMX25CCMState { /* */ IMXCCMState parent_obj; @@ -74,6 +76,6 @@ typedef struct IMX25CCMState { uint32_t reg[IMX25_CCM_MAX_REG]; -} IMX25CCMState; +}; #endif /* IMX25_CCM_H */ diff --git a/include/hw/misc/imx31_ccm.h b/include/hw/misc/imx31_ccm.h index c376fad14c..a56ee992af 100644 --- a/include/hw/misc/imx31_ccm.h +++ b/include/hw/misc/imx31_ccm.h @@ -12,6 +12,7 @@ #define IMX31_CCM_H #include "hw/misc/imx_ccm.h" +#include "qom/object.h" #define IMX31_CCM_CCMR_REG 0 #define IMX31_CCM_PDR0_REG 1 @@ -72,9 +73,10 @@ PDR0_##name##_PODF_SHIFT) #define TYPE_IMX31_CCM "imx31.ccm" +typedef struct IMX31CCMState IMX31CCMState; #define IMX31_CCM(obj) OBJECT_CHECK(IMX31CCMState, (obj), TYPE_IMX31_CCM) -typedef struct IMX31CCMState { +struct IMX31CCMState { /* */ IMXCCMState parent_obj; @@ -83,6 +85,6 @@ typedef struct IMX31CCMState { uint32_t reg[IMX31_CCM_MAX_REG]; -} IMX31CCMState; +}; #endif /* IMX31_CCM_H */ diff --git a/include/hw/misc/imx6_ccm.h b/include/hw/misc/imx6_ccm.h index 80505809b4..affa13087e 100644 --- a/include/hw/misc/imx6_ccm.h +++ b/include/hw/misc/imx6_ccm.h @@ -13,6 +13,7 @@ #include "hw/misc/imx_ccm.h" #include "qemu/bitops.h" +#include "qom/object.h" #define CCM_CCR 0 #define CCM_CCDR 1 @@ -178,9 +179,10 @@ #define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH) #define TYPE_IMX6_CCM "imx6.ccm" +typedef struct IMX6CCMState IMX6CCMState; #define IMX6_CCM(obj) OBJECT_CHECK(IMX6CCMState, (obj), TYPE_IMX6_CCM) -typedef struct IMX6CCMState { +struct IMX6CCMState { /* */ IMXCCMState parent_obj; @@ -192,6 +194,6 @@ typedef struct IMX6CCMState { uint32_t ccm[CCM_MAX]; uint32_t analog[CCM_ANALOG_MAX]; -} IMX6CCMState; +}; #endif /* IMX6_CCM_H */ diff --git a/include/hw/misc/imx6_src.h b/include/hw/misc/imx6_src.h index eb3640732e..f1d70ec177 100644 --- a/include/hw/misc/imx6_src.h +++ b/include/hw/misc/imx6_src.h @@ -13,6 +13,7 @@ #include "hw/sysbus.h" #include "qemu/bitops.h" +#include "qom/object.h" #define SRC_SCR 0 #define SRC_SBMR1 1 @@ -57,9 +58,10 @@ #define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH) #define TYPE_IMX6_SRC "imx6.src" +typedef struct IMX6SRCState IMX6SRCState; #define IMX6_SRC(obj) OBJECT_CHECK(IMX6SRCState, (obj), TYPE_IMX6_SRC) -typedef struct IMX6SRCState { +struct IMX6SRCState { /* */ SysBusDevice parent_obj; @@ -68,6 +70,6 @@ typedef struct IMX6SRCState { uint32_t regs[SRC_MAX]; -} IMX6SRCState; +}; #endif /* IMX6_SRC_H */ diff --git a/include/hw/misc/imx6ul_ccm.h b/include/hw/misc/imx6ul_ccm.h index 377ddca244..2304c6e738 100644 --- a/include/hw/misc/imx6ul_ccm.h +++ b/include/hw/misc/imx6ul_ccm.h @@ -12,6 +12,7 @@ #include "hw/misc/imx_ccm.h" #include "qemu/bitops.h" +#include "qom/object.h" #define CCM_CCR 0 #define CCM_CCDR 1 @@ -207,9 +208,10 @@ #define CCM_ANALOG_PLL_LOCK (1 << 31); #define TYPE_IMX6UL_CCM "imx6ul.ccm" +typedef struct IMX6ULCCMState IMX6ULCCMState; #define IMX6UL_CCM(obj) OBJECT_CHECK(IMX6ULCCMState, (obj), TYPE_IMX6UL_CCM) -typedef struct IMX6ULCCMState { +struct IMX6ULCCMState { /* */ IMXCCMState parent_obj; @@ -221,6 +223,6 @@ typedef struct IMX6ULCCMState { uint32_t ccm[CCM_MAX]; uint32_t analog[CCM_ANALOG_MAX]; -} IMX6ULCCMState; +}; #endif /* IMX6UL_CCM_H */ diff --git a/include/hw/misc/imx7_ccm.h b/include/hw/misc/imx7_ccm.h index 9538f37d98..9e9e58a5c2 100644 --- a/include/hw/misc/imx7_ccm.h +++ b/include/hw/misc/imx7_ccm.h @@ -14,6 +14,7 @@ #include "hw/misc/imx_ccm.h" #include "qemu/bitops.h" +#include "qom/object.h" enum IMX7AnalogRegisters { ANALOG_PLL_ARM, @@ -104,9 +105,10 @@ enum IMX7PMURegisters { }; #define TYPE_IMX7_CCM "imx7.ccm" +typedef struct IMX7CCMState IMX7CCMState; #define IMX7_CCM(obj) OBJECT_CHECK(IMX7CCMState, (obj), TYPE_IMX7_CCM) -typedef struct IMX7CCMState { +struct IMX7CCMState { /* */ IMXCCMState parent_obj; @@ -114,13 +116,14 @@ typedef struct IMX7CCMState { MemoryRegion iomem; uint32_t ccm[CCM_MAX]; -} IMX7CCMState; +}; #define TYPE_IMX7_ANALOG "imx7.analog" +typedef struct IMX7AnalogState IMX7AnalogState; #define IMX7_ANALOG(obj) OBJECT_CHECK(IMX7AnalogState, (obj), TYPE_IMX7_ANALOG) -typedef struct IMX7AnalogState { +struct IMX7AnalogState { /* */ IMXCCMState parent_obj; @@ -134,6 +137,6 @@ typedef struct IMX7AnalogState { uint32_t analog[ANALOG_MAX]; uint32_t pmu[PMU_MAX]; -} IMX7AnalogState; +}; #endif /* IMX7_CCM_H */ diff --git a/include/hw/misc/imx7_gpr.h b/include/hw/misc/imx7_gpr.h index e19373d274..83384ec0cc 100644 --- a/include/hw/misc/imx7_gpr.h +++ b/include/hw/misc/imx7_gpr.h @@ -14,15 +14,17 @@ #include "qemu/bitops.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IMX7_GPR "imx7.gpr" +typedef struct IMX7GPRState IMX7GPRState; #define IMX7_GPR(obj) OBJECT_CHECK(IMX7GPRState, (obj), TYPE_IMX7_GPR) -typedef struct IMX7GPRState { +struct IMX7GPRState { /* */ SysBusDevice parent_obj; MemoryRegion mmio; -} IMX7GPRState; +}; #endif /* IMX7_GPR_H */ diff --git a/include/hw/misc/imx7_snvs.h b/include/hw/misc/imx7_snvs.h index 255f8f26f9..f8659acb7d 100644 --- a/include/hw/misc/imx7_snvs.h +++ b/include/hw/misc/imx7_snvs.h @@ -14,6 +14,7 @@ #include "qemu/bitops.h" #include "hw/sysbus.h" +#include "qom/object.h" enum IMX7SNVSRegisters { @@ -23,13 +24,14 @@ enum IMX7SNVSRegisters { }; #define TYPE_IMX7_SNVS "imx7.snvs" +typedef struct IMX7SNVSState IMX7SNVSState; #define IMX7_SNVS(obj) OBJECT_CHECK(IMX7SNVSState, (obj), TYPE_IMX7_SNVS) -typedef struct IMX7SNVSState { +struct IMX7SNVSState { /* */ SysBusDevice parent_obj; MemoryRegion mmio; -} IMX7SNVSState; +}; #endif /* IMX7_SNVS_H */ diff --git a/include/hw/misc/imx_ccm.h b/include/hw/misc/imx_ccm.h index 33cbc09952..30eb25a6d0 100644 --- a/include/hw/misc/imx_ccm.h +++ b/include/hw/misc/imx_ccm.h @@ -12,6 +12,7 @@ #define IMX_CCM_H #include "hw/sysbus.h" +#include "qom/object.h" #define CKIL_FREQ 32768 /* nominal 32khz clock */ @@ -27,6 +28,8 @@ #define PLL_MFN(x) (((x) & 0x3ff) << 0) #define TYPE_IMX_CCM "imx.ccm" +typedef struct IMXCCMClass IMXCCMClass; +typedef struct IMXCCMState IMXCCMState; #define IMX_CCM(obj) \ OBJECT_CHECK(IMXCCMState, (obj), TYPE_IMX_CCM) #define IMX_CCM_CLASS(klass) \ @@ -34,13 +37,13 @@ #define IMX_GET_CLASS(obj) \ OBJECT_GET_CLASS(IMXCCMClass, (obj), TYPE_IMX_CCM) -typedef struct IMXCCMState { +struct IMXCCMState { /* */ SysBusDevice parent_obj; /* */ -} IMXCCMState; +}; typedef enum { CLK_NONE, @@ -52,13 +55,13 @@ typedef enum { CLK_HIGH, } IMXClk; -typedef struct IMXCCMClass { +struct IMXCCMClass { /* */ SysBusDeviceClass parent_class; /* */ uint32_t (*get_clock_frequency)(IMXCCMState *s, IMXClk clk); -} IMXCCMClass; +}; uint32_t imx_ccm_calc_pll(uint32_t pllreg, uint32_t base_freq); diff --git a/include/hw/misc/imx_rngc.h b/include/hw/misc/imx_rngc.h index f0d2b44d4f..cd7ba8f91e 100644 --- a/include/hw/misc/imx_rngc.h +++ b/include/hw/misc/imx_rngc.h @@ -11,11 +11,13 @@ #define IMX_RNGC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IMX_RNGC "imx.rngc" +typedef struct IMXRNGCState IMXRNGCState; #define IMX_RNGC(obj) OBJECT_CHECK(IMXRNGCState, (obj), TYPE_IMX_RNGC) -typedef struct IMXRNGCState { +struct IMXRNGCState { /*< private >*/ SysBusDevice parent_obj; @@ -30,6 +32,6 @@ typedef struct IMXRNGCState { QEMUBH *self_test_bh; QEMUBH *seed_bh; qemu_irq irq; -} IMXRNGCState; +}; #endif /* IMX_RNGC_H */ diff --git a/include/hw/misc/iotkit-secctl.h b/include/hw/misc/iotkit-secctl.h index bcb0437be5..3d54d8f3de 100644 --- a/include/hw/misc/iotkit-secctl.h +++ b/include/hw/misc/iotkit-secctl.h @@ -56,8 +56,10 @@ #define IOTKIT_SECCTL_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IOTKIT_SECCTL "iotkit-secctl" +typedef struct IoTKitSecCtl IoTKitSecCtl; #define IOTKIT_SECCTL(obj) OBJECT_CHECK(IoTKitSecCtl, (obj), TYPE_IOTKIT_SECCTL) #define IOTS_APB_PPC0_NUM_PORTS 3 @@ -70,7 +72,6 @@ #define IOTS_NUM_MPC 4 #define IOTS_NUM_EXP_MSC 16 -typedef struct IoTKitSecCtl IoTKitSecCtl; /* State and IRQ lines relating to a PPC. For the * PPCs in the IoTKit not all the IRQ lines are used. diff --git a/include/hw/misc/iotkit-sysctl.h b/include/hw/misc/iotkit-sysctl.h index 601c8ecc0d..27fe6346e6 100644 --- a/include/hw/misc/iotkit-sysctl.h +++ b/include/hw/misc/iotkit-sysctl.h @@ -28,12 +28,14 @@ #define HW_MISC_IOTKIT_SYSCTL_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IOTKIT_SYSCTL "iotkit-sysctl" +typedef struct IoTKitSysCtl IoTKitSysCtl; #define IOTKIT_SYSCTL(obj) OBJECT_CHECK(IoTKitSysCtl, (obj), \ TYPE_IOTKIT_SYSCTL) -typedef struct IoTKitSysCtl { +struct IoTKitSysCtl { /*< private >*/ SysBusDevice parent_obj; @@ -67,6 +69,6 @@ typedef struct IoTKitSysCtl { uint32_t initsvtor1_rst; bool is_sse200; -} IoTKitSysCtl; +}; #endif diff --git a/include/hw/misc/iotkit-sysinfo.h b/include/hw/misc/iotkit-sysinfo.h index d84eb203b9..e0e610c75c 100644 --- a/include/hw/misc/iotkit-sysinfo.h +++ b/include/hw/misc/iotkit-sysinfo.h @@ -23,12 +23,14 @@ #define HW_MISC_IOTKIT_SYSINFO_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IOTKIT_SYSINFO "iotkit-sysinfo" +typedef struct IoTKitSysInfo IoTKitSysInfo; #define IOTKIT_SYSINFO(obj) OBJECT_CHECK(IoTKitSysInfo, (obj), \ TYPE_IOTKIT_SYSINFO) -typedef struct IoTKitSysInfo { +struct IoTKitSysInfo { /*< private >*/ SysBusDevice parent_obj; @@ -38,6 +40,6 @@ typedef struct IoTKitSysInfo { /* Properties */ uint32_t sys_version; uint32_t sys_config; -} IoTKitSysInfo; +}; #endif diff --git a/include/hw/misc/mac_via.h b/include/hw/misc/mac_via.h index 0be05d649b..a59750634f 100644 --- a/include/hw/misc/mac_via.h +++ b/include/hw/misc/mac_via.h @@ -12,6 +12,7 @@ #include "exec/memory.h" #include "hw/sysbus.h" #include "hw/misc/mos6522.h" +#include "qom/object.h" /* VIA 1 */ @@ -31,10 +32,11 @@ #define TYPE_MOS6522_Q800_VIA1 "mos6522-q800-via1" +typedef struct MOS6522Q800VIA1State MOS6522Q800VIA1State; #define MOS6522_Q800_VIA1(obj) OBJECT_CHECK(MOS6522Q800VIA1State, (obj), \ TYPE_MOS6522_Q800_VIA1) -typedef struct MOS6522Q800VIA1State { +struct MOS6522Q800VIA1State { /*< private >*/ MOS6522State parent_obj; @@ -47,7 +49,7 @@ typedef struct MOS6522Q800VIA1State { int64_t next_second; QEMUTimer *VBL_timer; int64_t next_VBL; -} MOS6522Q800VIA1State; +}; /* VIA 2 */ @@ -66,19 +68,21 @@ typedef struct MOS6522Q800VIA1State { #define VIA2_IRQ_ASC (1 << VIA2_IRQ_ASC_BIT) #define TYPE_MOS6522_Q800_VIA2 "mos6522-q800-via2" +typedef struct MOS6522Q800VIA2State MOS6522Q800VIA2State; #define MOS6522_Q800_VIA2(obj) OBJECT_CHECK(MOS6522Q800VIA2State, (obj), \ TYPE_MOS6522_Q800_VIA2) -typedef struct MOS6522Q800VIA2State { +struct MOS6522Q800VIA2State { /*< private >*/ MOS6522State parent_obj; -} MOS6522Q800VIA2State; +}; #define TYPE_MAC_VIA "mac_via" +typedef struct MacVIAState MacVIAState; #define MAC_VIA(obj) OBJECT_CHECK(MacVIAState, (obj), TYPE_MAC_VIA) -typedef struct MacVIAState { +struct MacVIAState { SysBusDevice busdev; VMChangeStateEntry *vmstate; @@ -113,6 +117,6 @@ typedef struct MacVIAState { uint8_t adb_data_in[128]; uint8_t adb_data_out[16]; uint8_t adb_autopoll_cmd; -} MacVIAState; +}; #endif diff --git a/include/hw/misc/macio/cuda.h b/include/hw/misc/macio/cuda.h index a8cf0be1ec..f2b0069262 100644 --- a/include/hw/misc/macio/cuda.h +++ b/include/hw/misc/macio/cuda.h @@ -27,6 +27,7 @@ #define CUDA_H #include "hw/misc/mos6522.h" +#include "qom/object.h" /* CUDA commands (2nd byte) */ #define CUDA_WARM_START 0x0 @@ -58,10 +59,11 @@ /* MOS6522 CUDA */ -typedef struct MOS6522CUDAState { +struct MOS6522CUDAState { /*< private >*/ MOS6522State parent_obj; -} MOS6522CUDAState; +}; +typedef struct MOS6522CUDAState MOS6522CUDAState; #define TYPE_MOS6522_CUDA "mos6522-cuda" #define MOS6522_CUDA(obj) OBJECT_CHECK(MOS6522CUDAState, (obj), \ @@ -69,9 +71,10 @@ typedef struct MOS6522CUDAState { /* Cuda */ #define TYPE_CUDA "cuda" +typedef struct CUDAState CUDAState; #define CUDA(obj) OBJECT_CHECK(CUDAState, (obj), TYPE_CUDA) -typedef struct CUDAState { +struct CUDAState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -97,6 +100,6 @@ typedef struct CUDAState { qemu_irq irq; uint8_t data_in[128]; uint8_t data_out[16]; -} CUDAState; +}; #endif /* CUDA_H */ diff --git a/include/hw/misc/macio/gpio.h b/include/hw/misc/macio/gpio.h index 24a4364b39..2234873250 100644 --- a/include/hw/misc/macio/gpio.h +++ b/include/hw/misc/macio/gpio.h @@ -28,11 +28,13 @@ #include "hw/ppc/openpic.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_MACIO_GPIO "macio-gpio" +typedef struct MacIOGPIOState MacIOGPIOState; #define MACIO_GPIO(obj) OBJECT_CHECK(MacIOGPIOState, (obj), TYPE_MACIO_GPIO) -typedef struct MacIOGPIOState { +struct MacIOGPIOState { /*< private >*/ SysBusDevice parent; /*< public >*/ @@ -43,7 +45,7 @@ typedef struct MacIOGPIOState { qemu_irq gpio_extirqs[10]; uint8_t gpio_levels[8]; uint8_t gpio_regs[36]; /* XXX Check count */ -} MacIOGPIOState; +}; void macio_set_gpio(MacIOGPIOState *s, uint32_t gpio, bool state); diff --git a/include/hw/misc/macio/macio.h b/include/hw/misc/macio/macio.h index 87335a991c..81c28eeef7 100644 --- a/include/hw/misc/macio/macio.h +++ b/include/hw/misc/macio/macio.h @@ -36,21 +36,24 @@ #include "hw/ppc/mac.h" #include "hw/ppc/mac_dbdma.h" #include "hw/ppc/openpic.h" +#include "qom/object.h" /* MacIO virtual bus */ #define TYPE_MACIO_BUS "macio-bus" +typedef struct MacIOBusState MacIOBusState; #define MACIO_BUS(obj) OBJECT_CHECK(MacIOBusState, (obj), TYPE_MACIO_BUS) -typedef struct MacIOBusState { +struct MacIOBusState { /*< private >*/ BusState parent_obj; -} MacIOBusState; +}; /* MacIO IDE */ #define TYPE_MACIO_IDE "macio-ide" +typedef struct MACIOIDEState MACIOIDEState; #define MACIO_IDE(obj) OBJECT_CHECK(MACIOIDEState, (obj), TYPE_MACIO_IDE) -typedef struct MACIOIDEState { +struct MACIOIDEState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -68,15 +71,16 @@ typedef struct MACIOIDEState { bool dma_active; uint32_t timing_reg; uint32_t irq_reg; -} MACIOIDEState; +}; void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table); void macio_ide_register_dma(MACIOIDEState *ide); #define TYPE_MACIO "macio" +typedef struct MacIOState MacIOState; #define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO) -typedef struct MacIOState { +struct MacIOState { /*< private >*/ PCIDevice parent; /*< public >*/ @@ -88,13 +92,14 @@ typedef struct MacIOState { DBDMAState dbdma; ESCCState escc; uint64_t frequency; -} MacIOState; +}; #define TYPE_OLDWORLD_MACIO "macio-oldworld" +typedef struct OldWorldMacIOState OldWorldMacIOState; #define OLDWORLD_MACIO(obj) \ OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO) -typedef struct OldWorldMacIOState { +struct OldWorldMacIOState { /*< private >*/ MacIOState parent_obj; /*< public >*/ @@ -103,13 +108,14 @@ typedef struct OldWorldMacIOState { MacIONVRAMState nvram; MACIOIDEState ide[2]; -} OldWorldMacIOState; +}; #define TYPE_NEWWORLD_MACIO "macio-newworld" +typedef struct NewWorldMacIOState NewWorldMacIOState; #define NEWWORLD_MACIO(obj) \ OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO) -typedef struct NewWorldMacIOState { +struct NewWorldMacIOState { /*< private >*/ MacIOState parent_obj; /*< public >*/ @@ -119,6 +125,6 @@ typedef struct NewWorldMacIOState { OpenPICState *pic; MACIOIDEState ide[2]; MacIOGPIOState gpio; -} NewWorldMacIOState; +}; #endif /* MACIO_H */ diff --git a/include/hw/misc/macio/pmu.h b/include/hw/misc/macio/pmu.h index 72f75612b6..b3982f6f32 100644 --- a/include/hw/misc/macio/pmu.h +++ b/include/hw/misc/macio/pmu.h @@ -12,6 +12,7 @@ #include "hw/misc/mos6522.h" #include "hw/misc/macio/gpio.h" +#include "qom/object.h" /* * PMU commands @@ -173,10 +174,11 @@ typedef enum { } PMUCmdState; /* MOS6522 PMU */ -typedef struct MOS6522PMUState { +struct MOS6522PMUState { /*< private >*/ MOS6522State parent_obj; -} MOS6522PMUState; +}; +typedef struct MOS6522PMUState MOS6522PMUState; #define TYPE_MOS6522_PMU "mos6522-pmu" #define MOS6522_PMU(obj) OBJECT_CHECK(MOS6522PMUState, (obj), \ @@ -186,7 +188,7 @@ typedef struct MOS6522PMUState { * @last_b: last value of B register */ -typedef struct PMUState { +struct PMUState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -228,7 +230,8 @@ typedef struct PMUState { /* GPIO */ MacIOGPIOState *gpio; -} PMUState; +}; +typedef struct PMUState PMUState; #define TYPE_VIA_PMU "via-pmu" #define VIA_PMU(obj) OBJECT_CHECK(PMUState, (obj), TYPE_VIA_PMU) diff --git a/include/hw/misc/max111x.h b/include/hw/misc/max111x.h index af7f1017ef..e903a1af9c 100644 --- a/include/hw/misc/max111x.h +++ b/include/hw/misc/max111x.h @@ -14,6 +14,7 @@ #define HW_MISC_MAX111X_H #include "hw/ssi/ssi.h" +#include "qom/object.h" /* * This is a model of the Maxim MAX1110/1111 ADC chip, which for QEMU @@ -31,7 +32,7 @@ * + the interrupt line is not correctly implemented, and will never * be lowered once it has been asserted. */ -typedef struct { +struct MAX111xState { SSISlave parent_obj; qemu_irq interrupt; @@ -43,7 +44,8 @@ typedef struct { uint8_t input[8]; int inputs, com; -} MAX111xState; +}; +typedef struct MAX111xState MAX111xState; #define TYPE_MAX_111X "max111x" diff --git a/include/hw/misc/mips_cmgcr.h b/include/hw/misc/mips_cmgcr.h index 3e6e223273..a334be8edd 100644 --- a/include/hw/misc/mips_cmgcr.h +++ b/include/hw/misc/mips_cmgcr.h @@ -11,8 +11,10 @@ #define MIPS_CMGCR_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_MIPS_GCR "mips-gcr" +typedef struct MIPSGCRState MIPSGCRState; #define MIPS_GCR(obj) OBJECT_CHECK(MIPSGCRState, (obj), TYPE_MIPS_GCR) #define GCR_BASE_ADDR 0x1fbf8000ULL @@ -70,7 +72,6 @@ struct MIPSGCRVPState { uint64_t reset_base; }; -typedef struct MIPSGCRState MIPSGCRState; struct MIPSGCRState { SysBusDevice parent_obj; diff --git a/include/hw/misc/mips_cpc.h b/include/hw/misc/mips_cpc.h index 3f670578b0..b0131e4a54 100644 --- a/include/hw/misc/mips_cpc.h +++ b/include/hw/misc/mips_cpc.h @@ -21,6 +21,7 @@ #define MIPS_CPC_H #include "hw/sysbus.h" +#include "qom/object.h" #define CPC_ADDRSPACE_SZ 0x6000 @@ -34,9 +35,10 @@ #define CPC_VP_RUNNING_OFS 0x30 #define TYPE_MIPS_CPC "mips-cpc" +typedef struct MIPSCPCState MIPSCPCState; #define MIPS_CPC(obj) OBJECT_CHECK(MIPSCPCState, (obj), TYPE_MIPS_CPC) -typedef struct MIPSCPCState { +struct MIPSCPCState { SysBusDevice parent_obj; uint32_t num_vp; @@ -44,6 +46,6 @@ typedef struct MIPSCPCState { MemoryRegion mr; uint64_t vp_running; /* Indicates which VPs are in the run state */ -} MIPSCPCState; +}; #endif /* MIPS_CPC_H */ diff --git a/include/hw/misc/mips_itu.h b/include/hw/misc/mips_itu.h index c44e7672b6..9ddb04708a 100644 --- a/include/hw/misc/mips_itu.h +++ b/include/hw/misc/mips_itu.h @@ -21,8 +21,10 @@ #define MIPS_ITU_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_MIPS_ITU "mips-itu" +typedef struct MIPSITUState MIPSITUState; #define MIPS_ITU(obj) OBJECT_CHECK(MIPSITUState, (obj), TYPE_MIPS_ITU) #define ITC_CELL_DEPTH_SHIFT 2 @@ -51,7 +53,7 @@ typedef struct ITCStorageCell { #define ITC_ADDRESSMAP_NUM 2 -typedef struct MIPSITUState { +struct MIPSITUState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -74,7 +76,7 @@ typedef struct MIPSITUState { bool saar_present; void *saar; -} MIPSITUState; +}; /* Get ITC Configuration Tag memory region. */ MemoryRegion *mips_itu_get_tag_region(MIPSITUState *itu); diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h index 97384c6e02..1f15826b1d 100644 --- a/include/hw/misc/mos6522.h +++ b/include/hw/misc/mos6522.h @@ -30,6 +30,7 @@ #include "exec/memory.h" #include "hw/sysbus.h" #include "hw/input/adb.h" +#include "qom/object.h" /* Bits in ACR */ #define SR_CTRL 0x1c /* Shift register control bits */ @@ -99,7 +100,7 @@ typedef struct MOS6522Timer { * @last_b: last value of B register * @last_acr: last value of ACR register */ -typedef struct MOS6522State { +struct MOS6522State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -120,12 +121,14 @@ typedef struct MOS6522State { uint64_t frequency; qemu_irq irq; -} MOS6522State; +}; +typedef struct MOS6522State MOS6522State; #define TYPE_MOS6522 "mos6522" +typedef struct MOS6522DeviceClass MOS6522DeviceClass; #define MOS6522(obj) OBJECT_CHECK(MOS6522State, (obj), TYPE_MOS6522) -typedef struct MOS6522DeviceClass { +struct MOS6522DeviceClass { DeviceClass parent_class; DeviceReset parent_reset; @@ -138,7 +141,7 @@ typedef struct MOS6522DeviceClass { uint64_t (*get_timer2_counter_value)(MOS6522State *dev, MOS6522Timer *ti); uint64_t (*get_timer1_load_time)(MOS6522State *dev, MOS6522Timer *ti); uint64_t (*get_timer2_load_time)(MOS6522State *dev, MOS6522Timer *ti); -} MOS6522DeviceClass; +}; #define MOS6522_DEVICE_CLASS(cls) \ OBJECT_CLASS_CHECK(MOS6522DeviceClass, (cls), TYPE_MOS6522) diff --git a/include/hw/misc/mps2-fpgaio.h b/include/hw/misc/mps2-fpgaio.h index 69e265cd4b..e844041bb0 100644 --- a/include/hw/misc/mps2-fpgaio.h +++ b/include/hw/misc/mps2-fpgaio.h @@ -22,11 +22,13 @@ #define MPS2_FPGAIO_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_MPS2_FPGAIO "mps2-fpgaio" +typedef struct MPS2FPGAIO MPS2FPGAIO; #define MPS2_FPGAIO(obj) OBJECT_CHECK(MPS2FPGAIO, (obj), TYPE_MPS2_FPGAIO) -typedef struct { +struct MPS2FPGAIO { /*< private >*/ SysBusDevice parent_obj; @@ -48,6 +50,6 @@ typedef struct { /* These hold the CLOCK_VIRTUAL ns tick when the CLK1HZ/CLK100HZ was zero */ int64_t clk1hz_tick_offset; int64_t clk100hz_tick_offset; -} MPS2FPGAIO; +}; #endif diff --git a/include/hw/misc/mps2-scc.h b/include/hw/misc/mps2-scc.h index 7045473788..10393c4e3a 100644 --- a/include/hw/misc/mps2-scc.h +++ b/include/hw/misc/mps2-scc.h @@ -13,13 +13,15 @@ #define MPS2_SCC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_MPS2_SCC "mps2-scc" +typedef struct MPS2SCC MPS2SCC; #define MPS2_SCC(obj) OBJECT_CHECK(MPS2SCC, (obj), TYPE_MPS2_SCC) #define NUM_OSCCLK 3 -typedef struct { +struct MPS2SCC { /*< private >*/ SysBusDevice parent_obj; @@ -38,6 +40,6 @@ typedef struct { uint32_t id; uint32_t oscclk[NUM_OSCCLK]; uint32_t oscclk_reset[NUM_OSCCLK]; -} MPS2SCC; +}; #endif diff --git a/include/hw/misc/msf2-sysreg.h b/include/hw/misc/msf2-sysreg.h index 5993f67b4e..6b5d03608a 100644 --- a/include/hw/misc/msf2-sysreg.h +++ b/include/hw/misc/msf2-sysreg.h @@ -26,6 +26,7 @@ #define HW_MSF2_SYSREG_H #include "hw/sysbus.h" +#include "qom/object.h" enum { ESRAM_CR = 0x00 / 4, @@ -61,9 +62,10 @@ enum { #define MSF2_SYSREG_MMIO_SIZE 0x300 #define TYPE_MSF2_SYSREG "msf2-sysreg" +typedef struct MSF2SysregState MSF2SysregState; #define MSF2_SYSREG(obj) OBJECT_CHECK(MSF2SysregState, (obj), TYPE_MSF2_SYSREG) -typedef struct MSF2SysregState { +struct MSF2SysregState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -72,6 +74,6 @@ typedef struct MSF2SysregState { uint8_t apb1div; uint32_t regs[MSF2_SYSREG_MMIO_SIZE / 4]; -} MSF2SysregState; +}; #endif /* HW_MSF2_SYSREG_H */ diff --git a/include/hw/misc/nrf51_rng.h b/include/hw/misc/nrf51_rng.h index b0133bf665..247f167100 100644 --- a/include/hw/misc/nrf51_rng.h +++ b/include/hw/misc/nrf51_rng.h @@ -36,7 +36,9 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qom/object.h" #define TYPE_NRF51_RNG "nrf51_soc.rng" +typedef struct NRF51RNGState NRF51RNGState; #define NRF51_RNG(obj) OBJECT_CHECK(NRF51RNGState, (obj), TYPE_NRF51_RNG) #define NRF51_RNG_SIZE 0x1000 @@ -54,7 +56,7 @@ #define NRF51_RNG_REG_CONFIG_DECEN 0 #define NRF51_RNG_REG_VALUE 0x508 -typedef struct { +struct NRF51RNGState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -78,7 +80,7 @@ typedef struct { uint32_t interrupt_enabled; uint32_t filter_enabled; -} NRF51RNGState; +}; #endif /* NRF51_RNG_H */ diff --git a/include/hw/misc/pca9552.h b/include/hw/misc/pca9552.h index 600356fbf9..ebf8425903 100644 --- a/include/hw/misc/pca9552.h +++ b/include/hw/misc/pca9552.h @@ -10,15 +10,17 @@ #define PCA9552_H #include "hw/i2c/i2c.h" +#include "qom/object.h" #define TYPE_PCA9552 "pca9552" #define TYPE_PCA955X "pca955x" +typedef struct PCA955xState PCA955xState; #define PCA955X(obj) OBJECT_CHECK(PCA955xState, (obj), TYPE_PCA955X) #define PCA955X_NR_REGS 10 #define PCA955X_PIN_COUNT_MAX 16 -typedef struct PCA955xState { +struct PCA955xState { /*< private >*/ I2CSlave i2c; /*< public >*/ @@ -29,6 +31,6 @@ typedef struct PCA955xState { uint8_t regs[PCA955X_NR_REGS]; qemu_irq gpio[PCA955X_PIN_COUNT_MAX]; char *description; /* For debugging purpose only */ -} PCA955xState; +}; #endif diff --git a/include/hw/misc/stm32f2xx_syscfg.h b/include/hw/misc/stm32f2xx_syscfg.h index 84e06fdecf..ff7c976d66 100644 --- a/include/hw/misc/stm32f2xx_syscfg.h +++ b/include/hw/misc/stm32f2xx_syscfg.h @@ -26,6 +26,7 @@ #define HW_STM32F2XX_SYSCFG_H #include "hw/sysbus.h" +#include "qom/object.h" #define SYSCFG_MEMRMP 0x00 #define SYSCFG_PMC 0x04 @@ -36,10 +37,11 @@ #define SYSCFG_CMPCR 0x20 #define TYPE_STM32F2XX_SYSCFG "stm32f2xx-syscfg" +typedef struct STM32F2XXSyscfgState STM32F2XXSyscfgState; #define STM32F2XX_SYSCFG(obj) \ OBJECT_CHECK(STM32F2XXSyscfgState, (obj), TYPE_STM32F2XX_SYSCFG) -typedef struct { +struct STM32F2XXSyscfgState { /* */ SysBusDevice parent_obj; @@ -55,6 +57,6 @@ typedef struct { uint32_t syscfg_cmpcr; qemu_irq irq; -} STM32F2XXSyscfgState; +}; #endif /* HW_STM32F2XX_SYSCFG_H */ diff --git a/include/hw/misc/stm32f4xx_exti.h b/include/hw/misc/stm32f4xx_exti.h index 707036a41b..7132615785 100644 --- a/include/hw/misc/stm32f4xx_exti.h +++ b/include/hw/misc/stm32f4xx_exti.h @@ -27,6 +27,7 @@ #include "hw/sysbus.h" #include "hw/hw.h" +#include "qom/object.h" #define EXTI_IMR 0x00 #define EXTI_EMR 0x04 @@ -36,13 +37,14 @@ #define EXTI_PR 0x14 #define TYPE_STM32F4XX_EXTI "stm32f4xx-exti" +typedef struct STM32F4xxExtiState STM32F4xxExtiState; #define STM32F4XX_EXTI(obj) \ OBJECT_CHECK(STM32F4xxExtiState, (obj), TYPE_STM32F4XX_EXTI) #define NUM_GPIO_EVENT_IN_LINES 16 #define NUM_INTERRUPT_OUT_LINES 16 -typedef struct { +struct STM32F4xxExtiState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -55,6 +57,6 @@ typedef struct { uint32_t exti_pr; qemu_irq irq[NUM_INTERRUPT_OUT_LINES]; -} STM32F4xxExtiState; +}; #endif diff --git a/include/hw/misc/stm32f4xx_syscfg.h b/include/hw/misc/stm32f4xx_syscfg.h index c62c6629e5..78130cb9c3 100644 --- a/include/hw/misc/stm32f4xx_syscfg.h +++ b/include/hw/misc/stm32f4xx_syscfg.h @@ -27,6 +27,7 @@ #include "hw/sysbus.h" #include "hw/hw.h" +#include "qom/object.h" #define SYSCFG_MEMRMP 0x00 #define SYSCFG_PMC 0x04 @@ -37,12 +38,13 @@ #define SYSCFG_CMPCR 0x20 #define TYPE_STM32F4XX_SYSCFG "stm32f4xx-syscfg" +typedef struct STM32F4xxSyscfgState STM32F4xxSyscfgState; #define STM32F4XX_SYSCFG(obj) \ OBJECT_CHECK(STM32F4xxSyscfgState, (obj), TYPE_STM32F4XX_SYSCFG) #define SYSCFG_NUM_EXTICR 4 -typedef struct { +struct STM32F4xxSyscfgState { /* */ SysBusDevice parent_obj; @@ -56,6 +58,6 @@ typedef struct { qemu_irq irq; qemu_irq gpio_out[16]; -} STM32F4xxSyscfgState; +}; #endif diff --git a/include/hw/misc/tz-mpc.h b/include/hw/misc/tz-mpc.h index 6f15945410..2d3eae0834 100644 --- a/include/hw/misc/tz-mpc.h +++ b/include/hw/misc/tz-mpc.h @@ -32,15 +32,16 @@ #define TZ_MPC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_TZ_MPC "tz-mpc" +typedef struct TZMPC TZMPC; #define TZ_MPC(obj) OBJECT_CHECK(TZMPC, (obj), TYPE_TZ_MPC) #define TZ_NUM_PORTS 16 #define TYPE_TZ_MPC_IOMMU_MEMORY_REGION "tz-mpc-iommu-memory-region" -typedef struct TZMPC TZMPC; struct TZMPC { /*< private >*/ diff --git a/include/hw/misc/tz-msc.h b/include/hw/misc/tz-msc.h index 116b96ae9b..3f719833a9 100644 --- a/include/hw/misc/tz-msc.h +++ b/include/hw/misc/tz-msc.h @@ -52,11 +52,13 @@ #include "hw/sysbus.h" #include "target/arm/idau.h" +#include "qom/object.h" #define TYPE_TZ_MSC "tz-msc" +typedef struct TZMSC TZMSC; #define TZ_MSC(obj) OBJECT_CHECK(TZMSC, (obj), TYPE_TZ_MSC) -typedef struct TZMSC { +struct TZMSC { /*< private >*/ SysBusDevice parent_obj; @@ -74,6 +76,6 @@ typedef struct TZMSC { AddressSpace downstream_as; MemoryRegion upstream; IDAUInterface *idau; -} TZMSC; +}; #endif diff --git a/include/hw/misc/tz-ppc.h b/include/hw/misc/tz-ppc.h index 080d6e2ec1..4646005fa5 100644 --- a/include/hw/misc/tz-ppc.h +++ b/include/hw/misc/tz-ppc.h @@ -66,13 +66,14 @@ #define TZ_PPC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_TZ_PPC "tz-ppc" +typedef struct TZPPC TZPPC; #define TZ_PPC(obj) OBJECT_CHECK(TZPPC, (obj), TYPE_TZ_PPC) #define TZ_NUM_PORTS 16 -typedef struct TZPPC TZPPC; typedef struct TZPPCPort { TZPPC *ppc; diff --git a/include/hw/misc/unimp.h b/include/hw/misc/unimp.h index 4c1d13c9bf..8d537df3f9 100644 --- a/include/hw/misc/unimp.h +++ b/include/hw/misc/unimp.h @@ -11,18 +11,20 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "qapi/error.h" +#include "qom/object.h" #define TYPE_UNIMPLEMENTED_DEVICE "unimplemented-device" +typedef struct UnimplementedDeviceState UnimplementedDeviceState; #define UNIMPLEMENTED_DEVICE(obj) \ OBJECT_CHECK(UnimplementedDeviceState, (obj), TYPE_UNIMPLEMENTED_DEVICE) -typedef struct { +struct UnimplementedDeviceState { SysBusDevice parent_obj; MemoryRegion iomem; char *name; uint64_t size; -} UnimplementedDeviceState; +}; /** * create_unimplemented_device: create and map a dummy device diff --git a/include/hw/misc/vmcoreinfo.h b/include/hw/misc/vmcoreinfo.h index d4f3d3a91c..cf0e51f863 100644 --- a/include/hw/misc/vmcoreinfo.h +++ b/include/hw/misc/vmcoreinfo.h @@ -14,18 +14,20 @@ #include "hw/qdev-core.h" #include "standard-headers/linux/qemu_fw_cfg.h" +#include "qom/object.h" #define VMCOREINFO_DEVICE "vmcoreinfo" +typedef struct VMCoreInfoState VMCoreInfoState; #define VMCOREINFO(obj) OBJECT_CHECK(VMCoreInfoState, (obj), VMCOREINFO_DEVICE) typedef struct fw_cfg_vmcoreinfo FWCfgVMCoreInfo; -typedef struct VMCoreInfoState { +struct VMCoreInfoState { DeviceClass parent_obj; bool has_vmcoreinfo; FWCfgVMCoreInfo vmcoreinfo; -} VMCoreInfoState; +}; /* returns NULL unless there is exactly one device */ static inline VMCoreInfoState *vmcoreinfo_find(void) diff --git a/include/hw/misc/zynq-xadc.h b/include/hw/misc/zynq-xadc.h index f1a410a376..7e9767c74f 100644 --- a/include/hw/misc/zynq-xadc.h +++ b/include/hw/misc/zynq-xadc.h @@ -16,6 +16,7 @@ #define ZYNQ_XADC_H #include "hw/sysbus.h" +#include "qom/object.h" #define ZYNQ_XADC_MMIO_SIZE 0x0020 #define ZYNQ_XADC_NUM_IO_REGS (ZYNQ_XADC_MMIO_SIZE / 4) @@ -23,10 +24,11 @@ #define ZYNQ_XADC_FIFO_DEPTH 15 #define TYPE_ZYNQ_XADC "xlnx,zynq-xadc" +typedef struct ZynqXADCState ZynqXADCState; #define ZYNQ_XADC(obj) \ OBJECT_CHECK(ZynqXADCState, (obj), TYPE_ZYNQ_XADC) -typedef struct ZynqXADCState { +struct ZynqXADCState { /*< private >*/ SysBusDevice parent_obj; @@ -41,6 +43,6 @@ typedef struct ZynqXADCState { struct IRQState *qemu_irq; -} ZynqXADCState; +}; #endif /* ZYNQ_XADC_H */ diff --git a/include/hw/net/allwinner-sun8i-emac.h b/include/hw/net/allwinner-sun8i-emac.h index eda034e96b..d39a8f0bf3 100644 --- a/include/hw/net/allwinner-sun8i-emac.h +++ b/include/hw/net/allwinner-sun8i-emac.h @@ -30,6 +30,7 @@ */ #define TYPE_AW_SUN8I_EMAC "allwinner-sun8i-emac" +typedef struct AwSun8iEmacState AwSun8iEmacState; #define AW_SUN8I_EMAC(obj) \ OBJECT_CHECK(AwSun8iEmacState, (obj), TYPE_AW_SUN8I_EMAC) @@ -38,7 +39,7 @@ /** * Allwinner Sun8i EMAC object instance state */ -typedef struct AwSun8iEmacState { +struct AwSun8iEmacState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -94,6 +95,6 @@ typedef struct AwSun8iEmacState { /** @} */ -} AwSun8iEmacState; +}; #endif /* HW_NET_ALLWINNER_SUN8I_H */ diff --git a/include/hw/net/allwinner_emac.h b/include/hw/net/allwinner_emac.h index 5013207d15..e927082580 100644 --- a/include/hw/net/allwinner_emac.h +++ b/include/hw/net/allwinner_emac.h @@ -28,8 +28,10 @@ #include "qemu/fifo8.h" #include "hw/net/mii.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_AW_EMAC "allwinner-emac" +typedef struct AwEmacState AwEmacState; #define AW_EMAC(obj) OBJECT_CHECK(AwEmacState, (obj), TYPE_AW_EMAC) /* @@ -144,7 +146,7 @@ typedef struct RTL8201CPState { uint16_t anlpar; } RTL8201CPState; -typedef struct AwEmacState { +struct AwEmacState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -171,6 +173,6 @@ typedef struct AwEmacState { Fifo8 tx_fifo[NUM_TX_FIFOS]; uint32_t tx_length[NUM_TX_FIFOS]; uint32_t tx_channel; -} AwEmacState; +}; #endif diff --git a/include/hw/net/cadence_gem.h b/include/hw/net/cadence_gem.h index 54e646ff79..04fd59a525 100644 --- a/include/hw/net/cadence_gem.h +++ b/include/hw/net/cadence_gem.h @@ -24,8 +24,10 @@ #ifndef CADENCE_GEM_H #define CADENCE_GEM_H +#include "qom/object.h" #define TYPE_CADENCE_GEM "cadence_gem" +typedef struct CadenceGEMState CadenceGEMState; #define CADENCE_GEM(obj) OBJECT_CHECK(CadenceGEMState, (obj), TYPE_CADENCE_GEM) #include "net/net.h" @@ -43,7 +45,7 @@ #define MAX_JUMBO_FRAME_SIZE_MASK 0x3FFF #define MAX_FRAME_SIZE MAX_JUMBO_FRAME_SIZE_MASK -typedef struct CadenceGEMState { +struct CadenceGEMState { /*< private >*/ SysBusDevice parent_obj; @@ -89,6 +91,6 @@ typedef struct CadenceGEMState { uint32_t rx_desc[MAX_PRIORITY_QUEUES][DESC_MAX_NUM_WORDS]; bool sar_active[4]; -} CadenceGEMState; +}; #endif diff --git a/include/hw/net/ftgmac100.h b/include/hw/net/ftgmac100.h index ab37e7b2b8..6371bf60ab 100644 --- a/include/hw/net/ftgmac100.h +++ b/include/hw/net/ftgmac100.h @@ -9,8 +9,10 @@ #ifndef FTGMAC100_H #define FTGMAC100_H +#include "qom/object.h" #define TYPE_FTGMAC100 "ftgmac100" +typedef struct FTGMAC100State FTGMAC100State; #define FTGMAC100(obj) OBJECT_CHECK(FTGMAC100State, (obj), TYPE_FTGMAC100) #include "hw/sysbus.h" @@ -21,7 +23,7 @@ */ #define FTGMAC100_MAX_FRAME_SIZE 9220 -typedef struct FTGMAC100State { +struct FTGMAC100State { /*< private >*/ SysBusDevice parent_obj; @@ -64,15 +66,16 @@ typedef struct FTGMAC100State { bool aspeed; uint32_t txdes0_edotr; uint32_t rxdes0_edorr; -} FTGMAC100State; +}; #define TYPE_ASPEED_MII "aspeed-mmi" +typedef struct AspeedMiiState AspeedMiiState; #define ASPEED_MII(obj) OBJECT_CHECK(AspeedMiiState, (obj), TYPE_ASPEED_MII) /* * AST2600 MII controller */ -typedef struct AspeedMiiState { +struct AspeedMiiState { /*< private >*/ SysBusDevice parent_obj; @@ -81,6 +84,6 @@ typedef struct AspeedMiiState { MemoryRegion iomem; uint32_t phycr; uint32_t phydata; -} AspeedMiiState; +}; #endif diff --git a/include/hw/net/imx_fec.h b/include/hw/net/imx_fec.h index 9f03034b89..4d6ac5e408 100644 --- a/include/hw/net/imx_fec.h +++ b/include/hw/net/imx_fec.h @@ -23,8 +23,10 @@ #ifndef IMX_FEC_H #define IMX_FEC_H +#include "qom/object.h" #define TYPE_IMX_FEC "imx.fec" +typedef struct IMXFECState IMXFECState; #define IMX_FEC(obj) OBJECT_CHECK(IMXFECState, (obj), TYPE_IMX_FEC) #define TYPE_IMX_ENET "imx.enet" @@ -247,7 +249,7 @@ typedef struct { #define FSL_IMX25_FEC_SIZE 0x4000 -typedef struct IMXFECState { +struct IMXFECState { /*< private >*/ SysBusDevice parent_obj; @@ -274,6 +276,6 @@ typedef struct IMXFECState { /* Buffer used to assemble a Tx frame */ uint8_t frame[ENET_MAX_FRAME_SIZE]; -} IMXFECState; +}; #endif diff --git a/include/hw/net/lance.h b/include/hw/net/lance.h index 0357f5f65c..fe459ffea7 100644 --- a/include/hw/net/lance.h +++ b/include/hw/net/lance.h @@ -32,15 +32,17 @@ #include "net/net.h" #include "hw/net/pcnet.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_LANCE "lance" +typedef struct SysBusPCNetState SysBusPCNetState; #define SYSBUS_PCNET(obj) \ OBJECT_CHECK(SysBusPCNetState, (obj), TYPE_LANCE) -typedef struct { +struct SysBusPCNetState { SysBusDevice parent_obj; PCNetState state; -} SysBusPCNetState; +}; #endif diff --git a/include/hw/net/lasi_82596.h b/include/hw/net/lasi_82596.h index e76ef8308e..141e0cc17a 100644 --- a/include/hw/net/lasi_82596.h +++ b/include/hw/net/lasi_82596.h @@ -10,18 +10,20 @@ #include "net/net.h" #include "hw/net/i82596.h" +#include "qom/object.h" #define TYPE_LASI_82596 "lasi_82596" +typedef struct SysBusI82596State SysBusI82596State; #define SYSBUS_I82596(obj) \ OBJECT_CHECK(SysBusI82596State, (obj), TYPE_LASI_82596) -typedef struct { +struct SysBusI82596State { SysBusDevice parent_obj; I82596State state; uint16_t last_val; int val_index:1; -} SysBusI82596State; +}; SysBusI82596State *lasi_82596_init(MemoryRegion *addr_space, hwaddr hpa, qemu_irq irq); diff --git a/include/hw/net/msf2-emac.h b/include/hw/net/msf2-emac.h index 37966d3a81..6aef711007 100644 --- a/include/hw/net/msf2-emac.h +++ b/include/hw/net/msf2-emac.h @@ -26,15 +26,17 @@ #include "exec/memory.h" #include "net/net.h" #include "net/eth.h" +#include "qom/object.h" #define TYPE_MSS_EMAC "msf2-emac" +typedef struct MSF2EmacState MSF2EmacState; #define MSS_EMAC(obj) \ OBJECT_CHECK(MSF2EmacState, (obj), TYPE_MSS_EMAC) #define R_MAX (0x1a0 / 4) #define PHY_MAX_REGS 32 -typedef struct MSF2EmacState { +struct MSF2EmacState { SysBusDevice parent; MemoryRegion mmio; @@ -50,4 +52,4 @@ typedef struct MSF2EmacState { uint16_t phy_regs[PHY_MAX_REGS]; uint32_t regs[R_MAX]; -} MSF2EmacState; +}; diff --git a/include/hw/nmi.h b/include/hw/nmi.h index fe37ce3ad8..47fc036e74 100644 --- a/include/hw/nmi.h +++ b/include/hw/nmi.h @@ -26,6 +26,7 @@ #define TYPE_NMI "nmi" +typedef struct NMIClass NMIClass; #define NMI_CLASS(klass) \ OBJECT_CLASS_CHECK(NMIClass, (klass), TYPE_NMI) #define NMI_GET_CLASS(obj) \ @@ -35,11 +36,11 @@ typedef struct NMIState NMIState; -typedef struct NMIClass { +struct NMIClass { InterfaceClass parent_class; void (*nmi_monitor_handler)(NMIState *n, int cpu_index, Error **errp); -} NMIClass; +}; void nmi_monitor_handle(int cpu_index, Error **errp); diff --git a/include/hw/nubus/mac-nubus-bridge.h b/include/hw/nubus/mac-nubus-bridge.h index ce9c789d99..8407ad21f6 100644 --- a/include/hw/nubus/mac-nubus-bridge.h +++ b/include/hw/nubus/mac-nubus-bridge.h @@ -10,15 +10,17 @@ #define HW_NUBUS_MAC_H #include "hw/nubus/nubus.h" +#include "qom/object.h" #define TYPE_MAC_NUBUS_BRIDGE "mac-nubus-bridge" +typedef struct MacNubusState MacNubusState; #define MAC_NUBUS_BRIDGE(obj) OBJECT_CHECK(MacNubusState, (obj), \ TYPE_MAC_NUBUS_BRIDGE) -typedef struct MacNubusState { +struct MacNubusState { SysBusDevice sysbus_dev; NubusBus *bus; -} MacNubusState; +}; #endif diff --git a/include/hw/nubus/nubus.h b/include/hw/nubus/nubus.h index c350948262..226efb2ff7 100644 --- a/include/hw/nubus/nubus.h +++ b/include/hw/nubus/nubus.h @@ -11,6 +11,7 @@ #include "hw/qdev-properties.h" #include "exec/address-spaces.h" +#include "qom/object.h" #define NUBUS_SUPER_SLOT_SIZE 0x10000000U #define NUBUS_SUPER_SLOT_NB 0x9 @@ -22,24 +23,26 @@ #define NUBUS_LAST_SLOT 0xF #define TYPE_NUBUS_DEVICE "nubus-device" +typedef struct NubusDevice NubusDevice; #define NUBUS_DEVICE(obj) \ OBJECT_CHECK(NubusDevice, (obj), TYPE_NUBUS_DEVICE) #define TYPE_NUBUS_BUS "nubus-bus" +typedef struct NubusBus NubusBus; #define NUBUS_BUS(obj) OBJECT_CHECK(NubusBus, (obj), TYPE_NUBUS_BUS) #define TYPE_NUBUS_BRIDGE "nubus-bridge" -typedef struct NubusBus { +struct NubusBus { BusState qbus; MemoryRegion super_slot_io; MemoryRegion slot_io; int current_slot; -} NubusBus; +}; -typedef struct NubusDevice { +struct NubusDevice { DeviceState qdev; int slot_nb; @@ -60,7 +63,7 @@ typedef struct NubusDevice { MemoryRegion rom_io; const uint8_t *rom; -} NubusDevice; +}; void nubus_register_rom(NubusDevice *dev, const uint8_t *rom, uint32_t size, int revision, int format, uint8_t byte_lanes); diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h index f190c428e8..5e00fdc21e 100644 --- a/include/hw/nvram/fw_cfg.h +++ b/include/hw/nvram/fw_cfg.h @@ -5,6 +5,7 @@ #include "standard-headers/linux/qemu_fw_cfg.h" #include "hw/sysbus.h" #include "sysemu/dma.h" +#include "qom/object.h" #define TYPE_FW_CFG "fw_cfg" #define TYPE_FW_CFG_IO "fw_cfg_io" @@ -15,6 +16,7 @@ #define FW_CFG_IO(obj) OBJECT_CHECK(FWCfgIoState, (obj), TYPE_FW_CFG_IO) #define FW_CFG_MEM(obj) OBJECT_CHECK(FWCfgMemState, (obj), TYPE_FW_CFG_MEM) +typedef struct FWCfgDataGeneratorClass FWCfgDataGeneratorClass; #define FW_CFG_DATA_GENERATOR_CLASS(class) \ OBJECT_CLASS_CHECK(FWCfgDataGeneratorClass, (class), \ TYPE_FW_CFG_DATA_GENERATOR_INTERFACE) @@ -22,7 +24,7 @@ OBJECT_GET_CLASS(FWCfgDataGeneratorClass, (obj), \ TYPE_FW_CFG_DATA_GENERATOR_INTERFACE) -typedef struct FWCfgDataGeneratorClass { +struct FWCfgDataGeneratorClass { /*< private >*/ InterfaceClass parent_class; /*< public >*/ @@ -39,7 +41,7 @@ typedef struct FWCfgDataGeneratorClass { * required. */ GByteArray *(*get_data)(Object *obj, Error **errp); -} FWCfgDataGeneratorClass; +}; typedef struct fw_cfg_file FWCfgFile; diff --git a/include/hw/nvram/nrf51_nvm.h b/include/hw/nvram/nrf51_nvm.h index 3792e4a9fe..48871667f1 100644 --- a/include/hw/nvram/nrf51_nvm.h +++ b/include/hw/nvram/nrf51_nvm.h @@ -23,7 +23,9 @@ #define NRF51_NVM_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_NRF51_NVM "nrf51_soc.nvm" +typedef struct NRF51NVMState NRF51NVMState; #define NRF51_NVM(obj) OBJECT_CHECK(NRF51NVMState, (obj), TYPE_NRF51_NVM) #define NRF51_UICR_FIXTURE_SIZE 64 @@ -44,7 +46,7 @@ #define NRF51_UICR_SIZE 0x100 -typedef struct NRF51NVMState { +struct NRF51NVMState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -58,7 +60,7 @@ typedef struct NRF51NVMState { uint32_t config; -} NRF51NVMState; +}; #endif diff --git a/include/hw/pci-bridge/simba.h b/include/hw/pci-bridge/simba.h index d8649973ee..300379b94d 100644 --- a/include/hw/pci-bridge/simba.h +++ b/include/hw/pci-bridge/simba.h @@ -28,12 +28,14 @@ #define HW_PCI_BRIDGE_SIMBA_H #include "hw/pci/pci_bridge.h" +#include "qom/object.h" -typedef struct SimbaPCIBridge { +struct SimbaPCIBridge { /*< private >*/ PCIBridge parent_obj; -} SimbaPCIBridge; +}; +typedef struct SimbaPCIBridge SimbaPCIBridge; #define TYPE_SIMBA_PCI_BRIDGE "pbm-bridge" #define SIMBA_PCI_BRIDGE(obj) \ diff --git a/include/hw/pci-host/designware.h b/include/hw/pci-host/designware.h index 31c41231b1..43ee5b3a12 100644 --- a/include/hw/pci-host/designware.h +++ b/include/hw/pci-host/designware.h @@ -26,17 +26,19 @@ #include "hw/pci/pci_bus.h" #include "hw/pci/pcie_host.h" #include "hw/pci/pci_bridge.h" +#include "qom/object.h" #define TYPE_DESIGNWARE_PCIE_HOST "designware-pcie-host" +typedef struct DesignwarePCIEHost DesignwarePCIEHost; #define DESIGNWARE_PCIE_HOST(obj) \ OBJECT_CHECK(DesignwarePCIEHost, (obj), TYPE_DESIGNWARE_PCIE_HOST) #define TYPE_DESIGNWARE_PCIE_ROOT "designware-pcie-root" +typedef struct DesignwarePCIERoot DesignwarePCIERoot; #define DESIGNWARE_PCIE_ROOT(obj) \ OBJECT_CHECK(DesignwarePCIERoot, (obj), TYPE_DESIGNWARE_PCIE_ROOT) struct DesignwarePCIERoot; -typedef struct DesignwarePCIERoot DesignwarePCIERoot; typedef struct DesignwarePCIEViewport { DesignwarePCIERoot *root; @@ -80,7 +82,7 @@ struct DesignwarePCIERoot { DesignwarePCIEMSI msi; }; -typedef struct DesignwarePCIEHost { +struct DesignwarePCIEHost { PCIHostState parent_obj; DesignwarePCIERoot root; @@ -96,6 +98,6 @@ typedef struct DesignwarePCIEHost { } pci; MemoryRegion mmio; -} DesignwarePCIEHost; +}; #endif /* DESIGNWARE_H */ diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h index faea040a93..d70e1c69dc 100644 --- a/include/hw/pci-host/gpex.h +++ b/include/hw/pci-host/gpex.h @@ -23,24 +23,27 @@ #include "hw/sysbus.h" #include "hw/pci/pci.h" #include "hw/pci/pcie_host.h" +#include "qom/object.h" #define TYPE_GPEX_HOST "gpex-pcihost" +typedef struct GPEXHost GPEXHost; #define GPEX_HOST(obj) \ OBJECT_CHECK(GPEXHost, (obj), TYPE_GPEX_HOST) #define TYPE_GPEX_ROOT_DEVICE "gpex-root" +typedef struct GPEXRootState GPEXRootState; #define MCH_PCI_DEVICE(obj) \ OBJECT_CHECK(GPEXRootState, (obj), TYPE_GPEX_ROOT_DEVICE) #define GPEX_NUM_IRQS 4 -typedef struct GPEXRootState { +struct GPEXRootState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ -} GPEXRootState; +}; -typedef struct GPEXHost { +struct GPEXHost { /*< private >*/ PCIExpressHost parent_obj; /*< public >*/ @@ -51,7 +54,7 @@ typedef struct GPEXHost { MemoryRegion io_mmio; qemu_irq irq[GPEX_NUM_IRQS]; int irq_num[GPEX_NUM_IRQS]; -} GPEXHost; +}; int gpex_set_irq_num(GPEXHost *s, int index, int gsi); diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index cc58d82ed4..74fe300bff 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -14,14 +14,16 @@ #include "hw/hw.h" #include "hw/pci/pci_bus.h" #include "hw/pci-host/pam.h" +#include "qom/object.h" #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" #define TYPE_I440FX_PCI_DEVICE "i440FX" +typedef struct PCII440FXState PCII440FXState; #define I440FX_PCI_DEVICE(obj) \ OBJECT_CHECK(PCII440FXState, (obj), TYPE_I440FX_PCI_DEVICE) -typedef struct PCII440FXState { +struct PCII440FXState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -32,7 +34,7 @@ typedef struct PCII440FXState { PAMMemoryRegion pam_regions[13]; MemoryRegion smram_region; MemoryRegion smram, low_smram; -} PCII440FXState; +}; #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index 75b787867a..43f9e873ae 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -13,6 +13,7 @@ #include "hw/pci/pcie_host.h" #include "hw/pci/pcie_port.h" #include "hw/ppc/xics.h" +#include "qom/object.h" typedef struct PnvPHB3 PnvPHB3; @@ -20,18 +21,19 @@ typedef struct PnvPHB3 PnvPHB3; * PHB3 XICS Source for MSIs */ #define TYPE_PHB3_MSI "phb3-msi" +typedef struct Phb3MsiState Phb3MsiState; #define PHB3_MSI(obj) OBJECT_CHECK(Phb3MsiState, (obj), TYPE_PHB3_MSI) #define PHB3_MAX_MSI 2048 -typedef struct Phb3MsiState { +struct Phb3MsiState { ICSState ics; qemu_irq *qirqs; PnvPHB3 *phb; uint64_t rba[PHB3_MAX_MSI / 64]; uint32_t rba_sum; -} Phb3MsiState; +}; void pnv_phb3_msi_update_config(Phb3MsiState *msis, uint32_t base, uint32_t count); @@ -69,9 +71,10 @@ typedef struct PnvPhb3DMASpace { * PHB3 Power Bus Common Queue */ #define TYPE_PNV_PBCQ "pnv-pbcq" +typedef struct PnvPBCQState PnvPBCQState; #define PNV_PBCQ(obj) OBJECT_CHECK(PnvPBCQState, (obj), TYPE_PNV_PBCQ) -typedef struct PnvPBCQState { +struct PnvPBCQState { DeviceState parent; uint32_t nest_xbase; @@ -96,7 +99,7 @@ typedef struct PnvPBCQState { MemoryRegion xscom_nest_regs; MemoryRegion xscom_pci_regs; MemoryRegion xscom_spci_regs; -} PnvPBCQState; +}; /* * PHB3 PCIe Root port diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index c882bfd0aa..450602cb72 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -13,6 +13,7 @@ #include "hw/pci/pcie_host.h" #include "hw/pci/pcie_port.h" #include "hw/ppc/xive.h" +#include "qom/object.h" typedef struct PnvPhb4PecState PnvPhb4PecState; typedef struct PnvPhb4PecStack PnvPhb4PecStack; @@ -140,6 +141,7 @@ extern const MemoryRegionOps pnv_phb4_xscom_ops; * PHB4 PEC (PCI Express Controller) */ #define TYPE_PNV_PHB4_PEC "pnv-phb4-pec" +typedef struct PnvPhb4PecClass PnvPhb4PecClass; #define PNV_PHB4_PEC(obj) \ OBJECT_CHECK(PnvPhb4PecState, (obj), TYPE_PNV_PHB4_PEC) @@ -214,7 +216,7 @@ struct PnvPhb4PecState { #define PNV_PHB4_PEC_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvPhb4PecClass, (obj), TYPE_PNV_PHB4_PEC) -typedef struct PnvPhb4PecClass { +struct PnvPhb4PecClass { DeviceClass parent_class; uint32_t (*xscom_nest_base)(PnvPhb4PecState *pec); @@ -225,6 +227,6 @@ typedef struct PnvPhb4PecClass { int compat_size; const char *stk_compat; int stk_compat_size; -} PnvPhb4PecClass; +}; #endif /* PCI_HOST_PNV_PHB4_H */ diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index 070305f83d..5db5a763d4 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -27,16 +27,19 @@ #include "hw/pci-host/pam.h" #include "qemu/units.h" #include "qemu/range.h" +#include "qom/object.h" #define TYPE_Q35_HOST_DEVICE "q35-pcihost" +typedef struct Q35PCIHost Q35PCIHost; #define Q35_HOST_DEVICE(obj) \ OBJECT_CHECK(Q35PCIHost, (obj), TYPE_Q35_HOST_DEVICE) #define TYPE_MCH_PCI_DEVICE "mch" +typedef struct MCHPCIState MCHPCIState; #define MCH_PCI_DEVICE(obj) \ OBJECT_CHECK(MCHPCIState, (obj), TYPE_MCH_PCI_DEVICE) -typedef struct MCHPCIState { +struct MCHPCIState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -57,16 +60,16 @@ typedef struct MCHPCIState { uint64_t pci_hole64_size; uint32_t short_root_bus; uint16_t ext_tseg_mbytes; -} MCHPCIState; +}; -typedef struct Q35PCIHost { +struct Q35PCIHost { /*< private >*/ PCIExpressHost parent_obj; /*< public >*/ bool pci_hole64_fix; MCHPCIState mch; -} Q35PCIHost; +}; #define Q35_MASK(bit, ms_bit, ls_bit) \ ((uint##bit##_t)(((1ULL << ((ms_bit) + 1)) - 1) & ~((1ULL << ls_bit) - 1))) diff --git a/include/hw/pci-host/sabre.h b/include/hw/pci-host/sabre.h index 99b5aefbec..5fb508e9ce 100644 --- a/include/hw/pci-host/sabre.h +++ b/include/hw/pci-host/sabre.h @@ -4,6 +4,7 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/sparc/sun4u_iommu.h" +#include "qom/object.h" #define MAX_IVEC 0x40 @@ -16,15 +17,16 @@ #define OBIO_MSE_IRQ 0x2a #define OBIO_SER_IRQ 0x2b -typedef struct SabrePCIState { +struct SabrePCIState { PCIDevice parent_obj; -} SabrePCIState; +}; +typedef struct SabrePCIState SabrePCIState; #define TYPE_SABRE_PCI_DEVICE "sabre-pci" #define SABRE_PCI_DEVICE(obj) \ OBJECT_CHECK(SabrePCIState, (obj), TYPE_SABRE_PCI_DEVICE) -typedef struct SabreState { +struct SabreState { PCIHostState parent_obj; hwaddr special_base; @@ -45,7 +47,8 @@ typedef struct SabreState { unsigned int irq_request; uint32_t reset_control; unsigned int nr_resets; -} SabreState; +}; +typedef struct SabreState SabreState; #define TYPE_SABRE "sabre" #define SABRE_DEVICE(obj) \ diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 600eb55c34..783e8905df 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -24,15 +24,16 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/ppc/xics.h" +#include "qom/object.h" #define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge" +typedef struct SpaprPhbState SpaprPhbState; #define SPAPR_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(SpaprPhbState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) #define SPAPR_PCI_DMA_MAX_WINDOWS 2 -typedef struct SpaprPhbState SpaprPhbState; typedef struct SpaprPciMsi { uint32_t first_irq; diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h index 72d2a97355..a1f3aaaecd 100644 --- a/include/hw/pci-host/uninorth.h +++ b/include/hw/pci-host/uninorth.h @@ -27,6 +27,7 @@ #include "hw/pci/pci_host.h" #include "hw/ppc/openpic.h" +#include "qom/object.h" /* UniNorth version */ #define UNINORTH_VERSION_10A 0x7 @@ -36,6 +37,7 @@ #define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost" #define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost" +typedef struct UNINHostState UNINHostState; #define UNI_NORTH_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE) #define UNI_NORTH_AGP_HOST_BRIDGE(obj) \ @@ -45,7 +47,7 @@ #define U3_AGP_HOST_BRIDGE(obj) \ OBJECT_CHECK(UNINHostState, (obj), TYPE_U3_AGP_HOST_BRIDGE) -typedef struct UNINHostState { +struct UNINHostState { PCIHostState parent_obj; uint32_t ofw_addr; @@ -54,13 +56,14 @@ typedef struct UNINHostState { MemoryRegion pci_mmio; MemoryRegion pci_hole; MemoryRegion pci_io; -} UNINHostState; +}; -typedef struct UNINState { +struct UNINState { SysBusDevice parent_obj; MemoryRegion mem; -} UNINState; +}; +typedef struct UNINState UNINState; #define TYPE_UNI_NORTH "uni-north" #define UNI_NORTH(obj) \ diff --git a/include/hw/pci-host/xilinx-pcie.h b/include/hw/pci-host/xilinx-pcie.h index c0f15314be..1cbd6d2f79 100644 --- a/include/hw/pci-host/xilinx-pcie.h +++ b/include/hw/pci-host/xilinx-pcie.h @@ -24,25 +24,28 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/pcie_host.h" +#include "qom/object.h" #define TYPE_XILINX_PCIE_HOST "xilinx-pcie-host" +typedef struct XilinxPCIEHost XilinxPCIEHost; #define XILINX_PCIE_HOST(obj) \ OBJECT_CHECK(XilinxPCIEHost, (obj), TYPE_XILINX_PCIE_HOST) #define TYPE_XILINX_PCIE_ROOT "xilinx-pcie-root" +typedef struct XilinxPCIERoot XilinxPCIERoot; #define XILINX_PCIE_ROOT(obj) \ OBJECT_CHECK(XilinxPCIERoot, (obj), TYPE_XILINX_PCIE_ROOT) -typedef struct XilinxPCIERoot { +struct XilinxPCIERoot { PCIBridge parent_obj; -} XilinxPCIERoot; +}; typedef struct XilinxPCIEInt { uint32_t fifo_reg1; uint32_t fifo_reg2; } XilinxPCIEInt; -typedef struct XilinxPCIEHost { +struct XilinxPCIEHost { PCIExpressHost parent_obj; char name[16]; @@ -62,6 +65,6 @@ typedef struct XilinxPCIEHost { XilinxPCIEInt intr_fifo[16]; unsigned int intr_fifo_r, intr_fifo_w; uint32_t rpscr; -} XilinxPCIEHost; +}; #endif /* HW_XILINX_PCIE_H */ diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 4ca7258b5b..be9e298dba 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -8,6 +8,7 @@ #include "hw/isa/isa.h" #include "hw/pci/pcie.h" +#include "qom/object.h" extern bool pci_available; @@ -195,6 +196,7 @@ enum { }; #define TYPE_PCI_DEVICE "pci-device" +typedef struct PCIDeviceClass PCIDeviceClass; #define PCI_DEVICE(obj) \ OBJECT_CHECK(PCIDevice, (obj), TYPE_PCI_DEVICE) #define PCI_DEVICE_CLASS(klass) \ @@ -217,7 +219,7 @@ typedef struct PCIINTxRoute { int irq; } PCIINTxRoute; -typedef struct PCIDeviceClass { +struct PCIDeviceClass { DeviceClass parent_class; void (*realize)(PCIDevice *dev, Error **errp); @@ -241,7 +243,7 @@ typedef struct PCIDeviceClass { /* rom bar */ const char *romfile; -} PCIDeviceClass; +}; typedef void (*PCIINTxRoutingNotifier)(PCIDevice *dev); typedef int (*MSIVectorUseNotifier)(PCIDevice *dev, unsigned int vector, diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h index 99c674e949..b46d37faa8 100644 --- a/include/hw/pci/pci_bridge.h +++ b/include/hw/pci/pci_bridge.h @@ -28,6 +28,7 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_bus.h" +#include "qom/object.h" typedef struct PCIBridgeWindows PCIBridgeWindows; diff --git a/include/hw/pci/pci_host.h b/include/hw/pci/pci_host.h index 6210a7e14d..51ea53908f 100644 --- a/include/hw/pci/pci_host.h +++ b/include/hw/pci/pci_host.h @@ -29,8 +29,10 @@ #define PCI_HOST_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_PCI_HOST_BRIDGE "pci-host-bridge" +typedef struct PCIHostBridgeClass PCIHostBridgeClass; #define PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(PCIHostState, (obj), TYPE_PCI_HOST_BRIDGE) #define PCI_HOST_BRIDGE_CLASS(klass) \ @@ -51,11 +53,11 @@ struct PCIHostState { QLIST_ENTRY(PCIHostState) next; }; -typedef struct PCIHostBridgeClass { +struct PCIHostBridgeClass { SysBusDeviceClass parent_class; const char *(*root_bus_path)(PCIHostState *, PCIBus *); -} PCIHostBridgeClass; +}; /* common internal helpers for PCI/PCIe hosts, cut off overflows */ void pci_host_config_write_common(PCIDevice *pci_dev, uint32_t addr, diff --git a/include/hw/pci/pcie_host.h b/include/hw/pci/pcie_host.h index 3f7b9886d1..c7d2ae5bf4 100644 --- a/include/hw/pci/pcie_host.h +++ b/include/hw/pci/pcie_host.h @@ -23,6 +23,7 @@ #include "hw/pci/pci_host.h" #include "exec/memory.h" +#include "qom/object.h" #define TYPE_PCIE_HOST_BRIDGE "pcie-host-bridge" #define PCIE_HOST_BRIDGE(obj) \ diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index caae57573b..765399159f 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -23,6 +23,7 @@ #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_bus.h" +#include "qom/object.h" #define TYPE_PCIE_PORT "pcie-port" #define PCIE_PORT(obj) OBJECT_CHECK(PCIEPort, (obj), TYPE_PCIE_PORT) @@ -67,12 +68,13 @@ int pcie_chassis_add_slot(struct PCIESlot *slot); void pcie_chassis_del_slot(PCIESlot *s); #define TYPE_PCIE_ROOT_PORT "pcie-root-port-base" +typedef struct PCIERootPortClass PCIERootPortClass; #define PCIE_ROOT_PORT_CLASS(klass) \ OBJECT_CLASS_CHECK(PCIERootPortClass, (klass), TYPE_PCIE_ROOT_PORT) #define PCIE_ROOT_PORT_GET_CLASS(obj) \ OBJECT_GET_CLASS(PCIERootPortClass, (obj), TYPE_PCIE_ROOT_PORT) -typedef struct PCIERootPortClass { +struct PCIERootPortClass { PCIDeviceClass parent_class; DeviceRealize parent_realize; DeviceReset parent_reset; @@ -86,6 +88,6 @@ typedef struct PCIERootPortClass { int ssvid_offset; int acs_offset; /* If nonzero, optional ACS capability offset */ int ssid; -} PCIERootPortClass; +}; #endif /* QEMU_PCIE_PORT_H */ diff --git a/include/hw/pcmcia.h b/include/hw/pcmcia.h index ebad7bc504..0f9e41db02 100644 --- a/include/hw/pcmcia.h +++ b/include/hw/pcmcia.h @@ -4,6 +4,7 @@ /* PCMCIA/Cardbus */ #include "hw/qdev-core.h" +#include "qom/object.h" typedef struct PCMCIASocket { qemu_irq irq; @@ -11,6 +12,8 @@ typedef struct PCMCIASocket { } PCMCIASocket; #define TYPE_PCMCIA_CARD "pcmcia-card" +typedef struct PCMCIACardClass PCMCIACardClass; +typedef struct PCMCIACardState PCMCIACardState; #define PCMCIA_CARD(obj) \ OBJECT_CHECK(PCMCIACardState, (obj), TYPE_PCMCIA_CARD) #define PCMCIA_CARD_GET_CLASS(obj) \ @@ -18,15 +21,15 @@ typedef struct PCMCIASocket { #define PCMCIA_CARD_CLASS(cls) \ OBJECT_CLASS_CHECK(PCMCIACardClass, cls, TYPE_PCMCIA_CARD) -typedef struct PCMCIACardState { +struct PCMCIACardState { /*< private >*/ DeviceState parent_obj; /*< public >*/ PCMCIASocket *slot; -} PCMCIACardState; +}; -typedef struct PCMCIACardClass { +struct PCMCIACardClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -45,7 +48,7 @@ typedef struct PCMCIACardClass { uint32_t address, uint16_t value); uint16_t (*io_read)(PCMCIACardState *card, uint32_t address); void (*io_write)(PCMCIACardState *card, uint32_t address, uint16_t value); -} PCMCIACardClass; +}; #define CISTPL_DEVICE 0x01 /* 5V Device Information Tuple */ #define CISTPL_NO_LINK 0x14 /* No Link Tuple */ diff --git a/include/hw/platform-bus.h b/include/hw/platform-bus.h index 33745a418e..cda1346a4f 100644 --- a/include/hw/platform-bus.h +++ b/include/hw/platform-bus.h @@ -23,6 +23,7 @@ */ #include "hw/sysbus.h" +#include "qom/object.h" typedef struct PlatformBusDevice PlatformBusDevice; diff --git a/include/hw/ppc/mac_dbdma.h b/include/hw/ppc/mac_dbdma.h index 26cc469de4..e1f42cdbd3 100644 --- a/include/hw/ppc/mac_dbdma.h +++ b/include/hw/ppc/mac_dbdma.h @@ -27,6 +27,7 @@ #include "qemu/iov.h" #include "sysemu/dma.h" #include "hw/sysbus.h" +#include "qom/object.h" typedef struct DBDMA_io DBDMA_io; @@ -160,13 +161,14 @@ typedef struct DBDMA_channel { dbdma_cmd current; } DBDMA_channel; -typedef struct { +struct DBDMAState { SysBusDevice parent_obj; MemoryRegion mem; DBDMA_channel channels[DBDMA_CHANNELS]; QEMUBH *bh; -} DBDMAState; +}; +typedef struct DBDMAState DBDMAState; /* Externally callable functions */ diff --git a/include/hw/ppc/openpic.h b/include/hw/ppc/openpic.h index db0d29e6c2..81a0b3b1ee 100644 --- a/include/hw/ppc/openpic.h +++ b/include/hw/ppc/openpic.h @@ -3,6 +3,7 @@ #include "hw/sysbus.h" #include "hw/core/cpu.h" +#include "qom/object.h" #define MAX_CPU 32 #define MAX_MSI 8 @@ -136,9 +137,10 @@ typedef struct IRQDest { } IRQDest; #define TYPE_OPENPIC "openpic" +typedef struct OpenPICState OpenPICState; #define OPENPIC(obj) OBJECT_CHECK(OpenPICState, (obj), TYPE_OPENPIC) -typedef struct OpenPICState { +struct OpenPICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -183,6 +185,6 @@ typedef struct OpenPICState { uint32_t irq_ipi0; uint32_t irq_tim0; uint32_t irq_msi; -} OpenPICState; +}; #endif /* OPENPIC_H */ diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index d4b0b0e2ff..64f9ee8867 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -32,15 +32,18 @@ #include "hw/ppc/pnv_core.h" #include "hw/pci-host/pnv_phb3.h" #include "hw/pci-host/pnv_phb4.h" +#include "qom/object.h" #define TYPE_PNV_CHIP "pnv-chip" +typedef struct PnvChip PnvChip; +typedef struct PnvChipClass PnvChipClass; #define PNV_CHIP(obj) OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP) #define PNV_CHIP_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvChipClass, (klass), TYPE_PNV_CHIP) #define PNV_CHIP_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvChipClass, (obj), TYPE_PNV_CHIP) -typedef struct PnvChip { +struct PnvChip { /*< private >*/ SysBusDevice parent_obj; @@ -61,12 +64,13 @@ typedef struct PnvChip { AddressSpace xscom_as; gchar *dt_isa_nodename; -} PnvChip; +}; #define TYPE_PNV8_CHIP "pnv8-chip" +typedef struct Pnv8Chip Pnv8Chip; #define PNV8_CHIP(obj) OBJECT_CHECK(Pnv8Chip, (obj), TYPE_PNV8_CHIP) -typedef struct Pnv8Chip { +struct Pnv8Chip { /*< private >*/ PnvChip parent_obj; @@ -82,12 +86,13 @@ typedef struct Pnv8Chip { PnvPHB3 phbs[PNV8_CHIP_PHB3_MAX]; XICSFabric *xics; -} Pnv8Chip; +}; #define TYPE_PNV9_CHIP "pnv9-chip" +typedef struct Pnv9Chip Pnv9Chip; #define PNV9_CHIP(obj) OBJECT_CHECK(Pnv9Chip, (obj), TYPE_PNV9_CHIP) -typedef struct Pnv9Chip { +struct Pnv9Chip { /*< private >*/ PnvChip parent_obj; @@ -103,7 +108,7 @@ typedef struct Pnv9Chip { #define PNV9_CHIP_MAX_PEC 3 PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC]; -} Pnv9Chip; +}; /* * A SMT8 fused core is a pair of SMT4 cores. @@ -112,18 +117,19 @@ typedef struct Pnv9Chip { #define PNV9_PIR2CHIP(pir) (((pir) >> 8) & 0x7f) #define TYPE_PNV10_CHIP "pnv10-chip" +typedef struct Pnv10Chip Pnv10Chip; #define PNV10_CHIP(obj) OBJECT_CHECK(Pnv10Chip, (obj), TYPE_PNV10_CHIP) -typedef struct Pnv10Chip { +struct Pnv10Chip { /*< private >*/ PnvChip parent_obj; /*< public >*/ Pnv9Psi psi; PnvLpcController lpc; -} Pnv10Chip; +}; -typedef struct PnvChipClass { +struct PnvChipClass { /*< private >*/ SysBusDeviceClass parent_class; @@ -144,7 +150,7 @@ typedef struct PnvChipClass { void (*pic_print_info)(PnvChip *chip, Monitor *mon); uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id); uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr); -} PnvChipClass; +}; #define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP #define PNV_CHIP_TYPE_NAME(cpu_model) cpu_model PNV_CHIP_TYPE_SUFFIX @@ -191,6 +197,8 @@ typedef struct PnvChipClass { PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir); #define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv") +typedef struct PnvMachineClass PnvMachineClass; +typedef struct PnvMachineState PnvMachineState; #define PNV_MACHINE(obj) \ OBJECT_CHECK(PnvMachineState, (obj), TYPE_PNV_MACHINE) #define PNV_MACHINE_GET_CLASS(obj) \ @@ -198,9 +206,8 @@ PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir); #define PNV_MACHINE_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvMachineClass, klass, TYPE_PNV_MACHINE) -typedef struct PnvMachineState PnvMachineState; -typedef struct PnvMachineClass { +struct PnvMachineClass { /*< private >*/ MachineClass parent_class; @@ -209,7 +216,7 @@ typedef struct PnvMachineClass { int compat_size; void (*dt_power_mgt)(PnvMachineState *pnv, void *fdt); -} PnvMachineClass; +}; struct PnvMachineState { /*< private >*/ diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h index 113550eb7f..2d91a7d519 100644 --- a/include/hw/ppc/pnv_core.h +++ b/include/hw/ppc/pnv_core.h @@ -22,8 +22,11 @@ #include "hw/cpu/core.h" #include "target/ppc/cpu.h" +#include "qom/object.h" #define TYPE_PNV_CORE "powernv-cpu-core" +typedef struct PnvCore PnvCore; +typedef struct PnvCoreClass PnvCoreClass; #define PNV_CORE(obj) \ OBJECT_CHECK(PnvCore, (obj), TYPE_PNV_CORE) #define PNV_CORE_CLASS(klass) \ @@ -33,7 +36,7 @@ typedef struct PnvChip PnvChip; -typedef struct PnvCore { +struct PnvCore { /*< private >*/ CPUCore parent_obj; @@ -44,13 +47,13 @@ typedef struct PnvCore { PnvChip *chip; MemoryRegion xscom_regs; -} PnvCore; +}; -typedef struct PnvCoreClass { +struct PnvCoreClass { DeviceClass parent_class; const MemoryRegionOps *xscom_ops; -} PnvCoreClass; +}; #define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE #define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX @@ -65,13 +68,14 @@ static inline PnvCPUState *pnv_cpu_state(PowerPCCPU *cpu) } #define TYPE_PNV_QUAD "powernv-cpu-quad" +typedef struct PnvQuad PnvQuad; #define PNV_QUAD(obj) \ OBJECT_CHECK(PnvQuad, (obj), TYPE_PNV_QUAD) -typedef struct PnvQuad { +struct PnvQuad { DeviceState parent_obj; uint32_t id; MemoryRegion xscom_regs; -} PnvQuad; +}; #endif /* PPC_PNV_CORE_H */ diff --git a/include/hw/ppc/pnv_homer.h b/include/hw/ppc/pnv_homer.h index 1e91c950f6..bedba94e18 100644 --- a/include/hw/ppc/pnv_homer.h +++ b/include/hw/ppc/pnv_homer.h @@ -21,28 +21,31 @@ #define PPC_PNV_HOMER_H #include "hw/ppc/pnv.h" +#include "qom/object.h" #define TYPE_PNV_HOMER "pnv-homer" +typedef struct PnvHomer PnvHomer; +typedef struct PnvHomerClass PnvHomerClass; #define PNV_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV_HOMER) #define TYPE_PNV8_HOMER TYPE_PNV_HOMER "-POWER8" #define PNV8_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV8_HOMER) #define TYPE_PNV9_HOMER TYPE_PNV_HOMER "-POWER9" #define PNV9_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV9_HOMER) -typedef struct PnvHomer { +struct PnvHomer { DeviceState parent; struct PnvChip *chip; MemoryRegion pba_regs; MemoryRegion regs; -} PnvHomer; +}; #define PNV_HOMER_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvHomerClass, (klass), TYPE_PNV_HOMER) #define PNV_HOMER_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvHomerClass, (obj), TYPE_PNV_HOMER) -typedef struct PnvHomerClass { +struct PnvHomerClass { DeviceClass parent_class; int pba_size; @@ -51,6 +54,6 @@ typedef struct PnvHomerClass { const MemoryRegionOps *homer_ops; hwaddr core_max_base; -} PnvHomerClass; +}; #endif /* PPC_PNV_HOMER_H */ diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h index c1ec85d5e2..50d92517f2 100644 --- a/include/hw/ppc/pnv_lpc.h +++ b/include/hw/ppc/pnv_lpc.h @@ -21,8 +21,11 @@ #define PPC_PNV_LPC_H #include "hw/ppc/pnv_psi.h" +#include "qom/object.h" #define TYPE_PNV_LPC "pnv-lpc" +typedef struct PnvLpcClass PnvLpcClass; +typedef struct PnvLpcController PnvLpcController; #define PNV_LPC(obj) \ OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV_LPC) #define TYPE_PNV8_LPC TYPE_PNV_LPC "-POWER8" @@ -34,7 +37,7 @@ #define TYPE_PNV10_LPC TYPE_PNV_LPC "-POWER10" #define PNV10_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV10_LPC) -typedef struct PnvLpcController { +struct PnvLpcController { DeviceState parent; uint64_t eccb_stat_reg; @@ -79,20 +82,20 @@ typedef struct PnvLpcController { /* PSI to generate interrupts */ PnvPsi *psi; -} PnvLpcController; +}; #define PNV_LPC_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvLpcClass, (klass), TYPE_PNV_LPC) #define PNV_LPC_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvLpcClass, (obj), TYPE_PNV_LPC) -typedef struct PnvLpcClass { +struct PnvLpcClass { DeviceClass parent_class; int psi_irq; DeviceRealize parent_realize; -} PnvLpcClass; +}; /* * Old compilers error on typdef forward declarations. Keep them happy. diff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h index f8d3061419..30a9faea78 100644 --- a/include/hw/ppc/pnv_occ.h +++ b/include/hw/ppc/pnv_occ.h @@ -21,8 +21,11 @@ #define PPC_PNV_OCC_H #include "hw/ppc/pnv_psi.h" +#include "qom/object.h" #define TYPE_PNV_OCC "pnv-occ" +typedef struct PnvOCC PnvOCC; +typedef struct PnvOCCClass PnvOCCClass; #define PNV_OCC(obj) OBJECT_CHECK(PnvOCC, (obj), TYPE_PNV_OCC) #define TYPE_PNV8_OCC TYPE_PNV_OCC "-POWER8" #define PNV8_OCC(obj) OBJECT_CHECK(PnvOCC, (obj), TYPE_PNV8_OCC) @@ -32,7 +35,7 @@ #define PNV_OCC_SENSOR_DATA_BLOCK_OFFSET 0x00580000 #define PNV_OCC_SENSOR_DATA_BLOCK_SIZE 0x00025800 -typedef struct PnvOCC { +struct PnvOCC { DeviceState xd; /* OCC Misc interrupt */ @@ -42,20 +45,20 @@ typedef struct PnvOCC { MemoryRegion xscom_regs; MemoryRegion sram_regs; -} PnvOCC; +}; #define PNV_OCC_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvOCCClass, (klass), TYPE_PNV_OCC) #define PNV_OCC_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvOCCClass, (obj), TYPE_PNV_OCC) -typedef struct PnvOCCClass { +struct PnvOCCClass { DeviceClass parent_class; int xscom_size; const MemoryRegionOps *xscom_ops; int psi_irq; -} PnvOCCClass; +}; #define PNV_OCC_SENSOR_DATA_BLOCK_BASE(i) \ (PNV_OCC_SENSOR_DATA_BLOCK_OFFSET + (i) * PNV_OCC_SENSOR_DATA_BLOCK_SIZE) diff --git a/include/hw/ppc/pnv_pnor.h b/include/hw/ppc/pnv_pnor.h index 4f96abdfb4..8b27bf111c 100644 --- a/include/hw/ppc/pnv_pnor.h +++ b/include/hw/ppc/pnv_pnor.h @@ -8,6 +8,7 @@ */ #ifndef _PPC_PNV_PNOR_H #define _PPC_PNV_PNOR_H +#include "qom/object.h" /* * PNOR offset on the LPC FW address space @@ -15,9 +16,10 @@ #define PNOR_SPI_OFFSET 0x0c000000UL #define TYPE_PNV_PNOR "pnv-pnor" +typedef struct PnvPnor PnvPnor; #define PNV_PNOR(obj) OBJECT_CHECK(PnvPnor, (obj), TYPE_PNV_PNOR) -typedef struct PnvPnor { +struct PnvPnor { SysBusDevice parent_obj; BlockBackend *blk; @@ -25,6 +27,6 @@ typedef struct PnvPnor { uint8_t *storage; int64_t size; MemoryRegion mmio; -} PnvPnor; +}; #endif /* _PPC_PNV_PNOR_H */ diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h index 979fc59f33..060a7a110c 100644 --- a/include/hw/ppc/pnv_psi.h +++ b/include/hw/ppc/pnv_psi.h @@ -23,14 +23,17 @@ #include "hw/sysbus.h" #include "hw/ppc/xics.h" #include "hw/ppc/xive.h" +#include "qom/object.h" #define TYPE_PNV_PSI "pnv-psi" +typedef struct PnvPsi PnvPsi; +typedef struct PnvPsiClass PnvPsiClass; #define PNV_PSI(obj) \ OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV_PSI) #define PSIHB_XSCOM_MAX 0x20 -typedef struct PnvPsi { +struct PnvPsi { DeviceState parent; MemoryRegion regs_mr; @@ -47,27 +50,29 @@ typedef struct PnvPsi { uint64_t regs[PSIHB_XSCOM_MAX]; MemoryRegion xscom_regs; -} PnvPsi; +}; #define TYPE_PNV8_PSI TYPE_PNV_PSI "-POWER8" +typedef struct Pnv8Psi Pnv8Psi; #define PNV8_PSI(obj) \ OBJECT_CHECK(Pnv8Psi, (obj), TYPE_PNV8_PSI) -typedef struct Pnv8Psi { +struct Pnv8Psi { PnvPsi parent; ICSState ics; -} Pnv8Psi; +}; #define TYPE_PNV9_PSI TYPE_PNV_PSI "-POWER9" +typedef struct Pnv9Psi Pnv9Psi; #define PNV9_PSI(obj) \ OBJECT_CHECK(Pnv9Psi, (obj), TYPE_PNV9_PSI) -typedef struct Pnv9Psi { +struct Pnv9Psi { PnvPsi parent; XiveSource source; -} Pnv9Psi; +}; #define TYPE_PNV10_PSI TYPE_PNV_PSI "-POWER10" @@ -76,7 +81,7 @@ typedef struct Pnv9Psi { #define PNV_PSI_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvPsiClass, (obj), TYPE_PNV_PSI) -typedef struct PnvPsiClass { +struct PnvPsiClass { SysBusDeviceClass parent_class; uint32_t xscom_pcba; @@ -86,7 +91,7 @@ typedef struct PnvPsiClass { int compat_size; void (*irq_set)(PnvPsi *psi, int, bool state); -} PnvPsiClass; +}; /* The PSI and FSP interrupts are muxed on the same IRQ number */ typedef enum PnvPsiIrq { diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h index 76cf16f644..24c37de184 100644 --- a/include/hw/ppc/pnv_xive.h +++ b/include/hw/ppc/pnv_xive.h @@ -11,10 +11,13 @@ #define PPC_PNV_XIVE_H #include "hw/ppc/xive.h" +#include "qom/object.h" struct PnvChip; #define TYPE_PNV_XIVE "pnv-xive" +typedef struct PnvXive PnvXive; +typedef struct PnvXiveClass PnvXiveClass; #define PNV_XIVE(obj) OBJECT_CHECK(PnvXive, (obj), TYPE_PNV_XIVE) #define PNV_XIVE_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvXiveClass, (klass), TYPE_PNV_XIVE) @@ -28,7 +31,7 @@ struct PnvChip; #define XIVE_TABLE_VDT_MAX 16 /* VDT Domain Table (0-15) */ #define XIVE_TABLE_EDT_MAX 64 /* EDT Domain Table (0-63) */ -typedef struct PnvXive { +struct PnvXive { XiveRouter parent_obj; /* Owning chip */ @@ -87,13 +90,13 @@ typedef struct PnvXive { uint64_t mig[XIVE_TABLE_MIG_MAX]; uint64_t vdt[XIVE_TABLE_VDT_MAX]; uint64_t edt[XIVE_TABLE_EDT_MAX]; -} PnvXive; +}; -typedef struct PnvXiveClass { +struct PnvXiveClass { XiveRouterClass parent_class; DeviceRealize parent_realize; -} PnvXiveClass; +}; void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon); diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 09156a5a7a..fb9b97f5be 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -27,16 +27,17 @@ typedef struct PnvXScomInterface PnvXScomInterface; #define TYPE_PNV_XSCOM_INTERFACE "pnv-xscom-interface" #define PNV_XSCOM_INTERFACE(obj) \ INTERFACE_CHECK(PnvXScomInterface, (obj), TYPE_PNV_XSCOM_INTERFACE) +typedef struct PnvXScomInterfaceClass PnvXScomInterfaceClass; #define PNV_XSCOM_INTERFACE_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvXScomInterfaceClass, (klass), \ TYPE_PNV_XSCOM_INTERFACE) #define PNV_XSCOM_INTERFACE_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvXScomInterfaceClass, (obj), TYPE_PNV_XSCOM_INTERFACE) -typedef struct PnvXScomInterfaceClass { +struct PnvXScomInterfaceClass { InterfaceClass parent; int (*dt_xscom)(PnvXScomInterface *dev, void *fdt, int offset); -} PnvXScomInterfaceClass; +}; /* * Layout of the XSCOM PCB addresses of EX core 1 (POWER 8) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index a1e230ad39..69eafe913a 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -8,6 +8,7 @@ #include "hw/mem/pc-dimm.h" #include "hw/ppc/spapr_ovec.h" #include "hw/ppc/spapr_irq.h" +#include "qom/object.h" #include "hw/ppc/spapr_xive.h" /* For SpaprXive */ #include "hw/ppc/xics.h" /* For ICSState */ #include "hw/ppc/spapr_tpm_proxy.h" @@ -27,10 +28,10 @@ typedef struct SpaprPendingHpt SpaprPendingHpt; #define TYPE_SPAPR_RTC "spapr-rtc" +typedef struct SpaprRtcState SpaprRtcState; #define SPAPR_RTC(obj) \ OBJECT_CHECK(SpaprRtcState, (obj), TYPE_SPAPR_RTC) -typedef struct SpaprRtcState SpaprRtcState; struct SpaprRtcState { /*< private >*/ DeviceState parent_obj; diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h index 7aed8f555b..adcf74dbc3 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -13,8 +13,11 @@ #include "hw/qdev-core.h" #include "target/ppc/cpu-qom.h" #include "target/ppc/cpu.h" +#include "qom/object.h" #define TYPE_SPAPR_CPU_CORE "spapr-cpu-core" +typedef struct SpaprCpuCore SpaprCpuCore; +typedef struct SpaprCpuCoreClass SpaprCpuCoreClass; #define SPAPR_CPU_CORE(obj) \ OBJECT_CHECK(SpaprCpuCore, (obj), TYPE_SPAPR_CPU_CORE) #define SPAPR_CPU_CORE_CLASS(klass) \ @@ -24,7 +27,7 @@ #define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE -typedef struct SpaprCpuCore { +struct SpaprCpuCore { /*< private >*/ CPUCore parent_obj; @@ -32,12 +35,12 @@ typedef struct SpaprCpuCore { PowerPCCPU **threads; int node_id; bool pre_3_0_migration; /* older machine don't know about SpaprCpuState */ -} SpaprCpuCore; +}; -typedef struct SpaprCpuCoreClass { +struct SpaprCpuCoreClass { DeviceClass parent_class; const char *cpu_type; -} SpaprCpuCoreClass; +}; const char *spapr_get_cpu_core_type(const char *cpu_type); void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, diff --git a/include/hw/ppc/spapr_drc.h b/include/hw/ppc/spapr_drc.h index 21af8deac1..ab799930bf 100644 --- a/include/hw/ppc/spapr_drc.h +++ b/include/hw/ppc/spapr_drc.h @@ -20,6 +20,8 @@ #include "qapi/error.h" #define TYPE_SPAPR_DR_CONNECTOR "spapr-dr-connector" +typedef struct SpaprDrc SpaprDrc; +typedef struct SpaprDrcClass SpaprDrcClass; #define SPAPR_DR_CONNECTOR_GET_CLASS(obj) \ OBJECT_GET_CLASS(SpaprDrcClass, obj, TYPE_SPAPR_DR_CONNECTOR) #define SPAPR_DR_CONNECTOR_CLASS(klass) \ @@ -29,6 +31,7 @@ TYPE_SPAPR_DR_CONNECTOR) #define TYPE_SPAPR_DRC_PHYSICAL "spapr-drc-physical" +typedef struct SpaprDrcPhysical SpaprDrcPhysical; #define SPAPR_DRC_PHYSICAL_GET_CLASS(obj) \ OBJECT_GET_CLASS(SpaprDrcClass, obj, TYPE_SPAPR_DRC_PHYSICAL) #define SPAPR_DRC_PHYSICAL_CLASS(klass) \ @@ -209,7 +212,7 @@ typedef enum { SPAPR_DRC_STATE_PHYSICAL_CONFIGURED = 8, } SpaprDrcState; -typedef struct SpaprDrc { +struct SpaprDrc { /*< private >*/ DeviceState parent; @@ -228,11 +231,11 @@ typedef struct SpaprDrc { bool unplug_requested; void *fdt; int fdt_start_offset; -} SpaprDrc; +}; struct SpaprMachineState; -typedef struct SpaprDrcClass { +struct SpaprDrcClass { /*< private >*/ DeviceClass parent; SpaprDrcState empty_state; @@ -250,15 +253,15 @@ typedef struct SpaprDrcClass { int (*dt_populate)(SpaprDrc *drc, struct SpaprMachineState *spapr, void *fdt, int *fdt_start_offset, Error **errp); -} SpaprDrcClass; +}; -typedef struct SpaprDrcPhysical { +struct SpaprDrcPhysical { /*< private >*/ SpaprDrc parent; /* DR-indicator */ uint32_t dr_indicator; -} SpaprDrcPhysical; +}; static inline bool spapr_drc_hotplugged(DeviceState *dev) { diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index b161ccebc2..83addd0a0b 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -11,6 +11,7 @@ #define HW_SPAPR_IRQ_H #include "target/ppc/cpu-qom.h" +#include "qom/object.h" /* * IRQ range offsets per device type @@ -35,12 +36,13 @@ typedef struct SpaprInterruptController SpaprInterruptController; #define TYPE_SPAPR_INTC "spapr-interrupt-controller" #define SPAPR_INTC(obj) \ INTERFACE_CHECK(SpaprInterruptController, (obj), TYPE_SPAPR_INTC) +typedef struct SpaprInterruptControllerClass SpaprInterruptControllerClass; #define SPAPR_INTC_CLASS(klass) \ OBJECT_CLASS_CHECK(SpaprInterruptControllerClass, (klass), TYPE_SPAPR_INTC) #define SPAPR_INTC_GET_CLASS(obj) \ OBJECT_GET_CLASS(SpaprInterruptControllerClass, (obj), TYPE_SPAPR_INTC) -typedef struct SpaprInterruptControllerClass { +struct SpaprInterruptControllerClass { InterfaceClass parent; int (*activate)(SpaprInterruptController *intc, uint32_t nr_servers, @@ -65,7 +67,7 @@ typedef struct SpaprInterruptControllerClass { void (*dt)(SpaprInterruptController *intc, uint32_t nr_servers, void *fdt, uint32_t phandle); int (*post_load)(SpaprInterruptController *intc, int version_id); -} SpaprInterruptControllerClass; +}; void spapr_irq_update_active_intc(struct SpaprMachineState *spapr); diff --git a/include/hw/ppc/spapr_tpm_proxy.h b/include/hw/ppc/spapr_tpm_proxy.h index c574e22ba4..1e9890d978 100644 --- a/include/hw/ppc/spapr_tpm_proxy.h +++ b/include/hw/ppc/spapr_tpm_proxy.h @@ -17,15 +17,16 @@ #include "hw/qdev-core.h" #define TYPE_SPAPR_TPM_PROXY "spapr-tpm-proxy" +typedef struct SpaprTpmProxy SpaprTpmProxy; #define SPAPR_TPM_PROXY(obj) OBJECT_CHECK(SpaprTpmProxy, (obj), \ TYPE_SPAPR_TPM_PROXY) -typedef struct SpaprTpmProxy { +struct SpaprTpmProxy { /*< private >*/ DeviceState parent; char *host_path; int host_fd; -} SpaprTpmProxy; +}; #endif /* HW_SPAPR_TPM_PROXY_H */ diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h index bed7df60e3..9c9d14e63b 100644 --- a/include/hw/ppc/spapr_vio.h +++ b/include/hw/ppc/spapr_vio.h @@ -25,8 +25,11 @@ #include "hw/ppc/spapr.h" #include "sysemu/dma.h" #include "hw/irq.h" +#include "qom/object.h" #define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device" +typedef struct SpaprVioDevice SpaprVioDevice; +typedef struct SpaprVioDeviceClass SpaprVioDeviceClass; #define VIO_SPAPR_DEVICE(obj) \ OBJECT_CHECK(SpaprVioDevice, (obj), TYPE_VIO_SPAPR_DEVICE) #define VIO_SPAPR_DEVICE_CLASS(klass) \ @@ -35,6 +38,7 @@ OBJECT_GET_CLASS(SpaprVioDeviceClass, (obj), TYPE_VIO_SPAPR_DEVICE) #define TYPE_SPAPR_VIO_BUS "spapr-vio-bus" +typedef struct SpaprVioBus SpaprVioBus; #define SPAPR_VIO_BUS(obj) OBJECT_CHECK(SpaprVioBus, (obj), TYPE_SPAPR_VIO_BUS) #define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge" @@ -46,10 +50,8 @@ typedef struct SpaprVioCrq { int(*SendFunc)(struct SpaprVioDevice *vdev, uint8_t *crq); } SpaprVioCrq; -typedef struct SpaprVioDevice SpaprVioDevice; -typedef struct SpaprVioBus SpaprVioBus; -typedef struct SpaprVioDeviceClass { +struct SpaprVioDeviceClass { DeviceClass parent_class; const char *dt_name, *dt_type, *dt_compatible; @@ -59,7 +61,7 @@ typedef struct SpaprVioDeviceClass { void (*reset)(SpaprVioDevice *dev); int (*devnode)(SpaprVioDevice *dev, void *fdt, int node_off); const char *(*get_dt_compatible)(SpaprVioDevice *dev); -} SpaprVioDeviceClass; +}; struct SpaprVioDevice { DeviceState qdev; diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index 85f124506d..9faff79668 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -12,15 +12,18 @@ #include "hw/ppc/spapr_irq.h" #include "hw/ppc/xive.h" +#include "qom/object.h" #define TYPE_SPAPR_XIVE "spapr-xive" +typedef struct SpaprXive SpaprXive; +typedef struct SpaprXiveClass SpaprXiveClass; #define SPAPR_XIVE(obj) OBJECT_CHECK(SpaprXive, (obj), TYPE_SPAPR_XIVE) #define SPAPR_XIVE_CLASS(klass) \ OBJECT_CLASS_CHECK(SpaprXiveClass, (klass), TYPE_SPAPR_XIVE) #define SPAPR_XIVE_GET_CLASS(obj) \ OBJECT_GET_CLASS(SpaprXiveClass, (obj), TYPE_SPAPR_XIVE) -typedef struct SpaprXive { +struct SpaprXive { XiveRouter parent; /* Internal interrupt source for IPIs and virtual devices */ @@ -49,13 +52,13 @@ typedef struct SpaprXive { void *tm_mmap; MemoryRegion tm_mmio_kvm; VMChangeStateEntry *change; -} SpaprXive; +}; -typedef struct SpaprXiveClass { +struct SpaprXiveClass { XiveRouterClass parent; DeviceRealize parent_realize; -} SpaprXiveClass; +}; /* * The sPAPR machine has a unique XIVE IC device. Assign a fixed value diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 9ed58ec7e9..e5f48faba0 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -30,6 +30,7 @@ #include "exec/memory.h" #include "hw/qdev-core.h" +#include "qom/object.h" #define XICS_IPI 0x2 #define XICS_BUID 0x1 @@ -145,17 +146,18 @@ struct ICSIRQState { #define TYPE_XICS_FABRIC "xics-fabric" #define XICS_FABRIC(obj) \ INTERFACE_CHECK(XICSFabric, (obj), TYPE_XICS_FABRIC) +typedef struct XICSFabricClass XICSFabricClass; #define XICS_FABRIC_CLASS(klass) \ OBJECT_CLASS_CHECK(XICSFabricClass, (klass), TYPE_XICS_FABRIC) #define XICS_FABRIC_GET_CLASS(obj) \ OBJECT_GET_CLASS(XICSFabricClass, (obj), TYPE_XICS_FABRIC) -typedef struct XICSFabricClass { +struct XICSFabricClass { InterfaceClass parent; ICSState *(*ics_get)(XICSFabric *xi, int irq); void (*ics_resend)(XICSFabric *xi); ICPState *(*icp_get)(XICSFabric *xi, int server); -} XICSFabricClass; +}; ICPState *xics_icp_get(XICSFabric *xi, int server); diff --git a/include/hw/ppc/xics_spapr.h b/include/hw/ppc/xics_spapr.h index 1c65c96e3c..09e428de4e 100644 --- a/include/hw/ppc/xics_spapr.h +++ b/include/hw/ppc/xics_spapr.h @@ -28,6 +28,7 @@ #define XICS_SPAPR_H #include "hw/ppc/spapr.h" +#include "qom/object.h" #define TYPE_ICS_SPAPR "ics-spapr" #define ICS_SPAPR(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_SPAPR) diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index 705cf48176..42f3b951d5 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -143,6 +143,7 @@ #include "sysemu/kvm.h" #include "hw/sysbus.h" #include "hw/ppc/xive_regs.h" +#include "qom/object.h" /* * XIVE Notifier (Interface between Source and Router) @@ -153,21 +154,23 @@ typedef struct XiveNotifier XiveNotifier; #define TYPE_XIVE_NOTIFIER "xive-notifier" #define XIVE_NOTIFIER(obj) \ INTERFACE_CHECK(XiveNotifier, (obj), TYPE_XIVE_NOTIFIER) +typedef struct XiveNotifierClass XiveNotifierClass; #define XIVE_NOTIFIER_CLASS(klass) \ OBJECT_CLASS_CHECK(XiveNotifierClass, (klass), TYPE_XIVE_NOTIFIER) #define XIVE_NOTIFIER_GET_CLASS(obj) \ OBJECT_GET_CLASS(XiveNotifierClass, (obj), TYPE_XIVE_NOTIFIER) -typedef struct XiveNotifierClass { +struct XiveNotifierClass { InterfaceClass parent; void (*notify)(XiveNotifier *xn, uint32_t lisn); -} XiveNotifierClass; +}; /* * XIVE Interrupt Source */ #define TYPE_XIVE_SOURCE "xive-source" +typedef struct XiveSource XiveSource; #define XIVE_SOURCE(obj) OBJECT_CHECK(XiveSource, (obj), TYPE_XIVE_SOURCE) /* @@ -177,7 +180,7 @@ typedef struct XiveNotifierClass { #define XIVE_SRC_H_INT_ESB 0x1 /* ESB managed with hcall H_INT_ESB */ #define XIVE_SRC_STORE_EOI 0x2 /* Store EOI supported */ -typedef struct XiveSource { +struct XiveSource { DeviceState parent; /* IRQs */ @@ -197,7 +200,7 @@ typedef struct XiveSource { MemoryRegion esb_mmio_kvm; XiveNotifier *xive; -} XiveSource; +}; /* * ESB MMIO setting. Can be one page, for both source triggering and @@ -298,6 +301,7 @@ void xive_source_set_irq(void *opaque, int srcno, int val); */ #define TYPE_XIVE_TCTX "xive-tctx" +typedef struct XiveTCTX XiveTCTX; #define XIVE_TCTX(obj) OBJECT_CHECK(XiveTCTX, (obj), TYPE_XIVE_TCTX) /* @@ -313,7 +317,7 @@ void xive_source_set_irq(void *opaque, int srcno, int val); typedef struct XivePresenter XivePresenter; -typedef struct XiveTCTX { +struct XiveTCTX { DeviceState parent_obj; CPUState *cs; @@ -323,20 +327,22 @@ typedef struct XiveTCTX { uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE]; XivePresenter *xptr; -} XiveTCTX; +}; /* * XIVE Router */ typedef struct XiveFabric XiveFabric; -typedef struct XiveRouter { +struct XiveRouter { SysBusDevice parent; XiveFabric *xfb; -} XiveRouter; +}; +typedef struct XiveRouter XiveRouter; #define TYPE_XIVE_ROUTER "xive-router" +typedef struct XiveRouterClass XiveRouterClass; #define XIVE_ROUTER(obj) \ OBJECT_CHECK(XiveRouter, (obj), TYPE_XIVE_ROUTER) #define XIVE_ROUTER_CLASS(klass) \ @@ -344,7 +350,7 @@ typedef struct XiveRouter { #define XIVE_ROUTER_GET_CLASS(obj) \ OBJECT_GET_CLASS(XiveRouterClass, (obj), TYPE_XIVE_ROUTER) -typedef struct XiveRouterClass { +struct XiveRouterClass { SysBusDeviceClass parent; /* XIVE table accessors */ @@ -359,7 +365,7 @@ typedef struct XiveRouterClass { int (*write_nvt)(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx, XiveNVT *nvt, uint8_t word_number); uint8_t (*get_block_id)(XiveRouter *xrtr); -} XiveRouterClass; +}; int xive_router_get_eas(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx, XiveEAS *eas); @@ -385,18 +391,19 @@ typedef struct XiveTCTXMatch { #define TYPE_XIVE_PRESENTER "xive-presenter" #define XIVE_PRESENTER(obj) \ INTERFACE_CHECK(XivePresenter, (obj), TYPE_XIVE_PRESENTER) +typedef struct XivePresenterClass XivePresenterClass; #define XIVE_PRESENTER_CLASS(klass) \ OBJECT_CLASS_CHECK(XivePresenterClass, (klass), TYPE_XIVE_PRESENTER) #define XIVE_PRESENTER_GET_CLASS(obj) \ OBJECT_GET_CLASS(XivePresenterClass, (obj), TYPE_XIVE_PRESENTER) -typedef struct XivePresenterClass { +struct XivePresenterClass { InterfaceClass parent; int (*match_nvt)(XivePresenter *xptr, uint8_t format, uint8_t nvt_blk, uint32_t nvt_idx, bool cam_ignore, uint8_t priority, uint32_t logic_serv, XiveTCTXMatch *match); -} XivePresenterClass; +}; int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx, uint8_t format, @@ -410,28 +417,30 @@ int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx, #define TYPE_XIVE_FABRIC "xive-fabric" #define XIVE_FABRIC(obj) \ INTERFACE_CHECK(XiveFabric, (obj), TYPE_XIVE_FABRIC) +typedef struct XiveFabricClass XiveFabricClass; #define XIVE_FABRIC_CLASS(klass) \ OBJECT_CLASS_CHECK(XiveFabricClass, (klass), TYPE_XIVE_FABRIC) #define XIVE_FABRIC_GET_CLASS(obj) \ OBJECT_GET_CLASS(XiveFabricClass, (obj), TYPE_XIVE_FABRIC) -typedef struct XiveFabricClass { +struct XiveFabricClass { InterfaceClass parent; int (*match_nvt)(XiveFabric *xfb, uint8_t format, uint8_t nvt_blk, uint32_t nvt_idx, bool cam_ignore, uint8_t priority, uint32_t logic_serv, XiveTCTXMatch *match); -} XiveFabricClass; +}; /* * XIVE END ESBs */ #define TYPE_XIVE_END_SOURCE "xive-end-source" +typedef struct XiveENDSource XiveENDSource; #define XIVE_END_SOURCE(obj) \ OBJECT_CHECK(XiveENDSource, (obj), TYPE_XIVE_END_SOURCE) -typedef struct XiveENDSource { +struct XiveENDSource { DeviceState parent; uint32_t nr_ends; @@ -441,7 +450,7 @@ typedef struct XiveENDSource { MemoryRegion esb_mmio; XiveRouter *xrtr; -} XiveENDSource; +}; /* * For legacy compatibility, the exceptions define up to 256 different diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index ea3f73a282..479377f37b 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -12,6 +12,7 @@ enum { }; #define TYPE_DEVICE "device" +typedef struct DeviceClass DeviceClass; #define DEVICE(obj) OBJECT_CHECK(DeviceState, (obj), TYPE_DEVICE) #define DEVICE_CLASS(klass) OBJECT_CLASS_CHECK(DeviceClass, (klass), TYPE_DEVICE) #define DEVICE_GET_CLASS(obj) OBJECT_GET_CLASS(DeviceClass, (obj), TYPE_DEVICE) @@ -93,7 +94,7 @@ typedef void (*BusUnrealize)(BusState *bus); * until it was marked don't hide and qdev_device_add called again. * */ -typedef struct DeviceClass { +struct DeviceClass { /*< private >*/ ObjectClass parent_class; /*< public >*/ @@ -137,7 +138,7 @@ typedef struct DeviceClass { /* Private to qdev / bus. */ const char *bus_type; -} DeviceClass; +}; typedef struct NamedGPIOList NamedGPIOList; diff --git a/include/hw/rdma/rdma.h b/include/hw/rdma/rdma.h index 68290fb58c..863f961bc4 100644 --- a/include/hw/rdma/rdma.h +++ b/include/hw/rdma/rdma.h @@ -19,6 +19,7 @@ #define INTERFACE_RDMA_PROVIDER "rdma" +typedef struct RdmaProviderClass RdmaProviderClass; #define INTERFACE_RDMA_PROVIDER_CLASS(klass) \ OBJECT_CLASS_CHECK(RdmaProviderClass, (klass), \ INTERFACE_RDMA_PROVIDER) @@ -31,10 +32,10 @@ typedef struct RdmaProvider RdmaProvider; -typedef struct RdmaProviderClass { +struct RdmaProviderClass { InterfaceClass parent; void (*print_statistics)(Monitor *mon, RdmaProvider *obj); -} RdmaProviderClass; +}; #endif diff --git a/include/hw/register.h b/include/hw/register.h index 5d2c565ae0..c4325914b2 100644 --- a/include/hw/register.h +++ b/include/hw/register.h @@ -14,6 +14,7 @@ #include "hw/qdev-core.h" #include "exec/memory.h" #include "hw/registerfields.h" +#include "qom/object.h" typedef struct RegisterInfo RegisterInfo; typedef struct RegisterAccessInfo RegisterAccessInfo; diff --git a/include/hw/resettable.h b/include/hw/resettable.h index f4c4bab0ef..bcd36bce06 100644 --- a/include/hw/resettable.h +++ b/include/hw/resettable.h @@ -17,6 +17,7 @@ #define TYPE_RESETTABLE_INTERFACE "resettable" +typedef struct ResettableClass ResettableClass; #define RESETTABLE_CLASS(class) \ OBJECT_CLASS_CHECK(ResettableClass, (class), TYPE_RESETTABLE_INTERFACE) @@ -119,7 +120,7 @@ typedef struct ResettablePhases { ResettableHoldPhase hold; ResettableExitPhase exit; } ResettablePhases; -typedef struct ResettableClass { +struct ResettableClass { InterfaceClass parent_class; /* Phase methods */ @@ -133,7 +134,7 @@ typedef struct ResettableClass { /* Hierarchy handling method */ ResettableChildForeach child_foreach; -} ResettableClass; +}; /** * ResettableState: diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index 835a80f896..b42599ff54 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -22,12 +22,14 @@ #include "hw/riscv/riscv_hart.h" #include "hw/intc/ibex_plic.h" #include "hw/char/ibex_uart.h" +#include "qom/object.h" #define TYPE_RISCV_IBEX_SOC "riscv.lowrisc.ibex.soc" +typedef struct LowRISCIbexSoCState LowRISCIbexSoCState; #define RISCV_IBEX_SOC(obj) \ OBJECT_CHECK(LowRISCIbexSoCState, (obj), TYPE_RISCV_IBEX_SOC) -typedef struct LowRISCIbexSoCState { +struct LowRISCIbexSoCState { /*< private >*/ SysBusDevice parent_obj; @@ -38,7 +40,7 @@ typedef struct LowRISCIbexSoCState { MemoryRegion flash_mem; MemoryRegion rom; -} LowRISCIbexSoCState; +}; typedef struct OpenTitanState { /*< private >*/ diff --git a/include/hw/riscv/riscv_hart.h b/include/hw/riscv/riscv_hart.h index c75856fa73..617b977214 100644 --- a/include/hw/riscv/riscv_hart.h +++ b/include/hw/riscv/riscv_hart.h @@ -23,13 +23,15 @@ #include "hw/sysbus.h" #include "target/riscv/cpu.h" +#include "qom/object.h" #define TYPE_RISCV_HART_ARRAY "riscv.hart_array" +typedef struct RISCVHartArrayState RISCVHartArrayState; #define RISCV_HART_ARRAY(obj) \ OBJECT_CHECK(RISCVHartArrayState, (obj), TYPE_RISCV_HART_ARRAY) -typedef struct RISCVHartArrayState { +struct RISCVHartArrayState { /*< private >*/ SysBusDevice parent_obj; @@ -38,6 +40,6 @@ typedef struct RISCVHartArrayState { uint32_t hartid_base; char *cpu_type; RISCVCPU *harts; -} RISCVHartArrayState; +}; #endif diff --git a/include/hw/riscv/sifive_clint.h b/include/hw/riscv/sifive_clint.h index 4a720bfece..e58f32b1e3 100644 --- a/include/hw/riscv/sifive_clint.h +++ b/include/hw/riscv/sifive_clint.h @@ -21,13 +21,15 @@ #define HW_SIFIVE_CLINT_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_SIFIVE_CLINT "riscv.sifive.clint" +typedef struct SiFiveCLINTState SiFiveCLINTState; #define SIFIVE_CLINT(obj) \ OBJECT_CHECK(SiFiveCLINTState, (obj), TYPE_SIFIVE_CLINT) -typedef struct SiFiveCLINTState { +struct SiFiveCLINTState { /*< private >*/ SysBusDevice parent_obj; @@ -38,7 +40,7 @@ typedef struct SiFiveCLINTState { uint32_t timecmp_base; uint32_t time_base; uint32_t aperture_size; -} SiFiveCLINTState; +}; DeviceState *sifive_clint_create(hwaddr addr, hwaddr size, uint32_t num_harts, uint32_t sip_base, uint32_t timecmp_base, uint32_t time_base, diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h index 7c2eb70189..67752dc8a0 100644 --- a/include/hw/riscv/sifive_e.h +++ b/include/hw/riscv/sifive_e.h @@ -22,12 +22,14 @@ #include "hw/riscv/riscv_hart.h" #include "hw/riscv/sifive_cpu.h" #include "hw/riscv/sifive_gpio.h" +#include "qom/object.h" #define TYPE_RISCV_E_SOC "riscv.sifive.e.soc" +typedef struct SiFiveESoCState SiFiveESoCState; #define RISCV_E_SOC(obj) \ OBJECT_CHECK(SiFiveESoCState, (obj), TYPE_RISCV_E_SOC) -typedef struct SiFiveESoCState { +struct SiFiveESoCState { /*< private >*/ DeviceState parent_obj; @@ -37,16 +39,17 @@ typedef struct SiFiveESoCState { SIFIVEGPIOState gpio; MemoryRegion xip_mem; MemoryRegion mask_rom; -} SiFiveESoCState; +}; -typedef struct SiFiveEState { +struct SiFiveEState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ SiFiveESoCState soc; bool revb; -} SiFiveEState; +}; +typedef struct SiFiveEState SiFiveEState; #define TYPE_RISCV_E_MACHINE MACHINE_TYPE_NAME("sifive_e") #define RISCV_E_MACHINE(obj) \ diff --git a/include/hw/riscv/sifive_e_prci.h b/include/hw/riscv/sifive_e_prci.h index 698b0b451c..de1e502eea 100644 --- a/include/hw/riscv/sifive_e_prci.h +++ b/include/hw/riscv/sifive_e_prci.h @@ -18,6 +18,7 @@ #ifndef HW_SIFIVE_E_PRCI_H #define HW_SIFIVE_E_PRCI_H +#include "qom/object.h" enum { SIFIVE_E_PRCI_HFROSCCFG = 0x0, @@ -51,10 +52,11 @@ enum { #define TYPE_SIFIVE_E_PRCI "riscv.sifive.e.prci" +typedef struct SiFiveEPRCIState SiFiveEPRCIState; #define SIFIVE_E_PRCI(obj) \ OBJECT_CHECK(SiFiveEPRCIState, (obj), TYPE_SIFIVE_E_PRCI) -typedef struct SiFiveEPRCIState { +struct SiFiveEPRCIState { /*< private >*/ SysBusDevice parent_obj; @@ -64,7 +66,7 @@ typedef struct SiFiveEPRCIState { uint32_t hfxosccfg; uint32_t pllcfg; uint32_t plloutdiv; -} SiFiveEPRCIState; +}; DeviceState *sifive_e_prci_create(hwaddr addr); diff --git a/include/hw/riscv/sifive_gpio.h b/include/hw/riscv/sifive_gpio.h index cf12fcfd62..af991fa44e 100644 --- a/include/hw/riscv/sifive_gpio.h +++ b/include/hw/riscv/sifive_gpio.h @@ -15,8 +15,10 @@ #define SIFIVE_GPIO_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_SIFIVE_GPIO "sifive_soc.gpio" +typedef struct SIFIVEGPIOState SIFIVEGPIOState; #define SIFIVE_GPIO(obj) OBJECT_CHECK(SIFIVEGPIOState, (obj), TYPE_SIFIVE_GPIO) #define SIFIVE_GPIO_PINS 32 @@ -41,7 +43,7 @@ #define SIFIVE_GPIO_REG_IOF_SEL 0x03C #define SIFIVE_GPIO_REG_OUT_XOR 0x040 -typedef struct SIFIVEGPIOState { +struct SIFIVEGPIOState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -71,6 +73,6 @@ typedef struct SIFIVEGPIOState { /* config */ uint32_t ngpio; -} SIFIVEGPIOState; +}; #endif /* SIFIVE_GPIO_H */ diff --git a/include/hw/riscv/sifive_plic.h b/include/hw/riscv/sifive_plic.h index 4421e81249..d80c3ae5e6 100644 --- a/include/hw/riscv/sifive_plic.h +++ b/include/hw/riscv/sifive_plic.h @@ -22,9 +22,11 @@ #define HW_SIFIVE_PLIC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_SIFIVE_PLIC "riscv.sifive.plic" +typedef struct SiFivePLICState SiFivePLICState; #define SIFIVE_PLIC(obj) \ OBJECT_CHECK(SiFivePLICState, (obj), TYPE_SIFIVE_PLIC) @@ -41,7 +43,7 @@ typedef struct PLICAddr { PLICMode mode; } PLICAddr; -typedef struct SiFivePLICState { +struct SiFivePLICState { /*< private >*/ SysBusDevice parent_obj; @@ -67,7 +69,7 @@ typedef struct SiFivePLICState { uint32_t context_base; uint32_t context_stride; uint32_t aperture_size; -} SiFivePLICState; +}; DeviceState *sifive_plic_create(hwaddr addr, char *hart_config, uint32_t num_sources, uint32_t num_priorities, diff --git a/include/hw/riscv/sifive_test.h b/include/hw/riscv/sifive_test.h index 1ec416ac1b..dc54b7af0c 100644 --- a/include/hw/riscv/sifive_test.h +++ b/include/hw/riscv/sifive_test.h @@ -20,19 +20,21 @@ #define HW_SIFIVE_TEST_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_SIFIVE_TEST "riscv.sifive.test" +typedef struct SiFiveTestState SiFiveTestState; #define SIFIVE_TEST(obj) \ OBJECT_CHECK(SiFiveTestState, (obj), TYPE_SIFIVE_TEST) -typedef struct SiFiveTestState { +struct SiFiveTestState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion mmio; -} SiFiveTestState; +}; enum { FINISHER_FAIL = 0x3333, diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index 0dab922f3a..9d73c27232 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -25,12 +25,14 @@ #include "hw/riscv/sifive_gpio.h" #include "hw/riscv/sifive_u_prci.h" #include "hw/riscv/sifive_u_otp.h" +#include "qom/object.h" #define TYPE_RISCV_U_SOC "riscv.sifive.u.soc" +typedef struct SiFiveUSoCState SiFiveUSoCState; #define RISCV_U_SOC(obj) \ OBJECT_CHECK(SiFiveUSoCState, (obj), TYPE_RISCV_U_SOC) -typedef struct SiFiveUSoCState { +struct SiFiveUSoCState { /*< private >*/ DeviceState parent_obj; @@ -46,13 +48,14 @@ typedef struct SiFiveUSoCState { CadenceGEMState gem; uint32_t serial; -} SiFiveUSoCState; +}; #define TYPE_RISCV_U_MACHINE MACHINE_TYPE_NAME("sifive_u") +typedef struct SiFiveUState SiFiveUState; #define RISCV_U_MACHINE(obj) \ OBJECT_CHECK(SiFiveUState, (obj), TYPE_RISCV_U_MACHINE) -typedef struct SiFiveUState { +struct SiFiveUState { /*< private >*/ MachineState parent_obj; @@ -65,7 +68,7 @@ typedef struct SiFiveUState { bool start_in_flash; uint32_t msel; uint32_t serial; -} SiFiveUState; +}; enum { SIFIVE_U_DEV_DEBUG, diff --git a/include/hw/riscv/sifive_u_otp.h b/include/hw/riscv/sifive_u_otp.h index 639297564a..4572534f50 100644 --- a/include/hw/riscv/sifive_u_otp.h +++ b/include/hw/riscv/sifive_u_otp.h @@ -18,6 +18,7 @@ #ifndef HW_SIFIVE_U_OTP_H #define HW_SIFIVE_U_OTP_H +#include "qom/object.h" #define SIFIVE_U_OTP_PA 0x00 #define SIFIVE_U_OTP_PAIO 0x04 @@ -49,10 +50,11 @@ #define TYPE_SIFIVE_U_OTP "riscv.sifive.u.otp" +typedef struct SiFiveUOTPState SiFiveUOTPState; #define SIFIVE_U_OTP(obj) \ OBJECT_CHECK(SiFiveUOTPState, (obj), TYPE_SIFIVE_U_OTP) -typedef struct SiFiveUOTPState { +struct SiFiveUOTPState { /*< private >*/ SysBusDevice parent_obj; @@ -75,6 +77,6 @@ typedef struct SiFiveUOTPState { uint32_t fuse[SIFIVE_U_OTP_NUM_FUSES]; /* config */ uint32_t serial; -} SiFiveUOTPState; +}; #endif /* HW_SIFIVE_U_OTP_H */ diff --git a/include/hw/riscv/sifive_u_prci.h b/include/hw/riscv/sifive_u_prci.h index 0a531fdadc..83eab43686 100644 --- a/include/hw/riscv/sifive_u_prci.h +++ b/include/hw/riscv/sifive_u_prci.h @@ -18,6 +18,7 @@ #ifndef HW_SIFIVE_U_PRCI_H #define HW_SIFIVE_U_PRCI_H +#include "qom/object.h" #define SIFIVE_U_PRCI_HFXOSCCFG 0x00 #define SIFIVE_U_PRCI_COREPLLCFG0 0x04 @@ -58,10 +59,11 @@ #define TYPE_SIFIVE_U_PRCI "riscv.sifive.u.prci" +typedef struct SiFiveUPRCIState SiFiveUPRCIState; #define SIFIVE_U_PRCI(obj) \ OBJECT_CHECK(SiFiveUPRCIState, (obj), TYPE_SIFIVE_U_PRCI) -typedef struct SiFiveUPRCIState { +struct SiFiveUPRCIState { /*< private >*/ SysBusDevice parent_obj; @@ -76,7 +78,7 @@ typedef struct SiFiveUPRCIState { uint32_t coreclksel; uint32_t devicesreset; uint32_t clkmuxstatus; -} SiFiveUPRCIState; +}; /* * Clock indexes for use by Device Tree data and the PRCI driver. diff --git a/include/hw/riscv/sifive_uart.h b/include/hw/riscv/sifive_uart.h index 65668825a3..2bb72ac80b 100644 --- a/include/hw/riscv/sifive_uart.h +++ b/include/hw/riscv/sifive_uart.h @@ -22,6 +22,7 @@ #include "chardev/char-fe.h" #include "hw/sysbus.h" +#include "qom/object.h" enum { SIFIVE_UART_TXFIFO = 0, @@ -51,10 +52,11 @@ enum { #define TYPE_SIFIVE_UART "riscv.sifive.uart" +typedef struct SiFiveUARTState SiFiveUARTState; #define SIFIVE_UART(obj) \ OBJECT_CHECK(SiFiveUARTState, (obj), TYPE_SIFIVE_UART) -typedef struct SiFiveUARTState { +struct SiFiveUARTState { /*< private >*/ SysBusDevice parent_obj; @@ -69,7 +71,7 @@ typedef struct SiFiveUARTState { uint32_t txctrl; uint32_t rxctrl; uint32_t div; -} SiFiveUARTState; +}; SiFiveUARTState *sifive_uart_create(MemoryRegion *address_space, hwaddr base, Chardev *chr, qemu_irq irq); diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index e69355efaf..325ffa5728 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -22,12 +22,14 @@ #include "hw/riscv/riscv_hart.h" #include "hw/sysbus.h" #include "hw/block/flash.h" +#include "qom/object.h" #define TYPE_RISCV_VIRT_MACHINE MACHINE_TYPE_NAME("virt") +typedef struct RISCVVirtState RISCVVirtState; #define RISCV_VIRT_MACHINE(obj) \ OBJECT_CHECK(RISCVVirtState, (obj), TYPE_RISCV_VIRT_MACHINE) -typedef struct { +struct RISCVVirtState { /*< private >*/ MachineState parent; @@ -38,7 +40,7 @@ typedef struct { void *fdt; int fdt_size; -} RISCVVirtState; +}; enum { VIRT_DEBUG, diff --git a/include/hw/rtc/allwinner-rtc.h b/include/hw/rtc/allwinner-rtc.h index 7893f74795..1126e05f23 100644 --- a/include/hw/rtc/allwinner-rtc.h +++ b/include/hw/rtc/allwinner-rtc.h @@ -60,6 +60,8 @@ * @{ */ +typedef struct AwRtcClass AwRtcClass; +typedef struct AwRtcState AwRtcState; #define AW_RTC(obj) \ OBJECT_CHECK(AwRtcState, (obj), TYPE_AW_RTC) #define AW_RTC_CLASS(klass) \ @@ -72,7 +74,7 @@ /** * Allwinner RTC per-object instance state. */ -typedef struct AwRtcState { +struct AwRtcState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -92,7 +94,7 @@ typedef struct AwRtcState { /** Array of hardware registers */ uint32_t regs[AW_RTC_REGS_NUM]; -} AwRtcState; +}; /** * Allwinner RTC class-level struct. @@ -101,7 +103,7 @@ typedef struct AwRtcState { * such that the generic code can use this struct to support * all devices. */ -typedef struct AwRtcClass { +struct AwRtcClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ @@ -129,6 +131,6 @@ typedef struct AwRtcClass { */ bool (*write)(AwRtcState *s, uint32_t offset, uint32_t data); -} AwRtcClass; +}; #endif /* HW_MISC_ALLWINNER_RTC_H */ diff --git a/include/hw/rtc/aspeed_rtc.h b/include/hw/rtc/aspeed_rtc.h index b94a710268..295f4a7d30 100644 --- a/include/hw/rtc/aspeed_rtc.h +++ b/include/hw/rtc/aspeed_rtc.h @@ -9,8 +9,9 @@ #define HW_RTC_ASPEED_RTC_H #include "hw/sysbus.h" +#include "qom/object.h" -typedef struct AspeedRtcState { +struct AspeedRtcState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -19,7 +20,8 @@ typedef struct AspeedRtcState { uint32_t reg[0x18]; int offset; -} AspeedRtcState; +}; +typedef struct AspeedRtcState AspeedRtcState; #define TYPE_ASPEED_RTC "aspeed.rtc" #define ASPEED_RTC(obj) OBJECT_CHECK(AspeedRtcState, (obj), TYPE_ASPEED_RTC) diff --git a/include/hw/rtc/goldfish_rtc.h b/include/hw/rtc/goldfish_rtc.h index 9bd8924f5f..f31b0cbb89 100644 --- a/include/hw/rtc/goldfish_rtc.h +++ b/include/hw/rtc/goldfish_rtc.h @@ -23,12 +23,14 @@ #define HW_RTC_GOLDFISH_RTC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_GOLDFISH_RTC "goldfish_rtc" +typedef struct GoldfishRTCState GoldfishRTCState; #define GOLDFISH_RTC(obj) \ OBJECT_CHECK(GoldfishRTCState, (obj), TYPE_GOLDFISH_RTC) -typedef struct GoldfishRTCState { +struct GoldfishRTCState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -42,6 +44,6 @@ typedef struct GoldfishRTCState { uint32_t irq_pending; uint32_t irq_enabled; uint32_t time_high; -} GoldfishRTCState; +}; #endif diff --git a/include/hw/rtc/m48t59.h b/include/hw/rtc/m48t59.h index e7ea4e8761..78aae2c072 100644 --- a/include/hw/rtc/m48t59.h +++ b/include/hw/rtc/m48t59.h @@ -31,6 +31,7 @@ #define TYPE_NVRAM "nvram" +typedef struct NvramClass NvramClass; #define NVRAM_CLASS(klass) \ OBJECT_CLASS_CHECK(NvramClass, (klass), TYPE_NVRAM) #define NVRAM_GET_CLASS(obj) \ @@ -40,13 +41,13 @@ typedef struct Nvram Nvram; -typedef struct NvramClass { +struct NvramClass { InterfaceClass parent; uint32_t (*read)(Nvram *obj, uint32_t addr); void (*write)(Nvram *obj, uint32_t addr, uint32_t val); void (*toggle_lock)(Nvram *obj, int lock); -} NvramClass; +}; Nvram *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size, int base_year, int type); diff --git a/include/hw/rtc/mc146818rtc.h b/include/hw/rtc/mc146818rtc.h index 3713181b56..7b42d9c534 100644 --- a/include/hw/rtc/mc146818rtc.h +++ b/include/hw/rtc/mc146818rtc.h @@ -13,11 +13,13 @@ #include "qemu/queue.h" #include "qemu/timer.h" #include "hw/isa/isa.h" +#include "qom/object.h" #define TYPE_MC146818_RTC "mc146818rtc" +typedef struct RTCState RTCState; #define MC146818_RTC(obj) OBJECT_CHECK(RTCState, (obj), TYPE_MC146818_RTC) -typedef struct RTCState { +struct RTCState { ISADevice parent_obj; MemoryRegion io; @@ -44,7 +46,7 @@ typedef struct RTCState { LostTickPolicy lost_tick_policy; Notifier suspend_notifier; QLIST_ENTRY(RTCState) link; -} RTCState; +}; #define RTC_ISA_IRQ 8 #define RTC_ISA_BASE 0x70 diff --git a/include/hw/rtc/pl031.h b/include/hw/rtc/pl031.h index e3cb1d646f..3ddf48cc76 100644 --- a/include/hw/rtc/pl031.h +++ b/include/hw/rtc/pl031.h @@ -16,11 +16,13 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qom/object.h" #define TYPE_PL031 "pl031" +typedef struct PL031State PL031State; #define PL031(obj) OBJECT_CHECK(PL031State, (obj), TYPE_PL031) -typedef struct PL031State { +struct PL031State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -42,6 +44,6 @@ typedef struct PL031State { uint32_t cr; uint32_t im; uint32_t is; -} PL031State; +}; #endif diff --git a/include/hw/rtc/xlnx-zynqmp-rtc.h b/include/hw/rtc/xlnx-zynqmp-rtc.h index 6fa1cb2f43..95c85d3bf1 100644 --- a/include/hw/rtc/xlnx-zynqmp-rtc.h +++ b/include/hw/rtc/xlnx-zynqmp-rtc.h @@ -29,9 +29,11 @@ #include "hw/register.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_XLNX_ZYNQMP_RTC "xlnx-zynmp.rtc" +typedef struct XlnxZynqMPRTC XlnxZynqMPRTC; #define XLNX_ZYNQMP_RTC(obj) \ OBJECT_CHECK(XlnxZynqMPRTC, (obj), TYPE_XLNX_ZYNQMP_RTC) @@ -77,7 +79,7 @@ REG32(SAFETY_CHK, 0x50) #define XLNX_ZYNQMP_RTC_R_MAX (R_SAFETY_CHK + 1) -typedef struct XlnxZynqMPRTC { +struct XlnxZynqMPRTC { SysBusDevice parent_obj; MemoryRegion iomem; qemu_irq irq_rtc_int; @@ -87,6 +89,6 @@ typedef struct XlnxZynqMPRTC { uint32_t regs[XLNX_ZYNQMP_RTC_R_MAX]; RegisterInfo regs_info[XLNX_ZYNQMP_RTC_R_MAX]; -} XlnxZynqMPRTC; +}; #endif diff --git a/include/hw/rx/rx62n.h b/include/hw/rx/rx62n.h index aa94758c27..4451a9e006 100644 --- a/include/hw/rx/rx62n.h +++ b/include/hw/rx/rx62n.h @@ -30,8 +30,10 @@ #include "hw/timer/renesas_cmt.h" #include "hw/char/renesas_sci.h" #include "qemu/units.h" +#include "qom/object.h" #define TYPE_RX62N_MCU "rx62n-mcu" +typedef struct RX62NState RX62NState; #define RX62N_MCU(obj) OBJECT_CHECK(RX62NState, (obj), TYPE_RX62N_MCU) #define TYPE_R5F562N7_MCU "r5f562n7-mcu" @@ -45,7 +47,7 @@ #define RX62N_NR_CMT 2 #define RX62N_NR_SCI 6 -typedef struct RX62NState { +struct RX62NState { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -71,6 +73,6 @@ typedef struct RX62NState { uint32_t xtal_freq_hz; /* Peripheral Module Clock frequency */ uint32_t pclk_freq_hz; -} RX62NState; +}; #endif diff --git a/include/hw/s390x/3270-ccw.h b/include/hw/s390x/3270-ccw.h index 9d1d18e2bd..ac254f95ed 100644 --- a/include/hw/s390x/3270-ccw.h +++ b/include/hw/s390x/3270-ccw.h @@ -16,6 +16,7 @@ #include "hw/sysbus.h" #include "hw/s390x/css.h" #include "hw/s390x/ccw-device.h" +#include "qom/object.h" #define EMULATED_CCW_3270_CU_TYPE 0x3270 #define EMULATED_CCW_3270_CHPID_TYPE 0x1a @@ -30,6 +31,8 @@ #define TC_EWRITEA 0x0d /* Erase write alternate */ #define TC_WRITESF 0x11 /* Write structured field */ +typedef struct EmulatedCcw3270Class EmulatedCcw3270Class; +typedef struct EmulatedCcw3270Device EmulatedCcw3270Device; #define EMULATED_CCW_3270(obj) \ OBJECT_CHECK(EmulatedCcw3270Device, (obj), TYPE_EMULATED_CCW_3270) #define EMULATED_CCW_3270_CLASS(klass) \ @@ -37,16 +40,16 @@ #define EMULATED_CCW_3270_GET_CLASS(obj) \ OBJECT_GET_CLASS(EmulatedCcw3270Class, (obj), TYPE_EMULATED_CCW_3270) -typedef struct EmulatedCcw3270Device { +struct EmulatedCcw3270Device { CcwDevice parent_obj; -} EmulatedCcw3270Device; +}; -typedef struct EmulatedCcw3270Class { +struct EmulatedCcw3270Class { CCWDeviceClass parent_class; void (*init)(EmulatedCcw3270Device *, Error **); int (*read_payload_3270)(EmulatedCcw3270Device *); int (*write_payload_3270)(EmulatedCcw3270Device *, uint8_t); -} EmulatedCcw3270Class; +}; #endif diff --git a/include/hw/s390x/ap-device.h b/include/hw/s390x/ap-device.h index 8df9cd2954..b3b3e98a67 100644 --- a/include/hw/s390x/ap-device.h +++ b/include/hw/s390x/ap-device.h @@ -12,12 +12,14 @@ #define HW_S390X_AP_DEVICE_H #include "hw/qdev-core.h" +#include "qom/object.h" #define AP_DEVICE_TYPE "ap-device" -typedef struct APDevice { +struct APDevice { DeviceState parent_obj; -} APDevice; +}; +typedef struct APDevice APDevice; #define AP_DEVICE(obj) \ OBJECT_CHECK(APDevice, (obj), AP_DEVICE_TYPE) diff --git a/include/hw/s390x/css-bridge.h b/include/hw/s390x/css-bridge.h index f7ed2d9a03..05786b38de 100644 --- a/include/hw/s390x/css-bridge.h +++ b/include/hw/s390x/css-bridge.h @@ -17,19 +17,21 @@ #include "hw/sysbus.h" /* virtual css bridge */ -typedef struct VirtualCssBridge { +struct VirtualCssBridge { SysBusDevice sysbus_dev; bool css_dev_path; -} VirtualCssBridge; +}; +typedef struct VirtualCssBridge VirtualCssBridge; #define TYPE_VIRTUAL_CSS_BRIDGE "virtual-css-bridge" #define VIRTUAL_CSS_BRIDGE(obj) \ OBJECT_CHECK(VirtualCssBridge, (obj), TYPE_VIRTUAL_CSS_BRIDGE) /* virtual css bus type */ -typedef struct VirtualCssBus { +struct VirtualCssBus { BusState parent_obj; -} VirtualCssBus; +}; +typedef struct VirtualCssBus VirtualCssBus; #define TYPE_VIRTUAL_CSS_BUS "virtual-css-bus" #define VIRTUAL_CSS_BUS(obj) \ diff --git a/include/hw/s390x/event-facility.h b/include/hw/s390x/event-facility.h index e61c4651d7..dd1a6a44c0 100644 --- a/include/hw/s390x/event-facility.h +++ b/include/hw/s390x/event-facility.h @@ -18,6 +18,7 @@ #include "qemu/thread.h" #include "hw/qdev-core.h" #include "hw/s390x/sclp.h" +#include "qom/object.h" /* SCLP event types */ #define SCLP_EVENT_OPRTNS_COMMAND 0x01 @@ -41,6 +42,8 @@ #define SCLP_SELECTIVE_READ 0x01 #define TYPE_SCLP_EVENT "s390-sclp-event-type" +typedef struct SCLPEvent SCLPEvent; +typedef struct SCLPEventClass SCLPEventClass; #define SCLP_EVENT(obj) \ OBJECT_CHECK(SCLPEvent, (obj), TYPE_SCLP_EVENT) #define SCLP_EVENT_CLASS(klass) \ @@ -169,13 +172,13 @@ typedef struct ReadEventData { }; } QEMU_PACKED ReadEventData; -typedef struct SCLPEvent { +struct SCLPEvent { DeviceState qdev; bool event_pending; char *name; -} SCLPEvent; +}; -typedef struct SCLPEventClass { +struct SCLPEventClass { DeviceClass parent_class; int (*init)(SCLPEvent *event); @@ -192,10 +195,11 @@ typedef struct SCLPEventClass { /* can we handle this event type? */ bool (*can_handle_event)(uint8_t type); -} SCLPEventClass; +}; #define TYPE_SCLP_EVENT_FACILITY "s390-sclp-event-facility" typedef struct SCLPEventFacility SCLPEventFacility; +typedef struct SCLPEventFacilityClass SCLPEventFacilityClass; #define EVENT_FACILITY(obj) \ OBJECT_CHECK(SCLPEventFacility, (obj), TYPE_SCLP_EVENT_FACILITY) #define EVENT_FACILITY_CLASS(klass) \ @@ -205,11 +209,11 @@ typedef struct SCLPEventFacility SCLPEventFacility; OBJECT_GET_CLASS(SCLPEventFacilityClass, (obj), \ TYPE_SCLP_EVENT_FACILITY) -typedef struct SCLPEventFacilityClass { +struct SCLPEventFacilityClass { SysBusDeviceClass parent_class; void (*command_handler)(SCLPEventFacility *ef, SCCB *sccb, uint64_t code); bool (*event_pending)(SCLPEventFacility *ef); -} SCLPEventFacilityClass; +}; BusState *sclp_get_event_facility_bus(void); diff --git a/include/hw/s390x/s390-ccw.h b/include/hw/s390x/s390-ccw.h index d8e08b5f4c..f0f96952f1 100644 --- a/include/hw/s390x/s390-ccw.h +++ b/include/hw/s390x/s390-ccw.h @@ -14,8 +14,11 @@ #define HW_S390_CCW_H #include "hw/s390x/ccw-device.h" +#include "qom/object.h" #define TYPE_S390_CCW "s390-ccw" +typedef struct S390CCWDevice S390CCWDevice; +typedef struct S390CCWDeviceClass S390CCWDeviceClass; #define S390_CCW_DEVICE(obj) \ OBJECT_CHECK(S390CCWDevice, (obj), TYPE_S390_CCW) #define S390_CCW_DEVICE_CLASS(klass) \ @@ -23,14 +26,14 @@ #define S390_CCW_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(S390CCWDeviceClass, (obj), TYPE_S390_CCW) -typedef struct S390CCWDevice { +struct S390CCWDevice { CcwDevice parent_obj; CssDevId hostid; char *mdevid; int32_t bootindex; -} S390CCWDevice; +}; -typedef struct S390CCWDeviceClass { +struct S390CCWDeviceClass { CCWDeviceClass parent_class; void (*realize)(S390CCWDevice *dev, char *sysfsdev, Error **errp); void (*unrealize)(S390CCWDevice *dev); @@ -38,6 +41,6 @@ typedef struct S390CCWDeviceClass { int (*handle_halt) (SubchDev *sch); int (*handle_clear) (SubchDev *sch); IOInstEnding (*handle_store) (SubchDev *sch); -} S390CCWDeviceClass; +}; #endif diff --git a/include/hw/s390x/s390-virtio-ccw.h b/include/hw/s390x/s390-virtio-ccw.h index cd1dccc6e3..a55a4cb912 100644 --- a/include/hw/s390x/s390-virtio-ccw.h +++ b/include/hw/s390x/s390-virtio-ccw.h @@ -12,16 +12,19 @@ #define HW_S390X_S390_VIRTIO_CCW_H #include "hw/boards.h" +#include "qom/object.h" #define TYPE_S390_CCW_MACHINE "s390-ccw-machine" +typedef struct S390CcwMachineClass S390CcwMachineClass; +typedef struct S390CcwMachineState S390CcwMachineState; #define S390_CCW_MACHINE(obj) \ OBJECT_CHECK(S390CcwMachineState, (obj), TYPE_S390_CCW_MACHINE) #define S390_MACHINE_CLASS(klass) \ OBJECT_CLASS_CHECK(S390CcwMachineClass, (klass), TYPE_S390_CCW_MACHINE) -typedef struct S390CcwMachineState { +struct S390CcwMachineState { /*< private >*/ MachineState parent_obj; @@ -30,9 +33,9 @@ typedef struct S390CcwMachineState { bool dea_key_wrap; bool pv; uint8_t loadparm[8]; -} S390CcwMachineState; +}; -typedef struct S390CcwMachineClass { +struct S390CcwMachineClass { /*< private >*/ MachineClass parent_class; @@ -41,7 +44,7 @@ typedef struct S390CcwMachineClass { bool cpu_model_allowed; bool css_migration_enabled; bool hpage_1m_allowed; -} S390CcwMachineClass; +}; /* runtime-instrumentation allowed by the machine */ bool ri_allowed(void); diff --git a/include/hw/s390x/s390_flic.h b/include/hw/s390x/s390_flic.h index df11de9b20..2ae7cca85b 100644 --- a/include/hw/s390x/s390_flic.h +++ b/include/hw/s390x/s390_flic.h @@ -17,6 +17,7 @@ #include "hw/s390x/adapter.h" #include "hw/virtio/virtio.h" #include "qemu/queue.h" +#include "qom/object.h" /* * Reserve enough gsis to accommodate all virtio devices. @@ -38,22 +39,24 @@ extern const VMStateDescription vmstate_adapter_routes; VMSTATE_STRUCT(_f, _s, 1, vmstate_adapter_routes, AdapterRoutes) #define TYPE_S390_FLIC_COMMON "s390-flic" +typedef struct S390FLICState S390FLICState; +typedef struct S390FLICStateClass S390FLICStateClass; #define S390_FLIC_COMMON(obj) \ OBJECT_CHECK(S390FLICState, (obj), TYPE_S390_FLIC_COMMON) -typedef struct S390FLICState { +struct S390FLICState { SysBusDevice parent_obj; /* to limit AdapterRoutes.num_routes for compat */ uint32_t adapter_routes_max_batch; bool ais_supported; -} S390FLICState; +}; #define S390_FLIC_COMMON_CLASS(klass) \ OBJECT_CLASS_CHECK(S390FLICStateClass, (klass), TYPE_S390_FLIC_COMMON) #define S390_FLIC_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(S390FLICStateClass, (obj), TYPE_S390_FLIC_COMMON) -typedef struct S390FLICStateClass { +struct S390FLICStateClass { DeviceClass parent_class; int (*register_io_adapter)(S390FLICState *fs, uint32_t id, uint8_t isc, @@ -72,7 +75,7 @@ typedef struct S390FLICStateClass { uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); void (*inject_crw_mchk)(S390FLICState *fs); -} S390FLICStateClass; +}; #define TYPE_KVM_S390_FLIC "s390-flic-kvm" typedef struct KVMS390FLICState KVMS390FLICState; @@ -80,6 +83,7 @@ typedef struct KVMS390FLICState KVMS390FLICState; OBJECT_CHECK(KVMS390FLICState, (obj), TYPE_KVM_S390_FLIC) #define TYPE_QEMU_S390_FLIC "s390-flic-qemu" +typedef struct QEMUS390FLICState QEMUS390FLICState; #define QEMU_S390_FLIC(obj) \ OBJECT_CHECK(QEMUS390FLICState, (obj), TYPE_QEMU_S390_FLIC) @@ -115,14 +119,14 @@ typedef struct QEMUS390FlicIO { QLIST_ENTRY(QEMUS390FlicIO) next; } QEMUS390FlicIO; -typedef struct QEMUS390FLICState { +struct QEMUS390FLICState { S390FLICState parent_obj; uint32_t pending; uint32_t service_param; uint8_t simm; uint8_t nimm; QLIST_HEAD(, QEMUS390FlicIO) io[8]; -} QEMUS390FLICState; +}; uint32_t qemu_s390_flic_dequeue_service(QEMUS390FLICState *flic); QEMUS390FlicIO *qemu_s390_flic_dequeue_io(QEMUS390FLICState *flic, diff --git a/include/hw/s390x/sclp.h b/include/hw/s390x/sclp.h index a87ed2a0ab..2a5bdc6dfe 100644 --- a/include/hw/s390x/sclp.h +++ b/include/hw/s390x/sclp.h @@ -16,6 +16,7 @@ #include "hw/sysbus.h" #include "target/s390x/cpu-qom.h" +#include "qom/object.h" #define SCLP_CMD_CODE_MASK 0xffff00ff @@ -181,22 +182,24 @@ typedef struct SCCB { } QEMU_PACKED SCCB; #define TYPE_SCLP "sclp" +typedef struct SCLPDevice SCLPDevice; +typedef struct SCLPDeviceClass SCLPDeviceClass; #define SCLP(obj) OBJECT_CHECK(SCLPDevice, (obj), TYPE_SCLP) #define SCLP_CLASS(oc) OBJECT_CLASS_CHECK(SCLPDeviceClass, (oc), TYPE_SCLP) #define SCLP_GET_CLASS(obj) OBJECT_GET_CLASS(SCLPDeviceClass, (obj), TYPE_SCLP) struct SCLPEventFacility; -typedef struct SCLPDevice { +struct SCLPDevice { /* private */ DeviceState parent_obj; struct SCLPEventFacility *event_facility; int increment_size; /* public */ -} SCLPDevice; +}; -typedef struct SCLPDeviceClass { +struct SCLPDeviceClass { /* private */ DeviceClass parent_class; void (*read_SCP_info)(SCLPDevice *sclp, SCCB *sccb); @@ -205,7 +208,7 @@ typedef struct SCLPDeviceClass { /* public */ void (*execute)(SCLPDevice *sclp, SCCB *sccb, uint32_t code); void (*service_interrupt)(SCLPDevice *sclp, uint32_t sccb); -} SCLPDeviceClass; +}; static inline int sccb_data_len(SCCB *sccb) { diff --git a/include/hw/s390x/storage-attributes.h b/include/hw/s390x/storage-attributes.h index 4f7c6c0877..b5d9663f7c 100644 --- a/include/hw/s390x/storage-attributes.h +++ b/include/hw/s390x/storage-attributes.h @@ -14,26 +14,29 @@ #include "hw/qdev-core.h" #include "monitor/monitor.h" +#include "qom/object.h" #define TYPE_S390_STATTRIB "s390-storage_attributes" #define TYPE_QEMU_S390_STATTRIB "s390-storage_attributes-qemu" #define TYPE_KVM_S390_STATTRIB "s390-storage_attributes-kvm" +typedef struct S390StAttribClass S390StAttribClass; +typedef struct S390StAttribState S390StAttribState; #define S390_STATTRIB(obj) \ OBJECT_CHECK(S390StAttribState, (obj), TYPE_S390_STATTRIB) -typedef struct S390StAttribState { +struct S390StAttribState { DeviceState parent_obj; uint64_t migration_cur_gfn; bool migration_enabled; -} S390StAttribState; +}; #define S390_STATTRIB_CLASS(klass) \ OBJECT_CLASS_CHECK(S390StAttribClass, (klass), TYPE_S390_STATTRIB) #define S390_STATTRIB_GET_CLASS(obj) \ OBJECT_GET_CLASS(S390StAttribClass, (obj), TYPE_S390_STATTRIB) -typedef struct S390StAttribClass { +struct S390StAttribClass { DeviceClass parent_class; /* Return value: < 0 on error, or new count */ int (*get_stattr)(S390StAttribState *sa, uint64_t *start_gfn, @@ -46,23 +49,25 @@ typedef struct S390StAttribClass { int (*set_migrationmode)(S390StAttribState *sa, bool value); int (*get_active)(S390StAttribState *sa); long long (*get_dirtycount)(S390StAttribState *sa); -} S390StAttribClass; +}; +typedef struct QEMUS390StAttribState QEMUS390StAttribState; #define QEMU_S390_STATTRIB(obj) \ OBJECT_CHECK(QEMUS390StAttribState, (obj), TYPE_QEMU_S390_STATTRIB) -typedef struct QEMUS390StAttribState { +struct QEMUS390StAttribState { S390StAttribState parent_obj; -} QEMUS390StAttribState; +}; +typedef struct KVMS390StAttribState KVMS390StAttribState; #define KVM_S390_STATTRIB(obj) \ OBJECT_CHECK(KVMS390StAttribState, (obj), TYPE_KVM_S390_STATTRIB) -typedef struct KVMS390StAttribState { +struct KVMS390StAttribState { S390StAttribState parent_obj; uint64_t still_dirty; uint8_t *incoming_buffer; -} KVMS390StAttribState; +}; void s390_stattrib_init(void); diff --git a/include/hw/s390x/storage-keys.h b/include/hw/s390x/storage-keys.h index 3f1ae7e778..e94a201f71 100644 --- a/include/hw/s390x/storage-keys.h +++ b/include/hw/s390x/storage-keys.h @@ -14,41 +14,45 @@ #include "hw/qdev-core.h" #include "monitor/monitor.h" +#include "qom/object.h" #define TYPE_S390_SKEYS "s390-skeys" +typedef struct S390SKeysClass S390SKeysClass; +typedef struct S390SKeysState S390SKeysState; #define S390_SKEYS(obj) \ OBJECT_CHECK(S390SKeysState, (obj), TYPE_S390_SKEYS) -typedef struct S390SKeysState { +struct S390SKeysState { DeviceState parent_obj; bool migration_enabled; -} S390SKeysState; +}; #define S390_SKEYS_CLASS(klass) \ OBJECT_CLASS_CHECK(S390SKeysClass, (klass), TYPE_S390_SKEYS) #define S390_SKEYS_GET_CLASS(obj) \ OBJECT_GET_CLASS(S390SKeysClass, (obj), TYPE_S390_SKEYS) -typedef struct S390SKeysClass { +struct S390SKeysClass { DeviceClass parent_class; int (*skeys_enabled)(S390SKeysState *ks); int (*get_skeys)(S390SKeysState *ks, uint64_t start_gfn, uint64_t count, uint8_t *keys); int (*set_skeys)(S390SKeysState *ks, uint64_t start_gfn, uint64_t count, uint8_t *keys); -} S390SKeysClass; +}; #define TYPE_KVM_S390_SKEYS "s390-skeys-kvm" #define TYPE_QEMU_S390_SKEYS "s390-skeys-qemu" +typedef struct QEMUS390SKeysState QEMUS390SKeysState; #define QEMU_S390_SKEYS(obj) \ OBJECT_CHECK(QEMUS390SKeysState, (obj), TYPE_QEMU_S390_SKEYS) -typedef struct QEMUS390SKeysState { +struct QEMUS390SKeysState { S390SKeysState parent_obj; uint8_t *keydata; uint32_t key_count; -} QEMUS390SKeysState; +}; void s390_skeys_init(void); diff --git a/include/hw/s390x/tod.h b/include/hw/s390x/tod.h index 4251623f7f..e240faf11c 100644 --- a/include/hw/s390x/tod.h +++ b/include/hw/s390x/tod.h @@ -13,6 +13,7 @@ #include "hw/qdev-core.h" #include "target/s390x/s390-tod.h" +#include "qom/object.h" typedef struct S390TOD { uint8_t high; @@ -20,6 +21,8 @@ typedef struct S390TOD { } S390TOD; #define TYPE_S390_TOD "s390-tod" +typedef struct S390TODClass S390TODClass; +typedef struct S390TODState S390TODState; #define S390_TOD(obj) OBJECT_CHECK(S390TODState, (obj), TYPE_S390_TOD) #define S390_TOD_CLASS(oc) OBJECT_CLASS_CHECK(S390TODClass, (oc), \ TYPE_S390_TOD) @@ -28,7 +31,7 @@ typedef struct S390TOD { #define TYPE_KVM_S390_TOD TYPE_S390_TOD "-kvm" #define TYPE_QEMU_S390_TOD TYPE_S390_TOD "-qemu" -typedef struct S390TODState { +struct S390TODState { /* private */ DeviceState parent_obj; @@ -39,9 +42,9 @@ typedef struct S390TODState { S390TOD base; /* Used by KVM to remember if the TOD is stopped and base is valid. */ bool stopped; -} S390TODState; +}; -typedef struct S390TODClass { +struct S390TODClass { /* private */ DeviceClass parent_class; void (*parent_realize)(DeviceState *dev, Error **errp); @@ -49,7 +52,7 @@ typedef struct S390TODClass { /* public */ void (*get)(const S390TODState *td, S390TOD *tod, Error **errp); void (*set)(S390TODState *td, const S390TOD *tod, Error **errp); -} S390TODClass; +}; void s390_init_tod(void); S390TODState *s390_get_todstate(void); diff --git a/include/hw/s390x/vfio-ccw.h b/include/hw/s390x/vfio-ccw.h index ee5250d0d7..7bd4640ac3 100644 --- a/include/hw/s390x/vfio-ccw.h +++ b/include/hw/s390x/vfio-ccw.h @@ -17,12 +17,13 @@ #include "hw/vfio/vfio-common.h" #include "hw/s390x/s390-ccw.h" #include "hw/s390x/ccw-device.h" +#include "qom/object.h" #define TYPE_VFIO_CCW "vfio-ccw" +typedef struct VFIOCCWDevice VFIOCCWDevice; #define VFIO_CCW(obj) \ OBJECT_CHECK(VFIOCCWDevice, (obj), TYPE_VFIO_CCW) #define TYPE_VFIO_CCW "vfio-ccw" -typedef struct VFIOCCWDevice VFIOCCWDevice; #endif diff --git a/include/hw/scsi/esp.h b/include/hw/scsi/esp.h index 6ba47dac41..d4a4e2930c 100644 --- a/include/hw/scsi/esp.h +++ b/include/hw/scsi/esp.h @@ -3,6 +3,7 @@ #include "hw/scsi/scsi.h" #include "hw/sysbus.h" +#include "qom/object.h" /* esp.c */ #define ESP_MAX_DEVS 7 @@ -65,9 +66,10 @@ struct ESPState { }; #define TYPE_ESP "esp" +typedef struct SysBusESPState SysBusESPState; #define ESP_STATE(obj) OBJECT_CHECK(SysBusESPState, (obj), TYPE_ESP) -typedef struct { +struct SysBusESPState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -76,7 +78,7 @@ typedef struct { MemoryRegion pdma; uint32_t it_shift; ESPState esp; -} SysBusESPState; +}; #define ESP_TCLO 0x0 #define ESP_TCMID 0x1 diff --git a/include/hw/scsi/scsi.h b/include/hw/scsi/scsi.h index 2fc23e44ba..bad4dfb223 100644 --- a/include/hw/scsi/scsi.h +++ b/include/hw/scsi/scsi.h @@ -6,6 +6,7 @@ #include "hw/qdev-core.h" #include "scsi/utils.h" #include "qemu/notify.h" +#include "qom/object.h" #define MAX_SCSI_DEVS 255 @@ -49,6 +50,7 @@ struct SCSIRequest { }; #define TYPE_SCSI_DEVICE "scsi-device" +typedef struct SCSIDeviceClass SCSIDeviceClass; #define SCSI_DEVICE(obj) \ OBJECT_CHECK(SCSIDevice, (obj), TYPE_SCSI_DEVICE) #define SCSI_DEVICE_CLASS(klass) \ @@ -56,7 +58,7 @@ struct SCSIRequest { #define SCSI_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(SCSIDeviceClass, (obj), TYPE_SCSI_DEVICE) -typedef struct SCSIDeviceClass { +struct SCSIDeviceClass { DeviceClass parent_class; void (*realize)(SCSIDevice *dev, Error **errp); void (*unrealize)(SCSIDevice *dev); @@ -65,7 +67,7 @@ typedef struct SCSIDeviceClass { SCSIRequest *(*alloc_req)(SCSIDevice *s, uint32_t tag, uint32_t lun, uint8_t *buf, void *hba_private); void (*unit_attention_reported)(SCSIDevice *s); -} SCSIDeviceClass; +}; struct SCSIDevice { diff --git a/include/hw/sd/allwinner-sdhost.h b/include/hw/sd/allwinner-sdhost.h index d94606a853..c5a2f93cf3 100644 --- a/include/hw/sd/allwinner-sdhost.h +++ b/include/hw/sd/allwinner-sdhost.h @@ -45,6 +45,8 @@ * @{ */ +typedef struct AwSdHostClass AwSdHostClass; +typedef struct AwSdHostState AwSdHostState; #define AW_SDHOST(obj) \ OBJECT_CHECK(AwSdHostState, (obj), TYPE_AW_SDHOST) #define AW_SDHOST_CLASS(klass) \ @@ -57,7 +59,7 @@ /** * Allwinner SD Host Controller object instance state. */ -typedef struct AwSdHostState { +struct AwSdHostState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -113,7 +115,7 @@ typedef struct AwSdHostState { /** @} */ -} AwSdHostState; +}; /** * Allwinner SD Host Controller class-level struct. @@ -122,7 +124,7 @@ typedef struct AwSdHostState { * such that the generic code can use this struct to support * all devices. */ -typedef struct AwSdHostClass { +struct AwSdHostClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ @@ -130,6 +132,6 @@ typedef struct AwSdHostClass { /** Maximum buffer size in bytes per DMA descriptor */ size_t max_desc_size; -} AwSdHostClass; +}; #endif /* HW_SD_ALLWINNER_SDHOST_H */ diff --git a/include/hw/sd/aspeed_sdhci.h b/include/hw/sd/aspeed_sdhci.h index dffbb46946..527075476b 100644 --- a/include/hw/sd/aspeed_sdhci.h +++ b/include/hw/sd/aspeed_sdhci.h @@ -10,8 +10,10 @@ #define ASPEED_SDHCI_H #include "hw/sd/sdhci.h" +#include "qom/object.h" #define TYPE_ASPEED_SDHCI "aspeed.sdhci" +typedef struct AspeedSDHCIState AspeedSDHCIState; #define ASPEED_SDHCI(obj) OBJECT_CHECK(AspeedSDHCIState, (obj), \ TYPE_ASPEED_SDHCI) @@ -20,7 +22,7 @@ #define ASPEED_SDHCI_NUM_REGS (ASPEED_SDHCI_REG_SIZE / sizeof(uint32_t)) #define ASPEED_SDHCI_REG_SIZE 0x100 -typedef struct AspeedSDHCIState { +struct AspeedSDHCIState { SysBusDevice parent; SDHCIState slots[ASPEED_SDHCI_NUM_SLOTS]; @@ -30,6 +32,6 @@ typedef struct AspeedSDHCIState { qemu_irq irq; uint32_t regs[ASPEED_SDHCI_NUM_REGS]; -} AspeedSDHCIState; +}; #endif /* ASPEED_SDHCI_H */ diff --git a/include/hw/sd/bcm2835_sdhost.h b/include/hw/sd/bcm2835_sdhost.h index 7520dd6507..233e74b002 100644 --- a/include/hw/sd/bcm2835_sdhost.h +++ b/include/hw/sd/bcm2835_sdhost.h @@ -16,14 +16,16 @@ #include "hw/sysbus.h" #include "hw/sd/sd.h" +#include "qom/object.h" #define TYPE_BCM2835_SDHOST "bcm2835-sdhost" +typedef struct BCM2835SDHostState BCM2835SDHostState; #define BCM2835_SDHOST(obj) \ OBJECT_CHECK(BCM2835SDHostState, (obj), TYPE_BCM2835_SDHOST) #define BCM2835_SDHOST_FIFO_LEN 16 -typedef struct { +struct BCM2835SDHostState { SysBusDevice busdev; SDBus sdbus; MemoryRegion iomem; @@ -43,6 +45,6 @@ typedef struct { uint32_t datacnt; qemu_irq irq; -} BCM2835SDHostState; +}; #endif diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h index a84b8e274a..0c501e2f25 100644 --- a/include/hw/sd/sd.h +++ b/include/hw/sd/sd.h @@ -31,6 +31,7 @@ #define HW_SD_H #include "hw/qdev-core.h" +#include "qom/object.h" #define OUT_OF_RANGE (1 << 31) #define ADDRESS_ERROR (1 << 30) @@ -92,13 +93,14 @@ typedef struct SDState SDState; typedef struct SDBus SDBus; #define TYPE_SD_CARD "sd-card" +typedef struct SDCardClass SDCardClass; #define SD_CARD(obj) OBJECT_CHECK(SDState, (obj), TYPE_SD_CARD) #define SD_CARD_CLASS(klass) \ OBJECT_CLASS_CHECK(SDCardClass, (klass), TYPE_SD_CARD) #define SD_CARD_GET_CLASS(obj) \ OBJECT_GET_CLASS(SDCardClass, (obj), TYPE_SD_CARD) -typedef struct { +struct SDCardClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -113,9 +115,10 @@ typedef struct { void (*enable)(SDState *sd, bool enable); bool (*get_inserted)(SDState *sd); bool (*get_readonly)(SDState *sd); -} SDCardClass; +}; #define TYPE_SD_BUS "sd-bus" +typedef struct SDBusClass SDBusClass; #define SD_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_SD_BUS) #define SD_BUS_CLASS(klass) OBJECT_CLASS_CHECK(SDBusClass, (klass), TYPE_SD_BUS) #define SD_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(SDBusClass, (obj), TYPE_SD_BUS) @@ -124,7 +127,7 @@ struct SDBus { BusState qbus; }; -typedef struct { +struct SDBusClass { /*< private >*/ BusClass parent_class; /*< public >*/ @@ -134,7 +137,7 @@ typedef struct { */ void (*set_inserted)(DeviceState *dev, bool inserted); void (*set_readonly)(DeviceState *dev, bool readonly); -} SDBusClass; +}; /* Legacy functions to be used only by non-qdevified callers */ SDState *sd_init(BlockBackend *bs, bool is_spi); diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 5d9275f3d6..67b01fcb28 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -28,9 +28,10 @@ #include "hw/pci/pci.h" #include "hw/sysbus.h" #include "hw/sd/sd.h" +#include "qom/object.h" /* SD/MMC host controller state */ -typedef struct SDHCIState { +struct SDHCIState { /*< private >*/ union { PCIDevice pcidev; @@ -98,7 +99,8 @@ typedef struct SDHCIState { uint8_t sd_spec_version; uint8_t uhs_mode; uint8_t vendor; /* For vendor specific functionality */ -} SDHCIState; +}; +typedef struct SDHCIState SDHCIState; #define SDHCI_VENDOR_NONE 0 #define SDHCI_VENDOR_IMX 1 diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index ac1d04ddc2..21ad6327d2 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -13,6 +13,7 @@ #define HW_SOUTHBRIDGE_PIIX_H #include "hw/pci/pci.h" +#include "qom/object.h" #define TYPE_PIIX4_PM "PIIX4_PM" @@ -35,7 +36,7 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, #define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ #define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ -typedef struct PIIXState { +struct PIIXState { PCIDevice dev; /* @@ -62,7 +63,8 @@ typedef struct PIIXState { /* IO memory region for Reset Control Register (PIIX_RCR_IOPORT) */ MemoryRegion rcr_mem; -} PIIX3State; +}; +typedef struct PIIXState PIIX3State; #define TYPE_PIIX3_PCI_DEVICE "pci-piix3" #define PIIX3_PCI_DEVICE(obj) \ diff --git a/include/hw/sparc/sparc32_dma.h b/include/hw/sparc/sparc32_dma.h index ab42c5421b..9c80ef54ff 100644 --- a/include/hw/sparc/sparc32_dma.h +++ b/include/hw/sparc/sparc32_dma.h @@ -4,14 +4,15 @@ #include "hw/sysbus.h" #include "hw/scsi/esp.h" #include "hw/net/lance.h" +#include "qom/object.h" #define DMA_REGS 4 #define TYPE_SPARC32_DMA_DEVICE "sparc32-dma-device" +typedef struct DMADeviceState DMADeviceState; #define SPARC32_DMA_DEVICE(obj) OBJECT_CHECK(DMADeviceState, (obj), \ TYPE_SPARC32_DMA_DEVICE) -typedef struct DMADeviceState DMADeviceState; struct DMADeviceState { SysBusDevice parent_obj; @@ -24,37 +25,40 @@ struct DMADeviceState { }; #define TYPE_SPARC32_ESPDMA_DEVICE "sparc32-espdma" +typedef struct ESPDMADeviceState ESPDMADeviceState; #define SPARC32_ESPDMA_DEVICE(obj) OBJECT_CHECK(ESPDMADeviceState, (obj), \ TYPE_SPARC32_ESPDMA_DEVICE) -typedef struct ESPDMADeviceState { +struct ESPDMADeviceState { DMADeviceState parent_obj; SysBusESPState *esp; -} ESPDMADeviceState; +}; #define TYPE_SPARC32_LEDMA_DEVICE "sparc32-ledma" +typedef struct LEDMADeviceState LEDMADeviceState; #define SPARC32_LEDMA_DEVICE(obj) OBJECT_CHECK(LEDMADeviceState, (obj), \ TYPE_SPARC32_LEDMA_DEVICE) -typedef struct LEDMADeviceState { +struct LEDMADeviceState { DMADeviceState parent_obj; SysBusPCNetState *lance; -} LEDMADeviceState; +}; #define TYPE_SPARC32_DMA "sparc32-dma" +typedef struct SPARC32DMAState SPARC32DMAState; #define SPARC32_DMA(obj) OBJECT_CHECK(SPARC32DMAState, (obj), \ TYPE_SPARC32_DMA) -typedef struct SPARC32DMAState { +struct SPARC32DMAState { SysBusDevice parent_obj; MemoryRegion dmamem; MemoryRegion ledma_alias; ESPDMADeviceState *espdma; LEDMADeviceState *ledma; -} SPARC32DMAState; +}; /* sparc32_dma.c */ void ledma_memory_read(void *opaque, hwaddr addr, diff --git a/include/hw/sparc/sun4m_iommu.h b/include/hw/sparc/sun4m_iommu.h index 482266c6a7..6095eed0af 100644 --- a/include/hw/sparc/sun4m_iommu.h +++ b/include/hw/sparc/sun4m_iommu.h @@ -26,10 +26,11 @@ #define SUN4M_IOMMU_H #include "hw/sysbus.h" +#include "qom/object.h" #define IOMMU_NREGS (4 * 4096 / 4) -typedef struct IOMMUState { +struct IOMMUState { SysBusDevice parent_obj; AddressSpace iommu_as; @@ -40,7 +41,8 @@ typedef struct IOMMUState { hwaddr iostart; qemu_irq irq; uint32_t version; -} IOMMUState; +}; +typedef struct IOMMUState IOMMUState; #define TYPE_SUN4M_IOMMU "sun4m-iommu" #define SUN4M_IOMMU(obj) OBJECT_CHECK(IOMMUState, (obj), TYPE_SUN4M_IOMMU) diff --git a/include/hw/sparc/sun4u_iommu.h b/include/hw/sparc/sun4u_iommu.h index 5472d489cf..dfe10459e5 100644 --- a/include/hw/sparc/sun4u_iommu.h +++ b/include/hw/sparc/sun4u_iommu.h @@ -28,10 +28,11 @@ #define SUN4U_IOMMU_H #include "hw/sysbus.h" +#include "qom/object.h" #define IOMMU_NREGS 3 -typedef struct IOMMUState { +struct IOMMUState { SysBusDevice parent_obj; AddressSpace iommu_as; @@ -39,7 +40,8 @@ typedef struct IOMMUState { MemoryRegion iomem; uint64_t regs[IOMMU_NREGS]; -} IOMMUState; +}; +typedef struct IOMMUState IOMMUState; #define TYPE_SUN4U_IOMMU "sun4u-iommu" #define SUN4U_IOMMU(obj) OBJECT_CHECK(IOMMUState, (obj), TYPE_SUN4U_IOMMU) diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h index 6fbbb238f1..a2072ffeea 100644 --- a/include/hw/ssi/aspeed_smc.h +++ b/include/hw/ssi/aspeed_smc.h @@ -27,6 +27,7 @@ #include "hw/ssi/ssi.h" #include "hw/sysbus.h" +#include "qom/object.h" typedef struct AspeedSegments { hwaddr addr; @@ -67,20 +68,22 @@ typedef struct AspeedSMCFlash { } AspeedSMCFlash; #define TYPE_ASPEED_SMC "aspeed.smc" +typedef struct AspeedSMCClass AspeedSMCClass; +typedef struct AspeedSMCState AspeedSMCState; #define ASPEED_SMC(obj) OBJECT_CHECK(AspeedSMCState, (obj), TYPE_ASPEED_SMC) #define ASPEED_SMC_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedSMCClass, (klass), TYPE_ASPEED_SMC) #define ASPEED_SMC_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedSMCClass, (obj), TYPE_ASPEED_SMC) -typedef struct AspeedSMCClass { +struct AspeedSMCClass { SysBusDevice parent_obj; const AspeedSMCController *ctrl; -} AspeedSMCClass; +}; #define ASPEED_SMC_R_MAX (0x100 / 4) -typedef struct AspeedSMCState { +struct AspeedSMCState { SysBusDevice parent_obj; const AspeedSMCController *ctrl; @@ -117,6 +120,6 @@ typedef struct AspeedSMCState { uint8_t snoop_index; uint8_t snoop_dummies; -} AspeedSMCState; +}; #endif /* ASPEED_SMC_H */ diff --git a/include/hw/ssi/imx_spi.h b/include/hw/ssi/imx_spi.h index 7103953581..3a966af0ec 100644 --- a/include/hw/ssi/imx_spi.h +++ b/include/hw/ssi/imx_spi.h @@ -14,6 +14,7 @@ #include "hw/ssi/ssi.h" #include "qemu/bitops.h" #include "qemu/fifo32.h" +#include "qom/object.h" #define ECSPI_FIFO_SIZE 64 @@ -77,9 +78,10 @@ #define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH) #define TYPE_IMX_SPI "imx.spi" +typedef struct IMXSPIState IMXSPIState; #define IMX_SPI(obj) OBJECT_CHECK(IMXSPIState, (obj), TYPE_IMX_SPI) -typedef struct IMXSPIState { +struct IMXSPIState { /* */ SysBusDevice parent_obj; @@ -98,6 +100,6 @@ typedef struct IMXSPIState { Fifo32 tx_fifo; int16_t burst_length; -} IMXSPIState; +}; #endif /* IMX_SPI_H */ diff --git a/include/hw/ssi/mss-spi.h b/include/hw/ssi/mss-spi.h index f0cf3243e0..40e1a5ac90 100644 --- a/include/hw/ssi/mss-spi.h +++ b/include/hw/ssi/mss-spi.h @@ -28,13 +28,15 @@ #include "hw/sysbus.h" #include "hw/ssi/ssi.h" #include "qemu/fifo32.h" +#include "qom/object.h" #define TYPE_MSS_SPI "mss-spi" +typedef struct MSSSpiState MSSSpiState; #define MSS_SPI(obj) OBJECT_CHECK(MSSSpiState, (obj), TYPE_MSS_SPI) #define R_SPI_MAX 16 -typedef struct MSSSpiState { +struct MSSSpiState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -53,6 +55,6 @@ typedef struct MSSSpiState { bool enabled; uint32_t regs[R_SPI_MAX]; -} MSSSpiState; +}; #endif /* HW_MSS_SPI_H */ diff --git a/include/hw/ssi/pl022.h b/include/hw/ssi/pl022.h index a080519366..64aeb61eef 100644 --- a/include/hw/ssi/pl022.h +++ b/include/hw/ssi/pl022.h @@ -22,11 +22,13 @@ #define HW_SSI_PL022_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_PL022 "pl022" +typedef struct PL022State PL022State; #define PL022(obj) OBJECT_CHECK(PL022State, (obj), TYPE_PL022) -typedef struct PL022State { +struct PL022State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -46,6 +48,6 @@ typedef struct PL022State { uint16_t rx_fifo[8]; qemu_irq irq; SSIBus *ssi; -} PL022State; +}; #endif diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h index eac168aa1d..b42765f415 100644 --- a/include/hw/ssi/ssi.h +++ b/include/hw/ssi/ssi.h @@ -12,6 +12,7 @@ #define QEMU_SSI_H #include "hw/qdev-core.h" +#include "qom/object.h" typedef struct SSISlave SSISlave; typedef struct SSISlaveClass SSISlaveClass; diff --git a/include/hw/ssi/stm32f2xx_spi.h b/include/hw/ssi/stm32f2xx_spi.h index e24b007abf..1c8ff7d724 100644 --- a/include/hw/ssi/stm32f2xx_spi.h +++ b/include/hw/ssi/stm32f2xx_spi.h @@ -27,6 +27,7 @@ #include "hw/sysbus.h" #include "hw/ssi/ssi.h" +#include "qom/object.h" #define STM_SPI_CR1 0x00 #define STM_SPI_CR2 0x04 @@ -44,10 +45,11 @@ #define STM_SPI_SR_RXNE 1 #define TYPE_STM32F2XX_SPI "stm32f2xx-spi" +typedef struct STM32F2XXSPIState STM32F2XXSPIState; #define STM32F2XX_SPI(obj) \ OBJECT_CHECK(STM32F2XXSPIState, (obj), TYPE_STM32F2XX_SPI) -typedef struct { +struct STM32F2XXSPIState { /* */ SysBusDevice parent_obj; @@ -66,6 +68,6 @@ typedef struct { qemu_irq irq; SSIBus *ssi; -} STM32F2XXSPIState; +}; #endif /* HW_STM32F2XX_SPI_H */ diff --git a/include/hw/ssi/xilinx_spips.h b/include/hw/ssi/xilinx_spips.h index 6a39b55a7b..2171018601 100644 --- a/include/hw/ssi/xilinx_spips.h +++ b/include/hw/ssi/xilinx_spips.h @@ -29,6 +29,7 @@ #include "qemu/fifo32.h" #include "hw/stream.h" #include "hw/sysbus.h" +#include "qom/object.h" typedef struct XilinxSPIPS XilinxSPIPS; @@ -85,16 +86,17 @@ struct XilinxSPIPS { bool man_start_com; }; -typedef struct { +struct XilinxQSPIPS { XilinxSPIPS parent_obj; uint8_t lqspi_buf[LQSPI_CACHE_SIZE]; hwaddr lqspi_cached_addr; Error *migration_blocker; bool mmio_execution_enabled; -} XilinxQSPIPS; +}; +typedef struct XilinxQSPIPS XilinxQSPIPS; -typedef struct { +struct XlnxZynqMPQSPIPS { XilinxQSPIPS parent_obj; StreamSlave *dma; @@ -117,16 +119,18 @@ typedef struct { bool man_start_com_g; uint32_t dma_burst_size; uint8_t dma_buf[QSPI_DMA_MAX_BURST_SIZE]; -} XlnxZynqMPQSPIPS; +}; +typedef struct XlnxZynqMPQSPIPS XlnxZynqMPQSPIPS; -typedef struct XilinxSPIPSClass { +struct XilinxSPIPSClass { SysBusDeviceClass parent_class; const MemoryRegionOps *reg_ops; uint32_t rx_fifo_size; uint32_t tx_fifo_size; -} XilinxSPIPSClass; +}; +typedef struct XilinxSPIPSClass XilinxSPIPSClass; #define TYPE_XILINX_SPIPS "xlnx.ps7-spi" #define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi" diff --git a/include/hw/stream.h b/include/hw/stream.h index ed09e83683..bd41750e94 100644 --- a/include/hw/stream.h +++ b/include/hw/stream.h @@ -6,6 +6,7 @@ /* stream slave. Used until qdev provides a generic way. */ #define TYPE_STREAM_SLAVE "stream-slave" +typedef struct StreamSlaveClass StreamSlaveClass; #define STREAM_SLAVE_CLASS(klass) \ OBJECT_CLASS_CHECK(StreamSlaveClass, (klass), TYPE_STREAM_SLAVE) #define STREAM_SLAVE_GET_CLASS(obj) \ @@ -17,7 +18,7 @@ typedef struct StreamSlave StreamSlave; typedef void (*StreamCanPushNotifyFn)(void *opaque); -typedef struct StreamSlaveClass { +struct StreamSlaveClass { InterfaceClass parent; /** * can push - determine if a stream slave is capable of accepting at least @@ -42,7 +43,7 @@ typedef struct StreamSlaveClass { * @eop: End of packet flag */ size_t (*push)(StreamSlave *obj, unsigned char *buf, size_t len, bool eop); -} StreamSlaveClass; +}; size_t stream_push(StreamSlave *sink, uint8_t *buf, size_t len, bool eop); diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index da9f85c58c..3537e43f23 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -5,6 +5,7 @@ #include "hw/qdev-core.h" #include "exec/memory.h" +#include "qom/object.h" #define QDEV_MAX_MMIO 32 #define QDEV_MAX_PIO 32 @@ -15,6 +16,7 @@ typedef struct SysBusDevice SysBusDevice; #define TYPE_SYS_BUS_DEVICE "sys-bus-device" +typedef struct SysBusDeviceClass SysBusDeviceClass; #define SYS_BUS_DEVICE(obj) \ OBJECT_CHECK(SysBusDevice, (obj), TYPE_SYS_BUS_DEVICE) #define SYS_BUS_DEVICE_CLASS(klass) \ @@ -31,7 +33,7 @@ typedef struct SysBusDevice SysBusDevice; #define SYSBUS_DEVICE_GPIO_IRQ "sysbus-irq" -typedef struct SysBusDeviceClass { +struct SysBusDeviceClass { /*< private >*/ DeviceClass parent_class; @@ -52,7 +54,7 @@ typedef struct SysBusDeviceClass { */ char *(*explicit_ofw_unit_address)(const SysBusDevice *dev); void (*connect_irq_notifier)(SysBusDevice *dev, qemu_irq irq); -} SysBusDeviceClass; +}; struct SysBusDevice { /*< private >*/ diff --git a/include/hw/timer/a9gtimer.h b/include/hw/timer/a9gtimer.h index 81c4388784..88811c6c8f 100644 --- a/include/hw/timer/a9gtimer.h +++ b/include/hw/timer/a9gtimer.h @@ -24,10 +24,12 @@ #define A9GTIMER_H #include "hw/sysbus.h" +#include "qom/object.h" #define A9_GTIMER_MAX_CPUS 4 #define TYPE_A9_GTIMER "arm.cortex-a9-global-timer" +typedef struct A9GTimerState A9GTimerState; #define A9_GTIMER(obj) OBJECT_CHECK(A9GTimerState, (obj), TYPE_A9_GTIMER) #define R_COUNTER_LO 0x00 @@ -55,7 +57,6 @@ #define R_AUTO_INCREMENT 0x18 typedef struct A9GTimerPerCPU A9GTimerPerCPU; -typedef struct A9GTimerState A9GTimerState; struct A9GTimerPerCPU { A9GTimerState *parent; diff --git a/include/hw/timer/allwinner-a10-pit.h b/include/hw/timer/allwinner-a10-pit.h index 871c95b512..fa060c684d 100644 --- a/include/hw/timer/allwinner-a10-pit.h +++ b/include/hw/timer/allwinner-a10-pit.h @@ -3,8 +3,10 @@ #include "hw/ptimer.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_AW_A10_PIT "allwinner-A10-timer" +typedef struct AwA10PITState AwA10PITState; #define AW_A10_PIT(obj) OBJECT_CHECK(AwA10PITState, (obj), TYPE_AW_A10_PIT) #define AW_A10_PIT_TIMER_NR 6 @@ -36,7 +38,6 @@ #define AW_A10_PIT_DEFAULT_CLOCK 0x4 -typedef struct AwA10PITState AwA10PITState; typedef struct AwA10TimerContext { AwA10PITState *container; diff --git a/include/hw/timer/arm_mptimer.h b/include/hw/timer/arm_mptimer.h index c46d8d2309..643a256ecf 100644 --- a/include/hw/timer/arm_mptimer.h +++ b/include/hw/timer/arm_mptimer.h @@ -22,6 +22,7 @@ #define HW_TIMER_ARM_MPTIMER_H #include "hw/sysbus.h" +#include "qom/object.h" #define ARM_MPTIMER_MAX_CPUS 4 @@ -35,10 +36,11 @@ typedef struct { } TimerBlock; #define TYPE_ARM_MPTIMER "arm_mptimer" +typedef struct ARMMPTimerState ARMMPTimerState; #define ARM_MPTIMER(obj) \ OBJECT_CHECK(ARMMPTimerState, (obj), TYPE_ARM_MPTIMER) -typedef struct { +struct ARMMPTimerState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -46,6 +48,6 @@ typedef struct { uint32_t num_cpu; TimerBlock timerblock[ARM_MPTIMER_MAX_CPUS]; MemoryRegion iomem; -} ARMMPTimerState; +}; #endif diff --git a/include/hw/timer/armv7m_systick.h b/include/hw/timer/armv7m_systick.h index 25e5ceacc8..33df057958 100644 --- a/include/hw/timer/armv7m_systick.h +++ b/include/hw/timer/armv7m_systick.h @@ -13,12 +13,14 @@ #define HW_TIMER_ARMV7M_SYSTICK_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_SYSTICK "armv7m_systick" +typedef struct SysTickState SysTickState; #define SYSTICK(obj) OBJECT_CHECK(SysTickState, (obj), TYPE_SYSTICK) -typedef struct SysTickState { +struct SysTickState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -29,7 +31,7 @@ typedef struct SysTickState { QEMUTimer *timer; MemoryRegion iomem; qemu_irq irq; -} SysTickState; +}; /* * Multiplication factor to convert from system clock ticks to qemu timer diff --git a/include/hw/timer/aspeed_timer.h b/include/hw/timer/aspeed_timer.h index d7c7d8ad28..c890aaa949 100644 --- a/include/hw/timer/aspeed_timer.h +++ b/include/hw/timer/aspeed_timer.h @@ -24,10 +24,13 @@ #include "qemu/timer.h" #include "hw/misc/aspeed_scu.h" +#include "qom/object.h" +#define TYPE_ASPEED_TIMER "aspeed.timer" +typedef struct AspeedTimerClass AspeedTimerClass; +typedef struct AspeedTimerCtrlState AspeedTimerCtrlState; #define ASPEED_TIMER(obj) \ OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER) -#define TYPE_ASPEED_TIMER "aspeed.timer" #define TYPE_ASPEED_2400_TIMER TYPE_ASPEED_TIMER "-ast2400" #define TYPE_ASPEED_2500_TIMER TYPE_ASPEED_TIMER "-ast2500" #define TYPE_ASPEED_2600_TIMER TYPE_ASPEED_TIMER "-ast2600" @@ -50,7 +53,7 @@ typedef struct AspeedTimer { uint64_t start; } AspeedTimer; -typedef struct AspeedTimerCtrlState { +struct AspeedTimerCtrlState { /*< private >*/ SysBusDevice parent; @@ -64,18 +67,18 @@ typedef struct AspeedTimerCtrlState { AspeedTimer timers[ASPEED_TIMER_NR_TIMERS]; AspeedSCUState *scu; -} AspeedTimerCtrlState; +}; #define ASPEED_TIMER_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedTimerClass, (klass), TYPE_ASPEED_TIMER) #define ASPEED_TIMER_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedTimerClass, (obj), TYPE_ASPEED_TIMER) -typedef struct AspeedTimerClass { +struct AspeedTimerClass { SysBusDeviceClass parent_class; uint64_t (*read)(AspeedTimerCtrlState *s, hwaddr offset); void (*write)(AspeedTimerCtrlState *s, hwaddr offset, uint64_t value); -} AspeedTimerClass; +}; #endif /* ASPEED_TIMER_H */ diff --git a/include/hw/timer/avr_timer16.h b/include/hw/timer/avr_timer16.h index 982019d242..9efe75ce5e 100644 --- a/include/hw/timer/avr_timer16.h +++ b/include/hw/timer/avr_timer16.h @@ -31,6 +31,7 @@ #include "hw/sysbus.h" #include "qemu/timer.h" #include "hw/hw.h" +#include "qom/object.h" enum NextInterrupt { OVERFLOW, @@ -41,10 +42,11 @@ enum NextInterrupt { }; #define TYPE_AVR_TIMER16 "avr-timer16" +typedef struct AVRTimer16State AVRTimer16State; #define AVR_TIMER16(obj) \ OBJECT_CHECK(AVRTimer16State, (obj), TYPE_AVR_TIMER16) -typedef struct AVRTimer16State { +struct AVRTimer16State { /* */ SysBusDevice parent_obj; @@ -89,6 +91,6 @@ typedef struct AVRTimer16State { uint64_t period_ns; uint64_t reset_time_ns; enum NextInterrupt next_interrupt; -} AVRTimer16State; +}; #endif /* HW_TIMER_AVR_TIMER16_H */ diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h index c0bc5c8127..796f62cf88 100644 --- a/include/hw/timer/bcm2835_systmr.h +++ b/include/hw/timer/bcm2835_systmr.h @@ -11,12 +11,14 @@ #include "hw/sysbus.h" #include "hw/irq.h" +#include "qom/object.h" #define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer" +typedef struct BCM2835SystemTimerState BCM2835SystemTimerState; #define BCM2835_SYSTIMER(obj) \ OBJECT_CHECK(BCM2835SystemTimerState, (obj), TYPE_BCM2835_SYSTIMER) -typedef struct { +struct BCM2835SystemTimerState { /*< private >*/ SysBusDevice parent_obj; @@ -28,6 +30,6 @@ typedef struct { uint32_t status; uint32_t compare[4]; } reg; -} BCM2835SystemTimerState; +}; #endif diff --git a/include/hw/timer/cmsdk-apb-dualtimer.h b/include/hw/timer/cmsdk-apb-dualtimer.h index 9843a9dbb1..8a1137aec7 100644 --- a/include/hw/timer/cmsdk-apb-dualtimer.h +++ b/include/hw/timer/cmsdk-apb-dualtimer.h @@ -28,12 +28,13 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_CMSDK_APB_DUALTIMER "cmsdk-apb-dualtimer" +typedef struct CMSDKAPBDualTimer CMSDKAPBDualTimer; #define CMSDK_APB_DUALTIMER(obj) OBJECT_CHECK(CMSDKAPBDualTimer, (obj), \ TYPE_CMSDK_APB_DUALTIMER) -typedef struct CMSDKAPBDualTimer CMSDKAPBDualTimer; /* One of the two identical timer modules in the dual-timer module */ typedef struct CMSDKAPBDualTimerModule { diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-apb-timer.h index f24bda6a46..a7ca523529 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -15,12 +15,14 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_CMSDK_APB_TIMER "cmsdk-apb-timer" +typedef struct CMSDKAPBTIMER CMSDKAPBTIMER; #define CMSDK_APB_TIMER(obj) OBJECT_CHECK(CMSDKAPBTIMER, (obj), \ TYPE_CMSDK_APB_TIMER) -typedef struct { +struct CMSDKAPBTIMER { /*< private >*/ SysBusDevice parent_obj; @@ -34,7 +36,7 @@ typedef struct { uint32_t value; uint32_t reload; uint32_t intstatus; -} CMSDKAPBTIMER; +}; /** * cmsdk_apb_timer_create - convenience function to create TYPE_CMSDK_APB_TIMER diff --git a/include/hw/timer/digic-timer.h b/include/hw/timer/digic-timer.h index d9e67fe291..543bf8c6be 100644 --- a/include/hw/timer/digic-timer.h +++ b/include/hw/timer/digic-timer.h @@ -20,8 +20,10 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_DIGIC_TIMER "digic-timer" +typedef struct DigicTimerState DigicTimerState; #define DIGIC_TIMER(obj) OBJECT_CHECK(DigicTimerState, (obj), TYPE_DIGIC_TIMER) #define DIGIC_TIMER_CONTROL 0x00 @@ -30,7 +32,7 @@ #define DIGIC_TIMER_RELVALUE 0x08 #define DIGIC_TIMER_VALUE 0x0c -typedef struct DigicTimerState { +struct DigicTimerState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -40,6 +42,6 @@ typedef struct DigicTimerState { uint32_t control; uint32_t relvalue; -} DigicTimerState; +}; #endif /* HW_TIMER_DIGIC_TIMER_H */ diff --git a/include/hw/timer/i8254.h b/include/hw/timer/i8254.h index 206b8f8464..6adbc31e7e 100644 --- a/include/hw/timer/i8254.h +++ b/include/hw/timer/i8254.h @@ -28,6 +28,7 @@ #include "hw/qdev-properties.h" #include "hw/isa/isa.h" #include "qapi/error.h" +#include "qom/object.h" #define PIT_FREQ 1193182 diff --git a/include/hw/timer/imx_epit.h b/include/hw/timer/imx_epit.h index 0730ac35e6..1ca110caf5 100644 --- a/include/hw/timer/imx_epit.h +++ b/include/hw/timer/imx_epit.h @@ -32,6 +32,7 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" #include "hw/misc/imx_ccm.h" +#include "qom/object.h" /* * EPIT: Enhanced periodic interrupt timer @@ -55,9 +56,10 @@ #define EPIT_TIMER_MAX 0XFFFFFFFFUL #define TYPE_IMX_EPIT "imx.epit" +typedef struct IMXEPITState IMXEPITState; #define IMX_EPIT(obj) OBJECT_CHECK(IMXEPITState, (obj), TYPE_IMX_EPIT) -typedef struct IMXEPITState{ +struct IMXEPITState { /*< private >*/ SysBusDevice parent_obj; @@ -75,6 +77,6 @@ typedef struct IMXEPITState{ uint32_t freq; qemu_irq irq; -} IMXEPITState; +}; #endif /* IMX_EPIT_H */ diff --git a/include/hw/timer/imx_gpt.h b/include/hw/timer/imx_gpt.h index 20ccb327c4..b96633d8b2 100644 --- a/include/hw/timer/imx_gpt.h +++ b/include/hw/timer/imx_gpt.h @@ -32,6 +32,7 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" #include "hw/misc/imx_ccm.h" +#include "qom/object.h" /* * GPT : General purpose timer @@ -81,9 +82,10 @@ #define TYPE_IMX_GPT TYPE_IMX25_GPT +typedef struct IMXGPTState IMXGPTState; #define IMX_GPT(obj) OBJECT_CHECK(IMXGPTState, (obj), TYPE_IMX_GPT) -typedef struct IMXGPTState{ +struct IMXGPTState { /*< private >*/ SysBusDevice parent_obj; @@ -111,6 +113,6 @@ typedef struct IMXGPTState{ qemu_irq irq; const IMXClk *clocks; -} IMXGPTState; +}; #endif /* IMX_GPT_H */ diff --git a/include/hw/timer/mss-timer.h b/include/hw/timer/mss-timer.h index e5a784b27e..011c5f1ba9 100644 --- a/include/hw/timer/mss-timer.h +++ b/include/hw/timer/mss-timer.h @@ -27,8 +27,10 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_MSS_TIMER "mss-timer" +typedef struct MSSTimerState MSSTimerState; #define MSS_TIMER(obj) OBJECT_CHECK(MSSTimerState, \ (obj), TYPE_MSS_TIMER) @@ -52,12 +54,12 @@ struct Msf2Timer { qemu_irq irq; }; -typedef struct MSSTimerState { +struct MSSTimerState { SysBusDevice parent_obj; MemoryRegion mmio; uint32_t freq_hz; struct Msf2Timer timers[NUM_TIMERS]; -} MSSTimerState; +}; #endif /* HW_MSS_TIMER_H */ diff --git a/include/hw/timer/nrf51_timer.h b/include/hw/timer/nrf51_timer.h index eb6815f21d..b4eb29bd76 100644 --- a/include/hw/timer/nrf51_timer.h +++ b/include/hw/timer/nrf51_timer.h @@ -15,7 +15,9 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qom/object.h" #define TYPE_NRF51_TIMER "nrf51_soc.timer" +typedef struct NRF51TimerState NRF51TimerState; #define NRF51_TIMER(obj) OBJECT_CHECK(NRF51TimerState, (obj), TYPE_NRF51_TIMER) #define NRF51_TIMER_REG_COUNT 4 @@ -53,7 +55,7 @@ #define NRF51_TIMER_REG_CC0 0x540 #define NRF51_TIMER_REG_CC3 0x54C -typedef struct NRF51TimerState { +struct NRF51TimerState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -75,7 +77,7 @@ typedef struct NRF51TimerState { uint32_t bitmode; uint32_t prescaler; -} NRF51TimerState; +}; #endif diff --git a/include/hw/timer/renesas_cmt.h b/include/hw/timer/renesas_cmt.h index e28a15cb38..313f9e1965 100644 --- a/include/hw/timer/renesas_cmt.h +++ b/include/hw/timer/renesas_cmt.h @@ -11,8 +11,10 @@ #include "qemu/timer.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_RENESAS_CMT "renesas-cmt" +typedef struct RCMTState RCMTState; #define RCMT(obj) OBJECT_CHECK(RCMTState, (obj), TYPE_RENESAS_CMT) enum { @@ -20,7 +22,7 @@ enum { CMT_NR_IRQ = 1 * CMT_CH }; -typedef struct RCMTState { +struct RCMTState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -35,6 +37,6 @@ typedef struct RCMTState { int64_t tick[CMT_CH]; qemu_irq cmi[CMT_CH]; QEMUTimer timer[CMT_CH]; -} RCMTState; +}; #endif diff --git a/include/hw/timer/renesas_tmr.h b/include/hw/timer/renesas_tmr.h index cf3baa7a28..e2abcb13ad 100644 --- a/include/hw/timer/renesas_tmr.h +++ b/include/hw/timer/renesas_tmr.h @@ -11,8 +11,10 @@ #include "qemu/timer.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_RENESAS_TMR "renesas-tmr" +typedef struct RTMRState RTMRState; #define RTMR(obj) OBJECT_CHECK(RTMRState, (obj), TYPE_RENESAS_TMR) enum timer_event { @@ -28,7 +30,7 @@ enum { TMR_NR_IRQ = 3 * TMR_CH }; -typedef struct RTMRState { +struct RTMRState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -50,6 +52,6 @@ typedef struct RTMRState { qemu_irq cmib[TMR_CH]; qemu_irq ovi[TMR_CH]; QEMUTimer timer[TMR_CH]; -} RTMRState; +}; #endif diff --git a/include/hw/timer/stm32f2xx_timer.h b/include/hw/timer/stm32f2xx_timer.h index a96bc08b1b..9eb9201085 100644 --- a/include/hw/timer/stm32f2xx_timer.h +++ b/include/hw/timer/stm32f2xx_timer.h @@ -27,6 +27,7 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qom/object.h" #define TIM_CR1 0x00 #define TIM_CR2 0x04 @@ -61,10 +62,11 @@ #define TIM_DIER_UIE 1 #define TYPE_STM32F2XX_TIMER "stm32f2xx-timer" +typedef struct STM32F2XXTimerState STM32F2XXTimerState; #define STM32F2XXTIMER(obj) OBJECT_CHECK(STM32F2XXTimerState, \ (obj), TYPE_STM32F2XX_TIMER) -typedef struct STM32F2XXTimerState { +struct STM32F2XXTimerState { /* */ SysBusDevice parent_obj; @@ -95,6 +97,6 @@ typedef struct STM32F2XXTimerState { uint32_t tim_dcr; uint32_t tim_dmar; uint32_t tim_or; -} STM32F2XXTimerState; +}; #endif /* HW_STM32F2XX_TIMER_H */ diff --git a/include/hw/usb.h b/include/hw/usb.h index e29a37635b..e6ec0c891c 100644 --- a/include/hw/usb.h +++ b/include/hw/usb.h @@ -29,6 +29,7 @@ #include "hw/qdev-core.h" #include "qemu/iov.h" #include "qemu/queue.h" +#include "qom/object.h" /* Constants related to the USB / PCI interaction */ #define USB_SBRN 0x60 /* Serial Bus Release Number Register */ @@ -264,6 +265,7 @@ struct USBDevice { }; #define TYPE_USB_DEVICE "usb-device" +typedef struct USBDeviceClass USBDeviceClass; #define USB_DEVICE(obj) \ OBJECT_CHECK(USBDevice, (obj), TYPE_USB_DEVICE) #define USB_DEVICE_CLASS(klass) \ @@ -274,7 +276,7 @@ struct USBDevice { typedef void (*USBDeviceRealize)(USBDevice *dev, Error **errp); typedef void (*USBDeviceUnrealize)(USBDevice *dev); -typedef struct USBDeviceClass { +struct USBDeviceClass { DeviceClass parent_class; USBDeviceRealize realize; @@ -346,7 +348,7 @@ typedef struct USBDeviceClass { const char *product_desc; const USBDesc *usb_desc; bool attached_settable; -} USBDeviceClass; +}; typedef struct USBPortOps { void (*attach)(USBPort *port); diff --git a/include/hw/usb/chipidea.h b/include/hw/usb/chipidea.h index 1ec2e9dbda..1db449e1c4 100644 --- a/include/hw/usb/chipidea.h +++ b/include/hw/usb/chipidea.h @@ -2,13 +2,15 @@ #define CHIPIDEA_H #include "hw/usb/hcd-ehci.h" +#include "qom/object.h" -typedef struct ChipideaState { +struct ChipideaState { /*< private >*/ EHCISysBusState parent_obj; MemoryRegion iomem[3]; -} ChipideaState; +}; +typedef struct ChipideaState ChipideaState; #define TYPE_CHIPIDEA "usb-chipidea" #define CHIPIDEA(obj) OBJECT_CHECK(ChipideaState, (obj), TYPE_CHIPIDEA) diff --git a/include/hw/usb/imx-usb-phy.h b/include/hw/usb/imx-usb-phy.h index 07f0235d10..9861acb5ac 100644 --- a/include/hw/usb/imx-usb-phy.h +++ b/include/hw/usb/imx-usb-phy.h @@ -3,6 +3,7 @@ #include "hw/sysbus.h" #include "qemu/bitops.h" +#include "qom/object.h" enum IMXUsbPhyRegisters { USBPHY_PWD, @@ -38,9 +39,10 @@ enum IMXUsbPhyRegisters { #define USBPHY_CTRL_SFTRST BIT(31) #define TYPE_IMX_USBPHY "imx.usbphy" +typedef struct IMXUSBPHYState IMXUSBPHYState; #define IMX_USBPHY(obj) OBJECT_CHECK(IMXUSBPHYState, (obj), TYPE_IMX_USBPHY) -typedef struct IMXUSBPHYState { +struct IMXUSBPHYState { /* */ SysBusDevice parent_obj; @@ -48,6 +50,6 @@ typedef struct IMXUSBPHYState { MemoryRegion iomem; uint32_t usbphy[USBPHY_MAX]; -} IMXUSBPHYState; +}; #endif /* IMX_USB_PHY_H */ diff --git a/include/hw/vfio/vfio-amd-xgbe.h b/include/hw/vfio/vfio-amd-xgbe.h index 9fff65e99d..b860ac0446 100644 --- a/include/hw/vfio/vfio-amd-xgbe.h +++ b/include/hw/vfio/vfio-amd-xgbe.h @@ -15,6 +15,7 @@ #define HW_VFIO_VFIO_AMD_XGBE_H #include "hw/vfio/vfio-platform.h" +#include "qom/object.h" #define TYPE_VFIO_AMD_XGBE "vfio-amd-xgbe" diff --git a/include/hw/vfio/vfio-calxeda-xgmac.h b/include/hw/vfio/vfio-calxeda-xgmac.h index f994775c09..b19dc2160b 100644 --- a/include/hw/vfio/vfio-calxeda-xgmac.h +++ b/include/hw/vfio/vfio-calxeda-xgmac.h @@ -15,6 +15,7 @@ #define HW_VFIO_VFIO_CALXEDA_XGMAC_H #include "hw/vfio/vfio-platform.h" +#include "qom/object.h" #define TYPE_VFIO_CALXEDA_XGMAC "vfio-calxeda-xgmac" @@ -23,16 +24,18 @@ * - a single MMIO region corresponding to its register space * - 3 IRQS (main and 2 power related IRQs) */ -typedef struct VFIOCalxedaXgmacDevice { +struct VFIOCalxedaXgmacDevice { VFIOPlatformDevice vdev; -} VFIOCalxedaXgmacDevice; +}; +typedef struct VFIOCalxedaXgmacDevice VFIOCalxedaXgmacDevice; -typedef struct VFIOCalxedaXgmacDeviceClass { +struct VFIOCalxedaXgmacDeviceClass { /*< private >*/ VFIOPlatformDeviceClass parent_class; /*< public >*/ DeviceRealize parent_realize; -} VFIOCalxedaXgmacDeviceClass; +}; +typedef struct VFIOCalxedaXgmacDeviceClass VFIOCalxedaXgmacDeviceClass; #define VFIO_CALXEDA_XGMAC_DEVICE(obj) \ OBJECT_CHECK(VFIOCalxedaXgmacDevice, (obj), TYPE_VFIO_CALXEDA_XGMAC) diff --git a/include/hw/vfio/vfio-platform.h b/include/hw/vfio/vfio-platform.h index 4ec70c813a..248c23dba7 100644 --- a/include/hw/vfio/vfio-platform.h +++ b/include/hw/vfio/vfio-platform.h @@ -20,6 +20,7 @@ #include "hw/vfio/vfio-common.h" #include "qemu/event_notifier.h" #include "qemu/queue.h" +#include "qom/object.h" #define TYPE_VFIO_PLATFORM "vfio-platform" @@ -46,7 +47,7 @@ typedef struct VFIOINTp { /* function type for user side eventfd handler */ typedef void (*eventfd_user_side_handler_t)(VFIOINTp *intp); -typedef struct VFIOPlatformDevice { +struct VFIOPlatformDevice { SysBusDevice sbdev; VFIODevice vbasedev; /* not a QOM object */ VFIORegion **regions; @@ -59,13 +60,15 @@ typedef struct VFIOPlatformDevice { QEMUTimer *mmap_timer; /* allows fast-path resume after IRQ hit */ QemuMutex intp_mutex; /* protect the intp_list IRQ state */ bool irqfd_allowed; /* debug option to force irqfd on/off */ -} VFIOPlatformDevice; +}; +typedef struct VFIOPlatformDevice VFIOPlatformDevice; -typedef struct VFIOPlatformDeviceClass { +struct VFIOPlatformDeviceClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ -} VFIOPlatformDeviceClass; +}; +typedef struct VFIOPlatformDeviceClass VFIOPlatformDeviceClass; #define VFIO_PLATFORM_DEVICE(obj) \ OBJECT_CHECK(VFIOPlatformDevice, (obj), TYPE_VFIO_PLATFORM) diff --git a/include/hw/virtio/vhost-scsi-common.h b/include/hw/virtio/vhost-scsi-common.h index 16bf1a73c1..f198f25119 100644 --- a/include/hw/virtio/vhost-scsi-common.h +++ b/include/hw/virtio/vhost-scsi-common.h @@ -17,12 +17,14 @@ #include "hw/virtio/virtio-scsi.h" #include "hw/virtio/vhost.h" #include "hw/fw-path-provider.h" +#include "qom/object.h" #define TYPE_VHOST_SCSI_COMMON "vhost-scsi-common" +typedef struct VHostSCSICommon VHostSCSICommon; #define VHOST_SCSI_COMMON(obj) \ OBJECT_CHECK(VHostSCSICommon, (obj), TYPE_VHOST_SCSI_COMMON) -typedef struct VHostSCSICommon { +struct VHostSCSICommon { VirtIOSCSICommon parent_obj; Error *migration_blocker; @@ -35,7 +37,7 @@ typedef struct VHostSCSICommon { int lun; uint64_t host_features; bool migratable; -} VHostSCSICommon; +}; int vhost_scsi_common_start(VHostSCSICommon *vsc); void vhost_scsi_common_stop(VHostSCSICommon *vsc); diff --git a/include/hw/virtio/vhost-scsi.h b/include/hw/virtio/vhost-scsi.h index 23252153ff..72ae842646 100644 --- a/include/hw/virtio/vhost-scsi.h +++ b/include/hw/virtio/vhost-scsi.h @@ -17,6 +17,7 @@ #include "hw/virtio/virtio-scsi.h" #include "hw/virtio/vhost.h" #include "hw/virtio/vhost-scsi-common.h" +#include "qom/object.h" enum vhost_scsi_vq_list { VHOST_SCSI_VQ_CONTROL = 0, @@ -25,11 +26,12 @@ enum vhost_scsi_vq_list { }; #define TYPE_VHOST_SCSI "vhost-scsi" +typedef struct VHostSCSI VHostSCSI; #define VHOST_SCSI(obj) \ OBJECT_CHECK(VHostSCSI, (obj), TYPE_VHOST_SCSI) -typedef struct VHostSCSI { +struct VHostSCSI { VHostSCSICommon parent_obj; -} VHostSCSI; +}; #endif diff --git a/include/hw/virtio/vhost-user-blk.h b/include/hw/virtio/vhost-user-blk.h index 34ad6f0c0e..78b08f41da 100644 --- a/include/hw/virtio/vhost-user-blk.h +++ b/include/hw/virtio/vhost-user-blk.h @@ -20,12 +20,14 @@ #include "chardev/char-fe.h" #include "hw/virtio/vhost.h" #include "hw/virtio/vhost-user.h" +#include "qom/object.h" #define TYPE_VHOST_USER_BLK "vhost-user-blk" +typedef struct VHostUserBlk VHostUserBlk; #define VHOST_USER_BLK(obj) \ OBJECT_CHECK(VHostUserBlk, (obj), TYPE_VHOST_USER_BLK) -typedef struct VHostUserBlk { +struct VHostUserBlk { VirtIODevice parent_obj; CharBackend chardev; int32_t bootindex; @@ -39,6 +41,6 @@ typedef struct VHostUserBlk { struct vhost_virtqueue *vhost_vqs; VirtQueue **virtqs; bool connected; -} VHostUserBlk; +}; #endif diff --git a/include/hw/virtio/vhost-user-fs.h b/include/hw/virtio/vhost-user-fs.h index 6f3030d288..fa82be0e8a 100644 --- a/include/hw/virtio/vhost-user-fs.h +++ b/include/hw/virtio/vhost-user-fs.h @@ -18,8 +18,10 @@ #include "hw/virtio/vhost.h" #include "hw/virtio/vhost-user.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define TYPE_VHOST_USER_FS "vhost-user-fs-device" +typedef struct VHostUserFS VHostUserFS; #define VHOST_USER_FS(obj) \ OBJECT_CHECK(VHostUserFS, (obj), TYPE_VHOST_USER_FS) @@ -30,7 +32,7 @@ typedef struct { uint16_t queue_size; } VHostUserFSConf; -typedef struct { +struct VHostUserFS { /*< private >*/ VirtIODevice parent; VHostUserFSConf conf; @@ -41,6 +43,6 @@ typedef struct { VirtQueue *hiprio_vq; /*< public >*/ -} VHostUserFS; +}; #endif /* _QEMU_VHOST_USER_FS_H */ diff --git a/include/hw/virtio/vhost-user-scsi.h b/include/hw/virtio/vhost-user-scsi.h index 99ab2f2cc4..c4c4c29bf9 100644 --- a/include/hw/virtio/vhost-user-scsi.h +++ b/include/hw/virtio/vhost-user-scsi.h @@ -21,14 +21,16 @@ #include "hw/virtio/vhost.h" #include "hw/virtio/vhost-user.h" #include "hw/virtio/vhost-scsi-common.h" +#include "qom/object.h" #define TYPE_VHOST_USER_SCSI "vhost-user-scsi" +typedef struct VHostUserSCSI VHostUserSCSI; #define VHOST_USER_SCSI(obj) \ OBJECT_CHECK(VHostUserSCSI, (obj), TYPE_VHOST_USER_SCSI) -typedef struct VHostUserSCSI { +struct VHostUserSCSI { VHostSCSICommon parent_obj; VhostUserState vhost_user; -} VHostUserSCSI; +}; #endif /* VHOST_USER_SCSI_H */ diff --git a/include/hw/virtio/vhost-user-vsock.h b/include/hw/virtio/vhost-user-vsock.h index 4e128a4b9f..d7eda986b6 100644 --- a/include/hw/virtio/vhost-user-vsock.h +++ b/include/hw/virtio/vhost-user-vsock.h @@ -14,8 +14,10 @@ #include "hw/virtio/vhost-vsock-common.h" #include "hw/virtio/vhost-user.h" #include "standard-headers/linux/virtio_vsock.h" +#include "qom/object.h" #define TYPE_VHOST_USER_VSOCK "vhost-user-vsock-device" +typedef struct VHostUserVSock VHostUserVSock; #define VHOST_USER_VSOCK(obj) \ OBJECT_CHECK(VHostUserVSock, (obj), TYPE_VHOST_USER_VSOCK) @@ -23,7 +25,7 @@ typedef struct { CharBackend chardev; } VHostUserVSockConf; -typedef struct { +struct VHostUserVSock { /*< private >*/ VHostVSockCommon parent; VhostUserState vhost_user; @@ -31,6 +33,6 @@ typedef struct { struct virtio_vsock_config vsockcfg; /*< public >*/ -} VHostUserVSock; +}; #endif /* _QEMU_VHOST_USER_VSOCK_H */ diff --git a/include/hw/virtio/vhost-vsock-common.h b/include/hw/virtio/vhost-vsock-common.h index f8b4aaae00..a181396215 100644 --- a/include/hw/virtio/vhost-vsock-common.h +++ b/include/hw/virtio/vhost-vsock-common.h @@ -13,8 +13,10 @@ #include "hw/virtio/virtio.h" #include "hw/virtio/vhost.h" +#include "qom/object.h" #define TYPE_VHOST_VSOCK_COMMON "vhost-vsock-common" +typedef struct VHostVSockCommon VHostVSockCommon; #define VHOST_VSOCK_COMMON(obj) \ OBJECT_CHECK(VHostVSockCommon, (obj), TYPE_VHOST_VSOCK_COMMON) @@ -24,7 +26,7 @@ enum { VHOST_VSOCK_QUEUE_SIZE = 128, }; -typedef struct { +struct VHostVSockCommon { VirtIODevice parent; struct vhost_virtqueue vhost_vqs[2]; @@ -35,7 +37,7 @@ typedef struct { VirtQueue *trans_vq; QEMUTimer *post_load_timer; -} VHostVSockCommon; +}; int vhost_vsock_common_start(VirtIODevice *vdev); void vhost_vsock_common_stop(VirtIODevice *vdev); diff --git a/include/hw/virtio/vhost-vsock.h b/include/hw/virtio/vhost-vsock.h index 8cbb7b90f9..e13ff85d12 100644 --- a/include/hw/virtio/vhost-vsock.h +++ b/include/hw/virtio/vhost-vsock.h @@ -15,8 +15,10 @@ #define QEMU_VHOST_VSOCK_H #include "hw/virtio/vhost-vsock-common.h" +#include "qom/object.h" #define TYPE_VHOST_VSOCK "vhost-vsock-device" +typedef struct VHostVSock VHostVSock; #define VHOST_VSOCK(obj) \ OBJECT_CHECK(VHostVSock, (obj), TYPE_VHOST_VSOCK) @@ -25,12 +27,12 @@ typedef struct { char *vhostfd; } VHostVSockConf; -typedef struct { +struct VHostVSock { /*< private >*/ VHostVSockCommon parent; VHostVSockConf conf; /*< public >*/ -} VHostVSock; +}; #endif /* QEMU_VHOST_VSOCK_H */ diff --git a/include/hw/virtio/virtio-balloon.h b/include/hw/virtio/virtio-balloon.h index 28fd2b3960..a5b869a4d4 100644 --- a/include/hw/virtio/virtio-balloon.h +++ b/include/hw/virtio/virtio-balloon.h @@ -18,8 +18,10 @@ #include "standard-headers/linux/virtio_balloon.h" #include "hw/virtio/virtio.h" #include "sysemu/iothread.h" +#include "qom/object.h" #define TYPE_VIRTIO_BALLOON "virtio-balloon-device" +typedef struct VirtIOBalloon VirtIOBalloon; #define VIRTIO_BALLOON(obj) \ OBJECT_CHECK(VirtIOBalloon, (obj), TYPE_VIRTIO_BALLOON) @@ -40,7 +42,7 @@ enum virtio_balloon_free_page_hint_status { FREE_PAGE_HINT_S_DONE = 3, }; -typedef struct VirtIOBalloon { +struct VirtIOBalloon { VirtIODevice parent_obj; VirtQueue *ivq, *dvq, *svq, *free_page_vq, *reporting_vq; uint32_t free_page_hint_status; @@ -71,6 +73,6 @@ typedef struct VirtIOBalloon { bool qemu_4_0_config_size; uint32_t poison_val; -} VirtIOBalloon; +}; #endif diff --git a/include/hw/virtio/virtio-blk.h b/include/hw/virtio/virtio-blk.h index b1334c3904..b9fb689b92 100644 --- a/include/hw/virtio/virtio-blk.h +++ b/include/hw/virtio/virtio-blk.h @@ -19,8 +19,10 @@ #include "hw/block/block.h" #include "sysemu/iothread.h" #include "sysemu/block-backend.h" +#include "qom/object.h" #define TYPE_VIRTIO_BLK "virtio-blk-device" +typedef struct VirtIOBlock VirtIOBlock; #define VIRTIO_BLK(obj) \ OBJECT_CHECK(VirtIOBlock, (obj), TYPE_VIRTIO_BLK) @@ -47,7 +49,7 @@ struct VirtIOBlkConf struct VirtIOBlockDataPlane; struct VirtIOBlockReq; -typedef struct VirtIOBlock { +struct VirtIOBlock { VirtIODevice parent_obj; BlockBackend *blk; void *rq; @@ -61,7 +63,7 @@ typedef struct VirtIOBlock { struct VirtIOBlockDataPlane *dataplane; uint64_t host_features; size_t config_size; -} VirtIOBlock; +}; typedef struct VirtIOBlockReq { VirtQueueElement elem; diff --git a/include/hw/virtio/virtio-bus.h b/include/hw/virtio/virtio-bus.h index 0f6f215925..f3e9096370 100644 --- a/include/hw/virtio/virtio-bus.h +++ b/include/hw/virtio/virtio-bus.h @@ -27,17 +27,19 @@ #include "hw/qdev-core.h" #include "hw/virtio/virtio.h" +#include "qom/object.h" #define TYPE_VIRTIO_BUS "virtio-bus" +typedef struct VirtioBusClass VirtioBusClass; +typedef struct VirtioBusState VirtioBusState; #define VIRTIO_BUS_GET_CLASS(obj) \ OBJECT_GET_CLASS(VirtioBusClass, obj, TYPE_VIRTIO_BUS) #define VIRTIO_BUS_CLASS(klass) \ OBJECT_CLASS_CHECK(VirtioBusClass, klass, TYPE_VIRTIO_BUS) #define VIRTIO_BUS(obj) OBJECT_CHECK(VirtioBusState, (obj), TYPE_VIRTIO_BUS) -typedef struct VirtioBusState VirtioBusState; -typedef struct VirtioBusClass { +struct VirtioBusClass { /* This is what a VirtioBus must implement */ BusClass parent; void (*notify)(DeviceState *d, uint16_t vector); @@ -94,7 +96,7 @@ typedef struct VirtioBusClass { */ bool has_variable_vring_alignment; AddressSpace *(*get_dma_as)(DeviceState *d); -} VirtioBusClass; +}; struct VirtioBusState { BusState parent_obj; diff --git a/include/hw/virtio/virtio-crypto.h b/include/hw/virtio/virtio-crypto.h index ffe2391ece..4134e1b7ca 100644 --- a/include/hw/virtio/virtio-crypto.h +++ b/include/hw/virtio/virtio-crypto.h @@ -18,6 +18,7 @@ #include "hw/virtio/virtio.h" #include "sysemu/iothread.h" #include "sysemu/cryptodev.h" +#include "qom/object.h" #define DEBUG_VIRTIO_CRYPTO 0 @@ -31,6 +32,7 @@ do { \ #define TYPE_VIRTIO_CRYPTO "virtio-crypto-device" +typedef struct VirtIOCrypto VirtIOCrypto; #define VIRTIO_CRYPTO(obj) \ OBJECT_CHECK(VirtIOCrypto, (obj), TYPE_VIRTIO_CRYPTO) #define VIRTIO_CRYPTO_GET_PARENT_CLASS(obj) \ @@ -82,7 +84,7 @@ typedef struct VirtIOCryptoQueue { struct VirtIOCrypto *vcrypto; } VirtIOCryptoQueue; -typedef struct VirtIOCrypto { +struct VirtIOCrypto { VirtIODevice parent_obj; VirtQueue *ctrl_vq; @@ -97,6 +99,6 @@ typedef struct VirtIOCrypto { uint32_t curr_queues; size_t config_size; uint8_t vhost_started; -} VirtIOCrypto; +}; #endif /* QEMU_VIRTIO_CRYPTO_H */ diff --git a/include/hw/virtio/virtio-gpu-pci.h b/include/hw/virtio/virtio-gpu-pci.h index 2f69b5a9cc..d727c8cada 100644 --- a/include/hw/virtio/virtio-gpu-pci.h +++ b/include/hw/virtio/virtio-gpu-pci.h @@ -16,6 +16,7 @@ #include "hw/virtio/virtio-pci.h" #include "hw/virtio/virtio-gpu.h" +#include "qom/object.h" typedef struct VirtIOGPUPCIBase VirtIOGPUPCIBase; diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 7517438e10..f464004bc2 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -22,8 +22,11 @@ #include "sysemu/vhost-user-backend.h" #include "standard-headers/linux/virtio_gpu.h" +#include "qom/object.h" #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base" +typedef struct VirtIOGPUBase VirtIOGPUBase; +typedef struct VirtIOGPUBaseClass VirtIOGPUBaseClass; #define VIRTIO_GPU_BASE(obj) \ OBJECT_CHECK(VirtIOGPUBase, (obj), TYPE_VIRTIO_GPU_BASE) #define VIRTIO_GPU_BASE_GET_CLASS(obj) \ @@ -32,10 +35,12 @@ OBJECT_CLASS_CHECK(VirtIOGPUBaseClass, klass, TYPE_VIRTIO_GPU_BASE) #define TYPE_VIRTIO_GPU "virtio-gpu-device" +typedef struct VirtIOGPU VirtIOGPU; #define VIRTIO_GPU(obj) \ OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU) #define TYPE_VHOST_USER_GPU "vhost-user-gpu" +typedef struct VhostUserGPU VhostUserGPU; #define VHOST_USER_GPU(obj) \ OBJECT_CHECK(VhostUserGPU, (obj), TYPE_VHOST_USER_GPU) @@ -100,7 +105,7 @@ struct virtio_gpu_ctrl_command { QTAILQ_ENTRY(virtio_gpu_ctrl_command) next; }; -typedef struct VirtIOGPUBase { +struct VirtIOGPUBase { VirtIODevice parent_obj; Error *migration_blocker; @@ -116,13 +121,13 @@ typedef struct VirtIOGPUBase { int enabled_output_bitmask; struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS]; -} VirtIOGPUBase; +}; -typedef struct VirtIOGPUBaseClass { +struct VirtIOGPUBaseClass { VirtioDeviceClass parent; void (*gl_unblock)(VirtIOGPUBase *g); -} VirtIOGPUBaseClass; +}; #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \ DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \ @@ -131,7 +136,7 @@ typedef struct VirtIOGPUBaseClass { DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \ DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768) -typedef struct VirtIOGPU { +struct VirtIOGPU { VirtIOGPUBase parent_obj; uint64_t conf_max_hostmem; @@ -160,9 +165,9 @@ typedef struct VirtIOGPU { uint32_t req_3d; uint32_t bytes_3d; } stats; -} VirtIOGPU; +}; -typedef struct VhostUserGPU { +struct VhostUserGPU { VirtIOGPUBase parent_obj; VhostUserBackend *vhost; @@ -170,7 +175,7 @@ typedef struct VhostUserGPU { CharBackend vhost_chr; QemuDmaBuf dmabuf[VIRTIO_GPU_MAX_SCANOUTS]; bool backend_blocked; -} VhostUserGPU; +}; extern const GraphicHwOps virtio_gpu_ops; diff --git a/include/hw/virtio/virtio-input.h b/include/hw/virtio/virtio-input.h index 4fca03e796..c15e983d36 100644 --- a/include/hw/virtio/virtio-input.h +++ b/include/hw/virtio/virtio-input.h @@ -9,6 +9,7 @@ #include "standard-headers/linux/virtio_ids.h" #include "standard-headers/linux/virtio_input.h" +#include "qom/object.h" typedef struct virtio_input_absinfo virtio_input_absinfo; typedef struct virtio_input_config virtio_input_config; @@ -18,6 +19,8 @@ typedef struct virtio_input_event virtio_input_event; /* qemu internals */ #define TYPE_VIRTIO_INPUT "virtio-input-device" +typedef struct VirtIOInput VirtIOInput; +typedef struct VirtIOInputClass VirtIOInputClass; #define VIRTIO_INPUT(obj) \ OBJECT_CHECK(VirtIOInput, (obj), TYPE_VIRTIO_INPUT) #define VIRTIO_INPUT_GET_PARENT_CLASS(obj) \ @@ -32,29 +35,27 @@ typedef struct virtio_input_event virtio_input_event; #define TYPE_VIRTIO_MOUSE "virtio-mouse-device" #define TYPE_VIRTIO_TABLET "virtio-tablet-device" +typedef struct VirtIOInputHID VirtIOInputHID; #define VIRTIO_INPUT_HID(obj) \ OBJECT_CHECK(VirtIOInputHID, (obj), TYPE_VIRTIO_INPUT_HID) #define VIRTIO_INPUT_HID_GET_PARENT_CLASS(obj) \ OBJECT_GET_PARENT_CLASS(obj, TYPE_VIRTIO_INPUT_HID) #define TYPE_VIRTIO_INPUT_HOST "virtio-input-host-device" +typedef struct VirtIOInputHost VirtIOInputHost; #define VIRTIO_INPUT_HOST(obj) \ OBJECT_CHECK(VirtIOInputHost, (obj), TYPE_VIRTIO_INPUT_HOST) #define VIRTIO_INPUT_HOST_GET_PARENT_CLASS(obj) \ OBJECT_GET_PARENT_CLASS(obj, TYPE_VIRTIO_INPUT_HOST) #define TYPE_VHOST_USER_INPUT "vhost-user-input" +typedef struct VHostUserInput VHostUserInput; #define VHOST_USER_INPUT(obj) \ OBJECT_CHECK(VHostUserInput, (obj), TYPE_VHOST_USER_INPUT) #define VHOST_USER_INPUT_GET_PARENT_CLASS(obj) \ OBJECT_GET_PARENT_CLASS(obj, TYPE_VHOST_USER_INPUT) -typedef struct VirtIOInput VirtIOInput; -typedef struct VirtIOInputClass VirtIOInputClass; typedef struct VirtIOInputConfig VirtIOInputConfig; -typedef struct VirtIOInputHID VirtIOInputHID; -typedef struct VirtIOInputHost VirtIOInputHost; -typedef struct VHostUserInput VHostUserInput; struct VirtIOInputConfig { virtio_input_config config; diff --git a/include/hw/virtio/virtio-iommu.h b/include/hw/virtio/virtio-iommu.h index 49eb105cd8..d852980b30 100644 --- a/include/hw/virtio/virtio-iommu.h +++ b/include/hw/virtio/virtio-iommu.h @@ -23,9 +23,11 @@ #include "standard-headers/linux/virtio_iommu.h" #include "hw/virtio/virtio.h" #include "hw/pci/pci.h" +#include "qom/object.h" #define TYPE_VIRTIO_IOMMU "virtio-iommu-device" #define TYPE_VIRTIO_IOMMU_PCI "virtio-iommu-device-base" +typedef struct VirtIOIOMMU VirtIOIOMMU; #define VIRTIO_IOMMU(obj) \ OBJECT_CHECK(VirtIOIOMMU, (obj), TYPE_VIRTIO_IOMMU) @@ -44,7 +46,7 @@ typedef struct IOMMUPciBus { IOMMUDevice *pbdev[]; /* Parent array is sparse, so dynamically alloc */ } IOMMUPciBus; -typedef struct VirtIOIOMMU { +struct VirtIOIOMMU { VirtIODevice parent_obj; VirtQueue *req_vq; VirtQueue *event_vq; @@ -58,6 +60,6 @@ typedef struct VirtIOIOMMU { GTree *domains; QemuMutex mutex; GTree *endpoints; -} VirtIOIOMMU; +}; #endif diff --git a/include/hw/virtio/virtio-mem.h b/include/hw/virtio/virtio-mem.h index 0778224964..08e37d8e84 100644 --- a/include/hw/virtio/virtio-mem.h +++ b/include/hw/virtio/virtio-mem.h @@ -17,9 +17,12 @@ #include "hw/virtio/virtio.h" #include "qapi/qapi-types-misc.h" #include "sysemu/hostmem.h" +#include "qom/object.h" #define TYPE_VIRTIO_MEM "virtio-mem" +typedef struct VirtIOMEM VirtIOMEM; +typedef struct VirtIOMEMClass VirtIOMEMClass; #define VIRTIO_MEM(obj) \ OBJECT_CHECK(VirtIOMEM, (obj), TYPE_VIRTIO_MEM) #define VIRTIO_MEM_CLASS(oc) \ @@ -34,7 +37,7 @@ #define VIRTIO_MEM_BLOCK_SIZE_PROP "block-size" #define VIRTIO_MEM_ADDR_PROP "memaddr" -typedef struct VirtIOMEM { +struct VirtIOMEM { VirtIODevice parent_obj; /* guest -> host request queue */ @@ -70,9 +73,9 @@ typedef struct VirtIOMEM { /* don't migrate unplugged memory */ NotifierWithReturn precopy_notifier; -} VirtIOMEM; +}; -typedef struct VirtIOMEMClass { +struct VirtIOMEMClass { /* private */ VirtIODevice parent; @@ -81,6 +84,6 @@ typedef struct VirtIOMEMClass { MemoryRegion *(*get_memory_region)(VirtIOMEM *vmem, Error **errp); void (*add_size_change_notifier)(VirtIOMEM *vmem, Notifier *notifier); void (*remove_size_change_notifier)(VirtIOMEM *vmem, Notifier *notifier); -} VirtIOMEMClass; +}; #endif diff --git a/include/hw/virtio/virtio-mmio.h b/include/hw/virtio/virtio-mmio.h index 7dbfd03dcf..947fb02d3e 100644 --- a/include/hw/virtio/virtio-mmio.h +++ b/include/hw/virtio/virtio-mmio.h @@ -23,6 +23,7 @@ #define HW_VIRTIO_MMIO_H #include "hw/virtio/virtio-bus.h" +#include "qom/object.h" /* QOM macros */ /* virtio-mmio-bus */ @@ -36,6 +37,7 @@ /* virtio-mmio */ #define TYPE_VIRTIO_MMIO "virtio-mmio" +typedef struct VirtIOMMIOProxy VirtIOMMIOProxy; #define VIRTIO_MMIO(obj) \ OBJECT_CHECK(VirtIOMMIOProxy, (obj), TYPE_VIRTIO_MMIO) @@ -52,7 +54,7 @@ typedef struct VirtIOMMIOQueue { uint32_t used[2]; } VirtIOMMIOQueue; -typedef struct { +struct VirtIOMMIOProxy { /* Generic */ SysBusDevice parent_obj; MemoryRegion iomem; @@ -68,6 +70,6 @@ typedef struct { /* Fields only used for non-legacy (v2) devices */ uint32_t guest_features[2]; VirtIOMMIOQueue vqs[VIRTIO_QUEUE_MAX]; -} VirtIOMMIOProxy; +}; #endif diff --git a/include/hw/virtio/virtio-net.h b/include/hw/virtio/virtio-net.h index a45ef8278e..2e81b5bfcb 100644 --- a/include/hw/virtio/virtio-net.h +++ b/include/hw/virtio/virtio-net.h @@ -19,8 +19,10 @@ #include "hw/virtio/virtio.h" #include "net/announce.h" #include "qemu/option_int.h" +#include "qom/object.h" #define TYPE_VIRTIO_NET "virtio-net-device" +typedef struct VirtIONet VirtIONet; #define VIRTIO_NET(obj) \ OBJECT_CHECK(VirtIONet, (obj), TYPE_VIRTIO_NET) @@ -109,7 +111,6 @@ typedef struct VirtioNetRscSeg { NetClientState *nc; } VirtioNetRscSeg; -typedef struct VirtIONet VirtIONet; /* Chain is divided by protocol(ipv4/v6) and NetClientInfo */ typedef struct VirtioNetRscChain { diff --git a/include/hw/virtio/virtio-pmem.h b/include/hw/virtio/virtio-pmem.h index 33f1999320..56bce2be7a 100644 --- a/include/hw/virtio/virtio-pmem.h +++ b/include/hw/virtio/virtio-pmem.h @@ -16,9 +16,12 @@ #include "hw/virtio/virtio.h" #include "qapi/qapi-types-misc.h" +#include "qom/object.h" #define TYPE_VIRTIO_PMEM "virtio-pmem" +typedef struct VirtIOPMEM VirtIOPMEM; +typedef struct VirtIOPMEMClass VirtIOPMEMClass; #define VIRTIO_PMEM(obj) \ OBJECT_CHECK(VirtIOPMEM, (obj), TYPE_VIRTIO_PMEM) #define VIRTIO_PMEM_CLASS(oc) \ @@ -29,21 +32,21 @@ #define VIRTIO_PMEM_ADDR_PROP "memaddr" #define VIRTIO_PMEM_MEMDEV_PROP "memdev" -typedef struct VirtIOPMEM { +struct VirtIOPMEM { VirtIODevice parent_obj; VirtQueue *rq_vq; uint64_t start; HostMemoryBackend *memdev; -} VirtIOPMEM; +}; -typedef struct VirtIOPMEMClass { +struct VirtIOPMEMClass { /* private */ VirtIODevice parent; /* public */ void (*fill_device_info)(const VirtIOPMEM *pmem, VirtioPMEMDeviceInfo *vi); MemoryRegion *(*get_memory_region)(VirtIOPMEM *pmem, Error **errp); -} VirtIOPMEMClass; +}; #endif diff --git a/include/hw/virtio/virtio-rng.h b/include/hw/virtio/virtio-rng.h index bd05d734b8..34fb5f695f 100644 --- a/include/hw/virtio/virtio-rng.h +++ b/include/hw/virtio/virtio-rng.h @@ -15,8 +15,10 @@ #include "hw/virtio/virtio.h" #include "sysemu/rng.h" #include "standard-headers/linux/virtio_rng.h" +#include "qom/object.h" #define TYPE_VIRTIO_RNG "virtio-rng-device" +typedef struct VirtIORNG VirtIORNG; #define VIRTIO_RNG(obj) \ OBJECT_CHECK(VirtIORNG, (obj), TYPE_VIRTIO_RNG) #define VIRTIO_RNG_GET_PARENT_CLASS(obj) \ @@ -28,7 +30,7 @@ struct VirtIORNGConf { uint32_t period_ms; }; -typedef struct VirtIORNG { +struct VirtIORNG { VirtIODevice parent_obj; /* Only one vq - guest puts buffer(s) on it when it needs entropy */ @@ -46,6 +48,6 @@ typedef struct VirtIORNG { bool activate_timer; VMChangeStateEntry *vmstate; -} VirtIORNG; +}; #endif diff --git a/include/hw/virtio/virtio-scsi.h b/include/hw/virtio/virtio-scsi.h index 24e768909d..911ccabb23 100644 --- a/include/hw/virtio/virtio-scsi.h +++ b/include/hw/virtio/virtio-scsi.h @@ -13,6 +13,7 @@ #ifndef QEMU_VIRTIO_SCSI_H #define QEMU_VIRTIO_SCSI_H +#include "qom/object.h" /* Override CDB/sense data size: they are dynamic (guest controlled) in QEMU */ #define VIRTIO_SCSI_CDB_SIZE 0 @@ -25,10 +26,12 @@ #include "sysemu/iothread.h" #define TYPE_VIRTIO_SCSI_COMMON "virtio-scsi-common" +typedef struct VirtIOSCSICommon VirtIOSCSICommon; #define VIRTIO_SCSI_COMMON(obj) \ OBJECT_CHECK(VirtIOSCSICommon, (obj), TYPE_VIRTIO_SCSI_COMMON) #define TYPE_VIRTIO_SCSI "virtio-scsi-device" +typedef struct VirtIOSCSI VirtIOSCSI; #define VIRTIO_SCSI(obj) \ OBJECT_CHECK(VirtIOSCSI, (obj), TYPE_VIRTIO_SCSI) @@ -62,7 +65,7 @@ struct VirtIOSCSIConf { struct VirtIOSCSI; -typedef struct VirtIOSCSICommon { +struct VirtIOSCSICommon { VirtIODevice parent_obj; VirtIOSCSIConf conf; @@ -71,9 +74,9 @@ typedef struct VirtIOSCSICommon { VirtQueue *ctrl_vq; VirtQueue *event_vq; VirtQueue **cmd_vqs; -} VirtIOSCSICommon; +}; -typedef struct VirtIOSCSI { +struct VirtIOSCSI { VirtIOSCSICommon parent_obj; SCSIBus bus; @@ -88,7 +91,7 @@ typedef struct VirtIOSCSI { bool dataplane_stopping; bool dataplane_fenced; uint32_t host_features; -} VirtIOSCSI; +}; typedef struct VirtIOSCSIReq { /* Note: diff --git a/include/hw/virtio/virtio-serial.h b/include/hw/virtio/virtio-serial.h index 448615a6b3..94da09ec34 100644 --- a/include/hw/virtio/virtio-serial.h +++ b/include/hw/virtio/virtio-serial.h @@ -18,6 +18,7 @@ #include "standard-headers/linux/virtio_console.h" #include "hw/virtio/virtio.h" +#include "qom/object.h" struct virtio_serial_conf { /* Max. number of ports we can have for a virtio-serial device */ @@ -25,6 +26,8 @@ struct virtio_serial_conf { }; #define TYPE_VIRTIO_SERIAL_PORT "virtio-serial-port" +typedef struct VirtIOSerialPort VirtIOSerialPort; +typedef struct VirtIOSerialPortClass VirtIOSerialPortClass; #define VIRTIO_SERIAL_PORT(obj) \ OBJECT_CHECK(VirtIOSerialPort, (obj), TYPE_VIRTIO_SERIAL_PORT) #define VIRTIO_SERIAL_PORT_CLASS(klass) \ @@ -39,9 +42,8 @@ typedef struct VirtIOSerialBus VirtIOSerialBus; #define VIRTIO_SERIAL_BUS(obj) \ OBJECT_CHECK(VirtIOSerialBus, (obj), TYPE_VIRTIO_SERIAL_BUS) -typedef struct VirtIOSerialPort VirtIOSerialPort; -typedef struct VirtIOSerialPortClass { +struct VirtIOSerialPortClass { DeviceClass parent_class; /* Is this a device that binds with hvc in the guest? */ @@ -86,7 +88,7 @@ typedef struct VirtIOSerialPortClass { */ ssize_t (*have_data)(VirtIOSerialPort *port, const uint8_t *buf, ssize_t len); -} VirtIOSerialPortClass; +}; /* * This is the state that's shared between all the ports. Some of the diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h index e424df12cf..261d087de8 100644 --- a/include/hw/virtio/virtio.h +++ b/include/hw/virtio/virtio.h @@ -21,6 +21,7 @@ #include "qemu/event_notifier.h" #include "standard-headers/linux/virtio_config.h" #include "standard-headers/linux/virtio_ring.h" +#include "qom/object.h" /* A guest should never accept this. It implies negotiation is broken. */ #define VIRTIO_F_BAD_FEATURE 30 @@ -67,6 +68,7 @@ typedef struct VirtQueueElement #define VIRTIO_NO_VECTOR 0xffff #define TYPE_VIRTIO_DEVICE "virtio-device" +typedef struct VirtioDeviceClass VirtioDeviceClass; #define VIRTIO_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(VirtioDeviceClass, obj, TYPE_VIRTIO_DEVICE) #define VIRTIO_DEVICE_CLASS(klass) \ @@ -113,7 +115,7 @@ struct VirtIODevice QLIST_HEAD(, VirtQueue) *vector_queues; }; -typedef struct VirtioDeviceClass { +struct VirtioDeviceClass { /*< private >*/ DeviceClass parent; /*< public >*/ @@ -163,7 +165,7 @@ typedef struct VirtioDeviceClass { int (*post_load)(VirtIODevice *vdev); const VMStateDescription *vmsd; bool (*primary_unplug_pending)(void *opaque); -} VirtioDeviceClass; +}; void virtio_instance_init_common(Object *proxy_obj, void *data, size_t vdev_size, const char *vdev_name); diff --git a/include/hw/vmstate-if.h b/include/hw/vmstate-if.h index 8ff7f0f292..eabf5b05ad 100644 --- a/include/hw/vmstate-if.h +++ b/include/hw/vmstate-if.h @@ -13,6 +13,7 @@ #define TYPE_VMSTATE_IF "vmstate-if" +typedef struct VMStateIfClass VMStateIfClass; #define VMSTATE_IF_CLASS(klass) \ OBJECT_CLASS_CHECK(VMStateIfClass, (klass), TYPE_VMSTATE_IF) #define VMSTATE_IF_GET_CLASS(obj) \ @@ -22,11 +23,11 @@ typedef struct VMStateIf VMStateIf; -typedef struct VMStateIfClass { +struct VMStateIfClass { InterfaceClass parent_class; char * (*get_id)(VMStateIf *obj); -} VMStateIfClass; +}; static inline char *vmstate_if_get_id(VMStateIf *vmif) { diff --git a/include/hw/watchdog/cmsdk-apb-watchdog.h b/include/hw/watchdog/cmsdk-apb-watchdog.h index 6ae9531370..be2983eefa 100644 --- a/include/hw/watchdog/cmsdk-apb-watchdog.h +++ b/include/hw/watchdog/cmsdk-apb-watchdog.h @@ -33,8 +33,10 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_CMSDK_APB_WATCHDOG "cmsdk-apb-watchdog" +typedef struct CMSDKAPBWatchdog CMSDKAPBWatchdog; #define CMSDK_APB_WATCHDOG(obj) OBJECT_CHECK(CMSDKAPBWatchdog, (obj), \ TYPE_CMSDK_APB_WATCHDOG) @@ -44,7 +46,7 @@ */ #define TYPE_LUMINARY_WATCHDOG "luminary-watchdog" -typedef struct CMSDKAPBWatchdog { +struct CMSDKAPBWatchdog { /*< private >*/ SysBusDevice parent_obj; @@ -62,6 +64,6 @@ typedef struct CMSDKAPBWatchdog { uint32_t itop; uint32_t resetstatus; const uint32_t *id; -} CMSDKAPBWatchdog; +}; #endif diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h index 819c22993a..ba9a0a1fd8 100644 --- a/include/hw/watchdog/wdt_aspeed.h +++ b/include/hw/watchdog/wdt_aspeed.h @@ -12,8 +12,11 @@ #include "hw/misc/aspeed_scu.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_WDT "aspeed.wdt" +typedef struct AspeedWDTClass AspeedWDTClass; +typedef struct AspeedWDTState AspeedWDTState; #define ASPEED_WDT(obj) \ OBJECT_CHECK(AspeedWDTState, (obj), TYPE_ASPEED_WDT) #define TYPE_ASPEED_2400_WDT TYPE_ASPEED_WDT "-ast2400" @@ -22,7 +25,7 @@ #define ASPEED_WDT_REGS_MAX (0x20 / 4) -typedef struct AspeedWDTState { +struct AspeedWDTState { /*< private >*/ SysBusDevice parent_obj; QEMUTimer *timer; @@ -33,14 +36,14 @@ typedef struct AspeedWDTState { AspeedSCUState *scu; uint32_t pclk_freq; -} AspeedWDTState; +}; #define ASPEED_WDT_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedWDTClass, (klass), TYPE_ASPEED_WDT) #define ASPEED_WDT_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedWDTClass, (obj), TYPE_ASPEED_WDT) -typedef struct AspeedWDTClass { +struct AspeedWDTClass { SysBusDeviceClass parent_class; uint32_t offset; @@ -48,6 +51,6 @@ typedef struct AspeedWDTClass { uint32_t reset_ctrl_reg; void (*reset_pulse)(AspeedWDTState *s, uint32_t property); void (*wdt_reload)(AspeedWDTState *s); -} AspeedWDTClass; +}; #endif /* WDT_ASPEED_H */ diff --git a/include/hw/watchdog/wdt_diag288.h b/include/hw/watchdog/wdt_diag288.h index 19d83a0937..e611163821 100644 --- a/include/hw/watchdog/wdt_diag288.h +++ b/include/hw/watchdog/wdt_diag288.h @@ -2,8 +2,11 @@ #define WDT_DIAG288_H #include "hw/qdev-core.h" +#include "qom/object.h" #define TYPE_WDT_DIAG288 "diag288" +typedef struct DIAG288Class DIAG288Class; +typedef struct DIAG288State DIAG288State; #define DIAG288(obj) \ OBJECT_CHECK(DIAG288State, (obj), TYPE_WDT_DIAG288) #define DIAG288_CLASS(klass) \ @@ -15,22 +18,22 @@ #define WDT_DIAG288_CHANGE 1 #define WDT_DIAG288_CANCEL 2 -typedef struct DIAG288State { +struct DIAG288State { /*< private >*/ DeviceState parent_obj; QEMUTimer *timer; bool enabled; /*< public >*/ -} DIAG288State; +}; -typedef struct DIAG288Class { +struct DIAG288Class { /*< private >*/ DeviceClass parent_class; /*< public >*/ int (*handle_timer)(DIAG288State *dev, uint64_t func, uint64_t timeout); -} DIAG288Class; +}; #endif /* WDT_DIAG288_H */ diff --git a/include/hw/watchdog/wdt_imx2.h b/include/hw/watchdog/wdt_imx2.h index f9af6be4b6..8757418b46 100644 --- a/include/hw/watchdog/wdt_imx2.h +++ b/include/hw/watchdog/wdt_imx2.h @@ -16,8 +16,10 @@ #include "hw/sysbus.h" #include "hw/irq.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_IMX2_WDT "imx2.wdt" +typedef struct IMX2WdtState IMX2WdtState; #define IMX2_WDT(obj) OBJECT_CHECK(IMX2WdtState, (obj), TYPE_IMX2_WDT) enum IMX2WdtRegisters { @@ -62,7 +64,7 @@ enum IMX2WdtRegisters { /* Misc Control Register definitions */ #define IMX2_WDT_WMCR_PDE BIT(0) /* Power-Down Enable */ -typedef struct IMX2WdtState { +struct IMX2WdtState { /* */ SysBusDevice parent_obj; @@ -85,6 +87,6 @@ typedef struct IMX2WdtState { bool wcr_locked; /* affects WDZST, WDBG, and WDW */ bool wcr_wde_locked; /* affects WDE */ bool wcr_wdt_locked; /* affects WDT (never cleared) */ -} IMX2WdtState; +}; #endif /* IMX2_WDT_H */ diff --git a/include/hw/xen/xen-block.h b/include/hw/xen/xen-block.h index 2cd2fc2701..54f2e35122 100644 --- a/include/hw/xen/xen-block.h +++ b/include/hw/xen/xen-block.h @@ -12,6 +12,7 @@ #include "hw/block/block.h" #include "hw/block/dataplane/xen-block.h" #include "sysemu/iothread.h" +#include "qom/object.h" typedef enum XenBlockVdevType { XEN_BLOCK_VDEV_TYPE_INVALID, @@ -46,7 +47,7 @@ typedef struct XenBlockIOThread { char *id; } XenBlockIOThread; -typedef struct XenBlockDevice { +struct XenBlockDevice { XenDevice xendev; XenBlockProperties props; const char *device_type; @@ -54,18 +55,20 @@ typedef struct XenBlockDevice { XenBlockDataPlane *dataplane; XenBlockDrive *drive; XenBlockIOThread *iothread; -} XenBlockDevice; +}; +typedef struct XenBlockDevice XenBlockDevice; typedef void (*XenBlockDeviceRealize)(XenBlockDevice *blockdev, Error **errp); typedef void (*XenBlockDeviceUnrealize)(XenBlockDevice *blockdev); -typedef struct XenBlockDeviceClass { +struct XenBlockDeviceClass { /*< private >*/ XenDeviceClass parent_class; /*< public >*/ XenBlockDeviceRealize realize; XenBlockDeviceUnrealize unrealize; -} XenBlockDeviceClass; +}; +typedef struct XenBlockDeviceClass XenBlockDeviceClass; #define TYPE_XEN_BLOCK_DEVICE "xen-block" #define XEN_BLOCK_DEVICE(obj) \ @@ -75,17 +78,19 @@ typedef struct XenBlockDeviceClass { #define XEN_BLOCK_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(XenBlockDeviceClass, (obj), TYPE_XEN_BLOCK_DEVICE) -typedef struct XenDiskDevice { +struct XenDiskDevice { XenBlockDevice blockdev; -} XenDiskDevice; +}; +typedef struct XenDiskDevice XenDiskDevice; #define TYPE_XEN_DISK_DEVICE "xen-disk" #define XEN_DISK_DEVICE(obj) \ OBJECT_CHECK(XenDiskDevice, (obj), TYPE_XEN_DISK_DEVICE) -typedef struct XenCDRomDevice { +struct XenCDRomDevice { XenBlockDevice blockdev; -} XenCDRomDevice; +}; +typedef struct XenCDRomDevice XenCDRomDevice; #define TYPE_XEN_CDROM_DEVICE "xen-cdrom" #define XEN_CDROM_DEVICE(obj) \ diff --git a/include/hw/xen/xen-bus.h b/include/hw/xen/xen-bus.h index 4ec0bb072f..910cf49161 100644 --- a/include/hw/xen/xen-bus.h +++ b/include/hw/xen/xen-bus.h @@ -11,6 +11,7 @@ #include "hw/xen/xen_common.h" #include "hw/sysbus.h" #include "qemu/notify.h" +#include "qom/object.h" typedef void (*XenWatchHandler)(void *opaque); @@ -18,7 +19,7 @@ typedef struct XenWatchList XenWatchList; typedef struct XenWatch XenWatch; typedef struct XenEventChannel XenEventChannel; -typedef struct XenDevice { +struct XenDevice { DeviceState qdev; domid_t frontend_id; char *name; @@ -35,7 +36,8 @@ typedef struct XenDevice { bool inactive; QLIST_HEAD(, XenEventChannel) event_channels; QLIST_ENTRY(XenDevice) list; -} XenDevice; +}; +typedef struct XenDevice XenDevice; typedef char *(*XenDeviceGetName)(XenDevice *xendev, Error **errp); typedef void (*XenDeviceRealize)(XenDevice *xendev, Error **errp); @@ -44,7 +46,7 @@ typedef void (*XenDeviceFrontendChanged)(XenDevice *xendev, Error **errp); typedef void (*XenDeviceUnrealize)(XenDevice *xendev); -typedef struct XenDeviceClass { +struct XenDeviceClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -54,7 +56,8 @@ typedef struct XenDeviceClass { XenDeviceRealize realize; XenDeviceFrontendChanged frontend_changed; XenDeviceUnrealize unrealize; -} XenDeviceClass; +}; +typedef struct XenDeviceClass XenDeviceClass; #define TYPE_XEN_DEVICE "xen-device" #define XEN_DEVICE(obj) \ @@ -64,19 +67,21 @@ typedef struct XenDeviceClass { #define XEN_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(XenDeviceClass, (obj), TYPE_XEN_DEVICE) -typedef struct XenBus { +struct XenBus { BusState qbus; domid_t backend_id; struct xs_handle *xsh; XenWatchList *watch_list; XenWatch *backend_watch; QLIST_HEAD(, XenDevice) inactive_devices; -} XenBus; +}; +typedef struct XenBus XenBus; -typedef struct XenBusClass { +struct XenBusClass { /*< private >*/ BusClass parent_class; -} XenBusClass; +}; +typedef struct XenBusClass XenBusClass; #define TYPE_XEN_BUS "xen-bus" #define XEN_BUS(obj) \ diff --git a/include/hw/xen/xen-legacy-backend.h b/include/hw/xen/xen-legacy-backend.h index 704bc7852b..89b51e05fc 100644 --- a/include/hw/xen/xen-legacy-backend.h +++ b/include/hw/xen/xen-legacy-backend.h @@ -4,6 +4,7 @@ #include "hw/xen/xen_common.h" #include "hw/xen/xen_pvdev.h" #include "net/net.h" +#include "qom/object.h" #define TYPE_XENSYSDEV "xen-sysdev" #define TYPE_XENSYSBUS "xen-sysbus" diff --git a/include/io/channel-buffer.h b/include/io/channel-buffer.h index 3f4b3f29e1..344d5957fd 100644 --- a/include/io/channel-buffer.h +++ b/include/io/channel-buffer.h @@ -22,12 +22,13 @@ #define QIO_CHANNEL_BUFFER_H #include "io/channel.h" +#include "qom/object.h" #define TYPE_QIO_CHANNEL_BUFFER "qio-channel-buffer" +typedef struct QIOChannelBuffer QIOChannelBuffer; #define QIO_CHANNEL_BUFFER(obj) \ OBJECT_CHECK(QIOChannelBuffer, (obj), TYPE_QIO_CHANNEL_BUFFER) -typedef struct QIOChannelBuffer QIOChannelBuffer; /** * QIOChannelBuffer: diff --git a/include/io/channel-command.h b/include/io/channel-command.h index 336d47fa5c..b1671062d0 100644 --- a/include/io/channel-command.h +++ b/include/io/channel-command.h @@ -22,12 +22,13 @@ #define QIO_CHANNEL_COMMAND_H #include "io/channel.h" +#include "qom/object.h" #define TYPE_QIO_CHANNEL_COMMAND "qio-channel-command" +typedef struct QIOChannelCommand QIOChannelCommand; #define QIO_CHANNEL_COMMAND(obj) \ OBJECT_CHECK(QIOChannelCommand, (obj), TYPE_QIO_CHANNEL_COMMAND) -typedef struct QIOChannelCommand QIOChannelCommand; /** diff --git a/include/io/channel-file.h b/include/io/channel-file.h index ebfe54ec70..d91c9f5bc1 100644 --- a/include/io/channel-file.h +++ b/include/io/channel-file.h @@ -22,12 +22,13 @@ #define QIO_CHANNEL_FILE_H #include "io/channel.h" +#include "qom/object.h" #define TYPE_QIO_CHANNEL_FILE "qio-channel-file" +typedef struct QIOChannelFile QIOChannelFile; #define QIO_CHANNEL_FILE(obj) \ OBJECT_CHECK(QIOChannelFile, (obj), TYPE_QIO_CHANNEL_FILE) -typedef struct QIOChannelFile QIOChannelFile; /** * QIOChannelFile: diff --git a/include/io/channel-socket.h b/include/io/channel-socket.h index 777ff5954e..ee898d991b 100644 --- a/include/io/channel-socket.h +++ b/include/io/channel-socket.h @@ -24,12 +24,13 @@ #include "io/channel.h" #include "io/task.h" #include "qemu/sockets.h" +#include "qom/object.h" #define TYPE_QIO_CHANNEL_SOCKET "qio-channel-socket" +typedef struct QIOChannelSocket QIOChannelSocket; #define QIO_CHANNEL_SOCKET(obj) \ OBJECT_CHECK(QIOChannelSocket, (obj), TYPE_QIO_CHANNEL_SOCKET) -typedef struct QIOChannelSocket QIOChannelSocket; /** * QIOChannelSocket: diff --git a/include/io/channel-tls.h b/include/io/channel-tls.h index fdbdf12feb..ebd42f981e 100644 --- a/include/io/channel-tls.h +++ b/include/io/channel-tls.h @@ -24,12 +24,13 @@ #include "io/channel.h" #include "io/task.h" #include "crypto/tlssession.h" +#include "qom/object.h" #define TYPE_QIO_CHANNEL_TLS "qio-channel-tls" +typedef struct QIOChannelTLS QIOChannelTLS; #define QIO_CHANNEL_TLS(obj) \ OBJECT_CHECK(QIOChannelTLS, (obj), TYPE_QIO_CHANNEL_TLS) -typedef struct QIOChannelTLS QIOChannelTLS; /** * QIOChannelTLS diff --git a/include/io/channel-websock.h b/include/io/channel-websock.h index a7e5e92e61..5ab8811306 100644 --- a/include/io/channel-websock.h +++ b/include/io/channel-websock.h @@ -24,12 +24,13 @@ #include "io/channel.h" #include "qemu/buffer.h" #include "io/task.h" +#include "qom/object.h" #define TYPE_QIO_CHANNEL_WEBSOCK "qio-channel-websock" +typedef struct QIOChannelWebsock QIOChannelWebsock; #define QIO_CHANNEL_WEBSOCK(obj) \ OBJECT_CHECK(QIOChannelWebsock, (obj), TYPE_QIO_CHANNEL_WEBSOCK) -typedef struct QIOChannelWebsock QIOChannelWebsock; typedef union QIOChannelWebsockMask QIOChannelWebsockMask; union QIOChannelWebsockMask { diff --git a/include/io/channel.h b/include/io/channel.h index d4557f0930..67b9768eff 100644 --- a/include/io/channel.h +++ b/include/io/channel.h @@ -26,6 +26,8 @@ #include "block/aio.h" #define TYPE_QIO_CHANNEL "qio-channel" +typedef struct QIOChannel QIOChannel; +typedef struct QIOChannelClass QIOChannelClass; #define QIO_CHANNEL(obj) \ OBJECT_CHECK(QIOChannel, (obj), TYPE_QIO_CHANNEL) #define QIO_CHANNEL_CLASS(klass) \ @@ -33,8 +35,6 @@ #define QIO_CHANNEL_GET_CLASS(obj) \ OBJECT_GET_CLASS(QIOChannelClass, obj, TYPE_QIO_CHANNEL) -typedef struct QIOChannel QIOChannel; -typedef struct QIOChannelClass QIOChannelClass; #define QIO_CHANNEL_ERR_BLOCK -2 diff --git a/include/io/dns-resolver.h b/include/io/dns-resolver.h index a475e978c8..5e720bf267 100644 --- a/include/io/dns-resolver.h +++ b/include/io/dns-resolver.h @@ -26,6 +26,8 @@ #include "io/task.h" #define TYPE_QIO_DNS_RESOLVER "qio-dns-resolver" +typedef struct QIODNSResolver QIODNSResolver; +typedef struct QIODNSResolverClass QIODNSResolverClass; #define QIO_DNS_RESOLVER(obj) \ OBJECT_CHECK(QIODNSResolver, (obj), TYPE_QIO_DNS_RESOLVER) #define QIO_DNS_RESOLVER_CLASS(klass) \ @@ -33,8 +35,6 @@ #define QIO_DNS_RESOLVER_GET_CLASS(obj) \ OBJECT_GET_CLASS(QIODNSResolverClass, obj, TYPE_QIO_DNS_RESOLVER) -typedef struct QIODNSResolver QIODNSResolver; -typedef struct QIODNSResolverClass QIODNSResolverClass; /** * QIODNSResolver: diff --git a/include/io/net-listener.h b/include/io/net-listener.h index fb101703e3..fbdd2dbf9a 100644 --- a/include/io/net-listener.h +++ b/include/io/net-listener.h @@ -22,8 +22,11 @@ #define QIO_NET_LISTENER_H #include "io/channel-socket.h" +#include "qom/object.h" #define TYPE_QIO_NET_LISTENER "qio-net-listener" +typedef struct QIONetListener QIONetListener; +typedef struct QIONetListenerClass QIONetListenerClass; #define QIO_NET_LISTENER(obj) \ OBJECT_CHECK(QIONetListener, (obj), TYPE_QIO_NET_LISTENER) #define QIO_NET_LISTENER_CLASS(klass) \ @@ -31,8 +34,6 @@ #define QIO_NET_LISTENER_GET_CLASS(obj) \ OBJECT_GET_CLASS(QIONetListenerClass, obj, TYPE_QIO_NET_LISTENER) -typedef struct QIONetListener QIONetListener; -typedef struct QIONetListenerClass QIONetListenerClass; typedef void (*QIONetListenerClientFunc)(QIONetListener *listener, QIOChannelSocket *sioc, diff --git a/include/net/can_host.h b/include/net/can_host.h index d79676746b..13b6a191dd 100644 --- a/include/net/can_host.h +++ b/include/net/can_host.h @@ -29,8 +29,11 @@ #define NET_CAN_HOST_H #include "net/can_emu.h" +#include "qom/object.h" #define TYPE_CAN_HOST "can-host" +typedef struct CanHostClass CanHostClass; +typedef struct CanHostState CanHostState; #define CAN_HOST_CLASS(klass) \ OBJECT_CLASS_CHECK(CanHostClass, (klass), TYPE_CAN_HOST) #define CAN_HOST_GET_CLASS(obj) \ @@ -38,18 +41,18 @@ #define CAN_HOST(obj) \ OBJECT_CHECK(CanHostState, (obj), TYPE_CAN_HOST) -typedef struct CanHostState { +struct CanHostState { ObjectClass oc; CanBusState *bus; CanBusClientState bus_client; -} CanHostState; +}; -typedef struct CanHostClass { +struct CanHostClass { ObjectClass oc; void (*connect)(CanHostState *ch, Error **errp); void (*disconnect)(CanHostState *ch); -} CanHostClass; +}; #endif diff --git a/include/net/filter.h b/include/net/filter.h index 9393c59192..0d4f011bc0 100644 --- a/include/net/filter.h +++ b/include/net/filter.h @@ -15,6 +15,7 @@ #include "net/queue.h" #define TYPE_NETFILTER "netfilter" +typedef struct NetFilterClass NetFilterClass; #define NETFILTER(obj) \ OBJECT_CHECK(NetFilterState, (obj), TYPE_NETFILTER) #define NETFILTER_GET_CLASS(obj) \ @@ -40,7 +41,7 @@ typedef void (FilterStatusChanged) (NetFilterState *nf, Error **errp); typedef void (FilterHandleEvent) (NetFilterState *nf, int event, Error **errp); -typedef struct NetFilterClass { +struct NetFilterClass { ObjectClass parent_class; /* optional */ @@ -50,7 +51,7 @@ typedef struct NetFilterClass { FilterHandleEvent *handle_event; /* mandatory */ FilterReceiveIOV *receive_iov; -} NetFilterClass; +}; struct NetFilterState { diff --git a/include/qom/object.h b/include/qom/object.h index 81bea3b4ed..22198d0198 100644 --- a/include/qom/object.h +++ b/include/qom/object.h @@ -16,6 +16,7 @@ #include "qapi/qapi-builtin-types.h" #include "qemu/module.h" +#include "qom/object.h" struct TypeImpl; typedef struct TypeImpl *Type; diff --git a/include/qom/object_interfaces.h b/include/qom/object_interfaces.h index 7035829337..2be985f86e 100644 --- a/include/qom/object_interfaces.h +++ b/include/qom/object_interfaces.h @@ -6,6 +6,7 @@ #define TYPE_USER_CREATABLE "user-creatable" +typedef struct UserCreatableClass UserCreatableClass; #define USER_CREATABLE_CLASS(klass) \ OBJECT_CLASS_CHECK(UserCreatableClass, (klass), \ TYPE_USER_CREATABLE) @@ -40,14 +41,14 @@ typedef struct UserCreatable UserCreatable; * object's type implements USER_CREATABLE interface and needs * complete() callback to be called. */ -typedef struct UserCreatableClass { +struct UserCreatableClass { /* */ InterfaceClass parent_class; /* */ void (*complete)(UserCreatable *uc, Error **errp); bool (*can_be_deleted)(UserCreatable *uc); -} UserCreatableClass; +}; /** * user_creatable_complete: diff --git a/include/scsi/pr-manager.h b/include/scsi/pr-manager.h index 6ad5fd1ff7..2c699e4030 100644 --- a/include/scsi/pr-manager.h +++ b/include/scsi/pr-manager.h @@ -9,6 +9,8 @@ #define TYPE_PR_MANAGER "pr-manager" +typedef struct PRManager PRManager; +typedef struct PRManagerClass PRManagerClass; #define PR_MANAGER_CLASS(klass) \ OBJECT_CLASS_CHECK(PRManagerClass, (klass), TYPE_PR_MANAGER) #define PR_MANAGER_GET_CLASS(obj) \ @@ -18,24 +20,24 @@ struct sg_io_hdr; -typedef struct PRManager { +struct PRManager { /* */ Object parent; -} PRManager; +}; /** * PRManagerClass: * @parent_class: the base class * @run: callback invoked in thread pool context */ -typedef struct PRManagerClass { +struct PRManagerClass { /* */ ObjectClass parent_class; /* */ int (*run)(PRManager *pr_mgr, int fd, struct sg_io_hdr *hdr); bool (*is_connected)(PRManager *pr_mgr); -} PRManagerClass; +}; bool pr_manager_is_connected(PRManager *pr_mgr); int coroutine_fn pr_manager_execute(PRManager *pr_mgr, AioContext *ctx, int fd, diff --git a/include/sysemu/accel.h b/include/sysemu/accel.h index e08b8ab8fa..2bda18be12 100644 --- a/include/sysemu/accel.h +++ b/include/sysemu/accel.h @@ -26,12 +26,13 @@ #include "qom/object.h" #include "exec/hwaddr.h" -typedef struct AccelState { +struct AccelState { /*< private >*/ Object parent_obj; -} AccelState; +}; +typedef struct AccelState AccelState; -typedef struct AccelClass { +struct AccelClass { /*< private >*/ ObjectClass parent_class; /*< public >*/ @@ -52,7 +53,8 @@ typedef struct AccelClass { * compat_props or user-provided global properties. */ GPtrArray *compat_props; -} AccelClass; +}; +typedef struct AccelClass AccelClass; #define TYPE_ACCEL "accel" diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h index 35eab06d0e..e11526271a 100644 --- a/include/sysemu/cryptodev.h +++ b/include/sysemu/cryptodev.h @@ -37,6 +37,8 @@ #define TYPE_CRYPTODEV_BACKEND "cryptodev-backend" +typedef struct CryptoDevBackend CryptoDevBackend; +typedef struct CryptoDevBackendClass CryptoDevBackendClass; #define CRYPTODEV_BACKEND(obj) \ OBJECT_CHECK(CryptoDevBackend, \ (obj), TYPE_CRYPTODEV_BACKEND) @@ -54,7 +56,6 @@ typedef struct CryptoDevBackendConf CryptoDevBackendConf; typedef struct CryptoDevBackendPeers CryptoDevBackendPeers; typedef struct CryptoDevBackendClient CryptoDevBackendClient; -typedef struct CryptoDevBackend CryptoDevBackend; enum CryptoDevBackendAlgType { CRYPTODEV_BACKEND_ALG_SYM, @@ -146,7 +147,7 @@ typedef struct CryptoDevBackendSymOpInfo { uint8_t data[]; } CryptoDevBackendSymOpInfo; -typedef struct CryptoDevBackendClass { +struct CryptoDevBackendClass { ObjectClass parent_class; void (*init)(CryptoDevBackend *backend, Error **errp); @@ -161,7 +162,7 @@ typedef struct CryptoDevBackendClass { int (*do_sym_op)(CryptoDevBackend *backend, CryptoDevBackendSymOpInfo *op_info, uint32_t queue_index, Error **errp); -} CryptoDevBackendClass; +}; typedef enum CryptoDevBackendOptionsType { CRYPTODEV_BACKEND_TYPE_NONE = 0, diff --git a/include/sysemu/hostmem.h b/include/sysemu/hostmem.h index 8276e53683..7b775b6687 100644 --- a/include/sysemu/hostmem.h +++ b/include/sysemu/hostmem.h @@ -20,6 +20,8 @@ #include "qemu/bitmap.h" #define TYPE_MEMORY_BACKEND "memory-backend" +typedef struct HostMemoryBackend HostMemoryBackend; +typedef struct HostMemoryBackendClass HostMemoryBackendClass; #define MEMORY_BACKEND(obj) \ OBJECT_CHECK(HostMemoryBackend, (obj), TYPE_MEMORY_BACKEND) #define MEMORY_BACKEND_GET_CLASS(obj) \ @@ -42,8 +44,6 @@ */ #define TYPE_MEMORY_BACKEND_FILE "memory-backend-file" -typedef struct HostMemoryBackend HostMemoryBackend; -typedef struct HostMemoryBackendClass HostMemoryBackendClass; /** * HostMemoryBackendClass: diff --git a/include/sysemu/hvf.h b/include/sysemu/hvf.h index 760d6c79a2..566b5f52fc 100644 --- a/include/sysemu/hvf.h +++ b/include/sysemu/hvf.h @@ -14,6 +14,7 @@ #define HVF_H #include "sysemu/accel.h" +#include "qom/object.h" #ifdef CONFIG_HVF uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, diff --git a/include/sysemu/iothread.h b/include/sysemu/iothread.h index 6181486401..42902ffb9f 100644 --- a/include/sysemu/iothread.h +++ b/include/sysemu/iothread.h @@ -20,7 +20,7 @@ #define TYPE_IOTHREAD "iothread" -typedef struct { +struct IOThread { Object parent_obj; QemuThread thread; @@ -37,7 +37,8 @@ typedef struct { int64_t poll_max_ns; int64_t poll_grow; int64_t poll_shrink; -} IOThread; +}; +typedef struct IOThread IOThread; #define IOTHREAD(obj) \ OBJECT_CHECK(IOThread, obj, TYPE_IOTHREAD) diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 8445a88db1..3e89884c54 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -18,6 +18,7 @@ #include "hw/core/cpu.h" #include "exec/memattrs.h" #include "sysemu/accel.h" +#include "qom/object.h" #ifdef NEED_CPU_H # ifdef CONFIG_KVM diff --git a/include/sysemu/rng-random.h b/include/sysemu/rng-random.h index 38186fe83d..87e82dd7a3 100644 --- a/include/sysemu/rng-random.h +++ b/include/sysemu/rng-random.h @@ -15,8 +15,8 @@ #include "qom/object.h" #define TYPE_RNG_RANDOM "rng-random" +typedef struct RngRandom RngRandom; #define RNG_RANDOM(obj) OBJECT_CHECK(RngRandom, (obj), TYPE_RNG_RANDOM) -typedef struct RngRandom RngRandom; #endif diff --git a/include/sysemu/rng.h b/include/sysemu/rng.h index fa6eada78c..c38da7d342 100644 --- a/include/sysemu/rng.h +++ b/include/sysemu/rng.h @@ -17,6 +17,8 @@ #include "qom/object.h" #define TYPE_RNG_BACKEND "rng-backend" +typedef struct RngBackend RngBackend; +typedef struct RngBackendClass RngBackendClass; #define RNG_BACKEND(obj) \ OBJECT_CHECK(RngBackend, (obj), TYPE_RNG_BACKEND) #define RNG_BACKEND_GET_CLASS(obj) \ @@ -27,8 +29,6 @@ #define TYPE_RNG_BUILTIN "rng-builtin" typedef struct RngRequest RngRequest; -typedef struct RngBackendClass RngBackendClass; -typedef struct RngBackend RngBackend; typedef void (EntropyReceiveFunc)(void *opaque, const void *data, diff --git a/include/sysemu/tpm.h b/include/sysemu/tpm.h index 730c61ac97..04673cab53 100644 --- a/include/sysemu/tpm.h +++ b/include/sysemu/tpm.h @@ -26,6 +26,7 @@ typedef enum TPMVersion { } TPMVersion; #define TYPE_TPM_IF "tpm-if" +typedef struct TPMIfClass TPMIfClass; #define TPM_IF_CLASS(klass) \ OBJECT_CLASS_CHECK(TPMIfClass, (klass), TYPE_TPM_IF) #define TPM_IF_GET_CLASS(obj) \ @@ -35,13 +36,13 @@ typedef enum TPMVersion { typedef struct TPMIf TPMIf; -typedef struct TPMIfClass { +struct TPMIfClass { InterfaceClass parent_class; enum TpmModel model; void (*request_completed)(TPMIf *obj, int ret); enum TPMVersion (*get_version)(TPMIf *obj); -} TPMIfClass; +}; #define TYPE_TPM_TIS_ISA "tpm-tis" #define TYPE_TPM_TIS_SYSBUS "tpm-tis-device" diff --git a/include/sysemu/tpm_backend.h b/include/sysemu/tpm_backend.h index 9e7451fb52..740c94c6cd 100644 --- a/include/sysemu/tpm_backend.h +++ b/include/sysemu/tpm_backend.h @@ -19,6 +19,8 @@ #include "qapi/error.h" #define TYPE_TPM_BACKEND "tpm-backend" +typedef struct TPMBackend TPMBackend; +typedef struct TPMBackendClass TPMBackendClass; #define TPM_BACKEND(obj) \ OBJECT_CHECK(TPMBackend, (obj), TYPE_TPM_BACKEND) #define TPM_BACKEND_GET_CLASS(obj) \ @@ -26,8 +28,6 @@ #define TPM_BACKEND_CLASS(klass) \ OBJECT_CLASS_CHECK(TPMBackendClass, (klass), TYPE_TPM_BACKEND) -typedef struct TPMBackendClass TPMBackendClass; -typedef struct TPMBackend TPMBackend; typedef struct TPMBackendCmd { uint8_t locty; diff --git a/include/sysemu/vhost-user-backend.h b/include/sysemu/vhost-user-backend.h index 9abf8f06a1..89eb5eaf65 100644 --- a/include/sysemu/vhost-user-backend.h +++ b/include/sysemu/vhost-user-backend.h @@ -22,6 +22,8 @@ #include "io/channel.h" #define TYPE_VHOST_USER_BACKEND "vhost-user-backend" +typedef struct VhostUserBackend VhostUserBackend; +typedef struct VhostUserBackendClass VhostUserBackendClass; #define VHOST_USER_BACKEND(obj) \ OBJECT_CHECK(VhostUserBackend, (obj), TYPE_VHOST_USER_BACKEND) #define VHOST_USER_BACKEND_GET_CLASS(obj) \ @@ -29,8 +31,6 @@ #define VHOST_USER_BACKEND_CLASS(klass) \ OBJECT_CLASS_CHECK(VhostUserBackendClass, (klass), TYPE_VHOST_USER_BACKEND) -typedef struct VhostUserBackend VhostUserBackend; -typedef struct VhostUserBackendClass VhostUserBackendClass; struct VhostUserBackendClass { ObjectClass parent_class; diff --git a/include/ui/console.h b/include/ui/console.h index f35b4fc082..2a74a27d50 100644 --- a/include/ui/console.h +++ b/include/ui/console.h @@ -106,6 +106,7 @@ void kbd_put_keysym(int keysym); /* consoles */ #define TYPE_QEMU_CONSOLE "qemu-console" +typedef struct QemuConsoleClass QemuConsoleClass; #define QEMU_CONSOLE(obj) \ OBJECT_CHECK(QemuConsole, (obj), TYPE_QEMU_CONSOLE) #define QEMU_CONSOLE_GET_CLASS(obj) \ @@ -113,7 +114,6 @@ void kbd_put_keysym(int keysym); #define QEMU_CONSOLE_CLASS(klass) \ OBJECT_CLASS_CHECK(QemuConsoleClass, (klass), TYPE_QEMU_CONSOLE) -typedef struct QemuConsoleClass QemuConsoleClass; struct QemuConsoleClass { ObjectClass parent_class; diff --git a/migration/migration.h b/migration/migration.h index 6c6a931d0d..21986c9b26 100644 --- a/migration/migration.h +++ b/migration/migration.h @@ -21,6 +21,7 @@ #include "qemu/coroutine_int.h" #include "io/channel.h" #include "net/announce.h" +#include "qom/object.h" struct PostcopyBlocktimeContext; @@ -114,6 +115,7 @@ void fill_destination_postcopy_migration_info(MigrationInfo *info); #define TYPE_MIGRATION "migration" +typedef struct MigrationClass MigrationClass; #define MIGRATION_CLASS(klass) \ OBJECT_CLASS_CHECK(MigrationClass, (klass), TYPE_MIGRATION) #define MIGRATION_OBJ(obj) \ @@ -121,10 +123,10 @@ void fill_destination_postcopy_migration_info(MigrationInfo *info); #define MIGRATION_GET_CLASS(obj) \ OBJECT_GET_CLASS(MigrationClass, (obj), TYPE_MIGRATION) -typedef struct MigrationClass { +struct MigrationClass { /*< private >*/ DeviceClass parent_class; -} MigrationClass; +}; struct MigrationState { diff --git a/target/alpha/cpu-qom.h b/target/alpha/cpu-qom.h index 08832fa767..1124668cf0 100644 --- a/target/alpha/cpu-qom.h +++ b/target/alpha/cpu-qom.h @@ -21,9 +21,12 @@ #define QEMU_ALPHA_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_ALPHA_CPU "alpha-cpu" +typedef struct AlphaCPU AlphaCPU; +typedef struct AlphaCPUClass AlphaCPUClass; #define ALPHA_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(AlphaCPUClass, (klass), TYPE_ALPHA_CPU) #define ALPHA_CPU(obj) \ @@ -38,15 +41,14 @@ * * An Alpha CPU model. */ -typedef struct AlphaCPUClass { +struct AlphaCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} AlphaCPUClass; +}; -typedef struct AlphaCPU AlphaCPU; #endif diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h index 56395b87f6..4c8f54b251 100644 --- a/target/arm/cpu-qom.h +++ b/target/arm/cpu-qom.h @@ -21,11 +21,14 @@ #define QEMU_ARM_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" struct arm_boot_info; #define TYPE_ARM_CPU "arm-cpu" +typedef struct ARMCPU ARMCPU; +typedef struct ARMCPUClass ARMCPUClass; #define ARM_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(ARMCPUClass, (klass), TYPE_ARM_CPU) #define ARM_CPU(obj) \ @@ -51,7 +54,7 @@ void aarch64_cpu_register(const ARMCPUInfo *info); * * An ARM CPU model. */ -typedef struct ARMCPUClass { +struct ARMCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ @@ -59,21 +62,21 @@ typedef struct ARMCPUClass { const ARMCPUInfo *info; DeviceRealize parent_realize; DeviceReset parent_reset; -} ARMCPUClass; +}; -typedef struct ARMCPU ARMCPU; #define TYPE_AARCH64_CPU "aarch64-cpu" +typedef struct AArch64CPUClass AArch64CPUClass; #define AARCH64_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(AArch64CPUClass, (klass), TYPE_AARCH64_CPU) #define AARCH64_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(AArch64CPUClass, (obj), TYPE_AArch64_CPU) -typedef struct AArch64CPUClass { +struct AArch64CPUClass { /*< private >*/ ARMCPUClass parent_class; /*< public >*/ -} AArch64CPUClass; +}; void register_cp_regs_for_features(ARMCPU *cpu); void init_cpreg_list(ARMCPU *cpu); diff --git a/target/arm/idau.h b/target/arm/idau.h index 7c0e4e3776..2f09bbb34f 100644 --- a/target/arm/idau.h +++ b/target/arm/idau.h @@ -33,6 +33,7 @@ #define TYPE_IDAU_INTERFACE "idau-interface" #define IDAU_INTERFACE(obj) \ INTERFACE_CHECK(IDAUInterface, (obj), TYPE_IDAU_INTERFACE) +typedef struct IDAUInterfaceClass IDAUInterfaceClass; #define IDAU_INTERFACE_CLASS(class) \ OBJECT_CLASS_CHECK(IDAUInterfaceClass, (class), TYPE_IDAU_INTERFACE) #define IDAU_INTERFACE_GET_CLASS(obj) \ @@ -42,7 +43,7 @@ typedef struct IDAUInterface IDAUInterface; #define IREGION_NOTVALID -1 -typedef struct IDAUInterfaceClass { +struct IDAUInterfaceClass { InterfaceClass parent; /* Check the specified address and return the IDAU security information @@ -54,6 +55,6 @@ typedef struct IDAUInterfaceClass { */ void (*check)(IDAUInterface *ii, uint32_t address, int *iregion, bool *exempt, bool *ns, bool *nsc); -} IDAUInterfaceClass; +}; #endif diff --git a/target/avr/cpu-qom.h b/target/avr/cpu-qom.h index d23ad43a99..fac8430253 100644 --- a/target/avr/cpu-qom.h +++ b/target/avr/cpu-qom.h @@ -22,9 +22,12 @@ #define QEMU_AVR_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_AVR_CPU "avr-cpu" +typedef struct AVRCPU AVRCPU; +typedef struct AVRCPUClass AVRCPUClass; #define AVR_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(AVRCPUClass, (klass), TYPE_AVR_CPU) #define AVR_CPU(obj) \ @@ -40,14 +43,13 @@ * * A AVR CPU model. */ -typedef struct AVRCPUClass { +struct AVRCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} AVRCPUClass; +}; -typedef struct AVRCPU AVRCPU; #endif /* !defined (QEMU_AVR_CPU_QOM_H) */ diff --git a/target/cris/cpu-qom.h b/target/cris/cpu-qom.h index f1de6041dc..cac3e9af1b 100644 --- a/target/cris/cpu-qom.h +++ b/target/cris/cpu-qom.h @@ -21,9 +21,12 @@ #define QEMU_CRIS_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_CRIS_CPU "cris-cpu" +typedef struct CRISCPU CRISCPU; +typedef struct CRISCPUClass CRISCPUClass; #define CRIS_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(CRISCPUClass, (klass), TYPE_CRIS_CPU) #define CRIS_CPU(obj) \ @@ -39,7 +42,7 @@ * * A CRIS CPU model. */ -typedef struct CRISCPUClass { +struct CRISCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ @@ -48,8 +51,7 @@ typedef struct CRISCPUClass { DeviceReset parent_reset; uint32_t vr; -} CRISCPUClass; +}; -typedef struct CRISCPU CRISCPU; #endif diff --git a/target/hppa/cpu-qom.h b/target/hppa/cpu-qom.h index b1f6045495..295b2aaf19 100644 --- a/target/hppa/cpu-qom.h +++ b/target/hppa/cpu-qom.h @@ -21,9 +21,12 @@ #define QEMU_HPPA_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_HPPA_CPU "hppa-cpu" +typedef struct HPPACPU HPPACPU; +typedef struct HPPACPUClass HPPACPUClass; #define HPPA_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(HPPACPUClass, (klass), TYPE_HPPA_CPU) #define HPPA_CPU(obj) \ @@ -38,15 +41,14 @@ * * An HPPA CPU model. */ -typedef struct HPPACPUClass { +struct HPPACPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} HPPACPUClass; +}; -typedef struct HPPACPU HPPACPU; #endif diff --git a/target/i386/cpu-qom.h b/target/i386/cpu-qom.h index 3e96f8d668..6b0bf476e5 100644 --- a/target/i386/cpu-qom.h +++ b/target/i386/cpu-qom.h @@ -22,6 +22,7 @@ #include "hw/core/cpu.h" #include "qemu/notify.h" +#include "qom/object.h" #ifdef TARGET_X86_64 #define TYPE_X86_CPU "x86_64-cpu" @@ -29,6 +30,8 @@ #define TYPE_X86_CPU "i386-cpu" #endif +typedef struct X86CPU X86CPU; +typedef struct X86CPUClass X86CPUClass; #define X86_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(X86CPUClass, (klass), TYPE_X86_CPU) #define X86_CPU(obj) \ @@ -50,7 +53,7 @@ typedef struct X86CPUModel X86CPUModel; * * An x86 CPU model or family. */ -typedef struct X86CPUClass { +struct X86CPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ @@ -72,8 +75,7 @@ typedef struct X86CPUClass { DeviceRealize parent_realize; DeviceUnrealize parent_unrealize; DeviceReset parent_reset; -} X86CPUClass; +}; -typedef struct X86CPU X86CPU; #endif diff --git a/target/lm32/cpu-qom.h b/target/lm32/cpu-qom.h index bdedb3759a..2c0654b695 100644 --- a/target/lm32/cpu-qom.h +++ b/target/lm32/cpu-qom.h @@ -21,9 +21,12 @@ #define QEMU_LM32_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_LM32_CPU "lm32-cpu" +typedef struct LM32CPU LM32CPU; +typedef struct LM32CPUClass LM32CPUClass; #define LM32_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(LM32CPUClass, (klass), TYPE_LM32_CPU) #define LM32_CPU(obj) \ @@ -38,15 +41,14 @@ * * A LatticeMico32 CPU model. */ -typedef struct LM32CPUClass { +struct LM32CPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} LM32CPUClass; +}; -typedef struct LM32CPU LM32CPU; #endif diff --git a/target/m68k/cpu-qom.h b/target/m68k/cpu-qom.h index 88b11b60f1..3b199be545 100644 --- a/target/m68k/cpu-qom.h +++ b/target/m68k/cpu-qom.h @@ -21,9 +21,12 @@ #define QEMU_M68K_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_M68K_CPU "m68k-cpu" +typedef struct M68kCPU M68kCPU; +typedef struct M68kCPUClass M68kCPUClass; #define M68K_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(M68kCPUClass, (klass), TYPE_M68K_CPU) #define M68K_CPU(obj) \ @@ -38,15 +41,14 @@ * * A Motorola 68k CPU model. */ -typedef struct M68kCPUClass { +struct M68kCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} M68kCPUClass; +}; -typedef struct M68kCPU M68kCPU; #endif diff --git a/target/microblaze/cpu-qom.h b/target/microblaze/cpu-qom.h index 053ba44ee8..564fa18ccb 100644 --- a/target/microblaze/cpu-qom.h +++ b/target/microblaze/cpu-qom.h @@ -21,9 +21,12 @@ #define QEMU_MICROBLAZE_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_MICROBLAZE_CPU "microblaze-cpu" +typedef struct MicroBlazeCPU MicroBlazeCPU; +typedef struct MicroBlazeCPUClass MicroBlazeCPUClass; #define MICROBLAZE_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(MicroBlazeCPUClass, (klass), TYPE_MICROBLAZE_CPU) #define MICROBLAZE_CPU(obj) \ @@ -38,15 +41,14 @@ * * A MicroBlaze CPU model. */ -typedef struct MicroBlazeCPUClass { +struct MicroBlazeCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} MicroBlazeCPUClass; +}; -typedef struct MicroBlazeCPU MicroBlazeCPU; #endif diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h index 9d0df6c034..3a5fd9561e 100644 --- a/target/mips/cpu-qom.h +++ b/target/mips/cpu-qom.h @@ -21,6 +21,7 @@ #define QEMU_MIPS_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #ifdef TARGET_MIPS64 #define TYPE_MIPS_CPU "mips64-cpu" @@ -28,6 +29,8 @@ #define TYPE_MIPS_CPU "mips-cpu" #endif +typedef struct MIPSCPU MIPSCPU; +typedef struct MIPSCPUClass MIPSCPUClass; #define MIPS_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(MIPSCPUClass, (klass), TYPE_MIPS_CPU) #define MIPS_CPU(obj) \ @@ -42,7 +45,7 @@ * * A MIPS CPU model. */ -typedef struct MIPSCPUClass { +struct MIPSCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ @@ -50,8 +53,7 @@ typedef struct MIPSCPUClass { DeviceRealize parent_realize; DeviceReset parent_reset; const struct mips_def_t *cpu_def; -} MIPSCPUClass; +}; -typedef struct MIPSCPU MIPSCPU; #endif diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h index 455553b794..af4d6abf16 100644 --- a/target/moxie/cpu.h +++ b/target/moxie/cpu.h @@ -21,6 +21,7 @@ #define MOXIE_CPU_H #include "exec/cpu-defs.h" +#include "qom/object.h" #define MOXIE_EX_DIV0 0 #define MOXIE_EX_BAD 1 @@ -50,6 +51,8 @@ typedef struct CPUMoxieState { #define TYPE_MOXIE_CPU "moxie-cpu" +typedef struct MoxieCPU MoxieCPU; +typedef struct MoxieCPUClass MoxieCPUClass; #define MOXIE_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(MoxieCPUClass, (klass), TYPE_MOXIE_CPU) #define MOXIE_CPU(obj) \ @@ -63,14 +66,14 @@ typedef struct CPUMoxieState { * * A Moxie CPU model. */ -typedef struct MoxieCPUClass { +struct MoxieCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} MoxieCPUClass; +}; /** * MoxieCPU: @@ -78,14 +81,14 @@ typedef struct MoxieCPUClass { * * A Moxie CPU. */ -typedef struct MoxieCPU { +struct MoxieCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ CPUNegativeOffsetState neg; CPUMoxieState env; -} MoxieCPU; +}; void moxie_cpu_do_interrupt(CPUState *cs); diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 4dddf9c3a1..7162cbdf5c 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -23,6 +23,7 @@ #include "exec/cpu-defs.h" #include "hw/core/cpu.h" +#include "qom/object.h" typedef struct CPUNios2State CPUNios2State; #if !defined(CONFIG_USER_ONLY) @@ -31,6 +32,8 @@ typedef struct CPUNios2State CPUNios2State; #define TYPE_NIOS2_CPU "nios2-cpu" +typedef struct Nios2CPU Nios2CPU; +typedef struct Nios2CPUClass Nios2CPUClass; #define NIOS2_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(Nios2CPUClass, (klass), TYPE_NIOS2_CPU) #define NIOS2_CPU(obj) \ @@ -44,14 +47,14 @@ typedef struct CPUNios2State CPUNios2State; * * A Nios2 CPU model. */ -typedef struct Nios2CPUClass { +struct Nios2CPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} Nios2CPUClass; +}; #define TARGET_HAS_ICE 1 @@ -174,7 +177,7 @@ struct CPUNios2State { * * A Nios2 CPU. */ -typedef struct Nios2CPU { +struct Nios2CPU { /*< private >*/ CPUState parent_obj; /*< public >*/ @@ -191,7 +194,7 @@ typedef struct Nios2CPU { uint32_t reset_addr; uint32_t exception_addr; uint32_t fast_tlb_miss_addr; -} Nios2CPU; +}; void nios2_tcg_init(void); diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index f37a52e153..ab0dd55358 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -22,12 +22,15 @@ #include "exec/cpu-defs.h" #include "hw/core/cpu.h" +#include "qom/object.h" /* cpu_openrisc_map_address_* in CPUOpenRISCTLBContext need this decl. */ struct OpenRISCCPU; #define TYPE_OPENRISC_CPU "or1k-cpu" +typedef struct OpenRISCCPU OpenRISCCPU; +typedef struct OpenRISCCPUClass OpenRISCCPUClass; #define OPENRISC_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(OpenRISCCPUClass, (klass), TYPE_OPENRISC_CPU) #define OPENRISC_CPU(obj) \ @@ -42,14 +45,14 @@ struct OpenRISCCPU; * * A OpenRISC CPU model. */ -typedef struct OpenRISCCPUClass { +struct OpenRISCCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} OpenRISCCPUClass; +}; #define TARGET_INSN_START_EXTRA_WORDS 1 @@ -305,14 +308,14 @@ typedef struct CPUOpenRISCState { * * A OpenRISC CPU. */ -typedef struct OpenRISCCPU { +struct OpenRISCCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ CPUNegativeOffsetState neg; CPUOpenRISCState env; -} OpenRISCCPU; +}; void cpu_openrisc_list(void); diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 000c7d405b..017f0efc7b 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -21,6 +21,7 @@ #define QEMU_PPC_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #ifdef TARGET_PPC64 #define TYPE_POWERPC_CPU "powerpc64-cpu" @@ -28,6 +29,8 @@ #define TYPE_POWERPC_CPU "powerpc-cpu" #endif +typedef struct PowerPCCPU PowerPCCPU; +typedef struct PowerPCCPUClass PowerPCCPUClass; #define POWERPC_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(PowerPCCPUClass, (klass), TYPE_POWERPC_CPU) #define POWERPC_CPU(obj) \ @@ -35,7 +38,6 @@ #define POWERPC_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU) -typedef struct PowerPCCPU PowerPCCPU; typedef struct CPUPPCState CPUPPCState; typedef struct ppc_tb_t ppc_tb_t; typedef struct ppc_dcr_t ppc_dcr_t; @@ -159,7 +161,7 @@ typedef struct PPCHash64Options PPCHash64Options; * * A PowerPC CPU model. */ -typedef struct PowerPCCPUClass { +struct PowerPCCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ @@ -197,7 +199,7 @@ typedef struct PowerPCCPUClass { int (*check_pow)(CPUPPCState *env); int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx); bool (*interrupts_big_endian)(PowerPCCPU *cpu); -} PowerPCCPUClass; +}; #ifndef CONFIG_USER_ONLY typedef struct PPCTimebase { diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index e7d382ac10..1a712ba3dd 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -23,6 +23,7 @@ #include "qemu/int128.h" #include "exec/cpu-defs.h" #include "cpu-qom.h" +#include "qom/object.h" #define TCG_GUEST_DEFAULT_MO 0 diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index a804a5d0ba..7e4dde2547 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -24,6 +24,7 @@ #include "hw/registerfields.h" #include "exec/cpu-defs.h" #include "fpu/softfloat-types.h" +#include "qom/object.h" #define TCG_GUEST_DEFAULT_MO 0 @@ -231,6 +232,8 @@ struct CPURISCVState { QEMUTimer *timer; /* Internal timer */ }; +typedef struct RISCVCPU RISCVCPU; +typedef struct RISCVCPUClass RISCVCPUClass; #define RISCV_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(RISCVCPUClass, (klass), TYPE_RISCV_CPU) #define RISCV_CPU(obj) \ @@ -245,13 +248,13 @@ struct CPURISCVState { * * A RISCV CPU model. */ -typedef struct RISCVCPUClass { +struct RISCVCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} RISCVCPUClass; +}; /** * RISCVCPU: @@ -259,7 +262,7 @@ typedef struct RISCVCPUClass { * * A RISCV CPU. */ -typedef struct RISCVCPU { +struct RISCVCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ @@ -292,7 +295,7 @@ typedef struct RISCVCPU { bool mmu; bool pmp; } cfg; -} RISCVCPU; +}; static inline int riscv_has_ext(CPURISCVState *env, target_ulong ext) { diff --git a/target/rx/cpu-qom.h b/target/rx/cpu-qom.h index 3e81856ef5..cefa536741 100644 --- a/target/rx/cpu-qom.h +++ b/target/rx/cpu-qom.h @@ -20,11 +20,13 @@ #define RX_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_RX_CPU "rx-cpu" #define TYPE_RX62N_CPU RX_CPU_TYPE_NAME("rx62n") +typedef struct RXCPUClass RXCPUClass; #define RXCPU_CLASS(klass) \ OBJECT_CLASS_CHECK(RXCPUClass, (klass), TYPE_RX_CPU) #define RXCPU(obj) \ @@ -39,14 +41,14 @@ * * A RX CPU model. */ -typedef struct RXCPUClass { +struct RXCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} RXCPUClass; +}; #define CPUArchState struct CPURXState diff --git a/target/s390x/cpu-qom.h b/target/s390x/cpu-qom.h index 1630818c28..13f1f2659e 100644 --- a/target/s390x/cpu-qom.h +++ b/target/s390x/cpu-qom.h @@ -21,9 +21,12 @@ #define QEMU_S390_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_S390_CPU "s390x-cpu" +typedef struct S390CPU S390CPU; +typedef struct S390CPUClass S390CPUClass; #define S390_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(S390CPUClass, (klass), TYPE_S390_CPU) #define S390_CPU(obj) \ @@ -50,7 +53,7 @@ typedef enum cpu_reset_type { * * An S/390 CPU model. */ -typedef struct S390CPUClass { +struct S390CPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ @@ -64,9 +67,8 @@ typedef struct S390CPUClass { DeviceReset parent_reset; void (*load_normal)(CPUState *cpu); void (*reset)(CPUState *cpu, cpu_reset_type type); -} S390CPUClass; +}; -typedef struct S390CPU S390CPU; typedef struct CPUS390XState CPUS390XState; #endif diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h index 72a63f3fd3..bf71c0f8e5 100644 --- a/target/sh4/cpu-qom.h +++ b/target/sh4/cpu-qom.h @@ -21,6 +21,7 @@ #define QEMU_SUPERH_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_SUPERH_CPU "superh-cpu" @@ -28,6 +29,8 @@ #define TYPE_SH7751R_CPU SUPERH_CPU_TYPE_NAME("sh7751r") #define TYPE_SH7785_CPU SUPERH_CPU_TYPE_NAME("sh7785") +typedef struct SuperHCPU SuperHCPU; +typedef struct SuperHCPUClass SuperHCPUClass; #define SUPERH_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU) #define SUPERH_CPU(obj) \ @@ -45,7 +48,7 @@ * * A SuperH CPU model. */ -typedef struct SuperHCPUClass { +struct SuperHCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ @@ -56,8 +59,7 @@ typedef struct SuperHCPUClass { uint32_t pvr; uint32_t prr; uint32_t cvr; -} SuperHCPUClass; +}; -typedef struct SuperHCPU SuperHCPU; #endif diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h index 8b4d33c21e..b7cc81e5f3 100644 --- a/target/sparc/cpu-qom.h +++ b/target/sparc/cpu-qom.h @@ -21,6 +21,7 @@ #define QEMU_SPARC_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #ifdef TARGET_SPARC64 #define TYPE_SPARC_CPU "sparc64-cpu" @@ -28,6 +29,8 @@ #define TYPE_SPARC_CPU "sparc-cpu" #endif +typedef struct SPARCCPU SPARCCPU; +typedef struct SPARCCPUClass SPARCCPUClass; #define SPARC_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(SPARCCPUClass, (klass), TYPE_SPARC_CPU) #define SPARC_CPU(obj) \ @@ -43,7 +46,7 @@ typedef struct sparc_def_t sparc_def_t; * * A SPARC CPU model. */ -typedef struct SPARCCPUClass { +struct SPARCCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ @@ -51,8 +54,7 @@ typedef struct SPARCCPUClass { DeviceRealize parent_realize; DeviceReset parent_reset; sparc_def_t *cpu_def; -} SPARCCPUClass; +}; -typedef struct SPARCCPU SPARCCPU; #endif diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h index 193b6bbccb..d6cc1d2982 100644 --- a/target/tilegx/cpu.h +++ b/target/tilegx/cpu.h @@ -21,6 +21,7 @@ #define TILEGX_CPU_H #include "exec/cpu-defs.h" +#include "qom/object.h" /* TILE-Gx common register alias */ #define TILEGX_R_RE 0 /* 0 register, for function/syscall return value */ @@ -98,6 +99,8 @@ typedef struct CPUTLGState { #define TYPE_TILEGX_CPU "tilegx-cpu" +typedef struct TileGXCPU TileGXCPU; +typedef struct TileGXCPUClass TileGXCPUClass; #define TILEGX_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(TileGXCPUClass, (klass), TYPE_TILEGX_CPU) #define TILEGX_CPU(obj) \ @@ -112,14 +115,14 @@ typedef struct CPUTLGState { * * A Tile-Gx CPU model. */ -typedef struct TileGXCPUClass { +struct TileGXCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} TileGXCPUClass; +}; /** * TileGXCPU: @@ -127,14 +130,14 @@ typedef struct TileGXCPUClass { * * A Tile-GX CPU. */ -typedef struct TileGXCPU { +struct TileGXCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ CPUNegativeOffsetState neg; CPUTLGState env; -} TileGXCPU; +}; /* TILE-Gx memory attributes */ diff --git a/target/tricore/cpu-qom.h b/target/tricore/cpu-qom.h index cd819e6f24..cef466da74 100644 --- a/target/tricore/cpu-qom.h +++ b/target/tricore/cpu-qom.h @@ -19,10 +19,13 @@ #define QEMU_TRICORE_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_TRICORE_CPU "tricore-cpu" +typedef struct TriCoreCPU TriCoreCPU; +typedef struct TriCoreCPUClass TriCoreCPUClass; #define TRICORE_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(TriCoreCPUClass, (klass), TYPE_TRICORE_CPU) #define TRICORE_CPU(obj) \ @@ -30,15 +33,14 @@ #define TRICORE_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(TriCoreCPUClass, (obj), TYPE_TRICORE_CPU) -typedef struct TriCoreCPUClass { +struct TriCoreCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} TriCoreCPUClass; +}; -typedef struct TriCoreCPU TriCoreCPU; #endif /* QEMU_TRICORE_CPU_QOM_H */ diff --git a/target/unicore32/cpu-qom.h b/target/unicore32/cpu-qom.h index 7dd04515cb..6a1cb1c82d 100644 --- a/target/unicore32/cpu-qom.h +++ b/target/unicore32/cpu-qom.h @@ -12,9 +12,12 @@ #define QEMU_UC32_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_UNICORE32_CPU "unicore32-cpu" +typedef struct UniCore32CPU UniCore32CPU; +typedef struct UniCore32CPUClass UniCore32CPUClass; #define UNICORE32_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(UniCore32CPUClass, (klass), TYPE_UNICORE32_CPU) #define UNICORE32_CPU(obj) \ @@ -28,14 +31,13 @@ * * A UniCore32 CPU model. */ -typedef struct UniCore32CPUClass { +struct UniCore32CPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; -} UniCore32CPUClass; +}; -typedef struct UniCore32CPU UniCore32CPU; #endif diff --git a/target/xtensa/cpu-qom.h b/target/xtensa/cpu-qom.h index 3ea93ce1f9..cd9f31dc84 100644 --- a/target/xtensa/cpu-qom.h +++ b/target/xtensa/cpu-qom.h @@ -30,9 +30,12 @@ #define QEMU_XTENSA_CPU_QOM_H #include "hw/core/cpu.h" +#include "qom/object.h" #define TYPE_XTENSA_CPU "xtensa-cpu" +typedef struct XtensaCPU XtensaCPU; +typedef struct XtensaCPUClass XtensaCPUClass; #define XTENSA_CPU_CLASS(class) \ OBJECT_CLASS_CHECK(XtensaCPUClass, (class), TYPE_XTENSA_CPU) #define XTENSA_CPU(obj) \ @@ -50,7 +53,7 @@ typedef struct XtensaConfig XtensaConfig; * * An Xtensa CPU model. */ -typedef struct XtensaCPUClass { +struct XtensaCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ @@ -59,8 +62,7 @@ typedef struct XtensaCPUClass { DeviceReset parent_reset; const XtensaConfig *config; -} XtensaCPUClass; +}; -typedef struct XtensaCPU XtensaCPU; #endif diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index c29e72fb1f..39de5eab4b 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -36,12 +36,13 @@ #include "hw/boards.h" #include "qapi/qapi-builtin-visit.h" -typedef struct TCGState { +struct TCGState { AccelState parent_obj; bool mttcg_enabled; unsigned long tb_size; -} TCGState; +}; +typedef struct TCGState TCGState; #define TYPE_TCG_ACCEL ACCEL_CLASS_NAME("tcg") diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c index cb3690383f..235c0c2572 100644 --- a/backends/cryptodev-builtin.c +++ b/backends/cryptodev-builtin.c @@ -26,6 +26,7 @@ #include "qapi/error.h" #include "standard-headers/linux/virtio_crypto.h" #include "crypto/cipher.h" +#include "qom/object.h" /** @@ -34,12 +35,12 @@ */ #define TYPE_CRYPTODEV_BACKEND_BUILTIN "cryptodev-backend-builtin" +typedef struct CryptoDevBackendBuiltin + CryptoDevBackendBuiltin; #define CRYPTODEV_BACKEND_BUILTIN(obj) \ OBJECT_CHECK(CryptoDevBackendBuiltin, \ (obj), TYPE_CRYPTODEV_BACKEND_BUILTIN) -typedef struct CryptoDevBackendBuiltin - CryptoDevBackendBuiltin; typedef struct CryptoDevBackendBuiltinSession { QCryptoCipher *cipher; diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c index 0fffa10214..ae7745cd22 100644 --- a/backends/cryptodev-vhost-user.c +++ b/backends/cryptodev-vhost-user.c @@ -30,6 +30,7 @@ #include "sysemu/cryptodev-vhost.h" #include "chardev/char-fe.h" #include "sysemu/cryptodev-vhost-user.h" +#include "qom/object.h" /** @@ -38,12 +39,13 @@ */ #define TYPE_CRYPTODEV_BACKEND_VHOST_USER "cryptodev-vhost-user" +typedef struct CryptoDevBackendVhostUser CryptoDevBackendVhostUser; #define CRYPTODEV_BACKEND_VHOST_USER(obj) \ OBJECT_CHECK(CryptoDevBackendVhostUser, \ (obj), TYPE_CRYPTODEV_BACKEND_VHOST_USER) -typedef struct CryptoDevBackendVhostUser { +struct CryptoDevBackendVhostUser { CryptoDevBackend parent_obj; VhostUserState vhost_user; @@ -51,7 +53,7 @@ typedef struct CryptoDevBackendVhostUser { char *chr_name; bool opened; CryptoDevBackendVhost *vhost_crypto[MAX_CRYPTO_QUEUE_NUM]; -} CryptoDevBackendVhostUser; +}; static int cryptodev_vhost_user_running( diff --git a/backends/dbus-vmstate.c b/backends/dbus-vmstate.c index d8cc3e7e25..6a92a0f986 100644 --- a/backends/dbus-vmstate.c +++ b/backends/dbus-vmstate.c @@ -19,6 +19,7 @@ #include "qapi/qmp/qerror.h" #include "migration/vmstate.h" #include "trace.h" +#include "qom/object.h" typedef struct DBusVMState DBusVMState; typedef struct DBusVMStateClass DBusVMStateClass; diff --git a/backends/hostmem-file.c b/backends/hostmem-file.c index 5037357cd0..d4be9ac096 100644 --- a/backends/hostmem-file.c +++ b/backends/hostmem-file.c @@ -17,11 +17,12 @@ #include "sysemu/hostmem.h" #include "sysemu/sysemu.h" #include "qom/object_interfaces.h" +#include "qom/object.h" +typedef struct HostMemoryBackendFile HostMemoryBackendFile; #define MEMORY_BACKEND_FILE(obj) \ OBJECT_CHECK(HostMemoryBackendFile, (obj), TYPE_MEMORY_BACKEND_FILE) -typedef struct HostMemoryBackendFile HostMemoryBackendFile; struct HostMemoryBackendFile { HostMemoryBackend parent_obj; diff --git a/backends/hostmem-memfd.c b/backends/hostmem-memfd.c index 4b4f13a3ca..a62e3f2784 100644 --- a/backends/hostmem-memfd.c +++ b/backends/hostmem-memfd.c @@ -17,13 +17,14 @@ #include "qemu/memfd.h" #include "qemu/module.h" #include "qapi/error.h" +#include "qom/object.h" #define TYPE_MEMORY_BACKEND_MEMFD "memory-backend-memfd" +typedef struct HostMemoryBackendMemfd HostMemoryBackendMemfd; #define MEMORY_BACKEND_MEMFD(obj) \ OBJECT_CHECK(HostMemoryBackendMemfd, (obj), TYPE_MEMORY_BACKEND_MEMFD) -typedef struct HostMemoryBackendMemfd HostMemoryBackendMemfd; struct HostMemoryBackendMemfd { HostMemoryBackend parent_obj; diff --git a/backends/rng-builtin.c b/backends/rng-builtin.c index d6afd54b3e..5e4d0a7292 100644 --- a/backends/rng-builtin.c +++ b/backends/rng-builtin.c @@ -9,13 +9,15 @@ #include "sysemu/rng.h" #include "qemu/main-loop.h" #include "qemu/guest-random.h" +#include "qom/object.h" +typedef struct RngBuiltin RngBuiltin; #define RNG_BUILTIN(obj) OBJECT_CHECK(RngBuiltin, (obj), TYPE_RNG_BUILTIN) -typedef struct RngBuiltin { +struct RngBuiltin { RngBackend parent; QEMUBH *bh; -} RngBuiltin; +}; static void rng_builtin_receive_entropy_bh(void *opaque) { diff --git a/backends/rng-egd.c b/backends/rng-egd.c index 90d57417ff..c01ec5ee71 100644 --- a/backends/rng-egd.c +++ b/backends/rng-egd.c @@ -16,17 +16,18 @@ #include "qapi/error.h" #include "qapi/qmp/qerror.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_RNG_EGD "rng-egd" +typedef struct RngEgd RngEgd; #define RNG_EGD(obj) OBJECT_CHECK(RngEgd, (obj), TYPE_RNG_EGD) -typedef struct RngEgd -{ +struct RngEgd { RngBackend parent; CharBackend chr; char *chr_name; -} RngEgd; +}; static void rng_egd_request_entropy(RngBackend *b, RngRequest *req) { diff --git a/backends/tpm/tpm_emulator.c b/backends/tpm/tpm_emulator.c index ac441337d9..50e455f6fd 100644 --- a/backends/tpm/tpm_emulator.c +++ b/backends/tpm/tpm_emulator.c @@ -42,8 +42,10 @@ #include "qapi/qapi-visit-tpm.h" #include "chardev/char-fe.h" #include "trace.h" +#include "qom/object.h" #define TYPE_TPM_EMULATOR "tpm-emulator" +typedef struct TPMEmulator TPMEmulator; #define TPM_EMULATOR(obj) \ OBJECT_CHECK(TPMEmulator, (obj), TYPE_TPM_EMULATOR) @@ -63,7 +65,7 @@ typedef struct TPMBlobBuffers { TPMSizedBuffer savestate; } TPMBlobBuffers; -typedef struct TPMEmulator { +struct TPMEmulator { TPMBackend parent; TPMEmulatorOptions *options; @@ -80,7 +82,7 @@ typedef struct TPMEmulator { unsigned int established_flag_cached:1; TPMBlobBuffers state_blobs; -} TPMEmulator; +}; struct tpm_error { uint32_t tpm_result; diff --git a/backends/tpm/tpm_passthrough.c b/backends/tpm/tpm_passthrough.c index 8e67b4b7d6..a82c4f324c 100644 --- a/backends/tpm/tpm_passthrough.c +++ b/backends/tpm/tpm_passthrough.c @@ -33,8 +33,10 @@ #include "qapi/clone-visitor.h" #include "qapi/qapi-visit-tpm.h" #include "trace.h" +#include "qom/object.h" #define TYPE_TPM_PASSTHROUGH "tpm-passthrough" +typedef struct TPMPassthruState TPMPassthruState; #define TPM_PASSTHROUGH(obj) \ OBJECT_CHECK(TPMPassthruState, (obj), TYPE_TPM_PASSTHROUGH) @@ -53,7 +55,6 @@ struct TPMPassthruState { size_t tpm_buffersize; }; -typedef struct TPMPassthruState TPMPassthruState; #define TPM_PASSTHROUGH_DEFAULT_DEVICE "/dev/tpm0" diff --git a/chardev/baum.c b/chardev/baum.c index f111ebfe05..1efc61d017 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -33,6 +33,7 @@ #include #include #include +#include "qom/object.h" #if 0 #define DPRINTF(fmt, ...) \ @@ -86,7 +87,7 @@ #define BUF_SIZE 256 -typedef struct { +struct BaumChardev { Chardev parent; brlapi_handle_t *brlapi; @@ -100,7 +101,8 @@ typedef struct { uint8_t out_buf_used, out_buf_ptr; QEMUTimer *cellCount_timer; -} BaumChardev; +}; +typedef struct BaumChardev BaumChardev; #define TYPE_CHARDEV_BRAILLE "chardev-braille" #define BAUM_CHARDEV(obj) OBJECT_CHECK(BaumChardev, (obj), TYPE_CHARDEV_BRAILLE) diff --git a/chardev/char-parallel.c b/chardev/char-parallel.c index dd60ef9898..78b29dd8c2 100644 --- a/chardev/char-parallel.c +++ b/chardev/char-parallel.c @@ -28,6 +28,7 @@ #include "qemu/module.h" #include "qemu/option.h" #include +#include "qom/object.h" #ifdef CONFIG_BSD #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) @@ -49,11 +50,12 @@ #if defined(__linux__) -typedef struct { +struct ParallelChardev { Chardev parent; int fd; int mode; -} ParallelChardev; +}; +typedef struct ParallelChardev ParallelChardev; #define PARALLEL_CHARDEV(obj) \ OBJECT_CHECK(ParallelChardev, (obj), TYPE_CHARDEV_PARALLEL) @@ -177,10 +179,11 @@ static void qemu_chr_open_pp_fd(Chardev *chr, #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) -typedef struct { +struct ParallelChardev { Chardev parent; int fd; -} ParallelChardev; +}; +typedef struct ParallelChardev ParallelChardev; #define PARALLEL_CHARDEV(obj) \ OBJECT_CHECK(ParallelChardev, (obj), TYPE_CHARDEV_PARALLEL) diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 40d7bddba3..5b3453091a 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -33,15 +33,17 @@ #include "qemu/qemu-print.h" #include "chardev/char-io.h" +#include "qom/object.h" -typedef struct { +struct PtyChardev { Chardev parent; QIOChannel *ioc; int read_bytes; int connected; GSource *timer_src; -} PtyChardev; +}; +typedef struct PtyChardev PtyChardev; #define PTY_CHARDEV(obj) OBJECT_CHECK(PtyChardev, (obj), TYPE_CHARDEV_PTY) diff --git a/chardev/char-ringbuf.c b/chardev/char-ringbuf.c index fe9881b85b..e498b218ad 100644 --- a/chardev/char-ringbuf.c +++ b/chardev/char-ringbuf.c @@ -29,16 +29,18 @@ #include "qemu/base64.h" #include "qemu/module.h" #include "qemu/option.h" +#include "qom/object.h" /* Ring buffer chardev */ -typedef struct { +struct RingBufChardev { Chardev parent; size_t size; size_t prod; size_t cons; uint8_t *cbuf; -} RingBufChardev; +}; +typedef struct RingBufChardev RingBufChardev; #define RINGBUF_CHARDEV(obj) \ OBJECT_CHECK(RingBufChardev, (obj), TYPE_CHARDEV_RINGBUF) diff --git a/chardev/char-socket.c b/chardev/char-socket.c index 8c4ff2effb..86f6c21bf6 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -36,6 +36,7 @@ #include "qapi/qapi-visit-sockets.h" #include "chardev/char-io.h" +#include "qom/object.h" /***********************************************************/ /* TCP Net console */ @@ -53,7 +54,7 @@ typedef enum { TCP_CHARDEV_STATE_CONNECTED, } TCPChardevState; -typedef struct { +struct SocketChardev { Chardev parent; QIOChannel *ioc; /* Client I/O channel */ QIOChannelSocket *sioc; /* Client master channel */ @@ -84,7 +85,8 @@ typedef struct { bool connect_err_reported; QIOTask *connect_task; -} SocketChardev; +}; +typedef struct SocketChardev SocketChardev; #define SOCKET_CHARDEV(obj) \ OBJECT_CHECK(SocketChardev, (obj), TYPE_CHARDEV_SOCKET) diff --git a/chardev/char-udp.c b/chardev/char-udp.c index 0d175b62e0..fa7bfe2cbd 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -30,18 +30,20 @@ #include "qemu/option.h" #include "chardev/char-io.h" +#include "qom/object.h" /***********************************************************/ /* UDP Net console */ -typedef struct { +struct UdpChardev { Chardev parent; QIOChannel *ioc; uint8_t buf[CHR_READ_BUF_LEN]; int bufcnt; int bufptr; int max_size; -} UdpChardev; +}; +typedef struct UdpChardev UdpChardev; #define UDP_CHARDEV(obj) OBJECT_CHECK(UdpChardev, (obj), TYPE_CHARDEV_UDP) diff --git a/chardev/char-win-stdio.c b/chardev/char-win-stdio.c index a6794d26d7..bd4e2598c1 100644 --- a/chardev/char-win-stdio.c +++ b/chardev/char-win-stdio.c @@ -28,15 +28,17 @@ #include "qemu/module.h" #include "chardev/char-win.h" #include "chardev/char-win-stdio.h" +#include "qom/object.h" -typedef struct { +struct WinStdioChardev { Chardev parent; HANDLE hStdIn; HANDLE hInputReadyEvent; HANDLE hInputDoneEvent; HANDLE hInputThread; uint8_t win_stdio_buf; -} WinStdioChardev; +}; +typedef struct WinStdioChardev WinStdioChardev; #define WIN_STDIO_CHARDEV(obj) \ OBJECT_CHECK(WinStdioChardev, (obj), TYPE_CHARDEV_WIN_STDIO) diff --git a/chardev/msmouse.c b/chardev/msmouse.c index 680c772f6f..a901e01d45 100644 --- a/chardev/msmouse.c +++ b/chardev/msmouse.c @@ -27,11 +27,12 @@ #include "chardev/char.h" #include "ui/console.h" #include "ui/input.h" +#include "qom/object.h" #define MSMOUSE_LO6(n) ((n) & 0x3f) #define MSMOUSE_HI2(n) (((n) & 0xc0) >> 6) -typedef struct { +struct MouseChardev { Chardev parent; QemuInputHandlerState *hs; @@ -40,7 +41,8 @@ typedef struct { bool btnc[INPUT_BUTTON__MAX]; uint8_t outbuf[32]; int outlen; -} MouseChardev; +}; +typedef struct MouseChardev MouseChardev; #define TYPE_CHARDEV_MSMOUSE "chardev-msmouse" #define MOUSE_CHARDEV(obj) \ diff --git a/chardev/testdev.c b/chardev/testdev.c index 0c0ddc17d7..ce1370cd70 100644 --- a/chardev/testdev.c +++ b/chardev/testdev.c @@ -27,15 +27,17 @@ #include "qemu/osdep.h" #include "qemu/module.h" #include "chardev/char.h" +#include "qom/object.h" #define BUF_SIZE 32 -typedef struct { +struct TestdevChardev { Chardev parent; uint8_t in_buf[32]; int in_buf_used; -} TestdevChardev; +}; +typedef struct TestdevChardev TestdevChardev; #define TYPE_CHARDEV_TESTDEV "chardev-testdev" #define TESTDEV_CHARDEV(obj) \ diff --git a/chardev/wctablet.c b/chardev/wctablet.c index 95c7504002..76f29a793f 100644 --- a/chardev/wctablet.c +++ b/chardev/wctablet.c @@ -32,6 +32,7 @@ #include "ui/console.h" #include "ui/input.h" #include "trace.h" +#include "qom/object.h" #define WC_OUTPUT_BUF_MAX_LEN 512 @@ -64,7 +65,7 @@ uint8_t WC_FULL_CONFIG_STRING[WC_FULL_CONFIG_STRING_LENGTH + 1] = { }; /* This structure is used to save private info for Wacom Tablet. */ -typedef struct { +struct TabletChardev { Chardev parent; QemuInputHandlerState *hs; @@ -81,7 +82,8 @@ typedef struct { int axis[INPUT_AXIS__MAX]; bool btns[INPUT_BUTTON__MAX]; -} TabletChardev; +}; +typedef struct TabletChardev TabletChardev; #define TYPE_CHARDEV_WCTABLET "chardev-wctablet" #define WCTABLET_CHARDEV(obj) \ diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index f27f6660f9..4ab0f2b6ae 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -45,6 +45,7 @@ #include "migration/vmstate.h" #include "hw/core/cpu.h" #include "trace.h" +#include "qom/object.h" #define GPE_BASE 0xafe0 #define GPE_LEN 4 @@ -54,7 +55,7 @@ struct pci_status { uint32_t down; }; -typedef struct PIIX4PMState { +struct PIIX4PMState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -88,7 +89,8 @@ typedef struct PIIX4PMState { CPUHotplugState cpuhp_state; MemHotplugState acpi_memory_hotplug; -} PIIX4PMState; +}; +typedef struct PIIX4PMState PIIX4PMState; #define PIIX4_PM(obj) \ OBJECT_CHECK(PIIX4PMState, (obj), TYPE_PIIX4_PM) diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 637411c10b..d60f02fcde 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -15,6 +15,7 @@ #include "hw/irq.h" #include "alpha_sys.h" #include "exec/address-spaces.h" +#include "qom/object.h" #define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" @@ -49,16 +50,17 @@ typedef struct TyphoonPchip { TyphoonWindow win[4]; } TyphoonPchip; +typedef struct TyphoonState TyphoonState; #define TYPHOON_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(TyphoonState, (obj), TYPE_TYPHOON_PCI_HOST_BRIDGE) -typedef struct TyphoonState { +struct TyphoonState { PCIHostState parent_obj; TyphoonCchip cchip; TyphoonPchip pchip; MemoryRegion dchip_region; -} TyphoonState; +}; /* Called when one of DRIR or DIM changes. */ static void cpu_irq_change(AlphaCPU *cpu, uint64_t req) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index 041bab40ef..f2d8d3c529 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -18,12 +18,14 @@ #include "hw/block/flash.h" #include "exec/address-spaces.h" #include "cpu.h" +#include "qom/object.h" -typedef struct { +struct CollieMachineState { MachineState parent; StrongARMState *sa1110; -} CollieMachineState; +}; +typedef struct CollieMachineState CollieMachineState; #define TYPE_COLLIE_MACHINE MACHINE_TYPE_NAME("collie") #define COLLIE_MACHINE(obj) \ diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index 07dad406b4..fa7dc3875a 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -36,6 +36,7 @@ #include "hw/cpu/a9mpcore.h" #include "hw/cpu/a15mpcore.h" #include "qemu/log.h" +#include "qom/object.h" #define SMP_BOOT_ADDR 0x100 #define SMP_BOOT_REG 0x40 @@ -155,17 +156,18 @@ static const MemoryRegionOps hb_mem_ops = { }; #define TYPE_HIGHBANK_REGISTERS "highbank-regs" +typedef struct HighbankRegsState HighbankRegsState; #define HIGHBANK_REGISTERS(obj) \ OBJECT_CHECK(HighbankRegsState, (obj), TYPE_HIGHBANK_REGISTERS) -typedef struct { +struct HighbankRegsState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion iomem; uint32_t regs[NUM_REGS]; -} HighbankRegsState; +}; static VMStateDescription vmstate_highbank_regs = { .name = "highbank-regs", diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 1be8ed5228..6d939f69a1 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -25,12 +25,14 @@ #include "hw/char/pl011.h" #include "hw/hw.h" #include "hw/irq.h" +#include "qom/object.h" #define TYPE_INTEGRATOR_CM "integrator_core" +typedef struct IntegratorCMState IntegratorCMState; #define INTEGRATOR_CM(obj) \ OBJECT_CHECK(IntegratorCMState, (obj), TYPE_INTEGRATOR_CM) -typedef struct IntegratorCMState { +struct IntegratorCMState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -50,7 +52,7 @@ typedef struct IntegratorCMState { uint32_t int_level; uint32_t irq_enabled; uint32_t fiq_enabled; -} IntegratorCMState; +}; static uint8_t integrator_spd[128] = { 128, 8, 4, 11, 9, 1, 64, 0, 2, 0xa0, 0xa0, 0, 0, 8, 0, 1, @@ -325,10 +327,11 @@ static void integratorcm_realize(DeviceState *d, Error **errp) /* Primary interrupt controller. */ #define TYPE_INTEGRATOR_PIC "integrator_pic" +typedef struct icp_pic_state icp_pic_state; #define INTEGRATOR_PIC(obj) \ OBJECT_CHECK(icp_pic_state, (obj), TYPE_INTEGRATOR_PIC) -typedef struct icp_pic_state { +struct icp_pic_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -339,7 +342,7 @@ typedef struct icp_pic_state { uint32_t fiq_enabled; qemu_irq parent_irq; qemu_irq parent_fiq; -} icp_pic_state; +}; static const VMStateDescription vmstate_icp_pic = { .name = "icp_pic", @@ -464,10 +467,11 @@ static void icp_pic_init(Object *obj) /* CP control registers. */ #define TYPE_ICP_CONTROL_REGS "icp-ctrl-regs" +typedef struct ICPCtrlRegsState ICPCtrlRegsState; #define ICP_CONTROL_REGS(obj) \ OBJECT_CHECK(ICPCtrlRegsState, (obj), TYPE_ICP_CONTROL_REGS) -typedef struct ICPCtrlRegsState { +struct ICPCtrlRegsState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -476,7 +480,7 @@ typedef struct ICPCtrlRegsState { qemu_irq mmc_irq; uint32_t intreg_state; -} ICPCtrlRegsState; +}; #define ICP_GPIO_MMC_WPROT "mmc-wprot" #define ICP_GPIO_MMC_CARDIN "mmc-cardin" diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c index 92331aebf1..a5b7319dcc 100644 --- a/hw/arm/microbit.c +++ b/hw/arm/microbit.c @@ -18,13 +18,15 @@ #include "hw/arm/nrf51_soc.h" #include "hw/i2c/microbit_i2c.h" #include "hw/qdev-properties.h" +#include "qom/object.h" -typedef struct { +struct MicrobitMachineState { MachineState parent; NRF51State nrf51; MicrobitI2CState i2c; -} MicrobitMachineState; +}; +typedef struct MicrobitMachineState MicrobitMachineState; #define TYPE_MICROBIT_MACHINE MACHINE_TYPE_NAME("microbit") diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 0a1819fd67..7c0efa6a9a 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -62,6 +62,7 @@ #include "hw/net/lan9118.h" #include "net/net.h" #include "hw/core/split-irq.h" +#include "qom/object.h" #define MPS2TZ_NUMIRQ 92 @@ -70,14 +71,15 @@ typedef enum MPS2TZFPGAType { FPGA_AN521, } MPS2TZFPGAType; -typedef struct { +struct MPS2TZMachineClass { MachineClass parent; MPS2TZFPGAType fpga_type; uint32_t scc_id; const char *armsse_type; -} MPS2TZMachineClass; +}; +typedef struct MPS2TZMachineClass MPS2TZMachineClass; -typedef struct { +struct MPS2TZMachineState { MachineState parent; ARMSSE iotkit; @@ -99,7 +101,8 @@ typedef struct { qemu_or_irq uart_irq_orgate; DeviceState *lan9118; SplitIRQ cpu_irq_splitter[MPS2TZ_NUMIRQ]; -} MPS2TZMachineState; +}; +typedef struct MPS2TZMachineState MPS2TZMachineState; #define TYPE_MPS2TZ_MACHINE "mps2tz" #define TYPE_MPS2TZ_AN505_MACHINE MACHINE_TYPE_NAME("mps2-an505") diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index 4ca6e1ce12..45db6ec52f 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -44,19 +44,21 @@ #include "hw/net/lan9118.h" #include "net/net.h" #include "hw/watchdog/cmsdk-apb-watchdog.h" +#include "qom/object.h" typedef enum MPS2FPGAType { FPGA_AN385, FPGA_AN511, } MPS2FPGAType; -typedef struct { +struct MPS2MachineClass { MachineClass parent; MPS2FPGAType fpga_type; uint32_t scc_id; -} MPS2MachineClass; +}; +typedef struct MPS2MachineClass MPS2MachineClass; -typedef struct { +struct MPS2MachineState { MachineState parent; ARMv7MState armv7m; @@ -75,7 +77,8 @@ typedef struct { /* CMSDK APB subsystem */ CMSDKAPBDualTimer dualtimer; CMSDKAPBWatchdog watchdog; -} MPS2MachineState; +}; +typedef struct MPS2MachineState MPS2MachineState; #define TYPE_MPS2_MACHINE "mps2" #define TYPE_MPS2_AN385_MACHINE MACHINE_TYPE_NAME("mps2-an385") diff --git a/hw/arm/musca.c b/hw/arm/musca.c index 8afc118134..9831f90820 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -33,6 +33,7 @@ #include "hw/misc/tz-ppc.h" #include "hw/misc/unimp.h" #include "hw/rtc/pl031.h" +#include "qom/object.h" #define MUSCA_NUMIRQ_MAX 96 #define MUSCA_PPC_MAX 3 @@ -45,7 +46,7 @@ typedef enum MuscaType { MUSCA_B1, } MuscaType; -typedef struct { +struct MuscaMachineClass { MachineClass parent; MuscaType type; uint32_t init_svtor; @@ -53,9 +54,10 @@ typedef struct { int num_irqs; const MPCInfo *mpc_info; int num_mpcs; -} MuscaMachineClass; +}; +typedef struct MuscaMachineClass MuscaMachineClass; -typedef struct { +struct MuscaMachineState { MachineState parent; ARMSSE sse; @@ -81,7 +83,8 @@ typedef struct { UnimplementedDeviceState sdio; UnimplementedDeviceState gpio; UnimplementedDeviceState cryptoisland; -} MuscaMachineState; +}; +typedef struct MuscaMachineState MuscaMachineState; #define TYPE_MUSCA_MACHINE "musca" #define TYPE_MUSCA_A_MACHINE MACHINE_TYPE_NAME("musca-a") diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 9decd7abd1..79d202aa50 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -33,6 +33,7 @@ #include "exec/address-spaces.h" #include "ui/pixel_ops.h" #include "qemu/cutils.h" +#include "qom/object.h" #define MP_MISC_BASE 0x80002000 #define MP_MISC_SIZE 0x00001000 @@ -153,10 +154,11 @@ typedef struct mv88w8618_rx_desc { } mv88w8618_rx_desc; #define TYPE_MV88W8618_ETH "mv88w8618_eth" +typedef struct mv88w8618_eth_state mv88w8618_eth_state; #define MV88W8618_ETH(obj) \ OBJECT_CHECK(mv88w8618_eth_state, (obj), TYPE_MV88W8618_ETH) -typedef struct mv88w8618_eth_state { +struct mv88w8618_eth_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -174,7 +176,7 @@ typedef struct mv88w8618_eth_state { uint32_t cur_rx[4]; NICState *nic; NICConf conf; -} mv88w8618_eth_state; +}; static void eth_rx_desc_put(uint32_t addr, mv88w8618_rx_desc *desc) { @@ -469,10 +471,11 @@ TYPE_INFO(mv88w8618_eth_info) #define MP_LCD_TEXTCOLOR 0xe0e0ff /* RRGGBB */ #define TYPE_MUSICPAL_LCD "musicpal_lcd" +typedef struct musicpal_lcd_state musicpal_lcd_state; #define MUSICPAL_LCD(obj) \ OBJECT_CHECK(musicpal_lcd_state, (obj), TYPE_MUSICPAL_LCD) -typedef struct musicpal_lcd_state { +struct musicpal_lcd_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -485,7 +488,7 @@ typedef struct musicpal_lcd_state { uint32_t page_off; QemuConsole *con; uint8_t video_ram[128*64/8]; -} musicpal_lcd_state; +}; static uint8_t scale_lcd_color(musicpal_lcd_state *s, uint8_t col) { @@ -687,10 +690,11 @@ TYPE_INFO(musicpal_lcd_info) #define MP_PIC_ENABLE_CLR 0x0C #define TYPE_MV88W8618_PIC "mv88w8618_pic" +typedef struct mv88w8618_pic_state mv88w8618_pic_state; #define MV88W8618_PIC(obj) \ OBJECT_CHECK(mv88w8618_pic_state, (obj), TYPE_MV88W8618_PIC) -typedef struct mv88w8618_pic_state { +struct mv88w8618_pic_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -699,7 +703,7 @@ typedef struct mv88w8618_pic_state { uint32_t level; uint32_t enabled; qemu_irq parent_irq; -} mv88w8618_pic_state; +}; static void mv88w8618_pic_update(mv88w8618_pic_state *s) { @@ -825,17 +829,18 @@ typedef struct mv88w8618_timer_state { } mv88w8618_timer_state; #define TYPE_MV88W8618_PIT "mv88w8618_pit" +typedef struct mv88w8618_pit_state mv88w8618_pit_state; #define MV88W8618_PIT(obj) \ OBJECT_CHECK(mv88w8618_pit_state, (obj), TYPE_MV88W8618_PIT) -typedef struct mv88w8618_pit_state { +struct mv88w8618_pit_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion iomem; mv88w8618_timer_state timer[4]; -} mv88w8618_pit_state; +}; static void mv88w8618_timer_tick(void *opaque) { @@ -993,17 +998,18 @@ TYPE_INFO(mv88w8618_pit_info) #define MP_FLASHCFG_CFGR0 0x04 #define TYPE_MV88W8618_FLASHCFG "mv88w8618_flashcfg" +typedef struct mv88w8618_flashcfg_state mv88w8618_flashcfg_state; #define MV88W8618_FLASHCFG(obj) \ OBJECT_CHECK(mv88w8618_flashcfg_state, (obj), TYPE_MV88W8618_FLASHCFG) -typedef struct mv88w8618_flashcfg_state { +struct mv88w8618_flashcfg_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion iomem; uint32_t cfgr0; -} mv88w8618_flashcfg_state; +}; static uint64_t mv88w8618_flashcfg_read(void *opaque, hwaddr offset, @@ -1080,10 +1086,11 @@ TYPE_INFO(mv88w8618_flashcfg_info) #define MP_BOARD_REVISION 0x31 -typedef struct { +struct MusicPalMiscState { SysBusDevice parent_obj; MemoryRegion iomem; -} MusicPalMiscState; +}; +typedef struct MusicPalMiscState MusicPalMiscState; #define TYPE_MUSICPAL_MISC "musicpal-misc" #define MUSICPAL_MISC(obj) \ @@ -1193,10 +1200,11 @@ static void mv88w8618_wlan_realize(DeviceState *dev, Error **errp) #define MP_OE_LCD_BRIGHTNESS 0x0007 #define TYPE_MUSICPAL_GPIO "musicpal_gpio" +typedef struct musicpal_gpio_state musicpal_gpio_state; #define MUSICPAL_GPIO(obj) \ OBJECT_CHECK(musicpal_gpio_state, (obj), TYPE_MUSICPAL_GPIO) -typedef struct musicpal_gpio_state { +struct musicpal_gpio_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -1210,7 +1218,7 @@ typedef struct musicpal_gpio_state { uint32_t isr; qemu_irq irq; qemu_irq out[5]; /* 3 brightness out + 2 lcd (data and clock ) */ -} musicpal_gpio_state; +}; static void musicpal_gpio_brightness_update(musicpal_gpio_state *s) { int i; @@ -1444,10 +1452,11 @@ TYPE_INFO(musicpal_gpio_info) #define MP_KEY_BTN_NAVIGATION (1 << 7) #define TYPE_MUSICPAL_KEY "musicpal_key" +typedef struct musicpal_key_state musicpal_key_state; #define MUSICPAL_KEY(obj) \ OBJECT_CHECK(musicpal_key_state, (obj), TYPE_MUSICPAL_KEY) -typedef struct musicpal_key_state { +struct musicpal_key_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -1456,7 +1465,7 @@ typedef struct musicpal_key_state { uint32_t kbd_extended; uint32_t pressed_keys; qemu_irq out[8]; -} musicpal_key_state; +}; static void musicpal_key_event(void *opaque, int keycode) { diff --git a/hw/arm/palm.c b/hw/arm/palm.c index 7980d321ee..70fb1ef59b 100644 --- a/hw/arm/palm.c +++ b/hw/arm/palm.c @@ -32,6 +32,7 @@ #include "exec/address-spaces.h" #include "cpu.h" #include "qemu/cutils.h" +#include "qom/object.h" static uint64_t static_read(void *opaque, hwaddr offset, unsigned size) { @@ -132,12 +133,13 @@ static void palmte_button_event(void *opaque, int keycode) */ #define TYPE_PALM_MISC_GPIO "palm-misc-gpio" +typedef struct PalmMiscGPIOState PalmMiscGPIOState; #define PALM_MISC_GPIO(obj) \ OBJECT_CHECK(PalmMiscGPIOState, (obj), TYPE_PALM_MISC_GPIO) -typedef struct PalmMiscGPIOState { +struct PalmMiscGPIOState { SysBusDevice parent_obj; -} PalmMiscGPIOState; +}; static void palmte_onoff_gpios(void *opaque, int line, int level) { diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index e2acf9b724..a4bb86b8dd 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -27,6 +27,7 @@ #include "sysemu/qtest.h" #include "qemu/cutils.h" #include "qemu/log.h" +#include "qom/object.h" static struct { hwaddr io_base; @@ -468,11 +469,12 @@ static const VMStateDescription vmstate_pxa2xx_mm = { }; #define TYPE_PXA2XX_SSP "pxa2xx-ssp" +typedef struct PXA2xxSSPState PXA2xxSSPState; #define PXA2XX_SSP(obj) \ OBJECT_CHECK(PXA2xxSSPState, (obj), TYPE_PXA2XX_SSP) /* Synchronous Serial Ports */ -typedef struct { +struct PXA2xxSSPState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -494,7 +496,7 @@ typedef struct { uint32_t rx_fifo[16]; uint32_t rx_level; uint32_t rx_start; -} PXA2xxSSPState; +}; static bool pxa2xx_ssp_vmstate_validate(void *opaque, int version_id) { @@ -808,10 +810,11 @@ static void pxa2xx_ssp_init(Object *obj) #define PIAR 0x38 /* RTC Periodic Interrupt Alarm register */ #define TYPE_PXA2XX_RTC "pxa2xx_rtc" +typedef struct PXA2xxRTCState PXA2xxRTCState; #define PXA2XX_RTC(obj) \ OBJECT_CHECK(PXA2xxRTCState, (obj), TYPE_PXA2XX_RTC) -typedef struct { +struct PXA2xxRTCState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -842,7 +845,7 @@ typedef struct { QEMUTimer *rtc_swal2; QEMUTimer *rtc_pi; qemu_irq rtc_irq; -} PXA2xxRTCState; +}; static inline void pxa2xx_rtc_int_update(PXA2xxRTCState *s) { @@ -1242,14 +1245,15 @@ TYPE_INFO(pxa2xx_rtc_sysbus_info) /* I2C Interface */ #define TYPE_PXA2XX_I2C_SLAVE "pxa2xx-i2c-slave" +typedef struct PXA2xxI2CSlaveState PXA2xxI2CSlaveState; #define PXA2XX_I2C_SLAVE(obj) \ OBJECT_CHECK(PXA2xxI2CSlaveState, (obj), TYPE_PXA2XX_I2C_SLAVE) -typedef struct PXA2xxI2CSlaveState { +struct PXA2xxI2CSlaveState { I2CSlave parent_obj; PXA2xxI2CState *host; -} PXA2xxI2CSlaveState; +}; struct PXA2xxI2CState { /*< private >*/ diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index a0f3592f17..817e7a1de5 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -17,14 +17,15 @@ #include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define PXA2XX_GPIO_BANKS 4 #define TYPE_PXA2XX_GPIO "pxa2xx-gpio" +typedef struct PXA2xxGPIOInfo PXA2xxGPIOInfo; #define PXA2XX_GPIO(obj) \ OBJECT_CHECK(PXA2xxGPIOInfo, (obj), TYPE_PXA2XX_GPIO) -typedef struct PXA2xxGPIOInfo PXA2xxGPIOInfo; struct PXA2xxGPIOInfo { /*< private >*/ SysBusDevice parent_obj; diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index bfc0dd8df6..34b13f470f 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -16,6 +16,7 @@ #include "hw/arm/pxa.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qom/object.h" #define ICIP 0x00 /* Interrupt Controller IRQ Pending register */ #define ICMR 0x04 /* Interrupt Controller Mask register */ @@ -37,10 +38,11 @@ #define PXA2XX_PIC_SRCS 40 #define TYPE_PXA2XX_PIC "pxa2xx_pic" +typedef struct PXA2xxPICState PXA2xxPICState; #define PXA2XX_PIC(obj) \ OBJECT_CHECK(PXA2xxPICState, (obj), TYPE_PXA2XX_PIC) -typedef struct { +struct PXA2xxPICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -52,7 +54,7 @@ typedef struct { uint32_t is_fiq[2]; uint32_t int_idle; uint32_t priority[PXA2XX_PIC_SRCS]; -} PXA2xxPICState; +}; static void pxa2xx_pic_update(void *opaque) { diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index b2d6c9688f..d9f7eeb06b 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -24,6 +24,7 @@ #include "hw/loader.h" #include "hw/arm/boot.h" #include "sysemu/sysemu.h" +#include "qom/object.h" #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */ #define MVBAR_ADDR 0x400 /* secure vectors */ @@ -35,19 +36,21 @@ /* Registered machine type (matches RPi Foundation bootloader and U-Boot) */ #define MACH_TYPE_BCM2708 3138 -typedef struct RaspiMachineState { +struct RaspiMachineState { /*< private >*/ MachineState parent_obj; /*< public >*/ BCM283XState soc; -} RaspiMachineState; +}; +typedef struct RaspiMachineState RaspiMachineState; -typedef struct RaspiMachineClass { +struct RaspiMachineClass { /*< private >*/ MachineClass parent_obj; /*< public >*/ uint32_t board_rev; -} RaspiMachineClass; +}; +typedef struct RaspiMachineClass RaspiMachineClass; #define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common") #define RASPI_MACHINE(obj) \ diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index e6715ab638..3f01ad40d2 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -41,6 +41,7 @@ #include "hw/usb.h" #include "hw/char/pl011.h" #include "net/net.h" +#include "qom/object.h" #define RAMLIMIT_GB 8192 #define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB) @@ -83,7 +84,7 @@ typedef struct MemMapEntry { hwaddr size; } MemMapEntry; -typedef struct { +struct SBSAMachineState { MachineState parent; struct arm_boot_info bootinfo; int smp_cpus; @@ -92,7 +93,8 @@ typedef struct { int psci_conduit; DeviceState *gic; PFlashCFI01 *flash[2]; -} SBSAMachineState; +}; +typedef struct SBSAMachineState SBSAMachineState; #define TYPE_SBSA_MACHINE MACHINE_TYPE_NAME("sbsa-ref") #define SBSA_MACHINE(obj) \ diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index 9c762ecedd..ecbe69dd04 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -34,16 +34,18 @@ #include "migration/vmstate.h" #include "exec/address-spaces.h" #include "cpu.h" +#include "qom/object.h" enum spitz_model_e { spitz, akita, borzoi, terrier }; -typedef struct { +struct SpitzMachineClass { MachineClass parent; enum spitz_model_e model; int arm_id; -} SpitzMachineClass; +}; +typedef struct SpitzMachineClass SpitzMachineClass; -typedef struct { +struct SpitzMachineState { MachineState parent; PXA2xxState *mpu; DeviceState *mux; @@ -53,7 +55,8 @@ typedef struct { DeviceState *scp0; DeviceState *scp1; DeviceState *misc_gpio; -} SpitzMachineState; +}; +typedef struct SpitzMachineState SpitzMachineState; #define TYPE_SPITZ_MACHINE "spitz-common" #define SPITZ_MACHINE(obj) \ @@ -85,9 +88,10 @@ typedef struct { #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) #define TYPE_SL_NAND "sl-nand" +typedef struct SLNANDState SLNANDState; #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND) -typedef struct { +struct SLNANDState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -96,7 +100,7 @@ typedef struct { uint8_t manf_id; uint8_t chip_id; ECCState ecc; -} SLNANDState; +}; static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) { @@ -261,10 +265,11 @@ static const int spitz_gpiomap[5] = { }; #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" +typedef struct SpitzKeyboardState SpitzKeyboardState; #define SPITZ_KEYBOARD(obj) \ OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD) -typedef struct { +struct SpitzKeyboardState { SysBusDevice parent_obj; qemu_irq sense[SPITZ_KEY_SENSE_NUM]; @@ -280,7 +285,7 @@ typedef struct { uint8_t fifo[16]; int fifopos, fifolen; QEMUTimer *kbdtimer; -} SpitzKeyboardState; +}; static void spitz_keyboard_sense_update(SpitzKeyboardState *s) { @@ -580,13 +585,14 @@ static void spitz_keyboard_realize(DeviceState *dev, Error **errp) #define LCDTG_POLCTRL 0x07 #define TYPE_SPITZ_LCDTG "spitz-lcdtg" +typedef struct SpitzLCDTG SpitzLCDTG; #define SPITZ_LCDTG(obj) OBJECT_CHECK(SpitzLCDTG, (obj), TYPE_SPITZ_LCDTG) -typedef struct { +struct SpitzLCDTG { SSISlave ssidev; uint32_t bl_intensity; uint32_t bl_power; -} SpitzLCDTG; +}; static void spitz_bl_update(SpitzLCDTG *s) { @@ -668,14 +674,15 @@ static void spitz_lcdtg_realize(SSISlave *ssi, Error **errp) #define SPITZ_GPIO_TP_INT 11 #define TYPE_CORGI_SSP "corgi-ssp" +typedef struct CorgiSSPState CorgiSSPState; #define CORGI_SSP(obj) OBJECT_CHECK(CorgiSSPState, (obj), TYPE_CORGI_SSP) /* "Demux" the signal based on current chipselect */ -typedef struct { +struct CorgiSSPState { SSISlave ssidev; SSIBus *bus[3]; uint32_t enable[3]; -} CorgiSSPState; +}; static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value) { @@ -819,14 +826,15 @@ static void spitz_akita_i2c_setup(PXA2xxState *cpu) * + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x */ #define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio" +typedef struct SpitzMiscGPIOState SpitzMiscGPIOState; #define SPITZ_MISC_GPIO(obj) \ OBJECT_CHECK(SpitzMiscGPIOState, (obj), TYPE_SPITZ_MISC_GPIO) -typedef struct SpitzMiscGPIOState { +struct SpitzMiscGPIOState { SysBusDevice parent_obj; qemu_irq adc_value; -} SpitzMiscGPIOState; +}; static void spitz_misc_charging(void *opaque, int n, int level) { diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 0bf2be0e27..b52eb69aac 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -27,6 +27,7 @@ #include "migration/vmstate.h" #include "hw/misc/unimp.h" #include "cpu.h" +#include "qom/object.h" #define GPIO_A 0 #define GPIO_B 1 @@ -57,10 +58,11 @@ typedef const struct { /* General purpose timer module. */ #define TYPE_STELLARIS_GPTM "stellaris-gptm" +typedef struct gptm_state gptm_state; #define STELLARIS_GPTM(obj) \ OBJECT_CHECK(gptm_state, (obj), TYPE_STELLARIS_GPTM) -typedef struct gptm_state { +struct gptm_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -80,7 +82,7 @@ typedef struct gptm_state { /* The timers have an alternate output used to trigger the ADC. */ qemu_irq trigger; qemu_irq irq; -} gptm_state; +}; static void gptm_update_irq(gptm_state *s) { @@ -719,10 +721,11 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq, /* I2C controller. */ #define TYPE_STELLARIS_I2C "stellaris-i2c" +typedef struct stellaris_i2c_state stellaris_i2c_state; #define STELLARIS_I2C(obj) \ OBJECT_CHECK(stellaris_i2c_state, (obj), TYPE_STELLARIS_I2C) -typedef struct { +struct stellaris_i2c_state { SysBusDevice parent_obj; I2CBus *bus; @@ -735,7 +738,7 @@ typedef struct { uint32_t mimr; uint32_t mris; uint32_t mcr; -} stellaris_i2c_state; +}; #define STELLARIS_I2C_MCS_BUSY 0x01 #define STELLARIS_I2C_MCS_ERROR 0x02 @@ -932,10 +935,11 @@ static void stellaris_i2c_init(Object *obj) #define STELLARIS_ADC_FIFO_FULL 0x1000 #define TYPE_STELLARIS_ADC "stellaris-adc" +typedef struct StellarisADCState stellaris_adc_state; #define STELLARIS_ADC(obj) \ OBJECT_CHECK(stellaris_adc_state, (obj), TYPE_STELLARIS_ADC) -typedef struct StellarisADCState { +struct StellarisADCState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -955,7 +959,7 @@ typedef struct StellarisADCState { uint32_t ssctl[4]; uint32_t noise; qemu_irq irq[4]; -} stellaris_adc_state; +}; static uint32_t stellaris_adc_fifo_read(stellaris_adc_state *s, int n) { diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 5c1fb66b98..538eaccceb 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -45,6 +45,7 @@ #include "qapi/error.h" #include "qemu/cutils.h" #include "qemu/log.h" +#include "qom/object.h" //#define DEBUG @@ -84,10 +85,11 @@ static struct { /* Interrupt Controller */ #define TYPE_STRONGARM_PIC "strongarm_pic" +typedef struct StrongARMPICState StrongARMPICState; #define STRONGARM_PIC(obj) \ OBJECT_CHECK(StrongARMPICState, (obj), TYPE_STRONGARM_PIC) -typedef struct StrongARMPICState { +struct StrongARMPICState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -98,7 +100,7 @@ typedef struct StrongARMPICState { uint32_t enabled; uint32_t is_fiq; uint32_t int_idle; -} StrongARMPICState; +}; #define ICIP 0x00 #define ICMR 0x04 @@ -253,10 +255,11 @@ TYPE_INFO(strongarm_pic_info) * f = 32 768 / (RTTR_trim + 1) */ #define TYPE_STRONGARM_RTC "strongarm-rtc" +typedef struct StrongARMRTCState StrongARMRTCState; #define STRONGARM_RTC(obj) \ OBJECT_CHECK(StrongARMRTCState, (obj), TYPE_STRONGARM_RTC) -typedef struct StrongARMRTCState { +struct StrongARMRTCState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -269,7 +272,7 @@ typedef struct StrongARMRTCState { QEMUTimer *rtc_hz; qemu_irq rtc_irq; qemu_irq rtc_hz_irq; -} StrongARMRTCState; +}; static inline void strongarm_rtc_int_update(StrongARMRTCState *s) { @@ -480,10 +483,10 @@ TYPE_INFO(strongarm_rtc_sysbus_info) #define GAFR 0x1c #define TYPE_STRONGARM_GPIO "strongarm-gpio" +typedef struct StrongARMGPIOInfo StrongARMGPIOInfo; #define STRONGARM_GPIO(obj) \ OBJECT_CHECK(StrongARMGPIOInfo, (obj), TYPE_STRONGARM_GPIO) -typedef struct StrongARMGPIOInfo StrongARMGPIOInfo; struct StrongARMGPIOInfo { SysBusDevice busdev; MemoryRegion iomem; @@ -720,10 +723,10 @@ TYPE_INFO(strongarm_gpio_info) #define PPFR 0x10 #define TYPE_STRONGARM_PPC "strongarm-ppc" +typedef struct StrongARMPPCInfo StrongARMPPCInfo; #define STRONGARM_PPC(obj) \ OBJECT_CHECK(StrongARMPPCInfo, (obj), TYPE_STRONGARM_PPC) -typedef struct StrongARMPPCInfo StrongARMPPCInfo; struct StrongARMPPCInfo { SysBusDevice parent_obj; @@ -922,10 +925,11 @@ TYPE_INFO(strongarm_ppc_info) #define RX_FIFO_ROR (1 << 10) #define TYPE_STRONGARM_UART "strongarm-uart" +typedef struct StrongARMUARTState StrongARMUARTState; #define STRONGARM_UART(obj) \ OBJECT_CHECK(StrongARMUARTState, (obj), TYPE_STRONGARM_UART) -typedef struct StrongARMUARTState { +struct StrongARMUARTState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -949,7 +953,7 @@ typedef struct StrongARMUARTState { bool wait_break_end; QEMUTimer *rx_timeout_timer; QEMUTimer *tx_timer; -} StrongARMUARTState; +}; static void strongarm_uart_update_status(StrongARMUARTState *s) { @@ -1354,10 +1358,11 @@ TYPE_INFO(strongarm_uart_info) /* Synchronous Serial Ports */ #define TYPE_STRONGARM_SSP "strongarm-ssp" +typedef struct StrongARMSSPState StrongARMSSPState; #define STRONGARM_SSP(obj) \ OBJECT_CHECK(StrongARMSSPState, (obj), TYPE_STRONGARM_SSP) -typedef struct StrongARMSSPState { +struct StrongARMSSPState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -1370,7 +1375,7 @@ typedef struct StrongARMSSPState { uint16_t rx_fifo[8]; uint8_t rx_level; uint8_t rx_start; -} StrongARMSSPState; +}; #define SSCR0 0x60 /* SSP Control register 0 */ #define SSCR1 0x64 /* SSP Control register 1 */ diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c index 86a1a21adf..da48f4ddcd 100644 --- a/hw/arm/tosa.c +++ b/hw/arm/tosa.c @@ -25,6 +25,7 @@ #include "hw/ssi/ssi.h" #include "hw/sysbus.h" #include "exec/address-spaces.h" +#include "qom/object.h" #define TOSA_RAM 0x04000000 #define TOSA_ROM 0x00800000 @@ -74,12 +75,13 @@ static void tosa_microdrive_attach(PXA2xxState *cpu) */ #define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio" +typedef struct TosaMiscGPIOState TosaMiscGPIOState; #define TOSA_MISC_GPIO(obj) \ OBJECT_CHECK(TosaMiscGPIOState, (obj), TYPE_TOSA_MISC_GPIO) -typedef struct TosaMiscGPIOState { +struct TosaMiscGPIOState { SysBusDevice parent_obj; -} TosaMiscGPIOState; +}; static void tosa_gpio_leds(void *opaque, int line, int level) { @@ -170,14 +172,15 @@ static void tosa_ssp_realize(SSISlave *dev, Error **errp) } #define TYPE_TOSA_DAC "tosa_dac" +typedef struct TosaDACState TosaDACState; #define TOSA_DAC(obj) OBJECT_CHECK(TosaDACState, (obj), TYPE_TOSA_DAC) -typedef struct { +struct TosaDACState { I2CSlave parent_obj; int len; char buf[3]; -} TosaDACState; +}; static int tosa_dac_send(I2CSlave *i2c, uint8_t data) { diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index c89fe65d97..2cf8a92692 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -25,6 +25,7 @@ #include "hw/block/flash.h" #include "qemu/error-report.h" #include "hw/char/pl011.h" +#include "qom/object.h" #define VERSATILE_FLASH_ADDR 0x34000000 #define VERSATILE_FLASH_SIZE (64 * 1024 * 1024) @@ -33,10 +34,11 @@ /* Primary interrupt controller. */ #define TYPE_VERSATILE_PB_SIC "versatilepb_sic" +typedef struct vpb_sic_state vpb_sic_state; #define VERSATILE_PB_SIC(obj) \ OBJECT_CHECK(vpb_sic_state, (obj), TYPE_VERSATILE_PB_SIC) -typedef struct vpb_sic_state { +struct vpb_sic_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -45,7 +47,7 @@ typedef struct vpb_sic_state { uint32_t pic_enable; qemu_irq parent[32]; int irq; -} vpb_sic_state; +}; static const VMStateDescription vmstate_vpb_sic = { .name = "versatilepb_sic", diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 4efbe82cb3..a85fa73f80 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -43,6 +43,7 @@ #include "hw/cpu/a9mpcore.h" #include "hw/cpu/a15mpcore.h" #include "hw/i2c/arm_sbcon_i2c.h" +#include "qom/object.h" #define VEXPRESS_BOARD_ID 0x8e0 #define VEXPRESS_FLASH_SIZE (64 * 1024 * 1024) @@ -165,16 +166,18 @@ static hwaddr motherboard_aseries_map[] = { typedef struct VEDBoardInfo VEDBoardInfo; -typedef struct { +struct VexpressMachineClass { MachineClass parent; VEDBoardInfo *daughterboard; -} VexpressMachineClass; +}; +typedef struct VexpressMachineClass VexpressMachineClass; -typedef struct { +struct VexpressMachineState { MachineState parent; bool secure; bool virt; -} VexpressMachineState; +}; +typedef struct VexpressMachineState VexpressMachineState; #define TYPE_VEXPRESS_MACHINE "vexpress" #define TYPE_VEXPRESS_A9_MACHINE MACHINE_TYPE_NAME("vexpress-a9") diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 0ba9e8c708..ef6b4c8a24 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -37,8 +37,10 @@ #include "hw/cpu/a9mpcore.h" #include "hw/qdev-clock.h" #include "sysemu/reset.h" +#include "qom/object.h" #define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9") +typedef struct ZynqMachineState ZynqMachineState; #define ZYNQ_MACHINE(obj) \ OBJECT_CHECK(ZynqMachineState, (obj), TYPE_ZYNQ_MACHINE) @@ -84,10 +86,10 @@ static const int dma_irqs[8] = { 0xe3401000 + ARMV7_IMM16(extract32((val), 16, 16)), /* movt r1 ... */ \ 0xe5801000 + (addr) -typedef struct ZynqMachineState { +struct ZynqMachineState { MachineState parent; Clock *ps_clk; -} ZynqMachineState; +}; static void zynq_write_board_setup(ARMCPU *cpu, const struct arm_boot_info *info) diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index f55295a816..505960d836 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -22,12 +22,14 @@ #include "cpu.h" #include "hw/qdev-properties.h" #include "hw/arm/xlnx-versal.h" +#include "qom/object.h" #define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt") +typedef struct VersalVirt VersalVirt; #define XLNX_VERSAL_VIRT_MACHINE(obj) \ OBJECT_CHECK(VersalVirt, (obj), TYPE_XLNX_VERSAL_VIRT_MACHINE) -typedef struct VersalVirt { +struct VersalVirt { MachineState parent_obj; Versal soc; @@ -45,7 +47,7 @@ typedef struct VersalVirt { struct { bool secure; } cfg; -} VersalVirt; +}; static void fdt_create(VersalVirt *s) { diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 6d1f38a99c..3e32c57274 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -24,8 +24,9 @@ #include "qemu/log.h" #include "sysemu/qtest.h" #include "sysemu/device_tree.h" +#include "qom/object.h" -typedef struct XlnxZCU102 { +struct XlnxZCU102 { MachineState parent_obj; XlnxZynqMPState soc; @@ -34,7 +35,8 @@ typedef struct XlnxZCU102 { bool virt; struct arm_boot_info binfo; -} XlnxZCU102; +}; +typedef struct XlnxZCU102 XlnxZCU102; #define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102") #define ZCU102_MACHINE(obj) \ diff --git a/hw/arm/z2.c b/hw/arm/z2.c index 9a9bbc653b..9c69481269 100644 --- a/hw/arm/z2.c +++ b/hw/arm/z2.c @@ -26,6 +26,7 @@ #include "exec/address-spaces.h" #include "sysemu/qtest.h" #include "cpu.h" +#include "qom/object.h" #ifdef DEBUG_Z2 #define DPRINTF(fmt, ...) \ @@ -102,14 +103,15 @@ static struct arm_boot_info z2_binfo = { #define Z2_GPIO_KEY_ON 1 #define Z2_GPIO_LCD_CS 88 -typedef struct { +struct ZipitLCD { SSISlave ssidev; int32_t selected; int32_t enabled; uint8_t buf[3]; uint32_t cur_reg; int pos; -} ZipitLCD; +}; +typedef struct ZipitLCD ZipitLCD; #define TYPE_ZIPIT_LCD "zipit-lcd" #define ZIPIT_LCD(obj) OBJECT_CHECK(ZipitLCD, (obj), TYPE_ZIPIT_LCD) @@ -195,14 +197,15 @@ static const TypeInfo zipit_lcd_info = { }; #define TYPE_AER915 "aer915" +typedef struct AER915State AER915State; #define AER915(obj) OBJECT_CHECK(AER915State, (obj), TYPE_AER915) -typedef struct AER915State { +struct AER915State { I2CSlave parent_obj; int len; uint8_t buf[3]; -} AER915State; +}; static int aer915_send(I2CSlave *i2c, uint8_t data) { diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c index 38522cf0ba..9614419b7a 100644 --- a/hw/audio/ac97.c +++ b/hw/audio/ac97.c @@ -25,6 +25,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "sysemu/dma.h" +#include "qom/object.h" enum { AC97_Reset = 0x00, @@ -126,6 +127,7 @@ enum { #define MUTE_SHIFT 15 #define TYPE_AC97 "AC97" +typedef struct AC97LinkState AC97LinkState; #define AC97(obj) \ OBJECT_CHECK(AC97LinkState, (obj), TYPE_AC97) @@ -158,7 +160,7 @@ typedef struct AC97BusMasterRegs { BD bd; } AC97BusMasterRegs; -typedef struct AC97LinkState { +struct AC97LinkState { PCIDevice dev; QEMUSoundCard card; uint32_t glob_cnt; @@ -175,7 +177,7 @@ typedef struct AC97LinkState { int bup_flag; MemoryRegion io_nam; MemoryRegion io_nabm; -} AC97LinkState; +}; enum { BUP_SET = 1, diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c index 65dff5b6fc..a216fe1925 100644 --- a/hw/audio/adlib.c +++ b/hw/audio/adlib.c @@ -29,6 +29,7 @@ #include "audio/audio.h" #include "hw/isa/isa.h" #include "hw/qdev-properties.h" +#include "qom/object.h" //#define DEBUG @@ -51,9 +52,10 @@ #define SHIFT 1 #define TYPE_ADLIB "adlib" +typedef struct AdlibState AdlibState; #define ADLIB(obj) OBJECT_CHECK(AdlibState, (obj), TYPE_ADLIB) -typedef struct { +struct AdlibState { ISADevice parent_obj; QEMUSoundCard card; @@ -73,7 +75,7 @@ typedef struct { QEMUAudioTimeStamp ats; FM_OPL *opl; PortioList port_list; -} AdlibState; +}; static void adlib_stop_opl_timer (AdlibState *s, size_t n) { diff --git a/hw/audio/cs4231.c b/hw/audio/cs4231.c index 2f8f75845e..d645f9455f 100644 --- a/hw/audio/cs4231.c +++ b/hw/audio/cs4231.c @@ -27,6 +27,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" /* * In addition to Crystal CS4231 there is a DMA controller on Sparc. @@ -37,17 +38,18 @@ #define CS_MAXDREG (CS_DREGS - 1) #define TYPE_CS4231 "SUNW,CS4231" +typedef struct CSState CSState; #define CS4231(obj) \ OBJECT_CHECK(CSState, (obj), TYPE_CS4231) -typedef struct CSState { +struct CSState { SysBusDevice parent_obj; MemoryRegion iomem; qemu_irq irq; uint32_t regs[CS_REGS]; uint8_t dregs[CS_DREGS]; -} CSState; +}; #define CS_RAP(s) ((s)->regs[0] & CS_MAXDREG) #define CS_VER 0xa0 diff --git a/hw/audio/cs4231a.c b/hw/audio/cs4231a.c index 59705a8d47..fc064a93d7 100644 --- a/hw/audio/cs4231a.c +++ b/hw/audio/cs4231a.c @@ -32,6 +32,7 @@ #include "qemu/module.h" #include "qemu/timer.h" #include "qapi/error.h" +#include "qom/object.h" /* Missing features: @@ -62,9 +63,10 @@ static struct { #define CS_DREGS 32 #define TYPE_CS4231A "cs4231a" +typedef struct CSState CSState; #define CS4231A(obj) OBJECT_CHECK (CSState, (obj), TYPE_CS4231A) -typedef struct CSState { +struct CSState { ISADevice dev; QEMUSoundCard card; MemoryRegion ioports; @@ -82,7 +84,7 @@ typedef struct CSState { int aci_counter; SWVoiceOut *voice; int16_t *tab; -} CSState; +}; #define MODE2 (1 << 6) #define MCE (1 << 6) diff --git a/hw/audio/es1370.c b/hw/audio/es1370.c index 4255463a49..bd620d5ee2 100644 --- a/hw/audio/es1370.c +++ b/hw/audio/es1370.c @@ -33,6 +33,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "sysemu/dma.h" +#include "qom/object.h" /* Missing stuff: SCTRL_P[12](END|ST)INC @@ -263,7 +264,7 @@ struct chan { uint32_t frame_cnt; }; -typedef struct ES1370State { +struct ES1370State { PCIDevice dev; QEMUSoundCard card; MemoryRegion io; @@ -276,7 +277,8 @@ typedef struct ES1370State { uint32_t mempage; uint32_t codec; uint32_t sctl; -} ES1370State; +}; +typedef struct ES1370State ES1370State; struct chan_bits { uint32_t ctl_en; diff --git a/hw/audio/gus.c b/hw/audio/gus.c index 7e4a8cadad..3cd62d43d7 100644 --- a/hw/audio/gus.c +++ b/hw/audio/gus.c @@ -33,6 +33,7 @@ #include "migration/vmstate.h" #include "gusemu.h" #include "gustate.h" +#include "qom/object.h" #define dolog(...) AUD_log ("audio", __VA_ARGS__) #ifdef DEBUG @@ -42,9 +43,10 @@ #endif #define TYPE_GUS "gus" +typedef struct GUSState GUSState; #define GUS(obj) OBJECT_CHECK (GUSState, (obj), TYPE_GUS) -typedef struct GUSState { +struct GUSState { ISADevice dev; GUSEmuState emu; QEMUSoundCard card; @@ -60,7 +62,7 @@ typedef struct GUSState { IsaDma *isa_dma; PortioList portio_list1; PortioList portio_list2; -} GUSState; +}; static uint32_t gus_readb(void *opaque, uint32_t nport) { diff --git a/hw/audio/hda-codec.c b/hw/audio/hda-codec.c index b6ea5b3b75..ce6ccee6a0 100644 --- a/hw/audio/hda-codec.c +++ b/hw/audio/hda-codec.c @@ -26,6 +26,7 @@ #include "intel-hda-defs.h" #include "audio/audio.h" #include "trace.h" +#include "qom/object.h" /* -------------------------------------------------------------------------- */ diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index ceae0b33af..4bce3ab8bf 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -32,6 +32,7 @@ #include "intel-hda-defs.h" #include "sysemu/dma.h" #include "qapi/error.h" +#include "qom/object.h" /* --------------------------------------------------------------------- */ /* hda bus */ diff --git a/hw/audio/marvell_88w8618.c b/hw/audio/marvell_88w8618.c index 1dcee64ef0..6c13075e99 100644 --- a/hw/audio/marvell_88w8618.c +++ b/hw/audio/marvell_88w8618.c @@ -19,6 +19,7 @@ #include "audio/audio.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" #define MP_AUDIO_SIZE 0x00001000 @@ -42,10 +43,11 @@ #define MP_AUDIO_CLOCK_24MHZ (1 << 9) #define MP_AUDIO_MONO (1 << 14) +typedef struct mv88w8618_audio_state mv88w8618_audio_state; #define MV88W8618_AUDIO(obj) \ OBJECT_CHECK(mv88w8618_audio_state, (obj), TYPE_MV88W8618_AUDIO) -typedef struct mv88w8618_audio_state { +struct mv88w8618_audio_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -60,7 +62,7 @@ typedef struct mv88w8618_audio_state { uint32_t last_free; uint32_t clock_div; void *wm; -} mv88w8618_audio_state; +}; static void mv88w8618_audio_callback(void *opaque, int free_out, int free_in) { diff --git a/hw/audio/milkymist-ac97.c b/hw/audio/milkymist-ac97.c index 051dc3bfad..94b17f10cc 100644 --- a/hw/audio/milkymist-ac97.c +++ b/hw/audio/milkymist-ac97.c @@ -29,6 +29,7 @@ #include "audio/audio.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { R_AC97_CTRL = 0, @@ -55,6 +56,7 @@ enum { }; #define TYPE_MILKYMIST_AC97 "milkymist-ac97" +typedef struct MilkymistAC97State MilkymistAC97State; #define MILKYMIST_AC97(obj) \ OBJECT_CHECK(MilkymistAC97State, (obj), TYPE_MILKYMIST_AC97) @@ -74,7 +76,6 @@ struct MilkymistAC97State { qemu_irq dmar_irq; qemu_irq dmaw_irq; }; -typedef struct MilkymistAC97State MilkymistAC97State; static void update_voices(MilkymistAC97State *s) { diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c index ed7730fc18..5467a6b69c 100644 --- a/hw/audio/pcspk.c +++ b/hw/audio/pcspk.c @@ -33,15 +33,17 @@ #include "migration/vmstate.h" #include "hw/audio/pcspk.h" #include "qapi/error.h" +#include "qom/object.h" #define PCSPK_BUF_LEN 1792 #define PCSPK_SAMPLE_RATE 32000 #define PCSPK_MAX_FREQ (PCSPK_SAMPLE_RATE >> 1) #define PCSPK_MIN_COUNT DIV_ROUND_UP(PIT_FREQ, PCSPK_MAX_FREQ) +typedef struct PCSpkState PCSpkState; #define PC_SPEAKER(obj) OBJECT_CHECK(PCSpkState, (obj), TYPE_PC_SPEAKER) -typedef struct { +struct PCSpkState { ISADevice parent_obj; MemoryRegion ioport; @@ -56,7 +58,7 @@ typedef struct { uint8_t data_on; uint8_t dummy_refresh_clock; bool migrate; -} PCSpkState; +}; static const char *s_spk = "pcspk"; static PCSpkState *pcspk_state; diff --git a/hw/audio/pl041.c b/hw/audio/pl041.c index 96748cb15a..b99c151cf9 100644 --- a/hw/audio/pl041.c +++ b/hw/audio/pl041.c @@ -30,6 +30,7 @@ #include "pl041.h" #include "lm4549.h" #include "migration/vmstate.h" +#include "qom/object.h" #if 0 #define PL041_DEBUG_LEVEL 1 @@ -77,9 +78,10 @@ typedef struct { } pl041_channel; #define TYPE_PL041 "pl041" +typedef struct PL041State PL041State; #define PL041(obj) OBJECT_CHECK(PL041State, (obj), TYPE_PL041) -typedef struct PL041State { +struct PL041State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -90,7 +92,7 @@ typedef struct PL041State { pl041_regfile regs; pl041_channel fifo1; lm4549_state codec; -} PL041State; +}; static const unsigned char pl041_default_id[8] = { diff --git a/hw/audio/sb16.c b/hw/audio/sb16.c index 2d9e50f99b..840f743e41 100644 --- a/hw/audio/sb16.c +++ b/hw/audio/sb16.c @@ -34,6 +34,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" +#include "qom/object.h" #define dolog(...) AUD_log ("sb16", __VA_ARGS__) @@ -49,9 +50,10 @@ static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992."; #define TYPE_SB16 "sb16" +typedef struct SB16State SB16State; #define SB16(obj) OBJECT_CHECK (SB16State, (obj), TYPE_SB16) -typedef struct SB16State { +struct SB16State { ISADevice parent_obj; QEMUSoundCard card; @@ -112,7 +114,7 @@ typedef struct SB16State { int mixer_nreg; uint8_t mixer_regs[256]; PortioList portio_list; -} SB16State; +}; static void SB_audio_callback (void *opaque, int free); diff --git a/hw/audio/wm8750.c b/hw/audio/wm8750.c index d867442d29..c2396fc206 100644 --- a/hw/audio/wm8750.c +++ b/hw/audio/wm8750.c @@ -13,6 +13,7 @@ #include "qemu/module.h" #include "hw/audio/wm8750.h" #include "audio/audio.h" +#include "qom/object.h" #define IN_PORT_N 3 #define OUT_PORT_N 3 @@ -26,9 +27,10 @@ typedef struct { int dac_hz; } WMRate; +typedef struct WM8750State WM8750State; #define WM8750(obj) OBJECT_CHECK(WM8750State, (obj), TYPE_WM8750) -typedef struct WM8750State { +struct WM8750State { I2CSlave parent_obj; uint8_t i2c_data[2]; @@ -54,7 +56,7 @@ typedef struct WM8750State { const WMRate *rate; uint8_t rate_vmstate; int adc_hz, dac_hz, ext_adc_hz, ext_dac_hz, master; -} WM8750State; +}; /* pow(10.0, -i / 20.0) * 255, i = 0..42 */ static const uint8_t wm8750_vol_db_table[] = { diff --git a/hw/avr/arduino.c b/hw/avr/arduino.c index 65093ab6fd..c24183c07f 100644 --- a/hw/avr/arduino.c +++ b/hw/avr/arduino.c @@ -15,21 +15,24 @@ #include "hw/boards.h" #include "atmega.h" #include "boot.h" +#include "qom/object.h" -typedef struct ArduinoMachineState { +struct ArduinoMachineState { /*< private >*/ MachineState parent_obj; /*< public >*/ AtmegaMcuState mcu; -} ArduinoMachineState; +}; +typedef struct ArduinoMachineState ArduinoMachineState; -typedef struct ArduinoMachineClass { +struct ArduinoMachineClass { /*< private >*/ MachineClass parent_class; /*< public >*/ const char *mcu_type; uint64_t xtal_hz; -} ArduinoMachineClass; +}; +typedef struct ArduinoMachineClass ArduinoMachineClass; #define TYPE_ARDUINO_MACHINE \ MACHINE_TYPE_NAME("arduino") diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c index 7131224431..c3b8e05110 100644 --- a/hw/avr/atmega.c +++ b/hw/avr/atmega.c @@ -17,6 +17,7 @@ #include "sysemu/sysemu.h" #include "hw/qdev-properties.h" #include "hw/sysbus.h" +#include "qom/object.h" #include "hw/boards.h" /* FIXME memory_region_allocate_system_memory for sram */ #include "hw/misc/unimp.h" #include "atmega.h" @@ -45,7 +46,7 @@ typedef struct { bool is_timer16; } peripheral_cfg; -typedef struct AtmegaMcuClass { +struct AtmegaMcuClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ @@ -59,7 +60,8 @@ typedef struct AtmegaMcuClass { size_t adc_count; const uint8_t *irq; const peripheral_cfg *dev; -} AtmegaMcuClass; +}; +typedef struct AtmegaMcuClass AtmegaMcuClass; #define ATMEGA_MCU_CLASS(klass) \ OBJECT_CLASS_CHECK(AtmegaMcuClass, (klass), TYPE_ATMEGA_MCU) diff --git a/hw/block/fdc.c b/hw/block/fdc.c index 5e7013a752..f4bb0251dd 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -46,6 +46,7 @@ #include "qemu/main-loop.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" /********************************************************/ /* debug Floppy devices */ @@ -64,16 +65,17 @@ /* qdev floppy bus */ #define TYPE_FLOPPY_BUS "floppy-bus" +typedef struct FloppyBus FloppyBus; #define FLOPPY_BUS(obj) OBJECT_CHECK(FloppyBus, (obj), TYPE_FLOPPY_BUS) typedef struct FDCtrl FDCtrl; typedef struct FDrive FDrive; static FDrive *get_drv(FDCtrl *fdctrl, int unit); -typedef struct FloppyBus { +struct FloppyBus { BusState bus; FDCtrl *fdc; -} FloppyBus; +}; static const TypeInfo floppy_bus_info = { .name = TYPE_FLOPPY_BUS, @@ -495,15 +497,16 @@ static const BlockDevOps fd_block_ops = { #define TYPE_FLOPPY_DRIVE "floppy" +typedef struct FloppyDrive FloppyDrive; #define FLOPPY_DRIVE(obj) \ OBJECT_CHECK(FloppyDrive, (obj), TYPE_FLOPPY_DRIVE) -typedef struct FloppyDrive { +struct FloppyDrive { DeviceState qdev; uint32_t unit; BlockConf conf; FloppyDriveType type; -} FloppyDrive; +}; static Property floppy_drive_properties[] = { DEFINE_PROP_UINT32("unit", FloppyDrive, unit, -1), @@ -888,19 +891,21 @@ static FloppyDriveType get_fallback_drive_type(FDrive *drv) } #define TYPE_SYSBUS_FDC "base-sysbus-fdc" +typedef struct FDCtrlSysBus FDCtrlSysBus; #define SYSBUS_FDC(obj) OBJECT_CHECK(FDCtrlSysBus, (obj), TYPE_SYSBUS_FDC) -typedef struct FDCtrlSysBus { +struct FDCtrlSysBus { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ struct FDCtrl state; -} FDCtrlSysBus; +}; +typedef struct FDCtrlISABus FDCtrlISABus; #define ISA_FDC(obj) OBJECT_CHECK(FDCtrlISABus, (obj), TYPE_ISA_FDC) -typedef struct FDCtrlISABus { +struct FDCtrlISABus { ISADevice parent_obj; uint32_t iobase; @@ -909,7 +914,7 @@ typedef struct FDCtrlISABus { struct FDCtrl state; int32_t bootindexA; int32_t bootindexB; -} FDCtrlISABus; +}; static uint32_t fdctrl_read (void *opaque, uint32_t reg) { diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index 7f9492eee6..43b8eae529 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -33,6 +33,7 @@ #include "qemu/error-report.h" #include "qapi/error.h" #include "trace.h" +#include "qom/object.h" /* Fields for FlashPartInfo->flags */ @@ -411,7 +412,7 @@ typedef enum { #define M25P80_INTERNAL_DATA_BUFFER_SZ 16 -typedef struct Flash { +struct Flash { SSISlave parent_obj; BlockBackend *blk; @@ -451,12 +452,14 @@ typedef struct Flash { const FlashPartInfo *pi; -} Flash; +}; +typedef struct Flash Flash; -typedef struct M25P80Class { +struct M25P80Class { SSISlaveClass parent_class; FlashPartInfo *pi; -} M25P80Class; +}; +typedef struct M25P80Class M25P80Class; #define TYPE_M25P80 "m25p80-generic" #define M25P80(obj) \ diff --git a/hw/block/nand.c b/hw/block/nand.c index 991a6e13e8..e409d3d752 100644 --- a/hw/block/nand.c +++ b/hw/block/nand.c @@ -27,6 +27,7 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" # define NAND_CMD_READ0 0x00 # define NAND_CMD_READ1 0x01 diff --git a/hw/block/onenand.c b/hw/block/onenand.c index d2c4e140e9..39d9cf74f3 100644 --- a/hw/block/onenand.c +++ b/hw/block/onenand.c @@ -31,6 +31,7 @@ #include "qemu/error-report.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" /* 11 for 2kB-page OneNAND ("2nd generation") and 10 for 1kB-page chips */ #define PAGE_SHIFT 11 @@ -39,9 +40,10 @@ #define BLOCK_SHIFT (PAGE_SHIFT + 6) #define TYPE_ONE_NAND "onenand" +typedef struct OneNANDState OneNANDState; #define ONE_NAND(obj) OBJECT_CHECK(OneNANDState, (obj), TYPE_ONE_NAND) -typedef struct OneNANDState { +struct OneNANDState { SysBusDevice parent_obj; struct { @@ -85,7 +87,7 @@ typedef struct OneNANDState { int secs_cur; int blocks; uint8_t *blockwp; -} OneNANDState; +}; enum { ONEN_BUF_BLOCK = 0, diff --git a/hw/char/debugcon.c b/hw/char/debugcon.c index 7c29b9cbcf..62cad0636b 100644 --- a/hw/char/debugcon.c +++ b/hw/char/debugcon.c @@ -30,8 +30,10 @@ #include "chardev/char-fe.h" #include "hw/isa/isa.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon" +typedef struct ISADebugconState ISADebugconState; #define ISA_DEBUGCON_DEVICE(obj) \ OBJECT_CHECK(ISADebugconState, (obj), TYPE_ISA_DEBUGCON_DEVICE) @@ -43,12 +45,12 @@ typedef struct DebugconState { uint32_t readback; } DebugconState; -typedef struct ISADebugconState { +struct ISADebugconState { ISADevice parent_obj; uint32_t iobase; DebugconState state; -} ISADebugconState; +}; static void debugcon_ioport_write(void *opaque, hwaddr addr, uint64_t val, unsigned width) diff --git a/hw/char/etraxfs_ser.c b/hw/char/etraxfs_ser.c index 5b70c85b9b..f2fbe4aab3 100644 --- a/hw/char/etraxfs_ser.c +++ b/hw/char/etraxfs_ser.c @@ -29,6 +29,7 @@ #include "chardev/char-fe.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define D(x) @@ -49,10 +50,11 @@ #define STAT_TR_RDY 24 #define TYPE_ETRAX_FS_SERIAL "etraxfs,serial" +typedef struct ETRAXSerial ETRAXSerial; #define ETRAX_SERIAL(obj) \ OBJECT_CHECK(ETRAXSerial, (obj), TYPE_ETRAX_FS_SERIAL) -typedef struct ETRAXSerial { +struct ETRAXSerial { SysBusDevice parent_obj; MemoryRegion mmio; @@ -67,7 +69,7 @@ typedef struct ETRAXSerial { /* Control registers. */ uint32_t regs[R_MAX]; -} ETRAXSerial; +}; static void ser_update_irq(ETRAXSerial *s) { diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c index a59826a3df..dadd50853f 100644 --- a/hw/char/exynos4210_uart.c +++ b/hw/char/exynos4210_uart.c @@ -34,6 +34,7 @@ #include "hw/qdev-properties.h" #include "trace.h" +#include "qom/object.h" /* * Offsets for UART registers relative to SFR base address @@ -138,10 +139,11 @@ typedef struct { } Exynos4210UartFIFO; #define TYPE_EXYNOS4210_UART "exynos4210.uart" +typedef struct Exynos4210UartState Exynos4210UartState; #define EXYNOS4210_UART(obj) \ OBJECT_CHECK(Exynos4210UartState, (obj), TYPE_EXYNOS4210_UART) -typedef struct Exynos4210UartState { +struct Exynos4210UartState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -159,7 +161,7 @@ typedef struct Exynos4210UartState { uint32_t channel; -} Exynos4210UartState; +}; /* Used only for tracing */ diff --git a/hw/char/grlib_apbuart.c b/hw/char/grlib_apbuart.c index 581111ce75..9d5ad8b0b1 100644 --- a/hw/char/grlib_apbuart.c +++ b/hw/char/grlib_apbuart.c @@ -31,6 +31,7 @@ #include "chardev/char-fe.h" #include "trace.h" +#include "qom/object.h" #define UART_REG_SIZE 20 /* Size of memory mapped registers */ @@ -72,10 +73,11 @@ #define FIFO_LENGTH 1024 +typedef struct UART UART; #define GRLIB_APB_UART(obj) \ OBJECT_CHECK(UART, (obj), TYPE_GRLIB_APB_UART) -typedef struct UART { +struct UART { SysBusDevice parent_obj; MemoryRegion iomem; @@ -91,7 +93,7 @@ typedef struct UART { char buffer[FIFO_LENGTH]; int len; int current; -} UART; +}; static int uart_data_to_read(UART *uart) { diff --git a/hw/char/ipoctal232.c b/hw/char/ipoctal232.c index b94ebf2791..4077608114 100644 --- a/hw/char/ipoctal232.c +++ b/hw/char/ipoctal232.c @@ -16,6 +16,7 @@ #include "qemu/bitops.h" #include "qemu/module.h" #include "chardev/char-fe.h" +#include "qom/object.h" /* #define DEBUG_IPOCTAL */ diff --git a/hw/char/lm32_juart.c b/hw/char/lm32_juart.c index bd4a778d38..22d072d4cc 100644 --- a/hw/char/lm32_juart.c +++ b/hw/char/lm32_juart.c @@ -26,6 +26,7 @@ #include "hw/char/lm32_juart.h" #include "hw/qdev-properties.h" +#include "qom/object.h" enum { LM32_JUART_MIN_SAVE_VERSION = 0, @@ -41,6 +42,7 @@ enum { JRX_FULL = (1<<8), }; +typedef struct LM32JuartState LM32JuartState; #define LM32_JUART(obj) OBJECT_CHECK(LM32JuartState, (obj), TYPE_LM32_JUART) struct LM32JuartState { @@ -51,7 +53,6 @@ struct LM32JuartState { uint32_t jtx; uint32_t jrx; }; -typedef struct LM32JuartState LM32JuartState; uint32_t lm32_juart_get_jtx(DeviceState *d) { diff --git a/hw/char/lm32_uart.c b/hw/char/lm32_uart.c index 266808790f..0c66976e80 100644 --- a/hw/char/lm32_uart.c +++ b/hw/char/lm32_uart.c @@ -31,6 +31,7 @@ #include "chardev/char-fe.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { R_RXTX = 0, @@ -94,6 +95,7 @@ enum { }; #define TYPE_LM32_UART "lm32-uart" +typedef struct LM32UartState LM32UartState; #define LM32_UART(obj) OBJECT_CHECK(LM32UartState, (obj), TYPE_LM32_UART) struct LM32UartState { @@ -105,7 +107,6 @@ struct LM32UartState { uint32_t regs[R_MAX]; }; -typedef struct LM32UartState LM32UartState; static void uart_update_irq(LM32UartState *s) { diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c index ec41736980..d6c43105ec 100644 --- a/hw/char/mcf_uart.c +++ b/hw/char/mcf_uart.c @@ -14,8 +14,9 @@ #include "hw/m68k/mcf.h" #include "hw/qdev-properties.h" #include "chardev/char-fe.h" +#include "qom/object.h" -typedef struct { +struct mcf_uart_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -33,7 +34,8 @@ typedef struct { int rx_enabled; qemu_irq irq; CharBackend chr; -} mcf_uart_state; +}; +typedef struct mcf_uart_state mcf_uart_state; #define TYPE_MCF_UART "mcf-uart" #define MCF_UART(obj) OBJECT_CHECK(mcf_uart_state, (obj), TYPE_MCF_UART) diff --git a/hw/char/milkymist-uart.c b/hw/char/milkymist-uart.c index d3cb7c9140..f148240e43 100644 --- a/hw/char/milkymist-uart.c +++ b/hw/char/milkymist-uart.c @@ -30,6 +30,7 @@ #include "chardev/char-fe.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { R_RXTX = 0, @@ -57,6 +58,7 @@ enum { }; #define TYPE_MILKYMIST_UART "milkymist-uart" +typedef struct MilkymistUartState MilkymistUartState; #define MILKYMIST_UART(obj) \ OBJECT_CHECK(MilkymistUartState, (obj), TYPE_MILKYMIST_UART) @@ -69,7 +71,6 @@ struct MilkymistUartState { uint32_t regs[R_MAX]; }; -typedef struct MilkymistUartState MilkymistUartState; static void uart_update_irq(MilkymistUartState *s) { diff --git a/hw/char/parallel.c b/hw/char/parallel.c index 8f09384066..bf4708e277 100644 --- a/hw/char/parallel.c +++ b/hw/char/parallel.c @@ -37,6 +37,7 @@ #include "sysemu/reset.h" #include "sysemu/sysemu.h" #include "trace.h" +#include "qom/object.h" //#define DEBUG_PARALLEL @@ -92,17 +93,18 @@ typedef struct ParallelState { } ParallelState; #define TYPE_ISA_PARALLEL "isa-parallel" +typedef struct ISAParallelState ISAParallelState; #define ISA_PARALLEL(obj) \ OBJECT_CHECK(ISAParallelState, (obj), TYPE_ISA_PARALLEL) -typedef struct ISAParallelState { +struct ISAParallelState { ISADevice parent_obj; uint32_t index; uint32_t iobase; uint32_t isairq; ParallelState state; -} ISAParallelState; +}; static void parallel_update_irq(ParallelState *s) { diff --git a/hw/char/sclpconsole-lm.c b/hw/char/sclpconsole-lm.c index 0a277b8c37..6ea976eabc 100644 --- a/hw/char/sclpconsole-lm.c +++ b/hw/char/sclpconsole-lm.c @@ -24,6 +24,7 @@ #include "hw/s390x/event-facility.h" #include "hw/qdev-properties.h" #include "hw/s390x/ebcdic.h" +#include "qom/object.h" #define SIZE_BUFFER 4096 #define NEWLINE "\n" @@ -37,14 +38,15 @@ typedef struct OprtnsCommand { /* max size for line-mode data in 4K SCCB page */ #define SIZE_CONSOLE_BUFFER (SCCB_DATA_LEN - sizeof(OprtnsCommand)) -typedef struct SCLPConsoleLM { +struct SCLPConsoleLM { SCLPEvent event; CharBackend chr; bool echo; /* immediate echo of input if true */ uint32_t write_errors; /* errors writing to char layer */ uint32_t length; /* length of byte stream in buffer */ uint8_t buf[SIZE_CONSOLE_BUFFER]; -} SCLPConsoleLM; +}; +typedef struct SCLPConsoleLM SCLPConsoleLM; #define TYPE_SCLPLM_CONSOLE "sclplmconsole" #define SCLPLM_CONSOLE(obj) \ diff --git a/hw/char/sclpconsole.c b/hw/char/sclpconsole.c index 2e960973e2..4c58773f89 100644 --- a/hw/char/sclpconsole.c +++ b/hw/char/sclpconsole.c @@ -22,6 +22,7 @@ #include "hw/qdev-properties.h" #include "hw/s390x/event-facility.h" #include "chardev/char-fe.h" +#include "qom/object.h" typedef struct ASCIIConsoleData { EventBufferHeader ebh; @@ -31,7 +32,7 @@ typedef struct ASCIIConsoleData { /* max size for ASCII data in 4K SCCB page */ #define SIZE_BUFFER_VT220 4080 -typedef struct SCLPConsole { +struct SCLPConsole { SCLPEvent event; CharBackend chr; uint8_t iov[SIZE_BUFFER_VT220]; @@ -40,7 +41,8 @@ typedef struct SCLPConsole { uint32_t iov_data_len; /* length of byte stream in buffer */ uint32_t iov_sclp_rest; /* length of byte stream not read via SCLP */ bool notify; /* qemu_notify_event() req'd if true */ -} SCLPConsole; +}; +typedef struct SCLPConsole SCLPConsole; #define TYPE_SCLP_CONSOLE "sclpconsole" #define SCLP_CONSOLE(obj) \ diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 35a1ee3a30..2b4e8006da 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -32,17 +32,19 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" +typedef struct ISASerialState ISASerialState; #define ISA_SERIAL(obj) OBJECT_CHECK(ISASerialState, (obj), TYPE_ISA_SERIAL) -typedef struct ISASerialState { +struct ISASerialState { ISADevice parent_obj; uint32_t index; uint32_t iobase; uint32_t isairq; SerialState state; -} ISASerialState; +}; static const int isa_serial_io[MAX_ISA_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 02264f8b73..de4b3b2584 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -33,12 +33,14 @@ #include "hw/pci/pci.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" -typedef struct PCISerialState { +struct PCISerialState { PCIDevice dev; SerialState state; uint8_t prog_if; -} PCISerialState; +}; +typedef struct PCISerialState PCISerialState; #define TYPE_PCI_SERIAL "pci-serial" #define PCI_SERIAL(s) OBJECT_CHECK(PCISerialState, (s), TYPE_PCI_SERIAL) diff --git a/hw/char/spapr_vty.c b/hw/char/spapr_vty.c index 236dc2194a..79b68d0c77 100644 --- a/hw/char/spapr_vty.c +++ b/hw/char/spapr_vty.c @@ -8,15 +8,17 @@ #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define VTERM_BUFSIZE 16 -typedef struct SpaprVioVty { +struct SpaprVioVty { SpaprVioDevice sdev; CharBackend chardev; uint32_t in, out; uint8_t buf[VTERM_BUFSIZE]; -} SpaprVioVty; +}; +typedef struct SpaprVioVty SpaprVioVty; #define TYPE_VIO_SPAPR_VTY_DEVICE "spapr-vty" #define VIO_SPAPR_VTY_DEVICE(obj) \ diff --git a/hw/char/terminal3270.c b/hw/char/terminal3270.c index 6ba6052ac9..aa151bc1c3 100644 --- a/hw/char/terminal3270.c +++ b/hw/char/terminal3270.c @@ -17,6 +17,7 @@ #include "chardev/char-fe.h" #include "hw/qdev-properties.h" #include "hw/s390x/3270-ccw.h" +#include "qom/object.h" /* Enough spaces for different window sizes. */ #define INPUT_BUFFER_SIZE 1000 @@ -26,7 +27,7 @@ */ #define OUTPUT_BUFFER_SIZE 2051 -typedef struct Terminal3270 { +struct Terminal3270 { EmulatedCcw3270Device cdev; CharBackend chr; uint8_t inv[INPUT_BUFFER_SIZE]; @@ -34,7 +35,8 @@ typedef struct Terminal3270 { int in_len; bool handshake_done; guint timer_tag; -} Terminal3270; +}; +typedef struct Terminal3270 Terminal3270; #define TYPE_TERMINAL_3270 "x-terminal3270" #define TERMINAL_3270(obj) \ diff --git a/hw/char/virtio-console.c b/hw/char/virtio-console.c index 0ac862df15..9a8c74d5c2 100644 --- a/hw/char/virtio-console.c +++ b/hw/char/virtio-console.c @@ -19,17 +19,19 @@ #include "hw/virtio/virtio-serial.h" #include "qapi/error.h" #include "qapi/qapi-events-char.h" +#include "qom/object.h" #define TYPE_VIRTIO_CONSOLE_SERIAL_PORT "virtserialport" +typedef struct VirtConsole VirtConsole; #define VIRTIO_CONSOLE(obj) \ OBJECT_CHECK(VirtConsole, (obj), TYPE_VIRTIO_CONSOLE_SERIAL_PORT) -typedef struct VirtConsole { +struct VirtConsole { VirtIOSerialPort parent_obj; CharBackend chr; guint watch; -} VirtConsole; +}; /* * Callback function that's called from chardevs when backend becomes diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c index aad3fbc31e..14ba0707a2 100644 --- a/hw/char/xilinx_uartlite.c +++ b/hw/char/xilinx_uartlite.c @@ -29,6 +29,7 @@ #include "hw/sysbus.h" #include "qemu/module.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define DUART(x) @@ -52,10 +53,11 @@ #define CONTROL_IE 0x10 #define TYPE_XILINX_UARTLITE "xlnx.xps-uartlite" +typedef struct XilinxUARTLite XilinxUARTLite; #define XILINX_UARTLITE(obj) \ OBJECT_CHECK(XilinxUARTLite, (obj), TYPE_XILINX_UARTLITE) -typedef struct XilinxUARTLite { +struct XilinxUARTLite { SysBusDevice parent_obj; MemoryRegion mmio; @@ -67,7 +69,7 @@ typedef struct XilinxUARTLite { unsigned int rx_fifo_len; uint32_t regs[R_MAX]; -} XilinxUARTLite; +}; static void uart_update_irq(XilinxUARTLite *s) { diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c index 0ae3019045..386a7b1f58 100644 --- a/hw/cpu/realview_mpcore.c +++ b/hw/cpu/realview_mpcore.c @@ -15,15 +15,17 @@ #include "hw/intc/realview_gic.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define TYPE_REALVIEW_MPCORE_RIRQ "realview_mpcore" +typedef struct mpcore_rirq_state mpcore_rirq_state; #define REALVIEW_MPCORE_RIRQ(obj) \ OBJECT_CHECK(mpcore_rirq_state, (obj), TYPE_REALVIEW_MPCORE_RIRQ) /* Dummy PIC to route IRQ lines. The baseboard has 4 independent IRQ controllers. The output of these, plus some of the raw input lines are fed into a single SMP-aware interrupt controller on the CPU. */ -typedef struct { +struct mpcore_rirq_state { SysBusDevice parent_obj; qemu_irq cpuic[32]; @@ -32,7 +34,7 @@ typedef struct { ARM11MPCorePriveState priv; RealViewGICState gic[4]; -} mpcore_rirq_state; +}; /* Map baseboard IRQs onto CPU IRQ lines. */ static const int mpcore_irq_map[32] = { diff --git a/hw/display/ads7846.c b/hw/display/ads7846.c index 94bb9db052..9118438f32 100644 --- a/hw/display/ads7846.c +++ b/hw/display/ads7846.c @@ -16,8 +16,9 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "ui/console.h" +#include "qom/object.h" -typedef struct { +struct ADS7846State { SSISlave ssidev; qemu_irq interrupt; @@ -27,7 +28,8 @@ typedef struct { int cycle; int output; -} ADS7846State; +}; +typedef struct ADS7846State ADS7846State; #define TYPE_ADS7846 "ads7846" #define ADS7846(obj) OBJECT_CHECK(ADS7846State, (obj), TYPE_ADS7846) diff --git a/hw/display/artist.c b/hw/display/artist.c index 2e1b793a86..2e8272665b 100644 --- a/hw/display/artist.c +++ b/hw/display/artist.c @@ -22,8 +22,10 @@ #include "ui/console.h" #include "trace.h" #include "framebuffer.h" +#include "qom/object.h" #define TYPE_ARTIST "artist" +typedef struct ARTISTState ARTISTState; #define ARTIST(obj) OBJECT_CHECK(ARTISTState, (obj), TYPE_ARTIST) #ifdef HOST_WORDS_BIGENDIAN @@ -40,7 +42,7 @@ struct vram_buffer { int height; }; -typedef struct ARTISTState { +struct ARTISTState { SysBusDevice parent_obj; QemuConsole *con; @@ -103,7 +105,7 @@ typedef struct ARTISTState { uint32_t font_write_pos_y; int draw_line_pattern; -} ARTISTState; +}; typedef enum { ARTIST_BUFFER_AP = 1, diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index 86869778ed..10f0ad01d2 100644 --- a/hw/display/bochs-display.c +++ b/hw/display/bochs-display.c @@ -18,6 +18,7 @@ #include "ui/console.h" #include "ui/qemu-pixman.h" +#include "qom/object.h" typedef struct BochsDisplayMode { pixman_format_code_t format; @@ -29,7 +30,7 @@ typedef struct BochsDisplayMode { uint64_t size; } BochsDisplayMode; -typedef struct BochsDisplayState { +struct BochsDisplayState { /* parent */ PCIDevice pci; @@ -53,7 +54,8 @@ typedef struct BochsDisplayState { /* device state */ BochsDisplayMode mode; -} BochsDisplayState; +}; +typedef struct BochsDisplayState BochsDisplayState; #define TYPE_BOCHS_DISPLAY "bochs-display" #define BOCHS_DISPLAY(obj) OBJECT_CHECK(BochsDisplayState, (obj), \ diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 0e7e260ccf..12185f89ee 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -36,6 +36,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" /* Change to 1 to enable debugging */ #define DEBUG_CG3 0 @@ -65,9 +66,10 @@ #define CG3_VRAM_OFFSET 0x800000 #define TYPE_CG3 "cgthree" +typedef struct CG3State CG3State; #define CG3(obj) OBJECT_CHECK(CG3State, (obj), TYPE_CG3) -typedef struct CG3State { +struct CG3State { SysBusDevice parent_obj; QemuConsole *con; @@ -82,7 +84,7 @@ typedef struct CG3State { uint8_t r[256], g[256], b[256]; uint16_t width, height, depth; uint8_t dac_index, dac_state; -} CG3State; +}; static void cg3_update_display(void *opaque) { diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index fe4d8a4fb8..055ffa2082 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -44,6 +44,7 @@ #include "migration/vmstate.h" #include "ui/pixel_ops.h" #include "cirrus_vga_internal.h" +#include "qom/object.h" /* * TODO: @@ -178,10 +179,11 @@ typedef void (*cirrus_fill_t)(struct CirrusVGAState *s, uint32_t dstaddr, int dst_pitch, int width, int height); -typedef struct PCICirrusVGAState { +struct PCICirrusVGAState { PCIDevice dev; CirrusVGAState cirrus_vga; -} PCICirrusVGAState; +}; +typedef struct PCICirrusVGAState PCICirrusVGAState; #define TYPE_PCI_CIRRUS_VGA "cirrus-vga" #define PCI_CIRRUS_VGA(obj) \ diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c index 4d0e54b0f2..9c59593c7c 100644 --- a/hw/display/cirrus_vga_isa.c +++ b/hw/display/cirrus_vga_isa.c @@ -30,16 +30,18 @@ #include "hw/qdev-properties.h" #include "hw/isa/isa.h" #include "cirrus_vga_internal.h" +#include "qom/object.h" #define TYPE_ISA_CIRRUS_VGA "isa-cirrus-vga" +typedef struct ISACirrusVGAState ISACirrusVGAState; #define ISA_CIRRUS_VGA(obj) \ OBJECT_CHECK(ISACirrusVGAState, (obj), TYPE_ISA_CIRRUS_VGA) -typedef struct ISACirrusVGAState { +struct ISACirrusVGAState { ISADevice parent_obj; CirrusVGAState cirrus_vga; -} ISACirrusVGAState; +}; static void isa_cirrus_vga_realizefn(DeviceState *dev, Error **errp) { diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index bfd7f4fc6f..e280e61cc9 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -32,6 +32,7 @@ #include "qemu/bswap.h" #include "qemu/module.h" #include "qemu/log.h" +#include "qom/object.h" /* Debug messages configuration */ #define EXYNOS4210_FIMD_DEBUG 0 @@ -293,10 +294,11 @@ struct Exynos4210fimdWindow { }; #define TYPE_EXYNOS4210_FIMD "exynos4210.fimd" +typedef struct Exynos4210fimdState Exynos4210fimdState; #define EXYNOS4210_FIMD(obj) \ OBJECT_CHECK(Exynos4210fimdState, (obj), TYPE_EXYNOS4210_FIMD) -typedef struct { +struct Exynos4210fimdState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -325,7 +327,7 @@ typedef struct { uint8_t *ifb; /* Internal frame buffer */ bool invalidate; /* Image needs to be redrawn */ bool enabled; /* Display controller is enabled */ -} Exynos4210fimdState; +}; /* Perform byte/halfword/word swap of data according to WINCON */ static inline void fimd_swap_data(unsigned int swap_ctl, uint64_t *data) diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c index 33f2822445..2158240dde 100644 --- a/hw/display/g364fb.c +++ b/hw/display/g364fb.c @@ -29,6 +29,7 @@ #include "trace.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qom/object.h" typedef struct G364State { /* hardware */ @@ -486,13 +487,14 @@ static void g364fb_init(DeviceState *dev, G364State *s) } #define TYPE_G364 "sysbus-g364" +typedef struct G364SysBusState G364SysBusState; #define G364(obj) OBJECT_CHECK(G364SysBusState, (obj), TYPE_G364) -typedef struct { +struct G364SysBusState { SysBusDevice parent_obj; G364State g364; -} G364SysBusState; +}; static void g364fb_sysbus_realize(DeviceState *dev, Error **errp) { diff --git a/hw/display/jazz_led.c b/hw/display/jazz_led.c index 1b1002e14a..66f6a59a26 100644 --- a/hw/display/jazz_led.c +++ b/hw/display/jazz_led.c @@ -29,22 +29,24 @@ #include "trace.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qom/object.h" typedef enum { REDRAW_NONE = 0, REDRAW_SEGMENTS = 1, REDRAW_BACKGROUND = 2, } screen_state_t; #define TYPE_JAZZ_LED "jazz-led" +typedef struct LedState LedState; #define JAZZ_LED(obj) OBJECT_CHECK(LedState, (obj), TYPE_JAZZ_LED) -typedef struct LedState { +struct LedState { SysBusDevice parent_obj; MemoryRegion iomem; uint8_t segments; QemuConsole *con; screen_state_t state; -} LedState; +}; static uint64_t jazz_led_read(void *opaque, hwaddr addr, unsigned int size) diff --git a/hw/display/milkymist-tmu2.c b/hw/display/milkymist-tmu2.c index 495b6c960f..53f5707c9c 100644 --- a/hw/display/milkymist-tmu2.c +++ b/hw/display/milkymist-tmu2.c @@ -38,6 +38,7 @@ #include #include #include +#include "qom/object.h" enum { R_CTL = 0, @@ -82,6 +83,7 @@ struct vertex { } QEMU_PACKED; #define TYPE_MILKYMIST_TMU2 "milkymist-tmu2" +typedef struct MilkymistTMU2State MilkymistTMU2State; #define MILKYMIST_TMU2(obj) \ OBJECT_CHECK(MilkymistTMU2State, (obj), TYPE_MILKYMIST_TMU2) @@ -98,7 +100,6 @@ struct MilkymistTMU2State { GLXFBConfig glx_fb_config; GLXContext glx_context; }; -typedef struct MilkymistTMU2State MilkymistTMU2State; static const int glx_fbconfig_attr[] = { GLX_GREEN_SIZE, 5, diff --git a/hw/display/milkymist-vgafb.c b/hw/display/milkymist-vgafb.c index 634bf4571a..54cdc612a4 100644 --- a/hw/display/milkymist-vgafb.c +++ b/hw/display/milkymist-vgafb.c @@ -32,6 +32,7 @@ #include "ui/pixel_ops.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" #define BITS 8 #include "migration/vmstate.h" @@ -68,6 +69,7 @@ enum { }; #define TYPE_MILKYMIST_VGAFB "milkymist-vgafb" +typedef struct MilkymistVgafbState MilkymistVgafbState; #define MILKYMIST_VGAFB(obj) \ OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB) @@ -84,7 +86,6 @@ struct MilkymistVgafbState { uint32_t regs[R_MAX]; }; -typedef struct MilkymistVgafbState MilkymistVgafbState; static int vgafb_enabled(MilkymistVgafbState *s) { diff --git a/hw/display/next-fb.c b/hw/display/next-fb.c index 7839643757..aef7058c76 100644 --- a/hw/display/next-fb.c +++ b/hw/display/next-fb.c @@ -30,7 +30,9 @@ #include "framebuffer.h" #include "ui/pixel_ops.h" #include "hw/m68k/next-cube.h" +#include "qom/object.h" +typedef struct NeXTFbState NeXTFbState; #define NEXTFB(obj) OBJECT_CHECK(NeXTFbState, (obj), TYPE_NEXTFB) struct NeXTFbState { @@ -44,7 +46,6 @@ struct NeXTFbState { uint32_t rows; int invalidate; }; -typedef struct NeXTFbState NeXTFbState; static void nextfb_draw_line(void *opaque, uint8_t *d, const uint8_t *s, int width, int pitch) diff --git a/hw/display/pl110.c b/hw/display/pl110.c index 0a65733a23..e91de8a2f0 100644 --- a/hw/display/pl110.c +++ b/hw/display/pl110.c @@ -17,6 +17,7 @@ #include "qemu/timer.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define PL110_CR_EN 0x001 #define PL110_CR_BGR 0x100 @@ -48,9 +49,10 @@ enum pl110_version }; #define TYPE_PL110 "pl110" +typedef struct PL110State PL110State; #define PL110(obj) OBJECT_CHECK(PL110State, (obj), TYPE_PL110) -typedef struct PL110State { +struct PL110State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -73,7 +75,7 @@ typedef struct PL110State { uint32_t palette[256]; uint32_t raw_palette[128]; qemu_irq irq; -} PL110State; +}; static int vmstate_pl110_post_load(void *opaque, int version_id); diff --git a/hw/display/ramfb-standalone.c b/hw/display/ramfb-standalone.c index 28e25acc96..b15fc7e580 100644 --- a/hw/display/ramfb-standalone.c +++ b/hw/display/ramfb-standalone.c @@ -5,14 +5,16 @@ #include "hw/qdev-properties.h" #include "hw/display/ramfb.h" #include "ui/console.h" +#include "qom/object.h" +typedef struct RAMFBStandaloneState RAMFBStandaloneState; #define RAMFB(obj) OBJECT_CHECK(RAMFBStandaloneState, (obj), TYPE_RAMFB_DEVICE) -typedef struct RAMFBStandaloneState { +struct RAMFBStandaloneState { SysBusDevice parent_obj; QemuConsole *con; RAMFBState *state; -} RAMFBStandaloneState; +}; static void display_update_wrapper(void *dev) { diff --git a/hw/display/sii9022.c b/hw/display/sii9022.c index 7d0a97da6c..636bf66c1d 100644 --- a/hw/display/sii9022.c +++ b/hw/display/sii9022.c @@ -19,6 +19,7 @@ #include "migration/vmstate.h" #include "hw/display/i2c-ddc.h" #include "trace.h" +#include "qom/object.h" #define SII9022_SYS_CTRL_DATA 0x1a #define SII9022_SYS_CTRL_PWR_DWN 0x10 @@ -35,16 +36,17 @@ #define SII9022_INT_STATUS_PLUGGED 0x04; #define TYPE_SII9022 "sii9022" +typedef struct sii9022_state sii9022_state; #define SII9022(obj) OBJECT_CHECK(sii9022_state, (obj), TYPE_SII9022) -typedef struct sii9022_state { +struct sii9022_state { I2CSlave parent_obj; uint8_t ptr; bool addr_byte; bool ddc_req; bool ddc_skip_finish; bool ddc; -} sii9022_state; +}; static const VMStateDescription vmstate_sii9022 = { .name = "sii9022", diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 626f7393a0..7e456c4a0a 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -40,6 +40,7 @@ #include "ui/pixel_ops.h" #include "qemu/bswap.h" #include "trace.h" +#include "qom/object.h" #define MMIO_BASE_OFFSET 0x3e00000 #define MMIO_SIZE 0x200000 @@ -1931,10 +1932,11 @@ static const VMStateDescription vmstate_sm501_state = { }; #define TYPE_SYSBUS_SM501 "sysbus-sm501" +typedef struct SM501SysBusState SM501SysBusState; #define SYSBUS_SM501(obj) \ OBJECT_CHECK(SM501SysBusState, (obj), TYPE_SYSBUS_SM501) -typedef struct { +struct SM501SysBusState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -1942,7 +1944,7 @@ typedef struct { uint32_t vram_size; uint32_t base; SerialMM serial; -} SM501SysBusState; +}; static void sm501_realize_sysbus(DeviceState *dev, Error **errp) { @@ -2035,15 +2037,16 @@ static const TypeInfo sm501_sysbus_info = { TYPE_INFO(sm501_sysbus_info) #define TYPE_PCI_SM501 "sm501" +typedef struct SM501PCIState SM501PCIState; #define PCI_SM501(obj) OBJECT_CHECK(SM501PCIState, (obj), TYPE_PCI_SM501) -typedef struct { +struct SM501PCIState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ SM501State state; uint32_t vram_size; -} SM501PCIState; +}; static void sm501_realize_pci(PCIDevice *dev, Error **errp) { diff --git a/hw/display/ssd0303.c b/hw/display/ssd0303.c index 24e7fc1598..87f5b909ce 100644 --- a/hw/display/ssd0303.c +++ b/hw/display/ssd0303.c @@ -16,6 +16,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "ui/console.h" +#include "qom/object.h" //#define DEBUG_SSD0303 1 @@ -46,9 +47,10 @@ enum ssd0303_cmd { }; #define TYPE_SSD0303 "ssd0303" +typedef struct ssd0303_state ssd0303_state; #define SSD0303(obj) OBJECT_CHECK(ssd0303_state, (obj), TYPE_SSD0303) -typedef struct { +struct ssd0303_state { I2CSlave parent_obj; QemuConsole *con; @@ -63,7 +65,7 @@ typedef struct { enum ssd0303_mode mode; enum ssd0303_cmd cmd_state; uint8_t framebuffer[132*8]; -} ssd0303_state; +}; static uint8_t ssd0303_recv(I2CSlave *i2c) { diff --git a/hw/display/ssd0323.c b/hw/display/ssd0323.c index 056cc0b094..4818a3f648 100644 --- a/hw/display/ssd0323.c +++ b/hw/display/ssd0323.c @@ -16,6 +16,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "ui/console.h" +#include "qom/object.h" //#define DEBUG_SSD0323 1 @@ -47,7 +48,7 @@ enum ssd0323_mode SSD0323_DATA }; -typedef struct { +struct ssd0323_state { SSISlave ssidev; QemuConsole *con; @@ -64,7 +65,8 @@ typedef struct { int32_t remap; uint32_t mode; uint8_t framebuffer[128 * 80 / 2]; -} ssd0323_state; +}; +typedef struct ssd0323_state ssd0323_state; #define TYPE_SSD0323 "ssd0323" #define SSD0323(obj) OBJECT_CHECK(ssd0323_state, (obj), TYPE_SSD0323) diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 0d05421868..029bb2e4e9 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -33,6 +33,7 @@ #include "migration/vmstate.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" #define TCX_ROM_FILE "QEMU,tcx.bin" #define FCODE_MAX_ROM_SIZE 0x10000 @@ -55,9 +56,10 @@ #define TCX_THC_CURSBITS 0x980 #define TYPE_TCX "SUNW,tcx" +typedef struct TCXState TCXState; #define TCX(obj) OBJECT_CHECK(TCXState, (obj), TYPE_TCX) -typedef struct TCXState { +struct TCXState { SysBusDevice parent_obj; QemuConsole *con; @@ -93,7 +95,7 @@ typedef struct TCXState { uint32_t cursbits[32]; uint16_t cursx; uint16_t cursy; -} TCXState; +}; static void tcx_set_dirty(TCXState *s, ram_addr_t addr, int len) { diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c index 1561f702b9..896cd4c611 100644 --- a/hw/display/vga-isa.c +++ b/hw/display/vga-isa.c @@ -32,17 +32,19 @@ #include "qemu/timer.h" #include "hw/loader.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define TYPE_ISA_VGA "isa-vga" +typedef struct ISAVGAState ISAVGAState; #define ISA_VGA(obj) OBJECT_CHECK(ISAVGAState, (obj), TYPE_ISA_VGA) -typedef struct ISAVGAState { +struct ISAVGAState { ISADevice parent_obj; struct VGACommonState state; PortioList portio_vga; PortioList portio_vbe; -} ISAVGAState; +}; static void vga_isa_reset(DeviceState *dev) { diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index 5e8ddc9ac5..092e99787e 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -34,6 +34,7 @@ #include "qemu/timer.h" #include "hw/loader.h" #include "hw/display/edid.h" +#include "qom/object.h" enum vga_pci_flags { PCI_VGA_FLAG_ENABLE_MMIO = 1, @@ -41,7 +42,7 @@ enum vga_pci_flags { PCI_VGA_FLAG_ENABLE_EDID = 3, }; -typedef struct PCIVGAState { +struct PCIVGAState { PCIDevice dev; VGACommonState vga; uint32_t flags; @@ -49,7 +50,8 @@ typedef struct PCIVGAState { MemoryRegion mmio; MemoryRegion mrs[4]; uint8_t edid[256]; -} PCIVGAState; +}; +typedef struct PCIVGAState PCIVGAState; #define TYPE_PCI_VGA "pci-vga" #define PCI_VGA(obj) OBJECT_CHECK(PCIVGAState, (obj), TYPE_PCI_VGA) diff --git a/hw/display/vhost-user-gpu-pci.c b/hw/display/vhost-user-gpu-pci.c index 23ce655e0f..678b762bbb 100644 --- a/hw/display/vhost-user-gpu-pci.c +++ b/hw/display/vhost-user-gpu-pci.c @@ -11,16 +11,18 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/virtio/virtio-gpu-pci.h" +#include "qom/object.h" #define TYPE_VHOST_USER_GPU_PCI "vhost-user-gpu-pci" +typedef struct VhostUserGPUPCI VhostUserGPUPCI; #define VHOST_USER_GPU_PCI(obj) \ OBJECT_CHECK(VhostUserGPUPCI, (obj), TYPE_VHOST_USER_GPU_PCI) -typedef struct VhostUserGPUPCI { +struct VhostUserGPUPCI { VirtIOGPUPCIBase parent_obj; VhostUserGPU vdev; -} VhostUserGPUPCI; +}; static void vhost_user_gpu_pci_initfn(Object *obj) { diff --git a/hw/display/vhost-user-vga.c b/hw/display/vhost-user-vga.c index 1690f6b610..2cc9616bea 100644 --- a/hw/display/vhost-user-vga.c +++ b/hw/display/vhost-user-vga.c @@ -11,17 +11,19 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "virtio-vga.h" +#include "qom/object.h" #define TYPE_VHOST_USER_VGA "vhost-user-vga" +typedef struct VhostUserVGA VhostUserVGA; #define VHOST_USER_VGA(obj) \ OBJECT_CHECK(VhostUserVGA, (obj), TYPE_VHOST_USER_VGA) -typedef struct VhostUserVGA { +struct VhostUserVGA { VirtIOVGABase parent_obj; VhostUserGPU vdev; -} VhostUserVGA; +}; static void vhost_user_vga_inst_initfn(Object *obj) { diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 8a71ee4f7e..949ec88e12 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -19,6 +19,7 @@ #include "hw/virtio/virtio.h" #include "hw/virtio/virtio-bus.h" #include "hw/virtio/virtio-gpu-pci.h" +#include "qom/object.h" static Property virtio_gpu_pci_base_properties[] = { DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy), @@ -66,13 +67,14 @@ static const TypeInfo virtio_gpu_pci_base_info = { TYPE_INFO(virtio_gpu_pci_base_info) #define TYPE_VIRTIO_GPU_PCI "virtio-gpu-pci" +typedef struct VirtIOGPUPCI VirtIOGPUPCI; #define VIRTIO_GPU_PCI(obj) \ OBJECT_CHECK(VirtIOGPUPCI, (obj), TYPE_VIRTIO_GPU_PCI) -typedef struct VirtIOGPUPCI { +struct VirtIOGPUPCI { VirtIOGPUPCIBase parent_obj; VirtIOGPU vdev; -} VirtIOGPUPCI; +}; static void virtio_gpu_initfn(Object *obj) { diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index e1342c2ea1..66fafce541 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -5,6 +5,7 @@ #include "qapi/error.h" #include "qemu/module.h" #include "virtio-vga.h" +#include "qom/object.h" static void virtio_vga_base_invalidate_display(void *opaque) { @@ -203,14 +204,15 @@ TYPE_INFO(virtio_vga_base_info) #define TYPE_VIRTIO_VGA "virtio-vga" +typedef struct VirtIOVGA VirtIOVGA; #define VIRTIO_VGA(obj) \ OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA) -typedef struct VirtIOVGA { +struct VirtIOVGA { VirtIOVGABase parent_obj; VirtIOGPU vdev; -} VirtIOVGA; +}; static void virtio_vga_inst_initfn(Object *obj) { diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index 487d29f5c0..ac6d6b2b68 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -33,6 +33,7 @@ #include "hw/pci/pci.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" #undef VERBOSE #define HW_RECT_ACCEL diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c index 6c433137a0..da9e6c99a7 100644 --- a/hw/dma/i82374.c +++ b/hw/dma/i82374.c @@ -29,8 +29,10 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "hw/dma/i8257.h" +#include "qom/object.h" #define TYPE_I82374 "i82374" +typedef struct I82374State I82374State; #define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374) //#define DEBUG_I82374 @@ -45,13 +47,13 @@ do {} while (0) #define BADF(fmt, ...) \ do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0) -typedef struct I82374State { +struct I82374State { ISADevice parent_obj; uint32_t iobase; uint8_t commands[8]; PortioList port_list; -} I82374State; +}; static const VMStateDescription vmstate_i82374 = { .name = "i82374", diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c index 3288f31678..6724a989dc 100644 --- a/hw/dma/pl330.c +++ b/hw/dma/pl330.c @@ -26,6 +26,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #ifndef PL330_ERR_DEBUG #define PL330_ERR_DEBUG 0 diff --git a/hw/dma/puv3_dma.c b/hw/dma/puv3_dma.c index 225aa5146f..eb5c3de582 100644 --- a/hw/dma/puv3_dma.c +++ b/hw/dma/puv3_dma.c @@ -11,6 +11,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qom/object.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" @@ -22,14 +23,15 @@ #define PUV3_DMA_CH(offset) ((offset) >> 8) #define TYPE_PUV3_DMA "puv3_dma" +typedef struct PUV3DMAState PUV3DMAState; #define PUV3_DMA(obj) OBJECT_CHECK(PUV3DMAState, (obj), TYPE_PUV3_DMA) -typedef struct PUV3DMAState { +struct PUV3DMAState { SysBusDevice parent_obj; MemoryRegion iomem; uint32_t reg_CFG[PUV3_DMA_CH_NR]; -} PUV3DMAState; +}; static uint64_t puv3_dma_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c index b2f1f1b236..c81a2fbe72 100644 --- a/hw/dma/pxa2xx_dma.c +++ b/hw/dma/pxa2xx_dma.c @@ -18,6 +18,7 @@ #include "migration/vmstate.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" #define PXA255_DMA_NUM_CHANNELS 16 #define PXA27X_DMA_NUM_CHANNELS 32 @@ -34,9 +35,10 @@ typedef struct { } PXA2xxDMAChannel; #define TYPE_PXA2XX_DMA "pxa2xx-dma" +typedef struct PXA2xxDMAState PXA2xxDMAState; #define PXA2XX_DMA(obj) OBJECT_CHECK(PXA2xxDMAState, (obj), TYPE_PXA2XX_DMA) -typedef struct PXA2xxDMAState { +struct PXA2xxDMAState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -58,7 +60,7 @@ typedef struct PXA2xxDMAState { /* Flag to avoid recursive DMA invocations. */ int running; -} PXA2xxDMAState; +}; #define DCSR0 0x0000 /* DMA Control / Status register for Channel 0 */ #define DCSR31 0x007c /* DMA Control / Status register for Channel 31 */ diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index ccbda2ce82..b686a2ea33 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -34,6 +34,7 @@ #include "qemu/module.h" #include "exec/address-spaces.h" #include "trace.h" +#include "qom/object.h" /********************************************************/ /* rc4030 emulation */ @@ -55,12 +56,13 @@ typedef struct dma_pagetable_entry { #define DMA_FLAG_ADDR_INTR 0x0400 #define TYPE_RC4030 "rc4030" +typedef struct rc4030State rc4030State; #define RC4030(obj) \ OBJECT_CHECK(rc4030State, (obj), TYPE_RC4030) #define TYPE_RC4030_IOMMU_MEMORY_REGION "rc4030-iommu-memory-region" -typedef struct rc4030State { +struct rc4030State { SysBusDevice parent; @@ -101,7 +103,7 @@ typedef struct rc4030State { MemoryRegion iomem_chipset; MemoryRegion iomem_jazzio; -} rc4030State; +}; static void set_next_tick(rc4030State *s) { diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index 4c5c0c994b..39c8a49493 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -35,6 +35,7 @@ #include "sysemu/dma.h" #include "hw/stream.h" +#include "qom/object.h" #define D(x) @@ -42,9 +43,11 @@ #define TYPE_XILINX_AXI_DMA_DATA_STREAM "xilinx-axi-dma-data-stream" #define TYPE_XILINX_AXI_DMA_CONTROL_STREAM "xilinx-axi-dma-control-stream" +typedef struct XilinxAXIDMA XilinxAXIDMA; #define XILINX_AXI_DMA(obj) \ OBJECT_CHECK(XilinxAXIDMA, (obj), TYPE_XILINX_AXI_DMA) +typedef struct XilinxAXIDMAStreamSlave XilinxAXIDMAStreamSlave; #define XILINX_AXI_DMA_DATA_STREAM(obj) \ OBJECT_CHECK(XilinxAXIDMAStreamSlave, (obj),\ TYPE_XILINX_AXI_DMA_DATA_STREAM) @@ -62,8 +65,6 @@ #define CONTROL_PAYLOAD_WORDS 5 #define CONTROL_PAYLOAD_SIZE (CONTROL_PAYLOAD_WORDS * (sizeof(uint32_t))) -typedef struct XilinxAXIDMA XilinxAXIDMA; -typedef struct XilinxAXIDMAStreamSlave XilinxAXIDMAStreamSlave; enum { DMACR_RUNSTOP = 1, diff --git a/hw/gpio/gpio_key.c b/hw/gpio/gpio_key.c index 571b74a5e5..f1d6c8ff0e 100644 --- a/hw/gpio/gpio_key.c +++ b/hw/gpio/gpio_key.c @@ -28,17 +28,19 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "qemu/timer.h" +#include "qom/object.h" #define TYPE_GPIOKEY "gpio-key" +typedef struct GPIOKEYState GPIOKEYState; #define GPIOKEY(obj) OBJECT_CHECK(GPIOKEYState, (obj), TYPE_GPIOKEY) #define GPIO_KEY_LATENCY 100 /* 100ms */ -typedef struct GPIOKEYState { +struct GPIOKEYState { SysBusDevice parent_obj; QEMUTimer *timer; qemu_irq irq; -} GPIOKEYState; +}; static const VMStateDescription vmstate_gpio_key = { .name = "gpio-key", diff --git a/hw/gpio/max7310.c b/hw/gpio/max7310.c index 3a8e4ab1d5..969ca5bbf7 100644 --- a/hw/gpio/max7310.c +++ b/hw/gpio/max7310.c @@ -14,11 +14,13 @@ #include "hw/irq.h" #include "migration/vmstate.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_MAX7310 "max7310" +typedef struct MAX7310State MAX7310State; #define MAX7310(obj) OBJECT_CHECK(MAX7310State, (obj), TYPE_MAX7310) -typedef struct MAX7310State { +struct MAX7310State { I2CSlave parent_obj; int i2c_command_byte; @@ -31,7 +33,7 @@ typedef struct MAX7310State { uint8_t command; qemu_irq handler[8]; qemu_irq *gpio_in; -} MAX7310State; +}; static void max7310_reset(DeviceState *dev) { diff --git a/hw/gpio/mpc8xxx.c b/hw/gpio/mpc8xxx.c index b1bdcc2851..acf45f6e2c 100644 --- a/hw/gpio/mpc8xxx.c +++ b/hw/gpio/mpc8xxx.c @@ -24,11 +24,13 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_MPC8XXX_GPIO "mpc8xxx_gpio" +typedef struct MPC8XXXGPIOState MPC8XXXGPIOState; #define MPC8XXX_GPIO(obj) OBJECT_CHECK(MPC8XXXGPIOState, (obj), TYPE_MPC8XXX_GPIO) -typedef struct MPC8XXXGPIOState { +struct MPC8XXXGPIOState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -41,7 +43,7 @@ typedef struct MPC8XXXGPIOState { uint32_t ier; uint32_t imr; uint32_t icr; -} MPC8XXXGPIOState; +}; static const VMStateDescription vmstate_mpc8xxx_gpio = { .name = "mpc8xxx_gpio", diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c index b6ef1c7340..352c46d2c4 100644 --- a/hw/gpio/pl061.c +++ b/hw/gpio/pl061.c @@ -14,6 +14,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" //#define DEBUG_PL061 1 @@ -34,11 +35,12 @@ static const uint8_t pl061_id_luminary[12] = { 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 }; #define TYPE_PL061 "pl061" +typedef struct PL061State PL061State; #define PL061(obj) OBJECT_CHECK(PL061State, (obj), TYPE_PL061) #define N_GPIOS 8 -typedef struct PL061State { +struct PL061State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -67,7 +69,7 @@ typedef struct PL061State { qemu_irq out[N_GPIOS]; const unsigned char *id; uint32_t rsvd_start; /* reserved area: [rsvd_start, 0xfcc] */ -} PL061State; +}; static const VMStateDescription vmstate_pl061 = { .name = "pl061", diff --git a/hw/gpio/puv3_gpio.c b/hw/gpio/puv3_gpio.c index 4c2edda889..d4ef5cf0dc 100644 --- a/hw/gpio/puv3_gpio.c +++ b/hw/gpio/puv3_gpio.c @@ -11,6 +11,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qom/object.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" @@ -18,9 +19,10 @@ #include "qemu/log.h" #define TYPE_PUV3_GPIO "puv3_gpio" +typedef struct PUV3GPIOState PUV3GPIOState; #define PUV3_GPIO(obj) OBJECT_CHECK(PUV3GPIOState, (obj), TYPE_PUV3_GPIO) -typedef struct PUV3GPIOState { +struct PUV3GPIOState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -29,7 +31,7 @@ typedef struct PUV3GPIOState { uint32_t reg_GPLR; uint32_t reg_GPDR; uint32_t reg_GPIR; -} PUV3GPIOState; +}; static uint64_t puv3_gpio_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/gpio/zaurus.c b/hw/gpio/zaurus.c index 1100850a6c..a9c2bc7102 100644 --- a/hw/gpio/zaurus.c +++ b/hw/gpio/zaurus.c @@ -23,13 +23,14 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "qemu/log.h" +#include "qom/object.h" /* SCOOP devices */ #define TYPE_SCOOP "scoop" +typedef struct ScoopInfo ScoopInfo; #define SCOOP(obj) OBJECT_CHECK(ScoopInfo, (obj), TYPE_SCOOP) -typedef struct ScoopInfo ScoopInfo; struct ScoopInfo { SysBusDevice parent_obj; diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c index 27faa97644..853d65e304 100644 --- a/hw/hppa/dino.c +++ b/hw/hppa/dino.c @@ -22,6 +22,7 @@ #include "hppa_sys.h" #include "exec/address-spaces.h" #include "trace.h" +#include "qom/object.h" #define TYPE_DINO_PCI_HOST_BRIDGE "dino-pcihost" @@ -80,6 +81,7 @@ #define DINO_MEM_CHUNK_SIZE (8 * MiB) +typedef struct DinoState DinoState; #define DINO_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(DinoState, (obj), TYPE_DINO_PCI_HOST_BRIDGE) @@ -100,7 +102,7 @@ static const uint32_t reg800_keep_bits[DINO800_REGS] = { MAKE_64BIT_MASK(0, 9), /* TLTIM */ }; -typedef struct DinoState { +struct DinoState { PCIHostState parent_obj; /* PCI_CONFIG_ADDR is parent_obj.config_reg, via pci_host_conf_be_ops, @@ -129,7 +131,7 @@ typedef struct DinoState { MemoryRegion bm_ram_alias; MemoryRegion bm_pci_alias; MemoryRegion bm_cpu_alias; -} DinoState; +}; /* * Dino can forward memory accesses from the CPU in the range between diff --git a/hw/hppa/lasi.c b/hw/hppa/lasi.c index 8a54923c26..a3dd8761fa 100644 --- a/hw/hppa/lasi.c +++ b/hw/hppa/lasi.c @@ -25,6 +25,7 @@ #include "hw/input/lasips2.h" #include "exec/address-spaces.h" #include "migration/vmstate.h" +#include "qom/object.h" #define TYPE_LASI_CHIP "lasi-chip" @@ -51,12 +52,13 @@ #define ICR_BUS_ERROR_BIT LASI_BIT(8) /* bit 8 in ICR */ #define ICR_TOC_BIT LASI_BIT(1) /* bit 1 in ICR */ +typedef struct LasiState LasiState; #define LASI_CHIP(obj) \ OBJECT_CHECK(LasiState, (obj), TYPE_LASI_CHIP) #define LASI_RTC_HPA (LASI_HPA + 0x9000) -typedef struct LasiState { +struct LasiState { PCIHostState parent_obj; uint32_t irr; @@ -71,7 +73,7 @@ typedef struct LasiState { time_t rtc_ref; MemoryRegion this_mem; -} LasiState; +}; static bool lasi_chip_mem_valid(void *opaque, hwaddr addr, unsigned size, bool is_write, diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c index 07c9214bf1..89c6a0b6f9 100644 --- a/hw/hyperv/hyperv.c +++ b/hw/hyperv/hyperv.c @@ -20,8 +20,9 @@ #include "qemu/rcu.h" #include "qemu/rcu_queue.h" #include "hw/hyperv/hyperv.h" +#include "qom/object.h" -typedef struct SynICState { +struct SynICState { DeviceState parent_obj; CPUState *cs; @@ -33,7 +34,8 @@ typedef struct SynICState { MemoryRegion event_page_mr; struct hyperv_message_page *msg_page; struct hyperv_event_flags_page *event_page; -} SynICState; +}; +typedef struct SynICState SynICState; #define TYPE_SYNIC "hyperv-synic" #define SYNIC(obj) OBJECT_CHECK(SynICState, (obj), TYPE_SYNIC) diff --git a/hw/hyperv/hyperv_testdev.c b/hw/hyperv/hyperv_testdev.c index c83d0a9325..46b67c140e 100644 --- a/hw/hyperv/hyperv_testdev.c +++ b/hw/hyperv/hyperv_testdev.c @@ -17,6 +17,7 @@ #include "qemu/queue.h" #include "hw/isa/isa.h" #include "hw/hyperv/hyperv.h" +#include "qom/object.h" typedef struct TestSintRoute { QLIST_ENTRY(TestSintRoute) le; diff --git a/hw/i2c/bitbang_i2c.c b/hw/i2c/bitbang_i2c.c index 566ccf0d74..71d5cc89ae 100644 --- a/hw/i2c/bitbang_i2c.c +++ b/hw/i2c/bitbang_i2c.c @@ -15,6 +15,7 @@ #include "hw/i2c/bitbang_i2c.h" #include "hw/sysbus.h" #include "qemu/module.h" +#include "qom/object.h" //#define DEBUG_BITBANG_I2C @@ -162,16 +163,17 @@ void bitbang_i2c_init(bitbang_i2c_interface *s, I2CBus *bus) /* GPIO interface. */ #define TYPE_GPIO_I2C "gpio_i2c" +typedef struct GPIOI2CState GPIOI2CState; #define GPIO_I2C(obj) OBJECT_CHECK(GPIOI2CState, (obj), TYPE_GPIO_I2C) -typedef struct GPIOI2CState { +struct GPIOI2CState { SysBusDevice parent_obj; MemoryRegion dummy_iomem; bitbang_i2c_interface bitbang; int last_level; qemu_irq out; -} GPIOI2CState; +}; static void bitbang_i2c_gpio_set(void *opaque, int irq, int level) { diff --git a/hw/i2c/exynos4210_i2c.c b/hw/i2c/exynos4210_i2c.c index 3a803ebc8b..a8f49e32b6 100644 --- a/hw/i2c/exynos4210_i2c.c +++ b/hw/i2c/exynos4210_i2c.c @@ -27,12 +27,14 @@ #include "migration/vmstate.h" #include "hw/i2c/i2c.h" #include "hw/irq.h" +#include "qom/object.h" #ifndef EXYNOS4_I2C_DEBUG #define EXYNOS4_I2C_DEBUG 0 #endif #define TYPE_EXYNOS4_I2C "exynos4210.i2c" +typedef struct Exynos4210I2CState Exynos4210I2CState; #define EXYNOS4_I2C(obj) \ OBJECT_CHECK(Exynos4210I2CState, (obj), TYPE_EXYNOS4_I2C) @@ -83,7 +85,7 @@ static const char *exynos4_i2c_get_regname(unsigned offset) #define DPRINT(fmt, args...) do { } while (0) #endif -typedef struct Exynos4210I2CState { +struct Exynos4210I2CState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -96,7 +98,7 @@ typedef struct Exynos4210I2CState { uint8_t i2cds; uint8_t i2clc; bool scl_free; -} Exynos4210I2CState; +}; static inline void exynos4210_i2c_raise_interrupt(Exynos4210I2CState *s) { diff --git a/hw/i2c/mpc_i2c.c b/hw/i2c/mpc_i2c.c index c65fb2775b..30a9f737be 100644 --- a/hw/i2c/mpc_i2c.c +++ b/hw/i2c/mpc_i2c.c @@ -24,6 +24,7 @@ #include "qemu/module.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qom/object.h" /* #define DEBUG_I2C */ @@ -36,6 +37,7 @@ #endif #define TYPE_MPC_I2C "mpc-i2c" +typedef struct MPCI2CState MPCI2CState; #define MPC_I2C(obj) \ OBJECT_CHECK(MPCI2CState, (obj), TYPE_MPC_I2C) @@ -70,7 +72,7 @@ #define CYCLE_RESET 0xFF -typedef struct MPCI2CState { +struct MPCI2CState { SysBusDevice parent_obj; I2CBus *bus; @@ -84,7 +86,7 @@ typedef struct MPCI2CState { uint8_t sr; uint8_t dr; uint8_t dfssr; -} MPCI2CState; +}; static bool mpc_i2c_is_enabled(MPCI2CState *s) { diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c index cc506b6d4a..fefc6360a7 100644 --- a/hw/i2c/smbus_eeprom.c +++ b/hw/i2c/smbus_eeprom.c @@ -31,23 +31,25 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "hw/i2c/smbus_eeprom.h" +#include "qom/object.h" //#define DEBUG #define TYPE_SMBUS_EEPROM "smbus-eeprom" +typedef struct SMBusEEPROMDevice SMBusEEPROMDevice; #define SMBUS_EEPROM(obj) \ OBJECT_CHECK(SMBusEEPROMDevice, (obj), TYPE_SMBUS_EEPROM) #define SMBUS_EEPROM_SIZE 256 -typedef struct SMBusEEPROMDevice { +struct SMBusEEPROMDevice { SMBusDevice smbusdev; uint8_t data[SMBUS_EEPROM_SIZE]; uint8_t *init_data; uint8_t offset; bool accessed; -} SMBusEEPROMDevice; +}; static uint8_t eeprom_receive_byte(SMBusDevice *dev) { diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c index 37a41b5b77..15e1b6ced5 100644 --- a/hw/i2c/smbus_ich9.c +++ b/hw/i2c/smbus_ich9.c @@ -28,17 +28,19 @@ #include "qemu/module.h" #include "hw/i386/ich9.h" +#include "qom/object.h" +typedef struct ICH9SMBState ICH9SMBState; #define ICH9_SMB_DEVICE(obj) \ OBJECT_CHECK(ICH9SMBState, (obj), TYPE_ICH9_SMB_DEVICE) -typedef struct ICH9SMBState { +struct ICH9SMBState { PCIDevice dev; bool irq_enabled; PMSMBus smb; -} ICH9SMBState; +}; static bool ich9_vmstate_need_smbus(void *opaque, int version_id) { diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c index 13ddddef90..acd9617e9c 100644 --- a/hw/i2c/versatile_i2c.c +++ b/hw/i2c/versatile_i2c.c @@ -27,11 +27,12 @@ #include "hw/registerfields.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" +typedef ArmSbconI2CState VersatileI2CState; #define VERSATILE_I2C(obj) \ OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C) -typedef ArmSbconI2CState VersatileI2CState; REG32(CONTROL_GET, 0) diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c index e9f57d0e2b..1909c8a1dc 100644 --- a/hw/i386/kvm/clock.c +++ b/hw/i386/kvm/clock.c @@ -29,11 +29,13 @@ #include #include "standard-headers/asm-x86/kvm_para.h" +#include "qom/object.h" #define TYPE_KVM_CLOCK "kvmclock" +typedef struct KVMClockState KVMClockState; #define KVM_CLOCK(obj) OBJECT_CHECK(KVMClockState, (obj), TYPE_KVM_CLOCK) -typedef struct KVMClockState { +struct KVMClockState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -50,7 +52,7 @@ typedef struct KVMClockState { /* whether the 'clock' value was obtained in a host with * reliable KVM_GET_CLOCK */ bool clock_is_reliable; -} KVMClockState; +}; struct pvclock_vcpu_time_info { uint32_t version; diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c index 0f3d10d123..2f82f6d5f4 100644 --- a/hw/i386/kvm/i8254.c +++ b/hw/i386/kvm/i8254.c @@ -33,30 +33,33 @@ #include "hw/timer/i8254.h" #include "hw/timer/i8254_internal.h" #include "sysemu/kvm.h" +#include "qom/object.h" #define KVM_PIT_REINJECT_BIT 0 #define CALIBRATION_ROUNDS 3 +typedef struct KVMPITClass KVMPITClass; +typedef struct KVMPITState KVMPITState; #define KVM_PIT(obj) OBJECT_CHECK(KVMPITState, (obj), TYPE_KVM_I8254) #define KVM_PIT_CLASS(class) \ OBJECT_CLASS_CHECK(KVMPITClass, (class), TYPE_KVM_I8254) #define KVM_PIT_GET_CLASS(obj) \ OBJECT_GET_CLASS(KVMPITClass, (obj), TYPE_KVM_I8254) -typedef struct KVMPITState { +struct KVMPITState { PITCommonState parent_obj; LostTickPolicy lost_tick_policy; bool vm_stopped; int64_t kernel_clock_offset; -} KVMPITState; +}; -typedef struct KVMPITClass { +struct KVMPITClass { PITCommonClass parent_class; DeviceRealize parent_realize; -} KVMPITClass; +}; static int64_t abs64(int64_t v) { diff --git a/hw/i386/kvm/i8259.c b/hw/i386/kvm/i8259.c index f7844260d5..82986aff66 100644 --- a/hw/i386/kvm/i8259.c +++ b/hw/i386/kvm/i8259.c @@ -17,8 +17,10 @@ #include "hw/i386/apic_internal.h" #include "hw/irq.h" #include "sysemu/kvm.h" +#include "qom/object.h" #define TYPE_KVM_I8259 "kvm-i8259" +typedef struct KVMPICClass KVMPICClass; #define KVM_PIC_CLASS(class) \ OBJECT_CLASS_CHECK(KVMPICClass, (class), TYPE_KVM_I8259) #define KVM_PIC_GET_CLASS(obj) \ @@ -28,11 +30,11 @@ * KVMPICClass: * @parent_realize: The parent's realizefn. */ -typedef struct KVMPICClass { +struct KVMPICClass { PICCommonClass parent_class; DeviceRealize parent_realize; -} KVMPICClass; +}; static void kvm_pic_get(PICCommonState *s) { diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index a08519ee70..57360ebc43 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -22,6 +22,7 @@ #include "hw/boards.h" #include "migration/vmstate.h" #include "tcg/tcg.h" +#include "qom/object.h" #define VAPIC_IO_PORT 0x7e @@ -56,7 +57,7 @@ typedef struct GuestROMState { VAPICHandlers mp; } QEMU_PACKED GuestROMState; -typedef struct VAPICROMState { +struct VAPICROMState { SysBusDevice busdev; MemoryRegion io; MemoryRegion rom; @@ -69,7 +70,8 @@ typedef struct VAPICROMState { size_t rom_size; bool rom_mapped_writable; VMChangeStateEntry *vmsentry; -} VAPICROMState; +}; +typedef struct VAPICROMState VAPICROMState; #define TYPE_VAPIC "kvmvapic" #define VAPIC(obj) OBJECT_CHECK(VAPICROMState, (obj), TYPE_VAPIC) diff --git a/hw/i386/port92.c b/hw/i386/port92.c index cc41fb034f..6074e5088f 100644 --- a/hw/i386/port92.c +++ b/hw/i386/port92.c @@ -12,16 +12,18 @@ #include "hw/irq.h" #include "hw/i386/pc.h" #include "trace.h" +#include "qom/object.h" +typedef struct Port92State Port92State; #define PORT92(obj) OBJECT_CHECK(Port92State, (obj), TYPE_PORT92) -typedef struct Port92State { +struct Port92State { ISADevice parent_obj; MemoryRegion io; uint8_t outport; qemu_irq a20_out; -} Port92State; +}; static void port92_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c index cea1924e69..c3b14c23df 100644 --- a/hw/i386/vmmouse.c +++ b/hw/i386/vmmouse.c @@ -30,6 +30,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "cpu.h" +#include "qom/object.h" /* debug only vmmouse */ //#define DEBUG_VMMOUSE @@ -50,10 +51,10 @@ #endif #define TYPE_VMMOUSE "vmmouse" +typedef struct VMMouseState VMMouseState; #define VMMOUSE(obj) OBJECT_CHECK(VMMouseState, (obj), TYPE_VMMOUSE) -typedef struct VMMouseState -{ +struct VMMouseState { ISADevice parent_obj; uint32_t queue[VMMOUSE_QUEUE_SIZE]; @@ -63,7 +64,7 @@ typedef struct VMMouseState uint8_t absolute; QEMUPutMouseEntry *entry; ISAKBDState *i8042; -} VMMouseState; +}; static void vmmouse_get_data(uint32_t *data) { diff --git a/hw/i386/vmport.c b/hw/i386/vmport.c index 6379e14401..0fd6af31a8 100644 --- a/hw/i386/vmport.c +++ b/hw/i386/vmport.c @@ -38,6 +38,7 @@ #include "qemu/log.h" #include "cpu.h" #include "trace.h" +#include "qom/object.h" #define VMPORT_MAGIC 0x564D5868 @@ -62,9 +63,10 @@ #define VCPU_INFO_LEGACY_X2APIC_BIT 3 #define VCPU_INFO_RESERVED_BIT 31 +typedef struct VMPortState VMPortState; #define VMPORT(obj) OBJECT_CHECK(VMPortState, (obj), TYPE_VMPORT) -typedef struct VMPortState { +struct VMPortState { ISADevice parent_obj; MemoryRegion io; @@ -75,7 +77,7 @@ typedef struct VMPortState { uint8_t vmware_vmx_type; uint32_t compat_flags; -} VMPortState; +}; static VMPortState *port_state; diff --git a/hw/i386/xen/xen_platform.c b/hw/i386/xen/xen_platform.c index 93de73323b..fa0e86d26e 100644 --- a/hw/i386/xen/xen_platform.c +++ b/hw/i386/xen/xen_platform.c @@ -39,6 +39,7 @@ #include "qemu/module.h" #include +#include "qom/object.h" //#define DEBUG_PLATFORM @@ -52,7 +53,7 @@ #define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */ -typedef struct PCIXenPlatformState { +struct PCIXenPlatformState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -67,7 +68,8 @@ typedef struct PCIXenPlatformState { /* Log from guest drivers */ char log_buffer[4096]; int log_buffer_off; -} PCIXenPlatformState; +}; +typedef struct PCIXenPlatformState PCIXenPlatformState; #define TYPE_XEN_PLATFORM "xen-platform" #define XEN_PLATFORM(obj) \ diff --git a/hw/i386/xen/xen_pvdevice.c b/hw/i386/xen/xen_pvdevice.c index d62d26e0b6..7c65690689 100644 --- a/hw/i386/xen/xen_pvdevice.c +++ b/hw/i386/xen/xen_pvdevice.c @@ -36,13 +36,15 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "trace.h" +#include "qom/object.h" #define TYPE_XEN_PV_DEVICE "xen-pvdevice" +typedef struct XenPVDevice XenPVDevice; #define XEN_PV_DEVICE(obj) \ OBJECT_CHECK(XenPVDevice, (obj), TYPE_XEN_PV_DEVICE) -typedef struct XenPVDevice { +struct XenPVDevice { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -51,7 +53,7 @@ typedef struct XenPVDevice { uint8_t revision; uint32_t size; MemoryRegion mmio; -} XenPVDevice; +}; static uint64_t xen_pv_mmio_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/ide/isa.c b/hw/ide/isa.c index f63166f31d..cffd839d94 100644 --- a/hw/ide/isa.c +++ b/hw/ide/isa.c @@ -32,14 +32,16 @@ #include "sysemu/dma.h" #include "hw/ide/internal.h" +#include "qom/object.h" /***********************************************************/ /* ISA IDE definitions */ #define TYPE_ISA_IDE "isa-ide" +typedef struct ISAIDEState ISAIDEState; #define ISA_IDE(obj) OBJECT_CHECK(ISAIDEState, (obj), TYPE_ISA_IDE) -typedef struct ISAIDEState { +struct ISAIDEState { ISADevice parent_obj; IDEBus bus; @@ -47,7 +49,7 @@ typedef struct ISAIDEState { uint32_t iobase2; uint32_t isairq; qemu_irq irq; -} ISAIDEState; +}; static void isa_ide_reset(DeviceState *d) { diff --git a/hw/ide/microdrive.c b/hw/ide/microdrive.c index 97483e5836..7676e9383f 100644 --- a/hw/ide/microdrive.c +++ b/hw/ide/microdrive.c @@ -31,8 +31,10 @@ #include "sysemu/dma.h" #include "hw/ide/internal.h" +#include "qom/object.h" #define TYPE_MICRODRIVE "microdrive" +typedef struct MicroDriveState MicroDriveState; #define MICRODRIVE(obj) OBJECT_CHECK(MicroDriveState, (obj), TYPE_MICRODRIVE) /***********************************************************/ @@ -42,7 +44,7 @@ /* DSCM-1XXXX Microdrive hard disk with CF+ II / PCMCIA interface. */ -typedef struct MicroDriveState { +struct MicroDriveState { /*< private >*/ PCMCIACardState parent_obj; /*< public >*/ @@ -59,7 +61,7 @@ typedef struct MicroDriveState { uint8_t ctrl; uint16_t io; uint8_t cycle; -} MicroDriveState; +}; /* Register bitfields */ enum md_opt { diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c index 83f0d4a583..ff4bbbf938 100644 --- a/hw/ide/mmio.c +++ b/hw/ide/mmio.c @@ -31,6 +31,7 @@ #include "hw/ide/internal.h" #include "hw/qdev-properties.h" +#include "qom/object.h" /***********************************************************/ /* MMIO based ide port @@ -39,9 +40,10 @@ */ #define TYPE_MMIO_IDE "mmio-ide" +typedef struct MMIOIDEState MMIOState; #define MMIO_IDE(obj) OBJECT_CHECK(MMIOState, (obj), TYPE_MMIO_IDE) -typedef struct MMIOIDEState { +struct MMIOIDEState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -51,7 +53,7 @@ typedef struct MMIOIDEState { uint32_t shift; qemu_irq irq; MemoryRegion iomem1, iomem2; -} MMIOState; +}; static void mmio_ide_reset(DeviceState *dev) { diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c index 68279530fd..4730e798f3 100644 --- a/hw/ide/sii3112.c +++ b/hw/ide/sii3112.c @@ -16,8 +16,10 @@ #include "hw/ide/pci.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #define TYPE_SII3112_PCI "sii3112" +typedef struct SiI3112PCIState SiI3112PCIState; #define SII3112_PCI(obj) OBJECT_CHECK(SiI3112PCIState, (obj), \ TYPE_SII3112_PCI) @@ -28,11 +30,11 @@ typedef struct SiI3112Regs { uint8_t swdata; } SiI3112Regs; -typedef struct SiI3112PCIState { +struct SiI3112PCIState { PCIIDEState i; MemoryRegion mmio; SiI3112Regs regs[2]; -} SiI3112PCIState; +}; /* The sii3112_reg_read and sii3112_reg_write functions implement the * Internal Register Space - BAR5 (section 6.7 of the data sheet). diff --git a/hw/input/adb-kbd.c b/hw/input/adb-kbd.c index 4f0f546581..cb7c1f4306 100644 --- a/hw/input/adb-kbd.c +++ b/hw/input/adb-kbd.c @@ -30,30 +30,33 @@ #include "hw/input/adb-keys.h" #include "adb-internal.h" #include "trace.h" +#include "qom/object.h" +typedef struct ADBKeyboardClass ADBKeyboardClass; +typedef struct KBDState KBDState; #define ADB_KEYBOARD(obj) OBJECT_CHECK(KBDState, (obj), TYPE_ADB_KEYBOARD) -typedef struct KBDState { +struct KBDState { /*< private >*/ ADBDevice parent_obj; /*< public >*/ uint8_t data[128]; int rptr, wptr, count; -} KBDState; +}; #define ADB_KEYBOARD_CLASS(class) \ OBJECT_CLASS_CHECK(ADBKeyboardClass, (class), TYPE_ADB_KEYBOARD) #define ADB_KEYBOARD_GET_CLASS(obj) \ OBJECT_GET_CLASS(ADBKeyboardClass, (obj), TYPE_ADB_KEYBOARD) -typedef struct ADBKeyboardClass { +struct ADBKeyboardClass { /*< private >*/ ADBDeviceClass parent_class; /*< public >*/ DeviceRealize parent_realize; -} ADBKeyboardClass; +}; /* The adb keyboard doesn't have every key imaginable */ #define NO_KEY 0xff diff --git a/hw/input/adb-mouse.c b/hw/input/adb-mouse.c index c0c8dead39..27cc9d40b9 100644 --- a/hw/input/adb-mouse.c +++ b/hw/input/adb-mouse.c @@ -29,30 +29,33 @@ #include "qemu/module.h" #include "adb-internal.h" #include "trace.h" +#include "qom/object.h" +typedef struct ADBMouseClass ADBMouseClass; +typedef struct MouseState MouseState; #define ADB_MOUSE(obj) OBJECT_CHECK(MouseState, (obj), TYPE_ADB_MOUSE) -typedef struct MouseState { +struct MouseState { /*< public >*/ ADBDevice parent_obj; /*< private >*/ int buttons_state, last_buttons_state; int dx, dy, dz; -} MouseState; +}; #define ADB_MOUSE_CLASS(class) \ OBJECT_CLASS_CHECK(ADBMouseClass, (class), TYPE_ADB_MOUSE) #define ADB_MOUSE_GET_CLASS(obj) \ OBJECT_GET_CLASS(ADBMouseClass, (obj), TYPE_ADB_MOUSE) -typedef struct ADBMouseClass { +struct ADBMouseClass { /*< public >*/ ADBDeviceClass parent_class; /*< private >*/ DeviceRealize parent_realize; -} ADBMouseClass; +}; static void adb_mouse_event(void *opaque, int dx1, int dy1, int dz1, int buttons_state) diff --git a/hw/input/lm832x.c b/hw/input/lm832x.c index ffe68b081a..569cd26a44 100644 --- a/hw/input/lm832x.c +++ b/hw/input/lm832x.c @@ -25,11 +25,13 @@ #include "qemu/module.h" #include "qemu/timer.h" #include "ui/console.h" +#include "qom/object.h" #define TYPE_LM8323 "lm8323" +typedef struct LM823KbdState LM823KbdState; #define LM8323(obj) OBJECT_CHECK(LM823KbdState, (obj), TYPE_LM8323) -typedef struct { +struct LM823KbdState { I2CSlave parent_obj; uint8_t i2c_dir; @@ -72,7 +74,7 @@ typedef struct { uint8_t addr[3]; QEMUTimer *tm[3]; } pwm; -} LM823KbdState; +}; #define INT_KEYPAD (1 << 0) #define INT_ERROR (1 << 3) diff --git a/hw/input/milkymist-softusb.c b/hw/input/milkymist-softusb.c index 73ee7edbd0..4dfa04bef0 100644 --- a/hw/input/milkymist-softusb.c +++ b/hw/input/milkymist-softusb.c @@ -32,6 +32,7 @@ #include "hw/qdev-properties.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { R_CTRL = 0, @@ -50,6 +51,7 @@ enum { #define COMLOC_KEVT_BASE 0x1143 #define TYPE_MILKYMIST_SOFTUSB "milkymist-softusb" +typedef struct MilkymistSoftUsbState MilkymistSoftUsbState; #define MILKYMIST_SOFTUSB(obj) \ OBJECT_CHECK(MilkymistSoftUsbState, (obj), TYPE_MILKYMIST_SOFTUSB) @@ -80,7 +82,6 @@ struct MilkymistSoftUsbState { /* keyboard state */ uint8_t kbd_hid_buffer[8]; }; -typedef struct MilkymistSoftUsbState MilkymistSoftUsbState; static uint64_t softusb_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/input/pl050.c b/hw/input/pl050.c index b018e708a6..af2b81f5c0 100644 --- a/hw/input/pl050.c +++ b/hw/input/pl050.c @@ -14,11 +14,13 @@ #include "hw/irq.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_PL050 "pl050" +typedef struct PL050State PL050State; #define PL050(obj) OBJECT_CHECK(PL050State, (obj), TYPE_PL050) -typedef struct PL050State { +struct PL050State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -29,7 +31,7 @@ typedef struct PL050State { int pending; qemu_irq irq; bool is_mouse; -} PL050State; +}; static const VMStateDescription vmstate_pl050 = { .name = "pl050", diff --git a/hw/intc/apic.c b/hw/intc/apic.c index 770e14fc3e..afbb653497 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -28,6 +28,7 @@ #include "trace.h" #include "hw/i386/apic-msidef.h" #include "qapi/error.h" +#include "qom/object.h" #define MAX_APICS 255 #define MAX_APIC_WORDS 8 diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c index b0379ea4c5..8bc90aa65d 100644 --- a/hw/intc/arm_gic_kvm.c +++ b/hw/intc/arm_gic_kvm.c @@ -29,8 +29,10 @@ #include "kvm_arm.h" #include "gic_internal.h" #include "vgic_common.h" +#include "qom/object.h" #define TYPE_KVM_ARM_GIC "kvm-arm-gic" +typedef struct KVMARMGICClass KVMARMGICClass; #define KVM_ARM_GIC(obj) \ OBJECT_CHECK(GICState, (obj), TYPE_KVM_ARM_GIC) #define KVM_ARM_GIC_CLASS(klass) \ @@ -38,11 +40,11 @@ #define KVM_ARM_GIC_GET_CLASS(obj) \ OBJECT_GET_CLASS(KVMARMGICClass, (obj), TYPE_KVM_ARM_GIC) -typedef struct KVMARMGICClass { +struct KVMARMGICClass { ARMGICCommonClass parent_class; DeviceRealize parent_realize; void (*parent_reset)(DeviceState *dev); -} KVMARMGICClass; +}; void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level) { diff --git a/hw/intc/arm_gicv2m.c b/hw/intc/arm_gicv2m.c index d129a8c9f1..99a3cfbad5 100644 --- a/hw/intc/arm_gicv2m.c +++ b/hw/intc/arm_gicv2m.c @@ -34,8 +34,10 @@ #include "sysemu/kvm.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_ARM_GICV2M "arm-gicv2m" +typedef struct ARMGICv2mState ARMGICv2mState; #define ARM_GICV2M(obj) OBJECT_CHECK(ARMGICv2mState, (obj), TYPE_ARM_GICV2M) #define GICV2M_NUM_SPI_MAX 128 @@ -48,7 +50,7 @@ #define PRODUCT_ID_QEMU 0x51 /* ASCII code Q */ -typedef struct ARMGICv2mState { +struct ARMGICv2mState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -56,7 +58,7 @@ typedef struct ARMGICv2mState { uint32_t base_spi; uint32_t num_spi; -} ARMGICv2mState; +}; static void gicv2m_set_irq(void *opaque, int irq) { diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c index ddd3a5a665..198be30cf5 100644 --- a/hw/intc/arm_gicv3_its_kvm.c +++ b/hw/intc/arm_gicv3_its_kvm.c @@ -27,18 +27,20 @@ #include "sysemu/kvm.h" #include "kvm_arm.h" #include "migration/blocker.h" +#include "qom/object.h" #define TYPE_KVM_ARM_ITS "arm-its-kvm" +typedef struct KVMARMITSClass KVMARMITSClass; #define KVM_ARM_ITS(obj) OBJECT_CHECK(GICv3ITSState, (obj), TYPE_KVM_ARM_ITS) #define KVM_ARM_ITS_CLASS(klass) \ OBJECT_CLASS_CHECK(KVMARMITSClass, (klass), TYPE_KVM_ARM_ITS) #define KVM_ARM_ITS_GET_CLASS(obj) \ OBJECT_GET_CLASS(KVMARMITSClass, (obj), TYPE_KVM_ARM_ITS) -typedef struct KVMARMITSClass { +struct KVMARMITSClass { GICv3ITSCommonClass parent_class; void (*parent_reset)(DeviceState *dev); -} KVMARMITSClass; +}; static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t devid) diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c index 30d09d307e..87092795e6 100644 --- a/hw/intc/arm_gicv3_kvm.c +++ b/hw/intc/arm_gicv3_kvm.c @@ -31,6 +31,7 @@ #include "gicv3_internal.h" #include "vgic_common.h" #include "migration/blocker.h" +#include "qom/object.h" #ifdef DEBUG_GICV3_KVM #define DPRINTF(fmt, ...) \ @@ -41,6 +42,7 @@ #endif #define TYPE_KVM_ARM_GICV3 "kvm-arm-gicv3" +typedef struct KVMARMGICv3Class KVMARMGICv3Class; #define KVM_ARM_GICV3(obj) \ OBJECT_CHECK(GICv3State, (obj), TYPE_KVM_ARM_GICV3) #define KVM_ARM_GICV3_CLASS(klass) \ @@ -74,11 +76,11 @@ #define ICC_IGRPEN1_EL1 \ KVM_DEV_ARM_VGIC_SYSREG(3, 0, 12, 12, 7) -typedef struct KVMARMGICv3Class { +struct KVMARMGICv3Class { ARMGICv3CommonClass parent_class; DeviceRealize parent_realize; void (*parent_reset)(DeviceState *dev); -} KVMARMGICv3Class; +}; static void kvm_arm_gicv3_set_irq(void *opaque, int irq, int level) { diff --git a/hw/intc/etraxfs_pic.c b/hw/intc/etraxfs_pic.c index d77d65ed38..0dae5ec090 100644 --- a/hw/intc/etraxfs_pic.c +++ b/hw/intc/etraxfs_pic.c @@ -27,6 +27,7 @@ #include "qemu/module.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define D(x) diff --git a/hw/intc/exynos4210_combiner.c b/hw/intc/exynos4210_combiner.c index d0365915af..296cd2c5d1 100644 --- a/hw/intc/exynos4210_combiner.c +++ b/hw/intc/exynos4210_combiner.c @@ -36,6 +36,7 @@ #include "hw/hw.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" //#define DEBUG_COMBINER @@ -63,10 +64,11 @@ typedef struct CombinerGroupState { } CombinerGroupState; #define TYPE_EXYNOS4210_COMBINER "exynos4210.combiner" +typedef struct Exynos4210CombinerState Exynos4210CombinerState; #define EXYNOS4210_COMBINER(obj) \ OBJECT_CHECK(Exynos4210CombinerState, (obj), TYPE_EXYNOS4210_COMBINER) -typedef struct Exynos4210CombinerState { +struct Exynos4210CombinerState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -77,7 +79,7 @@ typedef struct Exynos4210CombinerState { uint32_t external; /* 1 means that this combiner is external */ qemu_irq output_irq[IIC_NGRP]; -} Exynos4210CombinerState; +}; static const VMStateDescription vmstate_exynos4210_combiner_group_state = { .name = "exynos4210.combiner.groupstate", diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c index a01ab137eb..711f0597b8 100644 --- a/hw/intc/exynos4210_gic.c +++ b/hw/intc/exynos4210_gic.c @@ -28,6 +28,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/arm/exynos4210.h" +#include "qom/object.h" enum ExtGicId { EXT_GIC_ID_MDMA_LCD0 = 66, @@ -264,10 +265,11 @@ uint32_t exynos4210_get_irq(uint32_t grp, uint32_t bit) /********* GIC part *********/ #define TYPE_EXYNOS4210_GIC "exynos4210.gic" +typedef struct Exynos4210GicState Exynos4210GicState; #define EXYNOS4210_GIC(obj) \ OBJECT_CHECK(Exynos4210GicState, (obj), TYPE_EXYNOS4210_GIC) -typedef struct { +struct Exynos4210GicState { SysBusDevice parent_obj; MemoryRegion cpu_container; @@ -276,7 +278,7 @@ typedef struct { MemoryRegion dist_alias[EXYNOS4210_NCPUS]; uint32_t num_cpu; DeviceState *gic; -} Exynos4210GicState; +}; static void exynos4210_gic_set_irq(void *opaque, int irq, int level) { @@ -378,16 +380,17 @@ TYPE_INFO(exynos4210_gic_info) */ #define TYPE_EXYNOS4210_IRQ_GATE "exynos4210.irq_gate" +typedef struct Exynos4210IRQGateState Exynos4210IRQGateState; #define EXYNOS4210_IRQ_GATE(obj) \ OBJECT_CHECK(Exynos4210IRQGateState, (obj), TYPE_EXYNOS4210_IRQ_GATE) -typedef struct Exynos4210IRQGateState { +struct Exynos4210IRQGateState { SysBusDevice parent_obj; uint32_t n_in; /* inputs amount */ uint32_t *level; /* input levels */ qemu_irq out; /* output IRQ */ -} Exynos4210IRQGateState; +}; static Property exynos4210_irq_gate_properties[] = { DEFINE_PROP_UINT32("n_in", Exynos4210IRQGateState, n_in, 1), diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index 1a3c846cee..734f3803cf 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -35,6 +35,7 @@ #include "trace.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" #define IRQMP_MAX_CPU 16 #define IRQMP_REG_SIZE 256 /* Size of memory mapped registers */ @@ -50,18 +51,19 @@ #define FORCE_OFFSET 0x80 #define EXTENDED_OFFSET 0xC0 +typedef struct IRQMP IRQMP; #define GRLIB_IRQMP(obj) OBJECT_CHECK(IRQMP, (obj), TYPE_GRLIB_IRQMP) typedef struct IRQMPState IRQMPState; -typedef struct IRQMP { +struct IRQMP { SysBusDevice parent_obj; MemoryRegion iomem; IRQMPState *state; qemu_irq irq; -} IRQMP; +}; struct IRQMPState { uint32_t level; diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c index a213683f44..cf69921d31 100644 --- a/hw/intc/i8259.c +++ b/hw/intc/i8259.c @@ -30,6 +30,7 @@ #include "qemu/log.h" #include "hw/isa/i8259_internal.h" #include "trace.h" +#include "qom/object.h" /* debug PIC */ //#define DEBUG_PIC @@ -37,6 +38,7 @@ //#define DEBUG_IRQ_LATENCY #define TYPE_I8259 "isa-i8259" +typedef struct PICClass PICClass; #define PIC_CLASS(class) OBJECT_CLASS_CHECK(PICClass, (class), TYPE_I8259) #define PIC_GET_CLASS(obj) OBJECT_GET_CLASS(PICClass, (obj), TYPE_I8259) @@ -44,11 +46,11 @@ * PICClass: * @parent_realize: The parent's realizefn. */ -typedef struct PICClass { +struct PICClass { PICCommonClass parent_class; DeviceRealize parent_realize; -} PICClass; +}; #ifdef DEBUG_IRQ_LATENCY static int64_t irq_time[16]; diff --git a/hw/intc/lm32_pic.c b/hw/intc/lm32_pic.c index 2f609dc93f..ec6535d37b 100644 --- a/hw/intc/lm32_pic.c +++ b/hw/intc/lm32_pic.c @@ -27,8 +27,10 @@ #include "hw/lm32/lm32_pic.h" #include "hw/intc/intc.h" #include "hw/irq.h" +#include "qom/object.h" #define TYPE_LM32_PIC "lm32-pic" +typedef struct LM32PicState LM32PicState; #define LM32_PIC(obj) OBJECT_CHECK(LM32PicState, (obj), TYPE_LM32_PIC) struct LM32PicState { @@ -42,7 +44,6 @@ struct LM32PicState { /* statistics */ uint64_t stats_irq_count[32]; }; -typedef struct LM32PicState LM32PicState; static void update_irq(LM32PicState *s) { diff --git a/hw/intc/loongson_liointc.c b/hw/intc/loongson_liointc.c index 10e4c7278b..81b2672cd3 100644 --- a/hw/intc/loongson_liointc.c +++ b/hw/intc/loongson_liointc.c @@ -23,6 +23,7 @@ #include "qemu/module.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define D(x) diff --git a/hw/intc/nios2_iic.c b/hw/intc/nios2_iic.c index 43abcd95aa..156139792e 100644 --- a/hw/intc/nios2_iic.c +++ b/hw/intc/nios2_iic.c @@ -25,16 +25,18 @@ #include "hw/irq.h" #include "hw/sysbus.h" #include "cpu.h" +#include "qom/object.h" #define TYPE_ALTERA_IIC "altera,iic" +typedef struct AlteraIIC AlteraIIC; #define ALTERA_IIC(obj) \ OBJECT_CHECK(AlteraIIC, (obj), TYPE_ALTERA_IIC) -typedef struct AlteraIIC { +struct AlteraIIC { SysBusDevice parent_obj; void *cpu; qemu_irq parent_irq; -} AlteraIIC; +}; static void update_irq(AlteraIIC *pv) { diff --git a/hw/intc/ompic.c b/hw/intc/ompic.c index d01b593cc4..8db109298f 100644 --- a/hw/intc/ompic.c +++ b/hw/intc/ompic.c @@ -15,8 +15,10 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "exec/memory.h" +#include "qom/object.h" #define TYPE_OR1K_OMPIC "or1k-ompic" +typedef struct OR1KOMPICState OR1KOMPICState; #define OR1K_OMPIC(obj) OBJECT_CHECK(OR1KOMPICState, (obj), TYPE_OR1K_OMPIC) #define OMPIC_CTRL_IRQ_ACK (1 << 31) @@ -37,7 +39,6 @@ #define OMPIC_MAX_CPUS 4 /* Real max is much higher, but dont waste memory */ #define OMPIC_ADDRSPACE_SZ (OMPIC_MAX_CPUS * 2 * 4) /* 2 32-bit regs per cpu */ -typedef struct OR1KOMPICState OR1KOMPICState; typedef struct OR1KOMPICCPUState OR1KOMPICCPUState; struct OR1KOMPICCPUState { diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c index f0add3e3ee..0f67683b1a 100644 --- a/hw/intc/openpic_kvm.c +++ b/hw/intc/openpic_kvm.c @@ -35,13 +35,15 @@ #include "sysemu/kvm.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define GCR_RESET 0x80000000 +typedef struct KVMOpenPICState KVMOpenPICState; #define KVM_OPENPIC(obj) \ OBJECT_CHECK(KVMOpenPICState, (obj), TYPE_KVM_OPENPIC) -typedef struct KVMOpenPICState { +struct KVMOpenPICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -51,7 +53,7 @@ typedef struct KVMOpenPICState { uint32_t fd; uint32_t model; hwaddr mapped; -} KVMOpenPICState; +}; static void kvm_openpic_set_irq(void *opaque, int n_IRQ, int level) { diff --git a/hw/intc/pl190.c b/hw/intc/pl190.c index 5b237c0920..6fd0d6856b 100644 --- a/hw/intc/pl190.c +++ b/hw/intc/pl190.c @@ -13,6 +13,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" /* The number of virtual priority levels. 16 user vectors plus the unvectored IRQ. Chained interrupts would require an additional level @@ -21,9 +22,10 @@ #define PL190_NUM_PRIO 17 #define TYPE_PL190 "pl190" +typedef struct PL190State PL190State; #define PL190(obj) OBJECT_CHECK(PL190State, (obj), TYPE_PL190) -typedef struct PL190State { +struct PL190State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -41,7 +43,7 @@ typedef struct PL190State { int prev_prio[PL190_NUM_PRIO]; qemu_irq irq; qemu_irq fiq; -} PL190State; +}; static const unsigned char pl190_id[] = { 0x90, 0x11, 0x04, 0x00, 0x0D, 0xf0, 0x05, 0xb1 }; diff --git a/hw/intc/puv3_intc.c b/hw/intc/puv3_intc.c index 3f43aea812..cf8b472639 100644 --- a/hw/intc/puv3_intc.c +++ b/hw/intc/puv3_intc.c @@ -12,6 +12,7 @@ #include "qemu/osdep.h" #include "hw/irq.h" #include "hw/sysbus.h" +#include "qom/object.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" @@ -19,9 +20,10 @@ #include "qemu/log.h" #define TYPE_PUV3_INTC "puv3_intc" +typedef struct PUV3INTCState PUV3INTCState; #define PUV3_INTC(obj) OBJECT_CHECK(PUV3INTCState, (obj), TYPE_PUV3_INTC) -typedef struct PUV3INTCState { +struct PUV3INTCState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -29,7 +31,7 @@ typedef struct PUV3INTCState { uint32_t reg_ICMR; uint32_t reg_ICPR; -} PUV3INTCState; +}; /* Update interrupt status after enabled or pending bits have been changed. */ static void puv3_intc_update(PUV3INTCState *s) diff --git a/hw/intc/s390_flic_kvm.c b/hw/intc/s390_flic_kvm.c index a48adef68d..bac2ac3c13 100644 --- a/hw/intc/s390_flic_kvm.c +++ b/hw/intc/s390_flic_kvm.c @@ -24,6 +24,7 @@ #include "hw/s390x/css.h" #include "migration/qemu-file-types.h" #include "trace.h" +#include "qom/object.h" #define FLIC_SAVE_INITIAL_SIZE qemu_real_host_page_size #define FLIC_FAILED (-1UL) @@ -569,10 +570,11 @@ static const VMStateDescription kvm_s390_flic_vmstate = { } }; -typedef struct KVMS390FLICStateClass { +struct KVMS390FLICStateClass { S390FLICStateClass parent_class; DeviceRealize parent_realize; -} KVMS390FLICStateClass; +}; +typedef struct KVMS390FLICStateClass KVMS390FLICStateClass; #define KVM_S390_FLIC_GET_CLASS(obj) \ OBJECT_GET_CLASS(KVMS390FLICStateClass, (obj), TYPE_KVM_S390_FLIC) diff --git a/hw/intc/slavio_intctl.c b/hw/intc/slavio_intctl.c index 65aea84cf3..890a55dbec 100644 --- a/hw/intc/slavio_intctl.c +++ b/hw/intc/slavio_intctl.c @@ -30,6 +30,7 @@ #include "hw/intc/intc.h" #include "hw/irq.h" #include "trace.h" +#include "qom/object.h" //#define DEBUG_IRQ_COUNT @@ -58,10 +59,11 @@ typedef struct SLAVIO_CPUINTCTLState { } SLAVIO_CPUINTCTLState; #define TYPE_SLAVIO_INTCTL "slavio_intctl" +typedef struct SLAVIO_INTCTLState SLAVIO_INTCTLState; #define SLAVIO_INTCTL(obj) \ OBJECT_CHECK(SLAVIO_INTCTLState, (obj), TYPE_SLAVIO_INTCTL) -typedef struct SLAVIO_INTCTLState { +struct SLAVIO_INTCTLState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -73,7 +75,7 @@ typedef struct SLAVIO_INTCTLState { uint32_t intregm_pending; uint32_t intregm_disabled; uint32_t target_cpu; -} SLAVIO_INTCTLState; +}; #define INTCTL_MAXADDR 0xf #define INTCTL_SIZE (INTCTL_MAXADDR + 1) diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c index 4efd6297ca..66ce18955e 100644 --- a/hw/intc/xilinx_intc.c +++ b/hw/intc/xilinx_intc.c @@ -27,6 +27,7 @@ #include "qemu/module.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define D(x) diff --git a/hw/ipack/tpci200.c b/hw/ipack/tpci200.c index 292836b379..71dfb046da 100644 --- a/hw/ipack/tpci200.c +++ b/hw/ipack/tpci200.c @@ -16,6 +16,7 @@ #include "migration/vmstate.h" #include "qemu/bitops.h" #include "qemu/module.h" +#include "qom/object.h" /* #define DEBUG_TPCI */ @@ -54,7 +55,7 @@ #define REG_STATUS 0x0C #define IP_N_FROM_REG(REG) ((REG) / 2 - 1) -typedef struct { +struct TPCI200State { PCIDevice dev; IPackBus bus; MemoryRegion mmio; @@ -67,7 +68,8 @@ typedef struct { uint8_t ctrl[N_MODULES]; uint16_t status; uint8_t int_set; -} TPCI200State; +}; +typedef struct TPCI200State TPCI200State; #define TYPE_TPCI200 "tpci200" diff --git a/hw/ipmi/ipmi_bmc_extern.c b/hw/ipmi/ipmi_bmc_extern.c index f9a13e0a44..018667e0ca 100644 --- a/hw/ipmi/ipmi_bmc_extern.c +++ b/hw/ipmi/ipmi_bmc_extern.c @@ -36,6 +36,7 @@ #include "hw/ipmi/ipmi.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" #define VM_MSG_CHAR 0xA0 /* Marks end of message */ #define VM_CMD_CHAR 0xA1 /* Marks end of a command */ @@ -61,9 +62,10 @@ #define VM_CMD_GRACEFUL_SHUTDOWN 0x09 #define TYPE_IPMI_BMC_EXTERN "ipmi-bmc-extern" +typedef struct IPMIBmcExtern IPMIBmcExtern; #define IPMI_BMC_EXTERN(obj) OBJECT_CHECK(IPMIBmcExtern, (obj), \ TYPE_IPMI_BMC_EXTERN) -typedef struct IPMIBmcExtern { +struct IPMIBmcExtern { IPMIBmc parent; CharBackend chr; @@ -85,7 +87,7 @@ typedef struct IPMIBmcExtern { /* A reset event is pending to be sent upstream. */ bool send_reset; -} IPMIBmcExtern; +}; static unsigned char ipmb_checksum(const unsigned char *data, int size, unsigned char start) diff --git a/hw/ipmi/isa_ipmi_bt.c b/hw/ipmi/isa_ipmi_bt.c index 389b4ece7f..f8a38cef74 100644 --- a/hw/ipmi/isa_ipmi_bt.c +++ b/hw/ipmi/isa_ipmi_bt.c @@ -31,18 +31,20 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" #define TYPE_ISA_IPMI_BT "isa-ipmi-bt" +typedef struct ISAIPMIBTDevice ISAIPMIBTDevice; #define ISA_IPMI_BT(obj) OBJECT_CHECK(ISAIPMIBTDevice, (obj), \ TYPE_ISA_IPMI_BT) -typedef struct ISAIPMIBTDevice { +struct ISAIPMIBTDevice { ISADevice dev; int32_t isairq; qemu_irq irq; IPMIBT bt; uint32_t uuid; -} ISAIPMIBTDevice; +}; static void isa_ipmi_bt_get_fwinfo(struct IPMIInterface *ii, IPMIFwInfo *info) { diff --git a/hw/ipmi/isa_ipmi_kcs.c b/hw/ipmi/isa_ipmi_kcs.c index 465aba5ac8..c2885bafee 100644 --- a/hw/ipmi/isa_ipmi_kcs.c +++ b/hw/ipmi/isa_ipmi_kcs.c @@ -31,18 +31,20 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" #define TYPE_ISA_IPMI_KCS "isa-ipmi-kcs" +typedef struct ISAIPMIKCSDevice ISAIPMIKCSDevice; #define ISA_IPMI_KCS(obj) OBJECT_CHECK(ISAIPMIKCSDevice, (obj), \ TYPE_ISA_IPMI_KCS) -typedef struct ISAIPMIKCSDevice { +struct ISAIPMIKCSDevice { ISADevice dev; int32_t isairq; qemu_irq irq; IPMIKCS kcs; uint32_t uuid; -} ISAIPMIKCSDevice; +}; static void isa_ipmi_kcs_get_fwinfo(IPMIInterface *ii, IPMIFwInfo *info) { diff --git a/hw/ipmi/pci_ipmi_bt.c b/hw/ipmi/pci_ipmi_bt.c index 4d20d36ed1..0a2a04b368 100644 --- a/hw/ipmi/pci_ipmi_bt.c +++ b/hw/ipmi/pci_ipmi_bt.c @@ -26,17 +26,19 @@ #include "qapi/error.h" #include "hw/ipmi/ipmi_bt.h" #include "hw/pci/pci.h" +#include "qom/object.h" #define TYPE_PCI_IPMI_BT "pci-ipmi-bt" +typedef struct PCIIPMIBTDevice PCIIPMIBTDevice; #define PCI_IPMI_BT(obj) OBJECT_CHECK(PCIIPMIBTDevice, (obj), \ TYPE_PCI_IPMI_BT) -typedef struct PCIIPMIBTDevice { +struct PCIIPMIBTDevice { PCIDevice dev; IPMIBT bt; bool irq_enabled; uint32_t uuid; -} PCIIPMIBTDevice; +}; static void pci_ipmi_raise_irq(IPMIBT *ik) { diff --git a/hw/ipmi/pci_ipmi_kcs.c b/hw/ipmi/pci_ipmi_kcs.c index f3f4cee8f5..2bd5311200 100644 --- a/hw/ipmi/pci_ipmi_kcs.c +++ b/hw/ipmi/pci_ipmi_kcs.c @@ -26,17 +26,19 @@ #include "qapi/error.h" #include "hw/ipmi/ipmi_kcs.h" #include "hw/pci/pci.h" +#include "qom/object.h" #define TYPE_PCI_IPMI_KCS "pci-ipmi-kcs" +typedef struct PCIIPMIKCSDevice PCIIPMIKCSDevice; #define PCI_IPMI_KCS(obj) OBJECT_CHECK(PCIIPMIKCSDevice, (obj), \ TYPE_PCI_IPMI_KCS) -typedef struct PCIIPMIKCSDevice { +struct PCIIPMIKCSDevice { PCIDevice dev; IPMIKCS kcs; bool irq_enabled; uint32_t uuid; -} PCIIPMIKCSDevice; +}; static void pci_ipmi_raise_irq(IPMIKCS *ik) { diff --git a/hw/ipmi/smbus_ipmi.c b/hw/ipmi/smbus_ipmi.c index dbfe949890..45636be1af 100644 --- a/hw/ipmi/smbus_ipmi.c +++ b/hw/ipmi/smbus_ipmi.c @@ -27,8 +27,10 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "hw/ipmi/ipmi.h" +#include "qom/object.h" #define TYPE_SMBUS_IPMI "smbus-ipmi" +typedef struct SMBusIPMIDevice SMBusIPMIDevice; #define SMBUS_IPMI(obj) OBJECT_CHECK(SMBusIPMIDevice, (obj), TYPE_SMBUS_IPMI) #define SSIF_IPMI_REQUEST 2 @@ -44,7 +46,7 @@ #define IPMI_GET_SYS_INTF_CAP_CMD 0x57 -typedef struct SMBusIPMIDevice { +struct SMBusIPMIDevice { SMBusDevice parent; IPMIBmc *bmc; @@ -67,7 +69,7 @@ typedef struct SMBusIPMIDevice { uint8_t waiting_rsp; uint32_t uuid; -} SMBusIPMIDevice; +}; static void smbus_ipmi_handle_event(IPMIInterface *ii) { diff --git a/hw/isa/i82378.c b/hw/isa/i82378.c index 2341e13bc3..e4f62d9d43 100644 --- a/hw/isa/i82378.c +++ b/hw/isa/i82378.c @@ -24,18 +24,20 @@ #include "hw/timer/i8254.h" #include "migration/vmstate.h" #include "hw/audio/pcspk.h" +#include "qom/object.h" #define TYPE_I82378 "i82378" +typedef struct I82378State I82378State; #define I82378(obj) \ OBJECT_CHECK(I82378State, (obj), TYPE_I82378) -typedef struct I82378State { +struct I82378State { PCIDevice parent_obj; qemu_irq out[2]; qemu_irq *i8259; MemoryRegion io; -} I82378State; +}; static const VMStateDescription vmstate_i82378 = { .name = "pci-i82378", diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 705c5c5567..95e2046773 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -38,10 +38,11 @@ #include "migration/vmstate.h" #include "sysemu/reset.h" #include "sysemu/runstate.h" +#include "qom/object.h" PCIDevice *piix4_dev; -typedef struct PIIX4State { +struct PIIX4State { PCIDevice dev; qemu_irq cpu_intr; qemu_irq *isa; @@ -50,7 +51,8 @@ typedef struct PIIX4State { /* Reset Control Register */ MemoryRegion rcr_mem; uint8_t rcr; -} PIIX4State; +}; +typedef struct PIIX4State PIIX4State; #define PIIX4_PCI_DEVICE(obj) \ OBJECT_CHECK(PIIX4State, (obj), TYPE_PIIX4_PCI_DEVICE) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 2b68111629..872fb6c62e 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -27,6 +27,7 @@ #include "qemu/module.h" #include "qemu/timer.h" #include "exec/address-spaces.h" +#include "qom/object.h" /* #define DEBUG_VT82C686B */ @@ -42,11 +43,12 @@ typedef struct SuperIOConfig { uint8_t data; } SuperIOConfig; -typedef struct VT82C686BState { +struct VT82C686BState { PCIDevice dev; MemoryRegion superio; SuperIOConfig superio_conf; -} VT82C686BState; +}; +typedef struct VT82C686BState VT82C686BState; #define TYPE_VT82C686B_DEVICE "VT82C686B" #define VT82C686B_DEVICE(obj) \ @@ -159,22 +161,25 @@ static void vt82c686b_write_config(PCIDevice *d, uint32_t address, #define ACPI_DBG_IO_ADDR 0xb044 -typedef struct VT686PMState { +struct VT686PMState { PCIDevice dev; MemoryRegion io; ACPIREGS ar; APMState apm; PMSMBus smb; uint32_t smb_io_base; -} VT686PMState; +}; +typedef struct VT686PMState VT686PMState; -typedef struct VT686AC97State { +struct VT686AC97State { PCIDevice dev; -} VT686AC97State; +}; +typedef struct VT686AC97State VT686AC97State; -typedef struct VT686MC97State { +struct VT686MC97State { PCIDevice dev; -} VT686MC97State; +}; +typedef struct VT686MC97State VT686MC97State; #define TYPE_VT82C686B_PM_DEVICE "VT82C686B_PM" #define VT82C686B_PM_DEVICE(obj) \ diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index e6e9d7c03e..cc3d4edc20 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -15,11 +15,13 @@ #include "hw/irq.h" #include "hw/sysbus.h" #include "hw/m68k/mcf.h" +#include "qom/object.h" #define TYPE_MCF_INTC "mcf-intc" +typedef struct mcf_intc_state mcf_intc_state; #define MCF_INTC(obj) OBJECT_CHECK(mcf_intc_state, (obj), TYPE_MCF_INTC) -typedef struct { +struct mcf_intc_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -30,7 +32,7 @@ typedef struct { uint8_t icr[64]; M68kCPU *cpu; int active_vector; -} mcf_intc_state; +}; static void mcf_intc_update(mcf_intc_state *s) { diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index e839765cb7..989f990e5e 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -21,6 +21,7 @@ #include "hw/loader.h" #include "hw/scsi/esp.h" #include "hw/sysbus.h" +#include "qom/object.h" #include "hw/char/escc.h" /* ZILOG 8530 Serial Emulation */ #include "hw/block/fdc.h" #include "hw/qdev-properties.h" @@ -37,6 +38,7 @@ #endif #define TYPE_NEXT_MACHINE MACHINE_TYPE_NAME("next-cube") +typedef struct NeXTState NeXTState; #define NEXT_MACHINE(obj) OBJECT_CHECK(NeXTState, (obj), TYPE_NEXT_MACHINE) #define ENTRY 0x0100001e @@ -69,7 +71,7 @@ typedef struct NextRtc { uint8_t retval; } NextRtc; -typedef struct { +struct NeXTState { MachineState parent; uint32_t int_mask; @@ -87,7 +89,7 @@ typedef struct { uint32_t scr2; NextRtc rtc; -} NeXTState; +}; /* Thanks to NeXT forums for this */ /* diff --git a/hw/m68k/next-kbd.c b/hw/m68k/next-kbd.c index fc000ae694..955f28661e 100644 --- a/hw/m68k/next-kbd.c +++ b/hw/m68k/next-kbd.c @@ -36,7 +36,9 @@ #include "ui/console.h" #include "sysemu/sysemu.h" #include "migration/vmstate.h" +#include "qom/object.h" +typedef struct NextKBDState NextKBDState; #define NEXTKBD(obj) OBJECT_CHECK(NextKBDState, (obj), TYPE_NEXTKBD) /* following defintions from next68k netbsd */ @@ -63,12 +65,12 @@ typedef struct { } KBDQueue; -typedef struct NextKBDState { +struct NextKBDState { SysBusDevice sbd; MemoryRegion mr; KBDQueue queue; uint16_t shift; -} NextKBDState; +}; static void queue_code(void *opaque, int code); diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index e025070a9b..7a1af64b0a 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -24,10 +24,12 @@ #include "hw/intc/xlnx-zynqmp-ipi.h" #include "hw/intc/xlnx-pmu-iomod-intc.h" +#include "qom/object.h" /* Define the PMU device */ #define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc" +typedef struct XlnxZynqMPPMUSoCState XlnxZynqMPPMUSoCState; #define XLNX_ZYNQMP_PMU_SOC(obj) OBJECT_CHECK(XlnxZynqMPPMUSoCState, (obj), \ TYPE_XLNX_ZYNQMP_PMU_SOC) @@ -46,7 +48,7 @@ static const uint64_t ipi_irq[XLNX_ZYNQMP_PMU_NUM_IPIS] = { 19, 20, 21, 22, }; -typedef struct XlnxZynqMPPMUSoCState { +struct XlnxZynqMPPMUSoCState { /*< private >*/ DeviceState parent_obj; @@ -54,7 +56,7 @@ typedef struct XlnxZynqMPPMUSoCState { MicroBlazeCPU cpu; XlnxPMUIOIntc intc; XlnxZynqMPIPI ipi[XLNX_ZYNQMP_PMU_NUM_IPIS]; -} XlnxZynqMPPMUSoCState; +}; static void xlnx_zynqmp_pmu_soc_init(Object *obj) diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 55deb9c74a..b09407217c 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -41,11 +41,13 @@ #include "sysemu/runstate.h" #include +#include "qom/object.h" #define TYPE_MIPS_BOSTON "mips-boston" +typedef struct BostonState BostonState; #define BOSTON(obj) OBJECT_CHECK(BostonState, (obj), TYPE_MIPS_BOSTON) -typedef struct { +struct BostonState { SysBusDevice parent_obj; MachineState *mach; @@ -58,7 +60,7 @@ typedef struct { hwaddr kernel_entry; hwaddr fdt_base; -} BostonState; +}; enum boston_plat_reg { PLAT_FPGA_BUILD = 0x00, diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 1a69c18e38..553f227c3b 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -35,6 +35,7 @@ #include "hw/irq.h" #include "exec/address-spaces.h" #include "trace.h" +#include "qom/object.h" #define GT_REGS (0x1000 >> 2) @@ -230,10 +231,11 @@ #define TYPE_GT64120_PCI_HOST_BRIDGE "gt64120" +typedef struct GT64120State GT64120State; #define GT64120_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(GT64120State, (obj), TYPE_GT64120_PCI_HOST_BRIDGE) -typedef struct GT64120State { +struct GT64120State { PCIHostState parent_obj; uint32_t regs[GT_REGS]; @@ -243,7 +245,7 @@ typedef struct GT64120State { PCI_MAPPING_ENTRY(ISD); MemoryRegion pci0_mem; AddressSpace pci0_mem_as; -} GT64120State; +}; /* Adjust range to avoid touching space which isn't mappable via PCI */ /* diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 1c16bc6c0c..a6135503ab 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -45,6 +45,7 @@ #include "hw/loader.h" #include "elf.h" #include "exec/address-spaces.h" +#include "qom/object.h" #include "hw/sysbus.h" /* SysBusDevice */ #include "qemu/host-utils.h" #include "sysemu/qtest.h" @@ -88,14 +89,15 @@ typedef struct { } MaltaFPGAState; #define TYPE_MIPS_MALTA "mips-malta" +typedef struct MaltaState MaltaState; #define MIPS_MALTA(obj) OBJECT_CHECK(MaltaState, (obj), TYPE_MIPS_MALTA) -typedef struct { +struct MaltaState { SysBusDevice parent_obj; MIPSCPSState cps; qemu_irq i8259[ISA_NUM_IRQS]; -} MaltaState; +}; static struct _loaderparams { int ram_size, ram_low_size; diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c index 8eebd48f81..45c3a17919 100644 --- a/hw/misc/applesmc.c +++ b/hw/misc/applesmc.c @@ -36,6 +36,7 @@ #include "ui/console.h" #include "qemu/module.h" #include "qemu/timer.h" +#include "qom/object.h" /* #define DEBUG_SMC */ @@ -89,9 +90,9 @@ struct AppleSMCData { QLIST_ENTRY(AppleSMCData) node; }; +typedef struct AppleSMCState AppleSMCState; #define APPLE_SMC(obj) OBJECT_CHECK(AppleSMCState, (obj), TYPE_APPLE_SMC) -typedef struct AppleSMCState AppleSMCState; struct AppleSMCState { ISADevice parent_obj; diff --git a/hw/misc/arm_integrator_debug.c b/hw/misc/arm_integrator_debug.c index 71b1c3c117..b39fe10c6f 100644 --- a/hw/misc/arm_integrator_debug.c +++ b/hw/misc/arm_integrator_debug.c @@ -19,15 +19,17 @@ #include "hw/misc/arm_integrator_debug.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" +typedef struct IntegratorDebugState IntegratorDebugState; #define INTEGRATOR_DEBUG(obj) \ OBJECT_CHECK(IntegratorDebugState, (obj), TYPE_INTEGRATOR_DEBUG) -typedef struct { +struct IntegratorDebugState { SysBusDevice parent_obj; MemoryRegion iomem; -} IntegratorDebugState; +}; static uint64_t intdbg_control_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/misc/arm_l2x0.c b/hw/misc/arm_l2x0.c index d395a9f354..ff8e999beb 100644 --- a/hw/misc/arm_l2x0.c +++ b/hw/misc/arm_l2x0.c @@ -24,14 +24,16 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" /* L2C-310 r3p2 */ #define CACHE_ID 0x410000c8 #define TYPE_ARM_L2X0 "l2x0" +typedef struct L2x0State L2x0State; #define ARM_L2X0(obj) OBJECT_CHECK(L2x0State, (obj), TYPE_ARM_L2X0) -typedef struct L2x0State { +struct L2x0State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -42,7 +44,7 @@ typedef struct L2x0State { uint32_t tag_ctrl; uint32_t filter_start; uint32_t filter_end; -} L2x0State; +}; static const VMStateDescription vmstate_l2x0 = { .name = "l2x0", diff --git a/hw/misc/arm_sysctl.c b/hw/misc/arm_sysctl.c index 3f3d61ebb1..b905d2d48a 100644 --- a/hw/misc/arm_sysctl.c +++ b/hw/misc/arm_sysctl.c @@ -18,14 +18,16 @@ #include "hw/arm/primecell.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define LOCK_VALUE 0xa05f #define TYPE_ARM_SYSCTL "realview_sysctl" +typedef struct arm_sysctl_state arm_sysctl_state; #define ARM_SYSCTL(obj) \ OBJECT_CHECK(arm_sysctl_state, (obj), TYPE_ARM_SYSCTL) -typedef struct { +struct arm_sysctl_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -51,7 +53,7 @@ typedef struct { uint32_t *db_voltage; uint32_t db_num_clocks; uint32_t *db_clock_reset; -} arm_sysctl_state; +}; static const VMStateDescription vmstate_arm_sysctl = { .name = "realview_sysctl", diff --git a/hw/misc/debugexit.c b/hw/misc/debugexit.c index e0f00d2a96..1aff146f5e 100644 --- a/hw/misc/debugexit.c +++ b/hw/misc/debugexit.c @@ -11,18 +11,20 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_ISA_DEBUG_EXIT_DEVICE "isa-debug-exit" +typedef struct ISADebugExitState ISADebugExitState; #define ISA_DEBUG_EXIT_DEVICE(obj) \ OBJECT_CHECK(ISADebugExitState, (obj), TYPE_ISA_DEBUG_EXIT_DEVICE) -typedef struct ISADebugExitState { +struct ISADebugExitState { ISADevice parent_obj; uint32_t iobase; uint32_t iosize; MemoryRegion io; -} ISADebugExitState; +}; static uint64_t debug_exit_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/hw/misc/eccmemctl.c b/hw/misc/eccmemctl.c index daf75f1335..e54c6abda8 100644 --- a/hw/misc/eccmemctl.c +++ b/hw/misc/eccmemctl.c @@ -29,6 +29,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" /* There are 3 versions of this chip used in SMP sun4m systems: * MCC (version 0, implementation 0) SS-600MP @@ -126,9 +127,10 @@ #define ECC_DIAG_MASK (ECC_DIAG_SIZE - 1) #define TYPE_ECC_MEMCTL "eccmemctl" +typedef struct ECCState ECCState; #define ECC_MEMCTL(obj) OBJECT_CHECK(ECCState, (obj), TYPE_ECC_MEMCTL) -typedef struct ECCState { +struct ECCState { SysBusDevice parent_obj; MemoryRegion iomem, iomem_diag; @@ -136,7 +138,7 @@ typedef struct ECCState { uint32_t regs[ECC_NREGS]; uint8_t diag[ECC_DIAG_SIZE]; uint32_t version; -} ECCState; +}; static void ecc_mem_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) diff --git a/hw/misc/edu.c b/hw/misc/edu.c index ec617e63f3..2db9d63eeb 100644 --- a/hw/misc/edu.c +++ b/hw/misc/edu.c @@ -28,11 +28,13 @@ #include "hw/hw.h" #include "hw/pci/msi.h" #include "qemu/timer.h" +#include "qom/object.h" #include "qemu/main-loop.h" /* iothread mutex */ #include "qemu/module.h" #include "qapi/visitor.h" #define TYPE_PCI_EDU_DEVICE "edu" +typedef struct EduState EduState; #define EDU(obj) OBJECT_CHECK(EduState, obj, TYPE_PCI_EDU_DEVICE) #define FACT_IRQ 0x00000001 @@ -41,7 +43,7 @@ #define DMA_START 0x40000 #define DMA_SIZE 4096 -typedef struct { +struct EduState { PCIDevice pdev; MemoryRegion mmio; @@ -72,7 +74,7 @@ typedef struct { QEMUTimer dma_timer; char dma_buf[DMA_SIZE]; uint64_t dma_mask; -} EduState; +}; static bool edu_msi_enabled(EduState *edu) { diff --git a/hw/misc/empty_slot.c b/hw/misc/empty_slot.c index d1736d784d..50cfd0e871 100644 --- a/hw/misc/empty_slot.c +++ b/hw/misc/empty_slot.c @@ -15,17 +15,19 @@ #include "hw/misc/empty_slot.h" #include "qapi/error.h" #include "trace.h" +#include "qom/object.h" #define TYPE_EMPTY_SLOT "empty_slot" +typedef struct EmptySlot EmptySlot; #define EMPTY_SLOT(obj) OBJECT_CHECK(EmptySlot, (obj), TYPE_EMPTY_SLOT) -typedef struct EmptySlot { +struct EmptySlot { SysBusDevice parent_obj; MemoryRegion iomem; char *name; uint64_t size; -} EmptySlot; +}; static uint64_t empty_slot_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/misc/exynos4210_clk.c b/hw/misc/exynos4210_clk.c index da18bc974c..f84008d4d8 100644 --- a/hw/misc/exynos4210_clk.c +++ b/hw/misc/exynos4210_clk.c @@ -22,8 +22,10 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_EXYNOS4210_CLK "exynos4210.clk" +typedef struct Exynos4210ClkState Exynos4210ClkState; #define EXYNOS4210_CLK(obj) \ OBJECT_CHECK(Exynos4210ClkState, (obj), TYPE_EXYNOS4210_CLK) @@ -55,12 +57,12 @@ static const Exynos4210Reg exynos4210_clk_regs[] = { #define EXYNOS4210_REGS_NUM ARRAY_SIZE(exynos4210_clk_regs) -typedef struct Exynos4210ClkState { +struct Exynos4210ClkState { SysBusDevice parent_obj; MemoryRegion iomem; uint32_t reg[EXYNOS4210_REGS_NUM]; -} Exynos4210ClkState; +}; static uint64_t exynos4210_clk_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/misc/exynos4210_pmu.c b/hw/misc/exynos4210_pmu.c index 12ce99969c..8f6081e5cc 100644 --- a/hw/misc/exynos4210_pmu.c +++ b/hw/misc/exynos4210_pmu.c @@ -29,6 +29,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "sysemu/runstate.h" +#include "qom/object.h" #ifndef DEBUG_PMU #define DEBUG_PMU 0 @@ -394,15 +395,16 @@ static const Exynos4210PmuReg exynos4210_pmu_regs[] = { #define PMU_NUM_OF_REGISTERS ARRAY_SIZE(exynos4210_pmu_regs) #define TYPE_EXYNOS4210_PMU "exynos4210.pmu" +typedef struct Exynos4210PmuState Exynos4210PmuState; #define EXYNOS4210_PMU(obj) \ OBJECT_CHECK(Exynos4210PmuState, (obj), TYPE_EXYNOS4210_PMU) -typedef struct Exynos4210PmuState { +struct Exynos4210PmuState { SysBusDevice parent_obj; MemoryRegion iomem; uint32_t reg[PMU_NUM_OF_REGISTERS]; -} Exynos4210PmuState; +}; static void exynos4210_pmu_poweroff(void) { diff --git a/hw/misc/exynos4210_rng.c b/hw/misc/exynos4210_rng.c index b4938fe848..620b6a867b 100644 --- a/hw/misc/exynos4210_rng.c +++ b/hw/misc/exynos4210_rng.c @@ -24,6 +24,7 @@ #include "qemu/log.h" #include "qemu/guest-random.h" #include "qemu/module.h" +#include "qom/object.h" #define DEBUG_EXYNOS_RNG 0 @@ -35,6 +36,7 @@ } while (0) #define TYPE_EXYNOS4210_RNG "exynos4210.rng" +typedef struct Exynos4210RngState Exynos4210RngState; #define EXYNOS4210_RNG(obj) \ OBJECT_CHECK(Exynos4210RngState, (obj), TYPE_EXYNOS4210_RNG) @@ -68,7 +70,7 @@ #define EXYNOS4210_RNG_REGS_MEM_SIZE 0x200 -typedef struct Exynos4210RngState { +struct Exynos4210RngState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -79,7 +81,7 @@ typedef struct Exynos4210RngState { /* Register values */ uint32_t reg_control; uint32_t reg_status; -} Exynos4210RngState; +}; static bool exynos4210_rng_seed_ready(const Exynos4210RngState *s) { diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c index e61062a2ed..890cd9445d 100644 --- a/hw/misc/ivshmem.c +++ b/hw/misc/ivshmem.c @@ -38,6 +38,7 @@ #include "qapi/visitor.h" #include "hw/misc/ivshmem.h" +#include "qom/object.h" #define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET #define PCI_DEVICE_ID_IVSHMEM 0x1110 @@ -57,6 +58,7 @@ } while (0) #define TYPE_IVSHMEM_COMMON "ivshmem-common" +typedef struct IVShmemState IVShmemState; #define IVSHMEM_COMMON(obj) \ OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_COMMON) @@ -83,7 +85,7 @@ typedef struct MSIVector { bool unmasked; } MSIVector; -typedef struct IVShmemState { +struct IVShmemState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -115,7 +117,7 @@ typedef struct IVShmemState { /* migration stuff */ OnOffAuto master; Error *migration_blocker; -} IVShmemState; +}; /* registers for the Inter-VM shared memory device */ enum ivshmem_registers { diff --git a/hw/misc/milkymist-hpdmc.c b/hw/misc/milkymist-hpdmc.c index bb21fd7a4b..64e226e5f9 100644 --- a/hw/misc/milkymist-hpdmc.c +++ b/hw/misc/milkymist-hpdmc.c @@ -27,6 +27,7 @@ #include "trace.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { R_SYSTEM = 0, @@ -43,6 +44,7 @@ enum { }; #define TYPE_MILKYMIST_HPDMC "milkymist-hpdmc" +typedef struct MilkymistHpdmcState MilkymistHpdmcState; #define MILKYMIST_HPDMC(obj) \ OBJECT_CHECK(MilkymistHpdmcState, (obj), TYPE_MILKYMIST_HPDMC) @@ -53,7 +55,6 @@ struct MilkymistHpdmcState { uint32_t regs[R_MAX]; }; -typedef struct MilkymistHpdmcState MilkymistHpdmcState; static uint64_t hpdmc_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/misc/milkymist-pfpu.c b/hw/misc/milkymist-pfpu.c index f78de71df4..43b85b88fc 100644 --- a/hw/misc/milkymist-pfpu.c +++ b/hw/misc/milkymist-pfpu.c @@ -31,6 +31,7 @@ #include "qemu/module.h" #include "qemu/error-report.h" #include +#include "qom/object.h" /* #define TRACE_EXEC */ @@ -120,6 +121,7 @@ static const char *opcode_to_str[] = { #endif #define TYPE_MILKYMIST_PFPU "milkymist-pfpu" +typedef struct MilkymistPFPUState MilkymistPFPUState; #define MILKYMIST_PFPU(obj) \ OBJECT_CHECK(MilkymistPFPUState, (obj), TYPE_MILKYMIST_PFPU) @@ -137,7 +139,6 @@ struct MilkymistPFPUState { int output_queue_pos; uint32_t output_queue[MAX_LATENCY]; }; -typedef struct MilkymistPFPUState MilkymistPFPUState; static inline uint32_t get_dma_address(uint32_t base, uint32_t x, uint32_t y) diff --git a/hw/misc/mst_fpga.c b/hw/misc/mst_fpga.c index fc4100e1b5..5a5c7e814a 100644 --- a/hw/misc/mst_fpga.c +++ b/hw/misc/mst_fpga.c @@ -16,6 +16,7 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "qemu/module.h" +#include "qom/object.h" /* Mainstone FPGA for extern irqs */ #define FPGA_GPIO_PIN 0 @@ -40,10 +41,11 @@ #define MST_PCMCIA_CD1_IRQ 13 #define TYPE_MAINSTONE_FPGA "mainstone-fpga" +typedef struct mst_irq_state mst_irq_state; #define MAINSTONE_FPGA(obj) \ OBJECT_CHECK(mst_irq_state, (obj), TYPE_MAINSTONE_FPGA) -typedef struct mst_irq_state{ +struct mst_irq_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -63,7 +65,7 @@ typedef struct mst_irq_state{ uint32_t intsetclr; uint32_t pcmcia0; uint32_t pcmcia1; -}mst_irq_state; +}; static void mst_fpga_set_irq(void *opaque, int irq, int level) diff --git a/hw/misc/pc-testdev.c b/hw/misc/pc-testdev.c index 9d5a17f747..275740762e 100644 --- a/hw/misc/pc-testdev.c +++ b/hw/misc/pc-testdev.c @@ -39,10 +39,11 @@ #include "qemu/module.h" #include "hw/irq.h" #include "hw/isa/isa.h" +#include "qom/object.h" #define IOMEM_LEN 0x10000 -typedef struct PCTestdev { +struct PCTestdev { ISADevice parent_obj; MemoryRegion ioport; @@ -52,7 +53,8 @@ typedef struct PCTestdev { MemoryRegion iomem; uint32_t ioport_data; char iomem_buf[IOMEM_LEN]; -} PCTestdev; +}; +typedef struct PCTestdev PCTestdev; #define TYPE_TESTDEV "pc-testdev" #define TESTDEV(obj) \ diff --git a/hw/misc/pca9552.c b/hw/misc/pca9552.c index 60f73dd257..597c390639 100644 --- a/hw/misc/pca9552.c +++ b/hw/misc/pca9552.c @@ -22,15 +22,17 @@ #include "qapi/error.h" #include "qapi/visitor.h" #include "trace.h" +#include "qom/object.h" -typedef struct PCA955xClass { +struct PCA955xClass { /*< private >*/ I2CSlaveClass parent_class; /*< public >*/ uint8_t pin_count; uint8_t max_reg; -} PCA955xClass; +}; +typedef struct PCA955xClass PCA955xClass; #define PCA955X_CLASS(klass) \ OBJECT_CLASS_CHECK(PCA955xClass, (klass), TYPE_PCA955X) diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c index 1b0aba0429..9e524507f2 100644 --- a/hw/misc/pci-testdev.c +++ b/hw/misc/pci-testdev.c @@ -24,6 +24,7 @@ #include "qemu/event_notifier.h" #include "qemu/module.h" #include "sysemu/kvm.h" +#include "qom/object.h" typedef struct PCITestDevHdr { uint8_t test; @@ -78,7 +79,7 @@ enum { #define IOTEST_ACCESS_TYPE uint8_t #define IOTEST_ACCESS_WIDTH (sizeof(uint8_t)) -typedef struct PCITestDevState { +struct PCITestDevState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -90,7 +91,8 @@ typedef struct PCITestDevState { uint64_t membar_size; MemoryRegion membar; -} PCITestDevState; +}; +typedef struct PCITestDevState PCITestDevState; #define TYPE_PCI_TEST_DEV "pci-testdev" diff --git a/hw/misc/puv3_pm.c b/hw/misc/puv3_pm.c index 8cc3d44efa..811424a1a7 100644 --- a/hw/misc/puv3_pm.c +++ b/hw/misc/puv3_pm.c @@ -11,6 +11,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qom/object.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" @@ -18,9 +19,10 @@ #include "qemu/log.h" #define TYPE_PUV3_PM "puv3_pm" +typedef struct PUV3PMState PUV3PMState; #define PUV3_PM(obj) OBJECT_CHECK(PUV3PMState, (obj), TYPE_PUV3_PM) -typedef struct PUV3PMState { +struct PUV3PMState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -31,7 +33,7 @@ typedef struct PUV3PMState { uint32_t reg_PLL_DDR_CFG; uint32_t reg_PLL_VGA_CFG; uint32_t reg_DIVCFG; -} PUV3PMState; +}; static uint64_t puv3_pm_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c index 98ce4e3289..be2ab91832 100644 --- a/hw/misc/pvpanic.c +++ b/hw/misc/pvpanic.c @@ -20,6 +20,7 @@ #include "hw/nvram/fw_cfg.h" #include "hw/qdev-properties.h" #include "hw/misc/pvpanic.h" +#include "qom/object.h" /* The bit of supported pv event, TODO: include uapi header and remove this */ #define PVPANIC_F_PANICKED 0 @@ -29,6 +30,7 @@ #define PVPANIC_PANICKED (1 << PVPANIC_F_PANICKED) #define PVPANIC_CRASHLOADED (1 << PVPANIC_F_CRASHLOADED) +typedef struct PVPanicState PVPanicState; #define ISA_PVPANIC_DEVICE(obj) \ OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC) @@ -54,12 +56,12 @@ static void handle_event(int event) #include "hw/isa/isa.h" -typedef struct PVPanicState { +struct PVPanicState { ISADevice parent_obj; MemoryRegion io; uint16_t ioport; -} PVPanicState; +}; /* return supported events on read */ static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/misc/sga.c b/hw/misc/sga.c index c1a5625d6a..a2167a9a97 100644 --- a/hw/misc/sga.c +++ b/hw/misc/sga.c @@ -29,15 +29,17 @@ #include "hw/isa/isa.h" #include "hw/loader.h" #include "qemu/module.h" +#include "qom/object.h" #define SGABIOS_FILENAME "sgabios.bin" #define TYPE_SGA "sga" +typedef struct ISASGAState ISASGAState; #define SGA(obj) OBJECT_CHECK(ISASGAState, (obj), TYPE_SGA) -typedef struct ISASGAState { +struct ISASGAState { ISADevice parent_obj; -} ISASGAState; +}; static void sga_realizefn(DeviceState *dev, Error **errp) { diff --git a/hw/misc/slavio_misc.c b/hw/misc/slavio_misc.c index 41be8d7598..ee735137de 100644 --- a/hw/misc/slavio_misc.c +++ b/hw/misc/slavio_misc.c @@ -29,6 +29,7 @@ #include "qemu/module.h" #include "sysemu/runstate.h" #include "trace.h" +#include "qom/object.h" /* * This is the auxio port, chip control and system control part of @@ -39,9 +40,10 @@ */ #define TYPE_SLAVIO_MISC "slavio_misc" +typedef struct MiscState MiscState; #define SLAVIO_MISC(obj) OBJECT_CHECK(MiscState, (obj), TYPE_SLAVIO_MISC) -typedef struct MiscState { +struct MiscState { SysBusDevice parent_obj; MemoryRegion cfg_iomem; @@ -59,17 +61,18 @@ typedef struct MiscState { uint8_t diag, mctrl; uint8_t sysctrl; uint16_t leds; -} MiscState; +}; #define TYPE_APC "apc" +typedef struct APCState APCState; #define APC(obj) OBJECT_CHECK(APCState, (obj), TYPE_APC) -typedef struct APCState { +struct APCState { SysBusDevice parent_obj; MemoryRegion iomem; qemu_irq cpu_halt; -} APCState; +}; #define MISC_SIZE 1 #define LED_SIZE 2 diff --git a/hw/misc/tmp421.c b/hw/misc/tmp421.c index 7ae88322b7..19026b3662 100644 --- a/hw/misc/tmp421.c +++ b/hw/misc/tmp421.c @@ -30,6 +30,7 @@ #include "qapi/error.h" #include "qapi/visitor.h" #include "qemu/module.h" +#include "qom/object.h" /* Manufacturer / Device ID's */ #define TMP421_MANUFACTURER_ID 0x55 @@ -48,7 +49,7 @@ static const DeviceInfo devices[] = { { TMP423_DEVICE_ID, "tmp423" }, }; -typedef struct TMP421State { +struct TMP421State { /*< private >*/ I2CSlave i2c; /*< public >*/ @@ -63,12 +64,14 @@ typedef struct TMP421State { uint8_t buf[2]; uint8_t pointer; -} TMP421State; +}; +typedef struct TMP421State TMP421State; -typedef struct TMP421Class { +struct TMP421Class { I2CSlaveClass parent_class; DeviceInfo *dev; -} TMP421Class; +}; +typedef struct TMP421Class TMP421Class; #define TYPE_TMP421 "tmp421-generic" #define TMP421(obj) OBJECT_CHECK(TMP421State, (obj), TYPE_TMP421) diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c index 51d14a29a1..ed7edbafcc 100644 --- a/hw/misc/zynq_slcr.c +++ b/hw/misc/zynq_slcr.c @@ -23,6 +23,7 @@ #include "qemu/module.h" #include "hw/registerfields.h" #include "hw/qdev-clock.h" +#include "qom/object.h" #ifndef ZYNQ_SLCR_ERR_DEBUG #define ZYNQ_SLCR_ERR_DEBUG 0 @@ -182,9 +183,10 @@ REG32(DDRIOB, 0xb40) #define ZYNQ_SLCR_NUM_REGS (ZYNQ_SLCR_MMIO_SIZE / 4) #define TYPE_ZYNQ_SLCR "xilinx,zynq_slcr" +typedef struct ZynqSLCRState ZynqSLCRState; #define ZYNQ_SLCR(obj) OBJECT_CHECK(ZynqSLCRState, (obj), TYPE_ZYNQ_SLCR) -typedef struct ZynqSLCRState { +struct ZynqSLCRState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -194,7 +196,7 @@ typedef struct ZynqSLCRState { Clock *ps_clk; Clock *uart0_ref_clk; Clock *uart1_ref_clk; -} ZynqSLCRState; +}; /* * return the output frequency of ARM/DDR/IO pll diff --git a/hw/net/can/can_kvaser_pci.c b/hw/net/can/can_kvaser_pci.c index ae35e51434..52fa81d76d 100644 --- a/hw/net/can/can_kvaser_pci.c +++ b/hw/net/can/can_kvaser_pci.c @@ -43,9 +43,11 @@ #include "net/can_emu.h" #include "can_sja1000.h" +#include "qom/object.h" #define TYPE_CAN_PCI_DEV "kvaser_pci" +typedef struct KvaserPCIState KvaserPCIState; #define KVASER_PCI_DEV(obj) \ OBJECT_CHECK(KvaserPCIState, (obj), TYPE_CAN_PCI_DEV) @@ -78,7 +80,7 @@ #define KVASER_PCI_XILINX_VERSION_NUMBER 13 -typedef struct KvaserPCIState { +struct KvaserPCIState { /*< private >*/ PCIDevice dev; /*< public >*/ @@ -93,7 +95,7 @@ typedef struct KvaserPCIState { uint32_t s5920_irqstate; CanBusState *canbus; -} KvaserPCIState; +}; static void kvaser_pci_irq_handler(void *opaque, int irq_num, int level) { diff --git a/hw/net/can/can_mioe3680_pci.c b/hw/net/can/can_mioe3680_pci.c index 271f44d5af..28cbfb79ec 100644 --- a/hw/net/can/can_mioe3680_pci.c +++ b/hw/net/can/can_mioe3680_pci.c @@ -39,9 +39,11 @@ #include "net/can_emu.h" #include "can_sja1000.h" +#include "qom/object.h" #define TYPE_CAN_PCI_DEV "mioe3680_pci" +typedef struct Mioe3680PCIState Mioe3680PCIState; #define MIOe3680_PCI_DEV(obj) \ OBJECT_CHECK(Mioe3680PCIState, (obj), TYPE_CAN_PCI_DEV) @@ -59,7 +61,7 @@ #define MIOe3680_PCI_BYTES_PER_SJA 0x80 -typedef struct Mioe3680PCIState { +struct Mioe3680PCIState { /*< private >*/ PCIDevice dev; /*< public >*/ @@ -70,7 +72,7 @@ typedef struct Mioe3680PCIState { char *model; /* The model that support, only SJA1000 now. */ CanBusState *canbus[MIOe3680_PCI_SJA_COUNT]; -} Mioe3680PCIState; +}; static void mioe3680_pci_reset(DeviceState *dev) { diff --git a/hw/net/can/can_pcm3680_pci.c b/hw/net/can/can_pcm3680_pci.c index e3173a6f1c..aeaebd3562 100644 --- a/hw/net/can/can_pcm3680_pci.c +++ b/hw/net/can/can_pcm3680_pci.c @@ -39,9 +39,11 @@ #include "net/can_emu.h" #include "can_sja1000.h" +#include "qom/object.h" #define TYPE_CAN_PCI_DEV "pcm3680_pci" +typedef struct Pcm3680iPCIState Pcm3680iPCIState; #define PCM3680i_PCI_DEV(obj) \ OBJECT_CHECK(Pcm3680iPCIState, (obj), TYPE_CAN_PCI_DEV) @@ -59,7 +61,7 @@ #define PCM3680i_PCI_BYTES_PER_SJA 0x20 -typedef struct Pcm3680iPCIState { +struct Pcm3680iPCIState { /*< private >*/ PCIDevice dev; /*< public >*/ @@ -70,7 +72,7 @@ typedef struct Pcm3680iPCIState { char *model; /* The model that support, only SJA1000 now. */ CanBusState *canbus[PCM3680i_PCI_SJA_COUNT]; -} Pcm3680iPCIState; +}; static void pcm3680i_pci_reset(DeviceState *dev) { diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index 86bb2b6529..e20780d0ae 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -27,6 +27,7 @@ #include "qemu/module.h" #include "qemu/timer.h" #include +#include "qom/object.h" //#define DEBUG_SONIC @@ -150,9 +151,10 @@ do { printf("sonic ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0) #define SONIC_DESC_ADDR 0xFFFE #define TYPE_DP8393X "dp8393x" +typedef struct dp8393xState dp8393xState; #define DP8393X(obj) OBJECT_CHECK(dp8393xState, (obj), TYPE_DP8393X) -typedef struct dp8393xState { +struct dp8393xState { SysBusDevice parent_obj; /* Hardware */ @@ -182,7 +184,7 @@ typedef struct dp8393xState { /* Memory access */ MemoryRegion *dma_mr; AddressSpace as; -} dp8393xState; +}; /* Accessor functions for values which are formed by * concatenating two 16 bit device registers. By putting these diff --git a/hw/net/e1000.c b/hw/net/e1000.c index ce0540face..2ec24acad3 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -39,6 +39,7 @@ #include "e1000x_common.h" #include "trace.h" +#include "qom/object.h" static const uint8_t bcast[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; @@ -76,7 +77,7 @@ static int debugflags = DBGBIT(TXERR) | DBGBIT(GENERAL); * Others never tested */ -typedef struct E1000State_st { +struct E1000State_st { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -137,14 +138,16 @@ typedef struct E1000State_st { bool received_tx_tso; bool use_tso_for_migration; e1000x_txd_props mig_props; -} E1000State; +}; +typedef struct E1000State_st E1000State; #define chkflag(x) (s->compat_flags & E1000_FLAG_##x) -typedef struct E1000BaseClass { +struct E1000BaseClass { PCIDeviceClass parent_class; uint16_t phy_id2; -} E1000BaseClass; +}; +typedef struct E1000BaseClass E1000BaseClass; #define TYPE_E1000_BASE "e1000-base" diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c index b955f76869..2bbefc89de 100644 --- a/hw/net/e1000e.c +++ b/hw/net/e1000e.c @@ -53,11 +53,13 @@ #include "trace.h" #include "qapi/error.h" +#include "qom/object.h" #define TYPE_E1000E "e1000e" +typedef struct E1000EState E1000EState; #define E1000E(obj) OBJECT_CHECK(E1000EState, (obj), TYPE_E1000E) -typedef struct E1000EState { +struct E1000EState { PCIDevice parent_obj; NICState *nic; NICConf conf; @@ -79,7 +81,7 @@ typedef struct E1000EState { E1000ECore core; -} E1000EState; +}; #define E1000E_MMIO_IDX 0 #define E1000E_FLASH_IDX 1 diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c index d7712e2924..ca5e5dd805 100644 --- a/hw/net/etraxfs_eth.c +++ b/hw/net/etraxfs_eth.c @@ -30,6 +30,7 @@ #include "qemu/error-report.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #define D(x) @@ -323,11 +324,11 @@ static void mdio_cycle(struct qemu_mdio *bus) #define FS_ETH_MAX_REGS 0x17 #define TYPE_ETRAX_FS_ETH "etraxfs-eth" +typedef struct ETRAXFSEthState ETRAXFSEthState; #define ETRAX_FS_ETH(obj) \ OBJECT_CHECK(ETRAXFSEthState, (obj), TYPE_ETRAX_FS_ETH) -typedef struct ETRAXFSEthState -{ +struct ETRAXFSEthState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -348,7 +349,7 @@ typedef struct ETRAXFSEthState /* PHY. */ struct qemu_phy phy; -} ETRAXFSEthState; +}; static void eth_validate_duplex(ETRAXFSEthState *eth) { diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index 32cee7b116..4eb9f68200 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -25,6 +25,7 @@ #include "qemu/module.h" /* For crc32 */ #include +#include "qom/object.h" //#define DEBUG_LAN9118 @@ -180,9 +181,10 @@ static const VMStateDescription vmstate_lan9118_packet = { } }; +typedef struct lan9118_state lan9118_state; #define LAN9118(obj) OBJECT_CHECK(lan9118_state, (obj), TYPE_LAN9118) -typedef struct { +struct lan9118_state { SysBusDevice parent_obj; NICState *nic; @@ -258,7 +260,7 @@ typedef struct { uint32_t read_long; uint32_t mode_16bit; -} lan9118_state; +}; static const VMStateDescription vmstate_lan9118 = { .name = "lan9118", diff --git a/hw/net/milkymist-minimac2.c b/hw/net/milkymist-minimac2.c index c1531a8637..e042970ba6 100644 --- a/hw/net/milkymist-minimac2.c +++ b/hw/net/milkymist-minimac2.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" +#include "qom/object.h" #include "cpu.h" /* FIXME: why does this use TARGET_PAGE_ALIGN? */ #include "hw/irq.h" #include "hw/qdev-properties.h" @@ -98,6 +99,7 @@ struct MilkymistMinimac2MdioState { typedef struct MilkymistMinimac2MdioState MilkymistMinimac2MdioState; #define TYPE_MILKYMIST_MINIMAC2 "milkymist-minimac2" +typedef struct MilkymistMinimac2State MilkymistMinimac2State; #define MILKYMIST_MINIMAC2(obj) \ OBJECT_CHECK(MilkymistMinimac2State, (obj), TYPE_MILKYMIST_MINIMAC2) @@ -123,7 +125,6 @@ struct MilkymistMinimac2State { uint8_t *rx1_buf; uint8_t *tx_buf; }; -typedef struct MilkymistMinimac2State MilkymistMinimac2State; static const uint8_t preamble_sfd[] = { 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0xd5 diff --git a/hw/net/mipsnet.c b/hw/net/mipsnet.c index 137a964795..f58f3f83bd 100644 --- a/hw/net/mipsnet.c +++ b/hw/net/mipsnet.c @@ -6,6 +6,7 @@ #include "trace.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qom/object.h" /* MIPSnet register offsets */ @@ -24,9 +25,10 @@ #define MAX_ETH_FRAME_SIZE 1514 #define TYPE_MIPS_NET "mipsnet" +typedef struct MIPSnetState MIPSnetState; #define MIPS_NET(obj) OBJECT_CHECK(MIPSnetState, (obj), TYPE_MIPS_NET) -typedef struct MIPSnetState { +struct MIPSnetState { SysBusDevice parent_obj; uint32_t busy; @@ -41,7 +43,7 @@ typedef struct MIPSnetState { qemu_irq irq; NICState *nic; NICConf conf; -} MIPSnetState; +}; static void mipsnet_reset(MIPSnetState *s) { diff --git a/hw/net/ne2000-isa.c b/hw/net/ne2000-isa.c index 8d1fa0fc32..aa20a0d702 100644 --- a/hw/net/ne2000-isa.c +++ b/hw/net/ne2000-isa.c @@ -31,16 +31,18 @@ #include "qapi/error.h" #include "qapi/visitor.h" #include "qemu/module.h" +#include "qom/object.h" +typedef struct ISANE2000State ISANE2000State; #define ISA_NE2000(obj) OBJECT_CHECK(ISANE2000State, (obj), TYPE_ISA_NE2000) -typedef struct ISANE2000State { +struct ISANE2000State { ISADevice parent_obj; uint32_t iobase; uint32_t isairq; NE2000State ne2000; -} ISANE2000State; +}; static NetClientInfo net_ne2000_isa_info = { .type = NET_CLIENT_DRIVER_NIC, diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c index 8ef1197157..f92008c3d1 100644 --- a/hw/net/opencores_eth.c +++ b/hw/net/opencores_eth.c @@ -40,6 +40,7 @@ #include "qemu/module.h" #include "net/eth.h" #include "trace.h" +#include "qom/object.h" /* RECSMALL is not used because it breaks tap networking in linux: * incoming ARP responses are too short @@ -271,9 +272,10 @@ typedef struct desc { #define DEFAULT_PHY 1 #define TYPE_OPEN_ETH "open_eth" +typedef struct OpenEthState OpenEthState; #define OPEN_ETH(obj) OBJECT_CHECK(OpenEthState, (obj), TYPE_OPEN_ETH) -typedef struct OpenEthState { +struct OpenEthState { SysBusDevice parent_obj; NICState *nic; @@ -287,7 +289,7 @@ typedef struct OpenEthState { unsigned tx_desc; unsigned rx_desc; desc desc[128]; -} OpenEthState; +}; static desc *rx_desc(OpenEthState *s) { diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index aba8f19048..bc553e3c4a 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -40,6 +40,7 @@ #include "trace.h" #include "pcnet.h" +#include "qom/object.h" //#define PCNET_DEBUG //#define PCNET_DEBUG_IO @@ -51,17 +52,18 @@ #define TYPE_PCI_PCNET "pcnet" +typedef struct PCIPCNetState PCIPCNetState; #define PCI_PCNET(obj) \ OBJECT_CHECK(PCIPCNetState, (obj), TYPE_PCI_PCNET) -typedef struct { +struct PCIPCNetState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ PCNetState state; MemoryRegion io_bar; -} PCIPCNetState; +}; static void pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) { diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c index c6e9207f74..78d652a331 100644 --- a/hw/net/rtl8139.c +++ b/hw/net/rtl8139.c @@ -62,6 +62,7 @@ #include "net/net.h" #include "net/eth.h" #include "sysemu/sysemu.h" +#include "qom/object.h" /* debug RTL8139 card */ //#define DEBUG_RTL8139 1 @@ -93,6 +94,7 @@ static inline GCC_FMT_ATTR(1, 2) int DPRINTF(const char *fmt, ...) #define TYPE_RTL8139 "rtl8139" +typedef struct RTL8139State RTL8139State; #define RTL8139(obj) \ OBJECT_CHECK(RTL8139State, (obj), TYPE_RTL8139) @@ -431,7 +433,7 @@ typedef struct RTL8139TallyCounters /* Clears all tally counters */ static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters); -typedef struct RTL8139State { +struct RTL8139State { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -513,7 +515,7 @@ typedef struct RTL8139State { /* Support migration to/from old versions */ int rtl8139_mmio_io_addr_dummy; -} RTL8139State; +}; /* Writes tally counters to memory via DMA */ static void RTL8139TallyCounters_dma_write(RTL8139State *s, dma_addr_t tc_addr); diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c index bf7e3e6830..cfbf7dc867 100644 --- a/hw/net/smc91c111.c +++ b/hw/net/smc91c111.c @@ -19,14 +19,16 @@ #include "qemu/module.h" /* For crc32 */ #include +#include "qom/object.h" /* Number of 2k memory pages available. */ #define NUM_PACKETS 4 #define TYPE_SMC91C111 "smc91c111" +typedef struct smc91c111_state smc91c111_state; #define SMC91C111(obj) OBJECT_CHECK(smc91c111_state, (obj), TYPE_SMC91C111) -typedef struct { +struct smc91c111_state { SysBusDevice parent_obj; NICState *nic; @@ -55,7 +57,7 @@ typedef struct { uint8_t int_level; uint8_t int_mask; MemoryRegion mmio; -} smc91c111_state; +}; static const VMStateDescription vmstate_smc91c111 = { .name = "smc91c111", diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c index a6139568bb..3dc35bfb7e 100644 --- a/hw/net/spapr_llan.c +++ b/hw/net/spapr_llan.c @@ -38,6 +38,7 @@ #include "trace.h" #include +#include "qom/object.h" #define ETH_ALEN 6 #define MAX_PACKET_SIZE 65536 @@ -84,6 +85,7 @@ typedef uint64_t vlan_bd_t; #define VLAN_MAX_BUFS (VLAN_RX_BDS_LEN / 8) #define TYPE_VIO_SPAPR_VLAN_DEVICE "spapr-vlan" +typedef struct SpaprVioVlan SpaprVioVlan; #define VIO_SPAPR_VLAN_DEVICE(obj) \ OBJECT_CHECK(SpaprVioVlan, (obj), TYPE_VIO_SPAPR_VLAN_DEVICE) @@ -96,7 +98,7 @@ typedef struct { vlan_bd_t bds[RX_POOL_MAX_BDS]; } RxBufPool; -typedef struct SpaprVioVlan { +struct SpaprVioVlan { SpaprVioDevice sdev; NICConf nicconf; NICState *nic; @@ -108,7 +110,7 @@ typedef struct SpaprVioVlan { QEMUTimer *rxp_timer; uint32_t compat_flags; /* Compatibility flags for migration */ RxBufPool *rx_pool[RX_MAX_POOLS]; /* Receive buffer descriptor pools */ -} SpaprVioVlan; +}; static bool spapr_vlan_can_receive(NetClientState *nc) { diff --git a/hw/net/stellaris_enet.c b/hw/net/stellaris_enet.c index 87399c89b6..6708b99bbb 100644 --- a/hw/net/stellaris_enet.c +++ b/hw/net/stellaris_enet.c @@ -16,6 +16,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include +#include "qom/object.h" //#define DEBUG_STELLARIS_ENET 1 @@ -50,6 +51,7 @@ do { fprintf(stderr, "stellaris_enet: error: " fmt , ## __VA_ARGS__);} while (0) #define SE_TCTL_DUPLEX 0x08 #define TYPE_STELLARIS_ENET "stellaris_enet" +typedef struct stellaris_enet_state stellaris_enet_state; #define STELLARIS_ENET(obj) \ OBJECT_CHECK(stellaris_enet_state, (obj), TYPE_STELLARIS_ENET) @@ -58,7 +60,7 @@ typedef struct { uint32_t len; } StellarisEnetRxFrame; -typedef struct { +struct stellaris_enet_state { SysBusDevice parent_obj; uint32_t ris; @@ -82,7 +84,7 @@ typedef struct { NICConf conf; qemu_irq irq; MemoryRegion mmio; -} stellaris_enet_state; +}; static const VMStateDescription vmstate_rx_frame = { .name = "stellaris_enet/rx_frame", diff --git a/hw/net/sungem.c b/hw/net/sungem.c index 4c9e2bbda5..929ce13b9e 100644 --- a/hw/net/sungem.c +++ b/hw/net/sungem.c @@ -19,9 +19,11 @@ #include "hw/net/mii.h" #include "sysemu/sysemu.h" #include "trace.h" +#include "qom/object.h" #define TYPE_SUNGEM "sungem" +typedef struct SunGEMState SunGEMState; #define SUNGEM(obj) OBJECT_CHECK(SunGEMState, (obj), TYPE_SUNGEM) #define MAX_PACKET_SIZE 9016 @@ -192,7 +194,7 @@ struct gem_rxd { #define RXDCTRL_ALTMAC 0x2000000000000000ULL /* Matched ALT MAC */ -typedef struct { +struct SunGEMState { PCIDevice pdev; MemoryRegion sungem; @@ -221,7 +223,7 @@ typedef struct { uint8_t tx_data[MAX_PACKET_SIZE]; uint32_t tx_size; uint64_t tx_first_ctl; -} SunGEMState; +}; static void sungem_eval_irq(SunGEMState *s) diff --git a/hw/net/sunhme.c b/hw/net/sunhme.c index 6c38d3d5c6..832cdfd0c2 100644 --- a/hw/net/sunhme.c +++ b/hw/net/sunhme.c @@ -33,6 +33,7 @@ #include "net/eth.h" #include "sysemu/sysemu.h" #include "trace.h" +#include "qom/object.h" #define HME_REG_SIZE 0x8000 @@ -129,6 +130,7 @@ #define MII_COMMAND_WRITE 0x1 #define TYPE_SUNHME "sunhme" +typedef struct SunHMEState SunHMEState; #define SUNHME(obj) OBJECT_CHECK(SunHMEState, (obj), TYPE_SUNHME) /* Maximum size of buffer */ @@ -153,7 +155,7 @@ #define HME_MII_REGS_SIZE 0x20 -typedef struct SunHMEState { +struct SunHMEState { /*< private >*/ PCIDevice parent_obj; @@ -174,7 +176,7 @@ typedef struct SunHMEState { uint32_t mifregs[HME_MIF_REG_SIZE >> 2]; uint16_t miiregs[HME_MII_REGS_SIZE]; -} SunHMEState; +}; static Property sunhme_properties[] = { DEFINE_NIC_PROPERTIES(SunHMEState, conf), diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c index b484a2faf2..c599639a28 100644 --- a/hw/net/vmxnet3.c +++ b/hw/net/vmxnet3.c @@ -35,6 +35,7 @@ #include "vmware_utils.h" #include "net_tx_pkt.h" #include "net_rx_pkt.h" +#include "qom/object.h" #define PCI_DEVICE_ID_VMWARE_VMXNET3_REVISION 0x1 #define VMXNET3_MSIX_BAR_SIZE 0x2000 @@ -128,10 +129,11 @@ #define VMXNET_FLAG_IS_SET(field, flag) (((field) & (flag)) == (flag)) -typedef struct VMXNET3Class { +struct VMXNET3Class { PCIDeviceClass parent_class; DeviceRealize parent_dc_realize; -} VMXNET3Class; +}; +typedef struct VMXNET3Class VMXNET3Class; #define VMXNET3_DEVICE_CLASS(klass) \ OBJECT_CLASS_CHECK(VMXNET3Class, (klass), TYPE_VMXNET3) diff --git a/hw/net/xgmac.c b/hw/net/xgmac.c index 00f71dc951..9ccb95a4d9 100644 --- a/hw/net/xgmac.c +++ b/hw/net/xgmac.c @@ -32,6 +32,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "net/net.h" +#include "qom/object.h" #ifdef DEBUG_XGMAC #define DEBUGF_BRK(message, args...) do { \ @@ -139,9 +140,10 @@ typedef struct RxTxStats { } RxTxStats; #define TYPE_XGMAC "xgmac" +typedef struct XgmacState XgmacState; #define XGMAC(obj) OBJECT_CHECK(XgmacState, (obj), TYPE_XGMAC) -typedef struct XgmacState { +struct XgmacState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -153,7 +155,7 @@ typedef struct XgmacState { struct RxTxStats stats; uint32_t regs[R_MAX]; -} XgmacState; +}; static const VMStateDescription vmstate_rxtx_stats = { .name = "xgmac_stats", diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c index 9711a1dd8e..40980e9a29 100644 --- a/hw/net/xilinx_axienet.c +++ b/hw/net/xilinx_axienet.c @@ -35,6 +35,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/stream.h" +#include "qom/object.h" #define DPHY(x) @@ -42,9 +43,11 @@ #define TYPE_XILINX_AXI_ENET_DATA_STREAM "xilinx-axienet-data-stream" #define TYPE_XILINX_AXI_ENET_CONTROL_STREAM "xilinx-axienet-control-stream" +typedef struct XilinxAXIEnet XilinxAXIEnet; #define XILINX_AXI_ENET(obj) \ OBJECT_CHECK(XilinxAXIEnet, (obj), TYPE_XILINX_AXI_ENET) +typedef struct XilinxAXIEnetStreamSlave XilinxAXIEnetStreamSlave; #define XILINX_AXI_ENET_DATA_STREAM(obj) \ OBJECT_CHECK(XilinxAXIEnetStreamSlave, (obj),\ TYPE_XILINX_AXI_ENET_DATA_STREAM) @@ -333,8 +336,6 @@ struct TEMAC { void *parent; }; -typedef struct XilinxAXIEnetStreamSlave XilinxAXIEnetStreamSlave; -typedef struct XilinxAXIEnet XilinxAXIEnet; struct XilinxAXIEnetStreamSlave { Object parent; diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 735236cb0d..bc43adf985 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "qemu/module.h" +#include "qom/object.h" #include "cpu.h" /* FIXME should not use tswap* */ #include "hw/sysbus.h" #include "hw/irq.h" diff --git a/hw/nvram/ds1225y.c b/hw/nvram/ds1225y.c index 6daef757aa..9c35f5ea27 100644 --- a/hw/nvram/ds1225y.c +++ b/hw/nvram/ds1225y.c @@ -29,6 +29,7 @@ #include "trace.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct { MemoryRegion iomem; @@ -109,13 +110,14 @@ static const VMStateDescription vmstate_nvram = { }; #define TYPE_DS1225Y "ds1225y" +typedef struct SysBusNvRamState SysBusNvRamState; #define DS1225Y(obj) OBJECT_CHECK(SysBusNvRamState, (obj), TYPE_DS1225Y) -typedef struct { +struct SysBusNvRamState { SysBusDevice parent_obj; NvRamState nvram; -} SysBusNvRamState; +}; static void nvram_sysbus_realize(DeviceState *dev, Error **errp) { diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index 95582d67a7..7a76ab27aa 100644 --- a/hw/nvram/eeprom_at24c.c +++ b/hw/nvram/eeprom_at24c.c @@ -14,6 +14,7 @@ #include "hw/i2c/i2c.h" #include "hw/qdev-properties.h" #include "sysemu/block-backend.h" +#include "qom/object.h" /* #define DEBUG_AT24C */ @@ -27,9 +28,10 @@ ## __VA_ARGS__) #define TYPE_AT24C_EE "at24c-eeprom" +typedef struct EEPROMState EEPROMState; #define AT24C_EE(obj) OBJECT_CHECK(EEPROMState, (obj), TYPE_AT24C_EE) -typedef struct EEPROMState { +struct EEPROMState { I2CSlave parent_obj; /* address counter */ @@ -45,7 +47,7 @@ typedef struct EEPROMState { uint8_t *mem; BlockBackend *blk; -} EEPROMState; +}; static int at24c_eeprom_event(I2CSlave *s, enum i2c_event event) diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c index f2b095480b..df1a804b8f 100644 --- a/hw/nvram/spapr_nvram.c +++ b/hw/nvram/spapr_nvram.c @@ -39,14 +39,16 @@ #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" #include "hw/qdev-properties.h" +#include "qom/object.h" -typedef struct SpaprNvram { +struct SpaprNvram { SpaprVioDevice sdev; uint32_t size; uint8_t *buf; BlockBackend *blk; VMChangeStateEntry *vmstate; -} SpaprNvram; +}; +typedef struct SpaprNvram SpaprNvram; #define TYPE_VIO_SPAPR_NVRAM "spapr-nvram" #define VIO_SPAPR_NVRAM(obj) \ diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c index b36e7f90a3..91e24f68c8 100644 --- a/hw/pci-bridge/dec.c +++ b/hw/pci-bridge/dec.c @@ -32,12 +32,14 @@ #include "hw/pci/pci_host.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_bus.h" +#include "qom/object.h" +typedef struct DECState DECState; #define DEC_21154(obj) OBJECT_CHECK(DECState, (obj), TYPE_DEC_21154) -typedef struct DECState { +struct DECState { PCIHostState parent_obj; -} DECState; +}; static int dec_map_irq(PCIDevice *pci_dev, int irq_num) { diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c index bb26e272c1..b62e20a648 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -17,8 +17,10 @@ #include "hw/pci/pcie_port.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" #define TYPE_GEN_PCIE_ROOT_PORT "pcie-root-port" +typedef struct GenPCIERootPort GenPCIERootPort; #define GEN_PCIE_ROOT_PORT(obj) \ OBJECT_CHECK(GenPCIERootPort, (obj), TYPE_GEN_PCIE_ROOT_PORT) @@ -28,7 +30,7 @@ #define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR 1 -typedef struct GenPCIERootPort { +struct GenPCIERootPort { /*< private >*/ PCIESlot parent_obj; /*< public >*/ @@ -37,7 +39,7 @@ typedef struct GenPCIERootPort { /* additional resources to reserve */ PCIResReserve res_reserve; -} GenPCIERootPort; +}; static uint8_t gen_rp_aer_vector(const PCIDevice *d) { diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index d080a0ca18..7f57f90969 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -31,9 +31,11 @@ #include "exec/memory.h" #include "hw/pci/pci_bus.h" #include "hw/hotplug.h" +#include "qom/object.h" #define TYPE_PCI_BRIDGE_DEV "pci-bridge" #define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat" +typedef struct PCIBridgeDev PCIBridgeDev; #define PCI_BRIDGE_DEV(obj) \ OBJECT_CHECK(PCIBridgeDev, (obj), TYPE_PCI_BRIDGE_DEV) @@ -52,7 +54,6 @@ struct PCIBridgeDev { /* additional resources to reserve */ PCIResReserve res_reserve; }; -typedef struct PCIBridgeDev PCIBridgeDev; static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp) { diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index 4c19a5051b..7d9f44e314 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -22,35 +22,38 @@ #include "qemu/module.h" #include "sysemu/numa.h" #include "hw/boards.h" +#include "qom/object.h" #define TYPE_PXB_BUS "pxb-bus" +typedef struct PXBBus PXBBus; #define PXB_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_BUS) #define TYPE_PXB_PCIE_BUS "pxb-pcie-bus" #define PXB_PCIE_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_PCIE_BUS) -typedef struct PXBBus { +struct PXBBus { /*< private >*/ PCIBus parent_obj; /*< public >*/ char bus_path[8]; -} PXBBus; +}; #define TYPE_PXB_DEVICE "pxb" +typedef struct PXBDev PXBDev; #define PXB_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_DEVICE) #define TYPE_PXB_PCIE_DEVICE "pxb-pcie" #define PXB_PCIE_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_PCIE_DEVICE) -typedef struct PXBDev { +struct PXBDev { /*< private >*/ PCIDevice parent_obj; /*< public >*/ uint8_t bus_nr; uint16_t numa_node; -} PXBDev; +}; static PXBDev *convert_to_pxb(PCIDevice *dev) { diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c index 00b30b2a4b..0f4c8a0cae 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -17,15 +17,17 @@ #include "hw/pci/shpc.h" #include "hw/pci/slotid_cap.h" #include "hw/qdev-properties.h" +#include "qom/object.h" -typedef struct PCIEPCIBridge { +struct PCIEPCIBridge { /*< private >*/ PCIBridge parent_obj; OnOffAuto msi; MemoryRegion shpc_bar; /*< public >*/ -} PCIEPCIBridge; +}; +typedef struct PCIEPCIBridge PCIEPCIBridge; #define TYPE_PCIE_PCI_BRIDGE_DEV "pcie-pci-bridge" #define PCIE_PCI_BRIDGE_DEV(obj) \ diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index ea7e30155c..f4d5a052aa 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -52,6 +52,7 @@ #include "exec/address-spaces.h" #include "hw/misc/unimp.h" #include "hw/registerfields.h" +#include "qom/object.h" /* #define DEBUG_BONITO */ @@ -200,7 +201,7 @@ FIELD(BONGENCFG, PCIQUEUE, 12, 1) typedef struct BonitoState BonitoState; -typedef struct PCIBonitoState { +struct PCIBonitoState { PCIDevice dev; BonitoState *pcihost; @@ -228,7 +229,8 @@ typedef struct PCIBonitoState { MemoryRegion bonito_pciio; MemoryRegion bonito_localio; -} PCIBonitoState; +}; +typedef struct PCIBonitoState PCIBonitoState; struct BonitoState { PCIHostState parent_obj; diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index 066dc773e2..0f38e31d1e 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -33,11 +33,13 @@ #include "qapi/error.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" +typedef struct GrackleState GrackleState; #define GRACKLE_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(GrackleState, (obj), TYPE_GRACKLE_PCI_HOST_BRIDGE) -typedef struct GrackleState { +struct GrackleState { PCIHostState parent_obj; uint32_t ofw_addr; @@ -46,7 +48,7 @@ typedef struct GrackleState { MemoryRegion pci_mmio; MemoryRegion pci_hole; MemoryRegion pci_io; -} GrackleState; +}; /* Don't know if this matches real hardware, but it agrees with OHW. */ static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 56ac1089b6..21896f96ed 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -35,22 +35,24 @@ #include "migration/vmstate.h" #include "qapi/visitor.h" #include "qemu/error-report.h" +#include "qom/object.h" /* * I440FX chipset data sheet. * https://wiki.qemu.org/File:29054901.pdf */ +typedef struct I440FXState I440FXState; #define I440FX_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(I440FXState, (obj), TYPE_I440FX_PCI_HOST_BRIDGE) -typedef struct I440FXState { +struct I440FXState { PCIHostState parent_obj; Range pci_hole; uint64_t pci_hole64_size; bool pci_hole64_fix; uint32_t short_root_bus; -} I440FXState; +}; #define I440FX_PAM 0x59 #define I440FX_PAM_SIZE 7 diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 171e4e1c71..2cc429ba7b 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -18,6 +18,7 @@ #include "hw/ppc/pnv.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define phb3_error(phb, fmt, ...) \ qemu_log_mask(LOG_GUEST_ERROR, "phb3[%d:%d]: " fmt "\n", \ diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 6e8c45e200..0802d4d64b 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -21,6 +21,7 @@ #include "hw/ppc/pnv_xscom.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define phb_error(phb, fmt, ...) \ qemu_log_mask(LOG_GUEST_ERROR, "phb4[%d:%d]: " fmt "\n", \ diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index c2a8527521..3ba0204601 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -24,6 +24,7 @@ #include "qemu/bswap.h" #include "qemu/module.h" #include "hw/pci-host/ppce500.h" +#include "qom/object.h" #ifdef DEBUG_PCI #define pci_debug(fmt, ...) fprintf(stderr, fmt, ## __VA_ARGS__) @@ -91,6 +92,7 @@ struct pci_inbound { #define TYPE_PPC_E500_PCI_HOST_BRIDGE "e500-pcihost" +typedef struct PPCE500PCIState PPCE500PCIState; #define PPC_E500_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(PPCE500PCIState, (obj), TYPE_PPC_E500_PCI_HOST_BRIDGE) @@ -114,6 +116,7 @@ struct PPCE500PCIState { }; #define TYPE_PPC_E500_PCI_BRIDGE "e500-host-bridge" +typedef struct PPCE500PCIBridgeState PPCE500PCIBridgeState; #define PPC_E500_PCI_BRIDGE(obj) \ OBJECT_CHECK(PPCE500PCIBridgeState, (obj), TYPE_PPC_E500_PCI_BRIDGE) @@ -125,8 +128,6 @@ struct PPCE500PCIBridgeState { MemoryRegion bar0; }; -typedef struct PPCE500PCIBridgeState PPCE500PCIBridgeState; -typedef struct PPCE500PCIState PPCE500PCIState; static uint64_t pci_reg_read4(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 5de4ab83f9..e6d262db1e 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -38,25 +38,28 @@ #include "hw/or-irq.h" #include "exec/address-spaces.h" #include "elf.h" +#include "qom/object.h" #define TYPE_RAVEN_PCI_DEVICE "raven" #define TYPE_RAVEN_PCI_HOST_BRIDGE "raven-pcihost" +typedef struct RavenPCIState RavenPCIState; #define RAVEN_PCI_DEVICE(obj) \ OBJECT_CHECK(RavenPCIState, (obj), TYPE_RAVEN_PCI_DEVICE) -typedef struct RavenPCIState { +struct RavenPCIState { PCIDevice dev; uint32_t elf_machine; char *bios_name; MemoryRegion bios; -} RavenPCIState; +}; +typedef struct PRePPCIState PREPPCIState; #define RAVEN_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(PREPPCIState, (obj), TYPE_RAVEN_PCI_HOST_BRIDGE) -typedef struct PRePPCIState { +struct PRePPCIState { PCIHostState parent_obj; qemu_or_irq *or_irq; @@ -75,7 +78,7 @@ typedef struct PRePPCIState { int contiguous_map; bool is_legacy_prep; -} PREPPCIState; +}; #define BIOS_SIZE (1 * MiB) diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index fd71ae8d19..bcb0f96885 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -18,6 +18,7 @@ #include "hw/qdev-properties.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" /* Old and buggy versions of QEMU used the wrong mapping from * PCI IRQs to system interrupt lines. Unfortunately the Linux @@ -71,7 +72,7 @@ enum { PCI_VPB_IRQMAP_FORCE_OK, }; -typedef struct { +struct PCIVPBState { PCIHostState parent_obj; qemu_irq irq[4]; @@ -100,7 +101,8 @@ typedef struct { uint32_t selfid; uint32_t flags; uint8_t irq_mapping; -} PCIVPBState; +}; +typedef struct PCIVPBState PCIVPBState; static void pci_vpb_update_window(PCIVPBState *s, int i) { diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c index 3a2a6f5f5d..7949f7004a 100644 --- a/hw/ppc/mpc8544_guts.c +++ b/hw/ppc/mpc8544_guts.c @@ -22,6 +22,7 @@ #include "sysemu/runstate.h" #include "cpu.h" #include "hw/sysbus.h" +#include "qom/object.h" #define MPC8544_GUTS_MMIO_SIZE 0x1000 #define MPC8544_GUTS_RSTCR_RESET 0x02 @@ -54,6 +55,7 @@ #define MPC8544_GUTS_ADDR_SRDS2CR3 0xF18 #define TYPE_MPC8544_GUTS "mpc8544-guts" +typedef struct GutsState GutsState; #define MPC8544_GUTS(obj) OBJECT_CHECK(GutsState, (obj), TYPE_MPC8544_GUTS) struct GutsState { @@ -64,7 +66,6 @@ struct GutsState { MemoryRegion iomem; }; -typedef struct GutsState GutsState; static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c index 37feaa2f06..7c3145ce43 100644 --- a/hw/ppc/ppc440_pcix.c +++ b/hw/ppc/ppc440_pcix.c @@ -30,6 +30,7 @@ #include "hw/pci/pci_host.h" #include "exec/address-spaces.h" #include "trace.h" +#include "qom/object.h" struct PLBOutMap { uint64_t la; @@ -45,13 +46,14 @@ struct PLBInMap { }; #define TYPE_PPC440_PCIX_HOST_BRIDGE "ppc440-pcix-host" +typedef struct PPC440PCIXState PPC440PCIXState; #define PPC440_PCIX_HOST_BRIDGE(obj) \ OBJECT_CHECK(PPC440PCIXState, (obj), TYPE_PPC440_PCIX_HOST_BRIDGE) #define PPC440_PCIX_NR_POMS 3 #define PPC440_PCIX_NR_PIMS 3 -typedef struct PPC440PCIXState { +struct PPC440PCIXState { PCIHostState parent_obj; PCIDevice *dev; @@ -65,7 +67,7 @@ typedef struct PPC440PCIXState { MemoryRegion container; MemoryRegion iomem; MemoryRegion busmem; -} PPC440PCIXState; +}; #define PPC440_REG_BASE 0x80000 #define PPC440_REG_SIZE 0xff diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index c1167aa6da..1ff714458d 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -24,6 +24,7 @@ #include "sysemu/block-backend.h" #include "sysemu/reset.h" #include "ppc440.h" +#include "qom/object.h" /*****************************************************************************/ /* L2 Cache as SRAM */ @@ -1032,10 +1033,11 @@ void ppc4xx_dma_init(CPUPPCState *env, int dcr_base) #include "hw/pci/pcie_host.h" #define TYPE_PPC460EX_PCIE_HOST "ppc460ex-pcie-host" +typedef struct PPC460EXPCIEState PPC460EXPCIEState; #define PPC460EX_PCIE_HOST(obj) \ OBJECT_CHECK(PPC460EXPCIEState, (obj), TYPE_PPC460EX_PCIE_HOST) -typedef struct PPC460EXPCIEState { +struct PPC460EXPCIEState { PCIExpressHost host; MemoryRegion iomem; @@ -1056,7 +1058,7 @@ typedef struct PPC460EXPCIEState { uint32_t reg_mask; uint32_t special; uint32_t cfg; -} PPC460EXPCIEState; +}; #define DCRN_PCIE0_BASE 0x100 #define DCRN_PCIE1_BASE 0x120 diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c index b22df26c70..8eb83080b0 100644 --- a/hw/ppc/ppc4xx_pci.c +++ b/hw/ppc/ppc4xx_pci.c @@ -30,6 +30,7 @@ #include "hw/pci/pci_host.h" #include "exec/address-spaces.h" #include "trace.h" +#include "qom/object.h" struct PCIMasterMap { uint32_t la; @@ -43,6 +44,7 @@ struct PCITargetMap { uint32_t la; }; +typedef struct PPC4xxPCIState PPC4xxPCIState; #define PPC4xx_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(PPC4xxPCIState, (obj), TYPE_PPC4xx_PCI_HOST_BRIDGE) @@ -59,7 +61,6 @@ struct PPC4xxPCIState { MemoryRegion container; MemoryRegion iomem; }; -typedef struct PPC4xxPCIState PPC4xxPCIState; #define PCIC0_CFGADDR 0x0 #define PCIC0_CFGDATA 0x4 diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c index a5d13ec583..5858fdaa10 100644 --- a/hw/ppc/ppce500_spin.c +++ b/hw/ppc/ppce500_spin.c @@ -34,6 +34,7 @@ #include "hw/sysbus.h" #include "sysemu/hw_accel.h" #include "e500.h" +#include "qom/object.h" #define MAX_CPUS 32 @@ -46,14 +47,15 @@ typedef struct spin_info { } QEMU_PACKED SpinInfo; #define TYPE_E500_SPIN "e500-spin" +typedef struct SpinState SpinState; #define E500_SPIN(obj) OBJECT_CHECK(SpinState, (obj), TYPE_E500_SPIN) -typedef struct SpinState { +struct SpinState { SysBusDevice parent_obj; MemoryRegion iomem; SpinInfo spin[MAX_CPUS]; -} SpinState; +}; static void spin_reset(DeviceState *dev) { diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c index c326518509..338de2209d 100644 --- a/hw/ppc/prep_systemio.c +++ b/hw/ppc/prep_systemio.c @@ -28,6 +28,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "exec/address-spaces.h" +#include "qom/object.h" #include "qemu/error-report.h" /* for error_report() */ #include "qemu/module.h" #include "sysemu/runstate.h" @@ -35,13 +36,14 @@ #include "trace.h" #define TYPE_PREP_SYSTEMIO "prep-systemio" +typedef struct PrepSystemIoState PrepSystemIoState; #define PREP_SYSTEMIO(obj) \ OBJECT_CHECK(PrepSystemIoState, (obj), TYPE_PREP_SYSTEMIO) /* Bit as defined in PowerPC Reference Plaform v1.1, sect. 6.1.5, p. 132 */ #define PREP_BIT(n) (1 << (7 - (n))) -typedef struct PrepSystemIoState { +struct PrepSystemIoState { ISADevice parent_obj; MemoryRegion ppc_parity_mem; @@ -53,7 +55,7 @@ typedef struct PrepSystemIoState { uint8_t ibm_planar_id; /* 0x0852 */ qemu_irq softreset_irq; PortioList portio; -} PrepSystemIoState; +}; /* PORT 0092 -- Special Port 92 (Read/Write) */ diff --git a/hw/ppc/rs6000_mc.c b/hw/ppc/rs6000_mc.c index a5c32c8ed5..5ca15d8116 100644 --- a/hw/ppc/rs6000_mc.c +++ b/hw/ppc/rs6000_mc.c @@ -26,12 +26,14 @@ #include "hw/boards.h" #include "qapi/error.h" #include "trace.h" +#include "qom/object.h" #define TYPE_RS6000MC "rs6000-mc" +typedef struct RS6000MCState RS6000MCState; #define RS6000MC_DEVICE(obj) \ OBJECT_CHECK(RS6000MCState, (obj), TYPE_RS6000MC) -typedef struct RS6000MCState { +struct RS6000MCState { ISADevice parent_obj; /* see US patent 5,684,979 for details (expired 2001-11-04) */ uint32_t ram_size; @@ -41,7 +43,7 @@ typedef struct RS6000MCState { uint32_t end_address[8]; uint8_t port0820_index; PortioList portio; -} RS6000MCState; +}; /* P0RT 0803 -- SIMM ID Register (32/8 MB) (Read Only) */ diff --git a/hw/ppc/spapr_rng.c b/hw/ppc/spapr_rng.c index f25a10d26a..fb19e6c65d 100644 --- a/hw/ppc/spapr_rng.c +++ b/hw/ppc/spapr_rng.c @@ -28,7 +28,9 @@ #include "hw/ppc/spapr.h" #include "hw/qdev-properties.h" #include "kvm_ppc.h" +#include "qom/object.h" +typedef struct SpaprRngState SpaprRngState; #define SPAPR_RNG(obj) \ OBJECT_CHECK(SpaprRngState, (obj), TYPE_SPAPR_RNG) @@ -38,7 +40,6 @@ struct SpaprRngState { RngBackend *backend; bool use_kvm; }; -typedef struct SpaprRngState SpaprRngState; struct HRandomData { QemuSemaphore sem; diff --git a/hw/rtc/ds1338.c b/hw/rtc/ds1338.c index 985d07f8f1..3f0b5f0bfd 100644 --- a/hw/rtc/ds1338.c +++ b/hw/rtc/ds1338.c @@ -16,6 +16,7 @@ #include "migration/vmstate.h" #include "qemu/bcd.h" #include "qemu/module.h" +#include "qom/object.h" /* Size of NVRAM including both the user-accessible area and the * secondary register area. @@ -29,9 +30,10 @@ #define CTRL_OSF 0x20 #define TYPE_DS1338 "ds1338" +typedef struct DS1338State DS1338State; #define DS1338(obj) OBJECT_CHECK(DS1338State, (obj), TYPE_DS1338) -typedef struct DS1338State { +struct DS1338State { I2CSlave parent_obj; int64_t offset; @@ -39,7 +41,7 @@ typedef struct DS1338State { uint8_t nvram[NVRAM_SIZE]; int32_t ptr; bool addr_byte; -} DS1338State; +}; static const VMStateDescription vmstate_ds1338 = { .name = "ds1338", diff --git a/hw/rtc/exynos4210_rtc.c b/hw/rtc/exynos4210_rtc.c index 375f682f5d..7aa29740fe 100644 --- a/hw/rtc/exynos4210_rtc.c +++ b/hw/rtc/exynos4210_rtc.c @@ -38,6 +38,7 @@ #include "hw/irq.h" #include "hw/arm/exynos4210.h" +#include "qom/object.h" #define DEBUG_RTC 0 @@ -84,10 +85,11 @@ #define RTC_BASE_FREQ 32768 #define TYPE_EXYNOS4210_RTC "exynos4210.rtc" +typedef struct Exynos4210RTCState Exynos4210RTCState; #define EXYNOS4210_RTC(obj) \ OBJECT_CHECK(Exynos4210RTCState, (obj), TYPE_EXYNOS4210_RTC) -typedef struct Exynos4210RTCState { +struct Exynos4210RTCState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -113,7 +115,7 @@ typedef struct Exynos4210RTCState { qemu_irq alm_irq; /* alarm irq */ struct tm current_tm; /* current time */ -} Exynos4210RTCState; +}; #define TICCKSEL(value) ((value & (0x0F << 4)) >> 4) diff --git a/hw/rtc/m41t80.c b/hw/rtc/m41t80.c index 8b44b70eba..10b501194a 100644 --- a/hw/rtc/m41t80.c +++ b/hw/rtc/m41t80.c @@ -14,14 +14,16 @@ #include "qemu/timer.h" #include "qemu/bcd.h" #include "hw/i2c/i2c.h" +#include "qom/object.h" #define TYPE_M41T80 "m41t80" +typedef struct M41t80State M41t80State; #define M41T80(obj) OBJECT_CHECK(M41t80State, (obj), TYPE_M41T80) -typedef struct M41t80State { +struct M41t80State { I2CSlave parent_obj; int8_t addr; -} M41t80State; +}; static void m41t80_realize(DeviceState *dev, Error **errp) { diff --git a/hw/rtc/m48t59-isa.c b/hw/rtc/m48t59-isa.c index 6e72e132e4..13ceed424a 100644 --- a/hw/rtc/m48t59-isa.c +++ b/hw/rtc/m48t59-isa.c @@ -30,8 +30,11 @@ #include "m48t59-internal.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_M48TXX_ISA "isa-m48txx" +typedef struct M48txxISADeviceClass M48txxISADeviceClass; +typedef struct M48txxISAState M48txxISAState; #define M48TXX_ISA_GET_CLASS(obj) \ OBJECT_GET_CLASS(M48txxISADeviceClass, (obj), TYPE_M48TXX_ISA) #define M48TXX_ISA_CLASS(klass) \ @@ -39,17 +42,17 @@ #define M48TXX_ISA(obj) \ OBJECT_CHECK(M48txxISAState, (obj), TYPE_M48TXX_ISA) -typedef struct M48txxISAState { +struct M48txxISAState { ISADevice parent_obj; M48t59State state; uint32_t io_base; MemoryRegion io; -} M48txxISAState; +}; -typedef struct M48txxISADeviceClass { +struct M48txxISADeviceClass { ISADeviceClass parent_class; M48txxInfo info; -} M48txxISADeviceClass; +}; static M48txxInfo m48txx_isa_info[] = { { diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c index 1057e225d0..ad305e0825 100644 --- a/hw/rtc/m48t59.c +++ b/hw/rtc/m48t59.c @@ -40,8 +40,11 @@ #include "m48t59-internal.h" #include "migration/vmstate.h" +#include "qom/object.h" #define TYPE_M48TXX_SYS_BUS "sysbus-m48txx" +typedef struct M48txxSysBusDeviceClass M48txxSysBusDeviceClass; +typedef struct M48txxSysBusState M48txxSysBusState; #define M48TXX_SYS_BUS_GET_CLASS(obj) \ OBJECT_GET_CLASS(M48txxSysBusDeviceClass, (obj), TYPE_M48TXX_SYS_BUS) #define M48TXX_SYS_BUS_CLASS(klass) \ @@ -56,16 +59,16 @@ * http://www.st.com/stonline/products/literature/od/7001/m48t59y.pdf */ -typedef struct M48txxSysBusState { +struct M48txxSysBusState { SysBusDevice parent_obj; M48t59State state; MemoryRegion io; -} M48txxSysBusState; +}; -typedef struct M48txxSysBusDeviceClass { +struct M48txxSysBusDeviceClass { SysBusDeviceClass parent_class; M48txxInfo info; -} M48txxSysBusDeviceClass; +}; static M48txxInfo m48txx_sysbus_info[] = { { diff --git a/hw/rtc/sun4v-rtc.c b/hw/rtc/sun4v-rtc.c index 8e242e8416..486a16d0cf 100644 --- a/hw/rtc/sun4v-rtc.c +++ b/hw/rtc/sun4v-rtc.c @@ -16,16 +16,18 @@ #include "qemu/timer.h" #include "hw/rtc/sun4v-rtc.h" #include "trace.h" +#include "qom/object.h" #define TYPE_SUN4V_RTC "sun4v_rtc" +typedef struct Sun4vRtc Sun4vRtc; #define SUN4V_RTC(obj) OBJECT_CHECK(Sun4vRtc, (obj), TYPE_SUN4V_RTC) -typedef struct Sun4vRtc { +struct Sun4vRtc { SysBusDevice parent_obj; MemoryRegion iomem; -} Sun4vRtc; +}; static uint64_t sun4v_rtc_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/rtc/twl92230.c b/hw/rtc/twl92230.c index 782d77d6fc..9a3b8c3411 100644 --- a/hw/rtc/twl92230.c +++ b/hw/rtc/twl92230.c @@ -29,13 +29,15 @@ #include "sysemu/sysemu.h" #include "qemu/bcd.h" #include "qemu/module.h" +#include "qom/object.h" #define VERBOSE 1 #define TYPE_TWL92230 "twl92230" +typedef struct MenelausState MenelausState; #define TWL92230(obj) OBJECT_CHECK(MenelausState, (obj), TYPE_TWL92230) -typedef struct MenelausState { +struct MenelausState { I2CSlave parent_obj; int firstbyte; @@ -71,7 +73,7 @@ typedef struct MenelausState { uint16_t rtc_next_vmstate; qemu_irq out[4]; uint8_t pwrbtn_state; -} MenelausState; +}; static inline void menelaus_update(MenelausState *s) { diff --git a/hw/rx/rx-gdbsim.c b/hw/rx/rx-gdbsim.c index 54992ebe57..d1d163d02e 100644 --- a/hw/rx/rx-gdbsim.c +++ b/hw/rx/rx-gdbsim.c @@ -30,24 +30,27 @@ #include "sysemu/qtest.h" #include "sysemu/device_tree.h" #include "hw/boards.h" +#include "qom/object.h" /* Same address of GDB integrated simulator */ #define SDRAM_BASE EXT_CS_BASE -typedef struct RxGdbSimMachineClass { +struct RxGdbSimMachineClass { /*< private >*/ MachineClass parent_class; /*< public >*/ const char *mcu_name; uint32_t xtal_freq_hz; -} RxGdbSimMachineClass; +}; +typedef struct RxGdbSimMachineClass RxGdbSimMachineClass; -typedef struct RxGdbSimMachineState { +struct RxGdbSimMachineState { /*< private >*/ MachineState parent_obj; /*< public >*/ RX62NState mcu; -} RxGdbSimMachineState; +}; +typedef struct RxGdbSimMachineState RxGdbSimMachineState; #define TYPE_RX_GDBSIM_MACHINE MACHINE_TYPE_NAME("rx62n-common") diff --git a/hw/rx/rx62n.c b/hw/rx/rx62n.c index b9c217ebfa..d2935c5429 100644 --- a/hw/rx/rx62n.c +++ b/hw/rx/rx62n.c @@ -31,6 +31,7 @@ #include "sysemu/sysemu.h" #include "sysemu/qtest.h" #include "cpu.h" +#include "qom/object.h" /* * RX62N Internal Memory @@ -60,7 +61,7 @@ #define RX62N_XTAL_MAX_HZ (14 * 1000 * 1000) #define RX62N_PCLK_MAX_HZ (50 * 1000 * 1000) -typedef struct RX62NClass { +struct RX62NClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -68,7 +69,8 @@ typedef struct RX62NClass { uint64_t ram_size; uint64_t rom_flash_size; uint64_t data_flash_size; -} RX62NClass; +}; +typedef struct RX62NClass RX62NClass; #define RX62N_MCU_CLASS(klass) \ OBJECT_CLASS_CHECK(RX62NClass, (klass), TYPE_RX62N_MCU) diff --git a/hw/scsi/esp-pci.c b/hw/scsi/esp-pci.c index 0fa2e1cc45..652b750f5e 100644 --- a/hw/scsi/esp-pci.c +++ b/hw/scsi/esp-pci.c @@ -33,9 +33,11 @@ #include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_AM53C974_DEVICE "am53c974" +typedef struct PCIESPState PCIESPState; #define PCI_ESP(obj) \ OBJECT_CHECK(PCIESPState, (obj), TYPE_AM53C974_DEVICE) @@ -64,7 +66,7 @@ #define SBAC_STATUS (1 << 24) -typedef struct PCIESPState { +struct PCIESPState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -73,7 +75,7 @@ typedef struct PCIESPState { uint32_t dma_regs[8]; uint32_t sbac; ESPState esp; -} PCIESPState; +}; static void esp_pci_handle_idle(PCIESPState *pci, uint32_t val) { @@ -409,10 +411,11 @@ static const TypeInfo esp_pci_info = { }; TYPE_INFO(esp_pci_info) -typedef struct { +struct DC390State { PCIESPState pci; eeprom_t *eeprom; -} DC390State; +}; +typedef struct DC390State DC390State; #define TYPE_DC390_DEVICE "dc390" #define DC390(obj) \ diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c index 4c02f32182..3651ef2e95 100644 --- a/hw/scsi/lsi53c895a.c +++ b/hw/scsi/lsi53c895a.c @@ -23,6 +23,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" static const char *names[] = { "SCNTL0", "SCNTL1", "SCNTL2", "SCNTL3", "SCID", "SXFER", "SDID", "GPREG", @@ -213,7 +214,7 @@ enum { LSI_MSG_ACTION_DIN = 3, }; -typedef struct { +struct LSIState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -303,7 +304,8 @@ typedef struct { uint32_t adder; uint8_t script_ram[2048 * sizeof(uint32_t)]; -} LSIState; +}; +typedef struct LSIState LSIState; #define TYPE_LSI53C810 "lsi53c810" #define TYPE_LSI53C895A "lsi53c895a" diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index eda0c22f03..6f0d21804d 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -34,6 +34,7 @@ #include "qapi/error.h" #include "mfi.h" #include "migration/vmstate.h" +#include "qom/object.h" #define MEGASAS_VERSION_GEN1 "1.70" #define MEGASAS_VERSION_GEN2 "1.80" @@ -72,7 +73,7 @@ typedef struct MegasasCmd { struct MegasasState *state; } MegasasCmd; -typedef struct MegasasState { +struct MegasasState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -116,16 +117,18 @@ typedef struct MegasasState { MegasasCmd frames[MEGASAS_MAX_FRAMES]; DECLARE_BITMAP(frame_map, MEGASAS_MAX_FRAMES); SCSIBus bus; -} MegasasState; +}; +typedef struct MegasasState MegasasState; -typedef struct MegasasBaseClass { +struct MegasasBaseClass { PCIDeviceClass parent_class; const char *product_name; const char *product_version; int mmio_bar; int ioport_bar; int osts; -} MegasasBaseClass; +}; +typedef struct MegasasBaseClass MegasasBaseClass; #define TYPE_MEGASAS_BASE "megasas-base" #define TYPE_MEGASAS_GEN1 "megasas" diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c index f0777dd4ee..3a2978d6d3 100644 --- a/hw/scsi/scsi-disk.c +++ b/hw/scsi/scsi-disk.c @@ -38,6 +38,7 @@ #include "sysemu/sysemu.h" #include "qemu/cutils.h" #include "trace.h" +#include "qom/object.h" #ifdef __linux #include @@ -54,6 +55,8 @@ #define TYPE_SCSI_DISK_BASE "scsi-disk-base" +typedef struct SCSIDiskClass SCSIDiskClass; +typedef struct SCSIDiskState SCSIDiskState; #define SCSI_DISK_BASE(obj) \ OBJECT_CHECK(SCSIDiskState, (obj), TYPE_SCSI_DISK_BASE) #define SCSI_DISK_BASE_CLASS(klass) \ @@ -61,13 +64,13 @@ #define SCSI_DISK_BASE_GET_CLASS(obj) \ OBJECT_GET_CLASS(SCSIDiskClass, (obj), TYPE_SCSI_DISK_BASE) -typedef struct SCSIDiskClass { +struct SCSIDiskClass { SCSIDeviceClass parent_class; DMAIOFunc *dma_readv; DMAIOFunc *dma_writev; bool (*need_fua_emulation)(SCSICommand *cmd); void (*update_sense)(SCSIRequest *r); -} SCSIDiskClass; +}; typedef struct SCSIDiskReq { SCSIRequest req; @@ -87,8 +90,7 @@ typedef struct SCSIDiskReq { #define SCSI_DISK_F_DPOFUA 1 #define SCSI_DISK_F_NO_REMOVABLE_DEVOPS 2 -typedef struct SCSIDiskState -{ +struct SCSIDiskState { SCSIDevice qdev; uint32_t features; bool media_changed; @@ -113,7 +115,7 @@ typedef struct SCSIDiskState * 0xffff - reserved */ uint16_t rotation_rate; -} SCSIDiskState; +}; static bool scsi_handle_rw_error(SCSIDiskReq *r, int error, bool acct_failed); diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c index 10c64396d6..65b84395df 100644 --- a/hw/scsi/spapr_vscsi.c +++ b/hw/scsi/spapr_vscsi.c @@ -46,6 +46,7 @@ #include "trace.h" #include +#include "qom/object.h" /* * Virtual SCSI device @@ -90,14 +91,15 @@ typedef struct vscsi_req { } vscsi_req; #define TYPE_VIO_SPAPR_VSCSI_DEVICE "spapr-vscsi" +typedef struct VSCSIState VSCSIState; #define VIO_SPAPR_VSCSI_DEVICE(obj) \ OBJECT_CHECK(VSCSIState, (obj), TYPE_VIO_SPAPR_VSCSI_DEVICE) -typedef struct { +struct VSCSIState { SpaprVioDevice vdev; SCSIBus bus; vscsi_req reqs[VSCSI_REQ_LIMIT]; -} VSCSIState; +}; static union viosrp_iu *req_iu(vscsi_req *req) { diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index 796dbc14d6..6afe5d1a5f 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -36,6 +36,7 @@ #include "hw/qdev-properties.h" #include "vmw_pvscsi.h" #include "trace.h" +#include "qom/object.h" #define PVSCSI_USE_64BIT (true) @@ -56,12 +57,14 @@ (stl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \ (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val)) -typedef struct PVSCSIClass { +struct PVSCSIClass { PCIDeviceClass parent_class; DeviceRealize parent_dc_realize; -} PVSCSIClass; +}; +typedef struct PVSCSIClass PVSCSIClass; #define TYPE_PVSCSI "pvscsi" +typedef struct PVSCSIState PVSCSIState; #define PVSCSI(obj) OBJECT_CHECK(PVSCSIState, (obj), TYPE_PVSCSI) #define PVSCSI_CLASS(klass) \ @@ -104,7 +107,7 @@ typedef struct PVSCSISGState { typedef QTAILQ_HEAD(, PVSCSIRequest) PVSCSIRequestList; -typedef struct { +struct PVSCSIState { PCIDevice parent_obj; MemoryRegion io_space; SCSIBus bus; @@ -132,7 +135,7 @@ typedef struct { uint32_t resetting; /* Reset in progress */ uint32_t compat_flags; -} PVSCSIState; +}; typedef struct PVSCSIRequest { SCSIRequest *sreq; diff --git a/hw/sd/allwinner-sdhost.c b/hw/sd/allwinner-sdhost.c index 980015cf94..3036f0e830 100644 --- a/hw/sd/allwinner-sdhost.c +++ b/hw/sd/allwinner-sdhost.c @@ -26,6 +26,7 @@ #include "hw/sd/allwinner-sdhost.h" #include "migration/vmstate.h" #include "trace.h" +#include "qom/object.h" #define TYPE_AW_SDHOST_BUS "allwinner-sdhost-bus" #define AW_SDHOST_BUS(obj) \ diff --git a/hw/sd/bcm2835_sdhost.c b/hw/sd/bcm2835_sdhost.c index ab912fc45b..36255bc30b 100644 --- a/hw/sd/bcm2835_sdhost.c +++ b/hw/sd/bcm2835_sdhost.c @@ -19,6 +19,7 @@ #include "hw/sd/bcm2835_sdhost.h" #include "migration/vmstate.h" #include "trace.h" +#include "qom/object.h" #define TYPE_BCM2835_SDHOST_BUS "bcm2835-sdhost-bus" #define BCM2835_SDHOST_BUS(obj) \ diff --git a/hw/sd/milkymist-memcard.c b/hw/sd/milkymist-memcard.c index 64a369a04b..3039a5941e 100644 --- a/hw/sd/milkymist-memcard.c +++ b/hw/sd/milkymist-memcard.c @@ -32,6 +32,7 @@ #include "sysemu/blockdev.h" #include "hw/qdev-properties.h" #include "hw/sd/sd.h" +#include "qom/object.h" enum { ENABLE_CMD_TX = (1<<0), @@ -63,6 +64,7 @@ enum { }; #define TYPE_MILKYMIST_MEMCARD "milkymist-memcard" +typedef struct MilkymistMemcardState MilkymistMemcardState; #define MILKYMIST_MEMCARD(obj) \ OBJECT_CHECK(MilkymistMemcardState, (obj), TYPE_MILKYMIST_MEMCARD) @@ -81,7 +83,6 @@ struct MilkymistMemcardState { uint8_t response[17]; uint32_t regs[R_MAX]; }; -typedef struct MilkymistMemcardState MilkymistMemcardState; static void update_pending_bits(MilkymistMemcardState *s) { diff --git a/hw/sd/pl181.c b/hw/sd/pl181.c index f937bb1add..5ec08414c2 100644 --- a/hw/sd/pl181.c +++ b/hw/sd/pl181.c @@ -16,6 +16,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" +#include "qom/object.h" //#define DEBUG_PL181 1 @@ -29,9 +30,10 @@ do { printf("pl181: " fmt , ## __VA_ARGS__); } while (0) #define PL181_FIFO_LEN 16 #define TYPE_PL181 "pl181" +typedef struct PL181State PL181State; #define PL181(obj) OBJECT_CHECK(PL181State, (obj), TYPE_PL181) -typedef struct PL181State { +struct PL181State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -60,7 +62,7 @@ typedef struct PL181State { qemu_irq irq[2]; /* GPIO outputs for 'card is readonly' and 'card inserted' */ qemu_irq cardstatus[2]; -} PL181State; +}; static const VMStateDescription vmstate_pl181 = { .name = "pl181", diff --git a/hw/sd/pxa2xx_mmci.c b/hw/sd/pxa2xx_mmci.c index e8c6008488..5f5b597318 100644 --- a/hw/sd/pxa2xx_mmci.c +++ b/hw/sd/pxa2xx_mmci.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #define TYPE_PXA2XX_MMCI_BUS "pxa2xx-mmci-bus" #define PXA2XX_MMCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_PXA2XX_MMCI_BUS) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 7902b8c12d..54c4200369 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -37,6 +37,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #define TYPE_SDHCI_BUS "sdhci-bus" #define SDHCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_SDHCI_BUS) diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c index 70b864366b..b9e9e916c9 100644 --- a/hw/sd/ssi-sd.c +++ b/hw/sd/ssi-sd.c @@ -18,6 +18,7 @@ #include "hw/sd/sd.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" //#define DEBUG_SSI_SD 1 @@ -40,7 +41,7 @@ typedef enum { SSI_SD_DATA_READ, } ssi_sd_mode; -typedef struct { +struct ssi_sd_state { SSISlave ssidev; uint32_t mode; int cmd; @@ -50,7 +51,8 @@ typedef struct { int32_t response_pos; int32_t stopping; SDBus sdbus; -} ssi_sd_state; +}; +typedef struct ssi_sd_state ssi_sd_state; #define TYPE_SSI_SD "ssi-sd" #define SSI_SD(obj) OBJECT_CHECK(ssi_sd_state, (obj), TYPE_SSI_SD) diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c index b6f5a54781..e3d11f7fad 100644 --- a/hw/sh4/sh_pci.c +++ b/hw/sh4/sh_pci.c @@ -31,13 +31,15 @@ #include "qemu/bswap.h" #include "qemu/module.h" #include "exec/address-spaces.h" +#include "qom/object.h" #define TYPE_SH_PCI_HOST_BRIDGE "sh_pci" +typedef struct SHPCIState SHPCIState; #define SH_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(SHPCIState, (obj), TYPE_SH_PCI_HOST_BRIDGE) -typedef struct SHPCIState { +struct SHPCIState { PCIHostState parent_obj; PCIDevice *dev; @@ -48,7 +50,7 @@ typedef struct SHPCIState { uint32_t par; uint32_t mbr; uint32_t iobr; -} SHPCIState; +}; static void sh_pci_reg_write (void *p, hwaddr addr, uint64_t val, unsigned size) diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index d53a0faf82..4c2fa270c8 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -52,6 +52,7 @@ #include "hw/loader.h" #include "elf.h" #include "trace.h" +#include "qom/object.h" /* * Sun4m architecture was used in the following machines: @@ -591,14 +592,15 @@ static void idreg_init(hwaddr addr) idreg_data, sizeof(idreg_data)); } +typedef struct IDRegState IDRegState; #define MACIO_ID_REGISTER(obj) \ OBJECT_CHECK(IDRegState, (obj), TYPE_MACIO_ID_REGISTER) -typedef struct IDRegState { +struct IDRegState { SysBusDevice parent_obj; MemoryRegion mem; -} IDRegState; +}; static void idreg_realize(DeviceState *ds, Error **errp) { @@ -634,13 +636,14 @@ static const TypeInfo idreg_info = { TYPE_INFO(idreg_info) #define TYPE_TCX_AFX "tcx_afx" +typedef struct AFXState AFXState; #define TCX_AFX(obj) OBJECT_CHECK(AFXState, (obj), TYPE_TCX_AFX) -typedef struct AFXState { +struct AFXState { SysBusDevice parent_obj; MemoryRegion mem; -} AFXState; +}; /* SS-5 TCX AFX register */ static void afx_init(hwaddr addr) @@ -688,13 +691,14 @@ static const TypeInfo afx_info = { TYPE_INFO(afx_info) #define TYPE_OPENPROM "openprom" +typedef struct PROMState PROMState; #define OPENPROM(obj) OBJECT_CHECK(PROMState, (obj), TYPE_OPENPROM) -typedef struct PROMState { +struct PROMState { SysBusDevice parent_obj; MemoryRegion prom; -} PROMState; +}; /* Boot PROM (OpenBIOS) */ static uint64_t translate_prom_address(void *opaque, uint64_t addr) @@ -777,12 +781,13 @@ static const TypeInfo prom_info = { TYPE_INFO(prom_info) #define TYPE_SUN4M_MEMORY "memory" +typedef struct RamDevice RamDevice; #define SUN4M_RAM(obj) OBJECT_CHECK(RamDevice, (obj), TYPE_SUN4M_MEMORY) -typedef struct RamDevice { +struct RamDevice { SysBusDevice parent_obj; HostMemoryBackend *memdev; -} RamDevice; +}; /* System RAM */ static void ram_realize(DeviceState *dev, Error **errp) diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 73e6b0eed6..006c7b4578 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -55,6 +55,7 @@ #include "hw/fw-path-provider.h" #include "elf.h" #include "trace.h" +#include "qom/object.h" #define KERNEL_LOAD_ADDR 0x00404000 #define CMDLINE_ADDR 0x003ff000 @@ -79,7 +80,7 @@ struct hwdef { uint64_t console_serial_base; }; -typedef struct EbusState { +struct EbusState { /*< private >*/ PCIDevice parent_obj; @@ -88,7 +89,8 @@ typedef struct EbusState { uint64_t console_serial_base; MemoryRegion bar0; MemoryRegion bar1; -} EbusState; +}; +typedef struct EbusState EbusState; #define TYPE_EBUS "ebus" #define EBUS(obj) OBJECT_CHECK(EbusState, (obj), TYPE_EBUS) @@ -226,13 +228,14 @@ typedef struct ResetData { } ResetData; #define TYPE_SUN4U_POWER "power" +typedef struct PowerDevice PowerDevice; #define SUN4U_POWER(obj) OBJECT_CHECK(PowerDevice, (obj), TYPE_SUN4U_POWER) -typedef struct PowerDevice { +struct PowerDevice { SysBusDevice parent_obj; MemoryRegion power_mmio; -} PowerDevice; +}; /* Power */ static uint64_t power_mem_read(void *opaque, hwaddr addr, unsigned size) @@ -401,13 +404,14 @@ static const TypeInfo ebus_info = { TYPE_INFO(ebus_info) #define TYPE_OPENPROM "openprom" +typedef struct PROMState PROMState; #define OPENPROM(obj) OBJECT_CHECK(PROMState, (obj), TYPE_OPENPROM) -typedef struct PROMState { +struct PROMState { SysBusDevice parent_obj; MemoryRegion prom; -} PROMState; +}; static uint64_t translate_prom_address(void *opaque, uint64_t addr) { @@ -490,14 +494,15 @@ TYPE_INFO(prom_info) #define TYPE_SUN4U_MEMORY "memory" +typedef struct RamDevice RamDevice; #define SUN4U_RAM(obj) OBJECT_CHECK(RamDevice, (obj), TYPE_SUN4U_MEMORY) -typedef struct RamDevice { +struct RamDevice { SysBusDevice parent_obj; MemoryRegion ram; uint64_t size; -} RamDevice; +}; /* System RAM */ static void ram_realize(DeviceState *dev, Error **errp) diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index 9461e57b8b..d9b6da316b 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -17,6 +17,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "qapi/error.h" +#include "qom/object.h" struct SSIBus { BusState parent_obj; diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c index 4f6f50e313..a895621ff1 100644 --- a/hw/ssi/xilinx_spi.c +++ b/hw/ssi/xilinx_spi.c @@ -34,6 +34,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/ssi/ssi.h" +#include "qom/object.h" #ifdef XILINX_SPI_ERR_DEBUG #define DB_PRINT(...) do { \ @@ -78,9 +79,10 @@ #define FIFO_CAPACITY 256 #define TYPE_XILINX_SPI "xlnx.xps-spi" +typedef struct XilinxSPI XilinxSPI; #define XILINX_SPI(obj) OBJECT_CHECK(XilinxSPI, (obj), TYPE_XILINX_SPI) -typedef struct XilinxSPI { +struct XilinxSPI { SysBusDevice parent_obj; MemoryRegion mmio; @@ -97,7 +99,7 @@ typedef struct XilinxSPI { Fifo8 tx_fifo; uint32_t regs[R_MAX]; -} XilinxSPI; +}; static void txfifo_reset(XilinxSPI *s) { diff --git a/hw/timer/altera_timer.c b/hw/timer/altera_timer.c index 922b14c335..f22729261f 100644 --- a/hw/timer/altera_timer.c +++ b/hw/timer/altera_timer.c @@ -26,6 +26,7 @@ #include "hw/irq.h" #include "hw/ptimer.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define R_STATUS 0 #define R_CONTROL 1 @@ -44,17 +45,18 @@ #define CONTROL_STOP 0x0008 #define TYPE_ALTERA_TIMER "ALTR.timer" +typedef struct AlteraTimer AlteraTimer; #define ALTERA_TIMER(obj) \ OBJECT_CHECK(AlteraTimer, (obj), TYPE_ALTERA_TIMER) -typedef struct AlteraTimer { +struct AlteraTimer { SysBusDevice busdev; MemoryRegion mmio; qemu_irq irq; uint32_t freq_hz; ptimer_state *ptimer; uint32_t regs[R_MAX]; -} AlteraTimer; +}; static int timer_irq_state(AlteraTimer *t) { diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index 664c2d9bfc..c9aa82fc09 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -16,6 +16,7 @@ #include "hw/qdev-properties.h" #include "qemu/module.h" #include "qemu/log.h" +#include "qom/object.h" /* Common timer implementation. */ @@ -190,9 +191,10 @@ static arm_timer_state *arm_timer_init(uint32_t freq) */ #define TYPE_SP804 "sp804" +typedef struct SP804State SP804State; #define SP804(obj) OBJECT_CHECK(SP804State, (obj), TYPE_SP804) -typedef struct SP804State { +struct SP804State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -200,7 +202,7 @@ typedef struct SP804State { uint32_t freq0, freq1; int level[2]; qemu_irq irq; -} SP804State; +}; static const uint8_t sp804_ids[] = { /* Timer ID */ @@ -310,15 +312,16 @@ static void sp804_realize(DeviceState *dev, Error **errp) /* Integrator/CP timer module. */ #define TYPE_INTEGRATOR_PIT "integrator_pit" +typedef struct icp_pit_state icp_pit_state; #define INTEGRATOR_PIT(obj) \ OBJECT_CHECK(icp_pit_state, (obj), TYPE_INTEGRATOR_PIT) -typedef struct { +struct icp_pit_state { SysBusDevice parent_obj; MemoryRegion iomem; arm_timer_state *timer[3]; -} icp_pit_state; +}; static uint64_t icp_pit_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c index 9ab120cf9c..35a9887fea 100644 --- a/hw/timer/cadence_ttc.c +++ b/hw/timer/cadence_ttc.c @@ -22,6 +22,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "qemu/timer.h" +#include "qom/object.h" #ifdef CADENCE_TTC_ERR_DEBUG #define DB_PRINT(...) do { \ @@ -69,15 +70,16 @@ typedef struct { } CadenceTimerState; #define TYPE_CADENCE_TTC "cadence_ttc" +typedef struct CadenceTTCState CadenceTTCState; #define CADENCE_TTC(obj) \ OBJECT_CHECK(CadenceTTCState, (obj), TYPE_CADENCE_TTC) -typedef struct CadenceTTCState { +struct CadenceTTCState { SysBusDevice parent_obj; MemoryRegion iomem; CadenceTimerState timer[3]; -} CadenceTTCState; +}; static void cadence_timer_update(CadenceTimerState *s) { diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c index 77767a1beb..a16c9c6f62 100644 --- a/hw/timer/etraxfs_timer.c +++ b/hw/timer/etraxfs_timer.c @@ -30,6 +30,7 @@ #include "qemu/timer.h" #include "hw/irq.h" #include "hw/ptimer.h" +#include "qom/object.h" #define D(x) @@ -48,10 +49,11 @@ #define R_MASKED_INTR 0x54 #define TYPE_ETRAX_FS_TIMER "etraxfs,timer" +typedef struct ETRAXTimerState ETRAXTimerState; #define ETRAX_TIMER(obj) \ OBJECT_CHECK(ETRAXTimerState, (obj), TYPE_ETRAX_FS_TIMER) -typedef struct ETRAXTimerState { +struct ETRAXTimerState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -79,7 +81,7 @@ typedef struct ETRAXTimerState { uint32_t rw_ack_intr; uint32_t r_intr; uint32_t r_masked_intr; -} ETRAXTimerState; +}; static uint64_t timer_read(void *opaque, hwaddr addr, unsigned int size) diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index 077c820f3b..2848b6fcbd 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -62,6 +62,7 @@ #include "hw/arm/exynos4210.h" #include "hw/irq.h" +#include "qom/object.h" //#define DEBUG_MCT @@ -242,10 +243,11 @@ typedef struct { } Exynos4210MCTLT; #define TYPE_EXYNOS4210_MCT "exynos4210.mct" +typedef struct Exynos4210MCTState Exynos4210MCTState; #define EXYNOS4210_MCT(obj) \ OBJECT_CHECK(Exynos4210MCTState, (obj), TYPE_EXYNOS4210_MCT) -typedef struct Exynos4210MCTState { +struct Exynos4210MCTState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -257,7 +259,7 @@ typedef struct Exynos4210MCTState { Exynos4210MCTGT g_timer; uint32_t freq; /* all timers tick frequency, TCLK */ -} Exynos4210MCTState; +}; /*** VMState ***/ static const VMStateDescription vmstate_tick_timer = { diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c index c71063f6b0..25970c3182 100644 --- a/hw/timer/exynos4210_pwm.c +++ b/hw/timer/exynos4210_pwm.c @@ -30,6 +30,7 @@ #include "hw/arm/exynos4210.h" #include "hw/irq.h" +#include "qom/object.h" //#define DEBUG_PWM @@ -102,10 +103,11 @@ typedef struct { } Exynos4210PWM; #define TYPE_EXYNOS4210_PWM "exynos4210.pwm" +typedef struct Exynos4210PWMState Exynos4210PWMState; #define EXYNOS4210_PWM(obj) \ OBJECT_CHECK(Exynos4210PWMState, (obj), TYPE_EXYNOS4210_PWM) -typedef struct Exynos4210PWMState { +struct Exynos4210PWMState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -116,7 +118,7 @@ typedef struct Exynos4210PWMState { Exynos4210PWM timer[EXYNOS4210_PWM_TIMERS_NUM]; -} Exynos4210PWMState; +}; /*** VMState ***/ static const VMStateDescription vmstate_exynos4210_pwm = { diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index d5bf6cb1f7..c05f94ec3b 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -32,6 +32,7 @@ #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #define UNIT_REG_SIZE 16 /* Size of memory mapped regs for the unit */ #define GPTIMER_REG_SIZE 16 /* Size of memory mapped regs for a GPTimer */ @@ -55,11 +56,11 @@ #define COUNTER_RELOAD_OFFSET 0x04 #define TIMER_BASE 0x10 +typedef struct GPTimerUnit GPTimerUnit; #define GRLIB_GPTIMER(obj) \ OBJECT_CHECK(GPTimerUnit, (obj), TYPE_GRLIB_GPTIMER) typedef struct GPTimer GPTimer; -typedef struct GPTimerUnit GPTimerUnit; struct GPTimer { struct ptimer_state *ptimer; diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 37f02c3c34..5f469e726f 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -37,6 +37,7 @@ #include "migration/vmstate.h" #include "hw/timer/i8254.h" #include "exec/address-spaces.h" +#include "qom/object.h" //#define HPET_DEBUG #ifdef HPET_DEBUG @@ -47,6 +48,7 @@ #define HPET_MSI_SUPPORT 0 +typedef struct HPETState HPETState; #define HPET(obj) OBJECT_CHECK(HPETState, (obj), TYPE_HPET) struct HPETState; @@ -65,7 +67,7 @@ typedef struct HPETTimer { /* timers */ */ } HPETTimer; -typedef struct HPETState { +struct HPETState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -87,7 +89,7 @@ typedef struct HPETState { uint64_t isr; /* interrupt status reg */ uint64_t hpet_counter; /* main counter */ uint8_t hpet_id; /* instance id */ -} HPETState; +}; static uint32_t hpet_in_legacy_mode(HPETState *s) { diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c index f20d3d53e2..7e5abd7fc7 100644 --- a/hw/timer/i8254.c +++ b/hw/timer/i8254.c @@ -28,6 +28,7 @@ #include "qemu/timer.h" #include "hw/timer/i8254.h" #include "hw/timer/i8254_internal.h" +#include "qom/object.h" //#define DEBUG_PIT @@ -36,14 +37,15 @@ #define RW_STATE_WORD0 3 #define RW_STATE_WORD1 4 +typedef struct PITClass PITClass; #define PIT_CLASS(class) OBJECT_CLASS_CHECK(PITClass, (class), TYPE_I8254) #define PIT_GET_CLASS(obj) OBJECT_GET_CLASS(PITClass, (obj), TYPE_I8254) -typedef struct PITClass { +struct PITClass { PITCommonClass parent_class; DeviceRealize parent_realize; -} PITClass; +}; static void pit_irq_timer_update(PITChannelState *s, int64_t current_time); diff --git a/hw/timer/lm32_timer.c b/hw/timer/lm32_timer.c index 929e8fee10..ccbbdaa102 100644 --- a/hw/timer/lm32_timer.c +++ b/hw/timer/lm32_timer.c @@ -31,6 +31,7 @@ #include "hw/qdev-properties.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" #define DEFAULT_FREQUENCY (50*1000000) @@ -55,6 +56,7 @@ enum { }; #define TYPE_LM32_TIMER "lm32-timer" +typedef struct LM32TimerState LM32TimerState; #define LM32_TIMER(obj) OBJECT_CHECK(LM32TimerState, (obj), TYPE_LM32_TIMER) struct LM32TimerState { @@ -69,7 +71,6 @@ struct LM32TimerState { uint32_t regs[R_MAX]; }; -typedef struct LM32TimerState LM32TimerState; static void timer_update_irq(LM32TimerState *s) { diff --git a/hw/timer/milkymist-sysctl.c b/hw/timer/milkymist-sysctl.c index 0e3787546a..cbbb3c991c 100644 --- a/hw/timer/milkymist-sysctl.c +++ b/hw/timer/milkymist-sysctl.c @@ -32,6 +32,7 @@ #include "hw/qdev-properties.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { CTRL_ENABLE = (1<<0), @@ -62,6 +63,7 @@ enum { }; #define TYPE_MILKYMIST_SYSCTL "milkymist-sysctl" +typedef struct MilkymistSysctlState MilkymistSysctlState; #define MILKYMIST_SYSCTL(obj) \ OBJECT_CHECK(MilkymistSysctlState, (obj), TYPE_MILKYMIST_SYSCTL) @@ -84,7 +86,6 @@ struct MilkymistSysctlState { qemu_irq timer0_irq; qemu_irq timer1_irq; }; -typedef struct MilkymistSysctlState MilkymistSysctlState; static void sysctl_icap_write(MilkymistSysctlState *s, uint32_t value) { diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c index a9fff5b89f..86143380d5 100644 --- a/hw/timer/puv3_ost.c +++ b/hw/timer/puv3_ost.c @@ -15,15 +15,17 @@ #include "hw/ptimer.h" #include "qemu/module.h" #include "qemu/log.h" +#include "qom/object.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" #define TYPE_PUV3_OST "puv3_ost" +typedef struct PUV3OSTState PUV3OSTState; #define PUV3_OST(obj) OBJECT_CHECK(PUV3OSTState, (obj), TYPE_PUV3_OST) /* puv3 ostimer implementation. */ -typedef struct PUV3OSTState { +struct PUV3OSTState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -34,7 +36,7 @@ typedef struct PUV3OSTState { uint32_t reg_OSCR; uint32_t reg_OSSR; uint32_t reg_OIER; -} PUV3OSTState; +}; static uint64_t puv3_ost_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/timer/pxa2xx_timer.c b/hw/timer/pxa2xx_timer.c index 46a315e6db..e2b161d2b5 100644 --- a/hw/timer/pxa2xx_timer.c +++ b/hw/timer/pxa2xx_timer.c @@ -17,6 +17,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define OSMR0 0x00 #define OSMR1 0x04 @@ -66,10 +67,10 @@ static int pxa2xx_timer4_freq[8] = { }; #define TYPE_PXA2XX_TIMER "pxa2xx-timer" +typedef struct PXA2xxTimerInfo PXA2xxTimerInfo; #define PXA2XX_TIMER(obj) \ OBJECT_CHECK(PXA2xxTimerInfo, (obj), TYPE_PXA2XX_TIMER) -typedef struct PXA2xxTimerInfo PXA2xxTimerInfo; typedef struct { uint32_t value; diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c index 36734c07e6..1c6c7b96a7 100644 --- a/hw/timer/slavio_timer.c +++ b/hw/timer/slavio_timer.c @@ -31,6 +31,7 @@ #include "migration/vmstate.h" #include "trace.h" #include "qemu/module.h" +#include "qom/object.h" /* * Registers of hardware timer in sun4m. @@ -59,16 +60,17 @@ typedef struct CPUTimerState { } CPUTimerState; #define TYPE_SLAVIO_TIMER "slavio_timer" +typedef struct SLAVIO_TIMERState SLAVIO_TIMERState; #define SLAVIO_TIMER(obj) \ OBJECT_CHECK(SLAVIO_TIMERState, (obj), TYPE_SLAVIO_TIMER) -typedef struct SLAVIO_TIMERState { +struct SLAVIO_TIMERState { SysBusDevice parent_obj; uint32_t num_cpus; uint32_t cputimer_mode; CPUTimerState cputimer[MAX_CPUS + 1]; -} SLAVIO_TIMERState; +}; typedef struct TimerContext { MemoryRegion iomem; diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c index f14d4c14bb..bd36d906a2 100644 --- a/hw/timer/xilinx_timer.c +++ b/hw/timer/xilinx_timer.c @@ -29,6 +29,7 @@ #include "hw/qdev-properties.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define D(x) diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 788d05adc5..a1e239813e 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -29,8 +29,9 @@ #include "tpm_prop.h" #include "tpm_ppi.h" #include "trace.h" +#include "qom/object.h" -typedef struct CRBState { +struct CRBState { DeviceState parent_obj; TPMBackend *tpmbe; @@ -43,7 +44,8 @@ typedef struct CRBState { bool ppi_enabled; TPMPPI ppi; -} CRBState; +}; +typedef struct CRBState CRBState; #define CRB(obj) OBJECT_CHECK(CRBState, (obj), TYPE_TPM_CRB) diff --git a/hw/tpm/tpm_spapr.c b/hw/tpm/tpm_spapr.c index 7f83a8b3b2..c96f869ebf 100644 --- a/hw/tpm/tpm_spapr.c +++ b/hw/tpm/tpm_spapr.c @@ -26,9 +26,11 @@ #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" #include "trace.h" +#include "qom/object.h" #define DEBUG_SPAPR 0 +typedef struct SpaprTpmState SpaprTpmState; #define VIO_SPAPR_VTPM(obj) \ OBJECT_CHECK(SpaprTpmState, (obj), TYPE_TPM_SPAPR) @@ -64,7 +66,7 @@ typedef struct TpmCrq { #define TPM_SPAPR_BUFFER_MAX 4096 -typedef struct { +struct SpaprTpmState { SpaprVioDevice vdev; TpmCrq crq; /* track single TPM command */ @@ -84,7 +86,7 @@ typedef struct { TPMVersion be_tpm_version; size_t be_buffer_size; -} SpaprTpmState; +}; /* * Send a request to the TPM. diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c index 3bb4ec10fa..2daef11cde 100644 --- a/hw/tpm/tpm_tis_isa.c +++ b/hw/tpm/tpm_tis_isa.c @@ -29,14 +29,16 @@ #include "hw/acpi/tpm.h" #include "tpm_prop.h" #include "tpm_tis.h" +#include "qom/object.h" -typedef struct TPMStateISA { +struct TPMStateISA { /*< private >*/ ISADevice parent_obj; /*< public >*/ TPMState state; /* not a QOM object */ -} TPMStateISA; +}; +typedef struct TPMStateISA TPMStateISA; #define TPM_TIS_ISA(obj) OBJECT_CHECK(TPMStateISA, (obj), TYPE_TPM_TIS_ISA) diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c index 2a63c68f22..4a05f1cfa3 100644 --- a/hw/tpm/tpm_tis_sysbus.c +++ b/hw/tpm/tpm_tis_sysbus.c @@ -29,14 +29,16 @@ #include "tpm_prop.h" #include "hw/sysbus.h" #include "tpm_tis.h" +#include "qom/object.h" -typedef struct TPMStateSysBus { +struct TPMStateSysBus { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ TPMState state; /* not a QOM object */ -} TPMStateSysBus; +}; +typedef struct TPMStateSysBus TPMStateSysBus; #define TPM_TIS_SYSBUS(obj) OBJECT_CHECK(TPMStateSysBus, (obj), TYPE_TPM_TIS_SYSBUS) diff --git a/hw/usb/ccid-card-emulated.c b/hw/usb/ccid-card-emulated.c index e4647413c6..50f60f656f 100644 --- a/hw/usb/ccid-card-emulated.c +++ b/hw/usb/ccid-card-emulated.c @@ -35,6 +35,7 @@ #include "ccid.h" #include "hw/qdev-properties.h" #include "qapi/error.h" +#include "qom/object.h" #define DPRINTF(card, lvl, fmt, ...) \ do {\ @@ -45,6 +46,7 @@ do {\ #define TYPE_EMULATED_CCID "ccid-card-emulated" +typedef struct EmulatedState EmulatedState; #define EMULATED_CCID_CARD(obj) \ OBJECT_CHECK(EmulatedState, (obj), TYPE_EMULATED_CCID) @@ -58,7 +60,6 @@ enum { #define DEFAULT_BACKEND BACKEND_NSS_EMULATED -typedef struct EmulatedState EmulatedState; enum { EMUL_READER_INSERT = 0, diff --git a/hw/usb/ccid-card-passthru.c b/hw/usb/ccid-card-passthru.c index 4a53ab2742..a8a241f4d3 100644 --- a/hw/usb/ccid-card-passthru.c +++ b/hw/usb/ccid-card-passthru.c @@ -20,6 +20,7 @@ #include "qemu/sockets.h" #include "ccid.h" #include "qapi/error.h" +#include "qom/object.h" #define DPRINTF(card, lvl, fmt, ...) \ do { \ diff --git a/hw/usb/dev-audio.c b/hw/usb/dev-audio.c index eaef43d2b9..74215edd04 100644 --- a/hw/usb/dev-audio.c +++ b/hw/usb/dev-audio.c @@ -36,6 +36,7 @@ #include "migration/vmstate.h" #include "desc.h" #include "audio/audio.h" +#include "qom/object.h" static void usb_audio_reinit(USBDevice *dev, unsigned channels); @@ -633,7 +634,7 @@ static uint8_t *streambuf_get(struct streambuf *buf, size_t *len) return data; } -typedef struct USBAudioState { +struct USBAudioState { /* qemu interfaces */ USBDevice dev; QEMUSoundCard card; @@ -652,7 +653,8 @@ typedef struct USBAudioState { uint32_t debug; uint32_t buffer_user, buffer; bool multi; -} USBAudioState; +}; +typedef struct USBAudioState USBAudioState; #define TYPE_USB_AUDIO "usb-audio" #define USB_AUDIO(obj) OBJECT_CHECK(USBAudioState, (obj), TYPE_USB_AUDIO) diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c index 30aff4499f..7872ba25a3 100644 --- a/hw/usb/dev-hid.c +++ b/hw/usb/dev-hid.c @@ -33,6 +33,7 @@ #include "qemu/timer.h" #include "hw/input/hid.h" #include "hw/qdev-properties.h" +#include "qom/object.h" /* HID interface requests */ #define GET_REPORT 0xa101 @@ -47,14 +48,15 @@ #define USB_DT_REPORT 0x22 #define USB_DT_PHY 0x23 -typedef struct USBHIDState { +struct USBHIDState { USBDevice dev; USBEndpoint *intr; HIDState hid; uint32_t usb_version; char *display; uint32_t head; -} USBHIDState; +}; +typedef struct USBHIDState USBHIDState; #define TYPE_USB_HID "usb-hid" #define USB_HID(obj) OBJECT_CHECK(USBHIDState, (obj), TYPE_USB_HID) diff --git a/hw/usb/dev-hub.c b/hw/usb/dev-hub.c index f4193dfe85..ceeda6b464 100644 --- a/hw/usb/dev-hub.c +++ b/hw/usb/dev-hub.c @@ -32,6 +32,7 @@ #include "desc.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" #define MAX_PORTS 8 @@ -41,14 +42,15 @@ typedef struct USBHubPort { uint16_t wPortChange; } USBHubPort; -typedef struct USBHubState { +struct USBHubState { USBDevice dev; USBEndpoint *intr; uint32_t num_ports; bool port_power; QEMUTimer *port_timer; USBHubPort ports[MAX_PORTS]; -} USBHubState; +}; +typedef struct USBHubState USBHubState; #define TYPE_USB_HUB "usb-hub" #define USB_HUB(obj) OBJECT_CHECK(USBHubState, (obj), TYPE_USB_HUB) diff --git a/hw/usb/dev-mtp.c b/hw/usb/dev-mtp.c index 2e42a799eb..eff0247d85 100644 --- a/hw/usb/dev-mtp.c +++ b/hw/usb/dev-mtp.c @@ -28,6 +28,7 @@ #include "migration/vmstate.h" #include "desc.h" #include "qemu/units.h" +#include "qom/object.h" /* ----------------------------------------------------------------------- */ diff --git a/hw/usb/dev-network.c b/hw/usb/dev-network.c index e5eb181d9e..59b637e398 100644 --- a/hw/usb/dev-network.c +++ b/hw/usb/dev-network.c @@ -37,6 +37,7 @@ #include "qemu/iov.h" #include "qemu/module.h" #include "qemu/cutils.h" +#include "qom/object.h" /*#define TRAFFIC_DEBUG*/ /* Thanks to NetChip Technologies for donating this product ID. @@ -629,7 +630,7 @@ struct rndis_response { uint8_t buf[]; }; -typedef struct USBNetState { +struct USBNetState { USBDevice dev; enum rndis_state rndis_state; @@ -651,7 +652,8 @@ typedef struct USBNetState { NICState *nic; NICConf conf; QTAILQ_HEAD(, rndis_response) rndis_resp; -} USBNetState; +}; +typedef struct USBNetState USBNetState; #define TYPE_USB_NET "usb-net" #define USB_NET(obj) OBJECT_CHECK(USBNetState, (obj), TYPE_USB_NET) diff --git a/hw/usb/dev-serial.c b/hw/usb/dev-serial.c index a6d85abd12..4b2d59f740 100644 --- a/hw/usb/dev-serial.c +++ b/hw/usb/dev-serial.c @@ -19,6 +19,7 @@ #include "desc.h" #include "chardev/char-serial.h" #include "chardev/char-fe.h" +#include "qom/object.h" //#define DEBUG_Serial @@ -96,7 +97,7 @@ do { printf("usb-serial: " fmt , ## __VA_ARGS__); } while (0) #define FTDI_TEMT (1<<6) // Transmitter Empty #define FTDI_FIFO (1<<7) // Error in FIFO -typedef struct { +struct USBSerialState { USBDevice dev; USBEndpoint *intr; uint8_t recv_buf[RECV_BUF]; @@ -108,7 +109,8 @@ typedef struct { QEMUSerialSetParams params; int latency; /* ms */ CharBackend cs; -} USBSerialState; +}; +typedef struct USBSerialState USBSerialState; #define TYPE_USB_SERIAL "usb-serial-dev" #define USB_SERIAL_DEV(obj) OBJECT_CHECK(USBSerialState, (obj), TYPE_USB_SERIAL) diff --git a/hw/usb/dev-smartcard-reader.c b/hw/usb/dev-smartcard-reader.c index a34aba700f..399de75fe4 100644 --- a/hw/usb/dev-smartcard-reader.c +++ b/hw/usb/dev-smartcard-reader.c @@ -46,6 +46,7 @@ #include "desc.h" #include "ccid.h" +#include "qom/object.h" #define DPRINTF(s, lvl, fmt, ...) \ do { \ @@ -60,6 +61,7 @@ do { \ #define D_VERBOSE 4 #define CCID_DEV_NAME "usb-ccid" +typedef struct USBCCIDState USBCCIDState; #define USB_CCID_DEV(obj) OBJECT_CHECK(USBCCIDState, (obj), CCID_DEV_NAME) /* * The two options for variable sized buffers: @@ -274,14 +276,15 @@ typedef struct BulkIn { uint32_t pos; } BulkIn; -typedef struct CCIDBus { +struct CCIDBus { BusState qbus; -} CCIDBus; +}; +typedef struct CCIDBus CCIDBus; /* * powered - defaults to true, changed by PowerOn/PowerOff messages */ -typedef struct USBCCIDState { +struct USBCCIDState { USBDevice dev; USBEndpoint *intr; USBEndpoint *bulk; @@ -309,7 +312,7 @@ typedef struct USBCCIDState { uint8_t powered; uint8_t notify_slot_change; uint8_t debug; -} USBCCIDState; +}; /* * CCID Spec chapter 4: CCID uses a standard device descriptor per Chapter 9, diff --git a/hw/usb/dev-storage.c b/hw/usb/dev-storage.c index 1b1b42016b..d6c694e77f 100644 --- a/hw/usb/dev-storage.c +++ b/hw/usb/dev-storage.c @@ -22,6 +22,7 @@ #include "sysemu/block-backend.h" #include "qapi/visitor.h" #include "qemu/cutils.h" +#include "qom/object.h" //#define DEBUG_MSD @@ -50,7 +51,7 @@ struct usb_msd_csw { uint8_t status; }; -typedef struct { +struct MSDState { USBDevice dev; enum USBMSDMode mode; uint32_t scsi_off; @@ -65,7 +66,8 @@ typedef struct { BlockConf conf; uint32_t removable; SCSIDevice *scsi_dev; -} MSDState; +}; +typedef struct MSDState MSDState; #define TYPE_USB_STORAGE "usb-storage-dev" #define USB_STORAGE_DEV(obj) OBJECT_CHECK(MSDState, (obj), TYPE_USB_STORAGE) diff --git a/hw/usb/dev-uas.c b/hw/usb/dev-uas.c index 57f38da477..8bc6045267 100644 --- a/hw/usb/dev-uas.c +++ b/hw/usb/dev-uas.c @@ -23,6 +23,7 @@ #include "hw/qdev-properties.h" #include "hw/scsi/scsi.h" #include "scsi/constants.h" +#include "qom/object.h" /* --------------------------------------------------------------------- */ diff --git a/hw/usb/dev-wacom.c b/hw/usb/dev-wacom.c index cb8f156f8f..e6833a2a45 100644 --- a/hw/usb/dev-wacom.c +++ b/hw/usb/dev-wacom.c @@ -32,6 +32,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "desc.h" +#include "qom/object.h" /* Interface requests */ #define WACOM_GET_REPORT 0x2101 @@ -44,7 +45,7 @@ #define HID_SET_IDLE 0x210a #define HID_SET_PROTOCOL 0x210b -typedef struct USBWacomState { +struct USBWacomState { USBDevice dev; USBEndpoint *intr; QEMUPutMouseEntry *eh_entry; @@ -57,7 +58,8 @@ typedef struct USBWacomState { } mode; uint8_t idle; int changed; -} USBWacomState; +}; +typedef struct USBWacomState USBWacomState; #define TYPE_USB_WACOM "usb-wacom-tablet" #define USB_WACOM(obj) OBJECT_CHECK(USBWacomState, (obj), TYPE_USB_WACOM) diff --git a/hw/usb/hcd-ohci-pci.c b/hw/usb/hcd-ohci-pci.c index aa461de292..a66379ef13 100644 --- a/hw/usb/hcd-ohci-pci.c +++ b/hw/usb/hcd-ohci-pci.c @@ -29,11 +29,13 @@ #include "hw/qdev-properties.h" #include "trace.h" #include "hcd-ohci.h" +#include "qom/object.h" #define TYPE_PCI_OHCI "pci-ohci" +typedef struct OHCIPCIState OHCIPCIState; #define PCI_OHCI(obj) OBJECT_CHECK(OHCIPCIState, (obj), TYPE_PCI_OHCI) -typedef struct { +struct OHCIPCIState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -42,7 +44,7 @@ typedef struct { char *masterbus; uint32_t num_ports; uint32_t firstport; -} OHCIPCIState; +}; /** * A typical PCI OHCI will additionally set PERR in its configspace to diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index a30964ac2c..7540206b93 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -39,6 +39,7 @@ #include "trace.h" #include "qemu/main-loop.h" #include "qemu/module.h" +#include "qom/object.h" #define FRAME_TIMER_FREQ 1000 diff --git a/hw/usb/host-libusb.c b/hw/usb/host-libusb.c index 89d313e7e1..71a03ff0f3 100644 --- a/hw/usb/host-libusb.c +++ b/hw/usb/host-libusb.c @@ -34,6 +34,7 @@ */ #include "qemu/osdep.h" +#include "qom/object.h" #ifndef CONFIG_WIN32 #include #endif @@ -55,10 +56,10 @@ /* ------------------------------------------------------------------------ */ #define TYPE_USB_HOST_DEVICE "usb-host" +typedef struct USBHostDevice USBHostDevice; #define USB_HOST_DEVICE(obj) \ OBJECT_CHECK(USBHostDevice, (obj), TYPE_USB_HOST_DEVICE) -typedef struct USBHostDevice USBHostDevice; typedef struct USBHostRequest USBHostRequest; typedef struct USBHostIsoXfer USBHostIsoXfer; typedef struct USBHostIsoRing USBHostIsoRing; diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c index b5c1e656bd..16e8b06198 100644 --- a/hw/usb/redirect.c +++ b/hw/usb/redirect.c @@ -45,6 +45,7 @@ #include "hw/usb.h" #include "migration/qemu-file-types.h" #include "migration/vmstate.h" +#include "qom/object.h" /* ERROR is defined below. Remove any previous definition. */ #undef ERROR diff --git a/hw/usb/tusb6010.c b/hw/usb/tusb6010.c index fc1263fcd0..55e6aca3a1 100644 --- a/hw/usb/tusb6010.c +++ b/hw/usb/tusb6010.c @@ -28,11 +28,13 @@ #include "hw/hw.h" #include "hw/irq.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_TUSB6010 "tusb6010" +typedef struct TUSBState TUSBState; #define TUSB(obj) OBJECT_CHECK(TUSBState, (obj), TYPE_TUSB6010) -typedef struct TUSBState { +struct TUSBState { SysBusDevice parent_obj; MemoryRegion iomem[2]; @@ -68,7 +70,7 @@ typedef struct TUSBState { uint32_t pullup[2]; uint32_t control_config; uint32_t otg_timer_val; -} TUSBState; +}; #define TUSB_DEVCLOCK 60000000 /* 60 MHz */ diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c index a45da2aa82..22ee36404c 100644 --- a/hw/vfio/ap.c +++ b/hw/vfio/ap.c @@ -28,13 +28,15 @@ #include "hw/qdev-properties.h" #include "hw/s390x/ap-bridge.h" #include "exec/address-spaces.h" +#include "qom/object.h" #define VFIO_AP_DEVICE_TYPE "vfio-ap" -typedef struct VFIOAPDevice { +struct VFIOAPDevice { APDevice apdev; VFIODevice vdev; -} VFIOAPDevice; +}; +typedef struct VFIOAPDevice VFIOAPDevice; #define VFIO_AP_DEVICE(obj) \ OBJECT_CHECK(VFIOAPDevice, (obj), VFIO_AP_DEVICE_TYPE) diff --git a/hw/virtio/vhost-scsi-pci.c b/hw/virtio/vhost-scsi-pci.c index 095af23f3f..2e836c3529 100644 --- a/hw/virtio/vhost-scsi-pci.c +++ b/hw/virtio/vhost-scsi-pci.c @@ -22,6 +22,7 @@ #include "qapi/error.h" #include "qemu/module.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VHostSCSIPCI VHostSCSIPCI; diff --git a/hw/virtio/vhost-user-blk-pci.c b/hw/virtio/vhost-user-blk-pci.c index 4f5d5cbf44..72ae695d24 100644 --- a/hw/virtio/vhost-user-blk-pci.c +++ b/hw/virtio/vhost-user-blk-pci.c @@ -27,6 +27,7 @@ #include "qemu/error-report.h" #include "qemu/module.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VHostUserBlkPCI VHostUserBlkPCI; diff --git a/hw/virtio/vhost-user-fs-pci.c b/hw/virtio/vhost-user-fs-pci.c index e11c889d82..6b01561c2f 100644 --- a/hw/virtio/vhost-user-fs-pci.c +++ b/hw/virtio/vhost-user-fs-pci.c @@ -15,6 +15,7 @@ #include "hw/qdev-properties.h" #include "hw/virtio/vhost-user-fs.h" #include "virtio-pci.h" +#include "qom/object.h" struct VHostUserFSPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/vhost-user-input-pci.c b/hw/virtio/vhost-user-input-pci.c index 0a50015599..b072fb576a 100644 --- a/hw/virtio/vhost-user-input-pci.c +++ b/hw/virtio/vhost-user-input-pci.c @@ -10,6 +10,7 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VHostUserInputPCI VHostUserInputPCI; diff --git a/hw/virtio/vhost-user-scsi-pci.c b/hw/virtio/vhost-user-scsi-pci.c index 4705cd54e8..331f3e4346 100644 --- a/hw/virtio/vhost-user-scsi-pci.c +++ b/hw/virtio/vhost-user-scsi-pci.c @@ -31,6 +31,7 @@ #include "hw/loader.h" #include "sysemu/kvm.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VHostUserSCSIPCI VHostUserSCSIPCI; diff --git a/hw/virtio/vhost-user-vsock-pci.c b/hw/virtio/vhost-user-vsock-pci.c index f4cf95873d..65bfc91d2d 100644 --- a/hw/virtio/vhost-user-vsock-pci.c +++ b/hw/virtio/vhost-user-vsock-pci.c @@ -13,6 +13,7 @@ #include "virtio-pci.h" #include "hw/qdev-properties.h" #include "hw/virtio/vhost-user-vsock.h" +#include "qom/object.h" typedef struct VHostUserVSockPCI VHostUserVSockPCI; diff --git a/hw/virtio/vhost-vsock-pci.c b/hw/virtio/vhost-vsock-pci.c index a815278e69..49fcddcb5a 100644 --- a/hw/virtio/vhost-vsock-pci.c +++ b/hw/virtio/vhost-vsock-pci.c @@ -17,6 +17,7 @@ #include "hw/qdev-properties.h" #include "hw/virtio/vhost-vsock.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VHostVSockPCI VHostVSockPCI; diff --git a/hw/virtio/virtio-9p-pci.c b/hw/virtio/virtio-9p-pci.c index cbcb062faa..8ea357b868 100644 --- a/hw/virtio/virtio-9p-pci.c +++ b/hw/virtio/virtio-9p-pci.c @@ -19,19 +19,21 @@ #include "hw/9pfs/virtio-9p.h" #include "hw/qdev-properties.h" #include "qemu/module.h" +#include "qom/object.h" /* * virtio-9p-pci: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_9P_PCI "virtio-9p-pci-base" +typedef struct V9fsPCIState V9fsPCIState; #define VIRTIO_9P_PCI(obj) \ OBJECT_CHECK(V9fsPCIState, (obj), TYPE_VIRTIO_9P_PCI) -typedef struct V9fsPCIState { +struct V9fsPCIState { VirtIOPCIProxy parent_obj; V9fsVirtioState vdev; -} V9fsPCIState; +}; static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) { diff --git a/hw/virtio/virtio-balloon-pci.c b/hw/virtio/virtio-balloon-pci.c index 5adc4e5819..35378c7309 100644 --- a/hw/virtio/virtio-balloon-pci.c +++ b/hw/virtio/virtio-balloon-pci.c @@ -19,6 +19,7 @@ #include "hw/virtio/virtio-balloon.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIOBalloonPCI VirtIOBalloonPCI; diff --git a/hw/virtio/virtio-blk-pci.c b/hw/virtio/virtio-blk-pci.c index 849cc7dfd8..80771954ee 100644 --- a/hw/virtio/virtio-blk-pci.c +++ b/hw/virtio/virtio-blk-pci.c @@ -22,6 +22,7 @@ #include "virtio-pci.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIOBlkPCI VirtIOBlkPCI; diff --git a/hw/virtio/virtio-crypto-pci.c b/hw/virtio/virtio-crypto-pci.c index 198f86e08c..518a87a36e 100644 --- a/hw/virtio/virtio-crypto-pci.c +++ b/hw/virtio/virtio-crypto-pci.c @@ -21,6 +21,7 @@ #include "hw/virtio/virtio-crypto.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIOCryptoPCI VirtIOCryptoPCI; diff --git a/hw/virtio/virtio-input-host-pci.c b/hw/virtio/virtio-input-host-pci.c index a82eb5d914..4d8479c92e 100644 --- a/hw/virtio/virtio-input-host-pci.c +++ b/hw/virtio/virtio-input-host-pci.c @@ -11,6 +11,7 @@ #include "virtio-pci.h" #include "hw/virtio/virtio-input.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIOInputHostPCI VirtIOInputHostPCI; diff --git a/hw/virtio/virtio-input-pci.c b/hw/virtio/virtio-input-pci.c index 29c633b3d8..205ed7bec9 100644 --- a/hw/virtio/virtio-input-pci.c +++ b/hw/virtio/virtio-input-pci.c @@ -12,6 +12,7 @@ #include "hw/qdev-properties.h" #include "hw/virtio/virtio-input.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIOInputPCI VirtIOInputPCI; typedef struct VirtIOInputHIDPCI VirtIOInputHIDPCI; diff --git a/hw/virtio/virtio-iommu-pci.c b/hw/virtio/virtio-iommu-pci.c index ba62d60a0a..17451f5a78 100644 --- a/hw/virtio/virtio-iommu-pci.c +++ b/hw/virtio/virtio-iommu-pci.c @@ -16,6 +16,7 @@ #include "hw/qdev-properties.h" #include "qapi/error.h" #include "hw/boards.h" +#include "qom/object.h" typedef struct VirtIOIOMMUPCI VirtIOIOMMUPCI; diff --git a/hw/virtio/virtio-net-pci.c b/hw/virtio/virtio-net-pci.c index 489b5dbad6..498fc02d8f 100644 --- a/hw/virtio/virtio-net-pci.c +++ b/hw/virtio/virtio-net-pci.c @@ -22,6 +22,7 @@ #include "virtio-pci.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIONetPCI VirtIONetPCI; diff --git a/hw/virtio/virtio-rng-pci.c b/hw/virtio/virtio-rng-pci.c index 8afbb4c209..8f953dff83 100644 --- a/hw/virtio/virtio-rng-pci.c +++ b/hw/virtio/virtio-rng-pci.c @@ -15,6 +15,7 @@ #include "hw/virtio/virtio-rng.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIORngPCI VirtIORngPCI; diff --git a/hw/virtio/virtio-scsi-pci.c b/hw/virtio/virtio-scsi-pci.c index c23a134202..6106bb38ae 100644 --- a/hw/virtio/virtio-scsi-pci.c +++ b/hw/virtio/virtio-scsi-pci.c @@ -19,6 +19,7 @@ #include "hw/virtio/virtio-scsi.h" #include "qemu/module.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VirtIOSCSIPCI VirtIOSCSIPCI; diff --git a/hw/virtio/virtio-serial-pci.c b/hw/virtio/virtio-serial-pci.c index 95d25d54da..1bd769e88d 100644 --- a/hw/virtio/virtio-serial-pci.c +++ b/hw/virtio/virtio-serial-pci.c @@ -21,6 +21,7 @@ #include "hw/virtio/virtio-serial.h" #include "qemu/module.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VirtIOSerialPCI VirtIOSerialPCI; diff --git a/hw/watchdog/wdt_i6300esb.c b/hw/watchdog/wdt_i6300esb.c index 989713fa4b..219c628f66 100644 --- a/hw/watchdog/wdt_i6300esb.c +++ b/hw/watchdog/wdt_i6300esb.c @@ -26,6 +26,7 @@ #include "sysemu/watchdog.h" #include "hw/pci/pci.h" #include "migration/vmstate.h" +#include "qom/object.h" /*#define I6300ESB_DEBUG 1*/ diff --git a/hw/watchdog/wdt_ib700.c b/hw/watchdog/wdt_ib700.c index ead7d0dbbd..61d80c0913 100644 --- a/hw/watchdog/wdt_ib700.c +++ b/hw/watchdog/wdt_ib700.c @@ -25,6 +25,7 @@ #include "sysemu/watchdog.h" #include "hw/isa/isa.h" #include "migration/vmstate.h" +#include "qom/object.h" /*#define IB700_DEBUG 1*/ @@ -36,15 +37,16 @@ #endif #define TYPE_IB700 "ib700" +typedef struct IB700state IB700State; #define IB700(obj) OBJECT_CHECK(IB700State, (obj), TYPE_IB700) -typedef struct IB700state { +struct IB700state { ISADevice parent_obj; QEMUTimer *timer; PortioList port_list; -} IB700State; +}; /* This is the timer. We use a global here because the watchdog * code ensures there is only one watchdog (it is located at a fixed, diff --git a/migration/rdma.c b/migration/rdma.c index 15ad985d26..e3eac913bc 100644 --- a/migration/rdma.c +++ b/migration/rdma.c @@ -35,6 +35,7 @@ #include #include #include "trace.h" +#include "qom/object.h" /* * Print and error on both the Monitor and the Log file. @@ -397,10 +398,10 @@ typedef struct RDMAContext { } RDMAContext; #define TYPE_QIO_CHANNEL_RDMA "qio-channel-rdma" +typedef struct QIOChannelRDMA QIOChannelRDMA; #define QIO_CHANNEL_RDMA(obj) \ OBJECT_CHECK(QIOChannelRDMA, (obj), TYPE_QIO_CHANNEL_RDMA) -typedef struct QIOChannelRDMA QIOChannelRDMA; struct QIOChannelRDMA { diff --git a/net/can/can_socketcan.c b/net/can/can_socketcan.c index c083e92735..b6fc55dc44 100644 --- a/net/can/can_socketcan.c +++ b/net/can/can_socketcan.c @@ -40,17 +40,19 @@ #include #include #include +#include "qom/object.h" #ifndef DEBUG_CAN #define DEBUG_CAN 0 #endif /*DEBUG_CAN*/ #define TYPE_CAN_HOST_SOCKETCAN "can-host-socketcan" +typedef struct CanHostSocketCAN CanHostSocketCAN; #define CAN_HOST_SOCKETCAN(obj) \ OBJECT_CHECK(CanHostSocketCAN, (obj), TYPE_CAN_HOST_SOCKETCAN) #define CAN_READ_BUF_LEN 5 -typedef struct CanHostSocketCAN { +struct CanHostSocketCAN { CanHostState parent; char *ifname; @@ -63,7 +65,7 @@ typedef struct CanHostSocketCAN { int bufptr; int fd; -} CanHostSocketCAN; +}; /* Check that QEMU and Linux kernel flags encoding and structure matches */ QEMU_BUILD_BUG_ON(QEMU_CAN_EFF_FLAG != CAN_EFF_FLAG); diff --git a/net/colo-compare.c b/net/colo-compare.c index b6f56fc915..01fc7027ae 100644 --- a/net/colo-compare.c +++ b/net/colo-compare.c @@ -36,6 +36,7 @@ #include "qemu/coroutine.h" #define TYPE_COLO_COMPARE "colo-compare" +typedef struct CompareState CompareState; #define COLO_COMPARE(obj) \ OBJECT_CHECK(CompareState, (obj), TYPE_COLO_COMPARE) @@ -100,7 +101,7 @@ typedef struct SendEntry { uint8_t *buf; } SendEntry; -typedef struct CompareState { +struct CompareState { Object parent; char *pri_indev; @@ -136,7 +137,7 @@ typedef struct CompareState { enum colo_event event; QTAILQ_ENTRY(CompareState) next; -} CompareState; +}; typedef struct CompareClass { ObjectClass parent_class; diff --git a/net/dump.c b/net/dump.c index ec9f20bea5..b3d69ece8f 100644 --- a/net/dump.c +++ b/net/dump.c @@ -33,6 +33,7 @@ #include "qemu/timer.h" #include "qapi/visitor.h" #include "net/filter.h" +#include "qom/object.h" typedef struct DumpState { int64_t start_ts; @@ -139,6 +140,7 @@ static int net_dump_state_init(DumpState *s, const char *filename, #define TYPE_FILTER_DUMP "filter-dump" +typedef struct NetFilterDumpState NetFilterDumpState; #define FILTER_DUMP(obj) \ OBJECT_CHECK(NetFilterDumpState, (obj), TYPE_FILTER_DUMP) @@ -148,7 +150,6 @@ struct NetFilterDumpState { char *filename; uint32_t maxlen; }; -typedef struct NetFilterDumpState NetFilterDumpState; static ssize_t filter_dump_receive_iov(NetFilterState *nf, NetClientState *sndr, unsigned flags, const struct iovec *iov, diff --git a/net/filter-buffer.c b/net/filter-buffer.c index 9a6b8132ea..c6b87f6b5f 100644 --- a/net/filter-buffer.c +++ b/net/filter-buffer.c @@ -18,16 +18,17 @@ #define TYPE_FILTER_BUFFER "filter-buffer" +typedef struct FilterBufferState FilterBufferState; #define FILTER_BUFFER(obj) \ OBJECT_CHECK(FilterBufferState, (obj), TYPE_FILTER_BUFFER) -typedef struct FilterBufferState { +struct FilterBufferState { NetFilterState parent_obj; NetQueue *incoming_queue; uint32_t interval; QEMUTimer release_timer; -} FilterBufferState; +}; static void filter_buffer_flush(NetFilterState *nf) { diff --git a/net/filter-mirror.c b/net/filter-mirror.c index 09cb97332d..e34542db42 100644 --- a/net/filter-mirror.c +++ b/net/filter-mirror.c @@ -21,17 +21,18 @@ #include "qemu/iov.h" #include "qemu/sockets.h" +#define TYPE_FILTER_MIRROR "filter-mirror" +typedef struct MirrorState MirrorState; #define FILTER_MIRROR(obj) \ OBJECT_CHECK(MirrorState, (obj), TYPE_FILTER_MIRROR) +#define TYPE_FILTER_REDIRECTOR "filter-redirector" #define FILTER_REDIRECTOR(obj) \ OBJECT_CHECK(MirrorState, (obj), TYPE_FILTER_REDIRECTOR) -#define TYPE_FILTER_MIRROR "filter-mirror" -#define TYPE_FILTER_REDIRECTOR "filter-redirector" #define REDIRECTOR_MAX_LEN NET_BUFSIZE -typedef struct MirrorState { +struct MirrorState { NetFilterState parent_obj; char *indev; char *outdev; @@ -39,7 +40,7 @@ typedef struct MirrorState { CharBackend chr_out; SocketReadState rs; bool vnet_hdr; -} MirrorState; +}; static int filter_send(MirrorState *s, const struct iovec *iov, diff --git a/net/filter-replay.c b/net/filter-replay.c index 9f95ee305b..bc8e641dda 100644 --- a/net/filter-replay.c +++ b/net/filter-replay.c @@ -19,9 +19,11 @@ #include "qapi/visitor.h" #include "net/filter.h" #include "sysemu/replay.h" +#include "qom/object.h" #define TYPE_FILTER_REPLAY "filter-replay" +typedef struct NetFilterReplayState NetFilterReplayState; #define FILTER_REPLAY(obj) \ OBJECT_CHECK(NetFilterReplayState, (obj), TYPE_FILTER_REPLAY) @@ -29,7 +31,6 @@ struct NetFilterReplayState { NetFilterState nfs; ReplayNetState *rns; }; -typedef struct NetFilterReplayState NetFilterReplayState; static ssize_t filter_replay_receive_iov(NetFilterState *nf, NetClientState *sndr, diff --git a/net/filter-rewriter.c b/net/filter-rewriter.c index 891fa95264..8538942c1c 100644 --- a/net/filter-rewriter.c +++ b/net/filter-rewriter.c @@ -23,21 +23,22 @@ #include "migration/colo.h" #include "util.h" +#define TYPE_FILTER_REWRITER "filter-rewriter" +typedef struct RewriterState RewriterState; #define FILTER_COLO_REWRITER(obj) \ OBJECT_CHECK(RewriterState, (obj), TYPE_FILTER_REWRITER) -#define TYPE_FILTER_REWRITER "filter-rewriter" #define FAILOVER_MODE_ON true #define FAILOVER_MODE_OFF false -typedef struct RewriterState { +struct RewriterState { NetFilterState parent_obj; NetQueue *incoming_queue; /* hashtable to save connection */ GHashTable *connection_track_table; bool vnet_hdr; bool failover_mode; -} RewriterState; +}; static void filter_rewriter_failover_mode(RewriterState *s) { diff --git a/scsi/pr-manager-helper.c b/scsi/pr-manager-helper.c index 466f11f4c8..4fb64e387d 100644 --- a/scsi/pr-manager-helper.c +++ b/scsi/pr-manager-helper.c @@ -21,16 +21,18 @@ #include "qemu/module.h" #include +#include "qom/object.h" #define PR_MAX_RECONNECT_ATTEMPTS 5 #define TYPE_PR_MANAGER_HELPER "pr-manager-helper" +typedef struct PRManagerHelper PRManagerHelper; #define PR_MANAGER_HELPER(obj) \ OBJECT_CHECK(PRManagerHelper, (obj), \ TYPE_PR_MANAGER_HELPER) -typedef struct PRManagerHelper { +struct PRManagerHelper { /* */ PRManager parent; @@ -38,7 +40,7 @@ typedef struct PRManagerHelper { QemuMutex lock; QIOChannel *ioc; -} PRManagerHelper; +}; static void pr_manager_send_status_changed_event(PRManagerHelper *pr_mgr) { diff --git a/target/i386/sev.c b/target/i386/sev.c index 404762b68f..8f9afa5aa1 100644 --- a/target/i386/sev.c +++ b/target/i386/sev.c @@ -28,12 +28,13 @@ #include "sysemu/runstate.h" #include "trace.h" #include "migration/blocker.h" +#include "qom/object.h" #define TYPE_SEV_GUEST "sev-guest" +typedef struct SevGuestState SevGuestState; #define SEV_GUEST(obj) \ OBJECT_CHECK(SevGuestState, (obj), TYPE_SEV_GUEST) -typedef struct SevGuestState SevGuestState; /** * SevGuestState: diff --git a/tests/check-qom-interface.c b/tests/check-qom-interface.c index 2177f0dce5..bfa9ad5d19 100644 --- a/tests/check-qom-interface.c +++ b/tests/check-qom-interface.c @@ -16,6 +16,7 @@ #define TYPE_TEST_IF "test-interface" +typedef struct TestIfClass TestIfClass; #define TEST_IF_CLASS(klass) \ OBJECT_CLASS_CHECK(TestIfClass, (klass), TYPE_TEST_IF) #define TEST_IF_GET_CLASS(obj) \ @@ -25,11 +26,11 @@ typedef struct TestIf TestIf; -typedef struct TestIfClass { +struct TestIfClass { InterfaceClass parent_class; uint32_t test; -} TestIfClass; +}; static const TypeInfo test_if_info = { .name = TYPE_TEST_IF, diff --git a/tests/test-qdev-global-props.c b/tests/test-qdev-global-props.c index 1e6b0f33ff..c3e210a9ef 100644 --- a/tests/test-qdev-global-props.c +++ b/tests/test-qdev-global-props.c @@ -31,6 +31,7 @@ #define TYPE_STATIC_PROPS "static_prop_type" +typedef struct MyType MyType; #define STATIC_TYPE(obj) \ OBJECT_CHECK(MyType, (obj), TYPE_STATIC_PROPS) @@ -38,12 +39,12 @@ #define PROP_DEFAULT 100 -typedef struct MyType { +struct MyType { DeviceState parent_obj; uint32_t prop1; uint32_t prop2; -} MyType; +}; static Property static_props[] = { DEFINE_PROP_UINT32("prop1", MyType, prop1, PROP_DEFAULT), diff --git a/ui/console.c b/ui/console.c index ae54bf6c1a..b9072bdaf9 100644 --- a/ui/console.c +++ b/ui/console.c @@ -34,6 +34,7 @@ #include "trace.h" #include "exec/memory.h" #include "io/channel-file.h" +#include "qom/object.h" #define DEFAULT_BACKSCROLL 512 #define CONSOLE_CURSOR_PERIOD 500 @@ -1082,10 +1083,11 @@ void console_select(unsigned int index) } } -typedef struct VCChardev { +struct VCChardev { Chardev parent; QemuConsole *console; -} VCChardev; +}; +typedef struct VCChardev VCChardev; #define TYPE_CHARDEV_VC "chardev-vc" #define VC_CHARDEV(obj) OBJECT_CHECK(VCChardev, (obj), TYPE_CHARDEV_VC) diff --git a/ui/gtk.c b/ui/gtk.c index b0cc08ad6d..558c63dc22 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -171,11 +171,12 @@ struct GtkDisplayState { DisplayOptions *opts; }; -typedef struct VCChardev { +struct VCChardev { Chardev parent; VirtualConsole *console; bool echo; -} VCChardev; +}; +typedef struct VCChardev VCChardev; #define TYPE_CHARDEV_VC "chardev-vc" #define VC_CHARDEV(obj) OBJECT_CHECK(VCChardev, (obj), TYPE_CHARDEV_VC) diff --git a/ui/input-barrier.c b/ui/input-barrier.c index 2082f5dd1e..52208e5658 100644 --- a/ui/input-barrier.c +++ b/ui/input-barrier.c @@ -13,12 +13,15 @@ #include "qom/object_interfaces.h" #include "io/channel-socket.h" #include "ui/input.h" +#include "qom/object.h" #include "ui/vnc_keysym.h" /* use name2keysym from VNC as we use X11 values */ #include "qemu/cutils.h" #include "qapi/qmp/qerror.h" #include "input-barrier.h" #define TYPE_INPUT_BARRIER "input-barrier" +typedef struct InputBarrier InputBarrier; +typedef struct InputBarrierClass InputBarrierClass; #define INPUT_BARRIER(obj) \ OBJECT_CHECK(InputBarrier, (obj), TYPE_INPUT_BARRIER) #define INPUT_BARRIER_GET_CLASS(obj) \ @@ -26,8 +29,6 @@ #define INPUT_BARRIER_CLASS(klass) \ OBJECT_CLASS_CHECK(InputBarrierClass, (klass), TYPE_INPUT_BARRIER) -typedef struct InputBarrier InputBarrier; -typedef struct InputBarrierClass InputBarrierClass; #define MAX_HELLO_LENGTH 1024 diff --git a/ui/input-linux.c b/ui/input-linux.c index 3709800898..9e5688e3f6 100644 --- a/ui/input-linux.c +++ b/ui/input-linux.c @@ -17,6 +17,7 @@ #include #include "standard-headers/linux/input.h" +#include "qom/object.h" static bool linux_is_button(unsigned int lnx) { @@ -30,6 +31,8 @@ static bool linux_is_button(unsigned int lnx) } #define TYPE_INPUT_LINUX "input-linux" +typedef struct InputLinux InputLinux; +typedef struct InputLinuxClass InputLinuxClass; #define INPUT_LINUX(obj) \ OBJECT_CHECK(InputLinux, (obj), TYPE_INPUT_LINUX) #define INPUT_LINUX_GET_CLASS(obj) \ @@ -37,8 +40,6 @@ static bool linux_is_button(unsigned int lnx) #define INPUT_LINUX_CLASS(klass) \ OBJECT_CLASS_CHECK(InputLinuxClass, (klass), TYPE_INPUT_LINUX) -typedef struct InputLinux InputLinux; -typedef struct InputLinuxClass InputLinuxClass; struct InputLinux { Object parent; diff --git a/ui/spice-app.c b/ui/spice-app.c index 40fb2ef573..d68a35c3b1 100644 --- a/ui/spice-app.c +++ b/ui/spice-app.c @@ -35,14 +35,16 @@ #include "io/channel-command.h" #include "chardev/spice.h" #include "sysemu/sysemu.h" +#include "qom/object.h" static const char *tmp_dir; static char *app_dir; static char *sock_path; -typedef struct VCChardev { +struct VCChardev { SpiceChardev parent; -} VCChardev; +}; +typedef struct VCChardev VCChardev; #define TYPE_CHARDEV_VC "chardev-vc" #define VC_CHARDEV(obj) OBJECT_CHECK(VCChardev, (obj), TYPE_CHARDEV_VC) From patchwork Thu Aug 20 00:12:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276003 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 914D6C433E1 for ; Thu, 20 Aug 2020 00:41:24 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2899D2078D for ; Thu, 20 Aug 2020 00:41:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="FMo7NBap" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2899D2078D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:47354 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8Ydv-0005YB-BF for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:41:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50048) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YEC-0000by-Nv for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:48 -0400 Received: from us-smtp-1.mimecast.com ([205.139.110.61]:32110 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YE7-0002Xl-O9 for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882483; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VYqBhwlZiXEKkHOCEOPtP9PvNxdfpIfcLK3xdeadlqA=; b=FMo7NBapIQyeDfZ7PRaQoxOoZBqwFBIYeJ0D7TFb/7o+6W8tDtta/vH8gMNDbau35cfhiI 3wm3vXX0YZYUG4/Ucet0IYa8bA/BJw8rcKtM0ZAoUTw1Is25fQ9XbJGONiYbAtP1muJmLY Pjr2fa3/l175kZ6DQbr3M179tvMXd1A= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-344-BWprJG-qONm44EpWKBSIJA-1; Wed, 19 Aug 2020 20:14:40 -0400 X-MC-Unique: BWprJG-qONm44EpWKBSIJA-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B69882FD02 for ; Thu, 20 Aug 2020 00:14:39 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5712360BEC; Thu, 20 Aug 2020 00:14:39 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 55/58] [automated] Use OBJECT_DECLARE_TYPE where possible Date: Wed, 19 Aug 2020 20:12:33 -0400 Message-Id: <20200820001236.1284548-56-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 18:27:43 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Replace DECLARE_OBJ_CHECKERS with OBJECT_DECLARE_TYPE where the typedefs can be safely removed. Generated running: $ ./scripts/codeconverter/converter.py -i \ --pattern=DeclareObjCheckers $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: * Script re-run after typedefs and macros were moved, and now the patch also touches: - TYPE_ARM_SSE - TYPE_SD_BUS --- hw/audio/intel-hda.h | 6 ++---- hw/display/virtio-vga.h | 6 ++---- include/authz/base.h | 6 ++---- include/authz/list.h | 6 ++---- include/authz/listfile.h | 6 ++---- include/authz/pamacct.h | 6 ++---- include/authz/simple.h | 6 ++---- include/crypto/secret_common.h | 6 ++---- include/crypto/secret_keyring.h | 6 ++---- include/hw/arm/armsse.h | 6 ++---- include/hw/hyperv/vmbus.h | 6 ++---- include/hw/i2c/i2c.h | 6 ++---- include/hw/i2c/smbus_slave.h | 6 ++---- include/hw/ipack/ipack.h | 6 ++---- include/hw/ipmi/ipmi.h | 6 ++---- include/hw/mem/pc-dimm.h | 6 ++---- include/hw/ppc/pnv.h | 6 ++---- include/hw/ppc/pnv_core.h | 6 ++---- include/hw/ppc/pnv_homer.h | 6 ++---- include/hw/ppc/pnv_occ.h | 6 ++---- include/hw/ppc/pnv_psi.h | 6 ++---- include/hw/ppc/pnv_xive.h | 6 ++---- include/hw/ppc/spapr_cpu_core.h | 6 ++---- include/hw/ppc/spapr_drc.h | 6 ++---- include/hw/ppc/spapr_vio.h | 6 ++---- include/hw/ppc/spapr_xive.h | 6 ++---- include/hw/ppc/xics.h | 6 ++---- include/hw/ppc/xive.h | 6 ++---- include/hw/s390x/event-facility.h | 6 ++---- include/hw/s390x/s390_flic.h | 6 ++---- include/hw/s390x/sclp.h | 6 ++---- include/hw/sd/sd.h | 6 ++---- include/hw/ssi/ssi.h | 6 ++---- include/hw/sysbus.h | 6 ++---- include/hw/virtio/virtio-gpu.h | 6 ++---- include/hw/virtio/virtio-input.h | 6 ++---- include/hw/virtio/virtio-mem.h | 6 ++---- include/hw/virtio/virtio-pmem.h | 6 ++---- include/hw/virtio/virtio-serial.h | 6 ++---- include/hw/xen/xen-bus.h | 6 ++---- include/io/channel.h | 6 ++---- include/io/dns-resolver.h | 6 ++---- include/io/net-listener.h | 6 ++---- include/scsi/pr-manager.h | 6 ++---- include/sysemu/cryptodev.h | 6 ++---- include/sysemu/hostmem.h | 6 ++---- include/sysemu/rng.h | 6 ++---- include/sysemu/tpm_backend.h | 6 ++---- include/sysemu/vhost-user-backend.h | 6 ++---- target/alpha/cpu-qom.h | 6 ++---- target/arm/cpu-qom.h | 6 ++---- target/avr/cpu-qom.h | 6 ++---- target/cris/cpu-qom.h | 6 ++---- target/hppa/cpu-qom.h | 6 ++---- target/i386/cpu-qom.h | 6 ++---- target/lm32/cpu-qom.h | 6 ++---- target/m68k/cpu-qom.h | 6 ++---- target/microblaze/cpu-qom.h | 6 ++---- target/mips/cpu-qom.h | 6 ++---- target/moxie/cpu.h | 6 ++---- target/nios2/cpu.h | 6 ++---- target/openrisc/cpu.h | 6 ++---- target/ppc/cpu-qom.h | 6 ++---- target/riscv/cpu.h | 6 ++---- target/s390x/cpu-qom.h | 6 ++---- target/sh4/cpu-qom.h | 6 ++---- target/sparc/cpu-qom.h | 6 ++---- target/tilegx/cpu.h | 6 ++---- target/tricore/cpu-qom.h | 6 ++---- target/unicore32/cpu-qom.h | 6 ++---- target/xtensa/cpu-qom.h | 6 ++---- backends/dbus-vmstate.c | 6 ++---- ui/input-barrier.c | 6 ++---- ui/input-linux.c | 6 ++---- 74 files changed, 148 insertions(+), 296 deletions(-) diff --git a/hw/audio/intel-hda.h b/hw/audio/intel-hda.h index 813a7a357d..f5cce18fa3 100644 --- a/hw/audio/intel-hda.h +++ b/hw/audio/intel-hda.h @@ -8,10 +8,8 @@ /* hda bus */ #define TYPE_HDA_CODEC_DEVICE "hda-codec" -typedef struct HDACodecDevice HDACodecDevice; -typedef struct HDACodecDeviceClass HDACodecDeviceClass; -DECLARE_OBJ_CHECKERS(HDACodecDevice, HDACodecDeviceClass, - HDA_CODEC_DEVICE, TYPE_HDA_CODEC_DEVICE) +OBJECT_DECLARE_TYPE(HDACodecDevice, HDACodecDeviceClass, + hda_codec_device, HDA_CODEC_DEVICE) #define TYPE_HDA_BUS "HDA" typedef struct HDACodecBus HDACodecBus; diff --git a/hw/display/virtio-vga.h b/hw/display/virtio-vga.h index 19f8af7356..5c5671c9c1 100644 --- a/hw/display/virtio-vga.h +++ b/hw/display/virtio-vga.h @@ -9,10 +9,8 @@ * virtio-vga-base: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_VGA_BASE "virtio-vga-base" -typedef struct VirtIOVGABase VirtIOVGABase; -typedef struct VirtIOVGABaseClass VirtIOVGABaseClass; -DECLARE_OBJ_CHECKERS(VirtIOVGABase, VirtIOVGABaseClass, - VIRTIO_VGA_BASE, TYPE_VIRTIO_VGA_BASE) +OBJECT_DECLARE_TYPE(VirtIOVGABase, VirtIOVGABaseClass, + virtio_vga_base, VIRTIO_VGA_BASE) struct VirtIOVGABase { VirtIOPCIProxy parent_obj; diff --git a/include/authz/base.h b/include/authz/base.h index 8d8cf9fa5a..06b5e29f6f 100644 --- a/include/authz/base.h +++ b/include/authz/base.h @@ -27,10 +27,8 @@ #define TYPE_QAUTHZ "authz" -typedef struct QAuthZ QAuthZ; -typedef struct QAuthZClass QAuthZClass; -DECLARE_OBJ_CHECKERS(QAuthZ, QAuthZClass, - QAUTHZ, TYPE_QAUTHZ) +OBJECT_DECLARE_TYPE(QAuthZ, QAuthZClass, + qauthz, QAUTHZ) /** diff --git a/include/authz/list.h b/include/authz/list.h index 93d16876bc..e4e1040472 100644 --- a/include/authz/list.h +++ b/include/authz/list.h @@ -27,10 +27,8 @@ #define TYPE_QAUTHZ_LIST "authz-list" -typedef struct QAuthZList QAuthZList; -typedef struct QAuthZListClass QAuthZListClass; -DECLARE_OBJ_CHECKERS(QAuthZList, QAuthZListClass, - QAUTHZ_LIST, TYPE_QAUTHZ_LIST) +OBJECT_DECLARE_TYPE(QAuthZList, QAuthZListClass, + qauthz_list, QAUTHZ_LIST) diff --git a/include/authz/listfile.h b/include/authz/listfile.h index 2e4a629b6d..89c5eafbfa 100644 --- a/include/authz/listfile.h +++ b/include/authz/listfile.h @@ -27,10 +27,8 @@ #define TYPE_QAUTHZ_LIST_FILE "authz-list-file" -typedef struct QAuthZListFile QAuthZListFile; -typedef struct QAuthZListFileClass QAuthZListFileClass; -DECLARE_OBJ_CHECKERS(QAuthZListFile, QAuthZListFileClass, - QAUTHZ_LIST_FILE, TYPE_QAUTHZ_LIST_FILE) +OBJECT_DECLARE_TYPE(QAuthZListFile, QAuthZListFileClass, + qauthz_list_file, QAUTHZ_LIST_FILE) diff --git a/include/authz/pamacct.h b/include/authz/pamacct.h index 98454ddc25..44bb5ff28d 100644 --- a/include/authz/pamacct.h +++ b/include/authz/pamacct.h @@ -27,10 +27,8 @@ #define TYPE_QAUTHZ_PAM "authz-pam" -typedef struct QAuthZPAM QAuthZPAM; -typedef struct QAuthZPAMClass QAuthZPAMClass; -DECLARE_OBJ_CHECKERS(QAuthZPAM, QAuthZPAMClass, - QAUTHZ_PAM, TYPE_QAUTHZ_PAM) +OBJECT_DECLARE_TYPE(QAuthZPAM, QAuthZPAMClass, + qauthz_pam, QAUTHZ_PAM) diff --git a/include/authz/simple.h b/include/authz/simple.h index 7a896fb94b..ba4a5ec5ea 100644 --- a/include/authz/simple.h +++ b/include/authz/simple.h @@ -26,10 +26,8 @@ #define TYPE_QAUTHZ_SIMPLE "authz-simple" -typedef struct QAuthZSimple QAuthZSimple; -typedef struct QAuthZSimpleClass QAuthZSimpleClass; -DECLARE_OBJ_CHECKERS(QAuthZSimple, QAuthZSimpleClass, - QAUTHZ_SIMPLE, TYPE_QAUTHZ_SIMPLE) +OBJECT_DECLARE_TYPE(QAuthZSimple, QAuthZSimpleClass, + qauthz_simple, QAUTHZ_SIMPLE) diff --git a/include/crypto/secret_common.h b/include/crypto/secret_common.h index dd3310ea5f..daf00c3b2a 100644 --- a/include/crypto/secret_common.h +++ b/include/crypto/secret_common.h @@ -25,10 +25,8 @@ #include "qom/object.h" #define TYPE_QCRYPTO_SECRET_COMMON "secret_common" -typedef struct QCryptoSecretCommon QCryptoSecretCommon; -typedef struct QCryptoSecretCommonClass QCryptoSecretCommonClass; -DECLARE_OBJ_CHECKERS(QCryptoSecretCommon, QCryptoSecretCommonClass, - QCRYPTO_SECRET_COMMON, TYPE_QCRYPTO_SECRET_COMMON) +OBJECT_DECLARE_TYPE(QCryptoSecretCommon, QCryptoSecretCommonClass, + qcrypto_secret_common, QCRYPTO_SECRET_COMMON) struct QCryptoSecretCommon { diff --git a/include/crypto/secret_keyring.h b/include/crypto/secret_keyring.h index 9875f4cbf3..cc2c7397db 100644 --- a/include/crypto/secret_keyring.h +++ b/include/crypto/secret_keyring.h @@ -26,10 +26,8 @@ #include "crypto/secret_common.h" #define TYPE_QCRYPTO_SECRET_KEYRING "secret_keyring" -typedef struct QCryptoSecretKeyring QCryptoSecretKeyring; -typedef struct QCryptoSecretKeyringClass QCryptoSecretKeyringClass; -DECLARE_OBJ_CHECKERS(QCryptoSecretKeyring, QCryptoSecretKeyringClass, - QCRYPTO_SECRET_KEYRING, TYPE_QCRYPTO_SECRET_KEYRING) +OBJECT_DECLARE_TYPE(QCryptoSecretKeyring, QCryptoSecretKeyringClass, + qcrypto_secret_keyring, QCRYPTO_SECRET_KEYRING) struct QCryptoSecretKeyring { diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 2495b52335..f82f27001a 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -108,10 +108,8 @@ #include "qom/object.h" #define TYPE_ARM_SSE "arm-sse" -typedef struct ARMSSE ARMSSE; -typedef struct ARMSSEClass ARMSSEClass; -DECLARE_OBJ_CHECKERS(ARMSSE, ARMSSEClass, - ARM_SSE, TYPE_ARM_SSE) +OBJECT_DECLARE_TYPE(ARMSSE, ARMSSEClass, + arm_sse, ARM_SSE) /* * These type names are for specific IoTKit subsystems; other than diff --git a/include/hw/hyperv/vmbus.h b/include/hw/hyperv/vmbus.h index 0fe3d3b47c..00ad8798c1 100644 --- a/include/hw/hyperv/vmbus.h +++ b/include/hw/hyperv/vmbus.h @@ -20,10 +20,8 @@ #define TYPE_VMBUS_DEVICE "vmbus-dev" -typedef struct VMBusDevice VMBusDevice; -typedef struct VMBusDeviceClass VMBusDeviceClass; -DECLARE_OBJ_CHECKERS(VMBusDevice, VMBusDeviceClass, - VMBUS_DEVICE, TYPE_VMBUS_DEVICE) +OBJECT_DECLARE_TYPE(VMBusDevice, VMBusDeviceClass, + vmbus_device, VMBUS_DEVICE) #define TYPE_VMBUS "vmbus" typedef struct VMBus VMBus; diff --git a/include/hw/i2c/i2c.h b/include/hw/i2c/i2c.h index 8afa74f42e..770051db54 100644 --- a/include/hw/i2c/i2c.h +++ b/include/hw/i2c/i2c.h @@ -16,12 +16,10 @@ enum i2c_event { I2C_NACK /* Masker NACKed a receive byte. */ }; -typedef struct I2CSlave I2CSlave; #define TYPE_I2C_SLAVE "i2c-slave" -typedef struct I2CSlaveClass I2CSlaveClass; -DECLARE_OBJ_CHECKERS(I2CSlave, I2CSlaveClass, - I2C_SLAVE, TYPE_I2C_SLAVE) +OBJECT_DECLARE_TYPE(I2CSlave, I2CSlaveClass, + i2c_slave, I2C_SLAVE) struct I2CSlaveClass { DeviceClass parent_class; diff --git a/include/hw/i2c/smbus_slave.h b/include/hw/i2c/smbus_slave.h index 8d16e4bcd9..cb9cb372f9 100644 --- a/include/hw/i2c/smbus_slave.h +++ b/include/hw/i2c/smbus_slave.h @@ -29,10 +29,8 @@ #include "qom/object.h" #define TYPE_SMBUS_DEVICE "smbus-device" -typedef struct SMBusDevice SMBusDevice; -typedef struct SMBusDeviceClass SMBusDeviceClass; -DECLARE_OBJ_CHECKERS(SMBusDevice, SMBusDeviceClass, - SMBUS_DEVICE, TYPE_SMBUS_DEVICE) +OBJECT_DECLARE_TYPE(SMBusDevice, SMBusDeviceClass, + smbus_device, SMBUS_DEVICE) struct SMBusDeviceClass { diff --git a/include/hw/ipack/ipack.h b/include/hw/ipack/ipack.h index a2304c1b3e..a59a487853 100644 --- a/include/hw/ipack/ipack.h +++ b/include/hw/ipack/ipack.h @@ -30,12 +30,10 @@ struct IPackBus { qemu_irq_handler set_irq; }; -typedef struct IPackDevice IPackDevice; -typedef struct IPackDeviceClass IPackDeviceClass; #define TYPE_IPACK_DEVICE "ipack-device" -DECLARE_OBJ_CHECKERS(IPackDevice, IPackDeviceClass, - IPACK_DEVICE, TYPE_IPACK_DEVICE) +OBJECT_DECLARE_TYPE(IPackDevice, IPackDeviceClass, + ipack_device, IPACK_DEVICE) struct IPackDeviceClass { /*< private >*/ diff --git a/include/hw/ipmi/ipmi.h b/include/hw/ipmi/ipmi.h index d2ed0a9fc4..9915b146f7 100644 --- a/include/hw/ipmi/ipmi.h +++ b/include/hw/ipmi/ipmi.h @@ -175,10 +175,8 @@ struct IPMIInterfaceClass { * Define a BMC simulator (or perhaps a connection to a real BMC) */ #define TYPE_IPMI_BMC "ipmi-bmc" -typedef struct IPMIBmc IPMIBmc; -typedef struct IPMIBmcClass IPMIBmcClass; -DECLARE_OBJ_CHECKERS(IPMIBmc, IPMIBmcClass, - IPMI_BMC, TYPE_IPMI_BMC) +OBJECT_DECLARE_TYPE(IPMIBmc, IPMIBmcClass, + ipmi_bmc, IPMI_BMC) struct IPMIBmc { DeviceState parent; diff --git a/include/hw/mem/pc-dimm.h b/include/hw/mem/pc-dimm.h index 86e3010243..1d570defc9 100644 --- a/include/hw/mem/pc-dimm.h +++ b/include/hw/mem/pc-dimm.h @@ -21,10 +21,8 @@ #include "qom/object.h" #define TYPE_PC_DIMM "pc-dimm" -typedef struct PCDIMMDevice PCDIMMDevice; -typedef struct PCDIMMDeviceClass PCDIMMDeviceClass; -DECLARE_OBJ_CHECKERS(PCDIMMDevice, PCDIMMDeviceClass, - PC_DIMM, TYPE_PC_DIMM) +OBJECT_DECLARE_TYPE(PCDIMMDevice, PCDIMMDeviceClass, + pc_dimm, PC_DIMM) #define PC_DIMM_ADDR_PROP "addr" #define PC_DIMM_SLOT_PROP "slot" diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index f3bacb6a5c..b4b2b24d80 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -35,10 +35,8 @@ #include "qom/object.h" #define TYPE_PNV_CHIP "pnv-chip" -typedef struct PnvChip PnvChip; -typedef struct PnvChipClass PnvChipClass; -DECLARE_OBJ_CHECKERS(PnvChip, PnvChipClass, - PNV_CHIP, TYPE_PNV_CHIP) +OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass, + pnv_chip, PNV_CHIP) struct PnvChip { /*< private >*/ diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h index fd17a236e3..5cb22c2fa9 100644 --- a/include/hw/ppc/pnv_core.h +++ b/include/hw/ppc/pnv_core.h @@ -25,10 +25,8 @@ #include "qom/object.h" #define TYPE_PNV_CORE "powernv-cpu-core" -typedef struct PnvCore PnvCore; -typedef struct PnvCoreClass PnvCoreClass; -DECLARE_OBJ_CHECKERS(PnvCore, PnvCoreClass, - PNV_CORE, TYPE_PNV_CORE) +OBJECT_DECLARE_TYPE(PnvCore, PnvCoreClass, + pnv_core, PNV_CORE) typedef struct PnvChip PnvChip; diff --git a/include/hw/ppc/pnv_homer.h b/include/hw/ppc/pnv_homer.h index 7aadcab03c..0978812713 100644 --- a/include/hw/ppc/pnv_homer.h +++ b/include/hw/ppc/pnv_homer.h @@ -24,10 +24,8 @@ #include "qom/object.h" #define TYPE_PNV_HOMER "pnv-homer" -typedef struct PnvHomer PnvHomer; -typedef struct PnvHomerClass PnvHomerClass; -DECLARE_OBJ_CHECKERS(PnvHomer, PnvHomerClass, - PNV_HOMER, TYPE_PNV_HOMER) +OBJECT_DECLARE_TYPE(PnvHomer, PnvHomerClass, + pnv_homer, PNV_HOMER) #define TYPE_PNV8_HOMER TYPE_PNV_HOMER "-POWER8" DECLARE_INSTANCE_CHECKER(PnvHomer, PNV8_HOMER, TYPE_PNV8_HOMER) diff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h index 4fcfb32417..b79e3440be 100644 --- a/include/hw/ppc/pnv_occ.h +++ b/include/hw/ppc/pnv_occ.h @@ -24,10 +24,8 @@ #include "qom/object.h" #define TYPE_PNV_OCC "pnv-occ" -typedef struct PnvOCC PnvOCC; -typedef struct PnvOCCClass PnvOCCClass; -DECLARE_OBJ_CHECKERS(PnvOCC, PnvOCCClass, - PNV_OCC, TYPE_PNV_OCC) +OBJECT_DECLARE_TYPE(PnvOCC, PnvOCCClass, + pnv_occ, PNV_OCC) #define TYPE_PNV8_OCC TYPE_PNV_OCC "-POWER8" DECLARE_INSTANCE_CHECKER(PnvOCC, PNV8_OCC, TYPE_PNV8_OCC) diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h index a33195df17..0034db44c3 100644 --- a/include/hw/ppc/pnv_psi.h +++ b/include/hw/ppc/pnv_psi.h @@ -26,10 +26,8 @@ #include "qom/object.h" #define TYPE_PNV_PSI "pnv-psi" -typedef struct PnvPsi PnvPsi; -typedef struct PnvPsiClass PnvPsiClass; -DECLARE_OBJ_CHECKERS(PnvPsi, PnvPsiClass, - PNV_PSI, TYPE_PNV_PSI) +OBJECT_DECLARE_TYPE(PnvPsi, PnvPsiClass, + pnv_psi, PNV_PSI) #define PSIHB_XSCOM_MAX 0x20 diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h index a014e2a726..29d5debd1c 100644 --- a/include/hw/ppc/pnv_xive.h +++ b/include/hw/ppc/pnv_xive.h @@ -16,10 +16,8 @@ struct PnvChip; #define TYPE_PNV_XIVE "pnv-xive" -typedef struct PnvXive PnvXive; -typedef struct PnvXiveClass PnvXiveClass; -DECLARE_OBJ_CHECKERS(PnvXive, PnvXiveClass, - PNV_XIVE, TYPE_PNV_XIVE) +OBJECT_DECLARE_TYPE(PnvXive, PnvXiveClass, + pnv_xive, PNV_XIVE) #define XIVE_BLOCK_MAX 16 diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h index fba6a01050..4022917168 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -16,10 +16,8 @@ #include "qom/object.h" #define TYPE_SPAPR_CPU_CORE "spapr-cpu-core" -typedef struct SpaprCpuCore SpaprCpuCore; -typedef struct SpaprCpuCoreClass SpaprCpuCoreClass; -DECLARE_OBJ_CHECKERS(SpaprCpuCore, SpaprCpuCoreClass, - SPAPR_CPU_CORE, TYPE_SPAPR_CPU_CORE) +OBJECT_DECLARE_TYPE(SpaprCpuCore, SpaprCpuCoreClass, + spapr_cpu_core, SPAPR_CPU_CORE) #define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE diff --git a/include/hw/ppc/spapr_drc.h b/include/hw/ppc/spapr_drc.h index 2236aea66a..6daafa8106 100644 --- a/include/hw/ppc/spapr_drc.h +++ b/include/hw/ppc/spapr_drc.h @@ -20,10 +20,8 @@ #include "qapi/error.h" #define TYPE_SPAPR_DR_CONNECTOR "spapr-dr-connector" -typedef struct SpaprDrc SpaprDrc; -typedef struct SpaprDrcClass SpaprDrcClass; -DECLARE_OBJ_CHECKERS(SpaprDrc, SpaprDrcClass, - SPAPR_DR_CONNECTOR, TYPE_SPAPR_DR_CONNECTOR) +OBJECT_DECLARE_TYPE(SpaprDrc, SpaprDrcClass, + spapr_dr_connector, SPAPR_DR_CONNECTOR) #define TYPE_SPAPR_DRC_PHYSICAL "spapr-drc-physical" typedef struct SpaprDrcPhysical SpaprDrcPhysical; diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h index e289028634..6c40da72ff 100644 --- a/include/hw/ppc/spapr_vio.h +++ b/include/hw/ppc/spapr_vio.h @@ -28,10 +28,8 @@ #include "qom/object.h" #define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device" -typedef struct SpaprVioDevice SpaprVioDevice; -typedef struct SpaprVioDeviceClass SpaprVioDeviceClass; -DECLARE_OBJ_CHECKERS(SpaprVioDevice, SpaprVioDeviceClass, - VIO_SPAPR_DEVICE, TYPE_VIO_SPAPR_DEVICE) +OBJECT_DECLARE_TYPE(SpaprVioDevice, SpaprVioDeviceClass, + vio_spapr_device, VIO_SPAPR_DEVICE) #define TYPE_SPAPR_VIO_BUS "spapr-vio-bus" typedef struct SpaprVioBus SpaprVioBus; diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index 747b47ffc8..29e53646af 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -15,10 +15,8 @@ #include "qom/object.h" #define TYPE_SPAPR_XIVE "spapr-xive" -typedef struct SpaprXive SpaprXive; -typedef struct SpaprXiveClass SpaprXiveClass; -DECLARE_OBJ_CHECKERS(SpaprXive, SpaprXiveClass, - SPAPR_XIVE, TYPE_SPAPR_XIVE) +OBJECT_DECLARE_TYPE(SpaprXive, SpaprXiveClass, + spapr_xive, SPAPR_XIVE) struct SpaprXive { XiveRouter parent; diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index bcb584b90d..c5a3cdcadc 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -41,8 +41,6 @@ * (the kernel implementation supports more but we don't exploit * that yet) */ -typedef struct ICPStateClass ICPStateClass; -typedef struct ICPState ICPState; typedef struct PnvICPState PnvICPState; typedef struct ICSStateClass ICSStateClass; typedef struct ICSState ICSState; @@ -50,8 +48,8 @@ typedef struct ICSIRQState ICSIRQState; typedef struct XICSFabric XICSFabric; #define TYPE_ICP "icp" -DECLARE_OBJ_CHECKERS(ICPState, ICPStateClass, - ICP, TYPE_ICP) +OBJECT_DECLARE_TYPE(ICPState, ICPStateClass, + icp, ICP) #define TYPE_PNV_ICP "pnv-icp" DECLARE_INSTANCE_CHECKER(PnvICPState, PNV_ICP, diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index fe894fb145..9e67d58bf7 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -339,12 +339,10 @@ struct XiveRouter { XiveFabric *xfb; }; -typedef struct XiveRouter XiveRouter; #define TYPE_XIVE_ROUTER "xive-router" -typedef struct XiveRouterClass XiveRouterClass; -DECLARE_OBJ_CHECKERS(XiveRouter, XiveRouterClass, - XIVE_ROUTER, TYPE_XIVE_ROUTER) +OBJECT_DECLARE_TYPE(XiveRouter, XiveRouterClass, + xive_router, XIVE_ROUTER) struct XiveRouterClass { SysBusDeviceClass parent; diff --git a/include/hw/s390x/event-facility.h b/include/hw/s390x/event-facility.h index eccf6e924b..051c1c6576 100644 --- a/include/hw/s390x/event-facility.h +++ b/include/hw/s390x/event-facility.h @@ -42,10 +42,8 @@ #define SCLP_SELECTIVE_READ 0x01 #define TYPE_SCLP_EVENT "s390-sclp-event-type" -typedef struct SCLPEvent SCLPEvent; -typedef struct SCLPEventClass SCLPEventClass; -DECLARE_OBJ_CHECKERS(SCLPEvent, SCLPEventClass, - SCLP_EVENT, TYPE_SCLP_EVENT) +OBJECT_DECLARE_TYPE(SCLPEvent, SCLPEventClass, + sclp_event, SCLP_EVENT) #define TYPE_SCLP_CPU_HOTPLUG "sclp-cpu-hotplug" #define TYPE_SCLP_QUIESCE "sclpquiesce" diff --git a/include/hw/s390x/s390_flic.h b/include/hw/s390x/s390_flic.h index a6a123598d..4b718c8ebf 100644 --- a/include/hw/s390x/s390_flic.h +++ b/include/hw/s390x/s390_flic.h @@ -39,10 +39,8 @@ extern const VMStateDescription vmstate_adapter_routes; VMSTATE_STRUCT(_f, _s, 1, vmstate_adapter_routes, AdapterRoutes) #define TYPE_S390_FLIC_COMMON "s390-flic" -typedef struct S390FLICState S390FLICState; -typedef struct S390FLICStateClass S390FLICStateClass; -DECLARE_OBJ_CHECKERS(S390FLICState, S390FLICStateClass, - S390_FLIC_COMMON, TYPE_S390_FLIC_COMMON) +OBJECT_DECLARE_TYPE(S390FLICState, S390FLICStateClass, + s390_flic_common, S390_FLIC_COMMON) struct S390FLICState { SysBusDevice parent_obj; diff --git a/include/hw/s390x/sclp.h b/include/hw/s390x/sclp.h index 5038a45612..e9f0f7e67c 100644 --- a/include/hw/s390x/sclp.h +++ b/include/hw/s390x/sclp.h @@ -182,10 +182,8 @@ typedef struct SCCB { } QEMU_PACKED SCCB; #define TYPE_SCLP "sclp" -typedef struct SCLPDevice SCLPDevice; -typedef struct SCLPDeviceClass SCLPDeviceClass; -DECLARE_OBJ_CHECKERS(SCLPDevice, SCLPDeviceClass, - SCLP, TYPE_SCLP) +OBJECT_DECLARE_TYPE(SCLPDevice, SCLPDeviceClass, + sclp, SCLP) struct SCLPEventFacility; diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h index b7e404b665..e9534c50da 100644 --- a/include/hw/sd/sd.h +++ b/include/hw/sd/sd.h @@ -90,7 +90,6 @@ typedef struct { } SDRequest; typedef struct SDState SDState; -typedef struct SDBus SDBus; #define TYPE_SD_CARD "sd-card" typedef struct SDCardClass SDCardClass; @@ -115,9 +114,8 @@ struct SDCardClass { }; #define TYPE_SD_BUS "sd-bus" -typedef struct SDBusClass SDBusClass; -DECLARE_OBJ_CHECKERS(SDBus, SDBusClass, - SD_BUS, TYPE_SD_BUS) +OBJECT_DECLARE_TYPE(SDBus, SDBusClass, + sd_bus, SD_BUS) struct SDBus { BusState qbus; diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h index b9286989fc..4fe1d85136 100644 --- a/include/hw/ssi/ssi.h +++ b/include/hw/ssi/ssi.h @@ -14,13 +14,11 @@ #include "hw/qdev-core.h" #include "qom/object.h" -typedef struct SSISlave SSISlave; -typedef struct SSISlaveClass SSISlaveClass; typedef enum SSICSMode SSICSMode; #define TYPE_SSI_SLAVE "ssi-slave" -DECLARE_OBJ_CHECKERS(SSISlave, SSISlaveClass, - SSI_SLAVE, TYPE_SSI_SLAVE) +OBJECT_DECLARE_TYPE(SSISlave, SSISlaveClass, + ssi_slave, SSI_SLAVE) #define SSI_GPIO_CS "ssi-gpio-cs" diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index 77e21bba18..28a9b0f634 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -14,12 +14,10 @@ DECLARE_INSTANCE_CHECKER(BusState, SYSTEM_BUS, TYPE_SYSTEM_BUS) -typedef struct SysBusDevice SysBusDevice; #define TYPE_SYS_BUS_DEVICE "sys-bus-device" -typedef struct SysBusDeviceClass SysBusDeviceClass; -DECLARE_OBJ_CHECKERS(SysBusDevice, SysBusDeviceClass, - SYS_BUS_DEVICE, TYPE_SYS_BUS_DEVICE) +OBJECT_DECLARE_TYPE(SysBusDevice, SysBusDeviceClass, + sys_bus_device, SYS_BUS_DEVICE) /** * SysBusDeviceClass: diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 72f8689e2e..f334b78085 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -25,10 +25,8 @@ #include "qom/object.h" #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base" -typedef struct VirtIOGPUBase VirtIOGPUBase; -typedef struct VirtIOGPUBaseClass VirtIOGPUBaseClass; -DECLARE_OBJ_CHECKERS(VirtIOGPUBase, VirtIOGPUBaseClass, - VIRTIO_GPU_BASE, TYPE_VIRTIO_GPU_BASE) +OBJECT_DECLARE_TYPE(VirtIOGPUBase, VirtIOGPUBaseClass, + virtio_gpu_base, VIRTIO_GPU_BASE) #define TYPE_VIRTIO_GPU "virtio-gpu-device" typedef struct VirtIOGPU VirtIOGPU; diff --git a/include/hw/virtio/virtio-input.h b/include/hw/virtio/virtio-input.h index c54aa6aa72..5eb9e7745e 100644 --- a/include/hw/virtio/virtio-input.h +++ b/include/hw/virtio/virtio-input.h @@ -19,10 +19,8 @@ typedef struct virtio_input_event virtio_input_event; /* qemu internals */ #define TYPE_VIRTIO_INPUT "virtio-input-device" -typedef struct VirtIOInput VirtIOInput; -typedef struct VirtIOInputClass VirtIOInputClass; -DECLARE_OBJ_CHECKERS(VirtIOInput, VirtIOInputClass, - VIRTIO_INPUT, TYPE_VIRTIO_INPUT) +OBJECT_DECLARE_TYPE(VirtIOInput, VirtIOInputClass, + virtio_input, VIRTIO_INPUT) #define VIRTIO_INPUT_GET_PARENT_CLASS(obj) \ OBJECT_GET_PARENT_CLASS(obj, TYPE_VIRTIO_INPUT) diff --git a/include/hw/virtio/virtio-mem.h b/include/hw/virtio/virtio-mem.h index 5f0b81a967..dfc72e14b1 100644 --- a/include/hw/virtio/virtio-mem.h +++ b/include/hw/virtio/virtio-mem.h @@ -21,10 +21,8 @@ #define TYPE_VIRTIO_MEM "virtio-mem" -typedef struct VirtIOMEM VirtIOMEM; -typedef struct VirtIOMEMClass VirtIOMEMClass; -DECLARE_OBJ_CHECKERS(VirtIOMEM, VirtIOMEMClass, - VIRTIO_MEM, TYPE_VIRTIO_MEM) +OBJECT_DECLARE_TYPE(VirtIOMEM, VirtIOMEMClass, + virtio_mem, VIRTIO_MEM) #define VIRTIO_MEM_MEMDEV_PROP "memdev" #define VIRTIO_MEM_NODE_PROP "node" diff --git a/include/hw/virtio/virtio-pmem.h b/include/hw/virtio/virtio-pmem.h index 6c15abad70..56df9a03ce 100644 --- a/include/hw/virtio/virtio-pmem.h +++ b/include/hw/virtio/virtio-pmem.h @@ -20,10 +20,8 @@ #define TYPE_VIRTIO_PMEM "virtio-pmem" -typedef struct VirtIOPMEM VirtIOPMEM; -typedef struct VirtIOPMEMClass VirtIOPMEMClass; -DECLARE_OBJ_CHECKERS(VirtIOPMEM, VirtIOPMEMClass, - VIRTIO_PMEM, TYPE_VIRTIO_PMEM) +OBJECT_DECLARE_TYPE(VirtIOPMEM, VirtIOPMEMClass, + virtio_pmem, VIRTIO_PMEM) #define VIRTIO_PMEM_ADDR_PROP "memaddr" #define VIRTIO_PMEM_MEMDEV_PROP "memdev" diff --git a/include/hw/virtio/virtio-serial.h b/include/hw/virtio/virtio-serial.h index bbc76d5032..0b7f963611 100644 --- a/include/hw/virtio/virtio-serial.h +++ b/include/hw/virtio/virtio-serial.h @@ -26,10 +26,8 @@ struct virtio_serial_conf { }; #define TYPE_VIRTIO_SERIAL_PORT "virtio-serial-port" -typedef struct VirtIOSerialPort VirtIOSerialPort; -typedef struct VirtIOSerialPortClass VirtIOSerialPortClass; -DECLARE_OBJ_CHECKERS(VirtIOSerialPort, VirtIOSerialPortClass, - VIRTIO_SERIAL_PORT, TYPE_VIRTIO_SERIAL_PORT) +OBJECT_DECLARE_TYPE(VirtIOSerialPort, VirtIOSerialPortClass, + virtio_serial_port, VIRTIO_SERIAL_PORT) typedef struct VirtIOSerial VirtIOSerial; diff --git a/include/hw/xen/xen-bus.h b/include/hw/xen/xen-bus.h index 35fec7c905..e0e67505b8 100644 --- a/include/hw/xen/xen-bus.h +++ b/include/hw/xen/xen-bus.h @@ -71,17 +71,15 @@ struct XenBus { XenWatch *backend_watch; QLIST_HEAD(, XenDevice) inactive_devices; }; -typedef struct XenBus XenBus; struct XenBusClass { /*< private >*/ BusClass parent_class; }; -typedef struct XenBusClass XenBusClass; #define TYPE_XEN_BUS "xen-bus" -DECLARE_OBJ_CHECKERS(XenBus, XenBusClass, - XEN_BUS, TYPE_XEN_BUS) +OBJECT_DECLARE_TYPE(XenBus, XenBusClass, + xen_bus, XEN_BUS) void xen_bus_init(void); diff --git a/include/io/channel.h b/include/io/channel.h index 3ebdc7954f..245479548a 100644 --- a/include/io/channel.h +++ b/include/io/channel.h @@ -26,10 +26,8 @@ #include "block/aio.h" #define TYPE_QIO_CHANNEL "qio-channel" -typedef struct QIOChannel QIOChannel; -typedef struct QIOChannelClass QIOChannelClass; -DECLARE_OBJ_CHECKERS(QIOChannel, QIOChannelClass, - QIO_CHANNEL, TYPE_QIO_CHANNEL) +OBJECT_DECLARE_TYPE(QIOChannel, QIOChannelClass, + qio_channel, QIO_CHANNEL) #define QIO_CHANNEL_ERR_BLOCK -2 diff --git a/include/io/dns-resolver.h b/include/io/dns-resolver.h index 96a3186b6b..8ae4857e05 100644 --- a/include/io/dns-resolver.h +++ b/include/io/dns-resolver.h @@ -26,10 +26,8 @@ #include "io/task.h" #define TYPE_QIO_DNS_RESOLVER "qio-dns-resolver" -typedef struct QIODNSResolver QIODNSResolver; -typedef struct QIODNSResolverClass QIODNSResolverClass; -DECLARE_OBJ_CHECKERS(QIODNSResolver, QIODNSResolverClass, - QIO_DNS_RESOLVER, TYPE_QIO_DNS_RESOLVER) +OBJECT_DECLARE_TYPE(QIODNSResolver, QIODNSResolverClass, + qio_dns_resolver, QIO_DNS_RESOLVER) /** diff --git a/include/io/net-listener.h b/include/io/net-listener.h index 93367db291..4f0847ff19 100644 --- a/include/io/net-listener.h +++ b/include/io/net-listener.h @@ -25,10 +25,8 @@ #include "qom/object.h" #define TYPE_QIO_NET_LISTENER "qio-net-listener" -typedef struct QIONetListener QIONetListener; -typedef struct QIONetListenerClass QIONetListenerClass; -DECLARE_OBJ_CHECKERS(QIONetListener, QIONetListenerClass, - QIO_NET_LISTENER, TYPE_QIO_NET_LISTENER) +OBJECT_DECLARE_TYPE(QIONetListener, QIONetListenerClass, + qio_net_listener, QIO_NET_LISTENER) typedef void (*QIONetListenerClientFunc)(QIONetListener *listener, diff --git a/include/scsi/pr-manager.h b/include/scsi/pr-manager.h index f801fe9533..26bd134531 100644 --- a/include/scsi/pr-manager.h +++ b/include/scsi/pr-manager.h @@ -9,10 +9,8 @@ #define TYPE_PR_MANAGER "pr-manager" -typedef struct PRManager PRManager; -typedef struct PRManagerClass PRManagerClass; -DECLARE_OBJ_CHECKERS(PRManager, PRManagerClass, - PR_MANAGER, TYPE_PR_MANAGER) +OBJECT_DECLARE_TYPE(PRManager, PRManagerClass, + pr_manager, PR_MANAGER) struct sg_io_hdr; diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h index 65c017cf81..06726f7014 100644 --- a/include/sysemu/cryptodev.h +++ b/include/sysemu/cryptodev.h @@ -37,10 +37,8 @@ #define TYPE_CRYPTODEV_BACKEND "cryptodev-backend" -typedef struct CryptoDevBackend CryptoDevBackend; -typedef struct CryptoDevBackendClass CryptoDevBackendClass; -DECLARE_OBJ_CHECKERS(CryptoDevBackend, CryptoDevBackendClass, - CRYPTODEV_BACKEND, TYPE_CRYPTODEV_BACKEND) +OBJECT_DECLARE_TYPE(CryptoDevBackend, CryptoDevBackendClass, + cryptodev_backend, CRYPTODEV_BACKEND) #define MAX_CRYPTO_QUEUE_NUM 64 diff --git a/include/sysemu/hostmem.h b/include/sysemu/hostmem.h index 1e6078f872..e5b7a152d3 100644 --- a/include/sysemu/hostmem.h +++ b/include/sysemu/hostmem.h @@ -20,10 +20,8 @@ #include "qemu/bitmap.h" #define TYPE_MEMORY_BACKEND "memory-backend" -typedef struct HostMemoryBackend HostMemoryBackend; -typedef struct HostMemoryBackendClass HostMemoryBackendClass; -DECLARE_OBJ_CHECKERS(HostMemoryBackend, HostMemoryBackendClass, - MEMORY_BACKEND, TYPE_MEMORY_BACKEND) +OBJECT_DECLARE_TYPE(HostMemoryBackend, HostMemoryBackendClass, + memory_backend, MEMORY_BACKEND) /* hostmem-ram.c */ /** diff --git a/include/sysemu/rng.h b/include/sysemu/rng.h index f8fc948109..cee45a4787 100644 --- a/include/sysemu/rng.h +++ b/include/sysemu/rng.h @@ -17,10 +17,8 @@ #include "qom/object.h" #define TYPE_RNG_BACKEND "rng-backend" -typedef struct RngBackend RngBackend; -typedef struct RngBackendClass RngBackendClass; -DECLARE_OBJ_CHECKERS(RngBackend, RngBackendClass, - RNG_BACKEND, TYPE_RNG_BACKEND) +OBJECT_DECLARE_TYPE(RngBackend, RngBackendClass, + rng_backend, RNG_BACKEND) #define TYPE_RNG_BUILTIN "rng-builtin" diff --git a/include/sysemu/tpm_backend.h b/include/sysemu/tpm_backend.h index e038b79d34..7e8a014031 100644 --- a/include/sysemu/tpm_backend.h +++ b/include/sysemu/tpm_backend.h @@ -19,10 +19,8 @@ #include "qapi/error.h" #define TYPE_TPM_BACKEND "tpm-backend" -typedef struct TPMBackend TPMBackend; -typedef struct TPMBackendClass TPMBackendClass; -DECLARE_OBJ_CHECKERS(TPMBackend, TPMBackendClass, - TPM_BACKEND, TYPE_TPM_BACKEND) +OBJECT_DECLARE_TYPE(TPMBackend, TPMBackendClass, + tpm_backend, TPM_BACKEND) typedef struct TPMBackendCmd { diff --git a/include/sysemu/vhost-user-backend.h b/include/sysemu/vhost-user-backend.h index e4c85e33c0..76ca06cf40 100644 --- a/include/sysemu/vhost-user-backend.h +++ b/include/sysemu/vhost-user-backend.h @@ -22,10 +22,8 @@ #include "io/channel.h" #define TYPE_VHOST_USER_BACKEND "vhost-user-backend" -typedef struct VhostUserBackend VhostUserBackend; -typedef struct VhostUserBackendClass VhostUserBackendClass; -DECLARE_OBJ_CHECKERS(VhostUserBackend, VhostUserBackendClass, - VHOST_USER_BACKEND, TYPE_VHOST_USER_BACKEND) +OBJECT_DECLARE_TYPE(VhostUserBackend, VhostUserBackendClass, + vhost_user_backend, VHOST_USER_BACKEND) struct VhostUserBackendClass { diff --git a/target/alpha/cpu-qom.h b/target/alpha/cpu-qom.h index 45350318c9..568fe3fb77 100644 --- a/target/alpha/cpu-qom.h +++ b/target/alpha/cpu-qom.h @@ -25,10 +25,8 @@ #define TYPE_ALPHA_CPU "alpha-cpu" -typedef struct AlphaCPU AlphaCPU; -typedef struct AlphaCPUClass AlphaCPUClass; -DECLARE_OBJ_CHECKERS(AlphaCPU, AlphaCPUClass, - ALPHA_CPU, TYPE_ALPHA_CPU) +OBJECT_DECLARE_TYPE(AlphaCPU, AlphaCPUClass, + alpha_cpu, ALPHA_CPU) /** * AlphaCPUClass: diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h index eeb1917d07..afaf04f082 100644 --- a/target/arm/cpu-qom.h +++ b/target/arm/cpu-qom.h @@ -27,10 +27,8 @@ struct arm_boot_info; #define TYPE_ARM_CPU "arm-cpu" -typedef struct ARMCPU ARMCPU; -typedef struct ARMCPUClass ARMCPUClass; -DECLARE_OBJ_CHECKERS(ARMCPU, ARMCPUClass, - ARM_CPU, TYPE_ARM_CPU) +OBJECT_DECLARE_TYPE(ARMCPU, ARMCPUClass, + arm_cpu, ARM_CPU) #define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU diff --git a/target/avr/cpu-qom.h b/target/avr/cpu-qom.h index 1bbfbb2087..49d63faad2 100644 --- a/target/avr/cpu-qom.h +++ b/target/avr/cpu-qom.h @@ -26,10 +26,8 @@ #define TYPE_AVR_CPU "avr-cpu" -typedef struct AVRCPU AVRCPU; -typedef struct AVRCPUClass AVRCPUClass; -DECLARE_OBJ_CHECKERS(AVRCPU, AVRCPUClass, - AVR_CPU, TYPE_AVR_CPU) +OBJECT_DECLARE_TYPE(AVRCPU, AVRCPUClass, + avr_cpu, AVR_CPU) /** * AVRCPUClass: diff --git a/target/cris/cpu-qom.h b/target/cris/cpu-qom.h index eced6ef7c9..2b0328113c 100644 --- a/target/cris/cpu-qom.h +++ b/target/cris/cpu-qom.h @@ -25,10 +25,8 @@ #define TYPE_CRIS_CPU "cris-cpu" -typedef struct CRISCPU CRISCPU; -typedef struct CRISCPUClass CRISCPUClass; -DECLARE_OBJ_CHECKERS(CRISCPU, CRISCPUClass, - CRIS_CPU, TYPE_CRIS_CPU) +OBJECT_DECLARE_TYPE(CRISCPU, CRISCPUClass, + cris_cpu, CRIS_CPU) /** * CRISCPUClass: diff --git a/target/hppa/cpu-qom.h b/target/hppa/cpu-qom.h index 5c5aa0c053..58158f374b 100644 --- a/target/hppa/cpu-qom.h +++ b/target/hppa/cpu-qom.h @@ -25,10 +25,8 @@ #define TYPE_HPPA_CPU "hppa-cpu" -typedef struct HPPACPU HPPACPU; -typedef struct HPPACPUClass HPPACPUClass; -DECLARE_OBJ_CHECKERS(HPPACPU, HPPACPUClass, - HPPA_CPU, TYPE_HPPA_CPU) +OBJECT_DECLARE_TYPE(HPPACPU, HPPACPUClass, + hppa_cpu, HPPA_CPU) /** * HPPACPUClass: diff --git a/target/i386/cpu-qom.h b/target/i386/cpu-qom.h index 05b52ba74c..0505472e86 100644 --- a/target/i386/cpu-qom.h +++ b/target/i386/cpu-qom.h @@ -30,10 +30,8 @@ #define TYPE_X86_CPU "i386-cpu" #endif -typedef struct X86CPU X86CPU; -typedef struct X86CPUClass X86CPUClass; -DECLARE_OBJ_CHECKERS(X86CPU, X86CPUClass, - X86_CPU, TYPE_X86_CPU) +OBJECT_DECLARE_TYPE(X86CPU, X86CPUClass, + x86_cpu, X86_CPU) typedef struct X86CPUModel X86CPUModel; diff --git a/target/lm32/cpu-qom.h b/target/lm32/cpu-qom.h index 9bf2f82ffe..e9eb495bf0 100644 --- a/target/lm32/cpu-qom.h +++ b/target/lm32/cpu-qom.h @@ -25,10 +25,8 @@ #define TYPE_LM32_CPU "lm32-cpu" -typedef struct LM32CPU LM32CPU; -typedef struct LM32CPUClass LM32CPUClass; -DECLARE_OBJ_CHECKERS(LM32CPU, LM32CPUClass, - LM32_CPU, TYPE_LM32_CPU) +OBJECT_DECLARE_TYPE(LM32CPU, LM32CPUClass, + lm32_cpu, LM32_CPU) /** * LM32CPUClass: diff --git a/target/m68k/cpu-qom.h b/target/m68k/cpu-qom.h index 241a3b19af..a10429cf67 100644 --- a/target/m68k/cpu-qom.h +++ b/target/m68k/cpu-qom.h @@ -25,10 +25,8 @@ #define TYPE_M68K_CPU "m68k-cpu" -typedef struct M68kCPU M68kCPU; -typedef struct M68kCPUClass M68kCPUClass; -DECLARE_OBJ_CHECKERS(M68kCPU, M68kCPUClass, - M68K_CPU, TYPE_M68K_CPU) +OBJECT_DECLARE_TYPE(M68kCPU, M68kCPUClass, + m68k_cpu, M68K_CPU) /* * M68kCPUClass: diff --git a/target/microblaze/cpu-qom.h b/target/microblaze/cpu-qom.h index 73c2237f98..82734b9b2b 100644 --- a/target/microblaze/cpu-qom.h +++ b/target/microblaze/cpu-qom.h @@ -25,10 +25,8 @@ #define TYPE_MICROBLAZE_CPU "microblaze-cpu" -typedef struct MicroBlazeCPU MicroBlazeCPU; -typedef struct MicroBlazeCPUClass MicroBlazeCPUClass; -DECLARE_OBJ_CHECKERS(MicroBlazeCPU, MicroBlazeCPUClass, - MICROBLAZE_CPU, TYPE_MICROBLAZE_CPU) +OBJECT_DECLARE_TYPE(MicroBlazeCPU, MicroBlazeCPUClass, + microblaze_cpu, MICROBLAZE_CPU) /** * MicroBlazeCPUClass: diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h index 82f45a828c..93fbbdca1b 100644 --- a/target/mips/cpu-qom.h +++ b/target/mips/cpu-qom.h @@ -29,10 +29,8 @@ #define TYPE_MIPS_CPU "mips-cpu" #endif -typedef struct MIPSCPU MIPSCPU; -typedef struct MIPSCPUClass MIPSCPUClass; -DECLARE_OBJ_CHECKERS(MIPSCPU, MIPSCPUClass, - MIPS_CPU, TYPE_MIPS_CPU) +OBJECT_DECLARE_TYPE(MIPSCPU, MIPSCPUClass, + mips_cpu, MIPS_CPU) /** * MIPSCPUClass: diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h index a9832a2d85..d58761ccb1 100644 --- a/target/moxie/cpu.h +++ b/target/moxie/cpu.h @@ -51,10 +51,8 @@ typedef struct CPUMoxieState { #define TYPE_MOXIE_CPU "moxie-cpu" -typedef struct MoxieCPU MoxieCPU; -typedef struct MoxieCPUClass MoxieCPUClass; -DECLARE_OBJ_CHECKERS(MoxieCPU, MoxieCPUClass, - MOXIE_CPU, TYPE_MOXIE_CPU) +OBJECT_DECLARE_TYPE(MoxieCPU, MoxieCPUClass, + moxie_cpu, MOXIE_CPU) /** * MoxieCPUClass: diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 0b91a3634b..1fa0fdaa35 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -32,10 +32,8 @@ typedef struct CPUNios2State CPUNios2State; #define TYPE_NIOS2_CPU "nios2-cpu" -typedef struct Nios2CPU Nios2CPU; -typedef struct Nios2CPUClass Nios2CPUClass; -DECLARE_OBJ_CHECKERS(Nios2CPU, Nios2CPUClass, - NIOS2_CPU, TYPE_NIOS2_CPU) +OBJECT_DECLARE_TYPE(Nios2CPU, Nios2CPUClass, + nios2_cpu, NIOS2_CPU) /** * Nios2CPUClass: diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 5e6d8a40d6..d0a8ee657a 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -29,10 +29,8 @@ struct OpenRISCCPU; #define TYPE_OPENRISC_CPU "or1k-cpu" -typedef struct OpenRISCCPU OpenRISCCPU; -typedef struct OpenRISCCPUClass OpenRISCCPUClass; -DECLARE_OBJ_CHECKERS(OpenRISCCPU, OpenRISCCPUClass, - OPENRISC_CPU, TYPE_OPENRISC_CPU) +OBJECT_DECLARE_TYPE(OpenRISCCPU, OpenRISCCPUClass, + openrisc_cpu, OPENRISC_CPU) /** * OpenRISCCPUClass: diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index f7e600c7b3..5cf806a3a6 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -29,10 +29,8 @@ #define TYPE_POWERPC_CPU "powerpc-cpu" #endif -typedef struct PowerPCCPU PowerPCCPU; -typedef struct PowerPCCPUClass PowerPCCPUClass; -DECLARE_OBJ_CHECKERS(PowerPCCPU, PowerPCCPUClass, - POWERPC_CPU, TYPE_POWERPC_CPU) +OBJECT_DECLARE_TYPE(PowerPCCPU, PowerPCCPUClass, + powerpc_cpu, POWERPC_CPU) typedef struct CPUPPCState CPUPPCState; typedef struct ppc_tb_t ppc_tb_t; diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 07807a8f20..48484653c9 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -232,10 +232,8 @@ struct CPURISCVState { QEMUTimer *timer; /* Internal timer */ }; -typedef struct RISCVCPU RISCVCPU; -typedef struct RISCVCPUClass RISCVCPUClass; -DECLARE_OBJ_CHECKERS(RISCVCPU, RISCVCPUClass, - RISCV_CPU, TYPE_RISCV_CPU) +OBJECT_DECLARE_TYPE(RISCVCPU, RISCVCPUClass, + riscv_cpu, RISCV_CPU) /** * RISCVCPUClass: diff --git a/target/s390x/cpu-qom.h b/target/s390x/cpu-qom.h index 5f0dccdac1..e2b2513711 100644 --- a/target/s390x/cpu-qom.h +++ b/target/s390x/cpu-qom.h @@ -25,10 +25,8 @@ #define TYPE_S390_CPU "s390x-cpu" -typedef struct S390CPU S390CPU; -typedef struct S390CPUClass S390CPUClass; -DECLARE_OBJ_CHECKERS(S390CPU, S390CPUClass, - S390_CPU, TYPE_S390_CPU) +OBJECT_DECLARE_TYPE(S390CPU, S390CPUClass, + s390_cpu, S390_CPU) typedef struct S390CPUModel S390CPUModel; typedef struct S390CPUDef S390CPUDef; diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h index b04b2bb4bf..595814b8cb 100644 --- a/target/sh4/cpu-qom.h +++ b/target/sh4/cpu-qom.h @@ -29,10 +29,8 @@ #define TYPE_SH7751R_CPU SUPERH_CPU_TYPE_NAME("sh7751r") #define TYPE_SH7785_CPU SUPERH_CPU_TYPE_NAME("sh7785") -typedef struct SuperHCPU SuperHCPU; -typedef struct SuperHCPUClass SuperHCPUClass; -DECLARE_OBJ_CHECKERS(SuperHCPU, SuperHCPUClass, - SUPERH_CPU, TYPE_SUPERH_CPU) +OBJECT_DECLARE_TYPE(SuperHCPU, SuperHCPUClass, + superh_cpu, SUPERH_CPU) /** * SuperHCPUClass: diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h index 42cb631d45..5d7fb727bc 100644 --- a/target/sparc/cpu-qom.h +++ b/target/sparc/cpu-qom.h @@ -29,10 +29,8 @@ #define TYPE_SPARC_CPU "sparc-cpu" #endif -typedef struct SPARCCPU SPARCCPU; -typedef struct SPARCCPUClass SPARCCPUClass; -DECLARE_OBJ_CHECKERS(SPARCCPU, SPARCCPUClass, - SPARC_CPU, TYPE_SPARC_CPU) +OBJECT_DECLARE_TYPE(SPARCCPU, SPARCCPUClass, + sparc_cpu, SPARC_CPU) typedef struct sparc_def_t sparc_def_t; /** diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h index d4cf70dc15..d251ff80b8 100644 --- a/target/tilegx/cpu.h +++ b/target/tilegx/cpu.h @@ -99,10 +99,8 @@ typedef struct CPUTLGState { #define TYPE_TILEGX_CPU "tilegx-cpu" -typedef struct TileGXCPU TileGXCPU; -typedef struct TileGXCPUClass TileGXCPUClass; -DECLARE_OBJ_CHECKERS(TileGXCPU, TileGXCPUClass, - TILEGX_CPU, TYPE_TILEGX_CPU) +OBJECT_DECLARE_TYPE(TileGXCPU, TileGXCPUClass, + tilegx_cpu, TILEGX_CPU) /** * TileGXCPUClass: diff --git a/target/tricore/cpu-qom.h b/target/tricore/cpu-qom.h index 1988c26093..9e588c4c34 100644 --- a/target/tricore/cpu-qom.h +++ b/target/tricore/cpu-qom.h @@ -24,10 +24,8 @@ #define TYPE_TRICORE_CPU "tricore-cpu" -typedef struct TriCoreCPU TriCoreCPU; -typedef struct TriCoreCPUClass TriCoreCPUClass; -DECLARE_OBJ_CHECKERS(TriCoreCPU, TriCoreCPUClass, - TRICORE_CPU, TYPE_TRICORE_CPU) +OBJECT_DECLARE_TYPE(TriCoreCPU, TriCoreCPUClass, + tricore_cpu, TRICORE_CPU) struct TriCoreCPUClass { /*< private >*/ diff --git a/target/unicore32/cpu-qom.h b/target/unicore32/cpu-qom.h index 5b67ac532d..c914273058 100644 --- a/target/unicore32/cpu-qom.h +++ b/target/unicore32/cpu-qom.h @@ -16,10 +16,8 @@ #define TYPE_UNICORE32_CPU "unicore32-cpu" -typedef struct UniCore32CPU UniCore32CPU; -typedef struct UniCore32CPUClass UniCore32CPUClass; -DECLARE_OBJ_CHECKERS(UniCore32CPU, UniCore32CPUClass, - UNICORE32_CPU, TYPE_UNICORE32_CPU) +OBJECT_DECLARE_TYPE(UniCore32CPU, UniCore32CPUClass, + unicore32_cpu, UNICORE32_CPU) /** * UniCore32CPUClass: diff --git a/target/xtensa/cpu-qom.h b/target/xtensa/cpu-qom.h index ef13262b42..299ce3e63c 100644 --- a/target/xtensa/cpu-qom.h +++ b/target/xtensa/cpu-qom.h @@ -34,10 +34,8 @@ #define TYPE_XTENSA_CPU "xtensa-cpu" -typedef struct XtensaCPU XtensaCPU; -typedef struct XtensaCPUClass XtensaCPUClass; -DECLARE_OBJ_CHECKERS(XtensaCPU, XtensaCPUClass, - XTENSA_CPU, TYPE_XTENSA_CPU) +OBJECT_DECLARE_TYPE(XtensaCPU, XtensaCPUClass, + xtensa_cpu, XTENSA_CPU) typedef struct XtensaConfig XtensaConfig; diff --git a/backends/dbus-vmstate.c b/backends/dbus-vmstate.c index 790bc9d728..55aea64af5 100644 --- a/backends/dbus-vmstate.c +++ b/backends/dbus-vmstate.c @@ -21,12 +21,10 @@ #include "trace.h" #include "qom/object.h" -typedef struct DBusVMState DBusVMState; -typedef struct DBusVMStateClass DBusVMStateClass; #define TYPE_DBUS_VMSTATE "dbus-vmstate" -DECLARE_OBJ_CHECKERS(DBusVMState, DBusVMStateClass, - DBUS_VMSTATE, TYPE_DBUS_VMSTATE) +OBJECT_DECLARE_TYPE(DBusVMState, DBusVMStateClass, + dbus_vmstate, DBUS_VMSTATE) struct DBusVMStateClass { ObjectClass parent_class; diff --git a/ui/input-barrier.c b/ui/input-barrier.c index ece32a56e6..6ff0a23ddb 100644 --- a/ui/input-barrier.c +++ b/ui/input-barrier.c @@ -20,10 +20,8 @@ #include "input-barrier.h" #define TYPE_INPUT_BARRIER "input-barrier" -typedef struct InputBarrier InputBarrier; -typedef struct InputBarrierClass InputBarrierClass; -DECLARE_OBJ_CHECKERS(InputBarrier, InputBarrierClass, - INPUT_BARRIER, TYPE_INPUT_BARRIER) +OBJECT_DECLARE_TYPE(InputBarrier, InputBarrierClass, + input_barrier, INPUT_BARRIER) #define MAX_HELLO_LENGTH 1024 diff --git a/ui/input-linux.c b/ui/input-linux.c index 77988e8c71..d916c1eec1 100644 --- a/ui/input-linux.c +++ b/ui/input-linux.c @@ -31,10 +31,8 @@ static bool linux_is_button(unsigned int lnx) } #define TYPE_INPUT_LINUX "input-linux" -typedef struct InputLinux InputLinux; -typedef struct InputLinuxClass InputLinuxClass; -DECLARE_OBJ_CHECKERS(InputLinux, InputLinuxClass, - INPUT_LINUX, TYPE_INPUT_LINUX) +OBJECT_DECLARE_TYPE(InputLinux, InputLinuxClass, + input_linux, INPUT_LINUX) struct InputLinux { From patchwork Thu Aug 20 00:12:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276006 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 697BDC433DF for ; Thu, 20 Aug 2020 00:38:16 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2E9CB2078D for ; Thu, 20 Aug 2020 00:38:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="YQtCnaqP" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2E9CB2078D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:35908 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8Yat-0000kL-Em for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:38:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50036) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YEB-0000ZJ-Mb for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:47 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:23930) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YE8-0002Xt-LG for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:47 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882483; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BcAdcdXzRNxNFofrltUSexMRWXrtp8/eIWxMocHk1gI=; b=YQtCnaqPIQIasIphhjCOOtphhE3JDJcornMTw27kAPZwbK/2cswwv5piuBMvIzerIDBtaN Wbzq/L+JQZE/qSb7kNlWW0YG88/EWb/UA/QJnMTD7PovDq1ykTIdUwRPmECuEqzAwVaLaW Uh0okQGy2FTI2S0TazQIFEztkMdhruI= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-503-WQYEl8JxMyeVogVpTGIq1g-1; Wed, 19 Aug 2020 20:14:41 -0400 X-MC-Unique: WQYEl8JxMyeVogVpTGIq1g-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B17511007465 for ; Thu, 20 Aug 2020 00:14:40 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 77D0D60BEC; Thu, 20 Aug 2020 00:14:40 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 56/58] [automated] Use OBJECT_DECLARE_SIMPLE_TYPE when possible Date: Wed, 19 Aug 2020 20:12:34 -0400 Message-Id: <20200820001236.1284548-57-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=216.205.24.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 20:12:51 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=-1, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=ObjectDeclareType $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- include/authz/list.h | 7 ++----- include/authz/listfile.h | 7 ++----- include/authz/pamacct.h | 7 ++----- include/authz/simple.h | 7 ++----- include/crypto/secret_keyring.h | 7 ++----- include/io/dns-resolver.h | 7 ++----- include/io/net-listener.h | 7 ++----- include/sysemu/vhost-user-backend.h | 7 ++----- backends/dbus-vmstate.c | 7 ++----- ui/input-barrier.c | 7 ++----- ui/input-linux.c | 7 ++----- 11 files changed, 22 insertions(+), 55 deletions(-) diff --git a/include/authz/list.h b/include/authz/list.h index e4e1040472..5676bb375c 100644 --- a/include/authz/list.h +++ b/include/authz/list.h @@ -27,8 +27,8 @@ #define TYPE_QAUTHZ_LIST "authz-list" -OBJECT_DECLARE_TYPE(QAuthZList, QAuthZListClass, - qauthz_list, QAUTHZ_LIST) +OBJECT_DECLARE_SIMPLE_TYPE(QAuthZList, qauthz_list, + QAUTHZ_LIST, QAuthZClass) @@ -68,9 +68,6 @@ struct QAuthZList { }; -struct QAuthZListClass { - QAuthZClass parent_class; -}; QAuthZList *qauthz_list_new(const char *id, diff --git a/include/authz/listfile.h b/include/authz/listfile.h index 89c5eafbfa..b491227bbe 100644 --- a/include/authz/listfile.h +++ b/include/authz/listfile.h @@ -27,8 +27,8 @@ #define TYPE_QAUTHZ_LIST_FILE "authz-list-file" -OBJECT_DECLARE_TYPE(QAuthZListFile, QAuthZListFileClass, - qauthz_list_file, QAUTHZ_LIST_FILE) +OBJECT_DECLARE_SIMPLE_TYPE(QAuthZListFile, qauthz_list_file, + QAUTHZ_LIST_FILE, QAuthZClass) @@ -87,9 +87,6 @@ struct QAuthZListFile { }; -struct QAuthZListFileClass { - QAuthZClass parent_class; -}; QAuthZListFile *qauthz_list_file_new(const char *id, diff --git a/include/authz/pamacct.h b/include/authz/pamacct.h index 44bb5ff28d..7804853ddf 100644 --- a/include/authz/pamacct.h +++ b/include/authz/pamacct.h @@ -27,8 +27,8 @@ #define TYPE_QAUTHZ_PAM "authz-pam" -OBJECT_DECLARE_TYPE(QAuthZPAM, QAuthZPAMClass, - qauthz_pam, QAUTHZ_PAM) +OBJECT_DECLARE_SIMPLE_TYPE(QAuthZPAM, qauthz_pam, + QAUTHZ_PAM, QAuthZClass) @@ -79,9 +79,6 @@ struct QAuthZPAM { }; -struct QAuthZPAMClass { - QAuthZClass parent_class; -}; QAuthZPAM *qauthz_pam_new(const char *id, diff --git a/include/authz/simple.h b/include/authz/simple.h index ba4a5ec5ea..346fcb0c6c 100644 --- a/include/authz/simple.h +++ b/include/authz/simple.h @@ -26,8 +26,8 @@ #define TYPE_QAUTHZ_SIMPLE "authz-simple" -OBJECT_DECLARE_TYPE(QAuthZSimple, QAuthZSimpleClass, - qauthz_simple, QAUTHZ_SIMPLE) +OBJECT_DECLARE_SIMPLE_TYPE(QAuthZSimple, qauthz_simple, + QAUTHZ_SIMPLE, QAuthZClass) @@ -62,9 +62,6 @@ struct QAuthZSimple { }; -struct QAuthZSimpleClass { - QAuthZClass parent_class; -}; QAuthZSimple *qauthz_simple_new(const char *id, diff --git a/include/crypto/secret_keyring.h b/include/crypto/secret_keyring.h index cc2c7397db..73d2a8f501 100644 --- a/include/crypto/secret_keyring.h +++ b/include/crypto/secret_keyring.h @@ -26,8 +26,8 @@ #include "crypto/secret_common.h" #define TYPE_QCRYPTO_SECRET_KEYRING "secret_keyring" -OBJECT_DECLARE_TYPE(QCryptoSecretKeyring, QCryptoSecretKeyringClass, - qcrypto_secret_keyring, QCRYPTO_SECRET_KEYRING) +OBJECT_DECLARE_SIMPLE_TYPE(QCryptoSecretKeyring, qcrypto_secret_keyring, + QCRYPTO_SECRET_KEYRING, QCryptoSecretCommonClass) struct QCryptoSecretKeyring { @@ -36,8 +36,5 @@ struct QCryptoSecretKeyring { }; -struct QCryptoSecretKeyringClass { - QCryptoSecretCommonClass parent; -}; #endif /* QCRYPTO_SECRET_KEYRING_H */ diff --git a/include/io/dns-resolver.h b/include/io/dns-resolver.h index 8ae4857e05..e248fba5bd 100644 --- a/include/io/dns-resolver.h +++ b/include/io/dns-resolver.h @@ -26,8 +26,8 @@ #include "io/task.h" #define TYPE_QIO_DNS_RESOLVER "qio-dns-resolver" -OBJECT_DECLARE_TYPE(QIODNSResolver, QIODNSResolverClass, - qio_dns_resolver, QIO_DNS_RESOLVER) +OBJECT_DECLARE_SIMPLE_TYPE(QIODNSResolver, qio_dns_resolver, + QIO_DNS_RESOLVER, ObjectClass) /** @@ -133,9 +133,6 @@ struct QIODNSResolver { Object parent; }; -struct QIODNSResolverClass { - ObjectClass parent; -}; /** diff --git a/include/io/net-listener.h b/include/io/net-listener.h index 4f0847ff19..60fad29ff4 100644 --- a/include/io/net-listener.h +++ b/include/io/net-listener.h @@ -25,8 +25,8 @@ #include "qom/object.h" #define TYPE_QIO_NET_LISTENER "qio-net-listener" -OBJECT_DECLARE_TYPE(QIONetListener, QIONetListenerClass, - qio_net_listener, QIO_NET_LISTENER) +OBJECT_DECLARE_SIMPLE_TYPE(QIONetListener, qio_net_listener, + QIO_NET_LISTENER, ObjectClass) typedef void (*QIONetListenerClientFunc)(QIONetListener *listener, @@ -58,9 +58,6 @@ struct QIONetListener { GDestroyNotify io_notify; }; -struct QIONetListenerClass { - ObjectClass parent; -}; /** diff --git a/include/sysemu/vhost-user-backend.h b/include/sysemu/vhost-user-backend.h index 76ca06cf40..23205edeb8 100644 --- a/include/sysemu/vhost-user-backend.h +++ b/include/sysemu/vhost-user-backend.h @@ -22,13 +22,10 @@ #include "io/channel.h" #define TYPE_VHOST_USER_BACKEND "vhost-user-backend" -OBJECT_DECLARE_TYPE(VhostUserBackend, VhostUserBackendClass, - vhost_user_backend, VHOST_USER_BACKEND) +OBJECT_DECLARE_SIMPLE_TYPE(VhostUserBackend, vhost_user_backend, + VHOST_USER_BACKEND, ObjectClass) -struct VhostUserBackendClass { - ObjectClass parent_class; -}; struct VhostUserBackend { /* private */ diff --git a/backends/dbus-vmstate.c b/backends/dbus-vmstate.c index 55aea64af5..5173457148 100644 --- a/backends/dbus-vmstate.c +++ b/backends/dbus-vmstate.c @@ -23,12 +23,9 @@ #define TYPE_DBUS_VMSTATE "dbus-vmstate" -OBJECT_DECLARE_TYPE(DBusVMState, DBusVMStateClass, - dbus_vmstate, DBUS_VMSTATE) +OBJECT_DECLARE_SIMPLE_TYPE(DBusVMState, dbus_vmstate, + DBUS_VMSTATE, ObjectClass) -struct DBusVMStateClass { - ObjectClass parent_class; -}; struct DBusVMState { Object parent; diff --git a/ui/input-barrier.c b/ui/input-barrier.c index 6ff0a23ddb..8de18c92f8 100644 --- a/ui/input-barrier.c +++ b/ui/input-barrier.c @@ -20,8 +20,8 @@ #include "input-barrier.h" #define TYPE_INPUT_BARRIER "input-barrier" -OBJECT_DECLARE_TYPE(InputBarrier, InputBarrierClass, - input_barrier, INPUT_BARRIER) +OBJECT_DECLARE_SIMPLE_TYPE(InputBarrier, input_barrier, + INPUT_BARRIER, ObjectClass) #define MAX_HELLO_LENGTH 1024 @@ -44,9 +44,6 @@ struct InputBarrier { char buffer[MAX_HELLO_LENGTH]; }; -struct InputBarrierClass { - ObjectClass parent_class; -}; static const char *cmd_names[] = { [barrierCmdCNoop] = "CNOP", diff --git a/ui/input-linux.c b/ui/input-linux.c index d916c1eec1..7cd0bf3809 100644 --- a/ui/input-linux.c +++ b/ui/input-linux.c @@ -31,8 +31,8 @@ static bool linux_is_button(unsigned int lnx) } #define TYPE_INPUT_LINUX "input-linux" -OBJECT_DECLARE_TYPE(InputLinux, InputLinuxClass, - input_linux, INPUT_LINUX) +OBJECT_DECLARE_SIMPLE_TYPE(InputLinux, input_linux, + INPUT_LINUX, ObjectClass) struct InputLinux { @@ -65,9 +65,6 @@ struct InputLinux { QTAILQ_ENTRY(InputLinux) next; }; -struct InputLinuxClass { - ObjectClass parent_class; -}; static QTAILQ_HEAD(, InputLinux) inputs = QTAILQ_HEAD_INITIALIZER(inputs); From patchwork Thu Aug 20 00:12:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 276002 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33CE3C433DF for ; Thu, 20 Aug 2020 00:43:00 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EA1CF2078D for ; Thu, 20 Aug 2020 00:42:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="ZkALuphd" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EA1CF2078D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:55806 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k8YfT-0000bo-4Q for qemu-devel@archiver.kernel.org; Wed, 19 Aug 2020 20:42:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50068) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k8YED-0000eO-Ef for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:49 -0400 Received: from us-smtp-1.mimecast.com ([205.139.110.61]:34182 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k8YEA-0002Y9-ER for qemu-devel@nongnu.org; Wed, 19 Aug 2020 20:14:49 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597882485; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8xtKOFAQYjubq+4eiO9yroM/M2deAhLSB8RohPO5V1U=; b=ZkALuphdbY9FBB8QD5GortATT76e6Gsv3WuV4klq9vFYku3iy7AH8g7t1XajTle+56lckw LEGejcPZ5aW/zKgcXC6sdsbMXB7ehclKRmAemBZmVVJtsQY2DnR/eX6xEUiQkfiK0jCThH tB6woLUZU7PfvJBsXDT4yHj8jN7FAno= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-40-wwtdd-peM5SqFG4Niion3Q-1; Wed, 19 Aug 2020 20:14:44 -0400 X-MC-Unique: wwtdd-peM5SqFG4Niion3Q-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B48741084C8C for ; Thu, 20 Aug 2020 00:14:42 +0000 (UTC) Received: from localhost (ovpn-117-244.rdu2.redhat.com [10.10.117.244]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7B8EE1002391; Thu, 20 Aug 2020 00:14:42 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v2 58/58] crypto: use QOM macros for declaration/definition of TLS creds types Date: Wed, 19 Aug 2020 20:12:36 -0400 Message-Id: <20200820001236.1284548-59-ehabkost@redhat.com> In-Reply-To: <20200820001236.1284548-1-ehabkost@redhat.com> References: <20200820001236.1284548-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.003 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/19 18:27:43 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Daniel P. Berrangé This introduces the use of the OBJECT_DEFINE and OBJECT_DECLARE macro families in the TLS creds types, in order to eliminate boilerplate code. Signed-off-by: Daniel P. Berrangé Message-Id: <20200723181410.3145233-5-berrange@redhat.com> [ehabkost: rebase, update to pass additional arguments to macro] Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- include/crypto/tlscreds.h | 13 ++----------- include/crypto/tlscredsanon.h | 14 ++------------ include/crypto/tlscredspsk.h | 13 ++----------- include/crypto/tlscredsx509.h | 13 ++----------- crypto/tlscreds.c | 20 +++----------------- crypto/tlscredsanon.c | 24 +++++++----------------- crypto/tlscredspsk.c | 26 ++++++++------------------ crypto/tlscredsx509.c | 24 ++++-------------------- 8 files changed, 30 insertions(+), 117 deletions(-) diff --git a/include/crypto/tlscreds.h b/include/crypto/tlscreds.h index 079e376047..e9b9b8c20a 100644 --- a/include/crypto/tlscreds.h +++ b/include/crypto/tlscreds.h @@ -29,11 +29,8 @@ #endif #define TYPE_QCRYPTO_TLS_CREDS "tls-creds" -typedef struct QCryptoTLSCreds QCryptoTLSCreds; -DECLARE_INSTANCE_CHECKER(QCryptoTLSCreds, QCRYPTO_TLS_CREDS, - TYPE_QCRYPTO_TLS_CREDS) - -typedef struct QCryptoTLSCredsClass QCryptoTLSCredsClass; +OBJECT_DECLARE_SIMPLE_TYPE(QCryptoTLSCreds, qcrypto_tls_creds, + QCRYPTO_TLS_CREDS, Object) #define QCRYPTO_TLS_CREDS_DH_PARAMS "dh-params.pem" @@ -58,10 +55,4 @@ struct QCryptoTLSCreds { char *priority; }; - -struct QCryptoTLSCredsClass { - ObjectClass parent_class; -}; - - #endif /* QCRYPTO_TLSCREDS_H */ diff --git a/include/crypto/tlscredsanon.h b/include/crypto/tlscredsanon.h index 3f464a3809..338b668b1d 100644 --- a/include/crypto/tlscredsanon.h +++ b/include/crypto/tlscredsanon.h @@ -25,12 +25,8 @@ #include "qom/object.h" #define TYPE_QCRYPTO_TLS_CREDS_ANON "tls-creds-anon" -typedef struct QCryptoTLSCredsAnon QCryptoTLSCredsAnon; -DECLARE_INSTANCE_CHECKER(QCryptoTLSCredsAnon, QCRYPTO_TLS_CREDS_ANON, - TYPE_QCRYPTO_TLS_CREDS_ANON) - - -typedef struct QCryptoTLSCredsAnonClass QCryptoTLSCredsAnonClass; +OBJECT_DECLARE_SIMPLE_TYPE(QCryptoTLSCredsAnon, qcrypto_tls_creds_anon, + QCRYPTO_TLS_CREDS_ANON, QCryptoTLSCreds) /** * QCryptoTLSCredsAnon: @@ -103,10 +99,4 @@ struct QCryptoTLSCredsAnon { #endif }; - -struct QCryptoTLSCredsAnonClass { - QCryptoTLSCredsClass parent_class; -}; - - #endif /* QCRYPTO_TLSCREDSANON_H */ diff --git a/include/crypto/tlscredspsk.h b/include/crypto/tlscredspsk.h index d7e6bdb5ed..16e3f84f47 100644 --- a/include/crypto/tlscredspsk.h +++ b/include/crypto/tlscredspsk.h @@ -25,11 +25,8 @@ #include "qom/object.h" #define TYPE_QCRYPTO_TLS_CREDS_PSK "tls-creds-psk" -typedef struct QCryptoTLSCredsPSK QCryptoTLSCredsPSK; -DECLARE_INSTANCE_CHECKER(QCryptoTLSCredsPSK, QCRYPTO_TLS_CREDS_PSK, - TYPE_QCRYPTO_TLS_CREDS_PSK) - -typedef struct QCryptoTLSCredsPSKClass QCryptoTLSCredsPSKClass; +OBJECT_DECLARE_SIMPLE_TYPE(QCryptoTLSCredsPSK, qcrypto_tls_creds_psk, + QCRYPTO_TLS_CREDS_PSK, QCryptoTLSCreds) #define QCRYPTO_TLS_CREDS_PSKFILE "keys.psk" @@ -98,10 +95,4 @@ struct QCryptoTLSCredsPSK { #endif }; - -struct QCryptoTLSCredsPSKClass { - QCryptoTLSCredsClass parent_class; -}; - - #endif /* QCRYPTO_TLSCREDSPSK_H */ diff --git a/include/crypto/tlscredsx509.h b/include/crypto/tlscredsx509.h index c6d89b7881..1197f33663 100644 --- a/include/crypto/tlscredsx509.h +++ b/include/crypto/tlscredsx509.h @@ -25,11 +25,8 @@ #include "qom/object.h" #define TYPE_QCRYPTO_TLS_CREDS_X509 "tls-creds-x509" -typedef struct QCryptoTLSCredsX509 QCryptoTLSCredsX509; -DECLARE_INSTANCE_CHECKER(QCryptoTLSCredsX509, QCRYPTO_TLS_CREDS_X509, - TYPE_QCRYPTO_TLS_CREDS_X509) - -typedef struct QCryptoTLSCredsX509Class QCryptoTLSCredsX509Class; +OBJECT_DECLARE_SIMPLE_TYPE(QCryptoTLSCredsX509, qcrypto_tls_creds_x509, + QCRYPTO_TLS_CREDS_X509, QCryptoTLSCreds) #define QCRYPTO_TLS_CREDS_X509_CA_CERT "ca-cert.pem" #define QCRYPTO_TLS_CREDS_X509_CA_CRL "ca-crl.pem" @@ -105,10 +102,4 @@ struct QCryptoTLSCredsX509 { char *passwordid; }; - -struct QCryptoTLSCredsX509Class { - QCryptoTLSCredsClass parent_class; -}; - - #endif /* QCRYPTO_TLSCREDSX509_H */ diff --git a/crypto/tlscreds.c b/crypto/tlscreds.c index bb3e6667b9..c238ff7d4b 100644 --- a/crypto/tlscreds.c +++ b/crypto/tlscreds.c @@ -24,6 +24,9 @@ #include "tlscredspriv.h" #include "trace.h" +OBJECT_DEFINE_ABSTRACT_TYPE(QCryptoTLSCreds, qcrypto_tls_creds, + QCRYPTO_TLS_CREDS, OBJECT) + #define DH_BITS 2048 #ifdef CONFIG_GNUTLS @@ -258,20 +261,3 @@ qcrypto_tls_creds_finalize(Object *obj) g_free(creds->dir); g_free(creds->priority); } - - -static const TypeInfo qcrypto_tls_creds_info = { - .parent = TYPE_OBJECT, - .name = TYPE_QCRYPTO_TLS_CREDS, - .instance_size = sizeof(QCryptoTLSCreds), - .instance_init = qcrypto_tls_creds_init, - .instance_finalize = qcrypto_tls_creds_finalize, - .class_init = qcrypto_tls_creds_class_init, - .class_size = sizeof(QCryptoTLSCredsClass), - .abstract = true, -}; -TYPE_INFO(qcrypto_tls_creds_info) - - - - diff --git a/crypto/tlscredsanon.c b/crypto/tlscredsanon.c index 16162e60b6..dc1b77e37c 100644 --- a/crypto/tlscredsanon.c +++ b/crypto/tlscredsanon.c @@ -26,6 +26,9 @@ #include "qom/object_interfaces.h" #include "trace.h" +OBJECT_DEFINE_TYPE_WITH_INTERFACES(QCryptoTLSCredsAnon, qcrypto_tls_creds_anon, + QCRYPTO_TLS_CREDS_ANON, QCRYPTO_TLS_CREDS, + { TYPE_USER_CREATABLE }, { NULL }) #ifdef CONFIG_GNUTLS @@ -191,20 +194,7 @@ qcrypto_tls_creds_anon_class_init(ObjectClass *oc, void *data) } -static const TypeInfo qcrypto_tls_creds_anon_info = { - .parent = TYPE_QCRYPTO_TLS_CREDS, - .name = TYPE_QCRYPTO_TLS_CREDS_ANON, - .instance_size = sizeof(QCryptoTLSCredsAnon), - .instance_finalize = qcrypto_tls_creds_anon_finalize, - .class_size = sizeof(QCryptoTLSCredsAnonClass), - .class_init = qcrypto_tls_creds_anon_class_init, - .interfaces = (InterfaceInfo[]) { - { TYPE_USER_CREATABLE }, - { } - } -}; -TYPE_INFO(qcrypto_tls_creds_anon_info) - - - - +static void +qcrypto_tls_creds_anon_init(Object *obj) +{ +} diff --git a/crypto/tlscredspsk.c b/crypto/tlscredspsk.c index ea890f5837..0c66be3647 100644 --- a/crypto/tlscredspsk.c +++ b/crypto/tlscredspsk.c @@ -27,6 +27,10 @@ #include "trace.h" +OBJECT_DEFINE_TYPE_WITH_INTERFACES(QCryptoTLSCredsPSK, qcrypto_tls_creds_psk, + QCRYPTO_TLS_CREDS_PSK, QCRYPTO_TLS_CREDS, + { TYPE_USER_CREATABLE }, { NULL }) + #ifdef CONFIG_GNUTLS static int @@ -281,21 +285,7 @@ qcrypto_tls_creds_psk_class_init(ObjectClass *oc, void *data) qcrypto_tls_creds_psk_prop_set_username); } - -static const TypeInfo qcrypto_tls_creds_psk_info = { - .parent = TYPE_QCRYPTO_TLS_CREDS, - .name = TYPE_QCRYPTO_TLS_CREDS_PSK, - .instance_size = sizeof(QCryptoTLSCredsPSK), - .instance_finalize = qcrypto_tls_creds_psk_finalize, - .class_size = sizeof(QCryptoTLSCredsPSKClass), - .class_init = qcrypto_tls_creds_psk_class_init, - .interfaces = (InterfaceInfo[]) { - { TYPE_USER_CREATABLE }, - { } - } -}; -TYPE_INFO(qcrypto_tls_creds_psk_info) - - - - +static void +qcrypto_tls_creds_psk_init(Object *obj) +{ +} diff --git a/crypto/tlscredsx509.c b/crypto/tlscredsx509.c index 77f1beaf8b..a39555e5e6 100644 --- a/crypto/tlscredsx509.c +++ b/crypto/tlscredsx509.c @@ -28,6 +28,10 @@ #include "trace.h" +OBJECT_DEFINE_TYPE_WITH_INTERFACES(QCryptoTLSCredsX509, qcrypto_tls_creds_x509, + QCRYPTO_TLS_CREDS_X509, QCRYPTO_TLS_CREDS, + { TYPE_USER_CREATABLE }, { NULL }) + #ifdef CONFIG_GNUTLS #include @@ -814,23 +818,3 @@ qcrypto_tls_creds_x509_class_init(ObjectClass *oc, void *data) qcrypto_tls_creds_x509_prop_get_passwordid, qcrypto_tls_creds_x509_prop_set_passwordid); } - - -static const TypeInfo qcrypto_tls_creds_x509_info = { - .parent = TYPE_QCRYPTO_TLS_CREDS, - .name = TYPE_QCRYPTO_TLS_CREDS_X509, - .instance_size = sizeof(QCryptoTLSCredsX509), - .instance_init = qcrypto_tls_creds_x509_init, - .instance_finalize = qcrypto_tls_creds_x509_finalize, - .class_size = sizeof(QCryptoTLSCredsX509Class), - .class_init = qcrypto_tls_creds_x509_class_init, - .interfaces = (InterfaceInfo[]) { - { TYPE_USER_CREATABLE }, - { } - } -}; -TYPE_INFO(qcrypto_tls_creds_x509_info) - - - -