From patchwork Mon Aug 31 19:34:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 275059 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D84E8C433E2 for ; Mon, 31 Aug 2020 19:35:39 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 94CB520678 for ; Mon, 31 Aug 2020 19:35:39 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Mon, 31 Aug 2020 19:34:28 +0000 (UTC) Received: from laptop.redhat.com (ovpn-112-112.ams2.redhat.com [10.36.112.112]) by smtp.corp.redhat.com (Postfix) with ESMTP id D5ACA7EB69; Mon, 31 Aug 2020 19:34:25 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, qemu-devel@nongnu.org, drjones@redhat.com, andrew.murray@arm.com, sudeep.holla@arm.com, maz@kernel.org, will@kernel.org, haibo.xu@linaro.org Subject: [kvm-unit-tests RFC 2/4] spe: Probing and Introspection Test Date: Mon, 31 Aug 2020 21:34:12 +0200 Message-Id: <20200831193414.6951-3-eric.auger@redhat.com> In-Reply-To: <20200831193414.6951-1-eric.auger@redhat.com> References: <20200831193414.6951-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Received-SPF: pass client-ip=216.205.24.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/31 15:34:32 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Test whether Statistical Profiling Extensions (SPE) are supported and in the positive collect dimensioning data from the IDR registers. The First test only validates those. Signed-off-by: Eric Auger --- arm/Makefile.common | 1 + arm/spe.c | 163 ++++++++++++++++++++++++++++++++++++++++++++ arm/unittests.cfg | 8 +++ 3 files changed, 172 insertions(+) create mode 100644 arm/spe.c diff --git a/arm/Makefile.common b/arm/Makefile.common index a123e85..4e7e4eb 100644 --- a/arm/Makefile.common +++ b/arm/Makefile.common @@ -8,6 +8,7 @@ tests-common = $(TEST_DIR)/selftest.flat tests-common += $(TEST_DIR)/spinlock-test.flat tests-common += $(TEST_DIR)/pci-test.flat tests-common += $(TEST_DIR)/pmu.flat +tests-common += $(TEST_DIR)/spe.flat tests-common += $(TEST_DIR)/gic.flat tests-common += $(TEST_DIR)/psci.flat tests-common += $(TEST_DIR)/sieve.flat diff --git a/arm/spe.c b/arm/spe.c new file mode 100644 index 0000000..153c182 --- /dev/null +++ b/arm/spe.c @@ -0,0 +1,163 @@ +/* + * Copyright (C) 2020, Red Hat Inc, Eric Auger + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU Lesser General Public License version 2.1 and + * only version 2.1 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License + * for more details. + */ +#include "libcflat.h" +#include "errata.h" +#include "asm/barrier.h" +#include "asm/sysreg.h" +#include "asm/processor.h" +#include "alloc_page.h" +#include + +struct spe { + int min_interval; + int maxsize; + int countsize; + bool fl_cap; + bool ft_cap; + bool fe_cap; + int align; + void *buffer; + bool unique_record_size; +}; + +static struct spe spe; + +#ifdef __arm__ + +static bool spe_probe(void) { return false; } +static void test_spe_introspection(void) { } + +#else + +#define ID_DFR0_PMSVER_SHIFT 32 +#define ID_DFR0_PMSVER_MASK 0xF + +#define PMBIDR_EL1_ALIGN_MASK 0xF +#define PMBIDR_EL1_P 0x10 +#define PMBIDR_EL1_F 0x20 + +#define PMSIDR_EL1_FE 0x1 +#define PMSIDR_EL1_FT 0x2 +#define PMSIDR_EL1_FL 0x4 +#define PMSIDR_EL1_ARCHINST 0x8 +#define PMSIDR_EL1_LDS 0x10 +#define PMSIDR_EL1_ERND 0x20 +#define PMSIDR_EL1_INTERVAL_SHIFT 8 +#define PMSIDR_EL1_INTERVAL_MASK 0xFUL +#define PMSIDR_EL1_MAXSIZE_SHIFT 12 +#define PMSIDR_EL1_MAXSIZE_MASK 0xFUL +#define PMSIDR_EL1_COUNTSIZE_SHIFT 16 +#define PMSIDR_EL1_COUNTSIZE_MASK 0xFUL + +#define PMSIDR_EL1 sys_reg(3, 0, 9, 9, 7) + +#define PMBIDR_EL1 sys_reg(3, 0, 9, 10, 7) + +static int min_interval(uint8_t idr_bits) +{ + switch (idr_bits) { + case 0x0: + return 256; + case 0x2: + return 512; + case 0x3: + return 768; + case 0x4: + return 1024; + case 0x5: + return 1536; + case 0x6: + return 2048; + case 0x7: + return 3072; + case 0x8: + return 4096; + default: + return -1; + } +} + +static bool spe_probe(void) +{ + uint64_t pmbidr_el1, pmsidr_el1; + uint8_t pmsver; + + pmsver = (get_id_aa64dfr0() >> ID_DFR0_PMSVER_SHIFT) & ID_DFR0_PMSVER_MASK; + + report_info("PMSVer = %d", pmsver); + if (!pmsver || pmsver > 2) + return false; + + pmbidr_el1 = read_sysreg_s(PMBIDR_EL1); + if (pmbidr_el1 & PMBIDR_EL1_P) { + report_info("MBIDR_EL1: Profiling buffer owned by this exception level"); + return false; + } + + spe.align = 1 << (pmbidr_el1 & PMBIDR_EL1_ALIGN_MASK); + + pmsidr_el1 = read_sysreg_s(PMSIDR_EL1); + + spe.min_interval = min_interval((pmsidr_el1 >> PMSIDR_EL1_INTERVAL_SHIFT) & PMSIDR_EL1_INTERVAL_MASK); + spe.maxsize = 1 << ((pmsidr_el1 >> PMSIDR_EL1_MAXSIZE_SHIFT) & PMSIDR_EL1_MAXSIZE_MASK); + spe.countsize = (pmsidr_el1 >> PMSIDR_EL1_COUNTSIZE_SHIFT) & PMSIDR_EL1_COUNTSIZE_MASK; + + spe.fl_cap = pmsidr_el1 & PMSIDR_EL1_FL; + spe.ft_cap = pmsidr_el1 & PMSIDR_EL1_FT; + spe.fe_cap = pmsidr_el1 & PMSIDR_EL1_FE; + + report_info("Align= %d bytes, Min Interval=%d Single record Max Size = %d bytes", + spe.align, spe.min_interval, spe.maxsize); + report_info("Filtering Caps: Lat=%d Type=%d Events=%d", spe.fl_cap, spe.ft_cap, spe.fe_cap); + if (spe.align == spe.maxsize) { + report_info("Each record is exactly %d bytes", spe.maxsize); + spe.unique_record_size = true; + } + + spe.buffer = alloc_pages(0); + + return true; +} + +static void test_spe_introspection(void) +{ + report(spe.countsize == 0x2, "PMSIDR_EL1: CountSize = 0b0010"); + report(spe.maxsize >= 16 && spe.maxsize <= 2048, + "PMSIDR_EL1: Single record max size = %d bytes", spe.maxsize); + report(spe.min_interval >= 256 && spe.min_interval <= 4096, + "PMSIDR_EL1: Minimal sampling interval = %d", spe.min_interval); +} + +#endif + +int main(int argc, char *argv[]) +{ + if (!spe_probe()) { + printf("SPE not supported, test skipped...\n"); + return report_summary(); + } + + if (argc < 2) + report_abort("no test specified"); + + report_prefix_push("spe"); + + if (strcmp(argv[1], "spe-introspection") == 0) { + report_prefix_push(argv[1]); + test_spe_introspection(); + report_prefix_pop(); + } else { + report_abort("Unknown sub-test '%s'", argv[1]); + } + return report_summary(); +} diff --git a/arm/unittests.cfg b/arm/unittests.cfg index f776b66..c070939 100644 --- a/arm/unittests.cfg +++ b/arm/unittests.cfg @@ -134,6 +134,14 @@ extra_params = -append 'pmu-overflow-interrupt' #groups = pmu #accel = tcg +[spe-introspection] +file = spe.flat +groups = spe +arch = arm64 +extra_params = -append 'spe-introspection' +accel = kvm +arch = arm64 + # Test GIC emulation [gicv2-ipi] file = gic.flat From patchwork Mon Aug 31 19:34:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 275058 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD65AC433E7 for ; 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Mon, 31 Aug 2020 15:34:35 -0400 X-MC-Unique: RB50YXbIM1yGtBsKCVNXEg-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id DF1EC8030DD; Mon, 31 Aug 2020 19:34:33 +0000 (UTC) Received: from laptop.redhat.com (ovpn-112-112.ams2.redhat.com [10.36.112.112]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7169F7EB85; Mon, 31 Aug 2020 19:34:31 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, qemu-devel@nongnu.org, drjones@redhat.com, andrew.murray@arm.com, sudeep.holla@arm.com, maz@kernel.org, will@kernel.org, haibo.xu@linaro.org Subject: [kvm-unit-tests RFC 4/4] spe: Test Profiling Buffer Events Date: Mon, 31 Aug 2020 21:34:14 +0200 Message-Id: <20200831193414.6951-5-eric.auger@redhat.com> In-Reply-To: <20200831193414.6951-1-eric.auger@redhat.com> References: <20200831193414.6951-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Received-SPF: pass client-ip=205.139.110.120; envelope-from=eric.auger@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/31 02:13:08 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Setup the infrastructure to check the occurence of events. The test checks the Buffer Full event occurs when no space is available. The PPI is handled and we check the syndrome register against the expected event. Signed-off-by: Eric Auger --- arm/spe.c | 141 +++++++++++++++++++++++++++++++++++++++++++++- arm/unittests.cfg | 8 +++ 2 files changed, 148 insertions(+), 1 deletion(-) diff --git a/arm/spe.c b/arm/spe.c index 7996f79..2f5ee35 100644 --- a/arm/spe.c +++ b/arm/spe.c @@ -19,6 +19,7 @@ #include "alloc_page.h" #include #include "alloc.h" +#include struct spe { int min_interval; @@ -36,13 +37,37 @@ struct spe { bool unique_record_size; }; +enum spe_event_exception_class { + EC_STAGE1_DATA_ABORT = 0x24, + EC_STAGE2_DATA_ABORT = 0x25, + EC_OTHER = 0, +}; + +struct spe_event { + enum spe_event_exception_class ec; + bool dl; /* data lost */ + bool ea; /* external abort */ + bool s; /* service */ + bool coll; /* collision */ + union { + bool buffer_filled; /* ec = other */ + } mss; +}; + static struct spe spe; +struct spe_stats { + struct spe_event observed; + bool unexpected; +}; +static struct spe_stats spe_stats; + #ifdef __arm__ static bool spe_probe(void) { return false; } static void test_spe_introspection(void) { } static void test_spe_buffer(void) { } +static void test_spe_events(void) { } #else @@ -95,6 +120,16 @@ static void test_spe_buffer(void) { } #define PMSCR_EL1_TS 0x20 #define PMSCR_EL1_PCT 0x40 +#define PMBSR_EL1_COLL 0x10000 +#define PMBSR_EL1_S 0x20000 +#define PMBSR_EL1_EA 0x40000 +#define PMBSR_EL1_DL 0x80000 +#define PMBSR_EL1_EC_SHIFT 26 +#define PMBSR_EL1_EC_MASK 0x3F +#define PMBSR_EL1_MISS_MASK 0xFFFF + +#define SPE_PPI 21 + static int min_interval(uint8_t idr_bits) { switch (idr_bits) { @@ -119,6 +154,44 @@ static int min_interval(uint8_t idr_bits) } } +static int decode_syndrome_register(uint64_t sr, struct spe_event *event, bool verbose) +{ + if (!sr) + return 0; + + if (sr & PMBSR_EL1_S) + event->s = true; + if (sr & PMBSR_EL1_COLL) + event->coll = true; + if (sr & PMBSR_EL1_EA) + event->ea = true; + if (sr & PMBSR_EL1_DL) + event->dl = true; + if (verbose) + report_info("PMBSR_EL1: Service=%d Collision=%d External Fault=%d DataLost=%d", + event->s, event->coll, event->ea, event->dl); + + switch ((sr >> PMBSR_EL1_EC_SHIFT) & PMBSR_EL1_EC_MASK) { + case EC_OTHER: + event->ec = EC_OTHER; + event->mss.buffer_filled = sr & 0x1; + if (verbose) + report_info("PMBSR_EL1: EC = OTHER buffer filled=%d", event->mss.buffer_filled); + break; + case EC_STAGE1_DATA_ABORT: + event->ec = EC_STAGE1_DATA_ABORT; + report_info("PMBSR_EL1: EC = stage 1 data abort"); + break; + case EC_STAGE2_DATA_ABORT: + event->ec = EC_STAGE2_DATA_ABORT; + report_info("PMBSR_EL1: EC = stage 2 data abort"); + break; + default: + return -1; + } + return 0; +} + static bool spe_probe(void) { uint64_t pmbidr_el1, pmsidr_el1; @@ -224,6 +297,13 @@ static void reset(void) /* Make sure the syndrome register is void */ write_sysreg_s(0, PMBSR_EL1); + + memset(&spe_stats, 0, sizeof(spe_stats)); +} + +inline bool event_match(struct spe_event *observed, struct spe_event *expected) +{ + return !memcmp(observed, expected, sizeof(struct spe_event)); } static inline void drain(void) @@ -235,6 +315,7 @@ static inline void drain(void) static void test_spe_buffer(void) { + struct spe_event observed = {}, expected = {}; uint64_t pmbsr_el1, val1, val2; void *addr = malloc(10 * PAGE_SIZE); @@ -290,7 +371,61 @@ static void test_spe_buffer(void) report_info("This corresponds to %ld record(s) of %d bytes", val2 / spe.maxsize, spe.maxsize); pmbsr_el1 = read_sysreg_s(PMBSR_EL1); - report(!pmbsr_el1, "PMBSR_EL1: no event"); + report(!(decode_syndrome_register(pmbsr_el1, &observed, true)) && + event_match(&observed, &expected), "PMBSR_EL1: no event"); + + free(addr); +} + +static void irq_handler(struct pt_regs *regs) +{ + uint32_t irqstat, irqnr; + + irqstat = gic_read_iar(); + irqnr = gic_iar_irqnr(irqstat); + + if (irqnr == SPE_PPI) { + uint64_t pmbsr_el1 = read_sysreg_s(PMBSR_EL1); + + if (decode_syndrome_register(pmbsr_el1, &spe_stats.observed, true)) + spe_stats.unexpected = true; + report_info("SPE IRQ! SR=0x%lx", pmbsr_el1); + write_sysreg_s(0, PMBSR_EL1); + } else { + spe_stats.unexpected = true; + } + gic_write_eoir(irqstat); +} + +static inline bool has_event_occurred(struct spe_event *expected) +{ + return (!spe_stats.unexpected && event_match(&spe_stats.observed, expected)); +} + +static void test_spe_events(void) +{ + struct spe_event expected = {.ec = EC_OTHER, .mss.buffer_filled = true, .s = true}; + void *addr = malloc(10 * PAGE_SIZE); + + gic_enable_defaults(); + install_irq_handler(EL1H_IRQ, irq_handler); + local_irq_enable(); + gic_enable_irq(SPE_PPI); + + reset(); + + /* Willingly set pmblimitr tp pmdptr */ + spe.pmblimitr_el1 = spe.pmbptr_el1; + + mem_access_loop(addr, 100000, spe.pmblimitr_el1 | PMBLIMITR_EL1_E); + drain(); + report(has_event_occurred(&expected), "PMBSR_EL1: buffer full event"); + + /* redo it once */ + + mem_access_loop(addr, 100000, spe.pmblimitr_el1 | PMBLIMITR_EL1_E); + drain(); + report(has_event_occurred(&expected), "PMBSR_EL1: buffer full event"); free(addr); } @@ -317,6 +452,10 @@ int main(int argc, char *argv[]) report_prefix_push(argv[1]); test_spe_buffer(); report_prefix_pop(); + } else if (strcmp(argv[1], "spe-events") == 0) { + report_prefix_push(argv[1]); + test_spe_events(); + report_prefix_pop(); } else { report_abort("Unknown sub-test '%s'", argv[1]); } diff --git a/arm/unittests.cfg b/arm/unittests.cfg index bb0e84c..b2b07be 100644 --- a/arm/unittests.cfg +++ b/arm/unittests.cfg @@ -150,6 +150,14 @@ extra_params = -append 'spe-buffer' accel = kvm arch = arm64 +[spe-events] +file = spe.flat +groups = spe +arch = arm64 +extra_params = -append 'spe-events' +accel = kvm +arch = arm64 + # Test GIC emulation [gicv2-ipi] file = gic.flat