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Wed, 2 Sep 2020 11:53:28 +0000 (UTC) Received: from localhost (ovpn-66-226.rdu2.redhat.com [10.10.66.226]) by smtp.corp.redhat.com (Postfix) with ESMTP id DAB8C7E333; Wed, 2 Sep 2020 11:53:27 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 02/20] mos6522: Rename QOM macros Date: Wed, 2 Sep 2020 07:53:05 -0400 Message-Id: <20200902115323.850385-3-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/02 02:33:32 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang?= =?utf-8?b?w6k=?= , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Rename the MOS6522_DEVICE_CLASS and MOS6522_DEVICE_GET_CLASS macros to be consistent with the TYPE_MOS6522 and MOS6522 macros. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost Message-Id: <20200825192110.3528606-46-ehabkost@redhat.com> Reviewed-by: Peter Maydell Signed-off-by: Eduardo Habkost --- include/hw/misc/mos6522.h | 4 ++-- hw/misc/mac_via.c | 14 +++++++------- hw/misc/macio/cuda.c | 6 +++--- hw/misc/macio/pmu.c | 6 +++--- hw/misc/mos6522.c | 8 ++++---- 5 files changed, 19 insertions(+), 19 deletions(-) diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h index 97384c6e02..6b25ffd439 100644 --- a/include/hw/misc/mos6522.h +++ b/include/hw/misc/mos6522.h @@ -140,9 +140,9 @@ typedef struct MOS6522DeviceClass { uint64_t (*get_timer2_load_time)(MOS6522State *dev, MOS6522Timer *ti); } MOS6522DeviceClass; -#define MOS6522_DEVICE_CLASS(cls) \ +#define MOS6522_CLASS(cls) \ OBJECT_CLASS_CHECK(MOS6522DeviceClass, (cls), TYPE_MOS6522) -#define MOS6522_DEVICE_GET_CLASS(obj) \ +#define MOS6522_GET_CLASS(obj) \ OBJECT_GET_CLASS(MOS6522DeviceClass, (obj), TYPE_MOS6522) extern const VMStateDescription vmstate_mos6522; diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index d76d7b28d3..6db62dab7d 100644 --- a/hw/misc/mac_via.c +++ b/hw/misc/mac_via.c @@ -328,7 +328,7 @@ static void via1_VBL(void *opaque) { MOS6522Q800VIA1State *v1s = opaque; MOS6522State *s = MOS6522(v1s); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(s); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s); s->ifr |= VIA1_IRQ_VBLANK; mdc->update_irq(s); @@ -340,7 +340,7 @@ static void via1_one_second(void *opaque) { MOS6522Q800VIA1State *v1s = opaque; MOS6522State *s = MOS6522(v1s); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(s); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s); s->ifr |= VIA1_IRQ_ONE_SECOND; mdc->update_irq(s); @@ -352,7 +352,7 @@ static void via1_irq_request(void *opaque, int irq, int level) { MOS6522Q800VIA1State *v1s = opaque; MOS6522State *s = MOS6522(v1s); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(s); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s); if (level) { s->ifr |= 1 << irq; @@ -367,7 +367,7 @@ static void via2_irq_request(void *opaque, int irq, int level) { MOS6522Q800VIA2State *v2s = opaque; MOS6522State *s = MOS6522(v2s); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(s); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s); if (level) { s->ifr |= 1 << irq; @@ -1183,7 +1183,7 @@ static TypeInfo mac_via_info = { static void mos6522_q800_via1_reset(DeviceState *dev) { MOS6522State *ms = MOS6522(dev); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms); mdc->parent_reset(dev); @@ -1226,7 +1226,7 @@ static void mos6522_q800_via2_portB_write(MOS6522State *s) static void mos6522_q800_via2_reset(DeviceState *dev) { MOS6522State *ms = MOS6522(dev); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms); mdc->parent_reset(dev); @@ -1246,7 +1246,7 @@ static void mos6522_q800_via2_init(Object *obj) static void mos6522_q800_via2_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc); + MOS6522DeviceClass *mdc = MOS6522_CLASS(oc); dc->reset = mos6522_q800_via2_reset; mdc->portB_write = mos6522_q800_via2_portB_write; diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 286e7a55f4..edbd4186b2 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -96,7 +96,7 @@ static void cuda_set_sr_int(void *opaque) CUDAState *s = opaque; MOS6522CUDAState *mcs = &s->mos6522_cuda; MOS6522State *ms = MOS6522(mcs); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms); mdc->set_sr_int(ms); } @@ -592,7 +592,7 @@ static void mos6522_cuda_portB_write(MOS6522State *s) static void mos6522_cuda_reset(DeviceState *dev) { MOS6522State *ms = MOS6522(dev); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms); mdc->parent_reset(dev); @@ -603,7 +603,7 @@ static void mos6522_cuda_reset(DeviceState *dev) static void mos6522_cuda_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc); + MOS6522DeviceClass *mdc = MOS6522_CLASS(oc); dc->reset = mos6522_cuda_reset; mdc->portB_write = mos6522_cuda_portB_write; diff --git a/hw/misc/macio/pmu.c b/hw/misc/macio/pmu.c index 09022995ad..71924d4768 100644 --- a/hw/misc/macio/pmu.c +++ b/hw/misc/macio/pmu.c @@ -75,7 +75,7 @@ static void via_set_sr_int(void *opaque) PMUState *s = opaque; MOS6522PMUState *mps = MOS6522_PMU(&s->mos6522_pmu); MOS6522State *ms = MOS6522(mps); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms); mdc->set_sr_int(ms); } @@ -834,7 +834,7 @@ static void mos6522_pmu_reset(DeviceState *dev) MOS6522State *ms = MOS6522(dev); MOS6522PMUState *mps = container_of(ms, MOS6522PMUState, parent_obj); PMUState *s = container_of(mps, PMUState, mos6522_pmu); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms); mdc->parent_reset(dev); @@ -847,7 +847,7 @@ static void mos6522_pmu_reset(DeviceState *dev) static void mos6522_pmu_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc); + MOS6522DeviceClass *mdc = MOS6522_CLASS(oc); dc->reset = mos6522_pmu_reset; mdc->portB_write = mos6522_pmu_portB_write; diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c index 19e154b870..ac4cd1d58e 100644 --- a/hw/misc/mos6522.c +++ b/hw/misc/mos6522.c @@ -54,7 +54,7 @@ static void mos6522_update_irq(MOS6522State *s) static uint64_t get_counter_value(MOS6522State *s, MOS6522Timer *ti) { - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(s); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s); if (ti->index == 0) { return mdc->get_timer1_counter_value(s, ti); @@ -65,7 +65,7 @@ static uint64_t get_counter_value(MOS6522State *s, MOS6522Timer *ti) static uint64_t get_load_time(MOS6522State *s, MOS6522Timer *ti) { - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(s); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s); if (ti->index == 0) { return mdc->get_timer1_load_time(s, ti); @@ -313,7 +313,7 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned size) void mos6522_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { MOS6522State *s = opaque; - MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(s); + MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s); trace_mos6522_write(addr, val); @@ -498,7 +498,7 @@ static Property mos6522_properties[] = { static void mos6522_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); - MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc); + MOS6522DeviceClass *mdc = MOS6522_CLASS(oc); dc->reset = mos6522_reset; dc->vmsd = &vmstate_mos6522; From patchwork Wed Sep 2 11:53:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 274856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD65DC433E7 for ; Wed, 2 Sep 2020 11:56:03 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 98DBB206E7 for ; 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Wed, 2 Sep 2020 11:53:31 +0000 (UTC) Received: from localhost (ovpn-66-226.rdu2.redhat.com [10.10.66.226]) by smtp.corp.redhat.com (Postfix) with ESMTP id C94845C1C7; Wed, 2 Sep 2020 11:53:28 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 03/20] x86-iommu: Rename QOM type macros Date: Wed, 2 Sep 2020 07:53:06 -0400 Message-Id: <20200902115323.850385-4-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=63.128.21.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/02 02:42:29 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang?= =?utf-8?b?w6k=?= , Peter Xu , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Some QOM macros were using a X86_IOMMU_DEVICE prefix, and others were using a X86_IOMMU prefix. Rename all of them to use the same X86_IOMMU_DEVICE prefix. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost Message-Id: <20200825192110.3528606-47-ehabkost@redhat.com> Acked-by: Peter Xu Signed-off-by: Eduardo Habkost --- include/hw/i386/x86-iommu.h | 4 ++-- hw/i386/amd_iommu.c | 2 +- hw/i386/intel_iommu.c | 2 +- hw/i386/x86-iommu.c | 2 +- target/i386/kvm.c | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h index 8e10383b11..18420ada15 100644 --- a/include/hw/i386/x86-iommu.h +++ b/include/hw/i386/x86-iommu.h @@ -27,9 +27,9 @@ #define TYPE_X86_IOMMU_DEVICE ("x86-iommu") #define X86_IOMMU_DEVICE(obj) \ OBJECT_CHECK(X86IOMMUState, (obj), TYPE_X86_IOMMU_DEVICE) -#define X86_IOMMU_CLASS(klass) \ +#define X86_IOMMU_DEVICE_CLASS(klass) \ OBJECT_CLASS_CHECK(X86IOMMUClass, (klass), TYPE_X86_IOMMU_DEVICE) -#define X86_IOMMU_GET_CLASS(obj) \ +#define X86_IOMMU_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(X86IOMMUClass, obj, TYPE_X86_IOMMU_DEVICE) #define X86_IOMMU_SID_INVALID (0xffff) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 18411f1dec..74a93a5d93 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1600,7 +1600,7 @@ static void amdvi_instance_init(Object *klass) static void amdvi_class_init(ObjectClass *klass, void* data) { DeviceClass *dc = DEVICE_CLASS(klass); - X86IOMMUClass *dc_class = X86_IOMMU_CLASS(klass); + X86IOMMUClass *dc_class = X86_IOMMU_DEVICE_CLASS(klass); dc->reset = amdvi_reset; dc->vmsd = &vmstate_amdvi; diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 0d7c4303b4..749eb6ad63 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3853,7 +3853,7 @@ static void vtd_realize(DeviceState *dev, Error **errp) static void vtd_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - X86IOMMUClass *x86_class = X86_IOMMU_CLASS(klass); + X86IOMMUClass *x86_class = X86_IOMMU_DEVICE_CLASS(klass); dc->reset = vtd_reset; dc->vmsd = &vtd_vmstate; diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index 4104060e68..5f4301639c 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -107,7 +107,7 @@ IommuType x86_iommu_get_type(void) static void x86_iommu_realize(DeviceState *dev, Error **errp) { X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev); - X86IOMMUClass *x86_class = X86_IOMMU_GET_CLASS(dev); + X86IOMMUClass *x86_class = X86_IOMMU_DEVICE_GET_CLASS(dev); MachineState *ms = MACHINE(qdev_get_machine()); MachineClass *mc = MACHINE_GET_CLASS(ms); PCMachineState *pcms = diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 6f18d940a5..205b68bc0c 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -4607,7 +4607,7 @@ int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, if (iommu) { int ret; MSIMessage src, dst; - X86IOMMUClass *class = X86_IOMMU_GET_CLASS(iommu); + X86IOMMUClass *class = X86_IOMMU_DEVICE_GET_CLASS(iommu); if (!class->int_remap) { return 0; From patchwork Wed Sep 2 11:53:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 274853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9243CC433E2 for ; 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Wed, 02 Sep 2020 07:53:34 -0400 X-MC-Unique: 20ozxN-SNFK4KZeq3xuAlA-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B76258010EB; Wed, 2 Sep 2020 11:53:33 +0000 (UTC) Received: from localhost (ovpn-66-226.rdu2.redhat.com [10.10.66.226]) by smtp.corp.redhat.com (Postfix) with ESMTP id 876E578374; Wed, 2 Sep 2020 11:53:33 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 05/20] arm: Fix typo in AARCH64_CPU_GET_CLASS definition Date: Wed, 2 Sep 2020 07:53:08 -0400 Message-Id: <20200902115323.850385-6-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/02 02:07:24 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang?= =?utf-8?b?w6k=?= , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" There's a typo in the type name of AARCH64_CPU_GET_CLASS. This was never detected because the macro is not used by any code. Signed-off-by: Eduardo Habkost Message-Id: <20200825192110.3528606-52-ehabkost@redhat.com> Reviewed-by: Peter Maydell Signed-off-by: Eduardo Habkost --- target/arm/cpu-qom.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h index 56395b87f6..fdef05cacf 100644 --- a/target/arm/cpu-qom.h +++ b/target/arm/cpu-qom.h @@ -67,7 +67,7 @@ typedef struct ARMCPU ARMCPU; #define AARCH64_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(AArch64CPUClass, (klass), TYPE_AARCH64_CPU) #define AARCH64_CPU_GET_CLASS(obj) \ - OBJECT_GET_CLASS(AArch64CPUClass, (obj), TYPE_AArch64_CPU) + OBJECT_GET_CLASS(AArch64CPUClass, (obj), TYPE_AARCH64_CPU) typedef struct AArch64CPUClass { /*< private >*/ From patchwork Wed Sep 2 11:53:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 274852 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 227A8C433E7 for ; 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Wed, 02 Sep 2020 07:53:41 -0400 X-MC-Unique: 55gXcV06PaOeCpb7zaR4QA-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 8AE0681F00F; Wed, 2 Sep 2020 11:53:40 +0000 (UTC) Received: from localhost (ovpn-66-226.rdu2.redhat.com [10.10.66.226]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5A1A978B20; Wed, 2 Sep 2020 11:53:40 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 09/20] tls-cipher-suites: Correct instance_size Date: Wed, 2 Sep 2020 07:53:12 -0400 Message-Id: <20200902115323.850385-10-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=63.128.21.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/02 02:42:29 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang?= =?utf-8?b?w6k=?= , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We do have a QCryptoTLSCipherSuites struct. It must be used when setting instance_size of the QOM type. Luckily this never caused problems because the QCryptoTLSCipherSuites struct has only a parent_obj field and nothing else. Signed-off-by: Eduardo Habkost Reviewed-by: Daniel P. Berrangé Message-Id: <20200826171005.4055015-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- crypto/tls-cipher-suites.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/crypto/tls-cipher-suites.c b/crypto/tls-cipher-suites.c index 0d305b684b..55fb5f7c19 100644 --- a/crypto/tls-cipher-suites.c +++ b/crypto/tls-cipher-suites.c @@ -108,7 +108,7 @@ static void qcrypto_tls_cipher_suites_class_init(ObjectClass *oc, void *data) static const TypeInfo qcrypto_tls_cipher_suites_info = { .parent = TYPE_QCRYPTO_TLS_CREDS, .name = TYPE_QCRYPTO_TLS_CIPHER_SUITES, - .instance_size = sizeof(QCryptoTLSCreds), + .instance_size = sizeof(QCryptoTLSCipherSuites), .class_size = sizeof(QCryptoTLSCredsClass), .class_init = qcrypto_tls_cipher_suites_class_init, .interfaces = (InterfaceInfo[]) { From patchwork Wed Sep 2 11:53:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 274855 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A710BC433E7 for ; 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Wed, 02 Sep 2020 07:53:44 -0400 X-MC-Unique: uTFbQUsPNvi2raKAsSpA_Q-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 85AC210ABDCD; Wed, 2 Sep 2020 11:53:43 +0000 (UTC) Received: from localhost (ovpn-66-226.rdu2.redhat.com [10.10.66.226]) by smtp.corp.redhat.com (Postfix) with ESMTP id 54E265C1C4; Wed, 2 Sep 2020 11:53:43 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 12/20] Revert "hw/i386: Move arch_id decode inside x86_cpus_init" Date: Wed, 2 Sep 2020 07:53:15 -0400 Message-Id: <20200902115323.850385-13-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/02 03:24:55 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Babu Moger , Igor Mammedov , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Babu Moger This reverts commit 2e26f4ab3bf8390a2677d3afd9b1a04f015d7721. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger Reviewed-by: Igor Mammedov Message-Id: <159889934379.21294.15323080164340490855.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost --- hw/i386/pc.c | 6 +++--- hw/i386/x86.c | 37 +++++++------------------------------ 2 files changed, 10 insertions(+), 33 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 6b708f4341..0677d6a272 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1556,14 +1556,14 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, topo_ids.die_id = cpu->die_id; topo_ids.core_id = cpu->core_id; topo_ids.smt_id = cpu->thread_id; - cpu->apic_id = x86ms->apicid_from_topo_ids(&topo_info, &topo_ids); + cpu->apic_id = x86_apicid_from_topo_ids(&topo_info, &topo_ids); } cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); if (!cpu_slot) { MachineState *ms = MACHINE(pcms); - x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); error_setg(errp, "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" " APIC ID %" PRIu32 ", valid index range 0:%d", @@ -1584,7 +1584,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn() * once -smp refactoring is complete and there will be CPU private * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */ - x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) { error_setg(errp, "property socket-id: %u doesn't match set apic-id:" " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, diff --git a/hw/i386/x86.c b/hw/i386/x86.c index cf384b9743..3cc2318212 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -68,22 +68,6 @@ inline void init_topo_info(X86CPUTopoInfo *topo_info, topo_info->threads_per_core = ms->smp.threads; } -/* - * Set up with the new EPYC topology handlers - * - * AMD uses different apic id encoding for EPYC based cpus. Override - * the default topo handlers with EPYC encoding handlers. - */ -static void x86_set_epyc_topo_handlers(MachineState *machine) -{ - X86MachineState *x86ms = X86_MACHINE(machine); - - x86ms->apicid_from_cpu_idx = x86_apicid_from_cpu_idx_epyc; - x86ms->topo_ids_from_apicid = x86_topo_ids_from_apicid_epyc; - x86ms->apicid_from_topo_ids = x86_apicid_from_topo_ids_epyc; - x86ms->apicid_pkg_offset = apicid_pkg_offset_epyc; -} - /* * Calculates initial APIC ID for a specific CPU index * @@ -102,7 +86,7 @@ uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms, init_topo_info(&topo_info, x86ms); - correct_id = x86ms->apicid_from_cpu_idx(&topo_info, cpu_index); + correct_id = x86_apicid_from_cpu_idx(&topo_info, cpu_index); if (x86mc->compat_apic_id_mode) { if (cpu_index != correct_id && !warned && !qtest_enabled()) { error_report("APIC IDs set in compatibility mode, " @@ -136,11 +120,6 @@ void x86_cpus_init(X86MachineState *x86ms, int default_cpu_version) MachineState *ms = MACHINE(x86ms); MachineClass *mc = MACHINE_GET_CLASS(x86ms); - /* Check for apicid encoding */ - if (cpu_x86_use_epyc_apic_id_encoding(ms->cpu_type)) { - x86_set_epyc_topo_handlers(ms); - } - x86_cpu_set_default_version(default_cpu_version); /* @@ -154,12 +133,6 @@ void x86_cpus_init(X86MachineState *x86ms, int default_cpu_version) x86ms->apic_id_limit = x86_cpu_apic_id_from_index(x86ms, ms->smp.max_cpus - 1) + 1; possible_cpus = mc->possible_cpu_arch_ids(ms); - - for (i = 0; i < ms->possible_cpus->len; i++) { - ms->possible_cpus->cpus[i].arch_id = - x86_cpu_apic_id_from_index(x86ms, i); - } - for (i = 0; i < ms->smp.cpus; i++) { x86_cpu_new(x86ms, possible_cpus->cpus[i].arch_id, &error_fatal); } @@ -184,7 +157,8 @@ int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx) init_topo_info(&topo_info, x86ms); assert(idx < ms->possible_cpus->len); - x86_topo_ids_from_idx(&topo_info, idx, &topo_ids); + x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, + &topo_info, &topo_ids); return topo_ids.pkg_id % ms->numa_state->num_nodes; } @@ -215,7 +189,10 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms) ms->possible_cpus->cpus[i].type = ms->cpu_type; ms->possible_cpus->cpus[i].vcpus_count = 1; - x86_topo_ids_from_idx(&topo_info, i, &topo_ids); + ms->possible_cpus->cpus[i].arch_id = + x86_cpu_apic_id_from_index(x86ms, i); + x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, + &topo_info, &topo_ids); ms->possible_cpus->cpus[i].props.has_socket_id = true; ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id; if (x86ms->smp_dies > 1) { From patchwork Wed Sep 2 11:53:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 274854 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E808C433E2 for ; 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Wed, 02 Sep 2020 07:53:45 -0400 X-MC-Unique: D9WKrV5tPyK7nZ256Mdncw-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 7D2DA801FD4; Wed, 2 Sep 2020 11:53:44 +0000 (UTC) Received: from localhost (ovpn-66-226.rdu2.redhat.com [10.10.66.226]) by smtp.corp.redhat.com (Postfix) with ESMTP id 472967C609; Wed, 2 Sep 2020 11:53:44 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 13/20] Revert "i386: Introduce use_epyc_apic_id_encoding in X86CPUDefinition" Date: Wed, 2 Sep 2020 07:53:16 -0400 Message-Id: <20200902115323.850385-14-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 Authentication-Results: relay.mimecast.com; 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Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger Reviewed-by: Igor Mammedov Message-Id: <159889935015.21294.1425332462852607813.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.h | 1 - target/i386/cpu.c | 16 ---------------- 2 files changed, 17 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index d5ad42d694..5ff8ad8427 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1918,7 +1918,6 @@ void cpu_clear_apic_feature(CPUX86State *env); void host_cpuid(uint32_t function, uint32_t count, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx); void host_vendor_fms(char *vendor, int *family, int *model, int *stepping); -bool cpu_x86_use_epyc_apic_id_encoding(const char *cpu_type); /* helper.c */ bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size, diff --git a/target/i386/cpu.c b/target/i386/cpu.c index c9c1e681c2..b72b4b08ac 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1638,10 +1638,6 @@ typedef struct X86CPUDefinition { FeatureWordArray features; const char *model_id; CPUCaches *cache_info; - - /* Use AMD EPYC encoding for apic id */ - bool use_epyc_apic_id_encoding; - /* * Definitions for alternative versions of CPU model. * List is terminated by item with version == 0. @@ -1683,18 +1679,6 @@ static const X86CPUVersionDefinition *x86_cpu_def_get_versions(X86CPUDefinition return def->versions ?: default_version_list; } -bool cpu_x86_use_epyc_apic_id_encoding(const char *cpu_type) -{ - X86CPUClass *xcc = X86_CPU_CLASS(object_class_by_name(cpu_type)); - - assert(xcc); - if (xcc->model && xcc->model->cpudef) { - return xcc->model->cpudef->use_epyc_apic_id_encoding; - } else { - return false; - } -} - static CPUCaches epyc_cache_info = { .l1d_cache = &(CPUCacheInfo) { .type = DATA_CACHE, From patchwork Wed Sep 2 11:53:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 274849 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0DE8C433E2 for ; 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Wed, 02 Sep 2020 07:53:46 -0400 X-MC-Unique: yBGZo2cKO92lhjcd0DxowA-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6DDC41DE0F; Wed, 2 Sep 2020 11:53:45 +0000 (UTC) Received: from localhost (ovpn-66-226.rdu2.redhat.com [10.10.66.226]) by smtp.corp.redhat.com (Postfix) with ESMTP id 31EBE1055A43; Wed, 2 Sep 2020 11:53:45 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 14/20] Revert "hw/i386: Introduce apicid functions inside X86MachineState" Date: Wed, 2 Sep 2020 07:53:17 -0400 Message-Id: <20200902115323.850385-15-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/02 03:24:55 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Babu Moger , Igor Mammedov , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Babu Moger This reverts commit 6121c7fbfd98dbc3af1b00b56ff2eef66df87828. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger Reviewed-by: Igor Mammedov Message-Id: <159889935648.21294.8095493980805969544.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost --- include/hw/i386/x86.h | 9 --------- hw/i386/x86.c | 5 ----- 2 files changed, 14 deletions(-) diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index b79f24e285..4d9a26326d 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -63,15 +63,6 @@ typedef struct { OnOffAuto smm; OnOffAuto acpi; - /* Apic id specific handlers */ - uint32_t (*apicid_from_cpu_idx)(X86CPUTopoInfo *topo_info, - unsigned cpu_index); - void (*topo_ids_from_apicid)(apic_id_t apicid, X86CPUTopoInfo *topo_info, - X86CPUTopoIDs *topo_ids); - apic_id_t (*apicid_from_topo_ids)(X86CPUTopoInfo *topo_info, - const X86CPUTopoIDs *topo_ids); - uint32_t (*apicid_pkg_offset)(X86CPUTopoInfo *topo_info); - /* * Address space used by IOAPIC device. All IOAPIC interrupts * will be translated to MSI messages in the address space. diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 3cc2318212..727c4a0f1d 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -896,11 +896,6 @@ static void x86_machine_initfn(Object *obj) x86ms->smm = ON_OFF_AUTO_AUTO; x86ms->acpi = ON_OFF_AUTO_AUTO; x86ms->smp_dies = 1; - - x86ms->apicid_from_cpu_idx = x86_apicid_from_cpu_idx; - x86ms->topo_ids_from_apicid = x86_topo_ids_from_apicid; - x86ms->apicid_from_topo_ids = x86_apicid_from_topo_ids; - x86ms->apicid_pkg_offset = apicid_pkg_offset; } static void x86_machine_class_init(ObjectClass *oc, void *data) From patchwork Wed Sep 2 11:53:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 274851 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D7A5C433E7 for ; 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Wed, 02 Sep 2020 07:53:47 -0400 X-MC-Unique: lQ6pl8hINZ2osAMGEPxx-g-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 4AF9C10ABDC2; Wed, 2 Sep 2020 11:53:46 +0000 (UTC) Received: from localhost (ovpn-66-226.rdu2.redhat.com [10.10.66.226]) by smtp.corp.redhat.com (Postfix) with ESMTP id 186765D9CC; Wed, 2 Sep 2020 11:53:46 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 15/20] Revert "target/i386: Cleanup and use the EPYC mode topology functions" Date: Wed, 2 Sep 2020 07:53:18 -0400 Message-Id: <20200902115323.850385-16-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/02 02:07:24 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Babu Moger , Igor Mammedov , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Babu Moger This reverts commit dd08ef0318e2b61d14bc069590d174913f7f437a. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger Reviewed-by: Igor Mammedov Message-Id: <159889936257.21294.1786224705357428082.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 161 ++++++++++++++++++++++++++++++++++++---------- 1 file changed, 127 insertions(+), 34 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index b72b4b08ac..256bfa669f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -338,15 +338,68 @@ static void encode_cache_cpuid80000006(CPUCacheInfo *l2, } } +/* + * Definitions used for building CPUID Leaf 0x8000001D and 0x8000001E + * Please refer to the AMD64 Architecture Programmer’s Manual Volume 3. + * Define the constants to build the cpu topology. Right now, TOPOEXT + * feature is enabled only on EPYC. So, these constants are based on + * EPYC supported configurations. We may need to handle the cases if + * these values change in future. + */ +/* Maximum core complexes in a node */ +#define MAX_CCX 2 +/* Maximum cores in a core complex */ +#define MAX_CORES_IN_CCX 4 +/* Maximum cores in a node */ +#define MAX_CORES_IN_NODE 8 +/* Maximum nodes in a socket */ +#define MAX_NODES_PER_SOCKET 4 + +/* + * Figure out the number of nodes required to build this config. + * Max cores in a node is 8 + */ +static int nodes_in_socket(int nr_cores) +{ + int nodes; + + nodes = DIV_ROUND_UP(nr_cores, MAX_CORES_IN_NODE); + + /* Hardware does not support config with 3 nodes, return 4 in that case */ + return (nodes == 3) ? 4 : nodes; +} + +/* + * Decide the number of cores in a core complex with the given nr_cores using + * following set constants MAX_CCX, MAX_CORES_IN_CCX, MAX_CORES_IN_NODE and + * MAX_NODES_PER_SOCKET. Maintain symmetry as much as possible + * L3 cache is shared across all cores in a core complex. So, this will also + * tell us how many cores are sharing the L3 cache. + */ +static int cores_in_core_complex(int nr_cores) +{ + int nodes; + + /* Check if we can fit all the cores in one core complex */ + if (nr_cores <= MAX_CORES_IN_CCX) { + return nr_cores; + } + /* Get the number of nodes required to build this config */ + nodes = nodes_in_socket(nr_cores); + + /* + * Divide the cores accros all the core complexes + * Return rounded up value + */ + return DIV_ROUND_UP(nr_cores, nodes * MAX_CCX); +} + /* Encode cache info for CPUID[8000001D] */ -static void encode_cache_cpuid8000001d(CPUCacheInfo *cache, - X86CPUTopoInfo *topo_info, - uint32_t *eax, uint32_t *ebx, - uint32_t *ecx, uint32_t *edx) +static void encode_cache_cpuid8000001d(CPUCacheInfo *cache, CPUState *cs, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx) { uint32_t l3_cores; - unsigned nodes = MAX(topo_info->nodes_per_pkg, 1); - assert(cache->size == cache->line_size * cache->associativity * cache->partitions * cache->sets); @@ -355,13 +408,10 @@ static void encode_cache_cpuid8000001d(CPUCacheInfo *cache, /* L3 is shared among multiple cores */ if (cache->level == 3) { - l3_cores = DIV_ROUND_UP((topo_info->dies_per_pkg * - topo_info->cores_per_die * - topo_info->threads_per_core), - nodes); - *eax |= (l3_cores - 1) << 14; + l3_cores = cores_in_core_complex(cs->nr_cores); + *eax |= ((l3_cores * cs->nr_threads) - 1) << 14; } else { - *eax |= ((topo_info->threads_per_core - 1) << 14); + *eax |= ((cs->nr_threads - 1) << 14); } assert(cache->line_size > 0); @@ -381,17 +431,55 @@ static void encode_cache_cpuid8000001d(CPUCacheInfo *cache, (cache->complex_indexing ? CACHE_COMPLEX_IDX : 0); } +/* Data structure to hold the configuration info for a given core index */ +struct core_topology { + /* core complex id of the current core index */ + int ccx_id; + /* + * Adjusted core index for this core in the topology + * This can be 0,1,2,3 with max 4 cores in a core complex + */ + int core_id; + /* Node id for this core index */ + int node_id; + /* Number of nodes in this config */ + int num_nodes; +}; + +/* + * Build the configuration closely match the EPYC hardware. Using the EPYC + * hardware configuration values (MAX_CCX, MAX_CORES_IN_CCX, MAX_CORES_IN_NODE) + * right now. This could change in future. + * nr_cores : Total number of cores in the config + * core_id : Core index of the current CPU + * topo : Data structure to hold all the config info for this core index + */ +static void build_core_topology(int nr_cores, int core_id, + struct core_topology *topo) +{ + int nodes, cores_in_ccx; + + /* First get the number of nodes required */ + nodes = nodes_in_socket(nr_cores); + + cores_in_ccx = cores_in_core_complex(nr_cores); + + topo->node_id = core_id / (cores_in_ccx * MAX_CCX); + topo->ccx_id = (core_id % (cores_in_ccx * MAX_CCX)) / cores_in_ccx; + topo->core_id = core_id % cores_in_ccx; + topo->num_nodes = nodes; +} + /* Encode cache info for CPUID[8000001E] */ -static void encode_topo_cpuid8000001e(X86CPUTopoInfo *topo_info, X86CPU *cpu, +static void encode_topo_cpuid8000001e(CPUState *cs, X86CPU *cpu, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { - X86CPUTopoIDs topo_ids = {0}; - unsigned long nodes = MAX(topo_info->nodes_per_pkg, 1); + struct core_topology topo = {0}; + unsigned long nodes; int shift; - x86_topo_ids_from_apicid_epyc(cpu->apic_id, topo_info, &topo_ids); - + build_core_topology(cs->nr_cores, cpu->core_id, &topo); *eax = cpu->apic_id; /* * CPUID_Fn8000001E_EBX @@ -408,8 +496,12 @@ static void encode_topo_cpuid8000001e(X86CPUTopoInfo *topo_info, X86CPU *cpu, * 3 Core complex id * 1:0 Core id */ - *ebx = ((topo_info->threads_per_core - 1) << 8) | (topo_ids.node_id << 3) | - (topo_ids.core_id); + if (cs->nr_threads - 1) { + *ebx = ((cs->nr_threads - 1) << 8) | (topo.node_id << 3) | + (topo.ccx_id << 2) | topo.core_id; + } else { + *ebx = (topo.node_id << 4) | (topo.ccx_id << 3) | topo.core_id; + } /* * CPUID_Fn8000001E_ECX * 31:11 Reserved @@ -418,8 +510,9 @@ static void encode_topo_cpuid8000001e(X86CPUTopoInfo *topo_info, X86CPU *cpu, * 2 Socket id * 1:0 Node id */ - if (nodes <= 4) { - *ecx = ((nodes - 1) << 8) | (topo_ids.pkg_id << 2) | topo_ids.node_id; + if (topo.num_nodes <= 4) { + *ecx = ((topo.num_nodes - 1) << 8) | (cpu->socket_id << 2) | + topo.node_id; } else { /* * Node id fix up. Actual hardware supports up to 4 nodes. But with @@ -434,10 +527,10 @@ static void encode_topo_cpuid8000001e(X86CPUTopoInfo *topo_info, X86CPU *cpu, * number of nodes. find_last_bit returns last set bit(0 based). Left * shift(+1) the socket id to represent all the nodes. */ - nodes -= 1; + nodes = topo.num_nodes - 1; shift = find_last_bit(&nodes, 8); - *ecx = (nodes << 8) | (topo_ids.pkg_id << (shift + 1)) | - topo_ids.node_id; + *ecx = ((topo.num_nodes - 1) << 8) | (cpu->socket_id << (shift + 1)) | + topo.node_id; } *edx = 0; } @@ -5471,7 +5564,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, uint32_t signature[3]; X86CPUTopoInfo topo_info; - topo_info.nodes_per_pkg = env->nr_nodes; topo_info.dies_per_pkg = env->nr_dies; topo_info.cores_per_die = cs->nr_cores; topo_info.threads_per_core = cs->nr_threads; @@ -5902,20 +5994,20 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, } switch (count) { case 0: /* L1 dcache info */ - encode_cache_cpuid8000001d(env->cache_info_amd.l1d_cache, - &topo_info, eax, ebx, ecx, edx); + encode_cache_cpuid8000001d(env->cache_info_amd.l1d_cache, cs, + eax, ebx, ecx, edx); break; case 1: /* L1 icache info */ - encode_cache_cpuid8000001d(env->cache_info_amd.l1i_cache, - &topo_info, eax, ebx, ecx, edx); + encode_cache_cpuid8000001d(env->cache_info_amd.l1i_cache, cs, + eax, ebx, ecx, edx); break; case 2: /* L2 cache info */ - encode_cache_cpuid8000001d(env->cache_info_amd.l2_cache, - &topo_info, eax, ebx, ecx, edx); + encode_cache_cpuid8000001d(env->cache_info_amd.l2_cache, cs, + eax, ebx, ecx, edx); break; case 3: /* L3 cache info */ - encode_cache_cpuid8000001d(env->cache_info_amd.l3_cache, - &topo_info, eax, ebx, ecx, edx); + encode_cache_cpuid8000001d(env->cache_info_amd.l3_cache, cs, + eax, ebx, ecx, edx); break; default: /* end of info */ *eax = *ebx = *ecx = *edx = 0; @@ -5924,7 +6016,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; case 0x8000001E: assert(cpu->core_id <= 255); - encode_topo_cpuid8000001e(&topo_info, cpu, eax, ebx, ecx, edx); + encode_topo_cpuid8000001e(cs, cpu, + eax, ebx, ecx, edx); break; case 0xC0000000: *eax = env->cpuid_xlevel2; From patchwork Wed Sep 2 11:53:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 274850 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA8CFC433E2 for ; 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Wed, 02 Sep 2020 07:53:49 -0400 X-MC-Unique: b6vJUOIDPCuD0j2uSWR6VA-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 4634C81F009; Wed, 2 Sep 2020 11:53:48 +0000 (UTC) Received: from localhost (ovpn-66-226.rdu2.redhat.com [10.10.66.226]) by smtp.corp.redhat.com (Postfix) with ESMTP id 104357EEB4; Wed, 2 Sep 2020 11:53:47 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 17/20] Revert "hw/i386: Update structures to save the number of nodes per package" Date: Wed, 2 Sep 2020 07:53:20 -0400 Message-Id: <20200902115323.850385-18-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=216.205.24.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/02 01:13:52 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Babu Moger , Igor Mammedov , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Babu Moger This reverts commit c24a41bb53c0854d22c96b30d57cfcaa543c409d. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger Reviewed-by: Igor Mammedov Message-Id: <159889937478.21294.4192291354416942986.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost --- include/hw/i386/topology.h | 1 - target/i386/cpu.h | 1 - hw/i386/pc.c | 1 - hw/i386/x86.c | 1 - target/i386/cpu.c | 1 - tests/test-x86-cpuid.c | 40 +++++++++++++++++++------------------- 6 files changed, 20 insertions(+), 25 deletions(-) diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index b9593b9905..81573f6cfd 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -53,7 +53,6 @@ typedef struct X86CPUTopoIDs { } X86CPUTopoIDs; typedef struct X86CPUTopoInfo { - unsigned nodes_per_pkg; unsigned dies_per_pkg; unsigned cores_per_die; unsigned threads_per_core; diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 5ff8ad8427..d3097be6a5 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1629,7 +1629,6 @@ typedef struct CPUX86State { TPRAccess tpr_access_type; unsigned nr_dies; - unsigned nr_nodes; } CPUX86State; struct kvm_msrs; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 0677d6a272..d11daacc23 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1501,7 +1501,6 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, init_topo_info(&topo_info, x86ms); env->nr_dies = x86ms->smp_dies; - env->nr_nodes = topo_info.nodes_per_pkg; /* * If APIC ID is not set, diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 727c4a0f1d..c1954db152 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -62,7 +62,6 @@ inline void init_topo_info(X86CPUTopoInfo *topo_info, { MachineState *ms = MACHINE(x86ms); - topo_info->nodes_per_pkg = ms->numa_state->num_nodes / ms->smp.sockets; topo_info->dies_per_pkg = x86ms->smp_dies; topo_info->cores_per_die = ms->smp.cores; topo_info->threads_per_core = ms->smp.threads; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 256bfa669f..ba4667b33c 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7023,7 +7023,6 @@ static void x86_cpu_initfn(Object *obj) FeatureWord w; env->nr_dies = 1; - env->nr_nodes = 1; cpu_set_cpustate_pointers(cpu); object_property_add(obj, "family", "int", diff --git a/tests/test-x86-cpuid.c b/tests/test-x86-cpuid.c index 049030a50e..bfabc0403a 100644 --- a/tests/test-x86-cpuid.c +++ b/tests/test-x86-cpuid.c @@ -31,12 +31,12 @@ static void test_topo_bits(void) X86CPUTopoInfo topo_info = {0}; /* simple tests for 1 thread per core, 1 core per die, 1 die per package */ - topo_info = (X86CPUTopoInfo) {0, 1, 1, 1}; + topo_info = (X86CPUTopoInfo) {1, 1, 1}; g_assert_cmpuint(apicid_smt_width(&topo_info), ==, 0); g_assert_cmpuint(apicid_core_width(&topo_info), ==, 0); g_assert_cmpuint(apicid_die_width(&topo_info), ==, 0); - topo_info = (X86CPUTopoInfo) {0, 1, 1, 1}; + topo_info = (X86CPUTopoInfo) {1, 1, 1}; g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 0), ==, 0); g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1), ==, 1); g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2), ==, 2); @@ -45,39 +45,39 @@ static void test_topo_bits(void) /* Test field width calculation for multiple values */ - topo_info = (X86CPUTopoInfo) {0, 1, 1, 2}; + topo_info = (X86CPUTopoInfo) {1, 1, 2}; g_assert_cmpuint(apicid_smt_width(&topo_info), ==, 1); - topo_info = (X86CPUTopoInfo) {0, 1, 1, 3}; + topo_info = (X86CPUTopoInfo) {1, 1, 3}; g_assert_cmpuint(apicid_smt_width(&topo_info), ==, 2); - topo_info = (X86CPUTopoInfo) {0, 1, 1, 4}; + topo_info = (X86CPUTopoInfo) {1, 1, 4}; g_assert_cmpuint(apicid_smt_width(&topo_info), ==, 2); - topo_info = (X86CPUTopoInfo) {0, 1, 1, 14}; + topo_info = (X86CPUTopoInfo) {1, 1, 14}; g_assert_cmpuint(apicid_smt_width(&topo_info), ==, 4); - topo_info = (X86CPUTopoInfo) {0, 1, 1, 15}; + topo_info = (X86CPUTopoInfo) {1, 1, 15}; g_assert_cmpuint(apicid_smt_width(&topo_info), ==, 4); - topo_info = (X86CPUTopoInfo) {0, 1, 1, 16}; + topo_info = (X86CPUTopoInfo) {1, 1, 16}; g_assert_cmpuint(apicid_smt_width(&topo_info), ==, 4); - topo_info = (X86CPUTopoInfo) {0, 1, 1, 17}; + topo_info = (X86CPUTopoInfo) {1, 1, 17}; g_assert_cmpuint(apicid_smt_width(&topo_info), ==, 5); - topo_info = (X86CPUTopoInfo) {0, 1, 30, 2}; + topo_info = (X86CPUTopoInfo) {1, 30, 2}; g_assert_cmpuint(apicid_core_width(&topo_info), ==, 5); - topo_info = (X86CPUTopoInfo) {0, 1, 31, 2}; + topo_info = (X86CPUTopoInfo) {1, 31, 2}; g_assert_cmpuint(apicid_core_width(&topo_info), ==, 5); - topo_info = (X86CPUTopoInfo) {0, 1, 32, 2}; + topo_info = (X86CPUTopoInfo) {1, 32, 2}; g_assert_cmpuint(apicid_core_width(&topo_info), ==, 5); - topo_info = (X86CPUTopoInfo) {0, 1, 33, 2}; + topo_info = (X86CPUTopoInfo) {1, 33, 2}; g_assert_cmpuint(apicid_core_width(&topo_info), ==, 6); - topo_info = (X86CPUTopoInfo) {0, 1, 30, 2}; + topo_info = (X86CPUTopoInfo) {1, 30, 2}; g_assert_cmpuint(apicid_die_width(&topo_info), ==, 0); - topo_info = (X86CPUTopoInfo) {0, 2, 30, 2}; + topo_info = (X86CPUTopoInfo) {2, 30, 2}; g_assert_cmpuint(apicid_die_width(&topo_info), ==, 1); - topo_info = (X86CPUTopoInfo) {0, 3, 30, 2}; + topo_info = (X86CPUTopoInfo) {3, 30, 2}; g_assert_cmpuint(apicid_die_width(&topo_info), ==, 2); - topo_info = (X86CPUTopoInfo) {0, 4, 30, 2}; + topo_info = (X86CPUTopoInfo) {4, 30, 2}; g_assert_cmpuint(apicid_die_width(&topo_info), ==, 2); /* build a weird topology and see if IDs are calculated correctly @@ -85,18 +85,18 @@ static void test_topo_bits(void) /* This will use 2 bits for thread ID and 3 bits for core ID */ - topo_info = (X86CPUTopoInfo) {0, 1, 6, 3}; + topo_info = (X86CPUTopoInfo) {1, 6, 3}; g_assert_cmpuint(apicid_smt_width(&topo_info), ==, 2); g_assert_cmpuint(apicid_core_offset(&topo_info), ==, 2); g_assert_cmpuint(apicid_die_offset(&topo_info), ==, 5); g_assert_cmpuint(apicid_pkg_offset(&topo_info), ==, 5); - topo_info = (X86CPUTopoInfo) {0, 1, 6, 3}; + topo_info = (X86CPUTopoInfo) {1, 6, 3}; g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 0), ==, 0); g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1), ==, 1); g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2), ==, 2); - topo_info = (X86CPUTopoInfo) {0, 1, 6, 3}; + topo_info = (X86CPUTopoInfo) {1, 6, 3}; g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 3 + 0), ==, (1 << 2) | 0); g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 3 + 1), ==, From patchwork Wed Sep 2 11:53:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 274848 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D32BC433E2 for ; Wed, 2 Sep 2020 12:04:48 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 343FE2078B for ; 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Wed, 2 Sep 2020 11:53:53 +0000 (UTC) Received: from localhost (ovpn-66-226.rdu2.redhat.com [10.10.66.226]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7CF225D9CD; Wed, 2 Sep 2020 11:53:53 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 19/20] target/i386/cpu: Fix memleak in x86_cpu_class_check_missing_features Date: Wed, 2 Sep 2020 07:53:22 -0400 Message-Id: <20200902115323.850385-20-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=63.128.21.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/02 02:42:29 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Li Qiang , Pan Nengyuan , Markus Armbruster , Euler Robot , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Pan Nengyuan 'err' forgot to free in x86_cpu_class_check_missing_features error path. Fix that. Reported-by: Euler Robot Signed-off-by: Pan Nengyuan Reviewed-by: Li Qiang Reviewed-by: Markus Armbruster Message-Id: <20200831134315.1221-7-pannengyuan@huawei.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index ba4667b33c..49d8958528 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4947,6 +4947,7 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc, new->value = g_strdup("type"); *next = new; next = &new->next; + error_free(err); } x86_cpu_filter_features(xc, false);