From patchwork Mon Sep 28 17:15:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 304259 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 390A3C4727E for ; Mon, 28 Sep 2020 17:17:31 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BA9D6208D5 for ; Mon, 28 Sep 2020 17:17:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="R+Khkhq6" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BA9D6208D5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:53030 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kMwmH-0005sY-My for qemu-devel@archiver.kernel.org; Mon, 28 Sep 2020 13:17:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45864) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kMwkg-0004B1-TQ for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:15:50 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:39181) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kMwka-0006KO-RW for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:15:50 -0400 Received: by mail-wr1-x441.google.com with SMTP id k10so2212262wru.6 for ; Mon, 28 Sep 2020 10:15:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tEiQnyrePNI+SA5QcWB5N9e6IHcTd69FaWZKVkP2uZM=; b=R+Khkhq6C3muXCn8UA/xx8ZuX0GdytX17BoZpEA83SH+ZrjpJ36yP61wvjIYhFA6WE cyHo94UlCKVPD1WuBBXQwhA5N6ez3uzah64J+ncpM8+FSRvnVtGu07dPsU1QyH+JT9FU ddNIgX1bZmAQHoiEFEB8SpYEOoxTuDbfOAKNeek8wUPXzjcaPUtkKVNudNBA2UwOqpz8 nJWRurXXF1DDy5uhrN/K6OAltTuLfsRI/7q+pzCgjTTGHjnDTlfuaqttmXJOhVBWVW3e lWOLe600k6960nqcgAGb+tbY0yVxRRujLMB/U73mG3VjUbL0PueyEpLsv/K1KGiHMwB7 IAlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=tEiQnyrePNI+SA5QcWB5N9e6IHcTd69FaWZKVkP2uZM=; b=AC7IeB2Z4imZ2G7X+dldEfhqz8/o8boVKW5rzWqMDChddSA/diaUxJtHmK2dlfhiHU V/rRddU05t7kY6PUpEa6nhFb6BUYLRNihGszLpaHTMuafA51feSzYNkRdMPicb4NS7ww M2X5WukOCJLayVMCWfrIKdKgNRJJG2wbmqIMQZ1TKjTevnMCcIW/P7O9+/DxOPGWWcbt fZUzHyFZ2R62DX5jOQ3bC1ucnbStr/pB+lAamPr8glu/izecYFhScmjaDlqgfF+mivfQ iec8F91jDklm/O5enKvc07JuJuzWucW+I+aJg8WdEh+byK8v+LqKei4o4fdTzsUNW8bX 4uLw== X-Gm-Message-State: AOAM530iGS8Uj50VdO5qrIOlLrUzlS/ouYyejzpaydhlYjaQ6i35e9Eo 20+EBHR2SpYYFHcAiINdw+fajiUZmH4= X-Google-Smtp-Source: ABdhPJz8H+WYfCEcF040REWDSx5gl2HXfOX3SOuwGT5J909C4q0wNdhCusE7/uXn0b8x34T4rf0dpg== X-Received: by 2002:adf:d089:: with SMTP id y9mr2705178wrh.234.1601313343215; Mon, 28 Sep 2020 10:15:43 -0700 (PDT) Received: from localhost.localdomain (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.15.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:15:42 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 01/16] hw/core/cpu: Let CPU object have a clock source Date: Mon, 28 Sep 2020 19:15:24 +0200 Message-Id: <20200928171539.788309-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Let CPUState have a clock source (named 'clk') and CPUClass have a clock_update() callback. The clock can be optionally set Using qdev_connect_clock_in() from the Clock API. If the clock changes, the optional clock_update() will be called. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 5 +++++ hw/core/cpu.c | 12 ++++++++++++ 2 files changed, 17 insertions(+) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 6c34798c8b3..6989d90c193 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -31,6 +31,7 @@ #include "qemu/thread.h" #include "qemu/plugin.h" #include "qom/object.h" +#include "hw/clock.h" typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size, void *opaque); @@ -155,6 +156,7 @@ struct TranslationBlock; * @disas_set_info: Setup architecture specific components of disassembly info * @adjust_watchpoint_address: Perform a target-specific adjustment to an * address before attempting to match it against watchpoints. + * @clock_update: Callback for input clock changes * * Represents a CPU family or model. */ @@ -176,6 +178,7 @@ struct CPUClass { unsigned size, MMUAccessType access_type, int mmu_idx, MemTxAttrs attrs, MemTxResult response, uintptr_t retaddr); + void (*clock_update)(CPUState *cpu); bool (*virtio_is_big_endian)(CPUState *cpu); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, uint8_t *buf, int len, bool is_write); @@ -316,6 +319,7 @@ struct qemu_work_item; * QOM parent. * @nr_cores: Number of cores within this CPU package. * @nr_threads: Number of threads within this CPU. + * @clock: this CPU source clock (an output clock of another device) * @running: #true if CPU is currently running (lockless). * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end; * valid under cpu_list_lock. @@ -400,6 +404,7 @@ struct CPUState { int num_ases; AddressSpace *as; MemoryRegion *memory; + Clock *clock; void *env_ptr; /* CPUArchState */ IcountDecr *icount_decr_ptr; diff --git a/hw/core/cpu.c b/hw/core/cpu.c index c55c09f734c..37fcff3ec64 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -30,6 +30,7 @@ #include "qemu/qemu-print.h" #include "sysemu/tcg.h" #include "hw/boards.h" +#include "hw/qdev-clock.h" #include "hw/qdev-properties.h" #include "trace/trace-root.h" #include "qemu/plugin.h" @@ -247,6 +248,16 @@ void cpu_reset(CPUState *cpu) trace_guest_cpu_reset(cpu); } +static void cpu_clk_update(void *opaque) +{ + CPUState *cpu = opaque; + CPUClass *cc = CPU_GET_CLASS(cpu); + + if (cc->clock_update) { + cc->clock_update(cpu); + } +} + static void cpu_common_reset(DeviceState *dev) { CPUState *cpu = CPU(dev); @@ -367,6 +378,7 @@ static void cpu_common_initfn(Object *obj) /* the default value is changed by qemu_init_vcpu() for softmmu */ cpu->nr_cores = 1; cpu->nr_threads = 1; + cpu->clock = qdev_init_clock_in(DEVICE(obj), "clk", cpu_clk_update, cpu); qemu_mutex_init(&cpu->work_mutex); QSIMPLEQ_INIT(&cpu->work_list); From patchwork Mon Sep 28 17:15:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 272579 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64739C47423 for ; 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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.15.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:15:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 02/16] target/mips: Move cpu_mips_get_random() with CP0 helpers Date: Mon, 28 Sep 2020 19:15:25 +0200 Message-Id: <20200928171539.788309-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The get_random() helper uses the CP0_Wired register, which is unrelated to the CP0_Count register use as timer. Commit e16fe40c872 ("Move the MIPS CPU timer in a separate file") incorrectly moved this get_random() helper with timer specific code. Move it back to generic CP0 helpers. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Markovic Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
--- target/mips/internal.h | 2 +- target/mips/cp0_helper.c | 25 +++++++++++++++++++++++++ target/mips/cp0_timer.c | 25 ------------------------- 3 files changed, 26 insertions(+), 26 deletions(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index 7f159a9230c..087cabaa6d4 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -144,6 +144,7 @@ void r4k_helper_tlbr(CPUMIPSState *env); void r4k_helper_tlbinv(CPUMIPSState *env); void r4k_helper_tlbinvf(CPUMIPSState *env); void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra); +uint32_t cpu_mips_get_random(CPUMIPSState *env); void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, unsigned size, @@ -209,7 +210,6 @@ void cpu_state_reset(CPUMIPSState *s); void cpu_mips_realize_env(CPUMIPSState *env); /* cp0_timer.c */ -uint32_t cpu_mips_get_random(CPUMIPSState *env); uint32_t cpu_mips_get_count(CPUMIPSState *env); void cpu_mips_store_count(CPUMIPSState *env, uint32_t value); void cpu_mips_store_compare(CPUMIPSState *env, uint32_t value); diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c index de64add038b..12143ac55b9 100644 --- a/target/mips/cp0_helper.c +++ b/target/mips/cp0_helper.c @@ -203,6 +203,31 @@ static void sync_c0_entryhi(CPUMIPSState *cpu, int tc) *tcst |= asid; } +/* XXX: do not use a global */ +uint32_t cpu_mips_get_random(CPUMIPSState *env) +{ + static uint32_t seed = 1; + static uint32_t prev_idx; + uint32_t idx; + uint32_t nb_rand_tlb = env->tlb->nb_tlb - env->CP0_Wired; + + if (nb_rand_tlb == 1) { + return env->tlb->nb_tlb - 1; + } + + /* Don't return same value twice, so get another value */ + do { + /* + * Use a simple algorithm of Linear Congruential Generator + * from ISO/IEC 9899 standard. + */ + seed = 1103515245 * seed + 12345; + idx = (seed >> 16) % nb_rand_tlb + env->CP0_Wired; + } while (idx == prev_idx); + prev_idx = idx; + return idx; +} + /* CP0 helpers */ target_ulong helper_mfc0_mvpcontrol(CPUMIPSState *env) { diff --git a/target/mips/cp0_timer.c b/target/mips/cp0_timer.c index bd7efb152dd..9c38e9da1c8 100644 --- a/target/mips/cp0_timer.c +++ b/target/mips/cp0_timer.c @@ -29,31 +29,6 @@ #define TIMER_PERIOD 10 /* 10 ns period for 100 Mhz frequency */ -/* XXX: do not use a global */ -uint32_t cpu_mips_get_random(CPUMIPSState *env) -{ - static uint32_t seed = 1; - static uint32_t prev_idx = 0; - uint32_t idx; - uint32_t nb_rand_tlb = env->tlb->nb_tlb - env->CP0_Wired; - - if (nb_rand_tlb == 1) { - return env->tlb->nb_tlb - 1; - } - - /* Don't return same value twice, so get another value */ - do { - /* - * Use a simple algorithm of Linear Congruential Generator - * from ISO/IEC 9899 standard. - */ - seed = 1103515245 * seed + 12345; - idx = (seed >> 16) % nb_rand_tlb + env->CP0_Wired; - } while (idx == prev_idx); - prev_idx = idx; - return idx; -} - /* MIPS R4K timer */ static void cpu_mips_timer_update(CPUMIPSState *env) { From patchwork Mon Sep 28 17:15:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 272577 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0066AC47420 for ; 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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.15.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:15:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 03/16] target/mips/cp0_timer: Explicit unit in variable name Date: Mon, 28 Sep 2020 19:15:26 +0200 Message-Id: <20200928171539.788309-4-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Name variables holding nanoseconds with the '_ns' suffix. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Markovic Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
--- target/mips/cp0_timer.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/target/mips/cp0_timer.c b/target/mips/cp0_timer.c index 9c38e9da1c8..5194c967ae3 100644 --- a/target/mips/cp0_timer.c +++ b/target/mips/cp0_timer.c @@ -32,13 +32,14 @@ /* MIPS R4K timer */ static void cpu_mips_timer_update(CPUMIPSState *env) { - uint64_t now, next; + uint64_t now_ns, next_ns; uint32_t wait; - now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - wait = env->CP0_Compare - env->CP0_Count - (uint32_t)(now / TIMER_PERIOD); - next = now + (uint64_t)wait * TIMER_PERIOD; - timer_mod(env->timer, next); + now_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + wait = env->CP0_Compare - env->CP0_Count - + (uint32_t)(now_ns / TIMER_PERIOD); + next_ns = now_ns + (uint64_t)wait * TIMER_PERIOD; + timer_mod(env->timer, next_ns); } /* Expire the timer. */ @@ -56,16 +57,16 @@ uint32_t cpu_mips_get_count(CPUMIPSState *env) if (env->CP0_Cause & (1 << CP0Ca_DC)) { return env->CP0_Count; } else { - uint64_t now; + uint64_t now_ns; - now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + now_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); if (timer_pending(env->timer) - && timer_expired(env->timer, now)) { + && timer_expired(env->timer, now_ns)) { /* The timer has already expired. */ cpu_mips_timer_expire(env); } - return env->CP0_Count + (uint32_t)(now / TIMER_PERIOD); + return env->CP0_Count + (uint32_t)(now_ns / TIMER_PERIOD); } } From patchwork Mon Sep 28 17:15:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 272580 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0404AC4741F for ; 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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.15.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:15:47 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 04/16] target/mips/cpu: Introduce mips_cpu_properties[] Date: Mon, 28 Sep 2020 19:15:27 +0200 Message-Id: <20200928171539.788309-5-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x335.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" To allow objects creating CPU objects to set non-default properties before qdev-realizing() it, add an empty mips_cpu_properties array in MIPSCPUClass. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index e86cd065483..c1c0f2e12ba 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -26,7 +26,7 @@ #include "qemu/module.h" #include "sysemu/kvm.h" #include "exec/exec-all.h" - +#include "hw/qdev-properties.h" static void mips_cpu_set_pc(CPUState *cs, vaddr value) { @@ -181,6 +181,10 @@ static ObjectClass *mips_cpu_class_by_name(const char *cpu_model) return oc; } +static Property mips_cpu_properties[] = { + DEFINE_PROP_END_OF_LIST() +}; + static void mips_cpu_class_init(ObjectClass *c, void *data) { MIPSCPUClass *mcc = MIPS_CPU_CLASS(c); @@ -190,6 +194,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) device_class_set_parent_realize(dc, mips_cpu_realizefn, &mcc->parent_realize); device_class_set_parent_reset(dc, mips_cpu_reset, &mcc->parent_reset); + device_class_set_props(dc, mips_cpu_properties); cc->class_by_name = mips_cpu_class_by_name; cc->has_work = mips_cpu_has_work; From patchwork Mon Sep 28 17:15:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 272578 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96F48C4741F for ; Mon, 28 Sep 2020 17:19:40 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 36BD6208D5 for ; Mon, 28 Sep 2020 17:19:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="M63J2xaf" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 36BD6208D5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:33136 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kMwoN-0000oA-5U for qemu-devel@archiver.kernel.org; Mon, 28 Sep 2020 13:19:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45922) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kMwkk-0004BR-Cc for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:15:54 -0400 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:42701) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kMwki-0006Ly-GX for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:15:53 -0400 Received: by mail-wr1-x444.google.com with SMTP id c18so2190033wrm.9 for ; Mon, 28 Sep 2020 10:15:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=foOMmOGF2hVWCsGdHMVh8B2p3MaxLn0e54Hx5DC6ApI=; b=M63J2xafJrN4F7BQ0Ch6ErwIPxgVH+MCf/ISF8eQLt5CfneBPAMvbW1zXk1KTx1xUY Mexy+/0JhnUxnwau4LQnV8qAe9V9TxY1+PkCBGVmaDTVYiHd0d2RmUb4pk8ysrigMpu0 eUMV/vGGxlgBJuNzVsrjoxwwGEPPsLEr62fI5S5jx+v5YOuQJkur3QMMWGXbwg+udjwS taJ67P3zguBxSy495mBHHuUUWlEqsCwIlO6VThq4KGWxelIVpt/7zTZlrLu6W/KdLGg4 YWWWLGoI6In4tNhnJ+F2JoBLdYXf6zAoMBA50Yf+kIFNkvfSdVtrIOu+tGfTpKgZb15Y RRew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=foOMmOGF2hVWCsGdHMVh8B2p3MaxLn0e54Hx5DC6ApI=; b=ZTdhwcRA3+Y7ACNUf1uqr6IEmjfrPPni8BuIj18ck79/OAql36MTYFoPiOyfUy5PXV pfnPVgWVzPjndvtERrEYVq36QrnQRiSLV+b35+NiNz+702Z3Usd8Ft33osdF425AcWFK 5qGOB4IOVCPPOeFG66a4wS5fQASZfTLXZlREtTkQrx+E49FHY3UZBjlIVLSmW3bOg0Ay nSs1uIY+kSBzs5rin6TpdOoBtJb2BtAun6d7x3gVjono8cDhBZl7AhQwvjNiNgCjInqX S+qVdgJ5XU+c7GhnN9+YW8hi0O3ybQ2IyQb72gI2wKubN44H+ApovLja2svqsMhdTIJK 4xeg== X-Gm-Message-State: AOAM532R2dosgxMcwn070OdMKLAu0kTmkfmQghOTpQj6xo6b42Z9APZz vkZlW64cPxzN4o/aIO2euL9bAnEf+jQ= X-Google-Smtp-Source: ABdhPJwRPnOBg+jy892hU3GZRP1sCNeq1bhwT4DzcWn3g+LSs4etgbCYQ+a56mKsOkdCLN5Qn9SF7g== X-Received: by 2002:adf:f6cd:: with SMTP id y13mr2741538wrp.161.1601313349861; Mon, 28 Sep 2020 10:15:49 -0700 (PDT) Received: from localhost.localdomain (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.15.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:15:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 05/16] target/mips/cpu: Set default CPU frequency to 200 MHz Date: Mon, 28 Sep 2020 19:15:28 +0200 Message-Id: <20200928171539.788309-6-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Since the introduction of the 'r4k' machine in commit 6af0bf9c7c3, the MIPS target assumes a CPU running at 200 MHz. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index c1c0f2e12ba..8d07a293a2e 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -141,6 +141,14 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev); Error *local_err = NULL; + if (!clock_get(cs->clock)) { + /* + * Initialize the frequency to 200MHz in case + * the clock remains unconnected. + */ + clock_set_hz(cs->clock, 200000000); + } + cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); From patchwork Mon Sep 28 17:15:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 304256 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9908FC2D0A8 for ; Mon, 28 Sep 2020 17:22:34 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0839E2080A for ; Mon, 28 Sep 2020 17:22:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OWHMcctr" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0839E2080A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:41576 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kMwrB-0004KY-18 for qemu-devel@archiver.kernel.org; Mon, 28 Sep 2020 13:22:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45936) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kMwkl-0004Bw-Rv for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:15:56 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]:40268) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kMwkk-0006MJ-2n for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:15:55 -0400 Received: by mail-wr1-x435.google.com with SMTP id j2so2203531wrx.7 for ; Mon, 28 Sep 2020 10:15:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nV1TKIg/u52Ts1S/ZitAGgYmEsezh0Rxsw6P1iX3beg=; b=OWHMcctro7BRn0S27C3rvtw5JjfuqgAWWFL79rCa/ApfqceoP6gx7FTasT1meSsidu Lqjl4ZqjqUCNCBtZk8eEjgDZd7XADW9E2vFqxMlreJtNcejwSVLeKu2/nV2wgzFCeK9f 65xfBx+7fbOI3ivuvieusGZ9vYXmFXB3WRhC0CkGY2KKJp2ufx722mlJtKkFrPo83Jc6 wC1PB/RYf0NnLEv7l1v3HzCYr5ckuX366/30vDuFfeOZy9ysi2l+9nwDfEyqXyR37j9y JnR0K5Fcr6VPvFHWJoc835gaLf61N7+qyppCqH+Zh/Z8QtEFR7vk+OlWa3pZYZmRDhc8 d/Lw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=nV1TKIg/u52Ts1S/ZitAGgYmEsezh0Rxsw6P1iX3beg=; b=hm9VfD4jvE7cb4G+wCcCr/RAiQl848nKxxLJkGtuJWeuDB21/p5fiRVTOSLHyJClaz kJ3YXMdc22GfeAcCUIdh1l0axQxijkb4Fos89tElwRqhTi4oO1Pvbp1w99u8zQvHF28c 8cwjAGQbv85llsenqK++KEuZ6MKFBvYzSUwFYmJ0HNhtNmv3S/JydO73u3Tu31ABhqSZ uKmT9Orv2WFKpkDyqaHzW95QGs43sAMAC2QfeGyduSQSW1Qo0iW4FdjYatOjww+Fe8Te eLVkFsMSJ763vrbL/O8wZSocGCo9JmZOKlJZ0MhBMntIcDjith9IQF0eZoWNI8+nihmm bp3w== X-Gm-Message-State: AOAM5318+xdWs+TnFTvA/v99vAhmSa/SU5iinbjuqrCljn2iqjB8Qf4P WD4QW03xGtPwBpsX1gVWFjTqgN6Ot2Q= X-Google-Smtp-Source: ABdhPJw1/M1sUi+8nOmvW6mF+8Pc26aSVdgzrLZA4XyhMHJXpCfxq8cXMMZgQv/qd2aySb6Y0nRykQ== X-Received: by 2002:a5d:4c4c:: with SMTP id n12mr2756136wrt.162.1601313351531; Mon, 28 Sep 2020 10:15:51 -0700 (PDT) Received: from localhost.localdomain (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.15.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:15:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 06/16] target/mips: Keep CP0 counter in sync with the CPU frequency Date: Mon, 28 Sep 2020 19:15:29 +0200 Message-Id: <20200928171539.788309-7-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x435.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Since commit 6af0bf9c7c3 the CP0 counter is running at half the frequency of a 200 MHz CPU: a static 100 MHz value is used. By using the Clock API we can change the CPU frequency at runtime, so the CP0 counter might run out of sync with the CPU clock. Avoid that by using the recently introduced CPUClass::clock_update() callback. If the CPU clock is dynamically changed, our CP0 counter will be updated correspondingly. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.h | 9 +++++++++ target/mips/cp0_timer.c | 13 ++++++------- target/mips/cpu.c | 20 ++++++++++++++++++++ 3 files changed, 35 insertions(+), 7 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 7cf7f5239f7..66d6124ae02 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1145,6 +1145,7 @@ struct CPUMIPSState { struct MIPSITUState *itu; MemoryRegion *itc_tag; /* ITC Configuration Tags */ target_ulong exception_base; /* ExceptionBase input to the core */ + unsigned cp0_count_ns; /* CP0_Count clock period (in nanoseconds) */ }; /** @@ -1160,6 +1161,14 @@ struct MIPSCPU { CPUNegativeOffsetState neg; CPUMIPSState env; + /* + * The Count register acts as a timer, incrementing at a constant rate, + * whether or not an instruction is executed, retired, or any forward + * progress is made through the pipeline. The rate at which the counter + * increments is implementation dependent, and is a function of the + * pipeline clock of the processor, not the issue width of the processor. + */ + unsigned cp0_count_rate; }; diff --git a/target/mips/cp0_timer.c b/target/mips/cp0_timer.c index 5194c967ae3..5ec0d6249e9 100644 --- a/target/mips/cp0_timer.c +++ b/target/mips/cp0_timer.c @@ -27,8 +27,6 @@ #include "sysemu/kvm.h" #include "internal.h" -#define TIMER_PERIOD 10 /* 10 ns period for 100 Mhz frequency */ - /* MIPS R4K timer */ static void cpu_mips_timer_update(CPUMIPSState *env) { @@ -37,8 +35,8 @@ static void cpu_mips_timer_update(CPUMIPSState *env) now_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); wait = env->CP0_Compare - env->CP0_Count - - (uint32_t)(now_ns / TIMER_PERIOD); - next_ns = now_ns + (uint64_t)wait * TIMER_PERIOD; + (uint32_t)(now_ns / env->cp0_count_ns); + next_ns = now_ns + (uint64_t)wait * env->cp0_count_ns; timer_mod(env->timer, next_ns); } @@ -66,7 +64,7 @@ uint32_t cpu_mips_get_count(CPUMIPSState *env) cpu_mips_timer_expire(env); } - return env->CP0_Count + (uint32_t)(now_ns / TIMER_PERIOD); + return env->CP0_Count + (uint32_t)(now_ns / env->cp0_count_ns); } } @@ -82,7 +80,8 @@ void cpu_mips_store_count(CPUMIPSState *env, uint32_t count) } else { /* Store new count register */ env->CP0_Count = count - - (uint32_t)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / TIMER_PERIOD); + (uint32_t)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / + env->cp0_count_ns); /* Update timer timer */ cpu_mips_timer_update(env); } @@ -109,7 +108,7 @@ void cpu_mips_stop_count(CPUMIPSState *env) { /* Store the current value */ env->CP0_Count += (uint32_t)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / - TIMER_PERIOD); + env->cp0_count_ns); } static void mips_timer_cb(void *opaque) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 8d07a293a2e..2f75216c324 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -26,6 +26,7 @@ #include "qemu/module.h" #include "sysemu/kvm.h" #include "exec/exec-all.h" +#include "hw/qdev-clock.h" #include "hw/qdev-properties.h" static void mips_cpu_set_pc(CPUState *cs, vaddr value) @@ -134,6 +135,22 @@ static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) } } +static void mips_cp0_period_set(MIPSCPU *cpu) +{ + CPUMIPSState *env = &cpu->env; + + /* Recompute CP0's period on clock change */ + env->cp0_count_ns = cpu->cp0_count_rate * clock_get_ns(CPU(cpu)->clock); +} + +static void mips_cpu_clk_update(CPUState *cs) +{ + MIPSCPU *cpu = MIPS_CPU(cs); + + /* Recompute CP0's period on clock change */ + mips_cp0_period_set(cpu); +} + static void mips_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); @@ -148,6 +165,7 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) */ clock_set_hz(cs->clock, 200000000); } + mips_cpu_clk_update(cs); cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { @@ -190,6 +208,7 @@ static ObjectClass *mips_cpu_class_by_name(const char *cpu_model) } static Property mips_cpu_properties[] = { + DEFINE_PROP_UINT32("CP0_Count-rate", MIPSCPU, cp0_count_rate, 2), DEFINE_PROP_END_OF_LIST() }; @@ -224,6 +243,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->tcg_initialize = mips_tcg_init; cc->tlb_fill = mips_cpu_tlb_fill; #endif + cc->clock_update = mips_cpu_clk_update; cc->gdb_num_core_regs = 73; cc->gdb_stop_before_watchpoint = true; From patchwork Mon Sep 28 17:15:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 304258 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F115C4727E for ; Mon, 28 Sep 2020 17:19:40 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0F1CC207E8 for ; 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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.15.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:15:52 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 07/16] hw/mips/r4k: Explicit CPU frequency is 200 MHz Date: Mon, 28 Sep 2020 19:15:30 +0200 Message-Id: <20200928171539.788309-8-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Since its introduction in commit 6af0bf9c7c3, the 'r4k' machine runs at 200 MHz. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/r4k.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/mips/r4k.c b/hw/mips/r4k.c index 3487013a4a1..2aa18203f20 100644 --- a/hw/mips/r4k.c +++ b/hw/mips/r4k.c @@ -37,6 +37,7 @@ #include "sysemu/reset.h" #include "sysemu/runstate.h" #include "qemu/error-report.h" +#include "hw/qdev-clock.h" #define MAX_IDE_BUS 2 @@ -184,6 +185,7 @@ void mips_r4k_init(MachineState *machine) int bios_size; MIPSCPU *cpu; CPUMIPSState *env; + Clock *cpuclk; ResetData *reset_info; int i; qemu_irq *i8259; @@ -193,7 +195,11 @@ void mips_r4k_init(MachineState *machine) int be; /* init CPUs */ - cpu = MIPS_CPU(cpu_create(machine->cpu_type)); + cpu = MIPS_CPU(object_new(machine->cpu_type)); + cpuclk = qdev_init_clock_out(DEVICE(cpu), "cpuclk"); + clock_set_hz(cpuclk, 200000000); /* 200 MHz */ + qdev_connect_clock_in(DEVICE(cpu), "clk", cpuclk); + qdev_realize(DEVICE(cpu), NULL, &error_abort); env = &cpu->env; reset_info = g_malloc0(sizeof(ResetData)); From patchwork Mon Sep 28 17:15:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 304257 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D85ACC47423 for ; Mon, 28 Sep 2020 17:19:41 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 533BB207E8 for ; Mon, 28 Sep 2020 17:19:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Cf/Bt2MU" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 533BB207E8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:33244 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kMwoO-0000rd-EJ for qemu-devel@archiver.kernel.org; Mon, 28 Sep 2020 13:19:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45970) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kMwko-0004D1-II for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:16:00 -0400 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]:42704) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kMwkm-0006Mr-HD for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:15:57 -0400 Received: by mail-wr1-x443.google.com with SMTP id c18so2190362wrm.9 for ; Mon, 28 Sep 2020 10:15:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6OmfazZDAU1jqH5hop+ugOyeziIPqUJ/0u91dBdRy2M=; b=Cf/Bt2MUD7CUtRp+CGf5HpM/cHjfw2yXNF8cxqD1Jyf2t9Kg9t6K5asVbjOURD4N3G V2lEHwj5x3zR0cmQ4AWLHMbNKmQq+2B73fqHIByAyWZ+BkMRii4BXY30wnagySCXbqfv xhUqnLypLy2i6wlUNstaAAmQLEb7QCieprmncH8NP5LJSEYCk0hHqdL9lgf1YIobSCdY qcZpvkFoKM2s4lulXyzspvobVRABr17fdijAR40B7iJbD2sr3CoYYV1CfLEDBbaeavZM WwuUgXMhr9wyiam3Cr1DcqxV1qbal9QtY6HaTrh4b07shJW3BxQk31OHcKxhIt0xPZcy 1xnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=6OmfazZDAU1jqH5hop+ugOyeziIPqUJ/0u91dBdRy2M=; b=ugVKB6CqjfA6gUqGANejREjNFBx+Ynqg+CugFRHTZGlyFLNjc74Cs1sXkMYcgIJx90 Mg+5Tk+Li8MoC2P5+2fUzsH8l3Ypi0r/356iI27+cZvcYbU3/BhLzc6A1yMZ20IIK4Ms bQGe7LUnEkd04XAahjWrbw6GCwoBTJ3fxMNNPgg72MjvdKQzsnJmUpqQ0tDI879X22z/ qyHFYUsFI3bUCjTsvQRXMzSriOzdbY+PRYQFZoHMhx+LH6WamjLJlxXbx/wZVw9UQGmj a+HCYcClbeHxRpZOObw02D/0qo/YZ4x2eQisBEBXct64Ijx74a0KFa5wGt1XPoZ7DP+E FTHA== X-Gm-Message-State: AOAM531gE188hGHioAYW2fUujRuiDFJBbB6qCsI9CQn7nRQaXZg0ezlu STquM+V+mZeMYE+gKBV0igROim1hDHA= X-Google-Smtp-Source: ABdhPJwPjTlwNwQjNQ/Jh02/STpx11zAFr0lQ+kegjfvIm4+/ONqN9ZG76jyYTg0UsQeJJt6SY/ZaA== X-Received: by 2002:adf:fac8:: with SMTP id a8mr2717046wrs.186.1601313354921; Mon, 28 Sep 2020 10:15:54 -0700 (PDT) Received: from localhost.localdomain (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.15.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:15:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 08/16] hw/mips/fuloong2e: Set CPU frequency to 533 MHz Date: Mon, 28 Sep 2020 19:15:31 +0200 Message-Id: <20200928171539.788309-9-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The CPU frequency is normally provided by the firmware in the "cpuclock" environment variable. The 2E board can handles up to 660MHz, but be conservative and take the same value used by the Linux kernel: 533 MHz. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/fuloong2e.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index f28609976bf..1a925dcc201 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -28,6 +28,7 @@ #include "hw/isa/superio.h" #include "net/net.h" #include "hw/boards.h" +#include "hw/qdev-clock.h" #include "hw/i2c/smbus_eeprom.h" #include "hw/block/flash.h" #include "hw/mips/mips.h" @@ -300,10 +301,15 @@ static void mips_fuloong2e_init(MachineState *machine) I2CBus *smbus; MIPSCPU *cpu; CPUMIPSState *env; + Clock *cpuclk; DeviceState *dev; /* init CPUs */ - cpu = MIPS_CPU(cpu_create(machine->cpu_type)); + cpu = MIPS_CPU(object_new(machine->cpu_type)); + cpuclk = qdev_init_clock_out(DEVICE(cpu), "cpuclk"); + clock_set_hz(cpuclk, 533080000); /* ~533 MHz */ + qdev_connect_clock_in(DEVICE(cpu), "clk", cpuclk); + qdev_realize(DEVICE(cpu), NULL, &error_abort); env = &cpu->env; qemu_register_reset(main_cpu_reset, cpu); From patchwork Mon Sep 28 17:15:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 272574 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8C9DC47420 for ; Mon, 28 Sep 2020 17:25:02 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 582FB208D5 for ; Mon, 28 Sep 2020 17:25:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="kCeHcv5b" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 582FB208D5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:48958 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kMwtZ-0007L9-G7 for qemu-devel@archiver.kernel.org; Mon, 28 Sep 2020 13:25:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45996) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kMwkq-0004Di-EN for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:16:02 -0400 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]:36498) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kMwko-0006ND-N0 for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:15:59 -0400 Received: by mail-wm1-x344.google.com with SMTP id e2so1947453wme.1 for ; Mon, 28 Sep 2020 10:15:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r+U9x/gecjwhaxSv786ubx8yYIvjY9xUzlQ4g9WyIPM=; b=kCeHcv5brC+Qe+whSEartTnY8z08yYclKkNSBAFBXvtFa+9SSJUeElsYYi3PxH6fy8 z+2GE2QjlRMRew7rGf7kSwxefXT3rieVBJZ+xivkMYgRJ+8GGBh70s4qIKzuO7aF66or QG/fLzBh34YjgT0ne2vutiU8pvIAt0WflXDNOyiI1yyUAKeSnbiuWbUsR/5nnIF0lcNp 5ycdCm6gomyD4yNJJy74qB2VcNGRcr38VV5GZUM5tQmh8gbAUm/1cLvVZFOZ2JwbZbTH H6IVSjACTRx8/FeageAa+GG3EdLKFJUjk1EQB9+ATOvmzTl6RU9pC/E3sxog7J8JHP1B tXCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=r+U9x/gecjwhaxSv786ubx8yYIvjY9xUzlQ4g9WyIPM=; b=E0ONubhzEdYT/LzNPXh9xKI7ML5Uzlo3fFw/XzBr5lf6BF98MxGjDFfTGiLBAmx5Be Z34s69Y3UwuGosWTFkBmQPFnkllFIYS2iy3scW93KpdGpgf8Ao+V4o4hCNHhQVPoMGh4 XZe809mHe9RP6lDxBmjydG9kEIVdx11xkeMB/l4zG4Nt7zHVzyb1lrZOpvGkYqB7t97f EyZkrrC5tlts2PCrV/MKIjB00g1OBpWJd/jc9a5Bu/u/jThlRVOZ6oQ3JrZzD17hPxKR jn3BD8r69A4Fr0EpExz2LA69nShlVAX/VAM7zAjUvzKZYaoV8Qo3jTjbisbu3ql627Hq 3rQQ== X-Gm-Message-State: AOAM533J0YW8F8pjMiqc7eCDHqJaqCNUuxL1G01+BZzQLWXjhhdh7LkL HDfmAaVmLk6hzj8X+0WpqtQWPEaClWs= X-Google-Smtp-Source: ABdhPJyg65BRW+oZ4tEB50bqugGwYDFWgP5f8A+z27+EORiRJerLRcxX9SwbpEpKvaoh7vUBQmVGaA== X-Received: by 2002:a1c:f008:: with SMTP id a8mr178411wmb.155.1601313357147; Mon, 28 Sep 2020 10:15:57 -0700 (PDT) Received: from localhost.localdomain (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.15.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:15:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 09/16] hw/mips/mipssim: Correct CPU frequency Date: Mon, 28 Sep 2020 19:15:32 +0200 Message-Id: <20200928171539.788309-10-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The MIPSsim machine CPU frequency is too fast running at 200 MHz, while it should be 12 MHz for the 24K and 6 MHz for the 5K core. Ref: Linux commit c78cbf49c4ed ("Support for MIPSsim, the cycle accurate MIPS simulator.") Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/mipssim.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c index 1b3b7622035..6660af19c18 100644 --- a/hw/mips/mipssim.c +++ b/hw/mips/mipssim.c @@ -40,6 +40,7 @@ #include "hw/loader.h" #include "elf.h" #include "hw/sysbus.h" +#include "hw/qdev-clock.h" #include "hw/qdev-properties.h" #include "exec/address-spaces.h" #include "qemu/error-report.h" @@ -152,11 +153,20 @@ mips_mipssim_init(MachineState *machine) MemoryRegion *bios = g_new(MemoryRegion, 1); MIPSCPU *cpu; CPUMIPSState *env; + Clock *cpuclk; ResetData *reset_info; int bios_size; /* Init CPUs. */ - cpu = MIPS_CPU(cpu_create(machine->cpu_type)); + cpu = MIPS_CPU(object_new(machine->cpu_type)); + cpuclk = qdev_init_clock_out(DEVICE(cpu), "cpuclk"); +#ifdef TARGET_MIPS64 + clock_set_hz(cpuclk, 6000000); /* 6 MHz */ +#else + clock_set_hz(cpuclk, 12000000); /* 12 MHz */ +#endif + qdev_connect_clock_in(DEVICE(cpu), "clk", cpuclk); + qdev_realize(DEVICE(cpu), NULL, &error_abort); env = &cpu->env; reset_info = g_malloc0(sizeof(ResetData)); From patchwork Mon Sep 28 17:15:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 272575 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15F96C47423 for ; Mon, 28 Sep 2020 17:22:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 698A5214D8 for ; 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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.15.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:15:58 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 10/16] hw/mips/jazz: Correct CPU frequencies Date: Mon, 28 Sep 2020 19:15:33 +0200 Message-Id: <20200928171539.788309-11-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The Magnum 4000PC CPU runs at 100 MHz, and the Acer PICA-61 CPU at ~134 MHz. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/jazz.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c index 47723093b63..eee79d5b47d 100644 --- a/hw/mips/jazz.c +++ b/hw/mips/jazz.c @@ -45,6 +45,7 @@ #include "hw/audio/pcspk.h" #include "hw/input/i8042.h" #include "hw/sysbus.h" +#include "hw/qdev-clock.h" #include "exec/address-spaces.h" #include "sysemu/qtest.h" #include "sysemu/reset.h" @@ -145,6 +146,7 @@ static void mips_jazz_init(MachineState *machine, MIPSCPU *cpu; CPUClass *cc; CPUMIPSState *env; + Clock *cpuclk; qemu_irq *i8259; rc4030_dma *dmas; IOMMUMemoryRegion *rc4030_dma_mr; @@ -163,6 +165,13 @@ static void mips_jazz_init(MachineState *machine, MemoryRegion *bios2 = g_new(MemoryRegion, 1); SysBusESPState *sysbus_esp; ESPState *esp; + static const struct { + unsigned freq_hz; + unsigned pll_mult; + } ext_clk[] = { + [JAZZ_MAGNUM] = {50000000, 2}, + [JAZZ_PICA61] = {33333333, 4}, + }; if (machine->ram_size > 256 * MiB) { error_report("RAM size more than 256Mb is not supported"); @@ -170,7 +179,12 @@ static void mips_jazz_init(MachineState *machine, } /* init CPUs */ - cpu = MIPS_CPU(cpu_create(machine->cpu_type)); + cpu = MIPS_CPU(object_new(machine->cpu_type)); + cpuclk = qdev_init_clock_out(DEVICE(cpu), "cpuclk"); + clock_set_hz(cpuclk, + ext_clk[jazz_model].freq_hz * ext_clk[jazz_model].pll_mult); + qdev_connect_clock_in(DEVICE(cpu), "clk", cpuclk); + qdev_realize(DEVICE(cpu), NULL, &error_abort); env = &cpu->env; qemu_register_reset(main_cpu_reset, cpu); From patchwork Mon Sep 28 17:15:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 304254 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ACBFDC4727E for ; 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Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Expose a qdev input clock named 'clk', and connect it to each core. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/mips/cps.h | 2 ++ hw/mips/cps.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h index 9e35a881366..859a8d4a674 100644 --- a/include/hw/mips/cps.h +++ b/include/hw/mips/cps.h @@ -21,6 +21,7 @@ #define MIPS_CPS_H #include "hw/sysbus.h" +#include "hw/clock.h" #include "hw/misc/mips_cmgcr.h" #include "hw/intc/mips_gic.h" #include "hw/misc/mips_cpc.h" @@ -43,6 +44,7 @@ struct MIPSCPSState { MIPSGICState gic; MIPSCPCState cpc; MIPSITUState itu; + Clock *clock; }; qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number); diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 23c0f87e41a..c332609f7b3 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -22,6 +22,7 @@ #include "qemu/module.h" #include "hw/mips/cps.h" #include "hw/mips/mips.h" +#include "hw/qdev-clock.h" #include "hw/qdev-properties.h" #include "hw/mips/cpudevs.h" #include "sysemu/kvm.h" @@ -38,6 +39,7 @@ static void mips_cps_init(Object *obj) SysBusDevice *sbd = SYS_BUS_DEVICE(obj); MIPSCPSState *s = MIPS_CPS(obj); + s->clock = qdev_init_clock_in(DEVICE(obj), "clk", NULL, NULL); /* * Cover entire address space as there do not seem to be any * constraints for the base address of CPC and GIC. @@ -80,6 +82,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) errp)) { return; } + qdev_connect_clock_in(DEVICE(cpu), "clk", s->clock); if (!qdev_realize_and_unref(DEVICE(cpu), NULL, errp)) { return; From patchwork Mon Sep 28 17:15:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 272576 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F318C4741F for ; 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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.16.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:16:01 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 12/16] hw/mips/boston: Set CPU frequency to 1 GHz Date: Mon, 28 Sep 2020 19:15:35 +0200 Message-Id: <20200928171539.788309-13-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::442; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x442.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The I6400 can run at 1 GHz or more. Create a 'cpuclk' output clock and connect it to the CPU input clock. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/boston.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 1b3f69e949c..5c541a0c5ea 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -30,6 +30,7 @@ #include "hw/mips/cps.h" #include "hw/mips/cpudevs.h" #include "hw/pci-host/xilinx-pcie.h" +#include "hw/qdev-clock.h" #include "hw/qdev-properties.h" #include "qapi/error.h" #include "qemu/error-report.h" @@ -54,6 +55,7 @@ struct BostonState { MachineState *mach; MIPSCPSState cps; SerialMM *uart; + Clock *cpuclk; CharBackend lcd_display; char lcd_content[8]; @@ -251,10 +253,19 @@ static const MemoryRegionOps boston_platreg_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; +static void mips_boston_instance_init(Object *obj) +{ + BostonState *s = BOSTON(obj); + + s->cpuclk = qdev_init_clock_out(DEVICE(obj), "cpuclk"); + clock_set_hz(s->cpuclk, 1000000000); /* 1 GHz */ +} + static const TypeInfo boston_device = { .name = TYPE_MIPS_BOSTON, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(BostonState), + .instance_init = mips_boston_instance_init, }; static void boston_register_types(void) @@ -462,6 +473,8 @@ static void boston_mach_init(MachineState *machine) &error_fatal); object_property_set_int(OBJECT(&s->cps), "num-vp", machine->smp.cpus, &error_fatal); + qdev_connect_clock_in(DEVICE(&s->cps), "clk", + qdev_get_clock_out(dev, "cpuclk")); sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal); sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1); From patchwork Mon Sep 28 17:15:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 304253 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 719F9C2D0A8 for ; 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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.16.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:16:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 13/16] hw/mips/malta: Set CPU frequency to 320 MHz Date: Mon, 28 Sep 2020 19:15:36 +0200 Message-Id: <20200928171539.788309-14-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::341; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x341.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The CoreLV card with ID 0x420's CPU clocked at 320 MHz. Create a 'cpuclk' output clock and connect it to the CPU input clock. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/malta.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 4019c9dc1a8..62ec543a610 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -57,6 +57,7 @@ #include "sysemu/kvm.h" #include "hw/semihosting/semihost.h" #include "hw/mips/cps.h" +#include "hw/qdev-clock.h" #define ENVP_ADDR 0x80002000l #define ENVP_NB_ENTRIES 16 @@ -94,6 +95,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(MaltaState, MIPS_MALTA) struct MaltaState { SysBusDevice parent_obj; + Clock *cpuclk; MIPSCPSState cps; qemu_irq i8259[ISA_NUM_IRQS]; }; @@ -1159,7 +1161,7 @@ static void main_cpu_reset(void *opaque) } } -static void create_cpu_without_cps(MachineState *ms, +static void create_cpu_without_cps(MachineState *ms, MaltaState *s, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { CPUMIPSState *env; @@ -1167,7 +1169,9 @@ static void create_cpu_without_cps(MachineState *ms, int i; for (i = 0; i < ms->smp.cpus; i++) { - cpu = MIPS_CPU(cpu_create(ms->cpu_type)); + cpu = MIPS_CPU(object_new(ms->cpu_type)); + qdev_connect_clock_in(DEVICE(cpu), "clk", s->cpuclk); + qdev_realize(DEVICE(cpu), NULL, &error_abort); /* Init internal devices */ cpu_mips_irq_init_cpu(cpu); @@ -1189,6 +1193,7 @@ static void create_cps(MachineState *ms, MaltaState *s, &error_fatal); object_property_set_int(OBJECT(&s->cps), "num-vp", ms->smp.cpus, &error_fatal); + qdev_connect_clock_in(DEVICE(&s->cps), "clk", s->cpuclk); sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal); sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1); @@ -1203,7 +1208,7 @@ static void mips_create_cpu(MachineState *ms, MaltaState *s, if ((ms->smp.cpus > 1) && cpu_supports_cps_smp(ms->cpu_type)) { create_cps(ms, s, cbus_irq, i8259_irq); } else { - create_cpu_without_cps(ms, cbus_irq, i8259_irq); + create_cpu_without_cps(ms, s, cbus_irq, i8259_irq); } } @@ -1421,10 +1426,19 @@ void mips_malta_init(MachineState *machine) pci_vga_init(pci_bus); } +static void mips_malta_instance_init(Object *obj) +{ + MaltaState *s = MIPS_MALTA(obj); + + s->cpuclk = qdev_init_clock_out(DEVICE(obj), "cpuclk"); + clock_set_hz(s->cpuclk, 320000000); /* 320 MHz */ +} + static const TypeInfo mips_malta_device = { .name = TYPE_MIPS_MALTA, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(MaltaState), + .instance_init = mips_malta_instance_init, }; static void mips_malta_machine_init(MachineClass *mc) From patchwork Mon Sep 28 17:15:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 304255 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B17E1C47420 for ; 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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.16.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:16:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 14/16] hw/mips/cps: Do not allow use without input clock Date: Mon, 28 Sep 2020 19:15:37 +0200 Message-Id: <20200928171539.788309-15-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::341; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x341.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Now than all QOM users provides the input clock, do not allow using a CPS without input clock connected. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/cps.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/mips/cps.c b/hw/mips/cps.c index c332609f7b3..e4ff173f8c3 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -74,6 +74,11 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) bool itu_present = false; bool saar_present = false; + if (!clock_get(s->clock)) { + error_setg(errp, "CPS clock must be connected to a clock source"); + return; + } + for (i = 0; i < s->num_vp; i++) { cpu = MIPS_CPU(object_new(s->cpu_type)); From patchwork Mon Sep 28 17:15:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 272573 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE90AC2D0A8 for ; Mon, 28 Sep 2020 17:28:24 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3ECFB2080A for ; Mon, 28 Sep 2020 17:28:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="FxJ9Nl4m" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3ECFB2080A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:56312 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kMwwp-00023h-C5 for qemu-devel@archiver.kernel.org; Mon, 28 Sep 2020 13:28:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46098) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kMwl0-0004V0-Tk for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:16:11 -0400 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]:38463) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kMwkz-0006OP-6m for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:16:10 -0400 Received: by mail-wm1-x341.google.com with SMTP id v12so1932587wmh.3 for ; Mon, 28 Sep 2020 10:16:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/nKnDzshEoTJREnnsRFqyXOBxcp33CXKr1VQJgDssSY=; b=FxJ9Nl4mxaFBxr0+oqnbxDPacEqCgSZ5GqRLsDZB8kT0MNzsBE3ZEKCbNzqW/tw0Yl 7rSwZdUuo3EkY/t4ZsEoJ+OteWp5Adwi8r2cOxewM1alTDWH3NlB0KZX69vwbAbJsDhR qMTrojojLr/qD3Hz1PupHByLtXnuSeoPXbcafTEMUh8Sqto0CFvgiyZ+t9lnKpy8b0xz /vCf5Jb+dfGM4w9VF8AxBpGbszZGio0CQG/4gVtHnaDFkdcDvZ1eNRJY0F2Sm4RhYovv I08kM2dXti2142L00vRWmirjZuodMQZg8WC0bQ4mvGat1c524RM3B5dFQDanNa0rpqaF OAdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=/nKnDzshEoTJREnnsRFqyXOBxcp33CXKr1VQJgDssSY=; b=P8QRIzTpNz2TzRlDedYP4Bjlf2oPxeMFYyJb2qv9shP27WVVwaJ1RP91MbbC2Ndp+7 HX7/9Tr7FQ0idIWYNkZORMhhzudALYtoppK3NiQ3w1VsmUPVEw+zhexa/7IiLXmfmp9F Gy/HIpQwPOaYOVNbwq3r4lv0/gFc/zfHmSaW5tjdAsplb4q9r0Dez8RLtYA6ZX31h67/ Ux0v0CnOhH6GOd15nS8cVBGeyCVUY2DeaUg8w0pLaskEOUP005DvkSs18VBCG4YCJV49 Y22s3x6ZcxMhbqHBE4pP1qFYv7D2ERIv9Z9q4YX14Q+2XG5fH8OhRnZykdMBH8XA9ExG C6ug== X-Gm-Message-State: AOAM5311eZRWRRmZ1t+uKdiVKDsYgX7BvqYVa2XsOMnO2DpKVQqCls3i wRtQVcJCqq8QuFMUCZOaxSCPLGyQyEM= X-Google-Smtp-Source: ABdhPJyYd+aGPilDzcC5zOrQVGFI3sz96+KPN7kO/qIGtX7lyPzOe2M+sNdmoqsHDt4x952YSR8vvw== X-Received: by 2002:a1c:ba84:: with SMTP id k126mr226266wmf.126.1601313367450; Mon, 28 Sep 2020 10:16:07 -0700 (PDT) Received: from localhost.localdomain (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.16.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:16:06 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 15/16] target/mips/cpu: Do not allow system-mode use without input clock Date: Mon, 28 Sep 2020 19:15:38 +0200 Message-Id: <20200928171539.788309-16-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::341; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x341.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , Igor Mammedov , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Now than all QOM users provides the input clock, do not allow using a CPU core without its input clock connected on system-mode emulation. For user-mode, keep providing a fixed 200 MHz clock, as it used by the RDHWR instruction (see commit cdfcad788394). Signed-off-by: Philippe Mathieu-Daudé --- Cc: Igor Mammedov We need the qtest check for tests/qtest/machine-none-test.c which instanciate a CPU with the none machine. Igor, is it better to remove the MIPS targets from the test cpus_map[]? --- target/mips/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 2f75216c324..cc4ee75af30 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -25,6 +25,7 @@ #include "kvm_mips.h" #include "qemu/module.h" #include "sysemu/kvm.h" +#include "sysemu/qtest.h" #include "exec/exec-all.h" #include "hw/qdev-clock.h" #include "hw/qdev-properties.h" @@ -159,11 +160,18 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) Error *local_err = NULL; if (!clock_get(cs->clock)) { +#ifdef CONFIG_USER_ONLY /* * Initialize the frequency to 200MHz in case * the clock remains unconnected. */ clock_set_hz(cs->clock, 200000000); +#else + if (!qtest_enabled()) { + error_setg(errp, "CPU clock must be connected to a clock source"); + return; + } +#endif } mips_cpu_clk_update(cs); From patchwork Mon Sep 28 17:15:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 272572 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD962C47423 for ; Mon, 28 Sep 2020 17:31:07 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 63BF221548 for ; Mon, 28 Sep 2020 17:31:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="lmpq7tj1" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 63BF221548 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:33128 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kMwzS-0004Kq-DO for qemu-devel@archiver.kernel.org; Mon, 28 Sep 2020 13:31:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46118) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kMwl2-0004Yr-PH for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:16:12 -0400 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:38465) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kMwl0-0006Oa-TM for qemu-devel@nongnu.org; Mon, 28 Sep 2020 13:16:12 -0400 Received: by mail-wm1-x343.google.com with SMTP id v12so1932687wmh.3 for ; Mon, 28 Sep 2020 10:16:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ENJHSv8VXYAWPuujTGIt+mHmdRqFl7rTYSd0cE3/B20=; b=lmpq7tj11VTVov7XY2zxHgbglGaDDqre9rTLWCLMAcGynyRVby1Frcud0cHGSoT8kp nnnYWbqrBq9X0+g0q/X8N04RrodY4dl1qptM4OcASSb4mSVWZ7Q+rowQDL/p3ymXvLjJ A+T07p29DpvdMPg6ZwtBc5o1efKT8cZBwnjHYof+WHPAOVD1NZillGUB5X7eBzCPjfEP l9EAKC6T0NnjZVahUwJfdQOG9jKLMsJu74OFC95AYCqnEXJITIZ0Dw536Q1nfjpkEWQy J7nb6AjjIiOyRlLNI7nKOW/GDKlRzQALc17Fmk4s1t7YLhgUO3NAljpMGatr9GBeh4ND tsrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=ENJHSv8VXYAWPuujTGIt+mHmdRqFl7rTYSd0cE3/B20=; b=dmI7bmJNuE++wQf7R3DLNiJGMswLUTYeMjrImHS52LXfUMM0fmL/YeXz5I8NZyKijw 7paOzzESgYnUob5yvvNt+WdUvQ4S+vl4eL9unVgDOOJy0MJB2mSNl/pix1J0DA3Ctd0W zivAgpIIeE77J5Yghz5DttvJT23b4khoIl1gK1zBCqvsaXS1xGtOSD6AUds5b1vRNrpr u/CcXgB4zYfDKno3fQUMCv5pZ5ZTSMwFP5p2Bj+DbfspqBnM0iNgNmGTYEq9Yoox7uwZ aF+zW/JkLyslKx3Q7TqbvJFnJEL2xZVctf4Y9UZaz+fmN54f60TAkpA1zHNvxzIoC1gv zdFg== X-Gm-Message-State: AOAM530zmGalfrU9/iYE3+w7zH4sIiHw6oSMjZx6fA/bAuQpuZfTyAnV fe4H+yHDVh+zBDKO4c1Va9qpGmBDO1g= X-Google-Smtp-Source: ABdhPJyos6VUzX1cU5nl3QJKAOfuagC+XEbjQ4PzP9e5ZpQ7iJte/XbXKONMX9qryaucJ7zsJj/xIA== X-Received: by 2002:a1c:7911:: with SMTP id l17mr170102wme.179.1601313369081; Mon, 28 Sep 2020 10:16:09 -0700 (PDT) Received: from localhost.localdomain (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.16.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:16:08 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 16/16] tests/acceptance: Test the MIPSsim machine Date: Mon, 28 Sep 2020 19:15:39 +0200 Message-Id: <20200928171539.788309-17-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , Thomas Huth , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add a test for the mipssim machine, based on the recommended test setup from Thomas Huth: https://www.mail-archive.com/qemu-devel@nongnu.org/msg606846.html The test is quick and can be run as: $ avocado --show=console run -t machine:mipssim tests/acceptance/ (1/1) tests/acceptance/machine_mips_mipssim.py:MipsSimMachine.test_mipssim_linux_console: console: Linux version 3.6.11 (root@711bb8ba16a7) (gcc version 4.8.3 (Buildroot 2014.11) ) #2 Sun Sep 27 13:39:35 UTC 2020 console: Setting default memory size 0x02000000 console: bootconsole [early0] enabled console: CPU revision is: 00019300 (MIPS 24Kc) console: FPU revision is: 00739300 ... console: CPU frequency 12.00 MHz console: Calibrating delay loop... 950.27 BogoMIPS (lpj=4751360) ... console: MIPSNet Ethernet driver. Version: 2007-11-17. (c)2005 MIPS Technologies, Inc. ... console: Welcome to Buildroot console: buildroot login: root console: # root console: -sh: root: not found console: # ping -c 3 10.0.2.2 console: PING 10.0.2.2 (10.0.2.2): 56 data bytes console: 64 bytes from 10.0.2.2: seq=0 ttl=255 time=48.231 ms console: 64 bytes from 10.0.2.2: seq=1 ttl=255 time=9.407 ms console: 64 bytes from 10.0.2.2: seq=2 ttl=255 time=2.298 ms console: --- 10.0.2.2 ping statistics --- console: 3 packets transmitted, 3 packets received, 0% packet loss PASS (7.99 s) Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Willian Rampazzo (willianr@redhat.com) --- Cc: Thomas Huth --- MAINTAINERS | 1 + tests/acceptance/machine_mips_mipssim.py | 56 ++++++++++++++++++++++++ 2 files changed, 57 insertions(+) create mode 100644 tests/acceptance/machine_mips_mipssim.py diff --git a/MAINTAINERS b/MAINTAINERS index 5eed1e692b4..17d8a012b0e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -240,6 +240,7 @@ F: include/hw/misc/mips_* F: include/hw/timer/mips_gictimer.h F: tests/acceptance/linux_ssh_mips_malta.py F: tests/acceptance/machine_mips_malta.py +F: tests/acceptance/machine_mips_mipssim.py F: tests/tcg/mips/ K: ^Subject:.*(?i)mips diff --git a/tests/acceptance/machine_mips_mipssim.py b/tests/acceptance/machine_mips_mipssim.py new file mode 100644 index 00000000000..b2749917b08 --- /dev/null +++ b/tests/acceptance/machine_mips_mipssim.py @@ -0,0 +1,56 @@ +# Functional tests for the MIPS simulator (MIPSsim machine) +# +# Copyright (c) 2020 Philippe Mathieu-Daudé +# +# This work is licensed under the terms of the GNU GPL, version 2 or later. +# See the COPYING file in the top-level directory. +# +# SPDX-License-Identifier: GPL-2.0-or-later + +import os +import logging +import time + +from avocado import skipUnless +from avocado_qemu import Test +from avocado_qemu import exec_command_and_wait_for_pattern +from avocado_qemu import interrupt_interactive_console_until_pattern +from avocado_qemu import wait_for_console_pattern + +class MipsSimMachine(Test): + + timeout = 30 + KERNEL_COMMON_COMMAND_LINE = 'printk.time=0 ' + + @skipUnless(os.getenv('AVOCADO_ALLOW_UNTRUSTED_CODE'), 'untrusted code') + def test_mipssim_linux_console(self): + """ + Boots the Linux kernel and checks that the console is operational + :avocado: tags=arch:mipsel + :avocado: tags=machine:mipssim + :avocado: tags=device:mipsnet + """ + kernel_url = ('https://github.com/philmd/qemu-testing-blob/raw/' + '32ea5764e1de8fffa0d59366c44822cd06d7c8e0/' + 'mips/mipssim/mipsel/vmlinux') + kernel_hash = '0f9aeca3a2e25b5b0cc4999571f39a7ad58cdc43' + kernel_path = self.fetch_asset(kernel_url, asset_hash=kernel_hash) + + initrd_url = ('https://github.com/philmd/qemu-testing-blob/raw/' + '32ea5764e1de8fffa0d59366c44822cd06d7c8e0/' + 'mips/mipssim/mipsel/rootfs.cpio') + initrd_hash = 'b20359bdfae66387e5a17d6692686d59c189417b' + initrd_path = self.fetch_asset(initrd_url, asset_hash=initrd_hash) + + self.vm.set_console() + self.vm.add_args('-kernel', kernel_path, + '-initrd', initrd_path, + '-append', self.KERNEL_COMMON_COMMAND_LINE) + self.vm.launch() + + wait_for_console_pattern(self, 'Welcome to Buildroot') + interrupt_interactive_console_until_pattern(self, + interrupt_string='root\r', + success_message='#') + pattern = '3 packets transmitted, 3 packets received, 0% packet loss' + exec_command_and_wait_for_pattern(self, 'ping -c 3 10.0.2.2', pattern)