From patchwork Fri Oct 23 15:16:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 270540 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A834C4363A for ; Fri, 23 Oct 2020 15:56:11 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A36B7221F9 for ; Fri, 23 Oct 2020 15:56:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="hY9oeFj4" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A36B7221F9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:46610 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzQD-0000Y8-GD for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 11:56:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60306) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyr-0004FZ-3X for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:49 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26169) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyn-0001Y4-Rl for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466865; x=1635002865; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qFWvR5KAMA47jbNsvf8MmZ6kG1i3mjBIrx/D3hW3FeI=; b=hY9oeFj4RCNRd0uMKqxwgEnmTY5MHh/0YAoOwMyoRPwey9OMKcCrY/55 DntYcf8GC2l+qD/EGEIkfdpKSjTHwt5J+c5Ss1pPnB+0ODtbnBWIhl1UD ONgCzYxfqR2Ep5guPUfun6zZK5mwT8Can4itiqXbZxMYSuKB5JcacUIvw DkyMuEjjp04iA0pTIgir22Ff/tizvZ5fAGmPugmF3Q8FpDCGI38aIYUhk +GRQ4ZVQRaw6HqUXHLYcsdBsbL5CEtH6o3d3Q5o8wTyu/7F7O86mSCkot QC8Y4UHcF1vo6tBeUe3Z2QZyF5P2J+oIOG1IGFe5Mv7SfEFpRGrs7lRIs g==; IronPort-SDR: 84qF3Gu3gU/0GdKzNUMsGWemigqSnNKk0tVU/hZi2DOzVj9bCusV9CbZA+rdSykpLA1WZ39nF3 aKh7qXoBmmfGdJYauX0ThfkRyqqGQD7X4aboPQfqOPRZV0lzXZLJyeyCJY4AUbk/nNxK+ZFVHe UyB5Mj3uFm/xM+dDAE5rBqI4YtB9LKdowmLzBzfb70DGba5biCTXsgdAv2zJpblzu5p0QrUpMm RomJlJf31/Cy0iUIKqm0lKAnOZBbn3p/pRvs+iD3j3cNs6YoWoJs4LzT1mEIwUIunkL1EUicQN Nfw= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652317" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:42 +0800 IronPort-SDR: 4O0RbvWX3nqjEyeFPqZErjhzTENO2EYl4wGiUlnbMRRdripRHoxeI21RpKqMtY4GhMPRUyWh9P xYJBxaxYYyymJwp8MCSMYuILQrC0rCgDI/iwSorO76iGHYrLTXfPynPc0wmhQKNKMzGKh4WbBt fXrEtMkyeJWhSpEB8sljfwmy1JaLqJD9CvtKGzsq1yoQkPVBpZO3XUFIKFoAGi1wcorgm0xYGq Jx2Ue0bCyf3axnNGjzZWLhosWj4TmOwarMwYw9Yqt1WVDmoMzQNj+WSCdAfr6J2/nzQQGfDv0L I9BhK2MzPU36UK6RGBmq7uG7 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:12:58 -0700 IronPort-SDR: 6j6gXNlgnBDBxelCL1wscQaDzpdq1O7JG4Cmrzj1gCoE/H7daFRV83KVrBWJ8gN/acMKLQNoG9 l3W2+IvH7H2xH9KbXxz8InImuNcOQiAjMV6UAsHTPtLmOTOle2oYYRW0cmTUHjyJaD0y4AHrkw g6iP5foNLjSJkC3yzbquHtGPZv/3s4aSZvTrwQLqYDHYXw7/fqRHHfHp11hSZu+zNKcTVbyIq9 A3QofMzv75pP9TwYTKU/kltk6Bg8IcCOHr2zlXfX7Ox2CcOVBzXYtYHZNoGn/3S7RhiFrJH9RV hk8= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:42 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 01/12] riscv: Convert interrupt logs to use qemu_log_mask() Date: Fri, 23 Oct 2020 08:16:08 -0700 Message-Id: <20201023151619.3175155-2-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, Alistair Francis , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Currently we log interrupts and exceptions using the trace backend in riscv_cpu_do_interrupt(). We also log exceptions using the interrupt log mask (-d int) in riscv_raise_exception(). This patch converts riscv_cpu_do_interrupt() to log both interrupts and exceptions with the interrupt log mask, so that both are printed when a user runs QEMU with -d int. Signed-off-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Message-id: 29a8c766c7c4748d0f2711c3a0abb81208138c5e.1601652179.git.alistair.francis@wdc.com --- target/riscv/cpu_helper.c | 8 +++++++- target/riscv/op_helper.c | 1 - 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 904899054d..6c68239a46 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -895,7 +895,13 @@ void riscv_cpu_do_interrupt(CPUState *cs) } trace_riscv_trap(env->mhartid, async, cause, env->pc, tval, - riscv_cpu_get_trap_name(cause, async)); + riscv_cpu_get_trap_name(cause, async)); + + qemu_log_mask(CPU_LOG_INT, + "%s: hart:"TARGET_FMT_ld", async:%d, cause:"TARGET_FMT_lx", " + "epc:0x"TARGET_FMT_lx", tval:0x"TARGET_FMT_lx", desc=%s\n", + __func__, env->mhartid, async, cause, env->pc, tval, + riscv_cpu_get_trap_name(cause, async)); if (env->priv <= PRV_S && cause < TARGET_LONG_BITS && ((deleg >> cause) & 1)) { diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 9b9ada45a9..e987bd262f 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -29,7 +29,6 @@ void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env, uint32_t exception, uintptr_t pc) { CPUState *cs = env_cpu(env); - qemu_log_mask(CPU_LOG_INT, "%s: %d\n", __func__, exception); cs->exception_index = exception; cpu_loop_exit_restore(cs, pc); } From patchwork Fri Oct 23 15:16:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 270536 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A57EC4363A for ; Fri, 23 Oct 2020 16:03:38 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6E9BA2168B for ; Fri, 23 Oct 2020 16:03:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="RcUo0EST" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6E9BA2168B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:39926 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzXU-0001Je-99 for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 12:03:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60312) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyr-0004G8-7B for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:49 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26170) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyo-0001YB-41 for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466865; x=1635002865; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gTEfrXW5JVAxrBtTkMoI4Wb6sqYHxkqYEIKLyrikXqY=; b=RcUo0ESTfoTZrjjmGGiyQDbW0PbRdI8pM4GXax7ngKNDcdPNuS7Z+utV 5bwmimL1E8rAUjm9N3CJAuGRStSRsw+OLrmu5O6huEowor5p0AvWSxC64 uwq+x27gt28fMZASBV8Ub+0fq1oh7z/X87E1qj2Wnj6rBkHSQJXhOWVm7 53Q1Z+T0tZs3s4SJrnDTRwmbB1HNJuVX7L85sErJ8UTjWK6/7STVmpgHN 4TQsIU2CbzTuJKSTl2qBn3G9AwDo7nq+mg7mCvoidaGjzpO3uJvPCfVtr LpJ1BOvun3PUmQFa2sddKUJ6pr0EZWWh0oWs5VHJbeDsfXtLC4345BQu0 w==; IronPort-SDR: 9XE2FkgRVEeSSzT/bHvQ76F5YYa6GNQTHsWq4AgVHGRlRcUYAHGs2jmyIPok347QW74Azl6/oi Jne5Qi124NEACVTf/B9EgnpnyIw3vFiLganDxeWoBPl0wgBoTt/g24tblk9GGpJeKpaQxuAbFD KZoWUvU5LsL5oRcGE/wvj3KeoMmMwTsIIkRo5c+gXbOSV4/Sp8fvQuOT4sYFDCea1wDQ9lJ6Wd kqjspdkT+E5KO6knc403RBHHIyBUO0w6GshTxmfj+aPcjMsgW3piEZgnk3+o1qea2Q1ZeFgJCn lHo= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652318" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:42 +0800 IronPort-SDR: BFn+mHuNlHWPrcVDRF/na2Hje5ir7qZROgU3rgnWp2T4z0fjgiw3RShRVvdJG6vXjz7Em2xGYS Xw2xTwT5F2GJQBHVmadZqCLbEuG90cf1ohN19yyaY8Lfc6hvIlbkaBUjQMP4F/OtXDKBwXoHu+ u7tdXsLTkcQqnNZ+cZgzj5Ki7JIZhCR0iI3uwZkBcPZuOvb1dOG3X19Rb/ZE9+/xrFM1AY++Dv kEB9WbsKkf1oODJTKgOAZHazIDCaK4GU7I2pwT7EDJ+wsxDkJLJOyfXs9HlNxQalp3uZNa2tNy 6usWTdjR/bQDXO14N1AoFyEu Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:12:58 -0700 IronPort-SDR: mXk7XxhqUrURQbP+DlG/JSGNgtY6i1yHtx90tqn55oz7bca5KmnRQyZZKvSc5UdttZAoZvCQAr 5O3QjjibBPmwFothlsYOm6ZeU7BCfUmdhLTQ6l32/09ZRWHiowRmzPWGPWuX0ryWx+aEhtAF8E SZTtxhp/ZGBDhBU3FYVwl56F367bBNLBhpJ9rbRXQNetv7lx1fnTrW4a0JY/1KGvpeiAAtyBa5 +Y/ei3lTypYjlvN3PMgGJLDWsNY2k+hRrAjh3L25KJvLXbABQ5qoFm1fH2JkGi0Nzqy8uf60qT qTI= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:43 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 02/12] hw/intc: Move sifive_plic.h to the include directory Date: Fri, 23 Oct 2020 08:16:09 -0700 Message-Id: <20201023151619.3175155-3-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, Bin Meng , Alistair Francis , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Bin Meng Since sifive_plic.h is used by hw/intc/sifive_plic.c, it has to be in the public include directory. Move it. Fixes: 84fcf3c15111 ("hw/riscv: Move sifive_plic model to hw/intc") Signed-off-by: Bin Meng Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Message-id: 1602578033-68384-1-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis --- {hw => include/hw}/intc/sifive_plic.h | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename {hw => include/hw}/intc/sifive_plic.h (100%) diff --git a/hw/intc/sifive_plic.h b/include/hw/intc/sifive_plic.h similarity index 100% rename from hw/intc/sifive_plic.h rename to include/hw/intc/sifive_plic.h From patchwork Fri Oct 23 15:16:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 302147 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 440C2C4363A for ; Fri, 23 Oct 2020 16:02:27 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AE6FD2168B for ; Fri, 23 Oct 2020 16:02:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="Bd/T0e5P" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AE6FD2168B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:36720 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzWL-0008Pw-JC for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 12:02:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60334) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyys-0004HK-3d for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:50 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26168) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyq-0001Xq-4y for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:49 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466867; x=1635002867; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KlL4/TccFf5vxuzV2NRnKp7iPznMCUwsa6I/bO5AZFM=; b=Bd/T0e5PBr4c6ftak/672zHlun83sQh2m8Xv1k9hOl4PaqFzVrgk3DRp ak82hcvueptEm5p7/pkGWVFD5gFXKa75sXLDrNubbVBWqRTRmbSIoH7P9 wkDJXifcthadX6yfEAxjuT20ARdd+iGl8ne4R6faSd0uvlOGiLuRxk+yD NK9h2ABbpWrZCCFO+87W0ApBmFXa3dW/Z8onCNepNNyADBv/HhkbNDFQx YSEcVmeLuZy4uy0/3r3lXZ3VLlRHMsWJxm1ae2c46mcRG7NAOGxu5rN1B TPUZijRYLIsnBX8H1qhDhNmmrhLBKHKUvzZhoQu7cqQswXKjScJKzCR+U w==; IronPort-SDR: Mp5KFvAjXxWZq4m6gFxvkSa/w6a/OFQi9TXN/xiLy/lw44k/4geI8iChv3C0IUoCBf6MtgBkF5 6LYAP9NwBmvarRI8VsPeN0BgvSFFka0SuerIwQL8Z8909BTmzpdzYMu4l9hNzPoBPE3v8Kl6Ja Kd8JXi8q/xhn73Ar2PSqTBmYCK887QqZ5DUHRYlvxR2UDuJYVKwp/6BYzqZlxsK0HTupNXhJKM UUNx0UuZPoSHh091dmtJ9aGf7lzFRSzAsj521S2ggS+eVijpA8v/h4LxyoYWz/OGeU5T93PLh1 Fug= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652319" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:43 +0800 IronPort-SDR: N1am2D9oiOY9eUuVVvip+AdisqgQUHFFay+QwN9Qtp4kVnjpNigzGEFl6+fvrQukCf55eEkWTg fd1J9deEiWgY0aZ1z4DHBvu2teQ5MkQet3kL4vJMfG6yp8yzYQTBj9e9PVsxBblvdTP8orK02v NmB9ZQEODTo5pTabcUxauv5dGgI55zgStagi9PYPWM4MPwiPGSudO2YHOAlORAyuqL8ubv7VRj sTB/TOCdh3KS7zCEZbjIGZEkuiIosY5UF6uX4Su/3qgpHaY+nw3j0MfMrhWAz/9/40NvYQLKlN kV9v8LYwQC4zuQVs+GnkXUiL Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:12:58 -0700 IronPort-SDR: Egof5XNtYD2OcWUuhYPQFelEAVOZWyhjoyaSROwmiFJGBy2B1R+tNtk92OOzf1d6YHDnMZuwdg czetI/ppoPQI8kBAJbQw7XREkKQY+UkKkkCzLNwu6MJgGx/YAW7kkkIbSm8Q7cI2Z0PfKgbgHx Te7eDwe8rwApYzOb5oEMWtXvyhIM3Ia6CWr0zi/dxbLXCktG+JehAlvQOJWMXGNzALLOtAXf5R yAyteXMorg3tt29fJG2lPKtp4FBWSneuRIvpzhpZPMriZWEdA5cXGnBFFngukqmdkSfmBLV8+L 5MM= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:43 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 03/12] target/riscv: Fix update of hstatus.SPVP Date: Fri, 23 Oct 2020 08:16:10 -0700 Message-Id: <20201023151619.3175155-4-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, Alistair Francis , Georg Kotheimer Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Georg Kotheimer When trapping from virt into HS mode, hstatus.SPVP was set to the value of sstatus.SPP, as according to the specification both flags should be set to the same value. However, the assignment of SPVP takes place before SPP itself is updated, which results in SPVP having an outdated value. Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20201013151054.396481-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis --- target/riscv/cpu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 6c68239a46..47d05fe34c 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -938,7 +938,7 @@ void riscv_cpu_do_interrupt(CPUState *cs) /* Trap into HS mode, from virt */ riscv_cpu_swap_hypervisor_regs(env); env->hstatus = set_field(env->hstatus, HSTATUS_SPVP, - get_field(env->mstatus, SSTATUS_SPP)); + env->priv); env->hstatus = set_field(env->hstatus, HSTATUS_SPV, riscv_cpu_virt_enabled(env)); From patchwork Fri Oct 23 15:16:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 270538 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6540AC388F9 for ; Fri, 23 Oct 2020 15:58:46 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9C00821527 for ; Fri, 23 Oct 2020 15:58:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="g1K3Wu0Q" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9C00821527 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:54692 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzSm-0003xz-KH for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 11:58:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60358) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyt-0004Ii-6J for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:51 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26169) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyr-0001Y4-9G for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:50 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466869; x=1635002869; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2mb5Uz+f+98KKWE+4ncQgKVHsa+GuxEN2KmJeLlwP94=; b=g1K3Wu0Q5ARK7C/hfOS7uHMEZ1LwrL4nyTSxmau282ZIbb6AHtGGZ5Y2 miACT/bA1T7HtmSYVw/oBjuNCX90FxzyF0EgGx9g0rPb/O9rqeAV2P+8Q WrlRRkpFZC//qBNjzw0TiRPfFpuVzrT9XQiz6Pl7FcyAv23kJ6eYjb1A0 OAIWQG5tVXVzWraI7iEUIlA3DfrarC3cOdOzUIF9zHhryehW3Qu0PoHuu Y7oqIX+UIVMMDy17IwIpuDzQACInN6aeuglOsB395JHhcWS2hRw9yHW3G lNSy0G8QJFa1DqqDnU9jz3lLFyRVchjkqM/U7zG5kC4z3MFq0ftqlg7lH g==; IronPort-SDR: BGkZjERc49T/3LjmdOxAK3BTAyCHGHuAAyWgBKfiPj0f4xGMfUHztIiF7ot6tKG9pJNzwSjKIi eOReDN0qayosSC6hRVjSdVp9A8sUF6x46LH1I0tADxDjshC2CPMIntMeUly+O3fc1b6bTpJR1m 6lsaPK/tlHm/b0yCqUoASknkNuBUgzfyeXg+QHdnYXFeG4OCmX7D9RR8fYIlyNRCHlZH+pnT3T /LlLyoufY1J5ZPcpZ04vfxnScZDG+MrvwYXTyqnBm8WMchUaCotXpWbEF3uN5cEi5XzAghZZ6b UPg= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652320" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:43 +0800 IronPort-SDR: zI9NjwApgkaX1IPmatZd/vSvGMCRrK/lbsCeQkY9R2VVHTME9Y77AwEbQdqxGcKT1RTnmULxPj G9tuZfqTPd85sknPD0R3zuzIjwJeOkPsOh5HLajy9lIjbtZGy9thiWXwSPzlwMA/8d4t3lIRPQ qa9iwHuPgYOTcFQEgzny8eAav6GynlfwEAnxKbC5bpQQ4XcP5vNPOqrowhlOKmDAGaGdCUf/yn k1dvELA8TqVZH8LG2xhGlUhs97C2Btu13Ch/4jsz1Wd2z9JrUwjdUGhn+o9DrpmS6GZ2Pa5gq9 OJ0xWcutWwuxw/cGZ9v0/KSq Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:12:58 -0700 IronPort-SDR: XBw71uOThxux0V+eQRurenEtIy7aoHD3nGMv62b9FUubXCGtMVr9RiV/4XJrMHvIRjYM0BMQCM WLdTn6UZcSgoLdxBssInOG/76sgRbiJ5/O5+TDOk80TjL6UNH2sSOEl8/zhlFDANbW9iybukqW Ol9HrinSd05m18Rnf5i8yp23NKStzgifWF3mYIQszVXSKjGm5g1hB12DA0TU7iZvIdqpCX7Cxs c88IT86xKwEdnUMAZrP3avsjHKxjQ93Fh4fFimmVXu5W2lx05KbXIyAdRWQK6brHrr76UaKNGb b3w= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:43 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 04/12] target/riscv: Fix update of hstatus.GVA in riscv_cpu_do_interrupt Date: Fri, 23 Oct 2020 08:16:11 -0700 Message-Id: <20201023151619.3175155-5-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, Alistair Francis , Georg Kotheimer Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Georg Kotheimer The hstatus.GVA bit was not set if the faulting guest virtual address was zero. Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20201013173054.451135-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis --- target/riscv/cpu_helper.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 47d05fe34c..f363c1013c 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -852,6 +852,7 @@ void riscv_cpu_do_interrupt(CPUState *cs) bool async = !!(cs->exception_index & RISCV_EXCP_INT_FLAG); target_ulong cause = cs->exception_index & RISCV_EXCP_INT_MASK; target_ulong deleg = async ? env->mideleg : env->medeleg; + bool write_tval = false; target_ulong tval = 0; target_ulong htval = 0; target_ulong mtval2 = 0; @@ -873,6 +874,7 @@ void riscv_cpu_do_interrupt(CPUState *cs) case RISCV_EXCP_INST_PAGE_FAULT: case RISCV_EXCP_LOAD_PAGE_FAULT: case RISCV_EXCP_STORE_PAGE_FAULT: + write_tval = true; tval = env->badaddr; break; default: @@ -910,7 +912,7 @@ void riscv_cpu_do_interrupt(CPUState *cs) target_ulong hdeleg = async ? env->hideleg : env->hedeleg; if ((riscv_cpu_virt_enabled(env) || - riscv_cpu_two_stage_lookup(env)) && tval) { + riscv_cpu_two_stage_lookup(env)) && write_tval) { /* * If we are writing a guest virtual address to stval, set * this to 1. If we are trapping to VS we will set this to 0 From patchwork Fri Oct 23 15:16:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 270534 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72610C388F9 for ; Fri, 23 Oct 2020 16:06:04 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CD6DF2168B for ; Fri, 23 Oct 2020 16:06:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="FhO+lppl" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CD6DF2168B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:48386 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzZo-0004oU-DE for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 12:06:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60366) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyv-0004KG-K8 for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:54 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26170) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyr-0001YB-Gz for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:53 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466869; x=1635002869; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gRLFW5UCKjh4yvdZBvLQXqEJVfV48oDYZ79tpYj1D7Q=; b=FhO+lpplcE/M+Jwl4Q+KrkHHZD9KhuzErCkLUgnevwJvOeBBlRc3Kmqi K3XQenCVYXblj9XT5vIOqFMddLecl1/RRT2ihkLgCr33KEFuv5XkSu6w7 fmzno+yqojdgcXbZmQ5rqwycLIxk7tPdLAaLwuymHk1kvY8l+Tupay/o+ OK7r7NUILG3eMaH1+/YukaxukJPdl/knr/VufDp9t/Y4q3eDa7n/KZyrN vePf7wb8p0wTThKRuI1CjE4mmbg6bAVr5/jsK9rzAc2I2DG1X1Ac1lCse GpxkkZnvVLrwHqkZaz9Dxi4j3SXE6Khx9FyGZyvaabQxbFm5rkY5UHXYT g==; IronPort-SDR: KIv2oBvMkcOjDj2kH+PrWgul7DRxgH2y0LJcVUM79E5JV/MhaZ7bzk9mRwb9GRTw63S8Lq/s3c 5bEptVR3UiqwutKqtnm30fRDxH7IuuCQgWwIvsmcRi5s5ByIdKoo3XUpt/6UPNrvQNbs8/IpYr n2g0Tj7so9i3WrAiGzBdQT+oLC51w6eCVXxdMuJq99TyylTpbp9yOlBe4C8Z6AZsl0FaH/VaEK +H2sfT93ntOAd6arh9vIa+Zr+VFDXlIppOLLDojoAzsbZkyZfIDj+rEavfhgkJR8iXqmzoBJ2i FY4= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652321" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:43 +0800 IronPort-SDR: W0bfe6gLH7Rsyl0H6TZRxS5JRuyZZpVrtCQ2hXkWd+7toBw3WCiCAZ7x38nn2QI1T+HL/LPMeS hB1gKvYY3SjuAU9k576TTE0+QQUH7T1UtiUxtZ44JR3NsXvP9PfNJrlsZhjIHOC7y0BlDB+CFy n7jGDy1z0m1BPeqPX9a+I4iVABkNmpH6vQrOxh60nSZzLL4h2Wbgj/5Df+7bXxaIUV9xLOZeSq eSyDc3AFCBVT+T1UOs8coLoHE03hD/MT+bL8LyNzT0jV2Pv1lzmSW5q+LQzJAqMaiaCfCFzc+a mWkbyjIB+WbcmQ2ncmuzuDHL Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:12:59 -0700 IronPort-SDR: Uym5J0JqYHMp8vu3fkrO9a5wU3qkxZl21fCIgJydQoF6PXJjpDt5pi81nSjnA6xV+wHudDYFmZ 1MeemGmgolWaCgcm0h0+Uzpqs3f9mJOiPVDQ+VurPe3hv3knSodKFw6jNv9glla0H+h7S8o2Zr okxqadq3ZF+f3Yg1fcYsutOzfd29nPawcHzgfzI0qJnZT6xvcdTrlEmVyLGolZpY0J6i+ffXvS 3aooc7hklsgMCxo+Ob+ZO96FnontMUpXR9Hs1ygp/5GeLM8ek8ZYo7Q/VPFtnnsX3mplm0lQQ6 CSk= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:43 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 05/12] target/riscv: Fix implementation of HLVX.WU instruction Date: Fri, 23 Oct 2020 08:16:12 -0700 Message-Id: <20201023151619.3175155-6-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, Alistair Francis , Georg Kotheimer , =?utf-8?q?Philippe_Mathi?= =?utf-8?b?ZXUtRGF1ZMOp?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Georg Kotheimer The HLVX.WU instruction is supposed to read a machine word, but prior to this change it read a byte instead. Fixes: 8c5362acb57 ("target/riscv: Allow generating hlv/hlvx/hsv instructions") Signed-off-by: Georg Kotheimer Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Message-id: 20201013172223.443645-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis --- target/riscv/op_helper.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index e987bd262f..4ce73575a7 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -333,12 +333,12 @@ target_ulong helper_hyp_x_load(CPURISCVState *env, target_ulong address, riscv_cpu_set_two_stage_lookup(env, true); switch (memop) { - case MO_TEUL: - pte = cpu_ldub_data_ra(env, address, GETPC()); - break; case MO_TEUW: pte = cpu_lduw_data_ra(env, address, GETPC()); break; + case MO_TEUL: + pte = cpu_ldl_data_ra(env, address, GETPC()); + break; default: g_assert_not_reached(); } From patchwork Fri Oct 23 15:16:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 302148 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79B03C4363A for ; Fri, 23 Oct 2020 16:01:49 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EC91121527 for ; Fri, 23 Oct 2020 16:01:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="GZuBTbb3" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EC91121527 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:34686 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzVj-0007Yp-TF for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 12:01:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60384) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyx-0004Kc-9b for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:56 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26168) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyys-0001Xq-Ai for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:54 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466870; x=1635002870; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=L0zM4Ec9Du3VjXk0D2sog4reuXMCNB9GtHWmH3J6P3k=; b=GZuBTbb3cIHolxnaPFStoS4eC0HoMUj5U5ObvYL3KUKhQFnTQrLQjRz/ oca+w251DedqVYSHCp+2mtj2g4MHbBXfAU6S2pZa1SoYnEvMF7J13mgUG 3iQOCcvES7ikYCbUbwX573D/+1HpB1keqZcb2zgx+hOwjLIlk1rVbj2XK mZb6Hh/C65B3Kelnxh5PduPwFltaGSi7x7CvtNEOsShqlRQu/lRUyuN1X d618Tt7dDG3ba1Hy0ZzM01ZnJS8rwQnGWTkFmoKEyrV/4fIKW08Aik+ik vl4Dks+Aln4BprPjyBkkgR4Jv4DDh6ApRDZ1ygpgvQneGWw0jDWKHuKOi Q==; IronPort-SDR: UMbbNC47FlWlQ+M2QWDO0uPKrBzYgSwVItxQkrM421y/4eD+Tbh2MDVL2+8Xm6X6WcSfHAXfBH qA9pBFHSYhvW1uH32Nc9GVJingpkX427Wpi2zDB9ZCDGtkDygYgtfCAA4d1d7OzY0WXnmm3BDW uY/x6c1ldvH6IRzABqFLGGOcvS7BMDHCSwFG0pZPmdhUq9R8jtEf+h5czphu2rd7stXMRurmAA 4v+z1N0lyPuwxvGHeE7w+WDyDKeyw5TyQq7OOdpFuivnMA4mwepIKUK0i2+Z4NcWXa3XrOY65A bKw= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652322" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:44 +0800 IronPort-SDR: 6vlaS1SwUQfTgvr9iBQcmHOghXT+3t9JDbjZyogKVY6TQvf6wSCKLKkeIuzRIPmkhN2tMoNvgN ebPrEWZcJLMU3aLG6ertfDIBRripthAWvf6EZYGDo5so1h5lYXUjzz4Bfm785yzdiWNsWi2m++ RA/61t/7EbFYna31Zvz2/hVOVA0cqWO/XlfFDvh3lceea4PkRwD7Xth9dHyjLVM62e3K1GRpJh 4c1MqzHtn3UNNNKloCy3Z+f65coNbr58P7r3akDhFWj5kdrxenHn3/VLnRJqZAcW18tK1dHEo0 c0Xa28GQ5cBFoDWGwCMZ+lC5 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:12:59 -0700 IronPort-SDR: t2cAvG8Sx08WNpBvsnm8plfJY/ZJziv+H+p/CXj4KOjPUWepWsxV1PQcfOc/GkEPlvwbJXegsG 5e87cdYNDJF/r1GgRGk43uhxF7cb0YQidDMk52oaFVRk2UyceNMELUijJOmJMRJHScORDxn5xu Gp7X/bdwvdYIv1IHVwkl6EnBjMwgP73Ium2jswVGnqjgcrHido4zht8xaXewrosIU11DH6BA5T oZIXVn8mf/SS/PLQmz6HDGR+ZFGeDh5snxXMZ2oyYt2+K05bxmTP46zD7fUeNxD/ZKhCxVR1i8 1eU= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:44 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 06/12] hw/riscv: sifive_u: Allow specifying the CPU Date: Fri, 23 Oct 2020 08:16:13 -0700 Message-Id: <20201023151619.3175155-7-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Palmer Dabbelt , alistair23@gmail.com, Bin Meng , Alistair Francis Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Allow the user to specify the main application CPU for the sifive_u machine. Signed-off-by: Alistair Francis Reviewed-by: Bin Meng Reviewed-by: Palmer Dabbelt Tested-by: Bin Meng Message-id: b8412086c8aea0eff30fb7a17f0acf2943381b6a.1602634524.git.alistair.francis@wdc.com --- include/hw/riscv/sifive_u.h | 1 + hw/riscv/sifive_u.c | 18 +++++++++++++----- 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index 22e7e6efa1..a9f7b4a084 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -48,6 +48,7 @@ typedef struct SiFiveUSoCState { CadenceGEMState gem; uint32_t serial; + char *cpu_type; } SiFiveUSoCState; #define TYPE_RISCV_U_MACHINE MACHINE_TYPE_NAME("sifive_u") diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 6ad975d692..5f3ad9bc0f 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -424,6 +424,8 @@ static void sifive_u_machine_init(MachineState *machine) object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_U_SOC); object_property_set_uint(OBJECT(&s->soc), "serial", s->serial, &error_abort); + object_property_set_str(OBJECT(&s->soc), "cpu-type", machine->cpu_type, + &error_abort); qdev_realize(DEVICE(&s->soc), NULL, &error_abort); /* register RAM */ @@ -590,6 +592,11 @@ static void sifive_u_machine_class_init(ObjectClass *oc, void *data) mc->init = sifive_u_machine_init; mc->max_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + SIFIVE_U_COMPUTE_CPU_COUNT; mc->min_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + 1; +#if defined(TARGET_RISCV32) + mc->default_cpu_type = TYPE_RISCV_CPU_SIFIVE_U34; +#elif defined(TARGET_RISCV64) + mc->default_cpu_type = TYPE_RISCV_CPU_SIFIVE_U54; +#endif mc->default_cpus = mc->min_cpus; object_class_property_add_bool(oc, "start-in-flash", @@ -618,7 +625,6 @@ type_init(sifive_u_machine_init_register_types) static void sifive_u_soc_instance_init(Object *obj) { - MachineState *ms = MACHINE(qdev_get_machine()); SiFiveUSoCState *s = RISCV_U_SOC(obj); object_initialize_child(obj, "e-cluster", &s->e_cluster, TYPE_CPU_CLUSTER); @@ -636,10 +642,6 @@ static void sifive_u_soc_instance_init(Object *obj) object_initialize_child(OBJECT(&s->u_cluster), "u-cpus", &s->u_cpus, TYPE_RISCV_HART_ARRAY); - qdev_prop_set_uint32(DEVICE(&s->u_cpus), "num-harts", ms->smp.cpus - 1); - qdev_prop_set_uint32(DEVICE(&s->u_cpus), "hartid-base", 1); - qdev_prop_set_string(DEVICE(&s->u_cpus), "cpu-type", SIFIVE_U_CPU); - qdev_prop_set_uint64(DEVICE(&s->u_cpus), "resetvec", 0x1004); object_initialize_child(obj, "prci", &s->prci, TYPE_SIFIVE_U_PRCI); object_initialize_child(obj, "otp", &s->otp, TYPE_SIFIVE_U_OTP); @@ -661,6 +663,11 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) int i; NICInfo *nd = &nd_table[0]; + qdev_prop_set_uint32(DEVICE(&s->u_cpus), "num-harts", ms->smp.cpus - 1); + qdev_prop_set_uint32(DEVICE(&s->u_cpus), "hartid-base", 1); + qdev_prop_set_string(DEVICE(&s->u_cpus), "cpu-type", s->cpu_type); + qdev_prop_set_uint64(DEVICE(&s->u_cpus), "resetvec", 0x1004); + sysbus_realize(SYS_BUS_DEVICE(&s->e_cpus), &error_abort); sysbus_realize(SYS_BUS_DEVICE(&s->u_cpus), &error_abort); /* @@ -792,6 +799,7 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) static Property sifive_u_soc_props[] = { DEFINE_PROP_UINT32("serial", SiFiveUSoCState, serial, OTP_SERIAL), + DEFINE_PROP_STRING("cpu-type", SiFiveUSoCState, cpu_type), DEFINE_PROP_END_OF_LIST() }; From patchwork Fri Oct 23 15:16:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 270532 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13096C4363A for ; Fri, 23 Oct 2020 16:08:08 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 678C32168B for ; Fri, 23 Oct 2020 16:08:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="HLLNxssj" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 678C32168B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:56628 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzbq-00089I-59 for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 12:08:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60408) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyz-0004Kl-3H for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:58 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26169) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyv-0001Y4-Bq for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466873; x=1635002873; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cHLv6Xa/Mv6eHkYaJhgq25XI2qqlc+Or3T2F3M6qC9c=; b=HLLNxssjxeTDBPqNOWWhulH7BhNOi7abuK3/4LVExDdPQh8GpRDEY0to Gz7turfQsN9U9jHVNHUrzZlT8AxKLjwVyheHNMgBXZ7B4J6SuWWHb8gWO u5JkG+iwnepf3DZ1KICp5O1SVNBh+GCHQYTwsbNtYQJEOPQxg2yz0mZMa J0LcQrwWw8tkee5DhzLWfK+RCD/jrInSIuo7i/tYhxqg+SReWmofwt5cV ilfzbE43HCZsNI9F/RlUrzsVLrYr+2lYdpSrpFuy4UeHEbFHSdkr6Voqg sae10O6EN219259NvfNJit938TU3P/uh1qfb7xfKm4FQIiswB7zsBpxe1 A==; IronPort-SDR: hlf1f3EYlArM6YNBdkFhdY2wKQ0c4ZSgV0SAcBnDUlxNavbiHHBlrQKJT/umx3ilBlssbeAdrC hsHGHud1dZZrIl5vEWHCKG7x8eqXQITUX4odetFEm080l8Vn+GFYB+XT4ZQ8r2r4dqjR0WfiPl i9JNPT2iyciYWcrRWe4Nh3rv+Ct1Jfzt/1C2eVfsE4jYBWCwnCrOY/4K2jMFMIFbY3m+VSZcM2 6n+G14J9jjtFCg6KWVauM7TeEoJrsHfhNCKVtlWU83cYOXEC6Xdm/QuHmMaT/QL0wyBrnFh1bb dwA= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652323" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:44 +0800 IronPort-SDR: 6/Jc7hSM2D06k3QU+/2tNVxZgo//lt7sUWuFJy17QzrO5seRcGhZV5fwjCBvoMBCN++SCNruGD usr2s3R4MFusfvmh6G6j3yFdLwvq0tYdNVsqNzX9wcMHlcTjKiYWJMv8NukhZQND8l5NljtaiJ AE9puQw+yQST5LGZ4M4FYCBCDcVL4LbRo48jfKGmHrOYK0blB/TLaoko4mHnnCMvPxO+8WBiLY sO+uiDZKduVUAePZf1rxFDyxGCoPFG856SbQbfmDfLOHe/fM+OSiIaFT/gbazgFvdFaeRVt78J 9K+NHhjAaPFBy/PU5UW2857X Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:12:59 -0700 IronPort-SDR: A7XZXZVrV5KsdZGuYjVAiBL0D+/f2Yd4FNfc3DGOWzxUfUoqmjJO+kk501Fwv9brjl3tkzN1u4 6qfA1UZyIhRxhlq/smgtrwQI6GRgS2/37L3XlAPCB5fB0zxQ3ByuR42XpkIGzV00A2fgLGSD7E /C70T7uz9m2PQp6ioN3Mz/5YaZUbNB5UsdPF4JDC6qIRduA6TmUY0gOKYyhon6j3H9GVlkVsXI Zb+impGNCSeIfqI554piNhi90qDs3G53StYJcpxNYtH/FCyY4qXG4q1zzokUUogSzCP8n0f1zi 278= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:44 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 07/12] hw/riscv: Return the end address of the loaded firmware Date: Fri, 23 Oct 2020 08:16:14 -0700 Message-Id: <20201023151619.3175155-8-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bin Meng , alistair23@gmail.com, Palmer Dabbelt , Alistair Francis Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Instead of returning the unused entry address from riscv_load_firmware() instead return the end address. Also return the end address from riscv_find_and_load_firmware(). This tells the caller if a firmware was loaded and how big it is. This can be used to determine the load address of the next image (usually the kernel). Signed-off-by: Alistair Francis Reviewed-by: Palmer Dabbelt Reviewed-by: Bin Meng Tested-by: Bin Meng Message-id: 558cf67162342d65a23262248b040563716628b2.1602634524.git.alistair.francis@wdc.com --- include/hw/riscv/boot.h | 8 ++++---- hw/riscv/boot.c | 28 +++++++++++++++++----------- 2 files changed, 21 insertions(+), 15 deletions(-) diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index 451338780a..0acbd8aa6e 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -23,10 +23,10 @@ #include "exec/cpu-defs.h" #include "hw/loader.h" -void riscv_find_and_load_firmware(MachineState *machine, - const char *default_machine_firmware, - hwaddr firmware_load_addr, - symbol_fn_t sym_cb); +target_ulong riscv_find_and_load_firmware(MachineState *machine, + const char *default_machine_firmware, + hwaddr firmware_load_addr, + symbol_fn_t sym_cb); char *riscv_find_firmware(const char *firmware_filename); target_ulong riscv_load_firmware(const char *firmware_filename, hwaddr firmware_load_addr, diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 21adaae56e..fa699308a0 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -40,12 +40,13 @@ #define fw_dynamic_info_data(__val) cpu_to_le64(__val) #endif -void riscv_find_and_load_firmware(MachineState *machine, - const char *default_machine_firmware, - hwaddr firmware_load_addr, - symbol_fn_t sym_cb) +target_ulong riscv_find_and_load_firmware(MachineState *machine, + const char *default_machine_firmware, + hwaddr firmware_load_addr, + symbol_fn_t sym_cb) { char *firmware_filename = NULL; + target_ulong firmware_end_addr = firmware_load_addr; if ((!machine->firmware) || (!strcmp(machine->firmware, "default"))) { /* @@ -60,9 +61,12 @@ void riscv_find_and_load_firmware(MachineState *machine, if (firmware_filename) { /* If not "none" load the firmware */ - riscv_load_firmware(firmware_filename, firmware_load_addr, sym_cb); + firmware_end_addr = riscv_load_firmware(firmware_filename, + firmware_load_addr, sym_cb); g_free(firmware_filename); } + + return firmware_end_addr; } char *riscv_find_firmware(const char *firmware_filename) @@ -91,17 +95,19 @@ target_ulong riscv_load_firmware(const char *firmware_filename, hwaddr firmware_load_addr, symbol_fn_t sym_cb) { - uint64_t firmware_entry; + uint64_t firmware_entry, firmware_size, firmware_end; if (load_elf_ram_sym(firmware_filename, NULL, NULL, NULL, - &firmware_entry, NULL, NULL, NULL, + &firmware_entry, NULL, &firmware_end, NULL, 0, EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) { - return firmware_entry; + return firmware_end; } - if (load_image_targphys_as(firmware_filename, firmware_load_addr, - ram_size, NULL) > 0) { - return firmware_load_addr; + firmware_size = load_image_targphys_as(firmware_filename, + firmware_load_addr, ram_size, NULL); + + if (firmware_size > 0) { + return firmware_load_addr + firmware_size; } error_report("could not load firmware '%s'", firmware_filename); From patchwork Fri Oct 23 15:16:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 302146 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51768C4363A for ; Fri, 23 Oct 2020 16:05:15 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B6D042168B for ; Fri, 23 Oct 2020 16:05:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="MkRiwiBr" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B6D042168B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:45228 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzZ3-0003TK-Nr for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 12:05:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60432) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyz1-0004Lk-83 for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:28:01 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26170) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyx-0001YB-1B for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:27:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466874; x=1635002874; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yE5+hyUffpnvJ1ZCmkpKdCuq12nvG7F0ktIepyst7zw=; b=MkRiwiBry+qmiXVn3q7lVHI+KzTAbD91JRD/bflpzF7HUlxRa5apuGYb K0sUPRYuvwgKw9KIEpsqym8b8jPfzr7SsH0xWWmiwF+TW/z5xyaOoQ4ws qVVaLbyXtTkcxvpGOvT7iORLbs5LLBdaEIT7FEHMKTIPyxszhMa2KP097 JlIyrkdZfiF4fhZzQ+fX5SJEKMeRt+zVyQEIHRGr5TdxDlskkfh6BZ0SG IyV/sHwy/uk4M7s2sUJ8hmHxGYi0NP9Hp37k5eVjRJLCfugrqj/qOVl5K 7YbncWtlcojkKK/xG8FLbVlS795Bt0b3Qo+gzXUHwDpzt11N0RekiePYo w==; IronPort-SDR: rhQYuJ3uLEPf7dazjkXt9OdGtNnxudgyhZ8pSk3qopVPUielJ7/dySWrNTRkHnI17b33kgjCmt TsnS+wnBizAmHAB9/j0yVz/NF+8KyiI4GroMpC15tbHyO7yzHgqPn1fTcerqxEw8mLF+n7O8+H EbWf4MJyql29Y/fEQeI29OLQeUdJxlY3Ze+SW7LnWflVLaVzwLCEThc/6+BJvfkWfr/sCYlQ0i BVt55HGG4MFf35ouafs5+CfowhfBI7mR1CjuG5YznWB42E1BlFROhVPT3AlSpDcU+2DwS4ZYxC uAo= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652324" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:44 +0800 IronPort-SDR: Ju1xbu79q094sol0WuPh0grpDTw7UjCyjrXRW38Y+PvHtIBhwVFBpVlOWkGvI3TWB0Soh8AZH2 pzusxyX7T/0O3PIgjs+lKGauZdUs3vvZankFJD5d1+uGo+4dzQ2ozIKWxgcfRpUUIaoDNZDGCZ BAyHryDb+TAxJcu6XJkPJm+qI62H4+AgIfURVEzsGWp2q366V6ZeUJHw5NAAFz0hThuZem9u6z t6L7PeBsCJcrGsdz278LO9frL/af3OoLnT19aZRHBmMrL77G8oBZ9O6U1PDD/LkBoeLCoMlE+B mtQ5GOiecCtU0xD9X9ciS5Dw Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:12:59 -0700 IronPort-SDR: eifaaHkjO/mk24lCjubU+bvgeVxZIsP/YIEzsTSfoOxeyKhYVTS0G7drn5ilN8nc9aBA4kItk1 iNjKSXDQraZwIbn8yMhDXcL1fK2xAx7GmHGi72GE6WeoanDhbpmDwAwP7otk519XY0AEzeUi2V X9OzKUCFC3Fv8fsMblkUXwBK3kGqII0Yj3wKSgVUe8xjVe+gB1FIIWe4n5pDrTmCV2q7yMcDI6 wG2diwnB7KOMx/RhIXlTg3nzstJsf4AlrFU75crDeEfs4rLSdOH4XvLBXdvM7AX0Qgte+z8qg/ 7WY= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:44 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 08/12] hw/riscv: Add a riscv_is_32_bit() function Date: Fri, 23 Oct 2020 08:16:15 -0700 Message-Id: <20201023151619.3175155-9-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bin Meng , alistair23@gmail.com, Palmer Dabbelt , Alistair Francis Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Alistair Francis Reviewed-by: Palmer Dabbelt Reviewed-by: Bin Meng Tested-by: Bin Meng Message-id: 4c6a85dfb6dd470aa79356ebc1b02f479c2758e0.1602634524.git.alistair.francis@wdc.com --- include/hw/riscv/boot.h | 2 ++ hw/riscv/boot.c | 9 +++++++++ 2 files changed, 11 insertions(+) diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index 0acbd8aa6e..2975ed1a31 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -23,6 +23,8 @@ #include "exec/cpu-defs.h" #include "hw/loader.h" +bool riscv_is_32_bit(MachineState *machine); + target_ulong riscv_find_and_load_firmware(MachineState *machine, const char *default_machine_firmware, hwaddr firmware_load_addr, diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index fa699308a0..5dea644f47 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -40,6 +40,15 @@ #define fw_dynamic_info_data(__val) cpu_to_le64(__val) #endif +bool riscv_is_32_bit(MachineState *machine) +{ + if (!strncmp(machine->cpu_type, "rv32", 4)) { + return true; + } else { + return false; + } +} + target_ulong riscv_find_and_load_firmware(MachineState *machine, const char *default_machine_firmware, hwaddr firmware_load_addr, From patchwork Fri Oct 23 15:16:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 302144 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0959CC55179 for ; Fri, 23 Oct 2020 16:07:27 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2A824206DD for ; Fri, 23 Oct 2020 16:07:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="AUg9zMwD" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2A824206DD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:53634 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzbB-0006vZ-2v for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 12:07:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60456) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyz4-0004M1-4r for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:28:03 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26168) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyyy-0001Xq-64 for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:28:00 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466875; x=1635002875; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rylK4+/QKjR1osrkrXuVvxRCm6C/UTtTufbeph92suw=; b=AUg9zMwD/VA7xK868+ux/Ro30sJaGlckTor1ZXsPsS8ddhWhi0uVzDaX FZvRBlxAEotQlKWQYE5aK7ve3PKtDn8Oi6ffDDv24EU5Koo1lWGDUnMqT eiqItrrRngh3wJhzyAY2Aex1aDMkrkDs6N8eg1QsHsz9TByYcIB9QJbT9 ZMEP0V3VJqqRlJ+Ktfk35O1pzh37j+sj1KWSlOA9yPexf1OW7YtZB1BnZ N8Vm2UwlBU9uM4102S77Go1wHMqilwqrYj3S/hVnHWfslFw0nC4kDaV9g t1yJmymcxOe8M/GjTEq26ywgbPISth55qTVk4KS05FjZmbpucjve2HEpv w==; IronPort-SDR: GgwE7OwvYCg41w/9xmzAdVbcp3e4UHu8bcHSexo23BG9iRHRlQ9v/tKcWIY3GgVJ14lFCqmoIY fpzwj6ISrSJbgJcyPtuewIbvyYF6lBgvVaLxdIfQ4CCU7mGbbKH6skyBFcGYMLTUFTKVvjBanJ otxBJm3yFNaJC2FUJPn0T3AWBnXoEzJF9uUCYhaixAsMphMTh/yD/sjDfcmN49b73M81GZuJdD ekoJzrpx9LNKx2N+NkkhVzr47FpVMPS1HfGUU1C0vohjEvB8zKLnHcwARg/KcQSfuloUA+TEhl JTo= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652325" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:44 +0800 IronPort-SDR: Wl24X0LsIe1M8iMK94iBg/oq24PPy2gFUXaDVVfa/MAb0P+FKtmB+8AvDkq5UtGeybO9lK1C94 B0X67gM6ehJSJs8Y7N/OI24KW8Fk8nuair8Tg/BIWlPSKZkFF7JdclaDFYKRc9ydkJceTF2TvJ ZvZp3iXheBZw0UGSkVUc+ctnzbYLKLsHpMcRHnZBIC3DHMn8fKxS3tXcyoHxnB2bLK5Pkc1D85 3oq6QwMVGoTtLseJVDCfpZqvXuZHHjQE3CKCORyuDMhNhgcTfLpZ0/T9i52ELBrVOqe8loxY+T AXngaOZDt/1t2HgIwX9nyvc7 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:13:00 -0700 IronPort-SDR: zjIWhA6HeGu2itWzrA8SlqzxgzxvvpJ3/8xEUIyMHI17wqIqhCljLYQstaxNbvtr+Mp80LFhKP Mb/x0YpAmlgLiFcg2JxHi+7NiaRrsPtFhC0MWEmP6PJ6W2DX82Ec27Rk+BLhqL91rL+lJxtlHK CC7XOn9V/pjXIXHb18O4my/wmRad5zwJhHGY5Ov1cioYJDyuH+T1f2nICIdptVyVlMDTDgSuK/ 25p5+g/dFmCQeGPH+XG/jUe4L+uScpm0wHUrEYMoZbziwEnIn8KdG6T1OGCD4jjsBOoYofFV3u G30= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:45 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 09/12] hw/riscv: Load the kernel after the firmware Date: Fri, 23 Oct 2020 08:16:16 -0700 Message-Id: <20201023151619.3175155-10-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bin Meng , alistair23@gmail.com, Palmer Dabbelt , Alistair Francis Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Instead of loading the kernel at a hardcoded start address, let's load the kernel at the next aligned address after the end of the firmware. This should have no impact for current users of OpenSBI, but will allow loading a noMMU kernel at the start of memory. Signed-off-by: Alistair Francis Reviewed-by: Palmer Dabbelt Reviewed-by: Bin Meng Tested-by: Bin Meng Message-id: 46c00c4f15b42feb792090e3d74359e180a6d954.1602634524.git.alistair.francis@wdc.com --- include/hw/riscv/boot.h | 3 +++ hw/riscv/boot.c | 19 ++++++++++++++----- hw/riscv/opentitan.c | 3 ++- hw/riscv/sifive_e.c | 3 ++- hw/riscv/sifive_u.c | 10 ++++++++-- hw/riscv/spike.c | 11 ++++++++--- hw/riscv/virt.c | 11 ++++++++--- 7 files changed, 45 insertions(+), 15 deletions(-) diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index 2975ed1a31..0b01988727 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -25,6 +25,8 @@ bool riscv_is_32_bit(MachineState *machine); +target_ulong riscv_calc_kernel_start_addr(MachineState *machine, + target_ulong firmware_end_addr); target_ulong riscv_find_and_load_firmware(MachineState *machine, const char *default_machine_firmware, hwaddr firmware_load_addr, @@ -34,6 +36,7 @@ target_ulong riscv_load_firmware(const char *firmware_filename, hwaddr firmware_load_addr, symbol_fn_t sym_cb); target_ulong riscv_load_kernel(const char *kernel_filename, + target_ulong firmware_end_addr, symbol_fn_t sym_cb); hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, uint64_t kernel_entry, hwaddr *start); diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 5dea644f47..9b3fe3fb1e 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -33,10 +33,8 @@ #include #if defined(TARGET_RISCV32) -# define KERNEL_BOOT_ADDRESS 0x80400000 #define fw_dynamic_info_data(__val) cpu_to_le32(__val) #else -# define KERNEL_BOOT_ADDRESS 0x80200000 #define fw_dynamic_info_data(__val) cpu_to_le64(__val) #endif @@ -49,6 +47,15 @@ bool riscv_is_32_bit(MachineState *machine) } } +target_ulong riscv_calc_kernel_start_addr(MachineState *machine, + target_ulong firmware_end_addr) { + if (riscv_is_32_bit(machine)) { + return QEMU_ALIGN_UP(firmware_end_addr, 4 * MiB); + } else { + return QEMU_ALIGN_UP(firmware_end_addr, 2 * MiB); + } +} + target_ulong riscv_find_and_load_firmware(MachineState *machine, const char *default_machine_firmware, hwaddr firmware_load_addr, @@ -123,7 +130,9 @@ target_ulong riscv_load_firmware(const char *firmware_filename, exit(1); } -target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb) +target_ulong riscv_load_kernel(const char *kernel_filename, + target_ulong kernel_start_addr, + symbol_fn_t sym_cb) { uint64_t kernel_entry; @@ -138,9 +147,9 @@ target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb) return kernel_entry; } - if (load_image_targphys_as(kernel_filename, KERNEL_BOOT_ADDRESS, + if (load_image_targphys_as(kernel_filename, kernel_start_addr, ram_size, NULL) > 0) { - return KERNEL_BOOT_ADDRESS; + return kernel_start_addr; } error_report("could not load kernel '%s'", kernel_filename); diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 0531bd879b..cc758b78b8 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -75,7 +75,8 @@ static void opentitan_board_init(MachineState *machine) } if (machine->kernel_filename) { - riscv_load_kernel(machine->kernel_filename, NULL); + riscv_load_kernel(machine->kernel_filename, + memmap[IBEX_DEV_RAM].base, NULL); } } diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index fcfac16816..59bac4cc9a 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -114,7 +114,8 @@ static void sifive_e_machine_init(MachineState *machine) memmap[SIFIVE_E_DEV_MROM].base, &address_space_memory); if (machine->kernel_filename) { - riscv_load_kernel(machine->kernel_filename, NULL); + riscv_load_kernel(machine->kernel_filename, + memmap[SIFIVE_E_DEV_DTIM].base, NULL); } } diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 5f3ad9bc0f..b2472c6627 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -415,6 +415,7 @@ static void sifive_u_machine_init(MachineState *machine) MemoryRegion *main_mem = g_new(MemoryRegion, 1); MemoryRegion *flash0 = g_new(MemoryRegion, 1); target_ulong start_addr = memmap[SIFIVE_U_DEV_DRAM].base; + target_ulong firmware_end_addr, kernel_start_addr; uint32_t start_addr_hi32 = 0x00000000; int i; uint32_t fdt_load_addr; @@ -474,10 +475,15 @@ static void sifive_u_machine_init(MachineState *machine) break; } - riscv_find_and_load_firmware(machine, BIOS_FILENAME, start_addr, NULL); + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, + start_addr, NULL); if (machine->kernel_filename) { - kernel_entry = riscv_load_kernel(machine->kernel_filename, NULL); + kernel_start_addr = riscv_calc_kernel_start_addr(machine, + firmware_end_addr); + + kernel_entry = riscv_load_kernel(machine->kernel_filename, + kernel_start_addr, NULL); if (machine->initrd_filename) { hwaddr start; diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 3fd152a035..facac6e7d2 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -195,6 +195,7 @@ static void spike_board_init(MachineState *machine) MemoryRegion *system_memory = get_system_memory(); MemoryRegion *main_mem = g_new(MemoryRegion, 1); MemoryRegion *mask_rom = g_new(MemoryRegion, 1); + target_ulong firmware_end_addr, kernel_start_addr; uint32_t fdt_load_addr; uint64_t kernel_entry; char *soc_name; @@ -261,12 +262,16 @@ static void spike_board_init(MachineState *machine) memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base, mask_rom); - riscv_find_and_load_firmware(machine, BIOS_FILENAME, - memmap[SPIKE_DRAM].base, - htif_symbol_callback); + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, + memmap[SPIKE_DRAM].base, + htif_symbol_callback); if (machine->kernel_filename) { + kernel_start_addr = riscv_calc_kernel_start_addr(machine, + firmware_end_addr); + kernel_entry = riscv_load_kernel(machine->kernel_filename, + kernel_start_addr, htif_symbol_callback); if (machine->initrd_filename) { diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 41bd2f38ba..6bfd10dfc7 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -493,6 +493,7 @@ static void virt_machine_init(MachineState *machine) char *plic_hart_config, *soc_name; size_t plic_hart_config_len; target_ulong start_addr = memmap[VIRT_DRAM].base; + target_ulong firmware_end_addr, kernel_start_addr; uint32_t fdt_load_addr; uint64_t kernel_entry; DeviceState *mmio_plic, *virtio_plic, *pcie_plic; @@ -602,11 +603,15 @@ static void virt_machine_init(MachineState *machine) memory_region_add_subregion(system_memory, memmap[VIRT_MROM].base, mask_rom); - riscv_find_and_load_firmware(machine, BIOS_FILENAME, - memmap[VIRT_DRAM].base, NULL); + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, + start_addr, NULL); if (machine->kernel_filename) { - kernel_entry = riscv_load_kernel(machine->kernel_filename, NULL); + kernel_start_addr = riscv_calc_kernel_start_addr(machine, + firmware_end_addr); + + kernel_entry = riscv_load_kernel(machine->kernel_filename, + kernel_start_addr, NULL); if (machine->initrd_filename) { hwaddr start; From patchwork Fri Oct 23 15:16:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 302145 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84ABDC388F9 for ; Fri, 23 Oct 2020 16:05:25 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 024F321D47 for ; Fri, 23 Oct 2020 16:05:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="HOlI6UeF" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 024F321D47 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:46178 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzZD-0003qb-Vi for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 12:05:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60478) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyzB-0004Ns-BL for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:28:11 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26169) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyz0-0001Y4-S6 for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:28:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466878; x=1635002878; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5LshL2NkcHA1RDGV9snQE3sw9voWmOvgUlT4WW/q4e0=; b=HOlI6UeF90UAztDeBaJm/b+5NEFlGPJyllPKtPPIgyvxVM9UjRGU0Iia 3fnyaTwBB0r6iKtnTWzdaDLvFk6bRPBy7e41WSop6Qscnof9AJkyTmuzP H+0670s3DLeuXK5RecOdD4pwAIv1TGE4blz4e2fbNqUl6cxRcVjXzPDNs 1xI/5fZPzYM6APpeq0c76sRysJxXwWbsF70P2GEZV1d4+48r9wsxACOyl ZMDHsh3ZuxPHu2P5qiphnItFFq5c9q6LYHoQ8YcKWUbVJ/Q5mZAygmiaL Skew3l3ksEEGIo7/DLpQ0YoDry2xtxIe30CrbDSqBnbr40ztrQ2VDpNtu w==; IronPort-SDR: 9GdCm0geRiWfAv7p+gTGpiPuFQSVtsnrp1++bP/FJKCLwgRvD3b9QpMx7mnZ5HpKFk4t+1f+rN z0auT74gd/EnK+U/44mjjj1PZsMTWeyUderp7Bwq1+zZR8mPSQo058/pP5Z+MXlgbH2iGkZCrm CrxmWTjkccBNbxTRSLYixnFS/J7bsNlwbqPnFu0UClg1smvUuxbMCudSAYOfI+5R+uPhx8kFvI YkYgPswivvgyK14zKtBeytBiYf+Q85BhrGH7tulp+9bh8x7dU3mJcmSJBplOfnkZW+SGdyALRw 1O4= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652326" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:45 +0800 IronPort-SDR: UxWvT9DUC+oLSgQ0HQwN8Hk2yV48mQnsDKglEm0FLF7O8/i9RYxd5SI9DqGIdazq7JTcpXwgHg l3+CUtNH0Qc60B22v61EF/BPjX3n7dNmWU0SFTxA6OSctqoXXTzCC0qULR2oOvvER+GK2CPd9b Z8koTpWYBrnMoZIlu3o0X/UQHR0lHi7KJGMAB2yUVpVS/E2/g20uBTrW/A59buj2K8jmBgD4i0 jGa+YoLBBS1VLlfzGIbukVzm7A/6mBR+udskPPO90qRDybJ/8KqCsdSVYLCoTxgeXirmMyydDH Huo1hCLA1WTNNjkRyFJzmFGq Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:13:00 -0700 IronPort-SDR: zc6MpyBZw7AP1W4jEM4xryJatBXrK2SrJcenL4QGN5jVnf/DRIOojpyDrBFcUYhIZxE4nxmg72 jRTxqG6QMZI8W3oUPPSRfb69b7Atw7RBbCQxBD9REoiDtMmHQC0hAky7KG6U9TzZmYy6VQ/L1K cJwbWsLISKUz+f5zxFQtHNdGr9YQo2/Vh1HJ3P1HxeMxxfiWmmDa9EUXlhbSvZLKU0FZUH5Ybo bHQ7j1qkKVrxYxYIULHq5+abLEU26WYPNJk7H5wzJJF9mbdXp3ySN6/rAQ80Xtsx6KjdVYN243 82E= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:45 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 10/12] target/riscv: raise exception to HS-mode at get_physical_address Date: Fri, 23 Oct 2020 08:16:17 -0700 Message-Id: <20201023151619.3175155-11-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, Alistair Francis , Yifei Jiang , Yipeng Yin Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Yifei Jiang VS-stage translation at get_physical_address needs to translate pte address by G-stage translation. But the G-stage translation error can not be distinguished from VS-stage translation error in riscv_cpu_tlb_fill. On migration, destination needs to rebuild pte, and this G-stage translation error must be handled by HS-mode. So introduce TRANSLATE_STAGE2_FAIL so that riscv_cpu_tlb_fill could distinguish and raise it to HS-mode. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin Reviewed-by: Alistair Francis Message-id: 20201014101728.848-1-jiangyifei@huawei.com [ Change by AF: - Clarify the fault_pte_addr shift ] Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 10 +++++++--- target/riscv/cpu_helper.c | 36 +++++++++++++++++++++++++++--------- 2 files changed, 34 insertions(+), 12 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index de275782e6..de4705bb57 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -82,9 +82,13 @@ enum { #define VEXT_VERSION_0_07_1 0x00000701 -#define TRANSLATE_PMP_FAIL 2 -#define TRANSLATE_FAIL 1 -#define TRANSLATE_SUCCESS 0 +enum { + TRANSLATE_SUCCESS, + TRANSLATE_FAIL, + TRANSLATE_PMP_FAIL, + TRANSLATE_G_STAGE_FAIL +}; + #define MMU_USER_IDX 3 #define MAX_RISCV_PMPS (16) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index f363c1013c..4652082df1 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -316,6 +316,9 @@ void riscv_cpu_set_mode(CPURISCVState *env, target_ulong newpriv) * @physical: This will be set to the calculated physical address * @prot: The returned protection attributes * @addr: The virtual address to be translated + * @fault_pte_addr: If not NULL, this will be set to fault pte address + * when a error occurs on pte address translation. + * This will already be shifted to match htval. * @access_type: The type of MMU access * @mmu_idx: Indicates current privilege level * @first_stage: Are we in first stage translation? @@ -324,6 +327,7 @@ void riscv_cpu_set_mode(CPURISCVState *env, target_ulong newpriv) */ static int get_physical_address(CPURISCVState *env, hwaddr *physical, int *prot, target_ulong addr, + target_ulong *fault_pte_addr, int access_type, int mmu_idx, bool first_stage, bool two_stage) { @@ -447,11 +451,14 @@ restart: /* Do the second stage translation on the base PTE address. */ int vbase_ret = get_physical_address(env, &vbase, &vbase_prot, - base, MMU_DATA_LOAD, + base, NULL, MMU_DATA_LOAD, mmu_idx, false, true); if (vbase_ret != TRANSLATE_SUCCESS) { - return vbase_ret; + if (fault_pte_addr) { + *fault_pte_addr = (base + idx * ptesize) >> 2; + } + return TRANSLATE_G_STAGE_FAIL; } pte_addr = vbase + idx * ptesize; @@ -632,13 +639,13 @@ hwaddr riscv_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) int prot; int mmu_idx = cpu_mmu_index(&cpu->env, false); - if (get_physical_address(env, &phys_addr, &prot, addr, 0, mmu_idx, + if (get_physical_address(env, &phys_addr, &prot, addr, NULL, 0, mmu_idx, true, riscv_cpu_virt_enabled(env))) { return -1; } if (riscv_cpu_virt_enabled(env)) { - if (get_physical_address(env, &phys_addr, &prot, phys_addr, + if (get_physical_address(env, &phys_addr, &prot, phys_addr, NULL, 0, mmu_idx, false, true)) { return -1; } @@ -727,19 +734,30 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (riscv_cpu_virt_enabled(env) || (riscv_cpu_two_stage_lookup(env) && access_type != MMU_INST_FETCH)) { /* Two stage lookup */ - ret = get_physical_address(env, &pa, &prot, address, access_type, + ret = get_physical_address(env, &pa, &prot, address, + &env->guest_phys_fault_addr, access_type, mmu_idx, true, true); + /* + * A G-stage exception may be triggered during two state lookup. + * And the env->guest_phys_fault_addr has already been set in + * get_physical_address(). + */ + if (ret == TRANSLATE_G_STAGE_FAIL) { + first_stage_error = false; + access_type = MMU_DATA_LOAD; + } + qemu_log_mask(CPU_LOG_MMU, "%s 1st-stage address=%" VADDR_PRIx " ret %d physical " TARGET_FMT_plx " prot %d\n", __func__, address, ret, pa, prot); - if (ret != TRANSLATE_FAIL) { + if (ret == TRANSLATE_SUCCESS) { /* Second stage lookup */ im_address = pa; - ret = get_physical_address(env, &pa, &prot2, im_address, + ret = get_physical_address(env, &pa, &prot2, im_address, NULL, access_type, mmu_idx, false, true); qemu_log_mask(CPU_LOG_MMU, @@ -768,8 +786,8 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, } } else { /* Single stage lookup */ - ret = get_physical_address(env, &pa, &prot, address, access_type, - mmu_idx, true, false); + ret = get_physical_address(env, &pa, &prot, address, NULL, + access_type, mmu_idx, true, false); qemu_log_mask(CPU_LOG_MMU, "%s address=%" VADDR_PRIx " ret %d physical " From patchwork Fri Oct 23 15:16:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 302142 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4CCBC4363A for ; Fri, 23 Oct 2020 16:09:46 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 345AD2168B for ; Fri, 23 Oct 2020 16:09:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="dYgJBg9A" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 345AD2168B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:33508 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzdR-0001tA-1v for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 12:09:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60506) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyzH-0004RB-62 for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:28:15 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26170) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyzD-0001YB-43 for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:28:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466890; x=1635002890; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JRKNZm3JZXoXP8vrq/yexaKtcj6lWAF7ME1cCL7Nrn8=; b=dYgJBg9AA8s6emz9tyPzLRSxEH8eLJFfT577Quvn/UVTUM6bLwWHNMuf aaNjS1vhQvA6ybHD+Kd5t313DIiR0s6slUzPkQnS2tEyIiJx25Erlh0ft a44HdlssyhtWAm0wrDmfGMui8YOC/nQnSlV1FbHvyvALUuv0poo8hcvqP sjKa6IgnTM2Cl6D3dhjUdEgTPUK5cPon5+SIrDtXoHRB2mOMdRdz5Ske4 0SMvMyv2q1p7z5/V17KHUqbsujO6NccbiTggTGdoQscvvUCpdEIVZIzBI lk9f4VnDaHGWXwb9eHkrqQvMEe24B9ZCgSrLZ4KCdZTddwBHBOSzP1erP Q==; IronPort-SDR: UHO4yr4YXC0c6a2vlnNXYg2kSgvjyRmD14Ql/oTaxi9NLELTqhBtfZULZ2Ua7SHubay86U0WaP J+7jruDt49TNu0VGSi3AbU793uxmE52TL1X53z2UmLOUjZwTP1pFBlN0YJ5g+cn3V+J0jBz70+ uCQ4wM8NI7jt3zEywlQ//mwRV8RwCoJJC7dm8XwC5zAh4JyNOjppKXR/n/omYUeMgxWylYwVlP 8eHL/bkvtnxO1w/l7jV8+RFYZAy5t2W6eyVqQBD7Z7aGaTWMmSBPqrVrgtIzasDwLQC7czpe6w jFQ= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652329" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:45 +0800 IronPort-SDR: vGyKT9c4tbCtfyWRh+BZ/cljWnU4xDzo6TCw/goddCkZvWR8NB7RKaMy30zZFM3PwhHes4RkUw DQurKe3nn4SzrBfHdoBnkzM6lB091cXq23bKR0wsrCKeYERkmmHBH7HxfIIlQ6BfH1GVf2URk0 v74oIMX6oAoPGkUp32Tp4Sa6+kiwKNDo0+C2POJg8iPizXuBtvQ4MwnfCJe/RKieV6ScbcY2x/ O9DS1HMXlG++Li/xvOfvghHz+3Ehy/ffMORZICgSsaw6xifcC8AM2Mbh7ycf8u6dWjHn6mE8kx M13oVK2vxW2RHXEf72wkRmuq Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:13:00 -0700 IronPort-SDR: +eIxOTGSppOm9GoWaP874wtpFYoRqx2VvVPHjweMCQ+WLg6aXXseVMloL4vglqUQfP2bbbzE3X gBRZN3+FgFOKaQDMrnJvOh2QAyt8z5DkIfndwloOE4kmJbIcirel1JqAn8zmw/nrbIMuIu48Q2 UOsL1+DckO4p2LZmUNcKVlxAJcpq2AGaa+ViiL91/dnX9kV+YyrKiOj2A7+3bX1bsNvNnCXqUj t3gfjVk+mFXu8ngCKmdprWK53L4vPzXFrvfon5QC+6Ouus9XjHBShlZUjZ1K2+zNLaMC9itn3b MZg= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:45 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 11/12] hw/misc/sifive_u_otp: Add write function and write-once protection Date: Fri, 23 Oct 2020 08:16:18 -0700 Message-Id: <20201023151619.3175155-12-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, Bin Meng , Alistair Francis , Green Wan Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Green Wan - Add write operation to update fuse data bit when PWE bit is on. - Add array, fuse_wo, to store the 'written' status for all bits of OTP to block the write operation. Signed-off-by: Green Wan Reviewed-by: Alistair Francis Reviewed-by: Bin Meng Tested-by: Bin Meng Message-id: 20201020033732.12921-2-green.wan@sifive.com Signed-off-by: Alistair Francis --- include/hw/misc/sifive_u_otp.h | 3 +++ hw/misc/sifive_u_otp.c | 30 +++++++++++++++++++++++++++++- 2 files changed, 32 insertions(+), 1 deletion(-) diff --git a/include/hw/misc/sifive_u_otp.h b/include/hw/misc/sifive_u_otp.h index 82c9176c8f..ebffbc1fa5 100644 --- a/include/hw/misc/sifive_u_otp.h +++ b/include/hw/misc/sifive_u_otp.h @@ -36,6 +36,8 @@ #define SIFIVE_U_OTP_PTRIM 0x34 #define SIFIVE_U_OTP_PWE 0x38 +#define SIFIVE_U_OTP_PWE_EN (1 << 0) + #define SIFIVE_U_OTP_PCE_EN (1 << 0) #define SIFIVE_U_OTP_PDSTB_EN (1 << 0) @@ -75,6 +77,7 @@ struct SiFiveUOTPState { uint32_t ptrim; uint32_t pwe; uint32_t fuse[SIFIVE_U_OTP_NUM_FUSES]; + uint32_t fuse_wo[SIFIVE_U_OTP_NUM_FUSES]; /* config */ uint32_t serial; }; diff --git a/hw/misc/sifive_u_otp.c b/hw/misc/sifive_u_otp.c index c2f3c8e129..b9238d64cb 100644 --- a/hw/misc/sifive_u_otp.c +++ b/hw/misc/sifive_u_otp.c @@ -25,6 +25,14 @@ #include "qemu/module.h" #include "hw/misc/sifive_u_otp.h" +#define WRITTEN_BIT_ON 0x1 + +#define SET_FUSEARRAY_BIT(map, i, off, bit) \ + map[i] = bit ? (map[i] | bit << off) : (map[i] & ~(0x1 << off)) + +#define GET_FUSEARRAY_BIT(map, i, off) \ + ((map[i] >> off) & 0x1) + static uint64_t sifive_u_otp_read(void *opaque, hwaddr addr, unsigned int size) { SiFiveUOTPState *s = opaque; @@ -123,7 +131,24 @@ static void sifive_u_otp_write(void *opaque, hwaddr addr, s->ptrim = val32; break; case SIFIVE_U_OTP_PWE: - s->pwe = val32; + s->pwe = val32 & SIFIVE_U_OTP_PWE_EN; + + /* PWE is enabled. Ignore PAS=1 (no redundancy cell) */ + if (s->pwe && !s->pas) { + if (GET_FUSEARRAY_BIT(s->fuse_wo, s->pa, s->paio)) { + qemu_log_mask(LOG_GUEST_ERROR, + "write once error: idx<%u>, bit<%u>\n", + s->pa, s->paio); + break; + } + + /* write bit data */ + SET_FUSEARRAY_BIT(s->fuse, s->pa, s->paio, s->pdin); + + /* update written bit */ + SET_FUSEARRAY_BIT(s->fuse_wo, s->pa, s->paio, WRITTEN_BIT_ON); + } + break; default: qemu_log_mask(LOG_GUEST_ERROR, "%s: bad write: addr=0x%" HWADDR_PRIx @@ -165,6 +190,9 @@ static void sifive_u_otp_reset(DeviceState *dev) /* Make a valid content of serial number */ s->fuse[SIFIVE_U_OTP_SERIAL_ADDR] = s->serial; s->fuse[SIFIVE_U_OTP_SERIAL_ADDR + 1] = ~(s->serial); + + /* Initialize write-once map */ + memset(s->fuse_wo, 0x00, sizeof(s->fuse_wo)); } static void sifive_u_otp_class_init(ObjectClass *klass, void *data) From patchwork Fri Oct 23 15:16:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 302157 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26609C388F9 for ; Fri, 23 Oct 2020 15:49:16 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6D74120878 for ; Fri, 23 Oct 2020 15:49:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="Zqt6IuwK" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6D74120878 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:50250 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kVzJa-0006zy-BI for qemu-devel@archiver.kernel.org; Fri, 23 Oct 2020 11:49:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60538) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyzJ-0004Sz-E0 for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:28:17 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:26168) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kVyzH-0001Xq-Ab for qemu-devel@nongnu.org; Fri, 23 Oct 2020 11:28:17 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1603466895; x=1635002895; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QxxpnjE6UQxURuz1kdJyV9BtXyZ2wTvZTkGBbbGNMKY=; b=Zqt6IuwKojPMZPl3pvwgJ3l4CyTDq2N7HATvMVTSBZcurYPAzsGBfsB3 L1v3KSKST06/LgyNxSWC9aT5Weqfs1CbqIfQ2ubVUrG1EaI6Wt8ZHP4AQ 0Q+LcToHzyMMUp/DJFpN9Zh2DiWuJOPvB3wb4W3RBebb+rDoX42qOK8HF QGtbcyOQX6T1As/nL5EiRjuo288Pd4EsUHUwFHW4YjliyD/qAUhzEjjkX 3GDfeplLKoeEE6iZ3QfXK5P9n9muFNwusWmEg1ts4RSWfOy5FWvlOuxrZ dAxkvKIvI8d2OwLSIWWsLvnmdUgI2HOf61u6/3XSO/A2akKH3YCR/XDw8 Q==; IronPort-SDR: oa1M1JXn57Qf4HpNXCaJGM3rgraeZbgc9PZXQ34JLQpRZQZh7FrVztlxPwBF80deuNymc/kesi ivKiErKHpMYHuHA8KNP4PWLxlA+IsnGcgY2oZm6QE6zoZ7FdPeUnfanD60uqltwPufhMErAa0E Nas+HxtqQ1pXmc3W0V2mbZr5HEBUg4ORYlTg5JIuggiEqagJVAezFkykWBNc/GKz2FAyQF8CH8 a0BSuwv0fjf0wpPkboQVPCc1pl+vjnOgVTkhbEiZfTwxYjyFPo61a0lpxOEURar8qiWyN7Xlrs VoE= X-IronPort-AV: E=Sophos;i="5.77,408,1596470400"; d="scan'208";a="150652330" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Oct 2020 23:27:45 +0800 IronPort-SDR: Fa/cjtGHo43eFfNiqYEic6UAiaeeEOdb1rhWqYhqLjYH/NL9ELsigTl7sso5iiX+5IC1QRhbPZ jYFnHXCTRUsOg4WUVKe2ghN5qNQ1/yJ1GS1R1L2aA0vlGi1pBMhqLZ+GeZwWeOGp8jqAcSjfen bCZ9jn+AF0poRiWuRdkqiRVcpK3Y380ZrzYffiDuQ7uhZ8uAWmMEp2vRJ6nLIVIHcInmQXOQAi X9FeeIKfaQycFPpb1w/CNkKCzsWbB5+TeevTPcq86BZ/3pnSQP0NoZR+q25ojt7nAp8z3MTQyi co2yEyCBoHi6E9QQO+A5TnPG Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 08:13:01 -0700 IronPort-SDR: LgBbZms+w/jj63DzoKDHz6v4NK21A9CVFshITOAe/hN4co52YZk3PW6sHM2HhgP+Bs2wZ/25ki wF4rqjK+s0G8Nj5iuor8cJjaqwYunyrpYhcH55HR0Kn1x2CU7deVAG1hpAT/9uLaGbJlxaq61B kYFzQB8pPsxjuddX4SDuRNNV70JqCyfwBEZgI0O84s1dKjlG72uTm7mKuH8FEXFX0Bl/Q4zRP/ QRkHVDfCHYENcOUo6ZeyhN3nCyoUVtOJJRiEKQ6ysLuy+D+efz3HCamdLifqDU5/CiWOEZfaX4 p/0= WDCIronportException: Internal Received: from cnf006900.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.60.46]) by uls-op-cesaip02.wdc.com with ESMTP; 23 Oct 2020 08:27:45 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 12/12] hw/misc/sifive_u_otp: Add backend drive support Date: Fri, 23 Oct 2020 08:16:19 -0700 Message-Id: <20201023151619.3175155-13-alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201023151619.3175155-1-alistair.francis@wdc.com> References: <20201023151619.3175155-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=558518344=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/23 11:27:42 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, Bin Meng , Alistair Francis , Green Wan Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Green Wan Add '-drive' support to OTP device. Allow users to assign a raw file as OTP image. test commands for 16k otp.img filled with zero: $ dd if=/dev/zero of=./otp.img bs=1k count=16 $ ./qemu-system-riscv64 -M sifive_u -m 256M -nographic -bios none \ -kernel ../opensbi/build/platform/sifive/fu540/firmware/fw_payload.elf \ -d guest_errors -drive if=none,format=raw,file=otp.img Signed-off-by: Green Wan Reviewed-by: Bin Meng Tested-by: Bin Meng Acked-by: Alistair Francis Message-id: 20201020033732.12921-3-green.wan@sifive.com Signed-off-by: Alistair Francis --- include/hw/misc/sifive_u_otp.h | 2 ++ hw/misc/sifive_u_otp.c | 65 ++++++++++++++++++++++++++++++++++ 2 files changed, 67 insertions(+) diff --git a/include/hw/misc/sifive_u_otp.h b/include/hw/misc/sifive_u_otp.h index ebffbc1fa5..5d0d7df455 100644 --- a/include/hw/misc/sifive_u_otp.h +++ b/include/hw/misc/sifive_u_otp.h @@ -46,6 +46,7 @@ #define SIFIVE_U_OTP_PA_MASK 0xfff #define SIFIVE_U_OTP_NUM_FUSES 0x1000 +#define SIFIVE_U_OTP_FUSE_WORD 4 #define SIFIVE_U_OTP_SERIAL_ADDR 0xfc #define SIFIVE_U_OTP_REG_SIZE 0x1000 @@ -80,6 +81,7 @@ struct SiFiveUOTPState { uint32_t fuse_wo[SIFIVE_U_OTP_NUM_FUSES]; /* config */ uint32_t serial; + BlockBackend *blk; }; #endif /* HW_SIFIVE_U_OTP_H */ diff --git a/hw/misc/sifive_u_otp.c b/hw/misc/sifive_u_otp.c index b9238d64cb..60066375ab 100644 --- a/hw/misc/sifive_u_otp.c +++ b/hw/misc/sifive_u_otp.c @@ -19,11 +19,14 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "qemu/log.h" #include "qemu/module.h" #include "hw/misc/sifive_u_otp.h" +#include "sysemu/blockdev.h" +#include "sysemu/block-backend.h" #define WRITTEN_BIT_ON 0x1 @@ -54,6 +57,16 @@ static uint64_t sifive_u_otp_read(void *opaque, hwaddr addr, unsigned int size) if ((s->pce & SIFIVE_U_OTP_PCE_EN) && (s->pdstb & SIFIVE_U_OTP_PDSTB_EN) && (s->ptrim & SIFIVE_U_OTP_PTRIM_EN)) { + + /* read from backend */ + if (s->blk) { + int32_t buf; + + blk_pread(s->blk, s->pa * SIFIVE_U_OTP_FUSE_WORD, &buf, + SIFIVE_U_OTP_FUSE_WORD); + return buf; + } + return s->fuse[s->pa & SIFIVE_U_OTP_PA_MASK]; } else { return 0xff; @@ -145,6 +158,12 @@ static void sifive_u_otp_write(void *opaque, hwaddr addr, /* write bit data */ SET_FUSEARRAY_BIT(s->fuse, s->pa, s->paio, s->pdin); + /* write to backend */ + if (s->blk) { + blk_pwrite(s->blk, s->pa * SIFIVE_U_OTP_FUSE_WORD, + &s->fuse[s->pa], SIFIVE_U_OTP_FUSE_WORD, 0); + } + /* update written bit */ SET_FUSEARRAY_BIT(s->fuse_wo, s->pa, s->paio, WRITTEN_BIT_ON); } @@ -168,16 +187,48 @@ static const MemoryRegionOps sifive_u_otp_ops = { static Property sifive_u_otp_properties[] = { DEFINE_PROP_UINT32("serial", SiFiveUOTPState, serial, 0), + DEFINE_PROP_DRIVE("drive", SiFiveUOTPState, blk), DEFINE_PROP_END_OF_LIST(), }; static void sifive_u_otp_realize(DeviceState *dev, Error **errp) { SiFiveUOTPState *s = SIFIVE_U_OTP(dev); + DriveInfo *dinfo; memory_region_init_io(&s->mmio, OBJECT(dev), &sifive_u_otp_ops, s, TYPE_SIFIVE_U_OTP, SIFIVE_U_OTP_REG_SIZE); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio); + + dinfo = drive_get_next(IF_NONE); + if (dinfo) { + int ret; + uint64_t perm; + int filesize; + BlockBackend *blk; + + blk = blk_by_legacy_dinfo(dinfo); + filesize = SIFIVE_U_OTP_NUM_FUSES * SIFIVE_U_OTP_FUSE_WORD; + if (blk_getlength(blk) < filesize) { + error_setg(errp, "OTP drive size < 16K"); + return; + } + + qdev_prop_set_drive_err(dev, "drive", blk, errp); + + if (s->blk) { + perm = BLK_PERM_CONSISTENT_READ | + (blk_is_read_only(s->blk) ? 0 : BLK_PERM_WRITE); + ret = blk_set_perm(s->blk, perm, BLK_PERM_ALL, errp); + if (ret < 0) { + return; + } + + if (blk_pread(s->blk, 0, s->fuse, filesize) != filesize) { + error_setg(errp, "failed to read the initial flash content"); + } + } + } } static void sifive_u_otp_reset(DeviceState *dev) @@ -191,6 +242,20 @@ static void sifive_u_otp_reset(DeviceState *dev) s->fuse[SIFIVE_U_OTP_SERIAL_ADDR] = s->serial; s->fuse[SIFIVE_U_OTP_SERIAL_ADDR + 1] = ~(s->serial); + if (s->blk) { + /* Put serial number to backend as well*/ + uint32_t serial_data; + int index = SIFIVE_U_OTP_SERIAL_ADDR; + + serial_data = s->serial; + blk_pwrite(s->blk, index * SIFIVE_U_OTP_FUSE_WORD, + &serial_data, SIFIVE_U_OTP_FUSE_WORD, 0); + + serial_data = ~(s->serial); + blk_pwrite(s->blk, (index + 1) * SIFIVE_U_OTP_FUSE_WORD, + &serial_data, SIFIVE_U_OTP_FUSE_WORD, 0); + } + /* Initialize write-once map */ memset(s->fuse_wo, 0x00, sizeof(s->fuse_wo)); }