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[81.169.180.215]) by mx.google.com with ESMTP id s6si1362587edc.399.2017.10.31.03.01.31; Tue, 31 Oct 2017 03:01:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=LG1ipMXh; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.denx.de (Postfix, from userid 105) id 2D5FFC21D7B; Tue, 31 Oct 2017 10:01:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 2976AC21D5B; Tue, 31 Oct 2017 10:01:28 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 92901C21D5B; Tue, 31 Oct 2017 10:01:27 +0000 (UTC) Received: from mail-wm0-f67.google.com (mail-wm0-f67.google.com [74.125.82.67]) by lists.denx.de (Postfix) with ESMTPS id 1453DC21D57 for ; Tue, 31 Oct 2017 10:01:27 +0000 (UTC) Received: by mail-wm0-f67.google.com with SMTP id m72so21264369wmc.1 for ; Tue, 31 Oct 2017 03:01:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=to:from:subject:message-id:date:user-agent:mime-version :content-language; bh=ZPTLHyIF9mz2tG7KWjRRVNE7UnRPgSOh8nKhHQzrjGo=; b=LG1ipMXh16AOet8A52/N6+zUbNTL1ZQK4xvhSm+m3bTsC73B6+mmd9AtM599mw9ZAz BiADmZvjbcVCyZ/f1ZikRFrXZnNjUB/BYxQ5Fh3XxVq7pdWx2Pbue/VB2SyrQchl7/xi BvZGaBwaC/CZCTWOLSnFzFY+fdQhkCQhhWYYI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:to:from:subject:message-id:date:user-agent :mime-version:content-language; bh=ZPTLHyIF9mz2tG7KWjRRVNE7UnRPgSOh8nKhHQzrjGo=; b=mbUdh+PLD891EnDHs5VLZk0ElltcRtQ/aV7A0Axa2YHalb2K7boZG7nhsPVWfk3Kim XqaWJFETlUZ8VuP5MCWHXAmFBM8rYNNDR3xT8HyIq3tViaRCSwWDCvjFH0o5n8lNhRG1 xW1y6lwtrYnh2fJJfau2SYldApveUH5wdOU1skob8FcsQaG7vdfLT6cL6HPPD/PIAW/I Wg52eQyakJH88pHh/Rb0OQORBX3/LRtJyr99QF1ZgVVn4yA2fWKTTG2bb+/qjWB/suyy gW44jalBK8/mHHDKy3ZOcfrF1mPP5WVFSEja7etwXQ1dPr5hHoKHiPnoghhRsrUpZUq6 0Q5w== X-Gm-Message-State: AMCzsaUA0qrFged32Q0N47RR92hyv0Dtvk01gORTK0BJBe0erZj+/ypc bjiHsG8+260+rEzN8ex/u5NPIZHSlImNzQ== X-Received: by 10.28.20.141 with SMTP id 135mr1332863wmu.74.1509444086047; Tue, 31 Oct 2017 03:01:26 -0700 (PDT) Received: from [192.168.1.2] ([90.68.247.185]) by smtp.gmail.com with ESMTPSA id b15sm2196613wrh.35.2017.10.31.03.01.24 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 31 Oct 2017 03:01:25 -0700 (PDT) To: U-Boot Mailing List From: Jorge Ramirez Message-ID: <5d4b81be-a0be-456c-c7e8-1a125bb5f38e@linaro.org> Date: Tue, 31 Oct 2017 11:01:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 Content-Language: en-US X-Content-Filtered-By: Mailman/MimeDel 2.1.18 Subject: [U-Boot] regression on emmc: board db410c X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Hi all, I just noticed that commit [1] breaks e-mmc support for db410c. If you need emmc access you can work around it by reducing the timeout on completion (to just a few tenths of usecs) and returning 0 instead of -ETIMEDOUT. I am trying to understand why the condition is not met as per the spec. [2] (register descriptions on page 85,86 ..). Feel free to comment. thanks Jorge [1] [jramirez@igloo git.uboot (master $)]$ git show 7dde50d70787eb2faeced82d0c025762b12363ea commit 7dde50d70787eb2faeced82d0c025762b12363ea Author: Alex Deymo Date: Sun Apr 2 01:24:34 2017 -0700 mmc: sdhci: Wait for SDHCI_INT_DATA_END when transferring. sdhci_transfer_data() function transfers the blocks passed up to the number of blocks defined in mmc_data, but returns immediately once all the blocks are transferred, even if the loop exit condition is not met (bit SDHCI_INT_DATA_END set in the STATUS word). When doing multiple writes to mmc, returning right after the last block is transferred can cause the write to fail when sending the MMC_CMD_STOP_TRANSMISSION command right after the MMC_CMD_WRITE_MULTIPLE_BLOCK command, leaving the mmc driver in an unconsistent state until reboot. This error was observed in the rpi3 board. This patch waits for the SDHCI_INT_DATA_END bit to be set even after sending all the blocks. Test: Reliably wrote 2GiB of data to mmc in a rpi3. Signed-off-by: Alex Deymo Reviewed-by: Simon Glass ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); @@ -89,17 +90,23 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data, __func__, stat); return -EIO; } - if (stat & rdy) { + if (!transfer_done && (stat & rdy)) { if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & mask)) continue; sdhci_writel(host, rdy, SDHCI_INT_STATUS); sdhci_transfer_pio(host, data); data->dest += data->blocksize; - if (++block >= data->blocks) - break; + if (++block >= data->blocks) { + /* Keep looping until the SDHCI_INT_DATA_END is + * cleared, even if we finished sending all the + * blocks. + */ + transfer_done = true; + continue; + } } #ifdef CONFIG_MMC_SDHCI_SDMA - if (stat & SDHCI_INT_DMA_END) { + if (!transfer_done && (stat & SDHCI_INT_DMA_END)) { sdhci_writel(host, SDHCI_INT_DMA_END, SDHCI_INT_STATUS); start_addr &= ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1); start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE; [2] https://www.sdcard.org/downloads/pls/pdf/index.php?p=PartA2_SD%20Host_Controller_Simplified_Specification_Ver4.20.jpg&f=PartA2_SD%20Host_Controller_Simplified_Specification_Ver4.20.pdf&e=EN_SSA2 diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index c94d58d..b745977 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -72,6 +72,7 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data, unsigned int start_addr) { unsigned int stat, rdy, mask, timeout, block = 0; + bool transfer_done = false; #ifdef CONFIG_MMC_SDHCI_SDMA unsigned char ctrl;