From patchwork Thu Oct 8 21:44:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 285719 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC566C433DF for ; Thu, 8 Oct 2020 21:44:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 976EC22241 for ; Thu, 8 Oct 2020 21:44:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="YLjr/eUP" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728799AbgJHVoq (ORCPT ); Thu, 8 Oct 2020 17:44:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725995AbgJHVop (ORCPT ); Thu, 8 Oct 2020 17:44:45 -0400 Received: from mail-ej1-x641.google.com (mail-ej1-x641.google.com [IPv6:2a00:1450:4864:20::641]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6BE26C0613D2; Thu, 8 Oct 2020 14:44:45 -0700 (PDT) Received: by mail-ej1-x641.google.com with SMTP id p15so10195945ejm.7; Thu, 08 Oct 2020 14:44:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2lJmAI/upYsFIPxZmv2LOq2oKjZZBIP7CgRq2l2uWnA=; b=YLjr/eUPvLvbNteGaoQ39dXXAW9H+O+O7wrwKrEZx7lDx01lWKIHw6YjRexlY47AlD 8GSXNYPpd58zWP2VTaYfaAeA1XLIyR50ol8pI4HMUK8/4JPGAKaMZUI/2vw5NiY7EzPW 2jO0nzWk3Uc6NozrjqLR3CPGQMu/sj6vkN2Irjyw/nTiXQ9/3MiYFntwM3MrNxl0XqJr HfBYULSY6SmfaZDrXPW8oULsSJ754s2fj0npusK1hMw6opCN36nvI1lv7Jk2ZVmGfT2I 6pO/tnJ7yfokVEVBlkga2UhDrjqCBdjCXnHOX/TbKPSFszrtACbPTBcW1zGDQQr0H4Rc Qp6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2lJmAI/upYsFIPxZmv2LOq2oKjZZBIP7CgRq2l2uWnA=; b=CGDw+tGT308FbkHYMbUG5gP9raeFp3nQ4BqXgfvlNwm/Tbu9lP+og84WxeN4MMgzMW NFdNdD8+V7wjhKzvNAYW1MgOmw/V3T+ymoyo25WPdbscjGRVT4UXjMxSXtchVdKDujzb rR52vMyi+0B5BVs6+kdAwmqiCOLQqGZMq7V1t+EHLdMJ+qd2ri79akHXdyBz6KkN2Uwy f0l0QJ8ycxT00s8ASOnwqo6V96xc3YsVcxKMAkxwRRggJ8NpgEpCgw0cspNna3ZbhDuk lD/rC5w3/+BQqNxgE1oR8SNSE7CjUoWOO52nv6QLOhysQGHTfk4iTRnwc/Q73kbzBjlH ONhA== X-Gm-Message-State: AOAM530sfL7UDysDyooyN8dnO1VJ7Waomaj9msDFDwyeUnPHdMOn3iTN ggxjSEw06swVD1DOn6NNxn0= X-Google-Smtp-Source: ABdhPJwMvsJr4FPt7pcbDUQ71Qrdz+DQFBWSaqD+HdlVWu6RgLMBMJphJCAWbVs4Ln5cLsMVXLmA1w== X-Received: by 2002:a17:906:4bd7:: with SMTP id x23mr10525959ejv.92.1602193484064; Thu, 08 Oct 2020 14:44:44 -0700 (PDT) Received: from localhost.localdomain ([188.24.159.61]) by smtp.gmail.com with ESMTPSA id i8sm4831800ejg.84.2020.10.08.14.44.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Oct 2020 14:44:43 -0700 (PDT) From: Cristian Ciocaltea To: Manivannan Sadhasivam , =?utf-8?q?An?= =?utf-8?q?dreas_F=C3=A4rber?= , Wolfram Sang , Peter Rosin Cc: linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-actions@lists.infradead.org Subject: [PATCH 1/3] i2c: owl: Clear NACK and BUS error bits Date: Fri, 9 Oct 2020 00:44:39 +0300 Message-Id: <6ee573f2904c001ab07e30b386815257c05f6308.1602190168.git.cristian.ciocaltea@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org When the NACK and BUS error bits are set by the hardware, the driver is responsible for clearing them by writing "1" into the corresponding status registers. Hence perform the necessary operations in owl_i2c_interrupt(). Fixes: d211e62af466 ("i2c: Add Actions Semiconductor Owl family S900 I2C driver") Reported-by: Manivannan Sadhasivam Signed-off-by: Cristian Ciocaltea Reviewed-by: Manivannan Sadhasivam --- drivers/i2c/busses/i2c-owl.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/i2c/busses/i2c-owl.c b/drivers/i2c/busses/i2c-owl.c index 672f1f239bd6..a163b8f308c1 100644 --- a/drivers/i2c/busses/i2c-owl.c +++ b/drivers/i2c/busses/i2c-owl.c @@ -176,6 +176,9 @@ static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) fifostat = readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT); if (fifostat & OWL_I2C_FIFOSTAT_RNB) { i2c_dev->err = -ENXIO; + /* Clear NACK error bit by writing "1" */ + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOSTAT, + OWL_I2C_FIFOSTAT_RNB, true); goto stop; } @@ -183,6 +186,9 @@ static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) stat = readl(i2c_dev->base + OWL_I2C_REG_STAT); if (stat & OWL_I2C_STAT_BEB) { i2c_dev->err = -EIO; + /* Clear BUS error bit by writing "1" */ + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_STAT, + OWL_I2C_STAT_BEB, true); goto stop; } From patchwork Thu Oct 8 21:44:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 268653 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4826CC43457 for ; Thu, 8 Oct 2020 21:44:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E48DB22243 for ; Thu, 8 Oct 2020 21:44:51 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Thu, 08 Oct 2020 14:44:44 -0700 (PDT) From: Cristian Ciocaltea To: Manivannan Sadhasivam , =?utf-8?q?An?= =?utf-8?q?dreas_F=C3=A4rber?= , Wolfram Sang , Peter Rosin Cc: linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-actions@lists.infradead.org Subject: [PATCH 2/3] i2c: owl: Add support for atomic transfers Date: Fri, 9 Oct 2020 00:44:40 +0300 Message-Id: <1af37112fafd6cf069dfe864560f77996f57d80d.1602190168.git.cristian.ciocaltea@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Atomic transfers are required to properly power off a machine through an I2C controlled PMIC, such as the Actions Semi ATC260x series. System shutdown may happen with interrupts being disabled and, as a consequence, the kernel may hang if the driver does not support atomic transfers. This functionality is essentially implemented by polling the FIFO Status register until either Command Execute Completed or NACK Error bits are set. Signed-off-by: Cristian Ciocaltea Reviewed-by: Manivannan Sadhasivam --- drivers/i2c/busses/i2c-owl.c | 76 ++++++++++++++++++++++++++---------- 1 file changed, 56 insertions(+), 20 deletions(-) diff --git a/drivers/i2c/busses/i2c-owl.c b/drivers/i2c/busses/i2c-owl.c index a163b8f308c1..547132768119 100644 --- a/drivers/i2c/busses/i2c-owl.c +++ b/drivers/i2c/busses/i2c-owl.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -76,6 +77,7 @@ #define OWL_I2C_FIFOCTL_TFR BIT(2) /* I2Cc_FIFOSTAT Bit Mask */ +#define OWL_I2C_FIFOSTAT_CECB BIT(0) #define OWL_I2C_FIFOSTAT_RNB BIT(1) #define OWL_I2C_FIFOSTAT_RFE BIT(2) #define OWL_I2C_FIFOSTAT_TFF BIT(5) @@ -83,7 +85,8 @@ #define OWL_I2C_FIFOSTAT_RFD GENMASK(15, 8) /* I2C bus timeout */ -#define OWL_I2C_TIMEOUT msecs_to_jiffies(4 * 1000) +#define OWL_I2C_TIMEOUT_MS (4 * 1000) +#define OWL_I2C_TIMEOUT msecs_to_jiffies(OWL_I2C_TIMEOUT_MS) #define OWL_I2C_MAX_RETRIES 50 @@ -161,15 +164,11 @@ static void owl_i2c_set_freq(struct owl_i2c_dev *i2c_dev) writel(OWL_I2C_DIV_FACTOR(val), i2c_dev->base + OWL_I2C_REG_CLKDIV); } -static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) +static void owl_i2c_xfer_data(struct owl_i2c_dev *i2c_dev) { - struct owl_i2c_dev *i2c_dev = _dev; struct i2c_msg *msg = i2c_dev->msg; - unsigned long flags; unsigned int stat, fifostat; - spin_lock_irqsave(&i2c_dev->lock, flags); - i2c_dev->err = 0; /* Handle NACK from slave */ @@ -179,7 +178,7 @@ static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) /* Clear NACK error bit by writing "1" */ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOSTAT, OWL_I2C_FIFOSTAT_RNB, true); - goto stop; + return; } /* Handle bus error */ @@ -189,7 +188,7 @@ static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) /* Clear BUS error bit by writing "1" */ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_STAT, OWL_I2C_STAT_BEB, true); - goto stop; + return; } /* Handle FIFO read */ @@ -207,13 +206,23 @@ static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) i2c_dev->base + OWL_I2C_REG_TXDAT); } } +} + +static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) +{ + struct owl_i2c_dev *i2c_dev = _dev; + unsigned long flags; + + spin_lock_irqsave(&i2c_dev->lock, flags); + + owl_i2c_xfer_data(i2c_dev); -stop: /* Clear pending interrupts */ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_STAT, OWL_I2C_STAT_IRQP, true); complete_all(&i2c_dev->msg_complete); + spin_unlock_irqrestore(&i2c_dev->lock, flags); return IRQ_HANDLED; @@ -241,8 +250,8 @@ static int owl_i2c_check_bus_busy(struct i2c_adapter *adap) return 0; } -static int owl_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, - int num) +static int owl_i2c_xfer_common(struct i2c_adapter *adap, struct i2c_msg *msgs, + int num, bool atomic) { struct owl_i2c_dev *i2c_dev = i2c_get_adapdata(adap); struct i2c_msg *msg; @@ -286,11 +295,12 @@ static int owl_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, goto err_exit; } - reinit_completion(&i2c_dev->msg_complete); + if (!atomic) + reinit_completion(&i2c_dev->msg_complete); - /* Enable I2C controller interrupt */ + /* Enable/disable I2C controller interrupt */ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL, - OWL_I2C_CTL_IRQE, true); + OWL_I2C_CTL_IRQE, !atomic); /* * Select: FIFO enable, Master mode, Stop enable, Data count enable, @@ -358,20 +368,33 @@ static int owl_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, spin_unlock_irqrestore(&i2c_dev->lock, flags); - time_left = wait_for_completion_timeout(&i2c_dev->msg_complete, - adap->timeout); + if (atomic) { + /* Wait for Command Execute Completed or NACK Error bits */ + ret = readl_poll_timeout_atomic(i2c_dev->base + OWL_I2C_REG_FIFOSTAT, + val, val & (OWL_I2C_FIFOSTAT_CECB | + OWL_I2C_FIFOSTAT_RNB), + 10, OWL_I2C_TIMEOUT_MS * 1000); + } else { + time_left = wait_for_completion_timeout(&i2c_dev->msg_complete, + adap->timeout); + if (!time_left) + ret = -ETIMEDOUT; + } spin_lock_irqsave(&i2c_dev->lock, flags); - if (time_left == 0) { + + if (ret) { dev_err(&adap->dev, "Transaction timed out\n"); /* Send stop condition and release the bus */ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL, OWL_I2C_CTL_GBCC_STOP | OWL_I2C_CTL_RB, true); - ret = -ETIMEDOUT; goto err_exit; } + if (atomic) + owl_i2c_xfer_data(i2c_dev); + ret = i2c_dev->err < 0 ? i2c_dev->err : num; err_exit: @@ -385,9 +408,22 @@ static int owl_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, return ret; } +static int owl_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, + int num) +{ + return owl_i2c_xfer_common(adap, msgs, num, false); +} + +static int owl_i2c_xfer_atomic(struct i2c_adapter *adap, + struct i2c_msg *msgs, int num) +{ + return owl_i2c_xfer_common(adap, msgs, num, true); +} + static const struct i2c_algorithm owl_i2c_algorithm = { - .master_xfer = owl_i2c_master_xfer, - .functionality = owl_i2c_func, + .master_xfer = owl_i2c_xfer, + .master_xfer_atomic = owl_i2c_xfer_atomic, + .functionality = owl_i2c_func, }; static const struct i2c_adapter_quirks owl_i2c_quirks = { From patchwork Thu Oct 8 21:44:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 285718 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BD31C433DF for ; Thu, 8 Oct 2020 21:44:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B49C622242 for ; Thu, 8 Oct 2020 21:44:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="M68C2VOt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725995AbgJHVou (ORCPT ); Thu, 8 Oct 2020 17:44:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729593AbgJHVor (ORCPT ); Thu, 8 Oct 2020 17:44:47 -0400 Received: from mail-ej1-x642.google.com (mail-ej1-x642.google.com [IPv6:2a00:1450:4864:20::642]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D72DC0613D3; Thu, 8 Oct 2020 14:44:47 -0700 (PDT) Received: by mail-ej1-x642.google.com with SMTP id t25so10145734ejd.13; Thu, 08 Oct 2020 14:44:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KxjygpoA96eOeA02J+Dvf4AQ8zSrWdx9oS+iZ/XJRdI=; b=M68C2VOtz/fupoFfHGC+2wx79Prt6iza5lrS8tn7r/ICrZOi0lIVYRyj8pqU+33I9U u1ga1G0nE7c42LbAI5Zh2GOH0ycaBwLON14sFH7ks6V/+TLXdv4dmosoByvMdNVA6WwD VFByTPYH810XhOqG0ywDJNWXnHTHLNLCH9eT6TuIbH5Ney+U1xEb1OdbcSJMRKjWzWZO isM9G5JfS3MdNkX1SZMALdVI5rKUUP6lsNz/RcqLa8Rvn77EZyU9J5GUXs4yWM2abJRS atMe/ahRJZ88mfwnj7kQHRejdbG4ZjeJIqsC7+f+iW0syKCwPF0w+jjcVS5q9byk6vVo svdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KxjygpoA96eOeA02J+Dvf4AQ8zSrWdx9oS+iZ/XJRdI=; b=Tx1sy8jCj0PWh1IGZy2P1z7/gJjW+cgfkocHO0pysQug7XVn5AoIgAkDY4YUtYBZ1j 3oLJdI6OGDD4oV0koGilImyKNJTjQ05vM5vDjQ03hKK2Qpkef75SrO3IqOqfYN0OaiYh 8mCTUhnmc3rY80GsNdS8z6lxcldPiWpqQfMtoOO5JeNhlOiczE3YsVzzm9DZKl+aEG95 Q2pCqow1uW3M4AnYBT99O4T9S0khIrpm94mnUF8ckwbF5MEbXxLpVjwv/3j10iKFv2ts bgSRjcb+uSnIhuvFP/rKexDuFj9d3v9MKbngiFF1wpN25GK2J0rs1rYNiqCsrz0EFHc2 FP9A== X-Gm-Message-State: AOAM532ALWu5yob31WOeD/Do1t5VkUCVdg1fgn5yq+ZygraT8OCMg/fh psd3SjvMF9oZ+AG6YnB8qTpF85OGy0c= X-Google-Smtp-Source: ABdhPJydkFpIZCSdLrHIJ5lij59RqWh0OjYTThkYVr7RYT46eXnS/e7Vsf3akCiCzjZb9rpJ85i+MQ== X-Received: by 2002:a17:906:f4f:: with SMTP id h15mr10722376ejj.17.1602193486048; Thu, 08 Oct 2020 14:44:46 -0700 (PDT) Received: from localhost.localdomain ([188.24.159.61]) by smtp.gmail.com with ESMTPSA id i8sm4831800ejg.84.2020.10.08.14.44.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Oct 2020 14:44:45 -0700 (PDT) From: Cristian Ciocaltea To: Manivannan Sadhasivam , =?utf-8?q?An?= =?utf-8?q?dreas_F=C3=A4rber?= , Wolfram Sang , Peter Rosin Cc: linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-actions@lists.infradead.org Subject: [PATCH 3/3] i2c: owl: Enable asynchronous probing Date: Fri, 9 Oct 2020 00:44:41 +0300 Message-Id: X-Mailer: git-send-email 2.28.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Speed up the boot process by using the asynchronous probing feature supported by the recent kernels. For SBCs based on the Actions Semi S500 SoC, the overall boot time is expected to be reduced by 200-300 ms. Suggested-by: Manivannan Sadhasivam Signed-off-by: Cristian Ciocaltea Reviewed-by: Manivannan Sadhasivam --- drivers/i2c/busses/i2c-owl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/i2c/busses/i2c-owl.c b/drivers/i2c/busses/i2c-owl.c index 547132768119..ed3942051845 100644 --- a/drivers/i2c/busses/i2c-owl.c +++ b/drivers/i2c/busses/i2c-owl.c @@ -521,6 +521,7 @@ static struct platform_driver owl_i2c_driver = { .driver = { .name = "owl-i2c", .of_match_table = of_match_ptr(owl_i2c_of_match), + .probe_type = PROBE_PREFER_ASYNCHRONOUS, }, }; module_platform_driver(owl_i2c_driver);