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[209.132.180.131]) by mx.google.com with ESMTPS id m25si30111pgn.588.2017.10.23.10.40.24 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 23 Oct 2017 10:40:25 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-464874-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=PCbJNjDE; spf=pass (google.com: domain of gcc-patches-return-464874-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-464874-patch=linaro.org@gcc.gnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:references:date:in-reply-to:message-id:mime-version :content-type; q=dns; s=default; b=TzmqrMSrOKR8oqraFqBdOmkr0WaJC VEI3qN0MeWDfHvg8gIicgad2jAxkLCj2Op6k1q8y8Gz2X8Tw4+gRisx8YZeKkqmC GL3K86rSMV6EIO3vGivy44G2J/8cmcMZKlqXmocf0oALVLOa1zZWX8ph3HnZTK1p UtdlUP/rLsbHC0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:references:date:in-reply-to:message-id:mime-version :content-type; s=default; bh=pNuwcp6+S+dzxTSN+qLfBBxJJgc=; b=PCb JNjDErOE3+exFmioJ7R8CJ4p6xMqs44Ktp8He/sMe3/BkP9GYKJq929Fen+HkC/Q Z7t8SL+Y9nBPKlFoDG1nyJw/uh/yWNg9/XBEq7KVny8bDq039MROW2mtTPWCTjI/ vftdI43QC2ZkyhACspa+6MSHP7pK4ahzYEiiRefE= Received: (qmail 118016 invoked by alias); 23 Oct 2017 17:40:11 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 117997 invoked by uid 89); 23 Oct 2017 17:40:10 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.8 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-wr0-f169.google.com Received: from mail-wr0-f169.google.com (HELO mail-wr0-f169.google.com) (209.85.128.169) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 23 Oct 2017 17:40:08 +0000 Received: by mail-wr0-f169.google.com with SMTP id y9so5997818wrb.2 for ; Mon, 23 Oct 2017 10:40:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:mail-followup-to:subject:references:date :in-reply-to:message-id:user-agent:mime-version; bh=P39e9jkmcrEVseHMRyIGxI+adLZLwaUvK1SXquhcFPw=; b=a+SckSyve/dzDrX/oaUxCFhEA7Nxd2YPW8Ht9pPDoves6LRR9XzNch/uBta/+tK8Zs wFgEaK09Ju986QA9jcNlbknATokE87Wk5hxn5P7RwNMBjdONMS7AJH+DjIr29uqtS1oj 3uYX7MNtUyEtx8N2FE8LoZXwdQVyvc1x47jtvU6KJKkluVtbK83pn+nJtJs4uGWiIWLF liU5rpXgacvUVoi3ns0uzS2udzf+JL+O5QOY67dQoAT/SLVoSNpCaKsvH3elbiyaUdEt Wyzs2E9o71vv2WCWztHBV5fVwa0Fp8tJGIKuCFjcW56/DJ/4rHDPxkf0FZYKVPlyncUX bwtw== X-Gm-Message-State: AMCzsaV8kgug7pfhUogYhuph0w3RHEnTEjJZKm3IGoo+twhkPz4lGxfg iedPwM8wTU9alYJm9wju0XrofraanQ8= X-Google-Smtp-Source: ABhQp+SWslTewwtV+71+lE3ApkBWYjFewmXiQblYQtmZD2tjWGiD+hJhcSBElolDeRhvUgufMJd5uQ== X-Received: by 10.223.134.14 with SMTP id 14mr12217462wrv.148.1508780406418; Mon, 23 Oct 2017 10:40:06 -0700 (PDT) Received: from localhost ([2.26.27.199]) by smtp.gmail.com with ESMTPSA id b190sm4413460wma.22.2017.10.23.10.40.05 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 23 Oct 2017 10:40:05 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [098/nnn] poly_int: load_register_parameters References: <871sltvm7r.fsf@linaro.org> Date: Mon, 23 Oct 2017 18:40:05 +0100 In-Reply-To: <871sltvm7r.fsf@linaro.org> (Richard Sandiford's message of "Mon, 23 Oct 2017 17:54:32 +0100") Message-ID: <871sltepai.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 This patch makes load_register_parameters cope with polynomial sizes. The requirement here is that any register parameters with non-constant sizes must either have a specific mode (e.g. a variable-length vector mode) or must be represented with a PARALLEL. This is in practice already a requirement for parameters passed in vector registers, since the default behaviour of splitting parameters into words doesn't make sense for them. 2017-10-23 Richard Sandiford Alan Hayward David Sherwood gcc/ * calls.c (load_register_parameters): Cope with polynomial mode sizes. Require a constant size for BLKmode parameters that aren't described by a PARALLEL. If BLOCK_REG_PADDING forces a parameter to be padded at the lsb end in order to fill a complete number of words, require the parameter size to be ordered wrt UNITS_PER_WORD. Index: gcc/calls.c =================================================================== --- gcc/calls.c 2017-10-23 17:25:38.230865460 +0100 +++ gcc/calls.c 2017-10-23 17:25:45.501604113 +0100 @@ -2520,7 +2520,8 @@ load_register_parameters (struct arg_dat { int partial = args[i].partial; int nregs; - int size = 0; + poly_int64 size = 0; + HOST_WIDE_INT const_size = 0; rtx_insn *before_arg = get_last_insn (); /* Set non-negative if we must move a word at a time, even if just one word (e.g, partial == 4 && mode == DFmode). Set @@ -2536,8 +2537,12 @@ load_register_parameters (struct arg_dat } else if (TYPE_MODE (TREE_TYPE (args[i].tree_value)) == BLKmode) { - size = int_size_in_bytes (TREE_TYPE (args[i].tree_value)); - nregs = (size + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD; + /* Variable-sized parameters should be described by a + PARALLEL instead. */ + const_size = int_size_in_bytes (TREE_TYPE (args[i].tree_value)); + gcc_assert (const_size >= 0); + nregs = (const_size + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD; + size = const_size; } else size = GET_MODE_SIZE (args[i].mode); @@ -2559,21 +2564,27 @@ load_register_parameters (struct arg_dat /* Handle case where we have a value that needs shifting up to the msb. eg. a QImode value and we're padding upward on a BYTES_BIG_ENDIAN machine. */ - if (size < UNITS_PER_WORD - && (args[i].locate.where_pad - == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD))) + if (args[i].locate.where_pad + == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)) { - rtx x; - int shift = (UNITS_PER_WORD - size) * BITS_PER_UNIT; - - /* Assigning REG here rather than a temp makes CALL_FUSAGE - report the whole reg as used. Strictly speaking, the - call only uses SIZE bytes at the msb end, but it doesn't - seem worth generating rtl to say that. */ - reg = gen_rtx_REG (word_mode, REGNO (reg)); - x = expand_shift (LSHIFT_EXPR, word_mode, reg, shift, reg, 1); - if (x != reg) - emit_move_insn (reg, x); + gcc_checking_assert (ordered_p (size, UNITS_PER_WORD)); + if (may_lt (size, UNITS_PER_WORD)) + { + rtx x; + poly_int64 shift + = (UNITS_PER_WORD - size) * BITS_PER_UNIT; + + /* Assigning REG here rather than a temp makes + CALL_FUSAGE report the whole reg as used. + Strictly speaking, the call only uses SIZE + bytes at the msb end, but it doesn't seem worth + generating rtl to say that. */ + reg = gen_rtx_REG (word_mode, REGNO (reg)); + x = expand_shift (LSHIFT_EXPR, word_mode, + reg, shift, reg, 1); + if (x != reg) + emit_move_insn (reg, x); + } } #endif } @@ -2588,17 +2599,20 @@ load_register_parameters (struct arg_dat else if (partial == 0 || args[i].pass_on_stack) { + /* SIZE and CONST_SIZE are 0 for partial arguments and + the size of a BLKmode type otherwise. */ + gcc_checking_assert (must_eq (size, const_size)); rtx mem = validize_mem (copy_rtx (args[i].value)); /* Check for overlap with already clobbered argument area, providing that this has non-zero size. */ if (is_sibcall - && size != 0 + && const_size != 0 && (mem_might_overlap_already_clobbered_arg_p - (XEXP (args[i].value, 0), size))) + (XEXP (args[i].value, 0), const_size))) *sibcall_failure = 1; - if (size % UNITS_PER_WORD == 0 + if (const_size % UNITS_PER_WORD == 0 || MEM_ALIGN (mem) % BITS_PER_WORD == 0) move_block_to_reg (REGNO (reg), mem, nregs, args[i].mode); else @@ -2608,7 +2622,7 @@ load_register_parameters (struct arg_dat args[i].mode); rtx dest = gen_rtx_REG (word_mode, REGNO (reg) + nregs - 1); unsigned int bitoff = (nregs - 1) * BITS_PER_WORD; - unsigned int bitsize = size * BITS_PER_UNIT - bitoff; + unsigned int bitsize = const_size * BITS_PER_UNIT - bitoff; rtx x = extract_bit_field (mem, bitsize, bitoff, 1, dest, word_mode, word_mode, false, NULL); @@ -2620,7 +2634,7 @@ load_register_parameters (struct arg_dat } /* Handle a BLKmode that needs shifting. */ - if (nregs == 1 && size < UNITS_PER_WORD + if (nregs == 1 && const_size < UNITS_PER_WORD #ifdef BLOCK_REG_PADDING && args[i].locate.where_pad == PAD_DOWNWARD #else @@ -2629,7 +2643,7 @@ load_register_parameters (struct arg_dat ) { rtx dest = gen_rtx_REG (word_mode, REGNO (reg)); - int shift = (UNITS_PER_WORD - size) * BITS_PER_UNIT; + int shift = (UNITS_PER_WORD - const_size) * BITS_PER_UNIT; enum tree_code dir = (BYTES_BIG_ENDIAN ? RSHIFT_EXPR : LSHIFT_EXPR); rtx x;