From patchwork Mon Sep 14 03:04:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Chen X-Patchwork-Id: 256782 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92AA6C2D0E1 for ; Mon, 14 Sep 2020 03:07:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6123E208FE for ; Mon, 14 Sep 2020 03:07:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="oGUDn1Ey" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726093AbgINDFE (ORCPT ); Sun, 13 Sep 2020 23:05:04 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:35987 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726069AbgINDE5 (ORCPT ); Sun, 13 Sep 2020 23:04:57 -0400 X-UUID: d4a8afd103f74f9b937809069c4aee82-20200914 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=b+P99K3c89W+s3w0wcI++BC4dbvHHPlV6NYVkc5ibts=; b=oGUDn1Ey7pV4eduBlg+svcToa2UAQkQcj3dS7i5S135AHWIe7sH4BTP95gXeJwg7uo+xF1p9opZrOgmkZ8K8RSeomhAp470bG82u7VhHgO4zyQZOvW7CPFQ/FB3mSDZlX3BW1eCp1y3pdNOLDi3PLkFiMyhYN4jczNeJgSN5wSU=; X-UUID: d4a8afd103f74f9b937809069c4aee82-20200914 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1991007190; Mon, 14 Sep 2020 11:04:49 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 14 Sep 2020 11:04:48 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 14 Sep 2020 11:04:47 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Viresh Kumar , Stephen Boyd , Ryan Case , Mark Brown CC: Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , Mike Turquette , , , , , , Henry Chen Subject: [PATCH V5 03/17] soc: mediatek: add support for the performance state Date: Mon, 14 Sep 2020 11:04:30 +0800 Message-ID: <1600052684-21198-4-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> References: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Support power domain performance state, add header file for scp event. Signed-off-by: Henry Chen --- drivers/soc/mediatek/mtk-scpsys.c | 58 +++++++++++++++++++++++++++++++++++++++ drivers/soc/mediatek/mtk-scpsys.h | 22 +++++++++++++++ 2 files changed, 80 insertions(+) create mode 100644 drivers/soc/mediatek/mtk-scpsys.h -- 1.9.1 diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c index 19a0c7e..ad0ca52 100644 --- a/drivers/soc/mediatek/mtk-scpsys.c +++ b/drivers/soc/mediatek/mtk-scpsys.c @@ -11,8 +11,10 @@ #include #include #include +#include #include #include +#include #include #include @@ -22,6 +24,7 @@ #include #include #include +#include "mtk-scpsys.h" #define MTK_POLL_DELAY_US 10 #define MTK_POLL_TIMEOUT USEC_PER_SEC @@ -272,6 +275,18 @@ struct scp_soc_data { const struct scp_ctrl_reg regs; }; +static BLOCKING_NOTIFIER_HEAD(scpsys_notifier_list); + +int register_scpsys_notifier(struct notifier_block *nb) +{ + return blocking_notifier_chain_register(&scpsys_notifier_list, nb); +} + +int unregister_scpsys_notifier(struct notifier_block *nb) +{ + return blocking_notifier_chain_unregister(&scpsys_notifier_list, nb); +} + static int scpsys_domain_is_on(struct scp_domain *scpd) { struct scp *scp = scpd->scp; @@ -294,6 +309,41 @@ static int scpsys_domain_is_on(struct scp_domain *scpd) return -EINVAL; } +static int mtk_pd_set_performance(struct generic_pm_domain *genpd, + unsigned int state) +{ + int i; + struct scp_domain *scpd = + container_of(genpd, struct scp_domain, genpd); + struct scp_event_data scpe; + struct scp *scp = scpd->scp; + struct genpd_onecell_data *pd_data = &scp->pd_data; + + for (i = 0; i < pd_data->num_domains; i++) { + if (genpd == pd_data->domains[i]) { + dev_dbg(scp->dev, "%d. %s = %d\n", + i, genpd->name, state); + break; + } + } + + if (i == pd_data->num_domains) + return 0; + + scpe.event_type = MTK_SCPSYS_PSTATE; + scpe.genpd = genpd; + scpe.domain_id = i; + blocking_notifier_call_chain(&scpsys_notifier_list, state, &scpe); + + return 0; +} + +static unsigned int mtk_pd_get_performance(struct generic_pm_domain *genpd, + struct dev_pm_opp *opp) +{ + return dev_pm_opp_get_level(opp); +} + static int scpsys_regulator_enable(struct scp_domain *scpd) { if (!scpd->supply) @@ -800,6 +850,14 @@ static struct scp *init_scp(struct platform_device *pdev, genpd->power_on = scpsys_power_on; if (MTK_SCPD_CAPS(scpd, MTK_SCPD_ACTIVE_WAKEUP)) genpd->flags |= GENPD_FLAG_ACTIVE_WAKEUP; + + /* Add opp table check first to avoid OF runtime parse failed */ + if (of_count_phandle_with_args(pdev->dev.of_node, + "operating-points-v2", NULL) > 0) { + genpd->set_performance_state = mtk_pd_set_performance; + genpd->opp_to_performance_state = + mtk_pd_get_performance; + } } return scp; diff --git a/drivers/soc/mediatek/mtk-scpsys.h b/drivers/soc/mediatek/mtk-scpsys.h new file mode 100644 index 0000000..c1e8325 --- /dev/null +++ b/drivers/soc/mediatek/mtk-scpsys.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (c) 2018 MediaTek Inc. + */ + +#ifndef __MTK_SCPSYS_H__ +#define __MTK_SCPSYS_H__ + +struct scp_event_data { + int event_type; + int domain_id; + struct generic_pm_domain *genpd; +}; + +enum scp_event_type { + MTK_SCPSYS_PSTATE, +}; + +int register_scpsys_notifier(struct notifier_block *nb); +int unregister_scpsys_notifier(struct notifier_block *nb); + +#endif /* __MTK_SCPSYS_H__ */ From patchwork Mon Sep 14 03:04:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Chen X-Patchwork-Id: 256783 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCC27C43461 for ; Mon, 14 Sep 2020 03:07:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A3A0A208FE for ; Mon, 14 Sep 2020 03:07:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="LOwnzn/f" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725982AbgINDHD (ORCPT ); Sun, 13 Sep 2020 23:07:03 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:11909 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726101AbgINDFI (ORCPT ); Sun, 13 Sep 2020 23:05:08 -0400 X-UUID: 97479aa049b745d29a36f550cc59269e-20200914 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=qBymKk2B0d56MBUuX1hhxF1oOlrZkobktKD1Mxr60CM=; b=LOwnzn/f2IBWb1u0l93sQygelWPh+i2U0sAZdNWUWpvEuVYvi4QoFG8zLzPcRDd84fCbVjXnXn8oyxEYCwEyrdDk6Myp2Njs0VyVWwXErdpCfP9u01yzg7qFxMtn5DSgK2/9U2U5bfkDwt4FUm6GR9Axg0PYpVSObwmz8eHTFaw=; X-UUID: 97479aa049b745d29a36f550cc59269e-20200914 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2002533154; Mon, 14 Sep 2020 11:04:50 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 14 Sep 2020 11:04:47 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 14 Sep 2020 11:04:47 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Viresh Kumar , Stephen Boyd , Ryan Case , Mark Brown CC: Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , Mike Turquette , , , , , , Henry Chen Subject: [PATCH V5 04/17] arm64: dts: mt8183: add performance state support of scpsys Date: Mon, 14 Sep 2020 11:04:31 +0800 Message-ID: <1600052684-21198-5-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> References: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add support for performance state of scpsys on mt8183 platform Signed-off-by: Henry Chen --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) -- 1.9.1 diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index d85bae7..82ca929 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -12,6 +12,7 @@ #include #include #include "mt8183-pinfunc.h" +#include / { compatible = "mediatek,mt8183"; @@ -340,6 +341,27 @@ #address-cells = <1>; #size-cells = <0>; + operating-points-v2 = <&dvfsrc_opp_table>; + dvfsrc_opp_table: opp-table { + compatible = "operating-points-v2-level"; + + dvfsrc_vol_min: opp1 { + opp,level = ; + }; + + dvfsrc_freq_medium: opp2 { + opp,level = ; + }; + + dvfsrc_freq_max: opp3 { + opp,level = ; + }; + + dvfsrc_vol_max: opp4 { + opp,level = ; + }; + }; + audio@MT8183_POWER_DOMAIN_AUDIO { reg = ; }; From patchwork Mon Sep 14 03:04:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Chen X-Patchwork-Id: 256780 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 842B5C433E2 for ; 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X-UUID: 304c0d9b0a144f138ed8e26ac490fcbb-20200914 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2088837670; Mon, 14 Sep 2020 11:04:49 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 14 Sep 2020 11:04:48 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 14 Sep 2020 11:04:48 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Viresh Kumar , Stephen Boyd , Ryan Case , Mark Brown CC: Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , Mike Turquette , , , , , Subject: [PATCH V5 05/17] soc: mediatek: add header for mediatek SIP interface Date: Mon, 14 Sep 2020 11:04:32 +0800 Message-ID: <1600052684-21198-6-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> References: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Arvin Wang Add a header to collect SIPs and add one SIP call to initialize power management hardware for the SIP interface defined to access the SPM handling vcore voltage and ddr rate changes on mt8183 (and most likely later socs). Signed-off-by: Arvin Wang --- include/linux/soc/mediatek/mtk_sip_svc.h | 4 ++++ 1 file changed, 4 insertions(+) -- 1.9.1 diff --git a/include/linux/soc/mediatek/mtk_sip_svc.h b/include/linux/soc/mediatek/mtk_sip_svc.h index 082398e..079bbcb 100644 --- a/include/linux/soc/mediatek/mtk_sip_svc.h +++ b/include/linux/soc/mediatek/mtk_sip_svc.h @@ -22,4 +22,8 @@ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, MTK_SIP_SMC_CONVENTION, \ ARM_SMCCC_OWNER_SIP, fn_id) +/* VCOREFS */ +#define MTK_SIP_VCOREFS_CONTROL \ + MTK_SIP_SMC_CMD(0x506) + #endif From patchwork Mon Sep 14 03:04:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Chen X-Patchwork-Id: 256786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB757C43461 for ; Mon, 14 Sep 2020 03:05:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9758D221E7 for ; Mon, 14 Sep 2020 03:05:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="dzCiJCPE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726115AbgINDFP (ORCPT ); Sun, 13 Sep 2020 23:05:15 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:35987 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726105AbgINDFL (ORCPT ); Sun, 13 Sep 2020 23:05:11 -0400 X-UUID: fe5ed44f85de406f83c6fe252e68f761-20200914 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=nOOM9yhncstnm5UMFYqxtAtm4GAlmiu3+ZgwHqj+zAM=; b=dzCiJCPEb/5+CFfoRt5fzPpcsC4wK/qsTPnvqvXcnpQtTkI1EnARo6jsRziDF9sZhXhwkGEdYa6YCamuDQNs2GAIhBrXprn+8XzqFWSg1pvsA56s1qaYlYm1/xja2dktphn0fyg0UWjUxNVqWFjI+PK8KlmrsBpxJW2puMutbUI=; X-UUID: fe5ed44f85de406f83c6fe252e68f761-20200914 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 453261723; Mon, 14 Sep 2020 11:04:50 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 14 Sep 2020 11:04:48 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 14 Sep 2020 11:04:48 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Viresh Kumar , Stephen Boyd , Ryan Case , Mark Brown CC: Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , Mike Turquette , , , , , , Henry Chen Subject: [PATCH V5 09/17] dt-bindings: interconnect: add MT8183 interconnect dt-bindings Date: Mon, 14 Sep 2020 11:04:36 +0800 Message-ID: <1600052684-21198-10-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> References: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add interconnect provider dt-bindings for MT8183. Signed-off-by: Henry Chen --- .../devicetree/bindings/soc/mediatek/dvfsrc.txt | 2 ++ include/dt-bindings/interconnect/mtk,mt8183-emi.h | 18 ++++++++++++++++++ 2 files changed, 20 insertions(+) create mode 100644 include/dt-bindings/interconnect/mtk,mt8183-emi.h -- 1.9.1 diff --git a/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt b/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt index d5a47d8..76ca61d 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt @@ -14,6 +14,7 @@ Required Properties: - clock-names: Must include the following entries: "dvfsrc": DVFSRC module clock - clocks: Must contain an entry for each entry in clock-names. +- #interconnect-cells : should contain 1 Example: @@ -22,4 +23,5 @@ Example: reg = <0 0x10012000 0 0x1000>; clocks = <&infracfg CLK_INFRA_DVFSRC>; clock-names = "dvfsrc"; + #interconnect-cells = <1>; }; diff --git a/include/dt-bindings/interconnect/mtk,mt8183-emi.h b/include/dt-bindings/interconnect/mtk,mt8183-emi.h new file mode 100644 index 0000000..2a54856 --- /dev/null +++ b/include/dt-bindings/interconnect/mtk,mt8183-emi.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __DT_BINDINGS_INTERCONNECT_MTK_MT8183_EMI_H +#define __DT_BINDINGS_INTERCONNECT_MTK_MT8183_EMI_H + +#define MT8183_SLAVE_DDR_EMI 0 +#define MT8183_MASTER_MCUSYS 1 +#define MT8183_MASTER_GPU 2 +#define MT8183_MASTER_MMSYS 3 +#define MT8183_MASTER_MM_VPU 4 +#define MT8183_MASTER_MM_DISP 5 +#define MT8183_MASTER_MM_VDEC 6 +#define MT8183_MASTER_MM_VENC 7 +#define MT8183_MASTER_MM_CAM 8 +#define MT8183_MASTER_MM_IMG 9 +#define MT8183_MASTER_MM_MDP 10 + +#endif From patchwork Mon Sep 14 03:04:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Chen X-Patchwork-Id: 256784 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B8A4C433E2 for ; Mon, 14 Sep 2020 03:07:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 372C6208FE for ; Mon, 14 Sep 2020 03:07:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="CeRiK2Cp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726077AbgINDGs (ORCPT ); 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Mon, 14 Sep 2020 11:04:50 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 14 Sep 2020 11:04:49 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Viresh Kumar , Stephen Boyd , Ryan Case , Mark Brown CC: Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , Mike Turquette , , , , , , Henry Chen Subject: [PATCH V5 12/17] arm64: dts: mt8183: add dvfsrc related nodes Date: Mon, 14 Sep 2020 11:04:39 +0800 Message-ID: <1600052684-21198-13-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> References: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 04D812122765638FA2AD8DCDCCC0258D59FF06FCB9C9AD8BD87F56214D4C10842000:8 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add DDR EMI provider dictating dram interconnect bus performance found on MT8192-based platforms Signed-off-by: Henry Chen --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1 diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 4046603..63a4decd 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -13,6 +13,7 @@ #include #include "mt8183-pinfunc.h" #include +#include / { compatible = "mediatek,mt8183"; @@ -472,6 +473,7 @@ ddr_emi: dvfsrc@10012000 { compatible = "mediatek,mt8183-dvfsrc"; reg = <0 0x10012000 0 0x1000>; + #interconnect-cells = <1>; }; pwrap: pwrap@1000d000 { From patchwork Mon Sep 14 03:04:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Chen X-Patchwork-Id: 256781 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99DBDC433E2 for ; Mon, 14 Sep 2020 03:07:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5F619208FE for ; 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Mon, 14 Sep 2020 11:04:52 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 14 Sep 2020 11:04:50 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 14 Sep 2020 11:04:49 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Viresh Kumar , Stephen Boyd , Ryan Case , Mark Brown CC: Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , Mike Turquette , , , , , , Henry Chen Subject: [PATCH V5 13/17] arm64: dts: mt8192: add dvfsrc related nodes Date: Mon, 14 Sep 2020 11:04:40 +0800 Message-ID: <1600052684-21198-14-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> References: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 04FC23DCA8F614B3FF1123FFA0967F30DB89E06C58A9FDFAF197ABF4DCA99CC92000:8 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add DDR EMI provider dictating dram interconnect bus performance found on MT8183-based platforms Signed-off-by: Henry Chen --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1 diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 1eae441..647c57a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include / { compatible = "mediatek,mt8192"; @@ -420,6 +421,7 @@ ddr_emi: dvfsrc@10012000 { compatible = "mediatek,mt8192-dvfsrc"; reg = <0 0x10012000 0 0x1000>; + #interconnect-cells = <1>; }; systimer: timer@10017000 { From patchwork Mon Sep 14 03:04:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Chen X-Patchwork-Id: 256785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4599BC2D0A7 for ; Mon, 14 Sep 2020 03:06:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1067221D80 for ; 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Mon, 14 Sep 2020 11:05:02 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 14 Sep 2020 11:04:50 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 14 Sep 2020 11:04:50 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Viresh Kumar , Stephen Boyd , Ryan Case , Mark Brown CC: Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , Mike Turquette , , , , , , Henry Chen Subject: [PATCH V5 16/17] arm64: dts: mt8183: add dvfsrc regulator nodes Date: Mon, 14 Sep 2020 11:04:43 +0800 Message-ID: <1600052684-21198-17-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> References: <1600052684-21198-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 4FA3F5132E9D23EBFB3644E75A344AEC0BA7B80185869F256B752B4863B656992000:8 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add dvfsrc regulator nodes which is for MT8183-based platforms Signed-off-by: Henry Chen --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) -- 1.9.1 diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 63a4decd..26ca0b3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -474,6 +474,12 @@ compatible = "mediatek,mt8183-dvfsrc"; reg = <0 0x10012000 0 0x1000>; #interconnect-cells = <1>; + dvfsrc_vcore: dvfsrc-vcore { + regulator-name = "dvfsrc-vcore"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <800000>; + regulator-always-on; + }; }; pwrap: pwrap@1000d000 {