From patchwork Tue Sep 15 07:24:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 256770 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BF66C433E2 for ; Tue, 15 Sep 2020 07:27:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4DAA720897 for ; Tue, 15 Sep 2020 07:27:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="F9na49fU" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726035AbgIOH13 (ORCPT ); Tue, 15 Sep 2020 03:27:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726210AbgIOHYq (ORCPT ); Tue, 15 Sep 2020 03:24:46 -0400 Received: from mail-pj1-x1043.google.com (mail-pj1-x1043.google.com [IPv6:2607:f8b0:4864:20::1043]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0AE86C061352 for ; Tue, 15 Sep 2020 00:24:45 -0700 (PDT) Received: by mail-pj1-x1043.google.com with SMTP id kk9so1275761pjb.2 for ; Tue, 15 Sep 2020 00:24:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Y+BrNXRxv8fGST2O/AL4jHM4ZP3mKD824W/Sr7p4Ymk=; b=F9na49fUZEvPUjtIioDeLh/fLkeokofNAIVa92pJv8M4U2GBo9NkQM9n1ytkKPwGzi n+TipsGODY/oYhSJXn6gEPMTkYVQrmcSzb0K6MzAyXpBrFWL5PUduS9uTKL4qLhkC/jk OmpgMo8f/QhGw8OURR+u5C+s/GyPQvhoOpaNPcGIQRU7Aa0drafj6OSxeyzDFC+v8zHc Iwja8TeP5dM7B6pLzwp6xPuABXWUUMEmaPZ84z9WhCSvVZX2hZQ/yt7U8t5MgUxbfXqs Mr2S+fm1RdbpVID2aaXf1sMiM3pD4gcDVXYB+6tRN/o7KnJjAl6YtbiOhDKao7iyobB/ dxrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Y+BrNXRxv8fGST2O/AL4jHM4ZP3mKD824W/Sr7p4Ymk=; b=FnXAcklrGU64vD1bdMMURoewk6Clu1JKPSuyAGip2lphMJCqqyPD/CuxWGM0VCiN6n cbC9BI5h+BHvFU5KZCRKdCnfs05x2pGIyxlK1LDvhwkw+RdCc+qr6C13hMqj4davRat6 Xiwh15P3cqUKv1FTeo4Ykn75hXcHGd7LOu1VqE0N5zc+eWQFkH+92erj3HDmKFsLUsRi GdsvnRdH/PgGXa9PcE6oxFmUpMC/0vnFxO4yKC5IBDNVJAQw7bmGEDn4/sAdkGDdmxl5 rlX9Yjn4LJpJHAy0/0Pf6QFjzIVmXQvNZXI4ptlTA3o42zsNnvOd/tcw0ZO9P2TBPq4r 8gAA== X-Gm-Message-State: AOAM530/HP+LkM0kxF6jwNIYGk8NCN9e7JhQH305g3sajoqjYmE0mtAG GfCrB5W7AZOoCf417yxxNk87 X-Google-Smtp-Source: ABdhPJwogN5gW1S+CQKFPlA09s/TLUgaqlXK1CWyATAmwJH5fRmPj8m7nhWH/2p7pUiSs0FKRU7dAg== X-Received: by 2002:a17:90b:1741:: with SMTP id jf1mr2890833pjb.164.1600154684566; Tue, 15 Sep 2020 00:24:44 -0700 (PDT) Received: from localhost.localdomain ([103.59.133.81]) by smtp.googlemail.com with ESMTPSA id m24sm10701501pgn.44.2020.09.15.00.24.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2020 00:24:44 -0700 (PDT) From: Manivannan Sadhasivam To: rjw@rjwysocki.net, viresh.kumar@linaro.org, robh+dt@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org Cc: amitk@kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dmitry.baryshkov@linaro.org, tdas@codeaurora.org, Manivannan Sadhasivam Subject: [PATCH v2 2/5] arm64: dts: qcom: sm8250: Add cpufreq hw node Date: Tue, 15 Sep 2020 12:54:20 +0530 Message-Id: <20200915072423.18437-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200915072423.18437-1-manivannan.sadhasivam@linaro.org> References: <20200915072423.18437-1-manivannan.sadhasivam@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Bjorn Andersson Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+ cores on SM8250 SoCs. Signed-off-by: Bjorn Andersson Signed-off-by: Manivannan Sadhasivam Acked-by: Viresh Kumar Reviewed-by: Amit Kucheria --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index e7d139e1a6ce..7eb0eda37b26 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -87,6 +87,7 @@ reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&L2_0>; + qcom,freq-domain = <&cpufreq_hw 0>; L2_0: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -102,6 +103,7 @@ reg = <0x0 0x100>; enable-method = "psci"; next-level-cache = <&L2_100>; + qcom,freq-domain = <&cpufreq_hw 0>; L2_100: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -114,6 +116,7 @@ reg = <0x0 0x200>; enable-method = "psci"; next-level-cache = <&L2_200>; + qcom,freq-domain = <&cpufreq_hw 0>; L2_200: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -126,6 +129,7 @@ reg = <0x0 0x300>; enable-method = "psci"; next-level-cache = <&L2_300>; + qcom,freq-domain = <&cpufreq_hw 0>; L2_300: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -138,6 +142,7 @@ reg = <0x0 0x400>; enable-method = "psci"; next-level-cache = <&L2_400>; + qcom,freq-domain = <&cpufreq_hw 1>; L2_400: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -150,6 +155,7 @@ reg = <0x0 0x500>; enable-method = "psci"; next-level-cache = <&L2_500>; + qcom,freq-domain = <&cpufreq_hw 1>; L2_500: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -163,6 +169,7 @@ reg = <0x0 0x600>; enable-method = "psci"; next-level-cache = <&L2_600>; + qcom,freq-domain = <&cpufreq_hw 1>; L2_600: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -175,6 +182,7 @@ reg = <0x0 0x700>; enable-method = "psci"; next-level-cache = <&L2_700>; + qcom,freq-domain = <&cpufreq_hw 2>; L2_700: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -2076,6 +2084,20 @@ }; }; }; + + cpufreq_hw: cpufreq@18591000 { + compatible = "qcom,sm8250-cpufreq-epss", "qcom,cpufreq-epss"; + reg = <0 0x18591000 0 0x1000>, + <0 0x18592000 0 0x1000>, + <0 0x18593000 0 0x1000>; + reg-names = "freq-domain0", "freq-domain1", + "freq-domain2"; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #freq-domain-cells = <1>; + }; }; timer { From patchwork Tue Sep 15 07:24:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 256771 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2AD52C43461 for ; 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Tue, 15 Sep 2020 00:24:48 -0700 (PDT) Received: from localhost.localdomain ([103.59.133.81]) by smtp.googlemail.com with ESMTPSA id m24sm10701501pgn.44.2020.09.15.00.24.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2020 00:24:48 -0700 (PDT) From: Manivannan Sadhasivam To: rjw@rjwysocki.net, viresh.kumar@linaro.org, robh+dt@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org Cc: amitk@kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dmitry.baryshkov@linaro.org, tdas@codeaurora.org, Manivannan Sadhasivam Subject: [PATCH v2 3/5] cpufreq: qcom-hw: Use devm_platform_ioremap_resource() to simplify code Date: Tue, 15 Sep 2020 12:54:21 +0530 Message-Id: <20200915072423.18437-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200915072423.18437-1-manivannan.sadhasivam@linaro.org> References: <20200915072423.18437-1-manivannan.sadhasivam@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org devm_platform_ioremap_resource() is the combination of platform_get_resource() and devm_ioremap_resource(). Hence, use it to simplify the code a bit. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Amit Kucheria Reviewed-by: Bjorn Andersson --- drivers/cpufreq/qcom-cpufreq-hw.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c index ccea34f61152..8a303783927f 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -244,7 +244,6 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) struct of_phandle_args args; struct device_node *cpu_np; struct device *cpu_dev; - struct resource *res; void __iomem *base; int ret, index; @@ -267,13 +266,9 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) index = args.args[0]; - res = platform_get_resource(pdev, IORESOURCE_MEM, index); - if (!res) - return -ENODEV; - - base = devm_ioremap(dev, res->start, resource_size(res)); - if (!base) - return -ENOMEM; + base = devm_platform_ioremap_resource(pdev, index); + if (IS_ERR(base)) + return PTR_ERR(base); /* HW should be in enabled state to proceed */ if (!(readl_relaxed(base + REG_ENABLE) & 0x1)) { From patchwork Tue Sep 15 07:24:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 303977 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp2294964ilg; Tue, 15 Sep 2020 00:25:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzAXVuaizpQqVnoB6IYZC9L7nPhbrRfvnvuYaribxTg9Uw9KXOyQd58rX5dPWPIsri/6XbX X-Received: by 2002:a05:6402:3c8:: with SMTP id t8mr20302393edw.266.1600154735137; Tue, 15 Sep 2020 00:25:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600154735; cv=none; d=google.com; s=arc-20160816; b=j5PpGaZkjxs/avtAi9fIoRkH4QnBUTGIr6h2Clle3MvS8YYHl4DFjJh6h1opcbK0SF H69HkwDWkgjduz+xL4XIIkcHxgxbdbIG1pnq9aeMUGFzP2gaTIh6vYlb9Mw+sVH14yD8 JetpCkkmUbzx2RWiX4RLc5rjtG3D8bTTxHYZup7vuDpSKJjLLK7S4TMzs05fmKAya100 uoyLqedrwBljj1x7VAudT5oF7tMWUj2GfJY3tZjjJFyTvDqFu5qSsKyaeItZCB1voi6U HvPpcS/6RSk076HqfwcZfs4lIzPFBI/UmzeMBrY4iYbSmzLrj4iLg8ShgpeZeIF3SWqU 2y5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=oBilyFEf2/Z1J1tQYW2nP7ZczzAuGj9cFol63jX5QX4=; b=DYnnwJ7Gnl3/9MZ/MthDcFf6yDUrucwgtNeEbb5vG0lOmyFjcHx4fIh19FQgM3PDS2 89ml+DwuFqqh+JthAH/j6iBRekkIcgYTTEpLNVOZUZISVDZknAlvaa+pVnt0Qtv7EkOa 81JasQdJ1Ff2ImDeZSvvEEvXhxMT8BEZAm7ep1+tws+NHD+dqNKGIMYFNENufPW1iynS vOKLPNGy7JYKahq3yeoJPYRetYUhozOGP7yQtYmRMYoWPzkjI3tZHVj4tA9hka0q6/SJ 6e4/nSvLHR8AaqvNjkZNf0fJWprGPKK/gzSshCHyioTC6B8EKWAPFW7fdh4z1nhyDP6j e0rw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=c4p1+4NV; spf=pass (google.com: domain of linux-pm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Hence, add support for it in the driver with relevant dev data. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Amit Kucheria Reviewed-by: Bjorn Andersson --- drivers/cpufreq/qcom-cpufreq-hw.c | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.17.1 diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c index e3c46984a037..c485be839172 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -256,8 +256,17 @@ static const struct qcom_cpufreq_soc_data qcom_soc_data = { .lut_row_size = 32, }; +static const struct qcom_cpufreq_soc_data epss_soc_data = { + .reg_enable = 0x0, + .reg_freq_lut = 0x100, + .reg_volt_lut = 0x200, + .reg_perf_state = 0x320, + .lut_row_size = 4, +}; + static const struct of_device_id qcom_cpufreq_hw_match[] = { { .compatible = "qcom,cpufreq-hw", .data = &qcom_soc_data }, + { .compatible = "qcom,cpufreq-epss", .data = &epss_soc_data }, {} }; MODULE_DEVICE_TABLE(of, qcom_cpufreq_hw_match);