From patchwork Tue Oct 17 09:06:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116031 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4636397qgn; Tue, 17 Oct 2017 02:06:42 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAZ5HUv20ye5cREccPiMv2Rr8GdEuz4JLHzo8CQ07MQBG8kWfIiQlw4pUFlKQCJy4VXJXKN X-Received: by 10.99.98.70 with SMTP id w67mr10618928pgb.9.1508231202517; Tue, 17 Oct 2017 02:06:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231202; cv=none; d=google.com; s=arc-20160816; b=YHSF49keVw9mDd5NVXqUA1s719265T50UpInpgw3cAv31Fk+gHP1ddj2pmwm5MNWjq 5KldGk+2iU2cLnasN78s7l+EFZ4vIYvWHqg5hqr7zqWCjMmoUEla9e1O11R4VdEktNVo ysEcV9JPnCPCAxYwgSefjc2GaNfbtoPyHc+DfQcSn2PSb4EIDwIeBpUZpKi7pdZtsz6W pB9fGEKN7/eXyrcjGMLxwVN+4DXom0Zk/gtR/qavuR+3KQrT91MVdr98akgAP2EKP1JU 41CZAeTwKPt00eJwu88tdt+kAUxjut5cJKx5b8vY8w7kzr6CShltRcyrxv39q0Z3XDHB kOSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=sQhJy6p4V4fPMeCFBERc9W8BrSV0mMlTDcj+RGu4+04=; b=uBKQssMs22u1ZN+xJhHOT0JtvuxveW59fLpeY2ICqeaivHnRFMSofVIKlazqIbr6Sh NMO5fj0dUFRhGCKXl1+8d5W1+nfyI0drNlN0xwZikHScK5deW62KFuAkB4qwHVkDLGFz gWtGI9+EN5us+hKwzN3gQAfs9YH+tHEJry/6J8PKoBEeGwUdSKZSx5tgJI5pVMaMsqCi ufONBPFEEpMaqwSrn09Mbv6WoqnxsCEecFF4p2C41ALfPw4e6FyGSbgNl9vCKl2wMUnH YKeNTvQCSakrrxE0+BoS4RvMPl8QR1BLE4AZKpzUgLCe6EZMxPQsWW/hBtdqpqodJW9s Odrg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id y17si5233692pge.61.2017.10.17.02.06.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:06:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3B9876E601; Tue, 17 Oct 2017 09:06:41 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 59A316E601 for ; Tue, 17 Oct 2017 09:06:40 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 76FAC20880; Tue, 17 Oct 2017 11:06:38 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 48D1C207B6; Tue, 17 Oct 2017 11:06:38 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 01/23] drm/sun4i: Implement endpoint parsing using kfifo Date: Tue, 17 Oct 2017 11:06:08 +0200 Message-Id: <4ecb323e787918208f6a5d9f0ebba12c62583c98.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The commit da82b8785eeb ("drm/sun4i: add components in breadth first traversal order") implemented a breadth first traversal of our device tree nodes graph. However, it was relying on the kernel linked lists, and those are not really safe for addition. Indeed, in a single pipeline stage, your first stage (ie, the mixer or fronted) will be queued, and it will be the final iteration of that list as far as list_for_each_entry_safe is concerned. Then, during that final iteration, we'll queue another element (the TCON or the backend) that list_for_each_entry_safe will not account for, and we will leave the loop without having iterated over all the elements. And since we won't have built our components list properly, the DRM driver will be left non-functional. We can instead use a kfifo to queue and enqueue components in-order, as was the original intention. This also has the benefit of removing any dynamic allocation, making the error handling path simpler too. The only thing we're losing is the ability to tell whether an element has already been queued, but that was only needed to remove spurious logs, and therefore purely cosmetic. This means that this commit effectively reverses e8afb7b67fba ("drm/sun4i: don't add components that are already in the queue"). Fixes: da82b8785eeb ("drm/sun4i: add components in breadth first traversal order") Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_drv.c | 71 +++++--------------------------- 1 file changed, 13 insertions(+), 58 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index b5879d4620d8..a27efad9bc76 100644 --- a/drivers/gpu/drm/sun4i/sun4i_drv.c +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c @@ -11,6 +11,7 @@ */ #include +#include #include #include @@ -222,29 +223,15 @@ static int compare_of(struct device *dev, void *data) * matching system handles this for us. */ struct endpoint_list { - struct device_node *node; - struct list_head list; + DECLARE_KFIFO(fifo, struct device_node *, 16); }; -static bool node_is_in_list(struct list_head *endpoints, - struct device_node *node) -{ - struct endpoint_list *endpoint; - - list_for_each_entry(endpoint, endpoints, list) - if (endpoint->node == node) - return true; - - return false; -} - static int sun4i_drv_add_endpoints(struct device *dev, - struct list_head *endpoints, + struct endpoint_list *list, struct component_match **match, struct device_node *node) { struct device_node *port, *ep, *remote; - struct endpoint_list *endpoint; int count = 0; /* @@ -304,19 +291,7 @@ static int sun4i_drv_add_endpoints(struct device *dev, } } - /* skip downstream node if it is already in the queue */ - if (node_is_in_list(endpoints, remote)) - continue; - - /* Add downstream nodes to the queue */ - endpoint = kzalloc(sizeof(*endpoint), GFP_KERNEL); - if (!endpoint) { - of_node_put(remote); - return -ENOMEM; - } - - endpoint->node = remote; - list_add_tail(&endpoint->list, endpoints); + kfifo_put(&list->fifo, remote); } return count; @@ -325,10 +300,11 @@ static int sun4i_drv_add_endpoints(struct device *dev, static int sun4i_drv_probe(struct platform_device *pdev) { struct component_match *match = NULL; - struct device_node *np = pdev->dev.of_node; - struct endpoint_list *endpoint, *endpoint_temp; + struct device_node *np = pdev->dev.of_node, *endpoint; + struct endpoint_list list; int i, ret, count = 0; - LIST_HEAD(endpoints); + + INIT_KFIFO(list.fifo); for (i = 0;; i++) { struct device_node *pipeline = of_parse_phandle(np, @@ -337,31 +313,19 @@ static int sun4i_drv_probe(struct platform_device *pdev) if (!pipeline) break; - endpoint = kzalloc(sizeof(*endpoint), GFP_KERNEL); - if (!endpoint) { - ret = -ENOMEM; - goto err_free_endpoints; - } - - endpoint->node = pipeline; - list_add_tail(&endpoint->list, &endpoints); + kfifo_put(&list.fifo, pipeline); } - list_for_each_entry_safe(endpoint, endpoint_temp, &endpoints, list) { + while (kfifo_get(&list.fifo, &endpoint)) { /* process this endpoint */ - ret = sun4i_drv_add_endpoints(&pdev->dev, &endpoints, &match, - endpoint->node); + ret = sun4i_drv_add_endpoints(&pdev->dev, &list, &match, + endpoint); /* sun4i_drv_add_endpoints can fail to allocate memory */ if (ret < 0) - goto err_free_endpoints; + return ret; count += ret; - - /* delete and cleanup the current entry */ - list_del(&endpoint->list); - of_node_put(endpoint->node); - kfree(endpoint); } if (count) @@ -370,15 +334,6 @@ static int sun4i_drv_probe(struct platform_device *pdev) match); else return 0; - -err_free_endpoints: - list_for_each_entry_safe(endpoint, endpoint_temp, &endpoints, list) { - list_del(&endpoint->list); - of_node_put(endpoint->node); - kfree(endpoint); - } - - return ret; } static int sun4i_drv_remove(struct platform_device *pdev) From patchwork Tue Oct 17 09:06:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116032 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4636407qgn; Tue, 17 Oct 2017 02:06:42 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAAkEhZ+s7yZM5RRcWKCdxmkKFBlAi+ERPyAVRf50eoScLplybX/7hA+R6xfN1O3l08aX6a X-Received: by 10.99.140.8 with SMTP id m8mr10554690pgd.23.1508231202832; Tue, 17 Oct 2017 02:06:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231202; cv=none; d=google.com; s=arc-20160816; b=dxXCFxCC8p1TuR3ie7K2VXe0CtqVmEDL9bAj2NkzhI+nvSnTGL1vX9yCAmjy2vcUgg vgc3PoQHQpXvScm2eNdjCOjIGWLKSFuozdue7z0Gtqo8fOe8vpF5A7F7SK0LlC+JinRt /0UnSH14Nkpq1GpzOh4CwdlmK8jLfeqOftyeS2Gyux1Ti5AfhIgKdKUb85HD4EtcdMQu kV+dOSfwFRoNPPusCcXTD3mpzFU39lec+xC7+NH3fZjevsA/g3shf3NJgkdoU5yn0kfr 3W08/DzxAEEfW6ezvS92CJcOr+Bu1r4hTalj9Yv0ybPaCLK4b1GFAlbEEm29kbTZbK0g 1Lbg== ARC-Message-Signature: i=1; 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[131.252.210.177]) by mx.google.com with ESMTPS id a28si5602610pfl.216.2017.10.17.02.06.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:06:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 922676E602; Tue, 17 Oct 2017 09:06:41 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id B8F756E600 for ; Tue, 17 Oct 2017 09:06:40 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id D7FB020885; Tue, 17 Oct 2017 11:06:38 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id B0B26207B6; Tue, 17 Oct 2017 11:06:38 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 02/23] drm/sun4i: Realign Makefile padding and reorder it Date: Tue, 17 Oct 2017 11:06:09 +0200 Message-Id: <9410b284ec97453fa692537dffaaa4fb4833347c.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Some options were not padded as they should, and the order in the Makefile was chaotic. Fix that. Signed-off-by: Maxime Ripard Reviewed-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/Makefile | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile index 43c753cafc88..af18b70ba5ed 100644 --- a/drivers/gpu/drm/sun4i/Makefile +++ b/drivers/gpu/drm/sun4i/Makefile @@ -1,24 +1,24 @@ -sun4i-drm-y += sun4i_drv.o -sun4i-drm-y += sun4i_framebuffer.o +sun4i-backend-y += sun4i_backend.o sun4i_layer.o -sun4i-drm-hdmi-y += sun4i_hdmi_enc.o -sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o -sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o -sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o +sun4i-drm-y += sun4i_drv.o +sun4i-drm-y += sun4i_framebuffer.o -sun4i-tcon-y += sun4i_tcon.o -sun4i-tcon-y += sun4i_rgb.o -sun4i-tcon-y += sun4i_dotclock.o -sun4i-tcon-y += sun4i_crtc.o +sun4i-drm-hdmi-y += sun4i_hdmi_enc.o +sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o +sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o +sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o -sun4i-backend-y += sun4i_backend.o sun4i_layer.o +sun4i-tcon-y += sun4i_tcon.o +sun4i-tcon-y += sun4i_rgb.o +sun4i-tcon-y += sun4i_dotclock.o +sun4i-tcon-y += sun4i_crtc.o -sun8i-mixer-y += sun8i_mixer.o sun8i_layer.o +sun8i-mixer-y += sun8i_mixer.o sun8i_layer.o obj-$(CONFIG_DRM_SUN4I) += sun4i-drm.o sun4i-tcon.o obj-$(CONFIG_DRM_SUN4I) += sun6i_drc.o obj-$(CONFIG_DRM_SUN4I) += sun4i_tv.o -obj-$(CONFIG_DRM_SUN4I_BACKEND) += sun4i-backend.o +obj-$(CONFIG_DRM_SUN4I_BACKEND) += sun4i-backend.o obj-$(CONFIG_DRM_SUN4I_HDMI) += sun4i-drm-hdmi.o -obj-$(CONFIG_DRM_SUN8I_MIXER) += sun8i-mixer.o +obj-$(CONFIG_DRM_SUN8I_MIXER) += sun8i-mixer.o From patchwork Tue Oct 17 09:06:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116034 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4636463qgn; Tue, 17 Oct 2017 02:06:46 -0700 (PDT) X-Google-Smtp-Source: AOwi7QBYnAOd1u8s6YgC1DsiYP2/4kSG/chtyVqLF5pnLx0+ES+HOtZWhNl88lYfKmtjAFDXUQGI X-Received: by 10.159.253.142 with SMTP id q14mr11476456pls.82.1508231206229; Tue, 17 Oct 2017 02:06:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231206; cv=none; d=google.com; s=arc-20160816; b=pQM6DVNk7fP63GJ217HTXoc4jOwblVvzEULwcR2dIHiwvCiS69+9dsBMYA2DfItzA9 wZlJZNZ3fnXCI7CChug919eWzn308TAOKVnW4mm4M/oJ2MiR2FixbZBgJT7xyodAdVIP fuVjar7cfe/mK3gGPmLSVYJH6Yj4lqHiXgF+AOset9n7OCaLR+7t3UuG766SsCiPcvAf jw8eYw8JxgD0wPlOJqk2ZGFDs7ChJPlm/85ah5gN4/i+MX0++4yLlFyYjMMkU3XnIN6Q rdl0Ufqi6THssiI+ZBwvwuZ6c1gyOERe+NKoX/FEssOojZiFNg5SGMnU50yLCDkrgfXo wBUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=hez33pG9FCNsDvUsZnG8rKMn3uFsL7ZE3C/5Bxt5NPc=; b=Z7PTHxKF5VaM3P8Lr0BqASqyBSQXw8/sRwdVTuiLjHKoh4cDE0bgvpCIeUV+7Qpzkw 6zJNmQJAsgAUA9Eytfmmtnq1lsiHOd2zM3H5amhX6N9dIdNrIX6XtGtuH0DsZfrSeyjb GwUgzR8fM0oHcXp+SEPXbzWVyQPIy89+YLRc7sCfSlpnTAOV70W+iSt8GltXBhRWRY0l vYapS/8RhY3AqxQeo9EEOoVv8C8nQUanBaBC1tvIlOsc5Ekw03vaL8hf/Fn9bD1G29PD nBcRTQsEXxRP4mwz76QMOudkn0oXPYc2SdB91U3WC6Vr4Gxz54LdEBQqmgq1mLaOZkXG eACA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id b9si5716446pls.832.2017.10.17.02.06.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:06:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 48BAB6E59F; Tue, 17 Oct 2017 09:06:42 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 162DE6E600 for ; Tue, 17 Oct 2017 09:06:41 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 3781420889; Tue, 17 Oct 2017 11:06:39 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 0F5FF20884; Tue, 17 Oct 2017 11:06:39 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 03/23] drm/sun4i: tcon: Make tcon_set_mux mode argument const Date: Tue, 17 Oct 2017 11:06:10 +0200 Message-Id: X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The drm_display_mode pointer can be mark const, so let's do it. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 6 +++--- drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 68751b999877..54e1796d2953 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -134,7 +134,7 @@ static struct sun4i_tcon *sun4i_get_tcon0(struct drm_device *drm) } void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel, - struct drm_encoder *encoder) + const struct drm_encoder *encoder) { int ret = -ENOTSUPP; @@ -783,7 +783,7 @@ static int sun4i_tcon_remove(struct platform_device *pdev) /* platform specific TCON muxing callbacks */ static int sun5i_a13_tcon_set_mux(struct sun4i_tcon *tcon, - struct drm_encoder *encoder) + const struct drm_encoder *encoder) { u32 val; @@ -799,7 +799,7 @@ static int sun5i_a13_tcon_set_mux(struct sun4i_tcon *tcon, } static int sun6i_tcon_set_mux(struct sun4i_tcon *tcon, - struct drm_encoder *encoder) + const struct drm_encoder *encoder) { struct sun4i_tcon *tcon0 = sun4i_get_tcon0(encoder->dev); u32 shift; diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index d9e1357cc8ae..d81c6e20efe6 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -152,7 +152,7 @@ struct sun4i_tcon_quirks { bool needs_de_be_mux; /* sun6i needs mux to select backend */ /* callback to handle tcon muxing options */ - int (*set_mux)(struct sun4i_tcon *, struct drm_encoder *); + int (*set_mux)(struct sun4i_tcon *, const struct drm_encoder *); }; struct sun4i_tcon { From patchwork Tue Oct 17 09:06:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116053 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4638332qgn; Tue, 17 Oct 2017 02:08:42 -0700 (PDT) X-Google-Smtp-Source: AOwi7QBBI3yBp1x5cEl0RmC9aS3M9hmWuGSfxMSJjPf4kMnOP9QRftxVjlesqC1HPCXXPyeWMaac X-Received: by 10.84.199.170 with SMTP id r39mr11419199pld.356.1508231322509; Tue, 17 Oct 2017 02:08:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231322; cv=none; d=google.com; s=arc-20160816; b=kiMwqVb4EWA4WygiFiO5KvRUBb+L0qV2jMMaDQyWc3LkdIi464MvWKdDB1oPXww+i6 /nndvi/k9sHHQMAFEjKxSm0k7dJEGd2e4Ft3I0mzKiEQz54wNyGTt33TWD/U0xDQssmI n4byPLRyNd7QiZJ13S5ZsjCMvKYD6a8XElkojZkxQsYt2K11IWwxHfROcQcGD4+kQlFs Y7gW29icNIRNOwE1AfprNOx2Lyl3639xuctowYrVAUarUb0ZCFir7Y4V9Wo/QVsFJR/s Cf3RfyQg7lKkYv2zBvego19P/8hN5qrlUJs30r/JoF0p74c5PtG2Lv8v2X2wKyXD9Tj5 LQtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=oCaXhUN/7zqJkbV/pB5ovL88xgiceTPmCv93O3CeFbk=; b=weI2NZaiHPNsEh3GG6YOlmaJktaKAOW1fI84hGSy7+e+duNfWG1BFK1waJi1CZ36PK LiheRDmBellYdbvoVF/3hy1ythCoQgVy0qX1slTLLHFC9cYfJRHBnDql/oe2mxdnLhz0 hX3BGxfA6LtCuESl3YFJPO0NJ0eeTFmn36CfR0OGMWrFOO2InLovvhz9nY7ZnzYtIrfE WnM1DdWf/T+Q+NwDqqB1Pi3artg86Qrq8tsoNT9YGQBMHhNAObHZIpeU4zNyXfKpkxIP blGMlMucvJB9OcRSvjLmmE/CQtEJDcrwmmRJneZvBXAypSv70cMpSDdVye6fWnkvHKk8 npaw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id v9si4398704pgt.770.2017.10.17.02.08.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:08:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C33D76E638; Tue, 17 Oct 2017 09:06:58 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 785DC6E600 for ; Tue, 17 Oct 2017 09:06:41 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 99B7F2088E; Tue, 17 Oct 2017 11:06:39 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 70C6320888; Tue, 17 Oct 2017 11:06:39 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 04/23] drm/sun4i: tcon: Make tcon_get_clk_delay mode argument const Date: Tue, 17 Oct 2017 11:06:11 +0200 Message-Id: X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The drm_display_mode pointer can be mark const, so let's do it. Signed-off-by: Maxime Ripard Reviewed-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 54e1796d2953..9b5b21ad8378 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -146,7 +146,7 @@ void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel, } EXPORT_SYMBOL(sun4i_tcon_set_mux); -static int sun4i_tcon_get_clk_delay(struct drm_display_mode *mode, +static int sun4i_tcon_get_clk_delay(const struct drm_display_mode *mode, int channel) { int delay = mode->vtotal - mode->vdisplay; From patchwork Tue Oct 17 09:06:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116054 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4638492qgn; Tue, 17 Oct 2017 02:08:54 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDZHNWc+hh9Cjijk62ZW5MPqLFif4pgX8UiTgQ2PCoXFZqJX1EdMKI4lcVRudnrXopHpcnM X-Received: by 10.98.79.80 with SMTP id d77mr11188599pfb.238.1508231334459; Tue, 17 Oct 2017 02:08:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231334; cv=none; d=google.com; s=arc-20160816; b=IJ4DI6+eZSAGlEeXH0eExadjAYi+LvORiB8Q4/mgEs+mvHUMbNL3tgSvsF7lEsJL3d 3kEO/RH5qxwYbPzkI3wsH+8/hbSY76VrB6f53xsy93e4SRbOdUCrfNzY/F2sMCGgAqN6 y76ps5K8I3K9k2aPF3QZGSdfwndomE9lW79IbtVvsDTOTx1HxaDItA8kr2WBatfe3lUa BqM/Ss5cQG6cddhvTd/Ek0/RHNssxEztDMqKNWPiF0+35TRwe8HJgbr76WZI5Fgs8DH3 oNvjukAFX/j9TIZ5HVk9CVkzVAwQ2LvFjXA67hDJOvkNCL7/arEVeOcHz2Lfym6b5OH5 /p0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=sHdeJbOpHBkQiMOMrrqRxYCNK0tZWnBixBeqY3A6A60=; b=PQoMmOJ6pCRDsJktEggHa8yZmVbou/bdEsmaudrFMzrWS1nG0bjpiI5V1iBekYLFu2 2b+apwB12+Wz23rhmm3D6M5C6Ja0IFvYQTIuBlhzKpkmbtszDi4bcqOYMokFcfKu8fZF dGYbxAx3fSkB37UcttA43aTo8X2mgmx+N8SdJAdd8jKzqFHMZhLK/4BnqE7V5olkEO2O 4Lxyw1zgUbecLUvHXy4MPIWVqKeY63Qi/JtggSDHnMEk419oUdBNNWHSKV30pjHPYNic jfuBkHSGBekWkPyHoprAZiNfi+IK3Mv0UjNa5VkGwfA+JOQnuOR+Dw60FHlKk24GYHra WnRA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id n11si5725892pls.746.2017.10.17.02.08.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:08:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 142A06E63C; Tue, 17 Oct 2017 09:07:00 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id CB6FA6E5BF for ; Tue, 17 Oct 2017 09:06:44 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 43F13208AC; Tue, 17 Oct 2017 11:06:43 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 14BF7208A6; Tue, 17 Oct 2017 11:06:43 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 05/23] drm/sun4i: tcon: Don't rely on encoders to enable the TCON Date: Tue, 17 Oct 2017 11:06:12 +0200 Message-Id: <90b4396e19b3eca61b2ebfdae0672074b88ad74d.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" So far, we've required all the TCON-connected encoders to call the TCON enable and disable functions. This was made this way because in the RGB/LVDS case, the TCON is the CRTC and the encoder. However, in all the other cases (HDMI, TV, DSI, etc.), we have another encoder down the road that needs to be programmed. We also needed to know which channel the encoder is connected to, which is encoder-specific. The CRTC's enable and disable callbacks can work just fine for our use case, and we can get the channel to use just by looking at the type of encoder, since that is fixed. Implement those callbacks, which will remove some of the encoder boilerplate. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_crtc.c | 22 ++++++- drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 8 +-- drivers/gpu/drm/sun4i/sun4i_rgb.c | 14 +--- drivers/gpu/drm/sun4i/sun4i_tcon.c | 87 ++++++++++++--------------- drivers/gpu/drm/sun4i/sun4i_tcon.h | 10 +--- drivers/gpu/drm/sun4i/sun4i_tv.c | 6 +-- 6 files changed, 67 insertions(+), 80 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c b/drivers/gpu/drm/sun4i/sun4i_crtc.c index d097c6f93ad0..e86baa3746af 100644 --- a/drivers/gpu/drm/sun4i/sun4i_crtc.c +++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c @@ -30,6 +30,22 @@ #include "sunxi_engine.h" #include "sun4i_tcon.h" +/* + * While this isn't really working in the DRM theory, in practice we + * can only ever have one encoder per TCON since we have a mux in our + * TCON. + */ +static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc) +{ + struct drm_encoder *encoder; + + drm_for_each_encoder(encoder, crtc->dev) + if (encoder->crtc == crtc) + return encoder; + + return NULL; +} + static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { @@ -72,11 +88,12 @@ static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc, static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { + struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc); struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); DRM_DEBUG_DRIVER("Disabling the CRTC\n"); - sun4i_tcon_disable(scrtc->tcon); + sun4i_tcon_set_status(scrtc->tcon, encoder, false); if (crtc->state->event && !crtc->state->active) { spin_lock_irq(&crtc->dev->event_lock); @@ -90,11 +107,12 @@ static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc, static void sun4i_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { + struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc); struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); DRM_DEBUG_DRIVER("Enabling the CRTC\n"); - sun4i_tcon_enable(scrtc->tcon); + sun4i_tcon_set_status(scrtc->tcon, encoder, true); } static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = { diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c index 6ca6e6a74c4a..482bf03d55c1 100644 --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c @@ -86,8 +86,6 @@ static int sun4i_hdmi_atomic_check(struct drm_encoder *encoder, static void sun4i_hdmi_disable(struct drm_encoder *encoder) { struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder); - struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); - struct sun4i_tcon *tcon = crtc->tcon; u32 val; DRM_DEBUG_DRIVER("Disabling the HDMI Output\n"); @@ -95,22 +93,16 @@ static void sun4i_hdmi_disable(struct drm_encoder *encoder) val = readl(hdmi->base + SUN4I_HDMI_VID_CTRL_REG); val &= ~SUN4I_HDMI_VID_CTRL_ENABLE; writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG); - - sun4i_tcon_channel_disable(tcon, 1); } static void sun4i_hdmi_enable(struct drm_encoder *encoder) { struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder); - struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); - struct sun4i_tcon *tcon = crtc->tcon; u32 val = 0; DRM_DEBUG_DRIVER("Enabling the HDMI Output\n"); - sun4i_tcon_channel_enable(tcon, 1); - sun4i_hdmi_setup_avi_infoframes(hdmi, mode); val |= SUN4I_HDMI_PKT_CTRL_TYPE(0, SUN4I_HDMI_PKT_AVI); val |= SUN4I_HDMI_PKT_CTRL_TYPE(1, SUN4I_HDMI_PKT_END); diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c index 7cd7090ad63a..a7f297ed40c1 100644 --- a/drivers/gpu/drm/sun4i/sun4i_rgb.c +++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c @@ -134,13 +134,10 @@ static void sun4i_rgb_encoder_enable(struct drm_encoder *encoder) DRM_DEBUG_DRIVER("Enabling RGB output\n"); - if (!IS_ERR(tcon->panel)) + if (!IS_ERR(tcon->panel)) { drm_panel_prepare(tcon->panel); - - sun4i_tcon_channel_enable(tcon, 0); - - if (!IS_ERR(tcon->panel)) drm_panel_enable(tcon->panel); + } } static void sun4i_rgb_encoder_disable(struct drm_encoder *encoder) @@ -150,13 +147,10 @@ static void sun4i_rgb_encoder_disable(struct drm_encoder *encoder) DRM_DEBUG_DRIVER("Disabling RGB output\n"); - if (!IS_ERR(tcon->panel)) + if (!IS_ERR(tcon->panel)) { drm_panel_disable(tcon->panel); - - sun4i_tcon_channel_disable(tcon, 0); - - if (!IS_ERR(tcon->panel)) drm_panel_unprepare(tcon->panel); + } } static void sun4i_rgb_encoder_mode_set(struct drm_encoder *encoder, diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 9b5b21ad8378..964cf22a1ced 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -35,66 +35,61 @@ #include "sun4i_tcon.h" #include "sunxi_engine.h" -void sun4i_tcon_disable(struct sun4i_tcon *tcon) +static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel, + bool enabled) { - DRM_DEBUG_DRIVER("Disabling TCON\n"); + struct clk *clk; - /* Disable the TCON */ - regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG, - SUN4I_TCON_GCTL_TCON_ENABLE, 0); -} -EXPORT_SYMBOL(sun4i_tcon_disable); - -void sun4i_tcon_enable(struct sun4i_tcon *tcon) -{ - DRM_DEBUG_DRIVER("Enabling TCON\n"); - - /* Enable the TCON */ - regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG, - SUN4I_TCON_GCTL_TCON_ENABLE, - SUN4I_TCON_GCTL_TCON_ENABLE); -} -EXPORT_SYMBOL(sun4i_tcon_enable); - -void sun4i_tcon_channel_disable(struct sun4i_tcon *tcon, int channel) -{ - DRM_DEBUG_DRIVER("Disabling TCON channel %d\n", channel); - - /* Disable the TCON's channel */ - if (channel == 0) { + switch (channel) { + case 0: regmap_update_bits(tcon->regs, SUN4I_TCON0_CTL_REG, - SUN4I_TCON0_CTL_TCON_ENABLE, 0); - clk_disable_unprepare(tcon->dclk); + SUN4I_TCON0_CTL_TCON_ENABLE, + enabled ? SUN4I_TCON0_CTL_TCON_ENABLE : 0); + clk = tcon->dclk; + break; + case 1: + WARN_ON(!tcon->quirks->has_channel_1); + regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG, + SUN4I_TCON1_CTL_TCON_ENABLE, + enabled ? SUN4I_TCON1_CTL_TCON_ENABLE : 0); + clk = tcon->sclk1; + break; + default: + DRM_WARN("Unknown channel... doing nothing\n"); return; } - WARN_ON(!tcon->quirks->has_channel_1); - regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG, - SUN4I_TCON1_CTL_TCON_ENABLE, 0); - clk_disable_unprepare(tcon->sclk1); + if (enabled) + clk_prepare_enable(clk); + else + clk_disable_unprepare(clk); } -EXPORT_SYMBOL(sun4i_tcon_channel_disable); -void sun4i_tcon_channel_enable(struct sun4i_tcon *tcon, int channel) +void sun4i_tcon_set_status(struct sun4i_tcon *tcon, + const struct drm_encoder *encoder, + bool enabled) { - DRM_DEBUG_DRIVER("Enabling TCON channel %d\n", channel); + int channel; - /* Enable the TCON's channel */ - if (channel == 0) { - regmap_update_bits(tcon->regs, SUN4I_TCON0_CTL_REG, - SUN4I_TCON0_CTL_TCON_ENABLE, - SUN4I_TCON0_CTL_TCON_ENABLE); - clk_prepare_enable(tcon->dclk); + switch (encoder->encoder_type) { + case DRM_MODE_ENCODER_NONE: + channel = 0; + break; + case DRM_MODE_ENCODER_TMDS: + case DRM_MODE_ENCODER_TVDAC: + channel = 1; + break; + default: + DRM_DEBUG_DRIVER("Unknown encoder type, doing nothing...\n"); return; } - WARN_ON(!tcon->quirks->has_channel_1); - regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG, - SUN4I_TCON1_CTL_TCON_ENABLE, - SUN4I_TCON1_CTL_TCON_ENABLE); - clk_prepare_enable(tcon->sclk1); + regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG, + SUN4I_TCON_GCTL_TCON_ENABLE, + enabled ? SUN4I_TCON_GCTL_TCON_ENABLE : 0); + + sun4i_tcon_channel_set_status(tcon, channel, enabled); } -EXPORT_SYMBOL(sun4i_tcon_channel_enable); void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable) { diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index d81c6e20efe6..03f983927baa 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -190,15 +190,9 @@ struct sun4i_tcon { struct drm_bridge *sun4i_tcon_find_bridge(struct device_node *node); struct drm_panel *sun4i_tcon_find_panel(struct device_node *node); -/* Global Control */ -void sun4i_tcon_disable(struct sun4i_tcon *tcon); -void sun4i_tcon_enable(struct sun4i_tcon *tcon); - -/* Channel Control */ -void sun4i_tcon_channel_disable(struct sun4i_tcon *tcon, int channel); -void sun4i_tcon_channel_enable(struct sun4i_tcon *tcon, int channel); - void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable); +void sun4i_tcon_set_status(struct sun4i_tcon *crtc, + const struct drm_encoder *encoder, bool enable); /* Mode Related Controls */ void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel, diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c index 050cfd43c7a0..2e27ff9fc58f 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tv.c +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c @@ -345,12 +345,9 @@ static void sun4i_tv_disable(struct drm_encoder *encoder) { struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); - struct sun4i_tcon *tcon = crtc->tcon; DRM_DEBUG_DRIVER("Disabling the TV Output\n"); - sun4i_tcon_channel_disable(tcon, 1); - regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, SUN4I_TVE_EN_ENABLE, 0); @@ -362,7 +359,6 @@ static void sun4i_tv_enable(struct drm_encoder *encoder) { struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); - struct sun4i_tcon *tcon = crtc->tcon; DRM_DEBUG_DRIVER("Enabling the TV Output\n"); @@ -371,8 +367,6 @@ static void sun4i_tv_enable(struct drm_encoder *encoder) regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, SUN4I_TVE_EN_ENABLE, SUN4I_TVE_EN_ENABLE); - - sun4i_tcon_channel_enable(tcon, 1); } static void sun4i_tv_mode_set(struct drm_encoder *encoder, From patchwork Tue Oct 17 09:06:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116035 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4636510qgn; Tue, 17 Oct 2017 02:06:48 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAqWctuJC1LWkm02FXuMqR1q17QZ2w6n6ccPHY/xw9gPnOKxiiUgo6V8NLYaxJU0TsNA7As X-Received: by 10.159.216.131 with SMTP id s3mr11312313plp.432.1508231208773; Tue, 17 Oct 2017 02:06:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231208; cv=none; d=google.com; s=arc-20160816; b=QyOI925XEBergJKRqNspsunxi2hhayuJg4nUvzB2R4WqZ6J+OY5MmV5Yu0FsIvy/Rj ji+0SHgfSseUXIs2Wwp0kyppRZ52obMwcEKXLAe/dDJ8C1kFqOVLfS39ztaKto5HNvPF sK3pCjf5pvmTmZe0/ckOv/GRBSL1FzzUyzB6YLfeRhaKhsAN/prTS/nNtEmsDtsWNvHV eaPJWP4X/5ZLr6JopNJyT1hQsLGgYCTvA7G9rwx7tGrdLIrpBhOLCpa7UHhJiLdSN8T2 TBSZqu8ivRSzA5TI24SNypp6hMcn4ZsmGSVhtZ8JydDfZD39GcP5xUXhVTnmFmsJACbN EobQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=oKlZ+bwXfLByMcLomuuToNVc66qo76iTJxlLyTMAzmQ=; b=kj63ZGNJozQ57YusRERYMCOeSczoFooJaSw9aCW1G/bW2TrFF87qFw9sGXxg/JIpUq 4epQYeOjO8896CuDJPM6Uyb0qNwRa7mxMp+cx5QDpHv2MnnBuOGbCIF9zvNtmSEZ8je2 TBMTCAMwE5uPjQyxcijkuoH3635RVlluDQmN62oFw9uMKKfN+Ch/7gnkBzvCtHCJtNZP OdnTiXEvCLMVTQV1U6wAZ6GaRvEZpMHPp3epyVh3qXkjzrGyfvRe7GA/ZufPF81OGtQH 54cUUm5C376DSCq6RsjjaY5ZLEyj4NNkjL/Q8sX203sWHNsL9OQR1/zfxT2hJGGMJJhU 1PpA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id b3si5794798plr.706.2017.10.17.02.06.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:06:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D336A6E60D; Tue, 17 Oct 2017 09:06:44 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 949E86E604 for ; Tue, 17 Oct 2017 09:06:41 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 0D94420890; Tue, 17 Oct 2017 11:06:40 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id D175E2088B; Tue, 17 Oct 2017 11:06:39 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 06/23] drm/sun4i: tcon: Don't rely on encoders to set the TCON mode Date: Tue, 17 Oct 2017 11:06:13 +0200 Message-Id: X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Just like we did for the TCON enable and disable, for historical reasons we used to rely on the encoders calling the TCON mode_set function, while the CRTC has a callback for that. Let's implement it in order to reduce the boilerplate code. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_crtc.c | 10 +++++++- drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c | 1 +- drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 7 +----- drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 1 +- drivers/gpu/drm/sun4i/sun4i_rgb.c | 15 +----------- drivers/gpu/drm/sun4i/sun4i_tcon.c | 31 +++++++++++++++++----- drivers/gpu/drm/sun4i/sun4i_tcon.h | 11 ++------ drivers/gpu/drm/sun4i/sun4i_tv.c | 6 +---- 8 files changed, 37 insertions(+), 45 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c b/drivers/gpu/drm/sun4i/sun4i_crtc.c index e86baa3746af..5decae0069d0 100644 --- a/drivers/gpu/drm/sun4i/sun4i_crtc.c +++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c @@ -115,11 +115,21 @@ static void sun4i_crtc_atomic_enable(struct drm_crtc *crtc, sun4i_tcon_set_status(scrtc->tcon, encoder, true); } +static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc) +{ + struct drm_display_mode *mode = &crtc->state->adjusted_mode; + struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc); + struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); + + sun4i_tcon_mode_set(scrtc->tcon, encoder, mode); +} + static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = { .atomic_begin = sun4i_crtc_atomic_begin, .atomic_flush = sun4i_crtc_atomic_flush, .atomic_enable = sun4i_crtc_atomic_enable, .atomic_disable = sun4i_crtc_atomic_disable, + .mode_set_nofb = sun4i_crtc_mode_set_nofb, }; static int sun4i_crtc_enable_vblank(struct drm_crtc *crtc) diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c index 04f85b1cf922..e826da34e919 100644 --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c @@ -13,7 +13,6 @@ #include #include -#include "sun4i_tcon.h" #include "sun4i_hdmi.h" struct sun4i_ddc { diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c index 482bf03d55c1..d2eb0a60e568 100644 --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c @@ -30,7 +30,6 @@ #include "sun4i_crtc.h" #include "sun4i_drv.h" #include "sun4i_hdmi.h" -#include "sun4i_tcon.h" static inline struct sun4i_hdmi * drm_encoder_to_sun4i_hdmi(struct drm_encoder *encoder) @@ -120,15 +119,9 @@ static void sun4i_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *adjusted_mode) { struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder); - struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); - struct sun4i_tcon *tcon = crtc->tcon; unsigned int x, y; u32 val; - sun4i_tcon1_mode_set(tcon, mode); - sun4i_tcon_set_mux(tcon, 1, encoder); - - clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000); clk_set_rate(hdmi->mod_clk, mode->crtc_clock * 1000); clk_set_rate(hdmi->tmds_clk, mode->crtc_clock * 1000); diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c index 1b6b37aefc38..dc332ea56f6c 100644 --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c @@ -12,7 +12,6 @@ #include -#include "sun4i_tcon.h" #include "sun4i_hdmi.h" struct sun4i_tmds { diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c index a7f297ed40c1..832f8f9bc47f 100644 --- a/drivers/gpu/drm/sun4i/sun4i_rgb.c +++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c @@ -153,22 +153,7 @@ static void sun4i_rgb_encoder_disable(struct drm_encoder *encoder) } } -static void sun4i_rgb_encoder_mode_set(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) -{ - struct sun4i_rgb *rgb = drm_encoder_to_sun4i_rgb(encoder); - struct sun4i_tcon *tcon = rgb->tcon; - - sun4i_tcon0_mode_set(tcon, mode); - sun4i_tcon_set_mux(tcon, 0, encoder); - - /* FIXME: This seems to be board specific */ - clk_set_phase(tcon->dclk, 120); -} - static struct drm_encoder_helper_funcs sun4i_rgb_enc_helper_funcs = { - .mode_set = sun4i_rgb_encoder_mode_set, .disable = sun4i_rgb_encoder_disable, .enable = sun4i_rgb_encoder_enable, }; diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 964cf22a1ced..7ecd4f7c8411 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -139,7 +139,6 @@ void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel, DRM_DEBUG_DRIVER("Muxing encoder %s to CRTC %s: %d\n", encoder->name, encoder->crtc->name, ret); } -EXPORT_SYMBOL(sun4i_tcon_set_mux); static int sun4i_tcon_get_clk_delay(const struct drm_display_mode *mode, int channel) @@ -159,8 +158,8 @@ static int sun4i_tcon_get_clk_delay(const struct drm_display_mode *mode, return delay; } -void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon, - struct drm_display_mode *mode) +static void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon, + struct drm_display_mode *mode) { unsigned int bp, hsync, vsync; u8 clk_delay; @@ -233,10 +232,9 @@ void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon, /* Enable the output on the pins */ regmap_write(tcon->regs, SUN4I_TCON0_IO_TRI_REG, 0); } -EXPORT_SYMBOL(sun4i_tcon0_mode_set); -void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, - struct drm_display_mode *mode) +static void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, + const struct drm_display_mode *mode) { unsigned int bp, hsync, vsync, vtotal; u8 clk_delay; @@ -324,7 +322,26 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, SUN4I_TCON_GCTL_IOMAP_MASK, SUN4I_TCON_GCTL_IOMAP_TCON1); } -EXPORT_SYMBOL(sun4i_tcon1_mode_set); + +void sun4i_tcon_mode_set(struct sun4i_tcon *tcon, + const struct drm_encoder *encoder, + const struct drm_display_mode *mode) +{ + switch (encoder->encoder_type) { + case DRM_MODE_ENCODER_NONE: + sun4i_tcon0_mode_set(tcon, mode); + sun4i_tcon_set_mux(tcon, 0, encoder); + break; + case DRM_MODE_ENCODER_TVDAC: + case DRM_MODE_ENCODER_TMDS: + sun4i_tcon1_mode_set(tcon, mode); + sun4i_tcon_set_mux(tcon, 1, encoder); + break; + default: + DRM_DEBUG_DRIVER("Unknown encoder type, doing nothing...\n"); + } +} +EXPORT_SYMBOL(sun4i_tcon_mode_set); static void sun4i_tcon_finish_page_flip(struct drm_device *dev, struct sun4i_crtc *scrtc) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index 03f983927baa..f61bf6d83b4a 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -191,15 +191,10 @@ struct drm_bridge *sun4i_tcon_find_bridge(struct device_node *node); struct drm_panel *sun4i_tcon_find_panel(struct device_node *node); void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable); +void sun4i_tcon_mode_set(struct sun4i_tcon *tcon, + const struct drm_encoder *encoder, + const struct drm_display_mode *mode); void sun4i_tcon_set_status(struct sun4i_tcon *crtc, const struct drm_encoder *encoder, bool enable); -/* Mode Related Controls */ -void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel, - struct drm_encoder *encoder); -void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon, - struct drm_display_mode *mode); -void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, - struct drm_display_mode *mode); - #endif /* __SUN4I_TCON_H__ */ diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c index 2e27ff9fc58f..b070d522ed8d 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tv.c +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c @@ -24,7 +24,6 @@ #include "sun4i_crtc.h" #include "sun4i_drv.h" -#include "sun4i_tcon.h" #include "sunxi_engine.h" #define SUN4I_TVE_EN_REG 0x000 @@ -374,13 +373,8 @@ static void sun4i_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *adjusted_mode) { struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); - struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); - struct sun4i_tcon *tcon = crtc->tcon; const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode); - sun4i_tcon1_mode_set(tcon, mode); - sun4i_tcon_set_mux(tcon, 1, encoder); - /* Enable and map the DAC to the output */ regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, SUN4I_TVE_EN_DAC_MAP_MASK, From patchwork Tue Oct 17 09:06:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116039 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4637039qgn; Tue, 17 Oct 2017 02:07:18 -0700 (PDT) X-Google-Smtp-Source: AOwi7QBQjZTPqQZQeBlM0d1C8J3NyuFTq/FVdeC064RB4Tk7s89vJo2+MM0a+6Yi3mmphq5yyYZb X-Received: by 10.99.114.92 with SMTP id c28mr10505634pgn.342.1508231238621; Tue, 17 Oct 2017 02:07:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231238; cv=none; d=google.com; s=arc-20160816; b=pdNkyUBWUuNZHZQOAf07aTps4vP7Uy74WMcSVEVUMMKrHRu6v3n3u29vQr0G3YJmIT HBwd5tr0taZhOFpt1Gx2jB4gkO5AwVRITLtpohu7TRn6I4oP5lVVXgFfH43i5kNH5zTz Wyo/l4H0lQPI9PGV+w1vS9WfIqyJfhOwPiLRvKOOC7TgwZwECt+LNWz6mkEqj0AapZEf z6iYeuw8kesfQkXjLRjziHJmslWeKsKA1+DPGw5qok6vNPY0DQIEhl0uDKqggnQAZZOi g5/gOGbBHtsZmjsOqM7gKZPatGZNQ+XlzaR9QGIjnQB5fRWOxl34BjtQg13vOIU0G40e zbXA== ARC-Message-Signature: i=1; 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[131.252.210.177]) by mx.google.com with ESMTPS id x1si5186510pgp.479.2017.10.17.02.07.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:07:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E2B966E618; Tue, 17 Oct 2017 09:06:46 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 00F176E606 for ; Tue, 17 Oct 2017 09:06:41 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 6BB7920891; Tue, 17 Oct 2017 11:06:40 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 416F62088B; Tue, 17 Oct 2017 11:06:40 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 07/23] drm/sun4i: tcon: Move out the tcon0 common setup Date: Tue, 17 Oct 2017 11:06:14 +0200 Message-Id: <03df3b0c8a1823b39a2ae0b190722f3623e76894.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Some channel0 setup has to be done, no matter what the output interface is (RGB, CPU, LVDS). Move that code into a common function in order to avoid duplication. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 7ecd4f7c8411..f69bcdf11cb8 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -158,15 +158,26 @@ static int sun4i_tcon_get_clk_delay(const struct drm_display_mode *mode, return delay; } -static void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon, - struct drm_display_mode *mode) +static void sun4i_tcon0_mode_set_common(struct sun4i_tcon *tcon, + const struct drm_display_mode *mode) +{ + /* Configure the dot clock */ + clk_set_rate(tcon->dclk, mode->crtc_clock * 1000); + + /* Set the resolution */ + regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG, + SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) | + SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay)); +} + +static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, + const struct drm_display_mode *mode) { unsigned int bp, hsync, vsync; u8 clk_delay; u32 val = 0; - /* Configure the dot clock */ - clk_set_rate(tcon->dclk, mode->crtc_clock * 1000); + sun4i_tcon0_mode_set_common(tcon, mode); /* Adjust clock delay */ clk_delay = sun4i_tcon_get_clk_delay(mode, 0); @@ -174,11 +185,6 @@ static void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon, SUN4I_TCON0_CTL_CLK_DELAY_MASK, SUN4I_TCON0_CTL_CLK_DELAY(clk_delay)); - /* Set the resolution */ - regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG, - SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) | - SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay)); - /* * This is called a backporch in the register documentation, * but it really is the back porch + hsync @@ -329,7 +335,7 @@ void sun4i_tcon_mode_set(struct sun4i_tcon *tcon, { switch (encoder->encoder_type) { case DRM_MODE_ENCODER_NONE: - sun4i_tcon0_mode_set(tcon, mode); + sun4i_tcon0_mode_set_rgb(tcon, mode); sun4i_tcon_set_mux(tcon, 0, encoder); break; case DRM_MODE_ENCODER_TVDAC: From patchwork Tue Oct 17 09:06:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116042 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4637436qgn; Tue, 17 Oct 2017 02:07:45 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDzgwqC5yA7FDCbHxkgUr16MOCQjymdYkHZDfpQ7DnljmlDwyLJW9Neb/+jnEuCo1hUqYBZ X-Received: by 10.159.207.136 with SMTP id z8mr11329917plo.63.1508231265091; Tue, 17 Oct 2017 02:07:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231265; cv=none; d=google.com; s=arc-20160816; b=ROk9Ts6TaRvvivtd8Vwd7DaWAtIEok8UchKMmYDxmm86tILHfOwX7uf22t9QZGo9oH vU0pHMeslh24m/yi5qI2JEM92jkNmhB8ssPXmYM/EqqQXSpcrHv3cSODHNbk0As322sE fMrHhzjKwDXDdnKotgfQ3lr6cXCMzOudwaLv8KRi2biD0MLPzu6fFOFEaH7UJYQtyd4Q Ww4ZQ5he9uV8MRYnp9tlEv/I0S31vE9GpPBs+rwz4wtjVlGbAeqE4umdmQ3p8m7vVRwM OZzT3TbovQGKqg5OU9+M1GpV0Yxd24NL2GU8if8CINQpYas8bVHxOfwYaxD5zbR7HKmd GFIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=uSrIwbJQ3n3C8o4afng4CFVULN/HobwLRxEoKlv2oAk=; b=pZ0BkWgCEbhKXGNv+XzySAY0O8fgZyS/+bmfIkp9spnhj+k2JAE5H4j5O61REyABzh ZJRfyWagv5ng3m/hJBZueV5uWQxLyZHQPxAg8Nhvk/Na5XBEB5aOaS/iKajGl/fsTUY6 Po1bt1zpBAajDUIQ3fBWCnfsemYAZ5If369GePLEwx3Wd7p0axuR2XgS/sHtExZitNfG O/p++JT7jIXHxInoUAI6afNJeFCihZLwcJyk0TlR6bzxKfL/lWWLzPpZMR2TnsFbsDmA tvYEeo2I49bd/874a+RKFQJNB8cbeuwj8F43Zjd4BIilmsxFDgtmRhTf4nL3Pn+IFOMB oT8w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id s17si5590964pfg.209.2017.10.17.02.07.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:07:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 32D5D6E619; Tue, 17 Oct 2017 09:06:47 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 6546C6E609 for ; Tue, 17 Oct 2017 09:06:42 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id D208020893; Tue, 17 Oct 2017 11:06:40 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id A830C2088F; Tue, 17 Oct 2017 11:06:40 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 08/23] dt-bindings: panel: lvds: Document power-supply property Date: Tue, 17 Oct 2017 11:06:15 +0200 Message-Id: <89bee8042b5fa50c8c3dbf52cc0c14b34beef9df.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The power-supply property is used be a vast majority of panels, including panel-simple. Let's document it as a common property Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++++++ Documentation/devicetree/bindings/display/panel/panel-lvds.txt | 1 + 2 files changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.txt b/Documentation/devicetree/bindings/display/panel/panel-common.txt index ec52c472c845..125ea68052af 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-common.txt +++ b/Documentation/devicetree/bindings/display/panel/panel-common.txt @@ -78,6 +78,12 @@ used for panels that implement compatible control signals. while active. Active high reset signals can be supported by inverting the GPIO specifier polarity flag. +Power +----- + +- power-supply: many display panels need an additional power supply in + order to be fully powered-up. For such panels, power-supply contains + a phandle to the regulator powering the panel. Backlight --------- diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt index b938269f841e..250850a2150b 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt +++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt @@ -32,6 +32,7 @@ Optional properties: - label: See panel-common.txt. - gpios: See panel-common.txt. - backlight: See panel-common.txt. +- power-supply: See panel-common.txt. - data-mirror: If set, reverse the bit order described in the data mappings below on all data lanes, transmitting bits for slots 6 to 0 instead of 0 to 6. From patchwork Tue Oct 17 09:06:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116037 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4636668qgn; Tue, 17 Oct 2017 02:06:57 -0700 (PDT) X-Google-Smtp-Source: AOwi7QB/DNgfGqkJnYzAyGLnOgZGg/A0pPT6f/d+gpsY+DZzraRaplsHi/OU3YxQ70S6pUpi8+Xw X-Received: by 10.84.205.70 with SMTP id o6mr11704120plh.350.1508231217176; Tue, 17 Oct 2017 02:06:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231217; cv=none; d=google.com; s=arc-20160816; b=BKQyhQHuqdt57d25dHzAFxaHaJYljPCkD6C75PMghzDuoSjH0J+Itf8KQLirOyB3+p NgOuK0fs8/bQNJxBrTTsa1uRmCqTaS7j/d+zWAgXMnwYSLHavZc8mlYJuDtsNh4dpeT1 CRKVNHRZRx2Jn09nJ1MfcPQPrlVdZMo7ZK6hJe4QydPOsX+mxJr0eXRYbDdpLVUPaNbj 1Sf2+47g4DSe/szkooElXfJs1Kg7PBApBsr2kwYF6vh340LF2QkhogTvQBnjz7oldVIv ZcIF3pAdLBNfXnDDDCsyEAzaV9wIBJa6bKF2GfjaIa11cC1sTpn3jtHOf9VHQ92DBwf7 ZMvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=PrszxQLv9Aap/EznQOMMzg5uIx0jTVzT+aYoIFCukh0=; b=xaoesogcSmPgfZsM8BSibrrtoaHeKWMWEp/ocZMkeMjFuEIKW7GoIwgWRORAkTuYy0 Lpv/1IgqIdGd/P/NuGE5ImKpHJcZd/l02X10wnziA+l8vZOXhN2+u1fCySk/4Tk6eoTM V5gR8eE1Gimw0krfUeazAZASLeV+cL6835BRKX+M/+ySpzAKK06MkiCNsF9SMh6lrBWo jbJj5XmbFfDINT54JD0sC8MVj3CCDvNiIsAE/PWEtP8DvNpotv3155yaIhk8bNDDaTs6 1VEEKrcI72T3dutidgTEzitUnH0Dt4+nStus+4hMwmckUdrOiqgx/0pqdLVfUuBH1BcA gUZQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id t21si4599600pgb.737.2017.10.17.02.06.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:06:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 91FF46E611; Tue, 17 Oct 2017 09:06:45 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id CA8C56E606 for ; Tue, 17 Oct 2017 09:06:42 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 3FF5320898; Tue, 17 Oct 2017 11:06:41 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 15F3D20892; Tue, 17 Oct 2017 11:06:41 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 09/23] drm/panel: lvds: Add support for the power-supply property Date: Tue, 17 Oct 2017 11:06:16 +0200 Message-Id: <6f688742088e5e873f8d392956e06e783667aa96.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" A significant number of panels need to power up a regulator in order to operate properly. Add support for the power-supply property to enable and disable such a regulator whenever needed. Signed-off-by: Maxime Ripard Reviewed-by: Chen-Yu Tsai --- drivers/gpu/drm/panel/panel-lvds.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-lvds.c b/drivers/gpu/drm/panel/panel-lvds.c index e2d57c01200b..57e38a9e7ab4 100644 --- a/drivers/gpu/drm/panel/panel-lvds.c +++ b/drivers/gpu/drm/panel/panel-lvds.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -39,6 +40,7 @@ struct panel_lvds { bool data_mirror; struct backlight_device *backlight; + struct regulator *supply; struct gpio_desc *enable_gpio; struct gpio_desc *reset_gpio; @@ -69,6 +71,9 @@ static int panel_lvds_unprepare(struct drm_panel *panel) if (lvds->enable_gpio) gpiod_set_value_cansleep(lvds->enable_gpio, 0); + if (lvds->supply) + regulator_disable(lvds->supply); + return 0; } @@ -76,6 +81,17 @@ static int panel_lvds_prepare(struct drm_panel *panel) { struct panel_lvds *lvds = to_panel_lvds(panel); + if (lvds->supply) { + int err; + + err = regulator_enable(lvds->supply); + if (err < 0) { + dev_err(lvds->dev, "failed to enable supply: %d\n", + err); + return err; + } + } + if (lvds->enable_gpio) gpiod_set_value_cansleep(lvds->enable_gpio, 1); @@ -196,6 +212,13 @@ static int panel_lvds_probe(struct platform_device *pdev) if (ret < 0) return ret; + lvds->supply = devm_regulator_get_optional(lvds->dev, "power"); + if (IS_ERR(lvds->supply)) { + ret = PTR_ERR(lvds->supply); + dev_err(lvds->dev, "failed to request regulator: %d\n", ret); + return ret; + } + /* Get GPIOs and backlight controller. */ lvds->enable_gpio = devm_gpiod_get_optional(lvds->dev, "enable", GPIOD_OUT_LOW); From patchwork Tue Oct 17 09:06:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116045 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4637632qgn; Tue, 17 Oct 2017 02:07:56 -0700 (PDT) X-Google-Smtp-Source: AOwi7QBt8Zh6LzZJzse7VTzUvQMDdp4JI3Ob3Gwc2+Fynqb6r56gChTV0V/1ictiPh82f3YoKkNV X-Received: by 10.98.69.86 with SMTP id s83mr11398004pfa.32.1508231276233; Tue, 17 Oct 2017 02:07:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231276; cv=none; d=google.com; s=arc-20160816; b=GOQPTIsUfRm+6FbrDX4hQlsADKjxXdeP0eEiSPEBBOJKtzf/tOsRqY1ikzQktwjLN7 HsYGqf1UPHQa9ThZ3HdLHiilaEdnqCbUWFKhdjv0LGct508kxSC5/y1EfY6qMSU22XK0 b1WzmRjQfjXSh/mnnuD7SRfy2dN8U8D7yZr+xxhsL/CVyt/YE/n3SdEM/MAoakw/chhn IzarVi02GljlENZEKZflyQIk0fyGTsMFQX6ha/a/F0SGGh3xSXOK+FrYvIU3ztZXTBoI QMx4Zd8pN4wAHEExbQDy3WA7HaTsrJgmKevuXMJcb08NTEqVzFq6ERAft/8+4H1/JA3V Z79g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=mmsZE7+VRH57qIQYlUU3D1DdhjW4zz6N4KcrAfJhnQg=; b=0qU9FgxvB+gm2NX2zk1MVdwrOEMj9wmbZPM4pS60E+iX3AlqX3YHtruDaPrmIMmdF8 un99tf3mW+/Byn6KS7eIR+S6sizw5vLsCxhMQLiCxwf1sBqmNNFXQ58hIN9PyM3g9TpG RkS6DHs04bmZX0qFYH0jpc1BNIpA0kfZIIOIuFYLErc+CwkWIqKz/w3CkFk0OlB4hnf5 9ZrC6BV0ZjTiieUAyzyUp56D0qZMrFDbzuvkI1cxngBCTQlquH0xwC8I6pag5D8wQrLf O7PWDI9fOCQNr88L0Izw3PG/tLEO/5nxh/JPpQL/ExWI/OeusAFDpM0eoR2eeoUSK3ba kUqg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id n6si5829738pls.752.2017.10.17.02.07.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:07:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C8C136E61A; Tue, 17 Oct 2017 09:06:47 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 32D956E606 for ; Tue, 17 Oct 2017 09:06:43 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id A03FF2089A; Tue, 17 Oct 2017 11:06:41 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 7621320897; Tue, 17 Oct 2017 11:06:41 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 10/23] clk: sunxi-ng: Add A83T display clocks Date: Tue, 17 Oct 2017 11:06:17 +0200 Message-Id: <19afdfb5c4fea9c3b49e951cea1a184d3eec40b1.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Unfortunately, the A83t display clocks are not children of the de clock, since that clocks doesn't exist at all on the A83t. For now, they are orphans, so let's move them to their true, existing, parent. Fixes: 763c5bd045b1 ("clk: sunxi-ng: add support for DE2 CCU") Signed-off-by: Maxime Ripard Reviewed-by: Chen-Yu Tsai --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c index 5cdaf52669e4..5cc9d9952121 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c @@ -41,11 +41,16 @@ static SUNXI_CCU_GATE(wb_clk, "wb", "wb-div", static SUNXI_CCU_M(mixer0_div_clk, "mixer0-div", "de", 0x0c, 0, 4, CLK_SET_RATE_PARENT); -static SUNXI_CCU_M(mixer1_div_clk, "mixer1-div", "de", 0x0c, 4, 4, - CLK_SET_RATE_PARENT); static SUNXI_CCU_M(wb_div_clk, "wb-div", "de", 0x0c, 8, 4, CLK_SET_RATE_PARENT); +static SUNXI_CCU_M(mixer0_div_a83_clk, "mixer0-div", "pll-de", 0x0c, 0, 4, + CLK_SET_RATE_PARENT); +static SUNXI_CCU_M(mixer1_div_a83_clk, "mixer1-div", "pll-de", 0x0c, 4, 4, + CLK_SET_RATE_PARENT); +static SUNXI_CCU_M(wb_div_a83_clk, "wb-div", "pll-de", 0x0c, 8, 4, + CLK_SET_RATE_PARENT); + static struct ccu_common *sun8i_a83t_de2_clks[] = { &mixer0_clk.common, &mixer1_clk.common, @@ -55,9 +60,9 @@ static struct ccu_common *sun8i_a83t_de2_clks[] = { &bus_mixer1_clk.common, &bus_wb_clk.common, - &mixer0_div_clk.common, - &mixer1_div_clk.common, - &wb_div_clk.common, + &mixer0_div_a83_clk.common, + &mixer1_div_a83_clk.common, + &wb_div_a83_clk.common, }; static struct ccu_common *sun8i_v3s_de2_clks[] = { @@ -81,9 +86,9 @@ static struct clk_hw_onecell_data sun8i_a83t_de2_hw_clks = { [CLK_BUS_MIXER1] = &bus_mixer1_clk.common.hw, [CLK_BUS_WB] = &bus_wb_clk.common.hw, - [CLK_MIXER0_DIV] = &mixer0_div_clk.common.hw, - [CLK_MIXER1_DIV] = &mixer1_div_clk.common.hw, - [CLK_WB_DIV] = &wb_div_clk.common.hw, + [CLK_MIXER0_DIV] = &mixer0_div_a83_clk.common.hw, + [CLK_MIXER1_DIV] = &mixer1_div_a83_clk.common.hw, + [CLK_WB_DIV] = &wb_div_a83_clk.common.hw, }, .num = CLK_NUMBER, }; From patchwork Tue Oct 17 09:06:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116036 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4636584qgn; Tue, 17 Oct 2017 02:06:52 -0700 (PDT) X-Google-Smtp-Source: ABhQp+QWJ7z7p8c+8vVwkQAdolAzb662PgttWKauEgkUquwTsE/SkS+iNYOnNKd9npCSMPvXZldh X-Received: by 10.84.164.104 with SMTP id m37mr3381344plg.242.1508231212668; Tue, 17 Oct 2017 02:06:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231212; cv=none; d=google.com; s=arc-20160816; b=s4mypU5d/mzaxjeJA0DPnVC7Bs4qeWs8NdUG04ZGSA1wXx/H3zdrAw2jcnZJDDLsdj vvNS1mUwUL06KTti1eFmWsOy22MTWH1Aj5/BbSIGztJqCDdTZthFtF8l7zIR+PPcdO8W pxBZGWvxMqLFyP0O9gAdOpxVB2Tx6NDHYT6DpEh81uwcA7IonBSIXdCHCL2WzlXNyTYh IV1WZgngmFFYx5sa6oJsD/CP9SctlHcqy7eoBAC8Nz3Coo3ciBxomr56cQi7+g2JoeFp fyJclklYDrUwXnWP0KfWUXd4z0xRudQANEzGMhRvQLwg9qnJtutOmT9L+S+3uo0bn/JV AkNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=E13WNDZNwu1+dWLCsI4sEear8CloBfb2ML2Yhfm2DYk=; b=KFv3UIFZUwPZuPOQbqQpyKAKEk49NLgUKiIFMCYd0ClPeS6DRh0HymYEn5q/OzEA0j fBmwrl6CTjfw35mfAsXPVwCbk4QxmQXOMUT7Ib3LvVoJauZeWIKxLAt0bFMVXtQptSdJ s2jMiIasink9N/B6PENEP+fT9a+FkwhKKahDDi/FhgJQoZ9lBq5h7/tAEAsWk15idjTR ThNHohyNo3SSr4G+tWBgKGBCQyCa/8Vphi7KwkiCPJoyrXX8ycNS8TBn43LXgYqYEA3c rZnM48wXWLCUBAwhGgF80H20WdprNgu3ork+aAeHedTekoqQHle9rmcyxkn3kKC1HwbR H2AA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id z3si5800272pln.49.2017.10.17.02.06.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:06:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 992D76E612; Tue, 17 Oct 2017 09:06:45 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 93A396E60D for ; Tue, 17 Oct 2017 09:06:43 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 0A0BF208A1; Tue, 17 Oct 2017 11:06:42 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id D2EAA2089B; Tue, 17 Oct 2017 11:06:41 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 11/23] drm/sun4i: Rename layers to UI planes Date: Tue, 17 Oct 2017 11:06:18 +0200 Message-Id: X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The currently supported planes for DE2 are actually only UI planes, and the VI planes will differ both in terms of code and features. It will make sense to support them in a separate file, so let's make sure we don't create a confusing file name. Signed-off-by: Maxime Ripard Reviewed-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/Makefile | 2 +- drivers/gpu/drm/sun4i/sun8i_layer.c | 134 +----------------------------- drivers/gpu/drm/sun4i/sun8i_layer.h | 36 +-------- drivers/gpu/drm/sun4i/sun8i_mixer.c | 4 +- drivers/gpu/drm/sun4i/sun8i_ui.c | 134 +++++++++++++++++++++++++++++- drivers/gpu/drm/sun4i/sun8i_ui.h | 36 ++++++++- 6 files changed, 173 insertions(+), 173 deletions(-) delete mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.c delete mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.h create mode 100644 drivers/gpu/drm/sun4i/sun8i_ui.c create mode 100644 drivers/gpu/drm/sun4i/sun8i_ui.h diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile index af18b70ba5ed..cfba2c07519c 100644 --- a/drivers/gpu/drm/sun4i/Makefile +++ b/drivers/gpu/drm/sun4i/Makefile @@ -13,7 +13,7 @@ sun4i-tcon-y += sun4i_rgb.o sun4i-tcon-y += sun4i_dotclock.o sun4i-tcon-y += sun4i_crtc.o -sun8i-mixer-y += sun8i_mixer.o sun8i_layer.o +sun8i-mixer-y += sun8i_mixer.o sun8i_ui.o obj-$(CONFIG_DRM_SUN4I) += sun4i-drm.o sun4i-tcon.o obj-$(CONFIG_DRM_SUN4I) += sun6i_drc.o diff --git a/drivers/gpu/drm/sun4i/sun8i_layer.c b/drivers/gpu/drm/sun4i/sun8i_layer.c deleted file mode 100644 index 23810ff72684..000000000000 --- a/drivers/gpu/drm/sun4i/sun8i_layer.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * Copyright (C) Icenowy Zheng - * - * Based on sun4i_layer.h, which is: - * Copyright (C) 2015 Free Electrons - * Copyright (C) 2015 NextThing Co - * - * Maxime Ripard - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - */ - -#include -#include -#include - -#include "sun8i_layer.h" -#include "sun8i_mixer.h" - -struct sun8i_plane_desc { - enum drm_plane_type type; - const uint32_t *formats; - uint32_t nformats; -}; - -static void sun8i_mixer_layer_atomic_disable(struct drm_plane *plane, - struct drm_plane_state *old_state) -{ - struct sun8i_layer *layer = plane_to_sun8i_layer(plane); - struct sun8i_mixer *mixer = layer->mixer; - - sun8i_mixer_layer_enable(mixer, layer->id, false); -} - -static void sun8i_mixer_layer_atomic_update(struct drm_plane *plane, - struct drm_plane_state *old_state) -{ - struct sun8i_layer *layer = plane_to_sun8i_layer(plane); - struct sun8i_mixer *mixer = layer->mixer; - - sun8i_mixer_update_layer_coord(mixer, layer->id, plane); - sun8i_mixer_update_layer_formats(mixer, layer->id, plane); - sun8i_mixer_update_layer_buffer(mixer, layer->id, plane); - sun8i_mixer_layer_enable(mixer, layer->id, true); -} - -static struct drm_plane_helper_funcs sun8i_mixer_layer_helper_funcs = { - .atomic_disable = sun8i_mixer_layer_atomic_disable, - .atomic_update = sun8i_mixer_layer_atomic_update, -}; - -static const struct drm_plane_funcs sun8i_mixer_layer_funcs = { - .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, - .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, - .destroy = drm_plane_cleanup, - .disable_plane = drm_atomic_helper_disable_plane, - .reset = drm_atomic_helper_plane_reset, - .update_plane = drm_atomic_helper_update_plane, -}; - -static const uint32_t sun8i_mixer_layer_formats[] = { - DRM_FORMAT_RGB888, - DRM_FORMAT_ARGB8888, - DRM_FORMAT_XRGB8888, -}; - -static const struct sun8i_plane_desc sun8i_mixer_planes[] = { - { - .type = DRM_PLANE_TYPE_PRIMARY, - .formats = sun8i_mixer_layer_formats, - .nformats = ARRAY_SIZE(sun8i_mixer_layer_formats), - }, -}; - -static struct sun8i_layer *sun8i_layer_init_one(struct drm_device *drm, - struct sun8i_mixer *mixer, - const struct sun8i_plane_desc *plane) -{ - struct sun8i_layer *layer; - int ret; - - layer = devm_kzalloc(drm->dev, sizeof(*layer), GFP_KERNEL); - if (!layer) - return ERR_PTR(-ENOMEM); - - /* possible crtcs are set later */ - ret = drm_universal_plane_init(drm, &layer->plane, 0, - &sun8i_mixer_layer_funcs, - plane->formats, plane->nformats, - NULL, plane->type, NULL); - if (ret) { - dev_err(drm->dev, "Couldn't initialize layer\n"); - return ERR_PTR(ret); - } - - drm_plane_helper_add(&layer->plane, - &sun8i_mixer_layer_helper_funcs); - layer->mixer = mixer; - - return layer; -} - -struct drm_plane **sun8i_layers_init(struct drm_device *drm, - struct sunxi_engine *engine) -{ - struct drm_plane **planes; - struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); - int i; - - planes = devm_kcalloc(drm->dev, ARRAY_SIZE(sun8i_mixer_planes) + 1, - sizeof(*planes), GFP_KERNEL); - if (!planes) - return ERR_PTR(-ENOMEM); - - for (i = 0; i < ARRAY_SIZE(sun8i_mixer_planes); i++) { - const struct sun8i_plane_desc *plane = &sun8i_mixer_planes[i]; - struct sun8i_layer *layer; - - layer = sun8i_layer_init_one(drm, mixer, plane); - if (IS_ERR(layer)) { - dev_err(drm->dev, "Couldn't initialize %s plane\n", - i ? "overlay" : "primary"); - return ERR_CAST(layer); - }; - - layer->id = i; - planes[i] = &layer->plane; - }; - - return planes; -} diff --git a/drivers/gpu/drm/sun4i/sun8i_layer.h b/drivers/gpu/drm/sun4i/sun8i_layer.h deleted file mode 100644 index e5eccd27cff0..000000000000 --- a/drivers/gpu/drm/sun4i/sun8i_layer.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (C) Icenowy Zheng - * - * Based on sun4i_layer.h, which is: - * Copyright (C) 2015 Free Electrons - * Copyright (C) 2015 NextThing Co - * - * Maxime Ripard - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - */ - -#ifndef _SUN8I_LAYER_H_ -#define _SUN8I_LAYER_H_ - -struct sunxi_engine; - -struct sun8i_layer { - struct drm_plane plane; - struct sun4i_drv *drv; - struct sun8i_mixer *mixer; - int id; -}; - -static inline struct sun8i_layer * -plane_to_sun8i_layer(struct drm_plane *plane) -{ - return container_of(plane, struct sun8i_layer, plane); -} - -struct drm_plane **sun8i_layers_init(struct drm_device *drm, - struct sunxi_engine *engine); -#endif /* _SUN8I_LAYER_H_ */ diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index cb193c5f1686..1955b2a36ac5 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -26,7 +26,7 @@ #include "sun4i_drv.h" #include "sun8i_mixer.h" -#include "sun8i_layer.h" +#include "sun8i_ui.h" #include "sunxi_engine.h" static void sun8i_mixer_commit(struct sunxi_engine *engine) @@ -228,7 +228,7 @@ int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer, static const struct sunxi_engine_ops sun8i_engine_ops = { .commit = sun8i_mixer_commit, - .layers_init = sun8i_layers_init, + .layers_init = sun8i_ui_init, }; static struct regmap_config sun8i_mixer_regmap_config = { diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.c b/drivers/gpu/drm/sun4i/sun8i_ui.c new file mode 100644 index 000000000000..077099ef565a --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun8i_ui.c @@ -0,0 +1,134 @@ +/* + * Copyright (C) Icenowy Zheng + * + * Based on sun4i_layer.h, which is: + * Copyright (C) 2015 Free Electrons + * Copyright (C) 2015 NextThing Co + * + * Maxime Ripard + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include +#include +#include + +#include "sun8i_ui.h" +#include "sun8i_mixer.h" + +struct sun8i_plane_desc { + enum drm_plane_type type; + const uint32_t *formats; + uint32_t nformats; +}; + +static void sun8i_mixer_ui_atomic_disable(struct drm_plane *plane, + struct drm_plane_state *old_state) +{ + struct sun8i_ui *ui = plane_to_sun8i_ui(plane); + struct sun8i_mixer *mixer = ui->mixer; + + sun8i_mixer_layer_enable(mixer, ui->id, false); +} + +static void sun8i_mixer_ui_atomic_update(struct drm_plane *plane, + struct drm_plane_state *old_state) +{ + struct sun8i_ui *ui = plane_to_sun8i_ui(plane); + struct sun8i_mixer *mixer = ui->mixer; + + sun8i_mixer_update_layer_coord(mixer, ui->id, plane); + sun8i_mixer_update_layer_formats(mixer, ui->id, plane); + sun8i_mixer_update_layer_buffer(mixer, ui->id, plane); + sun8i_mixer_layer_enable(mixer, ui->id, true); +} + +static struct drm_plane_helper_funcs sun8i_mixer_ui_helper_funcs = { + .atomic_disable = sun8i_mixer_ui_atomic_disable, + .atomic_update = sun8i_mixer_ui_atomic_update, +}; + +static const struct drm_plane_funcs sun8i_mixer_ui_funcs = { + .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, + .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, + .destroy = drm_plane_cleanup, + .disable_plane = drm_atomic_helper_disable_plane, + .reset = drm_atomic_helper_plane_reset, + .update_plane = drm_atomic_helper_update_plane, +}; + +static const uint32_t sun8i_mixer_ui_formats[] = { + DRM_FORMAT_RGB888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XRGB8888, +}; + +static const struct sun8i_plane_desc sun8i_mixer_planes[] = { + { + .type = DRM_PLANE_TYPE_PRIMARY, + .formats = sun8i_mixer_ui_formats, + .nformats = ARRAY_SIZE(sun8i_mixer_ui_formats), + }, +}; + +static struct sun8i_ui *sun8i_ui_init_one(struct drm_device *drm, + struct sun8i_mixer *mixer, + const struct sun8i_plane_desc *plane) +{ + struct sun8i_ui *ui; + int ret; + + ui = devm_kzalloc(drm->dev, sizeof(*ui), GFP_KERNEL); + if (!ui) + return ERR_PTR(-ENOMEM); + + /* possible crtcs are set later */ + ret = drm_universal_plane_init(drm, &ui->plane, 0, + &sun8i_mixer_ui_funcs, + plane->formats, plane->nformats, + NULL, plane->type, NULL); + if (ret) { + dev_err(drm->dev, "Couldn't initialize ui\n"); + return ERR_PTR(ret); + } + + drm_plane_helper_add(&ui->plane, + &sun8i_mixer_ui_helper_funcs); + ui->mixer = mixer; + + return ui; +} + +struct drm_plane **sun8i_ui_init(struct drm_device *drm, + struct sunxi_engine *engine) +{ + struct drm_plane **planes; + struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); + int i; + + planes = devm_kcalloc(drm->dev, ARRAY_SIZE(sun8i_mixer_planes) + 1, + sizeof(*planes), GFP_KERNEL); + if (!planes) + return ERR_PTR(-ENOMEM); + + for (i = 0; i < ARRAY_SIZE(sun8i_mixer_planes); i++) { + const struct sun8i_plane_desc *plane = &sun8i_mixer_planes[i]; + struct sun8i_ui *ui; + + ui = sun8i_ui_init_one(drm, mixer, plane); + if (IS_ERR(ui)) { + dev_err(drm->dev, "Couldn't initialize %s plane\n", + i ? "overlay" : "primary"); + return ERR_CAST(ui); + }; + + ui->id = i; + planes[i] = &ui->plane; + }; + + return planes; +} diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.h b/drivers/gpu/drm/sun4i/sun8i_ui.h new file mode 100644 index 000000000000..17dfc92ccc9f --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun8i_ui.h @@ -0,0 +1,36 @@ +/* + * Copyright (C) Icenowy Zheng + * + * Based on sun4i_layer.h, which is: + * Copyright (C) 2015 Free Electrons + * Copyright (C) 2015 NextThing Co + * + * Maxime Ripard + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#ifndef _SUN8I_UI_H_ +#define _SUN8I_UI_H_ + +struct sunxi_engine; + +struct sun8i_ui { + struct drm_plane plane; + struct sun4i_drv *drv; + struct sun8i_mixer *mixer; + int id; +}; + +static inline struct sun8i_ui * +plane_to_sun8i_ui(struct drm_plane *plane) +{ + return container_of(plane, struct sun8i_ui, plane); +} + +struct drm_plane **sun8i_ui_init(struct drm_device *drm, + struct sunxi_engine *engine); +#endif /* _SUN8I_UI_H_ */ From patchwork Tue Oct 17 09:06:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116050 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4637944qgn; Tue, 17 Oct 2017 02:08:18 -0700 (PDT) X-Google-Smtp-Source: AOwi7QD7ypObfOkBeBZ/fS/TfXsMxsf+I2OdYiocfZ4f0mY+M63RTatk7sbykZREcMDQHanpM6eL X-Received: by 10.99.126.5 with SMTP id z5mr10232275pgc.371.1508231298367; Tue, 17 Oct 2017 02:08:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231298; cv=none; d=google.com; s=arc-20160816; b=Ul1VIwdZf0BaLEYu0ZNOpFbi0zXX2rvApL2ARyyu5hP4pKFbGgI7wXaW8rNLbEN/or g2YY6oKTpKJmQE4WSOUjiEWmicMWvappeUEZpIXj46c5QRmMskOoGQf7YhIsOE3RnfPx 66lbFZ7MQscq5dqXT9MJd68L+lV5Hao5sA/leP20MNKTSsWFs9BSUpSgm4OUnAYy+Nj8 nZjK7pByxc70LBSBFfh5xhbNWxkLwEPzgOZZ2CWV9BqNXFCJ0qaFUi4ikMLM1q8ANpD4 e8VxEMs5Nqc/BbSq8h9l3wzBU/WkpPmER1Ea3o27LRmToGswp05q3ofFU9Box4lWJhyf IIYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=a8BbaFoO8UkDmugpw/DQiJIJLlFo9nkpdF0/Qnmf0gA=; b=wRg73pMxYN5TIJ0ZjqGlkiMkRJloUy7QYhUCaI6V2DVa7TfEP+FtK+v47Epd1uMwMA aXqhOhggUg7JT2y7qzDZha4fFB7O/LyfJo4yEpF/VB8BCNkon1p5rK0gK04cjbwoy0ra eIk2BdZKfNC/7yZ6DODhWNx6yE1wfq1b59rRmFt5YrRlkgsG2YLqMNfR0R2uLlFx4IVj evGn6qajdI3OMC3gDkON3JUX7qMLhfanmsqRzJM+0u7dMpSkGWUB23TLEIfXxkQS3tT9 nSvLgAjlt2vujrQtWQCgyvVLmlnhI5zzjaOvtG+LYBteZKlcTNWtlyIyTiEJ6IjX5PKq DBUQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id m190si5243246pga.159.2017.10.17.02.08.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:08:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CABBA6E63B; Tue, 17 Oct 2017 09:06:59 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 056D86E5BF for ; Tue, 17 Oct 2017 09:06:44 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 70BE4208A5; Tue, 17 Oct 2017 11:06:42 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 3DFC8208A2; Tue, 17 Oct 2017 11:06:42 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 12/23] drm/sun4i: sun8i: properly support UI channels Date: Tue, 17 Oct 2017 11:06:19 +0200 Message-Id: <3db121f7e02ebcbdf666b08a8b641a480da73bbb.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The current code has the wrong macro to get the registers offsets of the UI-registers, with an off-by-0x1000 error. It works so far by accident, since the UI channel used everywhere else is the number of VI planes, which has always been 1 so far, and the offset between two UI channels is 0x1000. Let's correct that behaviour by setting the UI chan number in the sun8i_ui structure, and remove the hardcoded values pretty much everywhere. Once we have sane values, we can convert the macros to their actual definition. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 50 ++++++++++++------------------ drivers/gpu/drm/sun4i/sun8i_mixer.h | 32 ++++++++++--------- drivers/gpu/drm/sun4i/sun8i_ui.c | 12 ++++--- drivers/gpu/drm/sun4i/sun8i_ui.h | 1 +- 4 files changed, 46 insertions(+), 49 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 1955b2a36ac5..5afe8ef709a5 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -37,14 +37,12 @@ static void sun8i_mixer_commit(struct sunxi_engine *engine) SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); } -void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, - int layer, bool enable) +void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, struct sun8i_ui *ui, + bool enable) { u32 val; - /* Currently the first UI channel is used */ - int chan = mixer->cfg->vi_num; - DRM_DEBUG_DRIVER("Enabling layer %d in channel %d\n", layer, chan); + DRM_DEBUG_DRIVER("Enabling layer %d in channel %d\n", ui->id, ui->chan); if (enable) val = SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN; @@ -52,16 +50,16 @@ void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, val = 0; regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val); /* Set the alpha configuration */ regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_MASK, SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_DEF); regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MASK, SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_DEF); } @@ -90,14 +88,13 @@ static int sun8i_mixer_drm_format_to_layer(struct drm_plane *plane, } int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane) + struct sun8i_ui *ui) { + struct drm_plane *plane = &ui->plane; struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; - /* Currently the first UI channel is used */ - int chan = mixer->cfg->vi_num; - DRM_DEBUG_DRIVER("Updating layer %d\n", layer); + DRM_DEBUG_DRIVER("Updating layer %d\n", ui->id); if (plane->type == DRM_PLANE_TYPE_PRIMARY) { DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n", @@ -115,7 +112,7 @@ int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer, state->crtc_h)); DRM_DEBUG_DRIVER("Updating channel size\n"); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_OVL_SIZE(chan), + SUN8I_MIXER_CHAN_UI_OVL_SIZE(ui->chan), SUN8I_MIXER_SIZE(state->crtc_w, state->crtc_h)); } @@ -123,35 +120,34 @@ int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer, /* Set the line width */ DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_PITCH(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ui->chan, ui->id), fb->pitches[0]); /* Set height and width */ DRM_DEBUG_DRIVER("Layer size W: %u H: %u\n", state->crtc_w, state->crtc_h); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_SIZE(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ui->chan, ui->id), SUN8I_MIXER_SIZE(state->crtc_w, state->crtc_h)); /* Set base coordinates */ DRM_DEBUG_DRIVER("Layer coordinates X: %d Y: %d\n", state->crtc_x, state->crtc_y); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_COORD(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_COORD(ui->chan, ui->id), SUN8I_MIXER_COORD(state->crtc_x, state->crtc_y)); return 0; } int sun8i_mixer_update_layer_formats(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane) + struct sun8i_ui *ui) { + struct drm_plane *plane = &ui->plane; struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; bool interlaced = false; u32 val; - /* Currently the first UI channel is used */ - int chan = mixer->cfg->vi_num; int ret; if (plane->state->crtc) @@ -174,21 +170,20 @@ int sun8i_mixer_update_layer_formats(struct sun8i_mixer *mixer, } regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val); return 0; } int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane) + struct sun8i_ui *ui) { + struct drm_plane *plane = &ui->plane; struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; struct drm_gem_cma_object *gem; dma_addr_t paddr; - /* Currently the first UI channel is used */ - int chan = mixer->cfg->vi_num; int bpp; /* Get the physical address of the buffer in memory */ @@ -220,7 +215,7 @@ int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer, DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ui->chan, ui->id), lower_32_bits(paddr)); return 0; @@ -342,11 +337,8 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, SUN8I_MIXER_BLEND_ATTR_FCOLOR_DEF); /* Select the first UI channel */ - DRM_DEBUG_DRIVER("Selecting channel %d (first UI channel)\n", - mixer->cfg->vi_num); - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ROUTE, - mixer->cfg->vi_num); - + DRM_DEBUG_DRIVER("Selecting channel %d (first UI channel)\n", 1); + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ROUTE, 1); return 0; err_disable_bus_clk: diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 4785ac090b8c..20d2ee1c4187 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -61,22 +61,22 @@ */ #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x0) + (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x0) #define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x4) + (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x4) #define SUN8I_MIXER_CHAN_UI_LAYER_COORD(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x8) + (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x8) #define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0xc) + (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0xc) #define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x10) + (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x10) #define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x14) + (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x14) #define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x18) -#define SUN8I_MIXER_CHAN_UI_TOP_HADDR(ch) (0x2000 + 0x1000 * (ch) + 0x80) -#define SUN8I_MIXER_CHAN_UI_BOT_HADDR(ch) (0x2000 + 0x1000 * (ch) + 0x84) -#define SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch) (0x2000 + 0x1000 * (ch) + 0x88) + (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x18) +#define SUN8I_MIXER_CHAN_UI_TOP_HADDR(ch) (0x3000 + 0x1000 * (ch) + 0x80) +#define SUN8I_MIXER_CHAN_UI_BOT_HADDR(ch) (0x3000 + 0x1000 * (ch) + 0x84) +#define SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch) (0x3000 + 0x1000 * (ch) + 0x88) #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN BIT(0) #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_MASK GENMASK(2, 1) @@ -104,6 +104,8 @@ #define SUN8I_MIXER_FCC_EN 0xaa000 #define SUN8I_MIXER_DCSC_EN 0xb0000 +struct sun8i_ui; + struct sun8i_mixer_cfg { int vi_num; int ui_num; @@ -126,12 +128,12 @@ engine_to_sun8i_mixer(struct sunxi_engine *engine) return container_of(engine, struct sun8i_mixer, engine); } -void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, - int layer, bool enable); +void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, struct sun8i_ui *ui, + bool enable); int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane); + struct sun8i_ui *ui); int sun8i_mixer_update_layer_formats(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane); + struct sun8i_ui *ui); int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane); + struct sun8i_ui *ui); #endif /* _SUN8I_MIXER_H_ */ diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.c b/drivers/gpu/drm/sun4i/sun8i_ui.c index 077099ef565a..a056bb0c63c7 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui.c @@ -32,7 +32,7 @@ static void sun8i_mixer_ui_atomic_disable(struct drm_plane *plane, struct sun8i_ui *ui = plane_to_sun8i_ui(plane); struct sun8i_mixer *mixer = ui->mixer; - sun8i_mixer_layer_enable(mixer, ui->id, false); + sun8i_mixer_layer_enable(mixer, ui, false); } static void sun8i_mixer_ui_atomic_update(struct drm_plane *plane, @@ -41,10 +41,10 @@ static void sun8i_mixer_ui_atomic_update(struct drm_plane *plane, struct sun8i_ui *ui = plane_to_sun8i_ui(plane); struct sun8i_mixer *mixer = ui->mixer; - sun8i_mixer_update_layer_coord(mixer, ui->id, plane); - sun8i_mixer_update_layer_formats(mixer, ui->id, plane); - sun8i_mixer_update_layer_buffer(mixer, ui->id, plane); - sun8i_mixer_layer_enable(mixer, ui->id, true); + sun8i_mixer_update_layer_coord(mixer, ui); + sun8i_mixer_update_layer_formats(mixer, ui); + sun8i_mixer_update_layer_buffer(mixer, ui); + sun8i_mixer_layer_enable(mixer, ui, true); } static struct drm_plane_helper_funcs sun8i_mixer_ui_helper_funcs = { @@ -126,6 +126,8 @@ struct drm_plane **sun8i_ui_init(struct drm_device *drm, return ERR_CAST(ui); }; + /* TODO: Support several UI channels */ + ui->chan = 0; ui->id = i; planes[i] = &ui->plane; }; diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.h b/drivers/gpu/drm/sun4i/sun8i_ui.h index 17dfc92ccc9f..3c3185878ad1 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui.h +++ b/drivers/gpu/drm/sun4i/sun8i_ui.h @@ -22,6 +22,7 @@ struct sun8i_ui { struct drm_plane plane; struct sun4i_drv *drv; struct sun8i_mixer *mixer; + u8 chan; int id; }; From patchwork Tue Oct 17 09:06:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116052 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4638150qgn; Tue, 17 Oct 2017 02:08:29 -0700 (PDT) X-Google-Smtp-Source: AOwi7QBwHJ8pxF0dsUniX3w4h/TkWay3j+QktoBmnXXgiyKYMTuI7P4DHZpT26QCZXNTF0evAa+E X-Received: by 10.101.82.8 with SMTP id o8mr10255501pgp.261.1508231309777; Tue, 17 Oct 2017 02:08:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231309; cv=none; d=google.com; s=arc-20160816; b=cAa9/c7WwhsMCRqQKeRBU+3tmrpZRS6ed2B5JCOEZabFiS/GUcL4jYxUYAq58z5IL+ ilUo5v6jBwkbpurrnIHX95Z4w89IB910TA4bYLPulRH1K9dU0+odtg7JBUK/T7/ZP5Ig /E2P+OgTUh9ySYS/2x9yTTryPk/pnVZX0/Xme8MeENpkj03T/cuwvpeK90eHqjX3hcex pB3Yr4Vab/0khQ63Y+AWJfn43GK0iupY1srpz/RdurwQLApJkOttt6fKpWYv9Wsyj9AG xXBjIKwFaoJKt8ddpAbp4Dx0jEUI+GABgAO/mEjtalBtyDNQgA8D8hn6cJJrY9C34zXe gbKA== ARC-Message-Signature: i=1; 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[131.252.210.177]) by mx.google.com with ESMTPS id a2si5952057plt.419.2017.10.17.02.08.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:08:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8E7646E641; Tue, 17 Oct 2017 09:07:00 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 5C7E06E60D for ; Tue, 17 Oct 2017 09:06:44 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id C919D208A7; Tue, 17 Oct 2017 11:06:42 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id A0618208A4; Tue, 17 Oct 2017 11:06:42 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 13/23] drm/sun4i: Reorder and document DE2 mixer registers Date: Tue, 17 Oct 2017 11:06:20 +0200 Message-Id: <021d9256ec51cc6b2fbc4112652560fbd7faf517.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Some registers values have been hardcoded so far, or were not as descriptive as supposed to, because of missing information. The various BSP that poped up since have given us more details, some hopefully we can be more explicit about things. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 25 ++++---- drivers/gpu/drm/sun4i/sun8i_mixer.h | 89 ++++++++++++++++-------------- 2 files changed, 63 insertions(+), 51 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 5afe8ef709a5..86c6c24b5105 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -61,7 +61,7 @@ void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, struct sun8i_ui *ui, regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MASK, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_DEF); + SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA(255)); } static int sun8i_mixer_drm_format_to_layer(struct drm_plane *plane, @@ -322,19 +322,20 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, /* Initialize blender */ regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_FCOLOR_CTL, - SUN8I_MIXER_BLEND_FCOLOR_CTL_DEF); - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PREMULTIPLY, - SUN8I_MIXER_BLEND_PREMULTIPLY_DEF); + SUN8I_MIXER_BLEND_FCOLOR_CTL_FCOLOR_EN(0) | + SUN8I_MIXER_BLEND_FCOLOR_CTL_EN(0)); + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PREMULTIPLY, 0); regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR, - SUN8I_MIXER_BLEND_BKCOLOR_DEF); + SUN8I_MIXER_BLEND_BKCOLOR_ALPHA(255)); regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_MODE(0), - SUN8I_MIXER_BLEND_MODE_DEF); - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_CK_CTL, - SUN8I_MIXER_BLEND_CK_CTL_DEF); - - regmap_write(mixer->engine.regs, - SUN8I_MIXER_BLEND_ATTR_FCOLOR(0), - SUN8I_MIXER_BLEND_ATTR_FCOLOR_DEF); + SUN8I_MIXER_BLEND_MODE_PIXEL_FS(1) | + SUN8I_MIXER_BLEND_MODE_PIXEL_FD(3) | + SUN8I_MIXER_BLEND_MODE_ALPHA_FS(1) | + SUN8I_MIXER_BLEND_MODE_ALPHA_FD(3)); + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_CK_CTL, 0); + + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(0), + SUN8I_MIXER_BLEND_ATTR_FCOLOR_ALPHA(255)); /* Select the first UI channel */ DRM_DEBUG_DRIVER("Selecting channel %d (first UI channel)\n", 1); diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 20d2ee1c4187..22877a008e0d 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -22,71 +22,82 @@ #define SUN8I_MIXER_COORD(x, y) ((y) << 16 | (x)) #define SUN8I_MIXER_GLOBAL_CTL 0x0 +#define SUN8I_MIXER_GLOBAL_CTL_RT_EN BIT(0) + #define SUN8I_MIXER_GLOBAL_STATUS 0x4 #define SUN8I_MIXER_GLOBAL_DBUFF 0x8 -#define SUN8I_MIXER_GLOBAL_SIZE 0xc - -#define SUN8I_MIXER_GLOBAL_CTL_RT_EN 0x1 +#define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE BIT(0) -#define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE 0x1 +#define SUN8I_MIXER_GLOBAL_SIZE 0xc #define SUN8I_MIXER_BLEND_FCOLOR_CTL 0x1000 +#define SUN8I_MIXER_BLEND_FCOLOR_CTL_EN(x) BIT(8 + (x)) +#define SUN8I_MIXER_BLEND_FCOLOR_CTL_FCOLOR_EN(x) BIT(x) + #define SUN8I_MIXER_BLEND_ATTR_FCOLOR(x) (0x1004 + 0x10 * (x) + 0x0) +#define SUN8I_MIXER_BLEND_ATTR_FCOLOR_ALPHA(x) (((x) & 0xff) << 24) + #define SUN8I_MIXER_BLEND_ATTR_INSIZE(x) (0x1004 + 0x10 * (x) + 0x4) + #define SUN8I_MIXER_BLEND_ATTR_OFFSET(x) (0x1004 + 0x10 * (x) + 0x8) #define SUN8I_MIXER_BLEND_ROUTE 0x1080 #define SUN8I_MIXER_BLEND_PREMULTIPLY 0x1084 + #define SUN8I_MIXER_BLEND_BKCOLOR 0x1088 +#define SUN8I_MIXER_BLEND_BKCOLOR_ALPHA(x) (((x) & 0xff) << 24) + #define SUN8I_MIXER_BLEND_OUTSIZE 0x108c + #define SUN8I_MIXER_BLEND_MODE(x) (0x1090 + 0x04 * (x)) +#define SUN8I_MIXER_BLEND_MODE_ALPHA_FD(x) (((x) & 0xf) << 24) +#define SUN8I_MIXER_BLEND_MODE_ALPHA_FS(x) (((x) & 0xf) << 16) +#define SUN8I_MIXER_BLEND_MODE_PIXEL_FD(x) (((x) & 0xf) << 8) +#define SUN8I_MIXER_BLEND_MODE_PIXEL_FS(x) ((x) & 0xf) + #define SUN8I_MIXER_BLEND_CK_CTL 0x10b0 #define SUN8I_MIXER_BLEND_CK_CFG 0x10b4 #define SUN8I_MIXER_BLEND_CK_MAX(x) (0x10c0 + 0x04 * (x)) #define SUN8I_MIXER_BLEND_CK_MIN(x) (0x10e0 + 0x04 * (x)) -#define SUN8I_MIXER_BLEND_OUTCTL 0x10fc - -/* The following numbers are some still unknown magic numbers */ -#define SUN8I_MIXER_BLEND_ATTR_FCOLOR_DEF 0xff000000 -#define SUN8I_MIXER_BLEND_FCOLOR_CTL_DEF 0x00000101 -#define SUN8I_MIXER_BLEND_PREMULTIPLY_DEF 0x0 -#define SUN8I_MIXER_BLEND_BKCOLOR_DEF 0xff000000 -#define SUN8I_MIXER_BLEND_MODE_DEF 0x03010301 -#define SUN8I_MIXER_BLEND_CK_CTL_DEF 0x0 -#define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED BIT(1) +#define SUN8I_MIXER_BLEND_OUTCTL 0x10fc +#define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED BIT(1) /* * VI channels are not used now, but the support of them may be introduced in * the future. */ -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch, layer) \ - (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x0) -#define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch, layer) \ - (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x4) -#define SUN8I_MIXER_CHAN_UI_LAYER_COORD(ch, layer) \ - (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x8) -#define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch, layer) \ - (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0xc) -#define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch, layer) \ - (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x10) -#define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(ch, layer) \ - (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x14) -#define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(ch, layer) \ - (0x3000 + 0x1000 * (ch) + 0x20 * (layer) + 0x18) -#define SUN8I_MIXER_CHAN_UI_TOP_HADDR(ch) (0x3000 + 0x1000 * (ch) + 0x80) -#define SUN8I_MIXER_CHAN_UI_BOT_HADDR(ch) (0x3000 + 0x1000 * (ch) + 0x84) -#define SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch) (0x3000 + 0x1000 * (ch) + 0x88) +#define SUN8I_MIXER_CHAN(ch) (0x3000 + 0x1000 * (ch)) +#define SUN8I_MIXER_UI_LAYER(ch, layer) (SUN8I_MIXER_CHAN(ch) + 0x20 * (layer)) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN BIT(0) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_MASK GENMASK(2, 1) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK GENMASK(11, 8) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x00) #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MASK GENMASK(31, 24) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_DEF (1 << 1) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_ARGB8888 (0 << 8) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_XRGB8888 (4 << 8) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_RGB888 (8 << 8) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_DEF (0xff << 24) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA(x) (0xff << 24) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK GENMASK(11, 8) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_RGB888 (8 << 8) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_XRGB8888 (4 << 8) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_ARGB8888 (0 << 8) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_MASK GENMASK(2, 1) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_DEF (1 << 1) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN BIT(0) + +#define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x04) +#define SUN8I_MIXER_CHAN_UI_LAYER_COORD(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x08) +#define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x0c) +#define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x10) +#define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x14) +#define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x18) + +#define SUN8I_MIXER_CHAN_UI_TOP_HADDR(ch) (SUN8I_MIXER_CHAN(ch) + 0x80) +#define SUN8I_MIXER_CHAN_UI_BOT_HADDR(ch) (SUN8I_MIXER_CHAN(ch) + 0x84) +#define SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch) (SUN8I_MIXER_CHAN(ch) + 0x88) /* * These sub-engines are still unknown now, the EN registers are here only to From patchwork Tue Oct 17 09:06:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116041 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4637282qgn; Tue, 17 Oct 2017 02:07:34 -0700 (PDT) X-Google-Smtp-Source: AOwi7QC8eDCcZgiKn3od4j+LtL4/neutRscutmHM8+Wk20SfecwoHzRzrPvUA4Zx9Fz/7qTCSLkg X-Received: by 10.99.119.79 with SMTP id s76mr10361755pgc.3.1508231254717; Tue, 17 Oct 2017 02:07:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231254; cv=none; d=google.com; s=arc-20160816; b=RypY5rzyVJxaTagz0sH1hx29pRi9trbAX0VgYt7uVgUKUlL/NkhoiLak/+CUtIaHC2 1VA41IPwwHPMA/1DmhB6VEmwuO+kgb9u37yFn4S23ZU8P4Pof8IHjkr/wItgJ87zumKn wGOcXNhUvjBuhZYmfhD1GB9gJPq0yLbYVUtaYohlgpwxDydYEizxLyAW9yDlb3c5TEtv fjv1alBK7T2ITRtddDwAw7NQWea+B0iKBZ9D0vi9McTUTrIdRIkwmvscsjueg5OL9x9I F5nZyuYyHitSPI6pdexOZWKTzVvhbbZ5Qxm9w0GJPnakymxBUyexiRSkbjiCRtDOYuTT diNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=qg2QOT7czabv56oDW1htmB6j5CNSbp+TMEnaW3iQrFo=; b=UzAm0Gp4ZJ5OkhTnaNzZlFP2PW8FODrGE9tdPWzl89rrjEEH95RzVRp4I3KDenAQ4K ww/pJ27BtRGifiw+aI2Mj4t2nuoPm73UczzZTd/pzv9g9WGhJbSbp8ZbevrDJvQN3aIt N3QA9bs16Yt2ONCaM4FrqPcI59oVNzTTK5IhfT0rEM9UeuJJjVLQw6/4zp7nhDVDpFLd O1pru4tRZqIm6/Thvu7VN9+KcShfWU5wsJDGO7RsM9e4mORtvrMDfNPHTs4PT8UIS1iJ 6uQXBjKkZRtKhlIwQJdurOA7EukScgXW6h8lFr/OLpygsxMJFYi+AZDgGAgxSmHA6gAN XkUw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id h1si5883507pln.150.2017.10.17.02.07.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:07:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9FC7F6E617; Tue, 17 Oct 2017 09:06:46 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 4AB666E60E for ; Tue, 17 Oct 2017 09:06:45 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id B3BF0208B1; Tue, 17 Oct 2017 11:06:43 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 8390A208A8; Tue, 17 Oct 2017 11:06:43 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 15/23] drm/sun4i: Add LVDS support Date: Tue, 17 Oct 2017 11:06:22 +0200 Message-Id: <6e313d0b31dca3f47583668eb755d934a1ab515e.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The TCON supports the LVDS interface to output to a panel or a bridge. Let's add support for it. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/Makefile | 1 +- drivers/gpu/drm/sun4i/sun4i_lvds.c | 183 ++++++++++++++++++++++++++++- drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 +++- drivers/gpu/drm/sun4i/sun4i_tcon.c | 193 +++++++++++++++++++++++++++++- drivers/gpu/drm/sun4i/sun4i_tcon.h | 25 ++++- 5 files changed, 419 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile index cfba2c07519c..6fee15d016ef 100644 --- a/drivers/gpu/drm/sun4i/Makefile +++ b/drivers/gpu/drm/sun4i/Makefile @@ -10,6 +10,7 @@ sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o sun4i-tcon-y += sun4i_tcon.o sun4i-tcon-y += sun4i_rgb.o +sun4i-tcon-y += sun4i_lvds.o sun4i-tcon-y += sun4i_dotclock.o sun4i-tcon-y += sun4i_crtc.o diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.c b/drivers/gpu/drm/sun4i/sun4i_lvds.c new file mode 100644 index 000000000000..635a3f505ecb --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun4i_lvds.c @@ -0,0 +1,183 @@ +/* + * Copyright (C) 2015 NextThing Co + * Copyright (C) 2015-2017 Free Electrons + * + * Maxime Ripard + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include + +#include +#include +#include +#include +#include + +#include "sun4i_crtc.h" +#include "sun4i_tcon.h" +#include "sun4i_lvds.h" + +struct sun4i_lvds { + struct drm_connector connector; + struct drm_encoder encoder; + + struct sun4i_tcon *tcon; +}; + +static inline struct sun4i_lvds * +drm_connector_to_sun4i_lvds(struct drm_connector *connector) +{ + return container_of(connector, struct sun4i_lvds, + connector); +} + +static inline struct sun4i_lvds * +drm_encoder_to_sun4i_lvds(struct drm_encoder *encoder) +{ + return container_of(encoder, struct sun4i_lvds, + encoder); +} + +static int sun4i_lvds_get_modes(struct drm_connector *connector) +{ + struct sun4i_lvds *lvds = + drm_connector_to_sun4i_lvds(connector); + struct sun4i_tcon *tcon = lvds->tcon; + + return drm_panel_get_modes(tcon->panel); +} + +static struct drm_connector_helper_funcs sun4i_lvds_con_helper_funcs = { + .get_modes = sun4i_lvds_get_modes, +}; + +static void +sun4i_lvds_connector_destroy(struct drm_connector *connector) +{ + struct sun4i_lvds *lvds = drm_connector_to_sun4i_lvds(connector); + struct sun4i_tcon *tcon = lvds->tcon; + + drm_panel_detach(tcon->panel); + drm_connector_cleanup(connector); +} + +static const struct drm_connector_funcs sun4i_lvds_con_funcs = { + .fill_modes = drm_helper_probe_single_connector_modes, + .destroy = sun4i_lvds_connector_destroy, + .reset = drm_atomic_helper_connector_reset, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, +}; + +static void sun4i_lvds_encoder_enable(struct drm_encoder *encoder) +{ + struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder); + struct sun4i_tcon *tcon = lvds->tcon; + + DRM_DEBUG_DRIVER("Enabling LVDS output\n"); + + if (!IS_ERR(tcon->panel)) { + drm_panel_prepare(tcon->panel); + drm_panel_enable(tcon->panel); + } +} + +static void sun4i_lvds_encoder_disable(struct drm_encoder *encoder) +{ + struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder); + struct sun4i_tcon *tcon = lvds->tcon; + + DRM_DEBUG_DRIVER("Disabling LVDS output\n"); + + if (!IS_ERR(tcon->panel)) { + drm_panel_disable(tcon->panel); + drm_panel_unprepare(tcon->panel); + } +} + +static const struct drm_encoder_helper_funcs sun4i_lvds_enc_helper_funcs = { + .disable = sun4i_lvds_encoder_disable, + .enable = sun4i_lvds_encoder_enable, +}; + +static const struct drm_encoder_funcs sun4i_lvds_enc_funcs = { + .destroy = drm_encoder_cleanup, +}; + +int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon) +{ + struct drm_encoder *encoder; + struct drm_bridge *bridge; + struct sun4i_lvds *lvds; + int ret; + + lvds = devm_kzalloc(drm->dev, sizeof(*lvds), GFP_KERNEL); + if (!lvds) + return -ENOMEM; + lvds->tcon = tcon; + encoder = &lvds->encoder; + + ret = drm_of_find_panel_or_bridge(tcon->dev->of_node, 1, 0, + &tcon->panel, &bridge); + if (ret) { + dev_info(drm->dev, "No panel or bridge found... LVDS output disabled\n"); + return 0; + } + + drm_encoder_helper_add(&lvds->encoder, + &sun4i_lvds_enc_helper_funcs); + ret = drm_encoder_init(drm, + &lvds->encoder, + &sun4i_lvds_enc_funcs, + DRM_MODE_ENCODER_LVDS, + NULL); + if (ret) { + dev_err(drm->dev, "Couldn't initialise the lvds encoder\n"); + goto err_out; + } + + /* The LVDS encoder can only work with the TCON channel 0 */ + lvds->encoder.possible_crtcs = BIT(drm_crtc_index(&tcon->crtc->crtc)); + + if (tcon->panel) { + drm_connector_helper_add(&lvds->connector, + &sun4i_lvds_con_helper_funcs); + ret = drm_connector_init(drm, &lvds->connector, + &sun4i_lvds_con_funcs, + DRM_MODE_CONNECTOR_LVDS); + if (ret) { + dev_err(drm->dev, "Couldn't initialise the lvds connector\n"); + goto err_cleanup_connector; + } + + drm_mode_connector_attach_encoder(&lvds->connector, + &lvds->encoder); + + ret = drm_panel_attach(tcon->panel, &lvds->connector); + if (ret) { + dev_err(drm->dev, "Couldn't attach our panel\n"); + goto err_cleanup_connector; + } + } + + if (bridge) { + ret = drm_bridge_attach(encoder, bridge, NULL); + if (ret) { + dev_err(drm->dev, "Couldn't attach our bridge\n"); + goto err_cleanup_connector; + } + } + + return 0; + +err_cleanup_connector: + drm_encoder_cleanup(&lvds->encoder); +err_out: + return ret; +} +EXPORT_SYMBOL(sun4i_lvds_init); diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.h b/drivers/gpu/drm/sun4i/sun4i_lvds.h new file mode 100644 index 000000000000..1b8fad4b82c3 --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun4i_lvds.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2015 NextThing Co + * Copyright (C) 2015-2017 Free Electrons + * + * Maxime Ripard + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#ifndef _SUN4I_LVDS_H_ +#define _SUN4I_LVDS_H_ + +int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon); + +#endif /* _SUN4I_LVDS_H_ */ diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 3efa1ab045cd..6a20a467ee6d 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -31,10 +31,52 @@ #include "sun4i_crtc.h" #include "sun4i_dotclock.h" #include "sun4i_drv.h" +#include "sun4i_lvds.h" #include "sun4i_rgb.h" #include "sun4i_tcon.h" #include "sunxi_engine.h" +static struct drm_connector *sun4i_tcon_get_connector(const struct drm_encoder *encoder) +{ + struct drm_connector *connector; + struct drm_connector_list_iter iter; + + drm_connector_list_iter_begin(encoder->dev, &iter); + drm_for_each_connector_iter(connector, &iter) + if (connector->encoder == encoder) { + drm_connector_list_iter_end(&iter); + return connector; + } + drm_connector_list_iter_end(&iter); + + return NULL; +} + +static int sun4i_tcon_get_pixel_depth(const struct drm_encoder *encoder) +{ + struct drm_connector *connector; + struct drm_display_info *info; + + connector = sun4i_tcon_get_connector(encoder); + if (!connector) + return -EINVAL; + + info = &connector->display_info; + if (info->num_bus_formats != 1) + return -EINVAL; + + switch (info->bus_formats[0]) { + case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG: + return 18; + + case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA: + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG: + return 24; + } + + return -EINVAL; +} + static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel, bool enabled) { @@ -69,9 +111,13 @@ void sun4i_tcon_set_status(struct sun4i_tcon *tcon, const struct drm_encoder *encoder, bool enabled) { + bool is_lvds = false; int channel; switch (encoder->encoder_type) { + case DRM_MODE_ENCODER_LVDS: + is_lvds = true; + /* Fallthrough */ case DRM_MODE_ENCODER_NONE: channel = 0; break; @@ -84,10 +130,47 @@ void sun4i_tcon_set_status(struct sun4i_tcon *tcon, return; } + if (is_lvds && !enabled) + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, + SUN4I_TCON0_LVDS_IF_EN, 0); + regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG, SUN4I_TCON_GCTL_TCON_ENABLE, enabled ? SUN4I_TCON_GCTL_TCON_ENABLE : 0); + if (is_lvds && enabled) { + u8 val; + + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, + SUN4I_TCON0_LVDS_IF_EN, + SUN4I_TCON0_LVDS_IF_EN); + + regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN4I_TCON0_LVDS_ANA0_C(2) | + SUN4I_TCON0_LVDS_ANA0_V(3) | + SUN4I_TCON0_LVDS_ANA0_PD(2) | + SUN4I_TCON0_LVDS_ANA0_EN_LDO); + udelay(2); + + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN4I_TCON0_LVDS_ANA0_EN_MB, + SUN4I_TCON0_LVDS_ANA0_EN_MB); + udelay(2); + + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN4I_TCON0_LVDS_ANA0_EN_DRVC, + SUN4I_TCON0_LVDS_ANA0_EN_DRVC); + + if (sun4i_tcon_get_pixel_depth(encoder) == 18) + val = 7; + else + val = 0xf; + + regmap_write_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN4I_TCON0_LVDS_ANA0_EN_DRVD(0xf), + SUN4I_TCON0_LVDS_ANA0_EN_DRVD(val)); + } + sun4i_tcon_channel_set_status(tcon, channel, enabled); } @@ -170,6 +253,78 @@ static void sun4i_tcon0_mode_set_common(struct sun4i_tcon *tcon, SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay)); } +static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon, + const struct drm_encoder *encoder, + const struct drm_display_mode *mode) +{ + unsigned int bp; + u8 clk_delay; + u32 reg, val = 0; + + tcon->dclk_min_div = 7; + tcon->dclk_max_div = 7; + sun4i_tcon0_mode_set_common(tcon, mode); + + /* Adjust clock delay */ + clk_delay = sun4i_tcon_get_clk_delay(mode, 0); + regmap_update_bits(tcon->regs, SUN4I_TCON0_CTL_REG, + SUN4I_TCON0_CTL_CLK_DELAY_MASK, + SUN4I_TCON0_CTL_CLK_DELAY(clk_delay)); + + /* + * This is called a backporch in the register documentation, + * but it really is the back porch + hsync + */ + bp = mode->crtc_htotal - mode->crtc_hsync_start; + DRM_DEBUG_DRIVER("Setting horizontal total %d, backporch %d\n", + mode->crtc_htotal, bp); + + /* Set horizontal display timings */ + regmap_write(tcon->regs, SUN4I_TCON0_BASIC1_REG, + SUN4I_TCON0_BASIC1_H_TOTAL(0x554) | + SUN4I_TCON0_BASIC1_H_BACKPORCH(0xa0)); + + /* + * This is called a backporch in the register documentation, + * but it really is the back porch + hsync + */ + bp = mode->crtc_vtotal - mode->crtc_vsync_start; + DRM_DEBUG_DRIVER("Setting vertical total %d, backporch %d\n", + mode->crtc_vtotal, bp); + + /* Set vertical display timings */ + regmap_write(tcon->regs, SUN4I_TCON0_BASIC2_REG, + SUN4I_TCON0_BASIC2_V_TOTAL(mode->crtc_vtotal * 2) | + SUN4I_TCON0_BASIC2_V_BACKPORCH(0x17)); + + reg = SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 | + SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL | + SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL; + if (sun4i_tcon_get_pixel_depth(encoder) == 24) + reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS; + else + reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS; + + regmap_write(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, reg); + + /* Setup the polarity of the various signals */ + if (!(mode->flags & DRM_MODE_FLAG_PHSYNC)) + val |= SUN4I_TCON0_IO_POL_HSYNC_POSITIVE; + + if (!(mode->flags & DRM_MODE_FLAG_PVSYNC)) + val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE; + + regmap_write(tcon->regs, SUN4I_TCON0_IO_POL_REG, 0); + + /* Map output pins to channel 0 */ + regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG, + SUN4I_TCON_GCTL_IOMAP_MASK, + SUN4I_TCON_GCTL_IOMAP_TCON0); + + /* Enable the output on the pins */ + regmap_write(tcon->regs, SUN4I_TCON0_IO_TRI_REG, 0xe0000000); +} + static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, const struct drm_display_mode *mode) { @@ -336,6 +491,9 @@ void sun4i_tcon_mode_set(struct sun4i_tcon *tcon, const struct drm_display_mode *mode) { switch (encoder->encoder_type) { + case DRM_MODE_ENCODER_LVDS: + sun4i_tcon0_mode_set_lvds(tcon, encoder, mode); + break; case DRM_MODE_ENCODER_NONE: sun4i_tcon0_mode_set_rgb(tcon, mode); sun4i_tcon_set_mux(tcon, 0, encoder); @@ -667,7 +825,9 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, struct drm_device *drm = data; struct sun4i_drv *drv = drm->dev_private; struct sunxi_engine *engine; + struct device_node *remote; struct sun4i_tcon *tcon; + bool has_lvds; int ret; engine = sun4i_tcon_find_engine(drv, dev->of_node); @@ -698,6 +858,26 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, return ret; } + /* + * This can only be made optional since we've had DT nodes + * without the LVDS reset properties. + * + * If the property is missing, just disable LVDS, and print a + * warning. + */ + tcon->lvds_rst = devm_reset_control_get_optional(dev, "lvds"); + if (IS_ERR(tcon->lvds_rst)) { + dev_err(dev, "Couldn't get our reset line\n"); + return PTR_ERR(tcon->lvds_rst); + } else if (tcon->lvds_rst) { + has_lvds = true; + reset_control_reset(tcon->lvds_rst); + } else { + has_lvds = false; + dev_warn(dev, + "Missing LVDS reset property, you should consider upgrading your DT\n"); + } + ret = sun4i_tcon_init_clocks(dev, tcon); if (ret) { dev_err(dev, "Couldn't init our TCON clocks\n"); @@ -729,7 +909,18 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, goto err_free_clocks; } - ret = sun4i_rgb_init(drm, tcon); + /* + * If we have an LVDS panel connected to the TCON, we should + * just probe the LVDS connector. Otherwise, just probe RGB as + * we used to. + */ + remote = of_graph_get_remote_node(dev->of_node, 1, 0); + if (has_lvds && of_device_is_compatible(remote, "panel-lvds")) + ret = sun4i_lvds_init(drm, tcon); + else + ret = sun4i_rgb_init(drm, tcon); + of_node_put(remote); + if (ret < 0) goto err_free_clocks; diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index 4141fbd97ddf..382689e5396e 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -70,7 +70,21 @@ #define SUN4I_TCON0_TTL2_REG 0x78 #define SUN4I_TCON0_TTL3_REG 0x7c #define SUN4I_TCON0_TTL4_REG 0x80 + #define SUN4I_TCON0_LVDS_IF_REG 0x84 +#define SUN4I_TCON0_LVDS_IF_EN BIT(31) +#define SUN4I_TCON0_LVDS_IF_BITWIDTH_MASK BIT(26) +#define SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS (1 << 26) +#define SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS (0 << 26) +#define SUN4I_TCON0_LVDS_IF_CLK_SEL_MASK BIT(20) +#define SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 (1 << 20) +#define SUN4I_TCON0_LVDS_IF_CLK_POL_MASK BIT(4) +#define SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL (1 << 4) +#define SUN4I_TCON0_LVDS_IF_CLK_POL_INV (0 << 4) +#define SUN4I_TCON0_LVDS_IF_DATA_POL_MASK GENMASK(3, 0) +#define SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL (0xf) +#define SUN4I_TCON0_LVDS_IF_DATA_POL_INV (0) + #define SUN4I_TCON0_IO_POL_REG 0x88 #define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase) ((phase & 3) << 28) #define SUN4I_TCON0_IO_POL_HSYNC_POSITIVE BIT(25) @@ -131,6 +145,16 @@ #define SUN4I_TCON_CEU_RANGE_G_REG 0x144 #define SUN4I_TCON_CEU_RANGE_B_REG 0x148 #define SUN4I_TCON_MUX_CTRL_REG 0x200 + +#define SUN4I_TCON0_LVDS_ANA0_REG 0x220 +#define SUN4I_TCON0_LVDS_ANA0_EN_MB BIT(31) +#define SUN4I_TCON0_LVDS_ANA0_EN_LDO BIT(30) +#define SUN4I_TCON0_LVDS_ANA0_EN_DRVC BIT(24) +#define SUN4I_TCON0_LVDS_ANA0_EN_DRVD(x) (((x) & 0xf) << 20) +#define SUN4I_TCON0_LVDS_ANA0_C(x) (((x) & 3) << 17) +#define SUN4I_TCON0_LVDS_ANA0_V(x) (((x) & 3) << 8) +#define SUN4I_TCON0_LVDS_ANA0_PD(x) (((x) & 3) << 4) + #define SUN4I_TCON1_FILL_CTL_REG 0x300 #define SUN4I_TCON1_FILL_BEG0_REG 0x304 #define SUN4I_TCON1_FILL_END0_REG 0x308 @@ -174,6 +198,7 @@ struct sun4i_tcon { /* Reset control */ struct reset_control *lcd_rst; + struct reset_control *lvds_rst; struct drm_panel *panel; From patchwork Tue Oct 17 09:06:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116055 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4638660qgn; Tue, 17 Oct 2017 02:09:04 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAAXFtV6d55B/L+/iZxgHb3+/gpx8McT3apT0y+bs0zQmxT84irPDZpdxQ3Bgl72FZxO7FO X-Received: by 10.98.69.134 with SMTP id n6mr11407336pfi.245.1508231344742; Tue, 17 Oct 2017 02:09:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231344; cv=none; d=google.com; s=arc-20160816; b=A0q6gBIj6qDaqfOPL1cHog6rvBYhZJclniAvxHMvBpEvOpwVG+jKjN49wYq4Rh9f9J jWUSkHpJXImMw1U0LQu+lzfJHXv3pHwlAGlYeWyJ3bpPbWaTztAdKgyt1/VFWmEwcpTU J6BXId1cGlXwl4oxyTtSv89dhWQEIxC+LXdbdw4DDYNbehGRLGiEoGXKI8VUglqvh3X9 v4wIZaBiOpKAcbVK8lptIA9jPZML9205+vtX1YFxRQj7ryXuXCzGFfU6d1lTb8N615g9 Scok6wnug0hgwoDguEeulQh3mbvy5Y8FbThbzwd4p4u67e+K+97g6grVPOGvJ9QZDc9X RW5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=r/tQ31x3IFR/bvl81v4y/BowXhARc65OkAyNAmEiYfQ=; b=ZZgRBcD6RJS2Diwicnmsgi25mOqmztYWe/8x53RZjI8szKFQbkH1vWq9xMsoTxh98u 7oScEB9BQeCrHSrreJRLo58UBGfk++psH5E18jXLF0RHNZnCnnAa0q0CaKvckaKH9ns4 5y1kLN0Up9WEKIb/yCyf/oa3iPV3K7IyHcOAXWg7PrcMU2CtxMRzv+DIJFhcYEgBrVZc KuGFTQTcWqcS3LURPoLVvu5Pq4CroDT030gctoPbUsOa5Tm/52BEGSBN3s2T6eIw/E/u NqPlwnW0dgdfH1uAS1M/A5LS8+axzUq0e/v0pcf/tkHAybU40Wod0pB4lhZ7Ee0uVy2M gMwA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id k9si5237788pgn.175.2017.10.17.02.09.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:09:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D2B836E5EC; Tue, 17 Oct 2017 09:07:04 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 9E7AA6E613 for ; Tue, 17 Oct 2017 09:06:45 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 110F6208B2; Tue, 17 Oct 2017 11:06:44 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id E245F20899; Tue, 17 Oct 2017 11:06:43 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 16/23] drm/sun4i: Add A83T support Date: Tue, 17 Oct 2017 11:06:23 +0200 Message-Id: X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add support for the A83T display pipeline. Signed-off-by: Maxime Ripard Reviewed-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++ drivers/gpu/drm/sun4i/sun4i_drv.c | 2 ++ drivers/gpu/drm/sun4i/sun4i_tcon.c | 1 + drivers/gpu/drm/sun4i/sun8i_mixer.c | 4 ++++ 4 files changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 46df3b78ae9e..c0fa233ec1fc 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -90,6 +90,7 @@ Required properties: * allwinner,sun6i-a31-tcon * allwinner,sun6i-a31s-tcon * allwinner,sun8i-a33-tcon + * allwinner,sun8i-a83t-tcon * allwinner,sun8i-v3s-tcon - reg: base address and size of memory-mapped region - interrupts: interrupt associated to this IP @@ -209,6 +210,7 @@ supported. Required properties: - compatible: value must be one of: + * allwinner,sun8i-a83t-de2-mixer * allwinner,sun8i-v3s-de2-mixer - reg: base address and size of the memory-mapped region. - clocks: phandles to the clocks feeding the mixer @@ -236,6 +238,7 @@ Required properties: * allwinner,sun6i-a31-display-engine * allwinner,sun6i-a31s-display-engine * allwinner,sun8i-a33-display-engine + * allwinner,sun8i-a83t-display-engine * allwinner,sun8i-v3s-display-engine - allwinner,pipelines: list of phandle to the display engine diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index a27efad9bc76..439f116bb3b5 100644 --- a/drivers/gpu/drm/sun4i/sun4i_drv.c +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c @@ -189,6 +189,7 @@ static bool sun4i_drv_node_is_tcon(struct device_node *node) of_device_is_compatible(node, "allwinner,sun6i-a31-tcon") || of_device_is_compatible(node, "allwinner,sun6i-a31s-tcon") || of_device_is_compatible(node, "allwinner,sun8i-a33-tcon") || + of_device_is_compatible(node, "allwinner,sun8i-a83t-tcon") || of_device_is_compatible(node, "allwinner,sun8i-v3s-tcon"); } @@ -347,6 +348,7 @@ static const struct of_device_id sun4i_drv_of_table[] = { { .compatible = "allwinner,sun6i-a31-display-engine" }, { .compatible = "allwinner,sun6i-a31s-display-engine" }, { .compatible = "allwinner,sun8i-a33-display-engine" }, + { .compatible = "allwinner,sun8i-a83t-display-engine" }, { .compatible = "allwinner,sun8i-v3s-display-engine" }, { } }; diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 6a20a467ee6d..eb3c8bad4977 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -1063,6 +1063,7 @@ static const struct of_device_id sun4i_tcon_of_table[] = { { .compatible = "allwinner,sun6i-a31-tcon", .data = &sun6i_a31_quirks }, { .compatible = "allwinner,sun6i-a31s-tcon", .data = &sun6i_a31s_quirks }, { .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks }, + { .compatible = "allwinner,sun8i-a83t-tcon", .data = &sun8i_v3s_quirks }, { .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks }, { } }; diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 86c6c24b5105..c6030ce130d3 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -385,6 +385,10 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { static const struct of_device_id sun8i_mixer_of_table[] = { { + .compatible = "allwinner,sun8i-a83t-de2-mixer", + .data = &sun8i_v3s_mixer_cfg, + }, + { .compatible = "allwinner,sun8i-v3s-de2-mixer", .data = &sun8i_v3s_mixer_cfg, }, From patchwork Tue Oct 17 09:06:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116040 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4637073qgn; Tue, 17 Oct 2017 02:07:21 -0700 (PDT) X-Google-Smtp-Source: AOwi7QCHsA7KjWN2XBtMTt7Y6Er/OQWss2vLegdOaAbNe94I8AxTS/sJ7ZQKRjhsSXAb4QcRAIp2 X-Received: by 10.99.114.19 with SMTP id n19mr10320804pgc.356.1508231241877; Tue, 17 Oct 2017 02:07:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231241; cv=none; d=google.com; s=arc-20160816; b=szAfk9PKudSiVNe1QDqY0dKqq2ldVrU8w0B79i6nSnH93Ni+44yxdgv6No77Rsxnsg UinzAfKaeWGyyJmsMl5mmPLUYo+fFAKLq+qSToqZM1so1dubs7piHcDJ2KKerh62bo9e 7q3Ppkn+grIVO6GvahA2oA2R9pA/ojjhlOx7mWdUNJT3Mn3SjNQ6Fnv8tumV6BA+f6BP 4hYVTyaYQpUZBBITImYdATKiWgfnt6uCaNNRl8eXcD7Ei2V8/bB8JjDjbkO8O/d6wD3A C2K2MCENLpcMhGVTkcAO9CjcuO5Yl8IMHHKldwLP+J4vE+dUvNw5ZVOOUqWgw6r7XiQR L6JA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=PCoHGVyw8GMYWFHH1aOip85+pKL46htsf77bJMPb6DU=; b=e8C9+EqoqVFBC5luReAga5v6AiG/qj+C1pgMBfBZkWdA+ZrhN6sc07KPgbhbX8byLT raoBavGelL6VjKcPq/gdMYvVf5LX/V0tVZQbg2Ig26GtVbU+H2NVC5LQLYC7tfTkhIQs O/pwKj7l2vn1seUW0nRkxO9u3niisHClEZoG6dUfmZcgLh26iu3zqeMNEVlODby2hJm0 Lj3wnXlcEAHWVwVjlC6SEcTP1hZtxNIoWJ+sYC+g0Lw3oq3MD3QybInvkV4BKS2VgvqU Bf34/xA42u+BCMmnTJtCMBhq5/hdANxQc9llQjWYHsuSwtYEKtJXEpeAP1DRAEXfxEO7 8aYQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id u9si1882050pfi.537.2017.10.17.02.07.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:07:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 510416E61B; Tue, 17 Oct 2017 09:06:47 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 0881E6E60E for ; Tue, 17 Oct 2017 09:06:46 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 74141208B5; Tue, 17 Oct 2017 11:06:44 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 4E5DE20899; Tue, 17 Oct 2017 11:06:44 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 17/23] arm: dts: sun8i: a83t: Add display pipeline Date: Tue, 17 Oct 2017 11:06:24 +0200 Message-Id: X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The display pipeline on the A83T is mainly composed of the mixers and TCONs, plus various encoders. Let's add the mixers and TCONs to the DTSI. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t.dtsi | 80 ++++++++++++++++++++++++++++++++- 1 file changed, 80 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index ce6e887c8938..57feeb6fee8b 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -151,6 +151,12 @@ }; }; + de: display-engine { + compatible = "allwinner,sun8i-a83t-display-engine"; + allwinner,pipelines = <&mixer0>; + status = "disabled"; + }; + memory { reg = <0x40000000 0x80000000>; device_type = "memory"; @@ -162,6 +168,46 @@ #size-cells = <1>; ranges; + display_clocks: clock@1000000 { + compatible = "allwinner,sun8i-a83t-de2-clk"; + reg = <0x01000000 0x100000>; + clocks = <&ccu CLK_PLL_DE>, + <&ccu CLK_BUS_DE>; + clock-names = "mod", + "bus"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + mixer0: mixer@1100000 { + compatible = "allwinner,sun8i-a83t-de2-mixer"; + reg = <0x01100000 0x100000>; + clocks = <&display_clocks 0>, + <&display_clocks 6>; + clock-names = "bus", + "mod"; + resets = <&display_clocks 0>; + assigned-clocks = <&display_clocks 6>; + assigned-clock-rates = <150000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + mixer0_out_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_in_mixer0>; + }; + }; + }; + }; + syscon: syscon@1c00000 { compatible = "allwinner,sun8i-a83t-system-controller", "syscon"; @@ -177,6 +223,40 @@ #dma-cells = <1>; }; + tcon0: lcd-controller@1c0c000 { + compatible = "allwinner,sun8i-a83t-tcon"; + reg = <0x01c0c000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; + clock-names = "ahb", "tcon-ch0"; + clock-output-names = "tcon-pixel-clock"; + resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; + reset-names = "lcd", "lvds"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tcon0_in_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mixer0_out_tcon0>; + }; + }; + + tcon0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; + }; + mmc0: mmc@1c0f000 { compatible = "allwinner,sun8i-a83t-mmc", "allwinner,sun7i-a20-mmc"; From patchwork Tue Oct 17 09:06:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116051 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4638121qgn; Tue, 17 Oct 2017 02:08:28 -0700 (PDT) X-Google-Smtp-Source: AOwi7QA1bCeJI5Lo36j9DBJkasxvsCpWOduJ0uWiESiXV4O2WkVvYZWqxyTa3akGvQXl6aE/JnAn X-Received: by 10.101.78.5 with SMTP id r5mr10211077pgt.94.1508231308121; Tue, 17 Oct 2017 02:08:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231308; cv=none; d=google.com; s=arc-20160816; b=nYEXasQGXkG4T+fJTTtRWSDx80P2Vy7BtWmrBqckZYo6chKbY713dr3dkK2TTlMthk 18miR/tp6t8zvp7TKLvcDS/IMGnRNW/G98sIwAmNNPLOpWpbG7njFJSWnxPgj6CBmDd3 fFkn7evVw/ZeyoYXy1GHGi9YarU5qZlw1NdewcpFTYFtlcj3ROoTOiJ1oFmrlROnglgj wIN8p8xg0uoqOoBv1pncdRzpKqbLl/YGH+gOIJVXEDzG/tsJHK+c6uAnNVe+OzD6Ugjh K+LQiX+bgtCkUNMQCJ98FP5t2AfIcIPOiWrKQ+aO99+xTP9pgaigDWx2VnYiq3RZhl1y +iXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=SRaqYVCH82tg9sCv1Lle+cLDLWoztAfVmr1GIqgX6sE=; b=tI9MwJWeLRCM1BMRKCzpQwkB3irRDKi4BzXH1axsmuFFhuMmlZunklRjPBVJpUBVM8 e7lANysYuP7lFH8Bm2VZxCuA77pCpi2N5qGH8IGou3V7a8JWFHtqVd7BCrD8ot+an0g6 M9cQ/N403BRb7zFr1iCVp6Xah/zG2yIJ8VhwEHWQe60o0hPquucBYDIQ+JTU3vHVBsmS PdiqNl37yBdhdSa5tEWLgQbJcGjXTaqTT2Dpexi9aCLOp2+FNdFTH7lkT6+oHC4j/H7V /Ut3v5dAXPJVIiRzluQhCiVpdgTB5IFtwz496kSZknzRGsmFUDCS3ejbhbsX7E/HiSEX 34Qg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id u19si5578458pfg.51.2017.10.17.02.08.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:08:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 109446E5B0; Tue, 17 Oct 2017 09:06:58 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 69C996E60E for ; Tue, 17 Oct 2017 09:06:46 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id D6496208B7; Tue, 17 Oct 2017 11:06:44 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id B03ED208B3; Tue, 17 Oct 2017 11:06:44 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 18/23] arm: dts: sun8i: a83t: Enable the PWM Date: Tue, 17 Oct 2017 11:06:25 +0200 Message-Id: X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The A83T has the same PWM block than the H3. Add it to our DT. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 57feeb6fee8b..ef07a58859c7 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -496,6 +496,15 @@ status = "disabled"; }; + pwm: pwm@1c21400 { + compatible = "allwinner,sun8i-a83t-pwm", + "allwinner,sun8i-h3-pwm"; + reg = <0x01c21400 0x400>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; + }; + uart0: serial@1c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; From patchwork Tue Oct 17 09:06:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116047 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4637683qgn; Tue, 17 Oct 2017 02:08:01 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDV2xnRvnihAUFMnyVbnmZfhSMJY8DgJXZPB21M7BhsVpbMosbdaZccAtKJSrmq4jQQ87At X-Received: by 10.101.70.76 with SMTP id k12mr10432666pgr.19.1508231281081; Tue, 17 Oct 2017 02:08:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231281; cv=none; d=google.com; s=arc-20160816; b=q897T+05WwJMX/Istogv4TIECMIIHuBd2PvQCd9wB3Nx9x8rFN9WeWGpTeVebW29GA MWEvGY06nAlWnA5RKs68jqNQjNVmEoLSNTX7mBkTX9FYnQzsTLY/VcdUFV+veOXpHk6W hp5YRdjR1GzxanWXKZ/i+zDgOQdGeCb1rmcc4kSAWxN0twUPcrD7GBlIqeGPo6m4hyhu Je7h8XOlvmmld8NMYlQbEqEUfSBdG3sGbWSCNELiGYOzGzoWu8wAdxLR8mTSGfgxoJSF zkz56UQtZ7+lHXDSQGZUI6E8dOvPrkgc8RtEozW3MsvqgJZI+CVQabQK7zvuC7SkSPVu T+vA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=7q29TGkfyClf2D7bI9mGPX1whkWscm2qrNncbKEwnCc=; b=piEMVEpSEKh9FuASPaGvZE793Aws4Zjs6PFp23R9ZcoCIl3i0zdUJnlSx+UNswQ2Wc XIB8L/tmMOQfdqMTEEM+gK1SuD4SaJLQWDLqUkvyOlQOuHd87VgJ9vaUaN/L+SNs+TE2 c8+gngFGXe0n/JR2YC3i4bs+2TbaMDPWKO5JhFGrEXvT6SZ0+4VN6lSEiDFiBQR/MLGl BThqrIcLwX6J4h60i3XoAHEknNvPndzTQ59igYEvMz5G+7ye9ROBFOYKAT+uKTSZcbb3 eArC8HEIFRX9y92YLRlcS3BO/fgFXAo8ZSMsZUyIrH4ihsE4kpj4nXo+fAZHN5GrgZRx IPzA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id m3si5842700pld.823.2017.10.17.02.08.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:08:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 265726E626; Tue, 17 Oct 2017 09:06:51 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id CD59A6E60E for ; Tue, 17 Oct 2017 09:06:46 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 43A5F208BA; Tue, 17 Oct 2017 11:06:45 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 1E43B208B6; Tue, 17 Oct 2017 11:06:45 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 19/23] arm: dts: sun8i: a83t: Add LVDS pins group Date: Tue, 17 Oct 2017 11:06:26 +0200 Message-Id: <4125c6191f39c67963e018a84441551cc1815620.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The A83T has an LVDS bus that can be connected to a panel or a bridge. Add the pinctrl group for it. Signed-off-by: Maxime Ripard Reviewed-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index ef07a58859c7..6f1221556587 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -414,6 +414,12 @@ #interrupt-cells = <3>; #gpio-cells = <3>; + lcd_lvds_pins: lcd-lvds-pins { + pins = "PD18", "PD19", "PD20", "PD21", "PD22", + "PD23", "PD24", "PD25", "PD26", "PD27"; + function = "lvds0"; + }; + mmc0_pins: mmc0-pins { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; From patchwork Tue Oct 17 09:06:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116048 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4637812qgn; Tue, 17 Oct 2017 02:08:10 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAPfPjlfqnrDsBzd65Ysbi1VNKXkcxP3MHTvCW0uiKZn/6CFriaamN192QGs/R34A66Rck9 X-Received: by 10.98.186.11 with SMTP id k11mr11340824pff.141.1508231289946; Tue, 17 Oct 2017 02:08:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231289; cv=none; d=google.com; s=arc-20160816; b=GeusXCdmDYqFUdD6CDfDSxKBfjpLR4vNq/Jh44pPd2qja0HblOLgvbaate5Hop8kE3 S4H0vlMFRcu3YC3XnnfbeZazFLxhRT+CPvXoJowD2qsof5tyvJkpdJk5N2Vn+tW5KL9Z Zm31FhhATTqIcYLkbxH+t4yofcbrbgioCmavZ603FYQutfQsW7zTWfMdLPq9HetmwOpd /4HHR28Gv3ebsoaKN2JxbFc5cMlt5OObWDntrnCrAcuSsjiRAz90QvjFRWshXnLUsnnO XgyVYKcTfyqZ/eOjJ3yAU4TpItENGA3dU7YKBXWvK8IhxBqBKWmo/id0wA1hprH2pHts fbLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=fXfrBxaI9Po7mxipBI4fuiw/nFcIdmC7UI5LyC/kUXA=; b=iH5FXEw1WCEfIGE5IMhZpdb4zjdI29rsRFJGhLWXDmQrOSSAJOae5P01K21c+quw6H 4qOdcJ9//j7DrRFIrfrUKXWcjI2R51eWoDse4VCVaHLg3/uQ802VcovocLJ+6NgCS8Uo YS2rsG6s9mGaSqS2gyi3HwZ4uYvBK78oC/FJpaejFWc6aVSNdgQ3fs/6M8UCTdIPsu6Z sESCHBui1miTXDopOE9bwm9Gg8XJBdyxshrleXTeaVTmgoWuuwjQYQNLbvudBZqmFbGn kVC/tt1Bu6ajWMXypAwaiA2h6ipP8oxnzzzh3bJzeoHcmbLJrYI37f1jgjyyeIlUCrWe AJrw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id u7si5446718plr.807.2017.10.17.02.08.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:08:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 26DDD6E629; Tue, 17 Oct 2017 09:06:53 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 49EB16E61A for ; Tue, 17 Oct 2017 09:06:47 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id ADE23208BC; Tue, 17 Oct 2017 11:06:45 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 82D71208B6; Tue, 17 Oct 2017 11:06:45 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 20/23] arm: dts: sun8i: a83t: Add the PWM pin group Date: Tue, 17 Oct 2017 11:06:27 +0200 Message-Id: <6347546cd95cce11268effb14ed03f5e9ac382e5.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The A83T has a PWM that can be output from the SoC. Let's add a pinctrl group for it. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 6f1221556587..1986e8341e33 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -445,6 +445,11 @@ bias-pull-up; }; + pwm_pin: pwm-pin { + pins = "PD28"; + function = "pwm"; + }; + spdif_tx_pin: spdif-tx-pin { pins = "PE18"; function = "spdif"; From patchwork Tue Oct 17 09:06:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116044 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4637595qgn; Tue, 17 Oct 2017 02:07:54 -0700 (PDT) X-Google-Smtp-Source: AOwi7QC6WFro8xXwahRCUxpID4oAZ9iRLnPMRVZ91WJGPPGsvaBLKi2SRO7wNXdDAUnfJjo/aE5O X-Received: by 10.99.45.67 with SMTP id t64mr10521678pgt.62.1508231273923; Tue, 17 Oct 2017 02:07:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231273; cv=none; d=google.com; s=arc-20160816; b=rXslGWYHtouhpAqrjKpOP/+SUbI6Sp+I4nnqrf/N/UQrRuSfdD1zrAcRs0/siOnhmZ tZwseiwIs/txN7gcK6F3y1yc6WI+RKps1+/54aPN3TlmOwGVU4gZfUjeR5+A+onqj09y L8k2Mgi397jO0bmPqWqApMPSJ7QSP9P+qAYmeW2G4s3d4sFONmXl8BKtrnzflPWh698U aaFhF6Ocu/mCKmElsI1y5VKnxeljncbcYqDKyxVZpyXfeTsQY1jU8rZa5rPXYfNpYoGL TVF4/fyh4BKRryLoZumXPSfctaeuTqpLKNlI2bqv4U2gUk7wmP2nH0MbnLLP8EI6+5x0 5wXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=p1OpFk0GSzER0fh4IKCSGILBp/j8tNQ2tQHIM/L3gng=; b=dAsHbWt9D4WT1omNpwevjqZWUMpS2eCOue4zXAzmbPlGqXpbJPyJH3JeIzPAUMIO6D WunmmnAHDgVvjqyeb8zmQ/pv8ycUy/9PNIrAkr3lpx4VHJljC+8Gd2HZgocwupv9fOHT zPLKUmQBafrMpUyfGgBigFSY14mubKZsNQyBFUiQ+2YnRh/cA06uJNbD+naBxop2f5Nn cbjpGVhn6whQYZzTCZngo16SGDJt+eCTOKqwZkFt+6LlpRglPOKEABqVIWuJPMNuwaxS xMZ0GKF6AktM9ooEa3XLwDDBKG1y6yWRu+SI1Fs/paotuxtyw1zj8UdSn0ISCQGD9Uax 4RzQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id d127si4554584pgc.372.2017.10.17.02.07.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:07:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EDBA86E62F; Tue, 17 Oct 2017 09:06:55 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id A11B26E61D for ; Tue, 17 Oct 2017 09:06:47 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 1A99F208BE; Tue, 17 Oct 2017 11:06:46 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id E383B208BB; Tue, 17 Oct 2017 11:06:45 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 21/23] arm: dts: sun8i: a711: Add regulator support Date: Tue, 17 Oct 2017 11:06:28 +0200 Message-Id: <4d3de5b4c36ea67135d898d982891a7913478d9d.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 163 +++++++++++++++++++++-- 1 file changed, 154 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts index 723641f56a74..98dc0c22160b 100644 --- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts +++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts @@ -43,7 +43,8 @@ /dts-v1/; #include "sun8i-a83t.dtsi" -#include "sunxi-common-regulators.dtsi" + +#include / { model = "TBS A711 Tablet"; @@ -105,7 +106,7 @@ }; &mmc0 { - vmmc-supply = <®_vcc3v3>; + vmmc-supply = <®_dcdc1>; pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; @@ -117,8 +118,8 @@ bus-width = <4>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; - vmmc-supply = <®_vcc3v3>; - vqmmc-supply = <®_vcc3v3>; + vmmc-supply = <®_dldo1>; + vqmmc-supply = <®_dldo1>; non-removable; wakeup-source; status = "okay"; @@ -135,8 +136,8 @@ &mmc2 { pinctrl-0 = <&mmc2_8bit_emmc_pins>; pinctrl-names = "default"; - vmmc-supply = <®_vcc3v3>; - vqmmc-supply = <®_vcc3v3>; + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_dcdc1>; bus-width = <8>; non-removable; cap-mmc-hw-reset; @@ -147,10 +148,11 @@ status = "okay"; axp813: pmic@3a3 { - compatible = "x-powers,axp813"; reg = <0x3a3>; interrupt-parent = <&r_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + swin-supply = <®_dcdc1>; + x-powers,drive-vbus-en; }; ac100: codec@e89 { @@ -179,6 +181,149 @@ }; +#include "axp813.dtsi" + +®_aldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-1.8"; +}; + +®_aldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-name = "vdd-drampll"; +}; + +®_aldo3 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-name = "avcc"; +}; + +®_dcdc1 { + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + regulator-always-on; + regulator-name = "vcc-io"; +}; + +®_dcdc2 { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-name = "vdd-cpu-A"; +}; + +®_dcdc3 { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-name = "vdd-cpu-B"; +}; + +®_dcdc4 { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-gpu"; +}; + +®_dcdc5 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-name = "vcc-dram"; +}; + +®_dcdc6 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-always-on; + regulator-name = "vdd-sys"; +}; + +®_dldo1 { + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + regulator-name = "vcc-wifi-io"; +}; + +®_dldo2 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <4200000>; + regulator-name = "vcc-mipi"; +}; + +®_dldo3 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vdd-csi"; +}; + +®_dldo4 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "avdd-csi"; +}; + +®_drivevbus { + regulator-name = "usb0-vbus"; + status = "okay"; +}; + +®_eldo1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1800000>; + regulator-name = "dvdd-csi-r"; +}; + +®_eldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-dsi"; +}; + +®_eldo3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1800000>; + regulator-name = "dvdd-csi-f"; +}; + +®_fldo1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vcc-hsic"; +}; + +®_fldo2 { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-name = "vdd-cpus"; +}; + +®_ldo_io0 { + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + regulator-name = "vcc-ctp"; + status = "okay"; +}; + +®_ldo_io1 { + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + regulator-name = "vcc-vb"; + status = "okay"; +}; + +®_sw { + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + regulator-name = "vcc-lcd"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>; @@ -193,7 +338,7 @@ }; &usbphy { - usb1_vbus_supply = <®_vcc5v0>; - usb2_vbus_supply = <®_vcc5v0>; + usb1_vbus_supply = <®_vmain>; + usb2_vbus_supply = <®_vmain>; status = "okay"; }; From patchwork Tue Oct 17 09:06:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116049 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4637950qgn; Tue, 17 Oct 2017 02:08:18 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAF1Q6mj8Zrmn0t2yJ6AX/5yEILthd/4rTJCi6O6chYv9HlwD6JJt3euYZsqXb3g5VsHuZw X-Received: by 10.98.139.132 with SMTP id e4mr11280759pfl.172.1508231298594; Tue, 17 Oct 2017 02:08:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231298; cv=none; d=google.com; s=arc-20160816; b=Vne2JBo6oQoNc970PrObhGfCxUD8v16jjrcyCy3PkJxtehTifzAO6oM6RoC6bQ6Fj3 8NegsU6B2cDLLn/8taP3goRyi4ocorm39as6g0ZBAraf/0nCH6YDmvLFy0v/XDhKKcWf niGnY9Zy9R1lFUCXAcgjbWcDPIT6dLSALFhjExd2xDupM6p9KVUiDLLoybcgfmIIbEE+ OGH5zZUtSoUtJ53Mn7Mz4YQgu09tD0N5UBbtpSm/ODfCsVObeoEYVQ/rIEVTo3ZrKOmo HtyvPDlb/350VMaf0JK++NW4GHd+0GGlUEKOOZQpCUaIJgiZErrBoHZAxyeEja0VUNH9 J+BQ== ARC-Message-Signature: i=1; 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[131.252.210.177]) by mx.google.com with ESMTPS id e7si3820052pfb.298.2017.10.17.02.08.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Oct 2017 02:08:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D65546E62C; Tue, 17 Oct 2017 09:06:53 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 0FE076E61D for ; Tue, 17 Oct 2017 09:06:48 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 79435208C1; Tue, 17 Oct 2017 11:06:46 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 53BD1208BD; Tue, 17 Oct 2017 11:06:46 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 22/23] arm: dts: sun8i: a711: Enable USB OTG Date: Tue, 17 Oct 2017 11:06:29 +0200 Message-Id: <95434e5704d3cf721f011de76526575222e58bd6.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Quentin Schulz , Rob Herring , Mylene Josserand , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts index 98dc0c22160b..e4d08bff3158 100644 --- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts +++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts @@ -337,7 +337,14 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ + usb0_vbus-supply = <®_drivevbus>; usb1_vbus_supply = <®_vmain>; usb2_vbus_supply = <®_vmain>; status = "okay";