From patchwork Fri Oct 13 10:56:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Todor Tomov X-Patchwork-Id: 115754 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp584714qgn; Fri, 13 Oct 2017 03:57:55 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAH4Dgm9Vhmypt8thF21Wc69wAlMoGRkqw7G9ke1jXuWg4Ppi1VT4I7DeOBemJGmTe3QHX0 X-Received: by 10.99.168.13 with SMTP id o13mr969461pgf.435.1507892275207; Fri, 13 Oct 2017 03:57:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507892275; cv=none; d=google.com; s=arc-20160816; b=tx+pqf8+X8wut4NglyHV21kFnNPgrKweE9/WvrFY2nlWrjIv6GQ9LgBU88LgPHDG8S q0LBl85/mNJrxNxhWPWgLtcZw/VcYnERVXN7/aTbL8UlLbem2s8S4MSfD3ZZdjXsIslS IQHVcK2TnF+yIXLSouq4pbRcJru5FDsSaZE+5V26QR8eacsYQC5hNaRXJfC27K/SFcIX kKlucHPxDGJfeJDif14ibD7QVLFNUt2UTlbZprKTKYoVflYEPzievBMi5uNV3UUCEnKJ L361Wp+JOhfz3C/a+Y0/NE7tlrAv8IO/5aBcq+4k6GmjtIG35PISmEKNyBPCoGKbh7UA m+Mw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=2WGAFjEIihC+YbifWWEyoA342j26nL1m1r7lchpzmwc=; b=h2SM0ZZJ5OKvs8jgbdICaOwUp37JI4xcDTOPOZL73locj0oCmt8bl6c94emyLw9giN egRhFxZ7l5rMYvfZu/Q+4e1xKqQnhok8dxTSakcs0DKkVkkRa0Cem5wTaB1ashlJLyOF +CrgRUIAgzCDs0TTTjIbWVycr7cdjnNGUgv7MHdTEPm+m++GDz9XWYZXhrg/nC5Pr7iz okCSTguPaH4p8NzWKO78ZqWln4r/I/K2dAAzJlOp9bk27S6LFldT58zoVRN4/mUarXO8 Ml8ZFWBzRGKNtZnvP2eaMURF34I/xzaAIKo31QLGRmYFX2UFu5QQhh7+Wk8dCnd2Njgj tS1w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Fri, 13 Oct 2017 13:57:46 +0300 (EEST) From: Todor Tomov To: wsa@the-dreams.de, linux-i2c@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Todor Tomov , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 1/4] dt-bindings: media: Binding document for Qualcomm Camera Control Interface driver Date: Fri, 13 Oct 2017 13:56:40 +0300 Message-Id: <1507892203-17033-2-git-send-email-todor.tomov@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507892203-17033-1-git-send-email-todor.tomov@linaro.org> References: <1507892203-17033-1-git-send-email-todor.tomov@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DT binding document for Qualcomm Camera Control Interface driver CC: Rob Herring CC: Mark Rutland CC: devicetree@vger.kernel.org Signed-off-by: Todor Tomov --- .../devicetree/bindings/i2c/i2c-qcom-cci.txt | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt -- 2.7.4 diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt new file mode 100644 index 0000000..cb1fe15 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt @@ -0,0 +1,46 @@ +Qualcomm Camera Control Interface controller + +Required properties: + - compatible: Should be one of: + - "qcom,cci-v1.0.8" for 8916; + - "qcom,cci-v1.4.0" for 8996. + - #address-cells: Should be <1>. + - #size-cells: Should be <0>. + - reg: Base address of the controller and length of memory mapped region. + - interrupts: Specifier for CCI interrupt. + - clocks: List of clock specifiers, one for each entry in clock-names. + - clock-names: Should contain: + - "mmss_mmagic_ahb" - on 8996 only; + - "camss_top_ahb"; + - "cci_ahb"; + - "cci"; + - "camss_ahb". + +Required properties on 8996: + - power-domains: Power domain specifier. + +Optional: + - clock-frequency: Desired I2C bus clock frequency in Hz, defaults to 100 kHz + if omitted. + +Example: + + cci@a0c000 { + compatible = "qcom,cci-v1.4.0"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xa0c000 0x1000>; + interrupts = ; + power-domains = <&mmcc CAMSS_GDSC>; + clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>, + <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc CAMSS_CCI_AHB_CLK>, + <&mmcc CAMSS_CCI_CLK>, + <&mmcc CAMSS_AHB_CLK>; + clock-names = "mmss_mmagic_ahb", + "camss_top_ahb", + "cci_ahb", + "cci", + "camss_ahb"; + clock-frequency = <400000>; + }; From patchwork Fri Oct 13 10:56:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Todor Tomov X-Patchwork-Id: 115755 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp585446qgn; Fri, 13 Oct 2017 03:58:49 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDfjwVseKzkiSJmpn64bsmCPOH2+fFMJoh/UyLykkN5ZhFYYN+3yaELerZlUSUjmolGHn6A X-Received: by 10.84.244.2 with SMTP id g2mr1071353pll.400.1507892329270; Fri, 13 Oct 2017 03:58:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507892329; cv=none; d=google.com; s=arc-20160816; b=eMF7em+XjgFhCdOZm4AR+k9EUGG7BQ/nGAAI8Vr8DdI5uhGPz2ADu+zp4nlSMUsaqT ikJNaLYHlLvCME977PKCka12gTuvNDzSUSX2RKGPZwd6UIuZ0I5/P2a6sIjfDrirXMVN L3BfE1an1gP4aL37u0LDfBm5yKI6EmNdqnDP3kYeOw6/46o86OL/gjyvppjX8IduHXVk q7IsRlV1Pc2QEh2pnEKYD4NL4XtZV7j6tEYTYhvUE+GYJFcC1qGhOeDz+tPsvc3aQKUM ZH/IWQMPGrYK3FkKln8igNSvh7YxnTGB7Ws0iwq1oHRQ60d0X/uk8k0GvUcMDhec5w5C t0hA== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id b4si479854plb.430.2017.10.13.03.58.49; Fri, 13 Oct 2017 03:58:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758077AbdJMK6q (ORCPT + 27 others); Fri, 13 Oct 2017 06:58:46 -0400 Received: from ns.mm-sol.com ([37.157.136.199]:37948 "EHLO extserv.mm-sol.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751529AbdJMK5t (ORCPT ); Fri, 13 Oct 2017 06:57:49 -0400 Received: from mms-0439.qualcomm.mm-sol.com (unknown [37.157.136.206]) by extserv.mm-sol.com (Postfix) with ESMTPSA id 48596CC38; Fri, 13 Oct 2017 13:57:46 +0300 (EEST) From: Todor Tomov To: wsa@the-dreams.de, linux-i2c@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Todor Tomov , Andy Gross , Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 4/4] arm64: dts: qcom: Add Camera Control Interface support Date: Fri, 13 Oct 2017 13:56:43 +0300 Message-Id: <1507892203-17033-5-git-send-email-todor.tomov@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507892203-17033-1-git-send-email-todor.tomov@linaro.org> References: <1507892203-17033-1-git-send-email-todor.tomov@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This commit adds the CCI node for the CCI controller that resides on the Qualcomm MSM8916 and MSM8996 platforms. CC: Andy Gross CC: Rob Herring CC: Mark Rutland CC: devicetree@vger.kernel.org CC: linux-soc@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org Signed-off-by: Todor Tomov --- arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/qcom/msm8916.dtsi | 19 +++++++++++++++++++ arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 22 ++++++++++++++++++++++ 4 files changed, 69 insertions(+) -- 2.7.4 diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi index 4cb0b58..4fa6a72 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi @@ -733,4 +733,18 @@ bias-pull-up; }; }; + + cci_lines { + cci0_default: cci0_default { + pinmux { + function = "cci_i2c"; + pins = "gpio29", "gpio30"; + }; + pinconf { + pins = "gpio29", "gpio30"; + drive-strength = <16>; + bias-disable; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index dc38175..9f64130 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1325,6 +1325,25 @@ compatible = "venus-encoder"; }; }; + + cci: cci@1b0c000 { + compatible = "qcom,cci-v1.0.8"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1b0c000 0x1000>; + interrupts = ; + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>, + <&gcc GCC_CAMSS_AHB_CLK>; + clock-names = "camss_top_ahb", + "cci_ahb", + "cci", + "camss_ahb"; + pinctrl-names = "default"; + pinctrl-0 = <&cci0_default>; + status = "disabled"; + }; }; smd { diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index 6599404..3faaa4c 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -300,4 +300,18 @@ drive-strength = <2>; /* 2 MA */ }; }; + + cci_lines { + cci0_default: cci0_default { + pinmux { + function = "cci_i2c"; + pins = "gpio17", "gpio18"; + }; + pinconf { + pins = "gpio17", "gpio18"; + drive-strength = <16>; + bias-disable; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 887b61c..ae128d3 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -819,6 +819,28 @@ phy-names = "usb2-phy", "usb3-phy"; }; }; + + cci: cci@a0c000 { + compatible = "qcom,cci-v1.4.0"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xa0c000 0x1000>; + interrupts = ; + power-domains = <&mmcc CAMSS_GDSC>; + clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>, + <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc CAMSS_CCI_AHB_CLK>, + <&mmcc CAMSS_CCI_CLK>, + <&mmcc CAMSS_AHB_CLK>; + clock-names = "mmss_mmagic_ahb", + "camss_top_ahb", + "cci_ahb", + "cci", + "camss_ahb"; + pinctrl-names = "default"; + pinctrl-0 = <&cci0_default>; + status = "disabled"; + }; }; adsp-pil {