From patchwork Fri Oct 13 04:16:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 115692 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp276041qgn; Thu, 12 Oct 2017 21:17:01 -0700 (PDT) X-Received: by 10.99.124.75 with SMTP id l11mr121365pgn.439.1507868221582; Thu, 12 Oct 2017 21:17:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507868221; cv=none; d=google.com; s=arc-20160816; b=zqxAjAfxsf33J7zPkjOfqDid3ZxijzMUyIUHYdK3Wga7KBJA3vB9vLzLTGuy86FlIj 6xYpjRdPMMHJQ76GhBTNcyWXjOpP+E+YvExfUznP5xii72qtMERDyoiM9LBtfRLHcQTC D1qUKEnCylTqtWx+h/y0NCkW6CEbJyZV99MQOGQtUHtBQVZW+DVAOWcU7tA0W9pM0gmP +VXF0zUx1s8Ayi7nmDHhHgc+6PqNaG0cqkF+YQELFxj69dEt1YI3xvrqv9XJWhxcxBeb tUrpm7vWQP43eCBwrGcGHiiWK7P6Bs/ej3wCmHv6FisksQgAaeqwxynpaY//dqbEx0eJ 1DQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=bd0D4CYJE4uDc5hOoiPU2lA++m0w8z3bF1O2GLcG8k0=; b=NGQ9uY6agOFNFQZtOVn8hkI4yLMt9EFc7Kd1pmtNFWsG9XT/osQdlkt/DZ+IVJ2pDa CJMLsEg+rp4sLsud0Kg/Mjm8EgiuNLBZqc4xuLgjE+7mepty9vSlMPEYQdpXUmn1URqc GvuvBbmGTwQbOcqSqkagD0lnI2qzXnJJAj+kgTD6Ogge42b4noku3CzjEWaZPwDF4+/B eSabdbbHB1NZxiVSQsbr8iSLAKLAHH5I3OYzn1hcUbycbPgDfkDpVUSqoB+PFvX+cSZa 2/aumMy5qsWwcqqmULB7aA2frt9t8x0Qk8UDh5nS/fJuauP45VO3CkJOMRBBsKG7JV7O 9Krg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@jms.id.au header.s=google header.b=H2Dh7/wl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y40si52075pla.545.2017.10.12.21.17.01; Thu, 12 Oct 2017 21:17:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@jms.id.au header.s=google header.b=H2Dh7/wl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755754AbdJMEQ7 (ORCPT + 27 others); Fri, 13 Oct 2017 00:16:59 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:52970 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753849AbdJMEQ5 (ORCPT ); Fri, 13 Oct 2017 00:16:57 -0400 Received: by mail-pf0-f195.google.com with SMTP id e64so8110016pfk.9 for ; Thu, 12 Oct 2017 21:16:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jms.id.au; s=google; h=from:to:cc:subject:date:message-id; bh=bd0D4CYJE4uDc5hOoiPU2lA++m0w8z3bF1O2GLcG8k0=; b=H2Dh7/wlSoiOPu9w0CDIDQASIKhV8Q5c/47tpQMBJyHTojfdsqJ6u3cZxPEQaHGzvl q/asxTNaIPcWgwIdLKar/b6BPbxvRF19zEYsMGM2t2/WlxV0PcasNi99RjTv7K5jILJp vmUjsoEOynDCO8t2M7cMRjCPkkBS2CK8Er2So= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=bd0D4CYJE4uDc5hOoiPU2lA++m0w8z3bF1O2GLcG8k0=; b=m2zIkA8ymzCpJHv1a/3W27Xb2cgMEmEIVEb6d+OVyfUVbD2zKWI3iEgI27NC/CCLTb 2Rz1IWLWAijp+TZNCYbyqJ+Vbt7MeZGoNEDfj1sZxw+MjEqLkE8zozHcXxvwLUz8LngE HG4YHGUYpASYhQ47PO86zAee94Cub+3js24bFKow/i5AmalSibvqe4fe8p/l9KmnohDK zVr6ocdjugrFhba9QL8lhCOY4SCfZ5cWjZqm6YO0+oUUk6WPmjkFd5NpVzoGOthb744f 2QGlriffGzDM48pOwj/kspzggZ8Dnlg59zgW2sxaeuHCXNOp+UaLPL7khGMw+PuLcntD MQVg== X-Gm-Message-State: AMCzsaWsC9eZEjLbn8jitll1WIzHUVCMk4Oj3mRWwxtZ2o5g6NZuBmAn TRsQLXBhOMMc7kizRFLRt0FQyA== X-Google-Smtp-Source: AOwi7QAJgoLmYgtDEkr0jfHHsQUc3mC4xU1kescw4d3hulNM6N9jiO9IO9CyRSm9a9ytx4wm5zCnNw== X-Received: by 10.99.112.82 with SMTP id a18mr155344pgn.84.1507868216664; Thu, 12 Oct 2017 21:16:56 -0700 (PDT) Received: from E402SA.smb.com (36-230-69-201.dynamic-ip.hinet.net. [36.230.69.201]) by smtp.gmail.com with ESMTPSA id 125sm161592pff.14.2017.10.12.21.16.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 12 Oct 2017 21:16:55 -0700 (PDT) From: Joel Stanley To: "David S . Miller" , Benjamin Herrenschmidt Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Jeffery Subject: [PATCH v3] net: ftgmac100: Request clock and set speed Date: Fri, 13 Oct 2017 12:16:38 +0800 Message-Id: <20171013041638.30763-1-joel@jms.id.au> X-Mailer: git-send-email 2.14.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org According to the ASPEED datasheet, gigabit speeds require a clock of 100MHz or higher. Other speeds require 25MHz or higher. This patch configures a 100MHz clock if the system has a direct-attached PHY, or 25MHz if the system is running NC-SI which is limited to 100MHz. There appear to be no other upstream users of the FTGMAC100 driver it is hard to know the clocking requirements of other platforms. Therefore a conservative approach was taken with enabling clocks. If the platform is not ASPEED, both requesting the clock and configuring the speed is skipped. Signed-off-by: Joel Stanley --- Andrew, can you please give this one a spin on hardware? v3: - Fix errors from v2 v2: - only touch the clocks on Aspeed platforms - unconditionally call clk_unprepare_disable drivers/net/ethernet/faraday/ftgmac100.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) -- 2.14.1 Tested-by: Andrew Jeffery diff --git a/drivers/net/ethernet/faraday/ftgmac100.c b/drivers/net/ethernet/faraday/ftgmac100.c index 9ed8e4b81530..78db8e62a83f 100644 --- a/drivers/net/ethernet/faraday/ftgmac100.c +++ b/drivers/net/ethernet/faraday/ftgmac100.c @@ -21,6 +21,7 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +#include #include #include #include @@ -59,6 +60,9 @@ /* Min number of tx ring entries before stopping queue */ #define TX_THRESHOLD (MAX_SKB_FRAGS + 1) +#define FTGMAC_100MHZ 100000000 +#define FTGMAC_25MHZ 25000000 + struct ftgmac100 { /* Registers */ struct resource *res; @@ -96,6 +100,7 @@ struct ftgmac100 { struct napi_struct napi; struct work_struct reset_task; struct mii_bus *mii_bus; + struct clk *clk; /* Link management */ int cur_speed; @@ -1734,6 +1739,22 @@ static void ftgmac100_ncsi_handler(struct ncsi_dev *nd) nd->link_up ? "up" : "down"); } +static void ftgmac100_setup_clk(struct ftgmac100 *priv) +{ + priv->clk = devm_clk_get(priv->dev, NULL); + if (IS_ERR(priv->clk)) + return; + + clk_prepare_enable(priv->clk); + + /* Aspeed specifies a 100MHz clock is required for up to + * 1000Mbit link speeds. As NCSI is limited to 100Mbit, 25MHz + * is sufficient + */ + clk_set_rate(priv->clk, priv->use_ncsi ? FTGMAC_25MHZ : + FTGMAC_100MHZ); +} + static int ftgmac100_probe(struct platform_device *pdev) { struct resource *res; @@ -1830,6 +1851,9 @@ static int ftgmac100_probe(struct platform_device *pdev) goto err_setup_mdio; } + if (priv->is_aspeed) + ftgmac100_setup_clk(priv); + /* Default ring sizes */ priv->rx_q_entries = priv->new_rx_q_entries = DEF_RX_QUEUE_ENTRIES; priv->tx_q_entries = priv->new_tx_q_entries = DEF_TX_QUEUE_ENTRIES; @@ -1883,6 +1907,8 @@ static int ftgmac100_remove(struct platform_device *pdev) unregister_netdev(netdev); + clk_disable_unprepare(priv->clk); + /* There's a small chance the reset task will have been re-queued, * during stop, make sure it's gone before we free the structure. */