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Tue, 15 Sep 2020 14:06:12 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08FJ6Bkp085621; Tue, 15 Sep 2020 14:06:11 -0500 From: Dan Murphy To: , , , Subject: [PATCH 1/6] ASoC: tlv320adcx140: Idle the device while writing registers Date: Tue, 15 Sep 2020 14:06:01 -0500 Message-ID: <20200915190606.1744-1-dmurphy@ti.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Dan Murphy , camel.guo@axis.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" It was observed that if the device was active and register writes were performed there were some unwanted behaviors particularly when writing the word length and some filter options. So when writing to the device the device should be placed in sleep mode and then exit sleep mode once the register update is complete. Signed-off-by: Dan Murphy --- sound/soc/codecs/tlv320adcx140.c | 43 ++++++++++++++++++++++++-------- sound/soc/codecs/tlv320adcx140.h | 2 ++ 2 files changed, 34 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/tlv320adcx140.c b/sound/soc/codecs/tlv320adcx140.c index 8efe20605f9b..3909c1cf52be 100644 --- a/sound/soc/codecs/tlv320adcx140.c +++ b/sound/soc/codecs/tlv320adcx140.c @@ -30,7 +30,7 @@ struct adcx140_priv { struct regmap *regmap; struct device *dev; - int micbias_vg; + bool micbias_vg; unsigned int dai_fmt; unsigned int tdm_delay; @@ -614,11 +614,26 @@ static int adcx140_reset(struct adcx140_priv *adcx140) return ret; } +static void adcx140_pwr_ctrl(struct adcx140_priv *adcx140, bool power_state) +{ + int pwr_ctrl = 0; + + if (power_state) + pwr_ctrl = ADCX140_PWR_CFG_ADC_PDZ | ADCX140_PWR_CFG_PLL_PDZ; + + if (adcx140->micbias_vg && power_state) + pwr_ctrl |= ADCX140_PWR_CFG_BIAS_PDZ; + + regmap_update_bits(adcx140->regmap, ADCX140_PWR_CFG, + ADCX140_PWR_CTRL_MSK, pwr_ctrl); +} + static int adcx140_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { struct snd_soc_component *component = dai->component; + struct adcx140_priv *adcx140 = snd_soc_component_get_drvdata(component); u8 data = 0; switch (params_width(params)) { @@ -640,9 +655,13 @@ static int adcx140_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } + adcx140_pwr_ctrl(adcx140, false); + snd_soc_component_update_bits(component, ADCX140_ASI_CFG0, ADCX140_WORD_LEN_MSK, data); + adcx140_pwr_ctrl(adcx140, true); + return 0; } @@ -709,6 +728,8 @@ static int adcx140_set_dai_fmt(struct snd_soc_dai *codec_dai, adcx140->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; + adcx140_pwr_ctrl(adcx140, false); + snd_soc_component_update_bits(component, ADCX140_ASI_CFG0, ADCX140_FSYNCINV_BIT | ADCX140_BCLKINV_BIT | @@ -721,6 +742,7 @@ static int adcx140_set_dai_fmt(struct snd_soc_dai *codec_dai, snd_soc_component_update_bits(component, ADCX140_ASI_CFG1, ADCX140_TX_OFFSET_MASK, offset); + adcx140_pwr_ctrl(adcx140, true); return 0; } @@ -818,12 +840,11 @@ static int adcx140_codec_probe(struct snd_soc_component *component) ret = device_property_read_u32(adcx140->dev, "ti,mic-bias-source", &bias_source); - if (ret) + if (ret || bias_source > ADCX140_MIC_BIAS_VAL_AVDD) { bias_source = ADCX140_MIC_BIAS_VAL_VREF; - - if (bias_source > ADCX140_MIC_BIAS_VAL_AVDD) { - dev_err(adcx140->dev, "Mic Bias source value is invalid\n"); - return -EINVAL; + adcx140->micbias_vg = false; + } else { + adcx140->micbias_vg = true; } ret = device_property_read_u32(adcx140->dev, "ti,vref-source", @@ -906,6 +927,8 @@ static int adcx140_codec_probe(struct snd_soc_component *component) ADCX140_MIC_BIAS_VREF_MSK, bias_cfg); if (ret) dev_err(adcx140->dev, "setting MIC bias failed %d\n", ret); + + adcx140_pwr_ctrl(adcx140, true); out: return ret; } @@ -914,21 +937,19 @@ static int adcx140_set_bias_level(struct snd_soc_component *component, enum snd_soc_bias_level level) { struct adcx140_priv *adcx140 = snd_soc_component_get_drvdata(component); - int pwr_cfg = 0; switch (level) { case SND_SOC_BIAS_ON: case SND_SOC_BIAS_PREPARE: case SND_SOC_BIAS_STANDBY: - pwr_cfg = ADCX140_PWR_CFG_BIAS_PDZ | ADCX140_PWR_CFG_PLL_PDZ | - ADCX140_PWR_CFG_ADC_PDZ; + adcx140_pwr_ctrl(adcx140, true); break; case SND_SOC_BIAS_OFF: - pwr_cfg = 0x0; + adcx140_pwr_ctrl(adcx140, false); break; } - return regmap_write(adcx140->regmap, ADCX140_PWR_CFG, pwr_cfg); + return 0; } static const struct snd_soc_component_driver soc_codec_driver_adcx140 = { diff --git a/sound/soc/codecs/tlv320adcx140.h b/sound/soc/codecs/tlv320adcx140.h index eedbc1d7221f..94c6d1fd2977 100644 --- a/sound/soc/codecs/tlv320adcx140.h +++ b/sound/soc/codecs/tlv320adcx140.h @@ -123,6 +123,7 @@ #define ADCX140_MIC_BIAS_VREF_1375V 2 #define ADCX140_MIC_BIAS_VREF_MSK GENMASK(1, 0) +#define ADCX140_PWR_CTRL_MSK GENMASK(7, 5) #define ADCX140_PWR_CFG_BIAS_PDZ BIT(7) #define ADCX140_PWR_CFG_ADC_PDZ BIT(6) #define ADCX140_PWR_CFG_PLL_PDZ BIT(5) @@ -145,4 +146,5 @@ #define ADCX140_GPO_CFG_MAX 4 #define ADCX140_GPO_DRV_MAX 5 + #endif /* _TLV320ADCX140_ */ From patchwork Tue Sep 15 19:06:03 2020 Content-Type: text/plain; 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Tue, 15 Sep 2020 14:06:24 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08FJ6NcD102452; Tue, 15 Sep 2020 14:06:23 -0500 From: Dan Murphy To: , , , Subject: [PATCH 3/6] dt-bindings: tlv320adcx140: Add ASI Tx drive Date: Tue, 15 Sep 2020 14:06:03 -0500 Message-ID: <20200915190606.1744-3-dmurphy@ti.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200915190606.1744-1-dmurphy@ti.com> References: <20200915190606.1744-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Dan Murphy , camel.guo@axis.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add a property to indicate if the device is to go into a High-z state on the Tx ASI output pins when the device is idle. Signed-off-by: Dan Murphy --- Documentation/devicetree/bindings/sound/tlv320adcx140.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml index f578f17f3e04..e79f8d1891e4 100644 --- a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml +++ b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml @@ -108,6 +108,12 @@ properties: maximum: 7 default: [0, 0, 0, 0] + ti,asi-tx-drive: + type: boolean + description: | + When set the device will set the Tx ASI output to a Hi-Z state for unused + data cycles. Default is to drive the output low on unused ASI cycles. + patternProperties: '^ti,gpo-config-[1-4]$': $ref: /schemas/types.yaml#/definitions/uint32-array From patchwork Tue Sep 15 19:06:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 251019 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59F8EC433E2 for ; Tue, 15 Sep 2020 19:10:16 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 93C2E20756 for ; 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Tue, 15 Sep 2020 14:06:29 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08FJ6Tiq102549; Tue, 15 Sep 2020 14:06:29 -0500 From: Dan Murphy To: , , , Subject: [PATCH 4/6] ASoC: tlv320adcx140: Add the config to configure Tx ASI output Date: Tue, 15 Sep 2020 14:06:04 -0500 Message-ID: <20200915190606.1744-4-dmurphy@ti.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200915190606.1744-1-dmurphy@ti.com> References: <20200915190606.1744-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Dan Murphy , camel.guo@axis.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add code to allow the ASI Tx output to be placed into High-z mode during unused ASI cycles. This allows for other devices that may be on the bus to drive the ASI out. By default the 320adcx140 sends 0's for unused cycles. Signed-off-by: Dan Murphy --- sound/soc/codecs/tlv320adcx140.c | 11 +++++++++++ sound/soc/codecs/tlv320adcx140.h | 1 + 2 files changed, 12 insertions(+) diff --git a/sound/soc/codecs/tlv320adcx140.c b/sound/soc/codecs/tlv320adcx140.c index 73d18e8002e4..7fa5c8682c51 100644 --- a/sound/soc/codecs/tlv320adcx140.c +++ b/sound/soc/codecs/tlv320adcx140.c @@ -839,6 +839,7 @@ static int adcx140_codec_probe(struct snd_soc_component *component) u32 gpi_input_val = 0; int i; int ret; + bool tx_high_z; ret = device_property_read_u32(adcx140->dev, "ti,mic-bias-source", &bias_source); @@ -930,6 +931,16 @@ static int adcx140_codec_probe(struct snd_soc_component *component) if (ret) dev_err(adcx140->dev, "setting MIC bias failed %d\n", ret); + tx_high_z = device_property_read_bool(adcx140->dev, "ti,asi-tx-drive"); + if (tx_high_z) { + ret = regmap_update_bits(adcx140->regmap, ADCX140_ASI_CFG0, + ADCX140_TX_FILL, ADCX140_TX_FILL); + if (ret) { + dev_err(adcx140->dev, "Setting Tx drive failed %d\n", ret); + goto out; + } + } + adcx140_pwr_ctrl(adcx140, true); out: return ret; diff --git a/sound/soc/codecs/tlv320adcx140.h b/sound/soc/codecs/tlv320adcx140.h index 94c6d1fd2977..107bd7927d9c 100644 --- a/sound/soc/codecs/tlv320adcx140.h +++ b/sound/soc/codecs/tlv320adcx140.h @@ -146,5 +146,6 @@ #define ADCX140_GPO_CFG_MAX 4 #define ADCX140_GPO_DRV_MAX 5 +#define ADCX140_TX_FILL BIT(0) #endif /* _TLV320ADCX140_ */ From patchwork Tue Sep 15 19:06:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 291713 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E9AAC2D0E0 for ; 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Tue, 15 Sep 2020 14:06:34 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 15 Sep 2020 14:06:34 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08FJ6YED008324; Tue, 15 Sep 2020 14:06:34 -0500 From: Dan Murphy To: , , , Subject: [PATCH 5/6] dt-bindings: tlv320adcx140: Add slot programming property Date: Tue, 15 Sep 2020 14:06:05 -0500 Message-ID: <20200915190606.1744-5-dmurphy@ti.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200915190606.1744-1-dmurphy@ti.com> References: <20200915190606.1744-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Dan Murphy , camel.guo@axis.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add a property to configure the each channel to a specific TDM slot. Signed-off-by: Dan Murphy --- .../bindings/sound/tlv320adcx140.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml index e79f8d1891e4..dfc00308da94 100644 --- a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml +++ b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml @@ -114,6 +114,24 @@ properties: When set the device will set the Tx ASI output to a Hi-Z state for unused data cycles. Default is to drive the output low on unused ASI cycles. + ti,slot-mapping: + type: boolean + description: | + Each channel can be assigned a specific TDM slot for either a left or + right channel. The left channel values are from 0-31d and the right + channel values are from 32-63d. If the right channel value is 32 then the + right channel slot will be slot 31. + The array index is sequential audio channel to be set. + [ch1, ch2, ch3, ch4, ch5, ch6, ch7, ch8] + If the channel is not to be used then the channel should be set to it's + default value. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 8 + items: + maximum: 63 + default: [0, 1, 2, 3, 4, 5, 6, 7] + patternProperties: '^ti,gpo-config-[1-4]$': $ref: /schemas/types.yaml#/definitions/uint32-array From patchwork Tue Sep 15 19:06:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 291712 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9C40C2D0E0 for ; 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Tue, 15 Sep 2020 14:06:39 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 15 Sep 2020 14:06:39 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08FJ6dtZ086050; Tue, 15 Sep 2020 14:06:39 -0500 From: Dan Murphy To: , , , Subject: [PATCH 6/6] ASoC: tlv320adcx140: Add channel slot programming Date: Tue, 15 Sep 2020 14:06:06 -0500 Message-ID: <20200915190606.1744-6-dmurphy@ti.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200915190606.1744-1-dmurphy@ti.com> References: <20200915190606.1744-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Dan Murphy , camel.guo@axis.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Each channel can be assigned a specific slot to transmit data. This assignment is done in the device tree. Signed-off-by: Dan Murphy --- sound/soc/codecs/tlv320adcx140.c | 17 +++++++++++++++++ sound/soc/codecs/tlv320adcx140.h | 3 +++ 2 files changed, 20 insertions(+) diff --git a/sound/soc/codecs/tlv320adcx140.c b/sound/soc/codecs/tlv320adcx140.c index 7fa5c8682c51..666b8f3091d0 100644 --- a/sound/soc/codecs/tlv320adcx140.c +++ b/sound/soc/codecs/tlv320adcx140.c @@ -837,6 +837,8 @@ static int adcx140_codec_probe(struct snd_soc_component *component) int gpi_count; u32 gpi_inputs[ADCX140_NUM_GPI_PINS]; u32 gpi_input_val = 0; + int slot_count; + u32 slot_assignment[ADCX140_NUM_CH]; int i; int ret; bool tx_high_z; @@ -941,6 +943,21 @@ static int adcx140_codec_probe(struct snd_soc_component *component) } } + slot_count = device_property_count_u32(adcx140->dev, "ti,slot-mapping"); + if ((slot_count <= ADCX140_NUM_CH) && (slot_count > 0)) { + ret = device_property_read_u32_array(adcx140->dev, "ti,slot-mapping", + slot_assignment, slot_count); + if (ret) + return ret; + + for (i = 0; i < slot_count; i++) { + ret = regmap_update_bits(adcx140->regmap, ADCX140_ASI_CH1 + i, + ADCX140_SLOT_MSK, slot_assignment[i]); + if (ret) + return ret; + } + } + adcx140_pwr_ctrl(adcx140, true); out: return ret; diff --git a/sound/soc/codecs/tlv320adcx140.h b/sound/soc/codecs/tlv320adcx140.h index 107bd7927d9c..5eb27b94aa0a 100644 --- a/sound/soc/codecs/tlv320adcx140.h +++ b/sound/soc/codecs/tlv320adcx140.h @@ -147,5 +147,8 @@ #define ADCX140_GPO_DRV_MAX 5 #define ADCX140_TX_FILL BIT(0) +#define ADCX140_NUM_CH 8 + +#define ADCX140_SLOT_MSK GENMASK(5, 0) #endif /* _TLV320ADCX140_ */