From patchwork Thu Sep 10 12:41:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 249697 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ecf:0:0:0:0 with SMTP id i15csp1122430ilk; Thu, 10 Sep 2020 14:56:22 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzjsnnAy5zHuu7m2adc7jxI01Czqzzyd32XZyS7crND4CCGNqUUHz0LPaLb+YnqRD4qFc7J X-Received: by 2002:aa7:d29a:: with SMTP id w26mr11422034edq.106.1599774981821; Thu, 10 Sep 2020 14:56:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599774981; cv=none; d=google.com; s=arc-20160816; b=hnoD1G/U99D8mU9QBaHOQJ1vBiin8IzDDBlvJTjEkrjV5F8iIuhd5+fJkPcAJGpT78 ZOR1F4ft2uyIy8K6C9pxvtNApyiGyA41+D77bvP0tmDBXOjCIe6zWnQoPpC9SdkcQSu/ FFlHoWjo6NDIOn2rc6tC0JGuPF67wecEWGgK3spO50o6yrRck+oBiMSq4XAL3qB8j9CQ ah9QRU1pTnJIdLrIFRpWSBkJroVeWYI76gIpOOy4/Ac+Wslc0pWP0N2chBp5LipJMLYv +pGQ2eQZVux92FHLci/S7ZjHhlmJ+6WYUzmOJlA5bibNOpZxe+i18zclgO/4MBQi4PP2 ObRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=RBWE7U0tlwFef9YzggYph/v9AwzgqEVQs2QRRG5UVLo=; b=XrJHfPiWuZrzJMk4LNJhQXjfL4VtLjX6Ys1WllJuQD1M9nrdrtlozQXe9Prfq1oESc Vu+hPSZcrMuqvKd3N2Z5fIrV4cnu+2LIuG0teKZEghK8KT/XEeBFP/CqO5hOh22h/OYp vwTO2ZvHjDLSx/84S/hg0En/kdKu6i2IhcgqHMX8RqCOkOm5uZYWq59g0WNsAoKizrrh 8rMUv6hnfClgEGuzrmL/EVonj880SpeZhEBrilddAyceXVanTZSnXBzQ9G1BOow+2C9B BDsSsDyFIqi9hq1G42ALZTWhmeUKKB2PTM3DxZBNPxMeH4/pT/LXf5vv/aIncb2VeE3o bDiQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=x6fLwzTA; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b20si4557142ejk.275.2020.09.10.14.56.21; Thu, 10 Sep 2020 14:56:21 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=x6fLwzTA; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728506AbgIJVmf (ORCPT + 6 others); Thu, 10 Sep 2020 17:42:35 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:38488 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730730AbgIJMmC (ORCPT ); Thu, 10 Sep 2020 08:42:02 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 08ACfES1115777; Thu, 10 Sep 2020 07:41:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1599741674; bh=RBWE7U0tlwFef9YzggYph/v9AwzgqEVQs2QRRG5UVLo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=x6fLwzTAiXx1RjqO+5Dn01SR7Aqv+16rlZ+TmeQmTbOoQepFgJ7ZZg51od4ldP7XZ hvwYiijRe4w2Q7P9eQLO/FNkswA+s770Ypzsi1z8mjFZN4tYD76ymFROqO/kpNodES MhNkp4BJNJrC1RCJ/Lk+UnQQg7K+kkKqa62OD3xY= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08ACfEFw006531; Thu, 10 Sep 2020 07:41:14 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Sep 2020 07:41:14 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Sep 2020 07:41:14 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08ACfAGN024223; Thu, 10 Sep 2020 07:41:12 -0500 From: Peter Ujfalusi To: , , CC: , , Subject: [PATCH v2 1/2] ASoC: dt-bindings: ti, j721e-cpb-audio: Document support for j7200-cpb Date: Thu, 10 Sep 2020 15:41:09 +0300 Message-ID: <20200910124110.19361-2-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200910124110.19361-1-peter.ujfalusi@ti.com> References: <20200910124110.19361-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org j721e or j7200 SOM can be attached to the same Common Processor Board (CPB) With the j7200 SOM only the 48KHz family parent clock is available and McASP0 is used for the audio. Signed-off-by: Peter Ujfalusi --- .../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++----- 1 file changed, 70 insertions(+), 22 deletions(-) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml index d52cfbeb2d07..805da4d6a88e 100644 --- a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml +++ b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml @@ -18,18 +18,25 @@ description: | PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via different HSDIVIDER. - Clocking setup for 48KHz family: - PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk - |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI + Clocking setup for j721e: + 48KHz family: + PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk + |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI - Clocking setup for 44.1KHz family: - PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk - |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI + 44.1KHz family: + PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk + |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI + + Clocking setup for j7200: + 48KHz family: + PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk + |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI properties: compatible: - items: - - const: ti,j721e-cpb-audio + enum: + - ti,j721e-cpb-audio + - ti,j7200-cpb-audio model: $ref: /schemas/types.yaml#/definitions/string @@ -44,22 +51,12 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle clocks: - items: - - description: AUXCLK clock for McASP used by CPB audio - - description: Parent for CPB_McASP auxclk (for 48KHz) - - description: Parent for CPB_McASP auxclk (for 44.1KHz) - - description: SCKI clock for the pcm3168a codec on CPB - - description: Parent for CPB_SCKI clock (for 48KHz) - - description: Parent for CPB_SCKI clock (for 44.1KHz) + minItems: 4 + maxItems: 6 clock-names: - items: - - const: cpb-mcasp-auxclk - - const: cpb-mcasp-auxclk-48000 - - const: cpb-mcasp-auxclk-44100 - - const: cpb-codec-scki - - const: cpb-codec-scki-48000 - - const: cpb-codec-scki-44100 + minItems: 4 + maxItems: 6 required: - compatible @@ -71,6 +68,57 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: ti,j721e-cpb-audio + + then: + properties: + clocks: + minItems: 6 + items: + - description: AUXCLK clock for McASP used by CPB audio + - description: Parent for CPB_McASP auxclk (for 48KHz) + - description: Parent for CPB_McASP auxclk (for 44.1KHz) + - description: SCKI clock for the pcm3168a codec on CPB + - description: Parent for CPB_SCKI clock (for 48KHz) + - description: Parent for CPB_SCKI clock (for 44.1KHz) + + clock-names: + items: + - const: cpb-mcasp-auxclk + - const: cpb-mcasp-auxclk-48000 + - const: cpb-mcasp-auxclk-44100 + - const: cpb-codec-scki + - const: cpb-codec-scki-48000 + - const: cpb-codec-scki-44100 + + - if: + properties: + compatible: + contains: + const: ti,j7200-cpb-audio + + then: + properties: + clocks: + maxItems: 4 + items: + - description: AUXCLK clock for McASP used by CPB audio + - description: Parent for CPB_McASP auxclk (for 48KHz) + - description: SCKI clock for the pcm3168a codec on CPB + - description: Parent for CPB_SCKI clock (for 48KHz) + + clock-names: + items: + - const: cpb-mcasp-auxclk + - const: cpb-mcasp-auxclk-48000 + - const: cpb-codec-scki + - const: cpb-codec-scki-48000 + examples: - |+ sound { From patchwork Thu Sep 10 12:41:10 2020 Content-Type: text/plain; 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[23.128.96.18]) by mx.google.com with ESMTP id cw15si4449472edb.299.2020.09.10.14.55.42; Thu, 10 Sep 2020 14:55:42 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aDN7IJvE; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728165AbgIJVmo (ORCPT + 6 others); Thu, 10 Sep 2020 17:42:44 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:46436 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730784AbgIJMmB (ORCPT ); Thu, 10 Sep 2020 08:42:01 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 08ACfGmB058834; Thu, 10 Sep 2020 07:41:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1599741676; bh=IUYzQQqshxSh8qleqqCtf7r2HRvFn42iOSU0wPIKUbo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=aDN7IJvEekqZAiO7vsV+56kEMaWvcSm9rJJkdH7790BCE0ZYsdrYdaBo2rVK/cyHi p85pkBzHAhFIVEjxL6qsb/Fzo6j++uanEGsbydPseAhdu1v+ktp89PEBEz4xFVAQYW sPoF9+YrMbeOj0A099XALkM77q9TPy8/nZJMpobM= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 08ACfGgt058080 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Sep 2020 07:41:16 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Sep 2020 07:41:16 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Sep 2020 07:41:16 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08ACfAGO024223; Thu, 10 Sep 2020 07:41:14 -0500 From: Peter Ujfalusi To: , , CC: , , Subject: [PATCH v2 2/2] ASoC: ti: j721e-evm: Add support for j7200-cpb audio Date: Thu, 10 Sep 2020 15:41:10 +0300 Message-ID: <20200910124110.19361-3-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200910124110.19361-1-peter.ujfalusi@ti.com> References: <20200910124110.19361-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org When j7200 SOM is attached to the CPB we only have parent clock for 48KHz family and the rate of the parent clock is 2359296000Hz. Signed-off-by: Peter Ujfalusi --- sound/soc/ti/j721e-evm.c | 11 +++++++++++ 1 file changed, 11 insertions(+) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/sound/soc/ti/j721e-evm.c b/sound/soc/ti/j721e-evm.c index cb074af47a7d..29b73303f3fc 100644 --- a/sound/soc/ti/j721e-evm.c +++ b/sound/soc/ti/j721e-evm.c @@ -525,6 +525,14 @@ static const struct j721e_audio_match_data j721e_cpb_ivi_data = { }, }; +static const struct j721e_audio_match_data j7200_cpb_data = { + .board_type = J721E_BOARD_CPB, + .num_links = 2, /* CPB pcm3168a */ + .pll_rates = { + [J721E_CLK_PARENT_48000] = 2359296000u, /* PLL4 */ + }, +}; + static const struct of_device_id j721e_audio_of_match[] = { { .compatible = "ti,j721e-cpb-audio", @@ -532,6 +540,9 @@ static const struct of_device_id j721e_audio_of_match[] = { }, { .compatible = "ti,j721e-cpb-ivi-audio", .data = &j721e_cpb_ivi_data, + }, { + .compatible = "ti,j7200-cpb-audio", + .data = &j7200_cpb_data, }, { }, };