From patchwork Fri Sep 4 06:36:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 249053 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp1123942ilg; Thu, 3 Sep 2020 23:37:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJza1HMTnlWjg3ACA3m9+4LY02qyYrol90A/DjRJkRaPb8CDMUVj0t9f8ski7DLSkme7wKWP X-Received: by 2002:a50:d942:: with SMTP id u2mr7299837edj.0.1599201423994; Thu, 03 Sep 2020 23:37:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599201423; cv=none; d=google.com; s=arc-20160816; b=xACugvQVZEoFkHwAv3yOTUl9D/1Q1JcwkwW0ug19tjVYErwRz0cffwaXMTDLYmw4e7 0nvzj8vLYKjDJZrjHF2lI64g0zgq8hropLCy2seW8aLwit20efI6/Ziz9slBR3EcqHCn cYmDsKQ38bYfR5as3u1tRDqIv+gFSX1buuCjAxUKWIsfzi/09UVrBs9Wwt5C5Rl4hNG2 Hr+U0wcK2SUxk7XJDZSLfLYOJQHPOAMYS1Bvb9swjPsfYyRN87C5i6uMR1gTEWJ867bP C5Wa8BEBpyxWkzP6jcWns+hPWyLHfSMRUPC3ISOJGFT2+8mBbBZTYfS3hSHkIN4tVxjr ///Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=F7xztAForvza/aTPFJ5kdjkRWK2BzcaAuhBjilFt/LQ=; b=BZp+Nh9JnPvIXI+lQaVNxGg2XvfcdYAiy6desCcUUC2JUXmiVrZZ+j80i1mG0JSrKY 1HSrAV/9Dn17Lqjl1U9yXePcmbtn/BCxy/okIkKrLzn2Bu8oXKKvo5HXSMeHEjnHQj2z q2LryCdI+S3aBRm6WMSQZtJ3/T1vzphuCSQOdQpv7TfKwE9qAjRnWQQa2iq2IS//8VXC lBSqfTkYf0lNJkO/SQK+GjkZXJyefeO8w+cOMOKZhV3q8SiYaqD9YCUxpR2ZWvfdRbdm wrjJmaDEQybVrzbkOzgm5FbJCvPd98O7y8bR/qi9cLR07jZokOdrAMEAtEazVTj44/SP tzlQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="d0Xb/BrT"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w16si3489732eje.414.2020.09.03.23.37.03; Thu, 03 Sep 2020 23:37:03 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="d0Xb/BrT"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729628AbgIDGg7 (ORCPT + 6 others); Fri, 4 Sep 2020 02:36:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43732 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728443AbgIDGgw (ORCPT ); Fri, 4 Sep 2020 02:36:52 -0400 Received: from mail-pj1-x1043.google.com (mail-pj1-x1043.google.com [IPv6:2607:f8b0:4864:20::1043]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE05EC061246 for ; Thu, 3 Sep 2020 23:36:52 -0700 (PDT) Received: by mail-pj1-x1043.google.com with SMTP id 2so2720716pjx.5 for ; Thu, 03 Sep 2020 23:36:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=F7xztAForvza/aTPFJ5kdjkRWK2BzcaAuhBjilFt/LQ=; b=d0Xb/BrT5IHhHFFwSAw1jW9xo3JHLF5xv5wxD9qI7K4JIEpQTQOdq7nIVBsa2IDvJ/ zGQfjq2XpsTFTJ5/fpg8eQirm8PFYpxgM2oyPIFjD2UnHMYaXiCAjyru/PO5IpLWuoam n2pEdDdGwLiBqej+f81jG2/V0+8SpE7hTvpnH7hjcp9eB4gUJPHoRU4iuc76TIKv6I4N Hh9W0n82ZY8i4j3O4e2zn1nFWZ4tBpBsQ0wd9/Zf/oC3ZBmLhNjd08PM7Q+ynVrGmHjK 8D/j/l4x10+RVFbeIIJ61cl6+EkRm6FSwNuDmvOG5sehsSkxRF74q1K0apRHHmUDdQnF br2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=F7xztAForvza/aTPFJ5kdjkRWK2BzcaAuhBjilFt/LQ=; b=ovzmbda+j297Kq/UZIZw9QsLUzhxxbr+ipQnBPYmPHz8bUGi8Bn9n2ymW7vfsiiOzg 3D0DWCc3D32sRcbpSzx52O1N7L6gqjjw6fAbsYwyaZiINtQAhbE8kj3MpIYZgkiuzgdD oCWB09W9l2jUSQ0xSqlqFNM3ogUw+58LwWvC80NmNhaZ9EUISSv93WYZrLpCx+ldIYnU NpaDRrMAQ/Zzm/TUjHSxmFDs8BovfFn2wSVNlPAGl9B6OSCoPn1PWL1jMX4Vno5RLAio Df8YNsLcEy0PGhrd3pSH79hpA/EWmHEqcvgVBZ+UvmKQPQxy8Qks6VT/hsHItfopf+fB 9suA== X-Gm-Message-State: AOAM530S/vrvdoMaP4/n/WnZhFXHBK7yQgL5Lfci+AD9A34LOOpNNxNn KG7UH6HPE4pTD6JKSHIX8xY7 X-Received: by 2002:a17:90a:644b:: with SMTP id y11mr6988183pjm.13.1599201412193; Thu, 03 Sep 2020 23:36:52 -0700 (PDT) Received: from localhost.localdomain ([103.59.133.81]) by smtp.googlemail.com with ESMTPSA id 143sm5315040pfc.66.2020.09.03.23.36.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Sep 2020 23:36:51 -0700 (PDT) From: Manivannan Sadhasivam To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH 1/6] dt-bindings: arm: qcom: Document SM8250 SoC and boards Date: Fri, 4 Sep 2020 12:06:32 +0530 Message-Id: <20200904063637.28632-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200904063637.28632-1-manivannan.sadhasivam@linaro.org> References: <20200904063637.28632-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the SM8250 SoC binding and also the boards using it. Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 6031aee0f5a8..1adc8a33a3e4 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -40,6 +40,7 @@ description: | sdm630 sdm660 sdm845 + sm8250 The 'board' element must be one of the following strings: @@ -165,4 +166,10 @@ properties: - qcom,ipq6018-cp01-c1 - const: qcom,ipq6018 + - items: + - enum: + - qcom,qrb5165-rb5 + - qcom,sm8250-mtp + - const: qcom,sm8250 + ... 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[23.128.96.18]) by mx.google.com with ESMTP id a12si3376885ejd.417.2020.09.03.23.37.44; Thu, 03 Sep 2020 23:37:44 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P711tSb8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728167AbgIDGhm (ORCPT + 6 others); Fri, 4 Sep 2020 02:37:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728166AbgIDGg6 (ORCPT ); Fri, 4 Sep 2020 02:36:58 -0400 Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97F7DC06124F for ; Thu, 3 Sep 2020 23:36:55 -0700 (PDT) Received: by mail-pj1-x1041.google.com with SMTP id b17so457249pji.1 for ; Thu, 03 Sep 2020 23:36:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IE9lC/ixMfDRzfRHZzChsL/a0bDv+YouA1+ToO8AWbs=; b=P711tSb8oZkiFFHqJquyTmI1rawAgNdQXCfBhLwlW44YmlFr/yIJYbHmRasZ6QdRX+ 8aZTXKdEwLxq0AFqBaJ1OU0oikaP/MNpv8jtKgy3hIYY8zvIr/TlvHgojDVxL5Dm1je9 risAO3AgTP7W/vWG94KI3XEzFmEmq/XlUaOjfw9Bh325kRkX8fgFxXh/OBpUFTnMwAIE BDkys3h13VwEBtabYHEvyN8A1rNqkY/ETRPPGSsLEF0hxwJPhC3nZAJpzzE0n9VLIFmu DNx1So9l2+TvJRT//p0mlCyJacFMvCr7rdKbbKK8S77kU9mTSexv/MlHGauk9eVZUmgZ LQpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IE9lC/ixMfDRzfRHZzChsL/a0bDv+YouA1+ToO8AWbs=; b=tzM/iPEWaKPeEdrqVspDS2CnyjkCnLTvvwhML1IIncvrN1w6R9GB0HcngNCboI47hC sOiBfdNf1Ni9WHcNDJPyNn2Gyn6cpNA+CVjIXek168AX8oHADmuIK59rhNClPPbC7ECG flbaMqhw8Vvxtv0+LjVF2VppAKZM2opdiPHjJxqOF1++OVlrpRynlry6j20Tz9qlyvwh CSKpK90141lRKCnw3c11xbJWy1/4AQdBlUexGoxI3qebbFG6RmEbNuMyj50CB6ak5J69 wbTcxMlUMnYKWN2mtfmDdK0sDTi804+0g/TGdSvy3eAm3lxpM2ReFvHDG4scE8wpOXLJ t8hw== X-Gm-Message-State: AOAM532fNQ275sY/5+6NsEtsYqsVFQ9ve43rDh/WPVL8PyopG2pMXstf TGLdjHR16vJlM4v3x4cQmmCR X-Received: by 2002:a17:90a:dd45:: with SMTP id u5mr6895996pjv.198.1599201415111; Thu, 03 Sep 2020 23:36:55 -0700 (PDT) Received: from localhost.localdomain ([103.59.133.81]) by smtp.googlemail.com with ESMTPSA id 143sm5315040pfc.66.2020.09.03.23.36.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Sep 2020 23:36:54 -0700 (PDT) From: Manivannan Sadhasivam To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH 2/6] arm64: dts: qcom: sm8250: Rename UART2 node to UART12 Date: Fri, 4 Sep 2020 12:06:33 +0530 Message-Id: <20200904063637.28632-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200904063637.28632-1-manivannan.sadhasivam@linaro.org> References: <20200904063637.28632-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The UART12 node has been mistakenly mentioned as UART2. Let's fix that for both SM8250 SoC and MTP board and also add pinctrl definition for it. Fixes: 60378f1a171e ("arm64: dts: qcom: sm8250: Add sm8250 dts file") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 4 ++-- arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 ++++++++++- 2 files changed, 12 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts index 6894f8490dae..6e2f7ae1d621 100644 --- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts @@ -17,7 +17,7 @@ compatible = "qcom,sm8250-mtp"; aliases { - serial0 = &uart2; + serial0 = &uart12; }; chosen { @@ -371,7 +371,7 @@ gpio-reserved-ranges = <28 4>, <40 4>; }; -&uart2 { +&uart12 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 377172e8967b..e7d139e1a6ce 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -935,11 +935,13 @@ status = "disabled"; }; - uart2: serial@a90000 { + uart12: serial@a90000 { compatible = "qcom,geni-debug-uart"; reg = <0x0 0x00a90000 0x0 0x4000>; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart12_default>; interrupts = ; status = "disabled"; }; @@ -1880,6 +1882,13 @@ bias-disable; }; }; + + qup_uart12_default: qup-uart12-default { + mux { + pins = "gpio34", "gpio35"; + function = "qup12"; + }; + }; }; adsp: remoteproc@17300000 { From patchwork Fri Sep 4 06:36:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 249055 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp1124107ilg; Thu, 3 Sep 2020 23:37:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxXpIMFV9+kct01DQntLfziVLTcYNc4qfXfGoyg0zh3l9pr+1hkS7tXVNsDGPK1qp3eVZdQ X-Received: by 2002:a17:906:fb8f:: with SMTP id lr15mr4959184ejb.25.1599201443431; Thu, 03 Sep 2020 23:37:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599201443; cv=none; d=google.com; s=arc-20160816; b=mBtdlkGu5zrCBpiwog3+zyRHS2L3IrXCEX00gMxIcpqsYnsqd5sNkMtaF9wbfb1/uL vN94oi/afzX+kHV48Vm70i5IRpMIGAQ2GtjYq2hx6zHkTKJbLV/fs1jekdr6aomJTMPz iLzOAkupUETTdC74UFnw/OMY0mFu067D1c5MTbF5G1IrVBR4Ik56L1Nd9etlze/qUZht kqjbFgHPWuh384Tv8FCzACqYTFFXXLFSMuvbVrnK/x8n9buzbtiFLB0doKJ3W7GQiqJV K0ijYMO3ql9ndPVqH9+0/pxncz+typyMcTuLXwt3j4AuVpJF+xSL8sxEByonae6fj70T nISQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=L46VM7EXjrNYu126OLBEObkBVUyidbnDc1IGOZ/imuk=; b=x6+coRfo490yXDdwGMwPJjpj8/98gHlOue/fUpFGU3q/6l77ZfAINGo9VB0sZAZM3s +Wvuln+4NYKoS7s1K3MPq6/WsCO/otPJkzCb7k+JBLkz+Jt0nvBnCrjiCDHle5cvFMYy +Nt1cS9TvLA0vmNQWX5wuMXjMkDy1M3H2vvy/CGIDM6ngzWdVPOuqBSjloCbqWNMowW7 f1oPKkxRe+wPZSJLB23iJ/8gpIesNxai4tNBP8T7RkVBuzv3J2ACmH0NH3/kxFXGy6rw szjzPs2LPGKEH+taAKjafSYGZfvEUdQEiIeo6bvTT5H/JlIRND2TqRBq67lKkI9TU0J1 HeOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Js68wndW; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Robotics RB5 platform. This board is one of the 96Boards CE platform targeted for Robotics usecases from Qualcomm. This basic devicetree support includes regulators, onboard debug UART, I2C, SPI, and UFS support. Co-developed-by: Bjorn Andersson Signed-off-by: Bjorn Andersson Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 432 +++++++++++++++++++++++ 2 files changed, 433 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qrb5165-rb5.dts -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index d8f1466e6758..05d21ba311f9 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -35,3 +35,4 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8150-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8250-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb +dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts new file mode 100644 index 000000000000..f201e064b3e7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -0,0 +1,432 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2020, Linaro Ltd. + */ + +/dts-v1/; + +#include +#include +#include "sm8250.dtsi" +#include "pm8150.dtsi" +#include "pm8150b.dtsi" +#include "pm8150l.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Robotics RB5"; + compatible = "qcom,qrb5165-rb5", "qcom,sm8250"; + + aliases { + serial0 = &uart12; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + dc12v: dc12v-regulator { + compatible = "regulator-fixed"; + regulator-name = "DC12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + }; + + vbat: vbat-regulator { + compatible = "regulator-fixed"; + regulator-name = "VBAT"; + vin-supply = <&vreg_l11c_3p3>; + regulator-min-microvolt = <4200000>; + regulator-max-microvolt = <4200000>; + regulator-always-on; + }; + + vbat_som: vbat-som-regulator { + compatible = "regulator-fixed"; + regulator-name = "VBAT_SOM"; + vin-supply = <&dc12v>; + regulator-min-microvolt = <4200000>; + regulator-max-microvolt = <4200000>; + regulator-always-on; + }; + + vdc_3v3: vdc-3v3-regulator { + compatible = "regulator-fixed"; + regulator-name = "VDC_3V3"; + vin-supply = <&dc12v>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vdc_5v: vdc-5v-regulator { + compatible = "regulator-fixed"; + regulator-name = "VDC_5V"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <&vreg_l11c_3p3>; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + regulator-always-on; + }; + + vreg_s4a_1p8: vreg-s4a-1p8 { + compatible = "regulator-fixed"; + regulator-name = "vreg_s4a_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; +}; + +&apps_rsc { + pm8009-rpmh-regulators { + compatible = "qcom,pm8009-rpmh-regulators"; + qcom,pmic-id = "f"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-l2-supply = <&vreg_s8c_1p3>; + vdd-l5-l6-supply = <&vreg_bob>; + vdd-l7-supply = <&vreg_s4a_1p8>; + + vreg_l1f_1p1: ldo1 { + regulator-name = "vreg_l1f_1p1"; + regulator-min-microvolt = <1104000>; + regulator-max-microvolt = <1104000>; + regulator-initial-mode = ; + }; + + vreg_l2f_1p2: ldo2 { + regulator-name = "vreg_l2f_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_l6f_2p8: ldo6 { + regulator-name = "vreg_l6f_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l7f_1p8: ldo7 { + regulator-name = "vreg_l7f_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + }; + + pm8150-rpmh-regulators { + compatible = "qcom,pm8150-rpmh-regulators"; + qcom,pmic-id = "a"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + vdd-s9-supply = <&vph_pwr>; + vdd-s10-supply = <&vph_pwr>; + vdd-l2-l10-supply = <&vreg_bob>; + vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p95>; + vdd-l6-l9-supply = <&vreg_s8c_1p3>; + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_1p9>; + vdd-l13-l16-l17-supply = <&vreg_bob>; + + vreg_l2a_3p1: ldo2 { + regulator-name = "vreg_l2a_3p1"; + regulator-min-microvolt = <3072000>; + regulator-max-microvolt = <3072000>; + regulator-initial-mode = ; + }; + + vreg_l3a_0p9: ldo3 { + regulator-name = "vreg_l3a_0p9"; + regulator-min-microvolt = <928000>; + regulator-max-microvolt = <932000>; + regulator-initial-mode = ; + }; + + vreg_l5a_0p88: ldo5 { + regulator-name = "vreg_l5a_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + }; + + vreg_l6a_1p2: ldo6 { + regulator-name = "vreg_l6a_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_l7a_1p7: ldo7 { + regulator-name = "vreg_l7a_1p7"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l9a_1p2: ldo9 { + regulator-name = "vreg_l9a_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_l10a_1p8: ldo10 { + regulator-name = "vreg_l10a_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l12a_1p8: ldo12 { + regulator-name = "vreg_l12a_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l13a_ts_3p0: ldo13 { + regulator-name = "vreg_l13a_ts_3p0"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l14a_1p8: ldo14 { + regulator-name = "vreg_l14a_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1880000>; + regulator-initial-mode = ; + }; + + vreg_l15a_1p8: ldo15 { + regulator-name = "vreg_l15a_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l16a_2p7: ldo16 { + regulator-name = "vreg_l16a_2p7"; + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l17a_3p0: ldo17 { + regulator-name = "vreg_l17a_3p0"; + regulator-min-microvolt = <2856000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l18a_0p92: ldo18 { + regulator-name = "vreg_l18a_0p92"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + }; + + vreg_s5a_1p9: smps5 { + regulator-name = "vreg_s5a_1p9"; + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_s6a_0p95: smps6 { + regulator-name = "vreg_s6a_0p95"; + regulator-min-microvolt = <920000>; + regulator-max-microvolt = <1128000>; + regulator-initial-mode = ; + }; + }; + + pm8150l-rpmh-regulators { + compatible = "qcom,pm8150l-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + vdd-l1-l8-supply = <&vreg_s4a_1p8>; + vdd-l2-l3-supply = <&vreg_s8c_1p3>; + vdd-l4-l5-l6-supply = <&vreg_bob>; + vdd-l7-l11-supply = <&vreg_bob>; + vdd-l9-l10-supply = <&vreg_bob>; + vdd-bob-supply = <&vph_pwr>; + + vreg_bob: bob { + regulator-name = "vreg_bob"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <4000000>; + regulator-initial-mode = ; + }; + + vreg_l1c_1p8: ldo1 { + regulator-name = "vreg_l1c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l2c_1p2: ldo2 { + regulator-name = "vreg_l2c_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_l3c_0p8: ldo3 { + regulator-name = "vreg_l3c_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vreg_l4c_1p7: ldo4 { + regulator-name = "vreg_l4c_1p7"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vreg_l5c_1p8: ldo5 { + regulator-name = "vreg_l5c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vreg_l6c_2p96: ldo6 { + regulator-name = "vreg_l6c_2p96"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l7c_cam_vcm0_2p85: ldo7 { + regulator-name = "vreg_l7c_cam_vcm0_2p85"; + regulator-min-microvolt = <2856000>; + regulator-max-microvolt = <3104000>; + regulator-initial-mode = ; + }; + + vreg_l8c_1p8: ldo8 { + regulator-name = "vreg_l8c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l9c_2p96: ldo9 { + regulator-name = "vreg_l9c_2p96"; + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l10c_3p0: ldo10 { + regulator-name = "vreg_l10c_3p0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = ; + }; + + vreg_l11c_3p3: ldo11 { + regulator-name = "vreg_l11c_3p3"; + regulator-min-microvolt = <3296000>; + regulator-max-microvolt = <3296000>; + regulator-initial-mode = ; + regulator-always-on; + }; + + vreg_s8c_1p3: smps8 { + regulator-name = "vreg_s8c_1p3"; + regulator-min-microvolt = <1352000>; + regulator-max-microvolt = <1352000>; + regulator-initial-mode = ; + }; + }; +}; + +/* LS-I2C0 */ +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +/* LS-I2C1 */ +&i2c15 { + status = "okay"; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&qupv3_id_2 { + status = "okay"; +}; + +/* CAN */ +&spi0 { + status = "okay"; +}; + +&tlmm { + gpio-reserved-ranges = <40 4>; +}; + +&uart12 { + status = "okay"; +}; + +&ufs_mem_hc { + status = "okay"; + + vcc-supply = <&vreg_l17a_3p0>; + vcc-max-microamp = <800000>; + vccq-supply = <&vreg_l6a_1p2>; + vccq-max-microamp = <800000>; + vccq2-supply = <&vreg_s4a_1p8>; + vccq2-max-microamp = <800000>; +}; + +&ufs_mem_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l5a_0p88>; + vdda-max-microamp = <89900>; + vdda-pll-supply = <&vreg_l9a_1p2>; + vdda-pll-max-microamp = <18800>; +}; From patchwork Fri Sep 4 06:36:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 249057 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp1124157ilg; Thu, 3 Sep 2020 23:37:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzwtUXxVBm4nq5mnZMNSHdh5VcTn0ahnWfmiBi7BwgZPuCcLP0DiZEVAVfxTBC5Y0106Xci X-Received: by 2002:a17:906:8289:: with SMTP id h9mr5834053ejx.45.1599201452089; Thu, 03 Sep 2020 23:37:32 -0700 (PDT) ARC-Seal: i=1; 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Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 181 +++++++++++++++++++++++ 1 file changed, 181 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index 312316e23298..cf6dc0ec1640 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -431,6 +431,187 @@ &tlmm { gpio-reserved-ranges = <40 4>; + gpio-line-names = + "GPIO-MM", + "GPIO-NN", + "GPIO-OO", + "GPIO-PP", + "GPIO-A", + "GPIO-C", + "GPIO-E", + "GPIO-D", + "I2C0-SDA", + "I2C0-SCL", + "GPIO-TT", /* GPIO_10 */ + "NC", + "GPIO_12_I2C_SDA", + "GPIO_13_I2C_SCL", + "GPIO-X", + "GPIO_15_RGMII_INT", + "HST_BT_UART_CTS", + "HST_BT_UART_RFR", + "HST_BT_UART_TX", + "HST_BT_UART_RX", + "HST_WLAN_EN", /* GPIO_20 */ + "HST_BT_EN", + "GPIO-AAA", + "GPIO-BBB", + "GPIO-CCC", + "GPIO-Z", + "GPIO-DDD", + "GPIO-BB", + "GPIO_28_CAN_SPI_MISO", + "GPIO_29_CAN_SPI_MOSI", + "GPIO_30_CAN_SPI_CLK", /* GPIO_30 */ + "GPIO_31_CAN_SPI_CS", + "GPIO-UU", + "NC", + "UART1_TXD_SOM", + "UART1_RXD_SOM", + "UART0_CTS", + "UART0_RTS", + "UART0_TXD", + "UART0_RXD", + "SPI1_MISO", /* GPIO_40 */ + "SPI1_MOSI", + "SPI1_CLK", + "SPI1_CS", + "I2C1_SDA", + "I2C1_SCL", + "GPIO-F", + "GPIO-JJ", + "Board_ID1", + "Board_ID2", + "NC", /* GPIO_50 */ + "NC", + "SPI0_MISO", + "SPI0_MOSI", + "SPI0_SCLK", + "SPI0_CS", + "GPIO-QQ", + "GPIO-RR", + "USB2LAN_RESET", + "USB2LAN_EXTWAKE", + "NC", /* GPIO_60 */ + "NC", + "NC", + "LT9611_INT", + "GPIO-AA", + "USB_CC_DIR", + "GPIO-G", + "GPIO-LL", + "USB_DP_HPD_1P8", + "NC", + "NC", /* GPIO_70 */ + "SD_CMD", + "SD_DAT3", + "SD_SCLK", + "SD_DAT2", + "SD_DAT1", + "SD_DAT0", /* BOOT_CFG3 */ + "SD_UFS_CARD_DET_N", + "GPIO-II", + "PCIE0_RST_N", + "PCIE0_CLK_REQ_N", /* GPIO_80 */ + "PCIE0_WAKE_N", + "GPIO-CC", + "GPIO-DD", + "GPIO-EE", + "GPIO-FF", + "GPIO-GG", + "GPIO-HH", + "GPIO-VV", + "GPIO-WW", + "NC", /* GPIO_90 */ + "NC", + "GPIO-K", + "GPIO-I", + "CSI0_MCLK", + "CSI1_MCLK", + "CSI2_MCLK", + "CSI3_MCLK", + "GPIO-AA", /* CSI4_MCLK */ + "GPIO-BB", /* CSI5_MCLK */ + "GPIO-KK", /* GPIO_100 */ + "CCI_I2C_SDA0", + "CCI_I2C_SCL0", + "CCI_I2C_SDA1", + "CCI_I2C_SCL1", + "CCI_I2C_SDA2", + "CCI_I2C_SCL2", + "CCI_I2C_SDA3", + "CCI_I2C_SCL3", + "GPIO-L", + "NC", /* GPIO_110 */ + "NC", + "ACCEL_INT", + "GYRO_INT", + "GPIO-J", + "GPIO-YY", + "GPIO-H", + "GPIO-ZZ", + "NC", + "NC", + "NC", /* GPIO_120 */ + "NC", + "MAG_INT", + "MAG_DRDY_INT", + "HST_SW_CTRL", + "GPIO-M", + "GPIO-N", + "GPIO-O", + "GPIO-P", + "PS_INT", + "WSA1_EN", /* GPIO_130 */ + "USB_HUB_RESET", + "SDM_FORCE_USB_BOOT", + "I2S1_CLK_HDMI", + "I2S1_DATA0_HDMI", + "I2S1_WS_HDMI", + "GPIO-B", + "GPIO_137", /* To LT9611_I2S_MCLK_3V3 */ + "PCM_CLK", + "PCM_DI", + "PCM_DO", /* GPIO_140 */ + "PCM_FS", + "HST_SLIM_CLK", + "HST_SLIM_DATA", + "GPIO-U", + "GPIO-Y", + "GPIO-R", + "GPIO-Q", + "GPIO-S", + "GPIO-T", + "GPIO-V", /* GPIO_150 */ + "GPIO-W", + "DMIC_CLK1", + "DMIC_DATA1", + "DMIC_CLK2", + "DMIC_DATA2", + "WSA_SWR_CLK", + "WSA_SWR_DATA", + "DMIC_CLK3", + "DMIC_DATA3", + "I2C4_SDA", /* GPIO_160 */ + "I2C4_SCL", + "SPI3_CS1", + "SPI3_CS2", + "SPI2_MISO_LS3", + "SPI2_MOSI_LS3", + "SPI2_CLK_LS3", + "SPI2_ACCEL_CS_LS3", + "SPI2_CS1", + "NC", + "GPIO-SS", /* GPIO_170 */ + "GPIO-XX", + "SPI3_MISO", + "SPI3_MOSI", + "SPI3_CLK", + "SPI3_CS", + "HST_BLE_SNS_UART_TX", + "HST_BLE_SNS_UART_RX", + "HST_WLAN_UART_TX", + "HST_WLAN_UART_RX"; }; &uart12 {