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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Kito Cheng , =?utf-8?q?Alex_Benn=C3=A9e?= , Alistair Francis , Chih-Min Chao Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Kito Cheng Implement them in softfloat and remove the local versions in riscv. Signed-off-by: Kito Cheng Signed-off-by: Chih-Min Chao Acked-by: Alex Bennée Reviewed-by: Alistair Francis Message-Id: <1596102747-20226-2-git-send-email-chihmin.chao@sifive.com> Signed-off-by: Richard Henderson --- include/fpu/softfloat.h | 41 ++++++++++++++++++++++++++++++++++++ target/riscv/vector_helper.c | 25 ---------------------- 2 files changed, 41 insertions(+), 25 deletions(-) -- 2.25.1 diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 659218b5c7..573fce99bc 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -285,6 +285,47 @@ static inline float16 float16_set_sign(float16 a, int sign) return make_float16((float16_val(a) & 0x7fff) | (sign << 15)); } +static inline bool float16_eq(float16 a, float16 b, float_status *s) +{ + return float16_compare(a, b, s) == float_relation_equal; +} + +static inline bool float16_le(float16 a, float16 b, float_status *s) +{ + return float16_compare(a, b, s) <= float_relation_equal; +} + +static inline bool float16_lt(float16 a, float16 b, float_status *s) +{ + return float16_compare(a, b, s) < float_relation_equal; +} + +static inline bool float16_unordered(float16 a, float16 b, float_status *s) +{ + return float16_compare(a, b, s) == float_relation_unordered; +} + +static inline bool float16_eq_quiet(float16 a, float16 b, float_status *s) +{ + return float16_compare_quiet(a, b, s) == float_relation_equal; +} + +static inline bool float16_le_quiet(float16 a, float16 b, float_status *s) +{ + return float16_compare_quiet(a, b, s) <= float_relation_equal; +} + +static inline bool float16_lt_quiet(float16 a, float16 b, float_status *s) +{ + return float16_compare_quiet(a, b, s) < float_relation_equal; +} + +static inline bool float16_unordered_quiet(float16 a, float16 b, + float_status *s) +{ + return float16_compare_quiet(a, b, s) == float_relation_unordered; +} + #define float16_zero make_float16(0) #define float16_half make_float16(0x3800) #define float16_one make_float16(0x3c00) diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 793af99067..a156573d28 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -3955,12 +3955,6 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ } \ } -static bool float16_eq_quiet(uint16_t a, uint16_t b, float_status *s) -{ - FloatRelation compare = float16_compare_quiet(a, b, s); - return compare == float_relation_equal; -} - GEN_VEXT_CMP_VV_ENV(vmfeq_vv_h, uint16_t, H2, float16_eq_quiet) GEN_VEXT_CMP_VV_ENV(vmfeq_vv_w, uint32_t, H4, float32_eq_quiet) GEN_VEXT_CMP_VV_ENV(vmfeq_vv_d, uint64_t, H8, float64_eq_quiet) @@ -4017,12 +4011,6 @@ GEN_VEXT_CMP_VF(vmfne_vf_h, uint16_t, H2, vmfne16) GEN_VEXT_CMP_VF(vmfne_vf_w, uint32_t, H4, vmfne32) GEN_VEXT_CMP_VF(vmfne_vf_d, uint64_t, H8, vmfne64) -static bool float16_lt(uint16_t a, uint16_t b, float_status *s) -{ - FloatRelation compare = float16_compare(a, b, s); - return compare == float_relation_less; -} - GEN_VEXT_CMP_VV_ENV(vmflt_vv_h, uint16_t, H2, float16_lt) GEN_VEXT_CMP_VV_ENV(vmflt_vv_w, uint32_t, H4, float32_lt) GEN_VEXT_CMP_VV_ENV(vmflt_vv_d, uint64_t, H8, float64_lt) @@ -4030,13 +4018,6 @@ GEN_VEXT_CMP_VF(vmflt_vf_h, uint16_t, H2, float16_lt) GEN_VEXT_CMP_VF(vmflt_vf_w, uint32_t, H4, float32_lt) GEN_VEXT_CMP_VF(vmflt_vf_d, uint64_t, H8, float64_lt) -static bool float16_le(uint16_t a, uint16_t b, float_status *s) -{ - FloatRelation compare = float16_compare(a, b, s); - return compare == float_relation_less || - compare == float_relation_equal; -} - GEN_VEXT_CMP_VV_ENV(vmfle_vv_h, uint16_t, H2, float16_le) GEN_VEXT_CMP_VV_ENV(vmfle_vv_w, uint32_t, H4, float32_le) GEN_VEXT_CMP_VV_ENV(vmfle_vv_d, uint64_t, H8, float64_le) @@ -4091,12 +4072,6 @@ GEN_VEXT_CMP_VF(vmfge_vf_h, uint16_t, H2, vmfge16) GEN_VEXT_CMP_VF(vmfge_vf_w, uint32_t, H4, vmfge32) GEN_VEXT_CMP_VF(vmfge_vf_d, uint64_t, H8, vmfge64) -static bool float16_unordered_quiet(uint16_t a, uint16_t b, float_status *s) -{ - FloatRelation compare = float16_compare_quiet(a, b, s); - return compare == float_relation_unordered; -} - GEN_VEXT_CMP_VV_ENV(vmford_vv_h, uint16_t, H2, !float16_unordered_quiet) GEN_VEXT_CMP_VV_ENV(vmford_vv_w, uint32_t, H4, !float32_unordered_quiet) GEN_VEXT_CMP_VV_ENV(vmford_vv_d, uint64_t, H8, !float64_unordered_quiet) From patchwork Sun Aug 30 02:31:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 248720 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp2299300ilg; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Frank Chang , peter.maydell@linaro.org, =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Reviewed-by: Alex Bennée Signed-off-by: Frank Chang Message-Id: <1596102747-20226-4-git-send-email-chihmin.chao@sifive.com> Signed-off-by: Richard Henderson --- include/fpu/softfloat.h | 8 ++++++++ fpu/softfloat.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+) -- 2.25.1 diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 573fce99bc..0a5a5e5d0b 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -136,9 +136,11 @@ float16 uint16_to_float16_scalbn(uint16_t a, int, float_status *status); float16 uint32_to_float16_scalbn(uint32_t a, int, float_status *status); float16 uint64_to_float16_scalbn(uint64_t a, int, float_status *status); +float16 int8_to_float16(int8_t a, float_status *status); float16 int16_to_float16(int16_t a, float_status *status); float16 int32_to_float16(int32_t a, float_status *status); float16 int64_to_float16(int64_t a, float_status *status); +float16 uint8_to_float16(uint8_t a, float_status *status); float16 uint16_to_float16(uint16_t a, float_status *status); float16 uint32_to_float16(uint32_t a, float_status *status); float16 uint64_to_float16(uint64_t a, float_status *status); @@ -187,10 +189,13 @@ float32 float16_to_float32(float16, bool ieee, float_status *status); float16 float64_to_float16(float64 a, bool ieee, float_status *status); float64 float16_to_float64(float16 a, bool ieee, float_status *status); +int8_t float16_to_int8_scalbn(float16, FloatRoundMode, int, + float_status *status); int16_t float16_to_int16_scalbn(float16, FloatRoundMode, int, float_status *); int32_t float16_to_int32_scalbn(float16, FloatRoundMode, int, float_status *); int64_t float16_to_int64_scalbn(float16, FloatRoundMode, int, float_status *); +int8_t float16_to_int8(float16, float_status *status); int16_t float16_to_int16(float16, float_status *status); int32_t float16_to_int32(float16, float_status *status); int64_t float16_to_int64(float16, float_status *status); @@ -199,6 +204,8 @@ int16_t float16_to_int16_round_to_zero(float16, float_status *status); int32_t float16_to_int32_round_to_zero(float16, float_status *status); int64_t float16_to_int64_round_to_zero(float16, float_status *status); +uint8_t float16_to_uint8_scalbn(float16 a, FloatRoundMode, + int, float_status *status); uint16_t float16_to_uint16_scalbn(float16 a, FloatRoundMode, int, float_status *status); uint32_t float16_to_uint32_scalbn(float16 a, FloatRoundMode, @@ -206,6 +213,7 @@ uint32_t float16_to_uint32_scalbn(float16 a, FloatRoundMode, uint64_t float16_to_uint64_scalbn(float16 a, FloatRoundMode, int, float_status *status); +uint8_t float16_to_uint8(float16 a, float_status *status); uint16_t float16_to_uint16(float16 a, float_status *status); uint32_t float16_to_uint32(float16 a, float_status *status); uint64_t float16_to_uint64(float16 a, float_status *status); diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 33abc8207b..64de0b40f7 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -2109,6 +2109,13 @@ static int64_t round_to_int_and_pack(FloatParts in, FloatRoundMode rmode, } } +int8_t float16_to_int8_scalbn(float16 a, FloatRoundMode rmode, int scale, + float_status *s) +{ + return round_to_int_and_pack(float16_unpack_canonical(a, s), + rmode, scale, INT8_MIN, INT8_MAX, s); +} + int16_t float16_to_int16_scalbn(float16 a, FloatRoundMode rmode, int scale, float_status *s) { @@ -2172,6 +2179,11 @@ int64_t float64_to_int64_scalbn(float64 a, FloatRoundMode rmode, int scale, rmode, scale, INT64_MIN, INT64_MAX, s); } +int8_t float16_to_int8(float16 a, float_status *s) +{ + return float16_to_int8_scalbn(a, s->float_rounding_mode, 0, s); +} + int16_t float16_to_int16(float16 a, float_status *s) { return float16_to_int16_scalbn(a, s->float_rounding_mode, 0, s); @@ -2322,6 +2334,13 @@ static uint64_t round_to_uint_and_pack(FloatParts in, FloatRoundMode rmode, } } +uint8_t float16_to_uint8_scalbn(float16 a, FloatRoundMode rmode, int scale, + float_status *s) +{ + return round_to_uint_and_pack(float16_unpack_canonical(a, s), + rmode, scale, UINT8_MAX, s); +} + uint16_t float16_to_uint16_scalbn(float16 a, FloatRoundMode rmode, int scale, float_status *s) { @@ -2385,6 +2404,11 @@ uint64_t float64_to_uint64_scalbn(float64 a, FloatRoundMode rmode, int scale, rmode, scale, UINT64_MAX, s); } +uint8_t float16_to_uint8(float16 a, float_status *s) +{ + return float16_to_uint8_scalbn(a, s->float_rounding_mode, 0, s); +} + uint16_t float16_to_uint16(float16 a, float_status *s) { return float16_to_uint16_scalbn(a, s->float_rounding_mode, 0, s); @@ -2539,6 +2563,11 @@ float16 int16_to_float16(int16_t a, float_status *status) return int64_to_float16_scalbn(a, 0, status); } +float16 int8_to_float16(int8_t a, float_status *status) +{ + return int64_to_float16_scalbn(a, 0, status); +} + float32 int64_to_float32_scalbn(int64_t a, int scale, float_status *status) { FloatParts pa = int_to_float(a, scale, status); @@ -2664,6 +2693,11 @@ float16 uint16_to_float16(uint16_t a, float_status *status) return uint64_to_float16_scalbn(a, 0, status); } +float16 uint8_to_float16(uint8_t a, float_status *status) +{ + return uint64_to_float16_scalbn(a, 0, status); +} + float32 uint64_to_float32_scalbn(uint64_t a, int scale, float_status *status) { FloatParts pa = uint_to_float(a, scale, status); From patchwork Sun Aug 30 02:31:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 248719 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp2298820ilg; Sat, 29 Aug 2020 19:32:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxDo1sBbzlQS0P/jEBB1WALOIpgK95wXrF9OkKlH0ofzsAiUfBan68ED12BxS6PCAoigWPV X-Received: by 2002:a25:c2c7:: with SMTP id s190mr10806309ybf.161.1598754774695; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Stephen Long Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Stephen Long This float16 predicate was missing from the normal set. Signed-off-by: Stephen Long Signed-off-by: Richard Henderson --- include/fpu/softfloat.h | 5 +++++ 1 file changed, 5 insertions(+) -- 2.25.1 diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 0a5a5e5d0b..863dfc6151 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -272,6 +272,11 @@ static inline bool float16_is_zero_or_denormal(float16 a) return (float16_val(a) & 0x7c00) == 0; } +static inline bool float16_is_normal(float16 a) +{ + return (((float16_val(a) >> 10) + 1) & 0x1f) >= 2; +} + static inline float16 float16_abs(float16 a) { /* Note that abs does *not* handle NaN specially, nor does From patchwork Sun Aug 30 02:32:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 248722 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp2299326ilg; Sat, 29 Aug 2020 19:34:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzhCGKXtaZ4jzK79522th3SIeyjvgcQRAzO2m8kI2ldM4Z6/HxxS4Cd9JLbt3yL7E1V2sNO X-Received: by 2002:a25:9742:: with SMTP id h2mr10995847ybo.430.1598754855793; Sat, 29 Aug 2020 19:34:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1598754855; cv=none; d=google.com; s=arc-20160816; b=OBNnLkax55CX5gZSN0Cle7xP4et7oiaOQp6Mm6Cy/06hc/7yLOBWIZqA97BWzokxz4 jzybQ25+9YqdjMeGHMqAEMK3P05k2AfAGxltH1kCPR8rxjFHLbHqJjE6aoQAXRNwdpi6 4QO6/RX7M7HU8nTo1jCKFtX1T+cD0CaG7eaCkpVI4Pes/sUl3rO5J1kv6HcnSjnm5dss dGx3kujYG3pmuIoG+cgu8kkwRZCLyrM/beKlLDiRCnffiFSQrQ9Vjii7/oEhWkatHVz6 Ybai8FQmKlxE6m+m+yzQGHU+FHZoxBFoJt+PFAaun+COIDIbd6yA2Nosc8xJye4dvkal EhjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=T763ehMytNeYEURPWFkoitjSdOEWxwTlP1JI5ym7p9A=; b=SvPwkxHWMbeLG6DbSc2YQ34DXc/QGEt9IYp2JzdQLRFWJRUJw/ZFUuS7vX5R+oUHJB ct+v5ozOja9JQYWzawqriQuVQtumia7IDnQ6LA6Tubz9lDlnWain1dmM1ZNR5sEIwUqi DwfbXbF+KJ0fHOjM43SjUFmN1gH4LyXce+yGDvIM8k3H+mQls9bb/wTRiQ0xdBzF0N6T nOcH328jCuQVVtZcC6ax3gIZmbggnT4HiN2TRwBVUI6fbemimPAvkAF+zPLlWKOn8hTK Tw8Lb9EvkHXqkRRoTd5JEIUTMhcSUIJ4KrsCp5rOVoS5w1EtVcxNy6girtYdbDethLrI zoNw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RlWwBr0U; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, LIU Zhiwei Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: LIU Zhiwei This patch implements operations for bfloat16 except conversion and some misc operations. We also add FloatFmt and pack/unpack interfaces for bfloat16. As they are both static fields, we can't make a sperate patch for them. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Message-Id: <20200813071421.2509-2-zhiwei_liu@c-sky.com> [rth: Use FloatRelation for comparison operations.] Signed-off-by: Richard Henderson --- include/fpu/softfloat-types.h | 5 + include/fpu/softfloat.h | 38 ++++++++ fpu/softfloat.c | 168 ++++++++++++++++++++++++++++++++++ 3 files changed, 211 insertions(+) -- 2.25.1 diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index c7ddcab8ca..8a3f20fae9 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -112,6 +112,11 @@ typedef struct { #define make_float128(high_, low_) ((float128) { .high = high_, .low = low_ }) #define make_float128_init(high_, low_) { .high = high_, .low = low_ } +/* + * Software neural-network floating-point types. + */ +typedef uint16_t bfloat16; + /* * Software IEC/IEEE floating-point underflow tininess-detection mode. */ diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 863dfc6151..68b3cf488d 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -109,6 +109,7 @@ void float_raise(uint8_t flags, float_status *status); float16 float16_squash_input_denormal(float16 a, float_status *status); float32 float32_squash_input_denormal(float32 a, float_status *status); float64 float64_squash_input_denormal(float64 a, float_status *status); +bfloat16 bfloat16_squash_input_denormal(bfloat16 a, float_status *status); /*---------------------------------------------------------------------------- | Options to indicate which negations to perform in float*_muladd() @@ -347,6 +348,43 @@ static inline bool float16_unordered_quiet(float16 a, float16 b, #define float16_three make_float16(0x4200) #define float16_infinity make_float16(0x7c00) +/*---------------------------------------------------------------------------- +| Software bfloat16 operations. +*----------------------------------------------------------------------------*/ + +bfloat16 bfloat16_add(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_sub(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_mul(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_div(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_muladd(bfloat16, bfloat16, bfloat16, int, + float_status *status); +float16 bfloat16_scalbn(bfloat16, int, float_status *status); +bfloat16 bfloat16_min(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_max(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_minnum(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_maxnum(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_minnummag(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_maxnummag(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_sqrt(bfloat16, float_status *status); +FloatRelation bfloat16_compare(bfloat16, bfloat16, float_status *status); +FloatRelation bfloat16_compare_quiet(bfloat16, bfloat16, float_status *status); + +bfloat16 bfloat16_silence_nan(bfloat16, float_status *status); +bfloat16 bfloat16_default_nan(float_status *status); + +static inline bfloat16 bfloat16_set_sign(bfloat16 a, int sign) +{ + return (a & 0x7fff) | (sign << 15); +} + +#define bfloat16_zero 0 +#define bfloat16_half 0x3f00 +#define bfloat16_one 0x3f80 +#define bfloat16_one_point_five 0x3fc0 +#define bfloat16_two 0x4000 +#define bfloat16_three 0x4040 +#define bfloat16_infinity 0x7f80 + /*---------------------------------------------------------------------------- | The pattern for a default generated half-precision NaN. *----------------------------------------------------------------------------*/ diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 64de0b40f7..77d81ab9b0 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -554,6 +554,10 @@ static const FloatFmt float16_params_ahp = { .arm_althp = true }; +static const FloatFmt bfloat16_params = { + FLOAT_PARAMS(8, 7) +}; + static const FloatFmt float32_params = { FLOAT_PARAMS(8, 23) }; @@ -580,6 +584,11 @@ static inline FloatParts float16_unpack_raw(float16 f) return unpack_raw(float16_params, f); } +static inline FloatParts bfloat16_unpack_raw(bfloat16 f) +{ + return unpack_raw(bfloat16_params, f); +} + static inline FloatParts float32_unpack_raw(float32 f) { return unpack_raw(float32_params, f); @@ -603,6 +612,11 @@ static inline float16 float16_pack_raw(FloatParts p) return make_float16(pack_raw(float16_params, p)); } +static inline bfloat16 bfloat16_pack_raw(FloatParts p) +{ + return pack_raw(bfloat16_params, p); +} + static inline float32 float32_pack_raw(FloatParts p) { return make_float32(pack_raw(float32_params, p)); @@ -820,6 +834,11 @@ static FloatParts float16_unpack_canonical(float16 f, float_status *s) return float16a_unpack_canonical(f, s, &float16_params); } +static FloatParts bfloat16_unpack_canonical(bfloat16 f, float_status *s) +{ + return sf_canonicalize(bfloat16_unpack_raw(f), &bfloat16_params, s); +} + static float16 float16a_round_pack_canonical(FloatParts p, float_status *s, const FloatFmt *params) { @@ -831,6 +850,11 @@ static float16 float16_round_pack_canonical(FloatParts p, float_status *s) return float16a_round_pack_canonical(p, s, &float16_params); } +static bfloat16 bfloat16_round_pack_canonical(FloatParts p, float_status *s) +{ + return bfloat16_pack_raw(round_canonical(p, s, &bfloat16_params)); +} + static FloatParts float32_unpack_canonical(float32 f, float_status *s) { return sf_canonicalize(float32_unpack_raw(f), &float32_params, s); @@ -1158,6 +1182,28 @@ float64_sub(float64 a, float64 b, float_status *s) return float64_addsub(a, b, s, hard_f64_sub, soft_f64_sub); } +/* + * Returns the result of adding or subtracting the bfloat16 + * values `a' and `b'. + */ +bfloat16 QEMU_FLATTEN bfloat16_add(bfloat16 a, bfloat16 b, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pb = bfloat16_unpack_canonical(b, status); + FloatParts pr = addsub_floats(pa, pb, false, status); + + return bfloat16_round_pack_canonical(pr, status); +} + +bfloat16 QEMU_FLATTEN bfloat16_sub(bfloat16 a, bfloat16 b, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pb = bfloat16_unpack_canonical(b, status); + FloatParts pr = addsub_floats(pa, pb, true, status); + + return bfloat16_round_pack_canonical(pr, status); +} + /* * Returns the result of multiplying the floating-point values `a' and * `b'. The operation is performed according to the IEC/IEEE Standard @@ -1260,6 +1306,20 @@ float64_mul(float64 a, float64 b, float_status *s) f64_is_zon2, f64_addsubmul_post); } +/* + * Returns the result of multiplying the bfloat16 + * values `a' and `b'. + */ + +bfloat16 QEMU_FLATTEN bfloat16_mul(bfloat16 a, bfloat16 b, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pb = bfloat16_unpack_canonical(b, status); + FloatParts pr = mul_floats(pa, pb, status); + + return bfloat16_round_pack_canonical(pr, status); +} + /* * Returns the result of multiplying the floating-point values `a' and * `b' then adding 'c', with no intermediate rounding step after the @@ -1642,6 +1702,23 @@ float64_muladd(float64 xa, float64 xb, float64 xc, int flags, float_status *s) return soft_f64_muladd(ua.s, ub.s, uc.s, flags, s); } +/* + * Returns the result of multiplying the bfloat16 values `a' + * and `b' then adding 'c', with no intermediate rounding step after the + * multiplication. + */ + +bfloat16 QEMU_FLATTEN bfloat16_muladd(bfloat16 a, bfloat16 b, bfloat16 c, + int flags, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pb = bfloat16_unpack_canonical(b, status); + FloatParts pc = bfloat16_unpack_canonical(c, status); + FloatParts pr = muladd_floats(pa, pb, pc, flags, status); + + return bfloat16_round_pack_canonical(pr, status); +} + /* * Returns the result of dividing the floating-point value `a' by the * corresponding value `b'. The operation is performed according to @@ -1808,6 +1885,20 @@ float64_div(float64 a, float64 b, float_status *s) f64_div_pre, f64_div_post); } +/* + * Returns the result of dividing the bfloat16 + * value `a' by the corresponding value `b'. + */ + +bfloat16 bfloat16_div(bfloat16 a, bfloat16 b, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pb = bfloat16_unpack_canonical(b, status); + FloatParts pr = div_floats(pa, pb, status); + + return bfloat16_round_pack_canonical(pr, status); +} + /* * Float to Float conversions * @@ -2881,6 +2972,25 @@ MINMAX(64, maxnummag, false, true, true) #undef MINMAX +#define BF16_MINMAX(name, ismin, isiee, ismag) \ +bfloat16 bfloat16_ ## name(bfloat16 a, bfloat16 b, float_status *s) \ +{ \ + FloatParts pa = bfloat16_unpack_canonical(a, s); \ + FloatParts pb = bfloat16_unpack_canonical(b, s); \ + FloatParts pr = minmax_floats(pa, pb, ismin, isiee, ismag, s); \ + \ + return bfloat16_round_pack_canonical(pr, s); \ +} + +BF16_MINMAX(min, true, false, false) +BF16_MINMAX(minnum, true, true, false) +BF16_MINMAX(minnummag, true, true, true) +BF16_MINMAX(max, false, false, false) +BF16_MINMAX(maxnum, false, true, false) +BF16_MINMAX(maxnummag, false, true, true) + +#undef BF16_MINMAX + /* Floating point compare */ static FloatRelation compare_floats(FloatParts a, FloatParts b, bool is_quiet, float_status *s) @@ -3042,6 +3152,24 @@ FloatRelation float64_compare_quiet(float64 a, float64 b, float_status *s) return f64_compare(a, b, true, s); } +static FloatRelation QEMU_FLATTEN +soft_bf16_compare(bfloat16 a, bfloat16 b, bool is_quiet, float_status *s) +{ + FloatParts pa = bfloat16_unpack_canonical(a, s); + FloatParts pb = bfloat16_unpack_canonical(b, s); + return compare_floats(pa, pb, is_quiet, s); +} + +FloatRelation bfloat16_compare(bfloat16 a, bfloat16 b, float_status *s) +{ + return soft_bf16_compare(a, b, false, s); +} + +FloatRelation bfloat16_compare_quiet(bfloat16 a, bfloat16 b, float_status *s) +{ + return soft_bf16_compare(a, b, true, s); +} + /* Multiply A by 2 raised to the power N. */ static FloatParts scalbn_decomposed(FloatParts a, int n, float_status *s) { @@ -3081,6 +3209,13 @@ float64 float64_scalbn(float64 a, int n, float_status *status) return float64_round_pack_canonical(pr, status); } +bfloat16 bfloat16_scalbn(bfloat16 a, int n, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pr = scalbn_decomposed(pa, n, status); + return bfloat16_round_pack_canonical(pr, status); +} + /* * Square Root * @@ -3231,6 +3366,13 @@ float64 QEMU_FLATTEN float64_sqrt(float64 xa, float_status *s) return soft_f64_sqrt(ua.s, s); } +bfloat16 QEMU_FLATTEN bfloat16_sqrt(bfloat16 a, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pr = sqrt_float(pa, status, &bfloat16_params); + return bfloat16_round_pack_canonical(pr, status); +} + /*---------------------------------------------------------------------------- | The pattern for a default generated NaN. *----------------------------------------------------------------------------*/ @@ -3273,6 +3415,13 @@ float128 float128_default_nan(float_status *status) return r; } +bfloat16 bfloat16_default_nan(float_status *status) +{ + FloatParts p = parts_default_nan(status); + p.frac >>= bfloat16_params.frac_shift; + return bfloat16_pack_raw(p); +} + /*---------------------------------------------------------------------------- | Returns a quiet NaN from a signalling NaN for the floating point value `a'. *----------------------------------------------------------------------------*/ @@ -3304,6 +3453,14 @@ float64 float64_silence_nan(float64 a, float_status *status) return float64_pack_raw(p); } +bfloat16 bfloat16_silence_nan(bfloat16 a, float_status *status) +{ + FloatParts p = bfloat16_unpack_raw(a); + p.frac <<= bfloat16_params.frac_shift; + p = parts_silence_nan(p, status); + p.frac >>= bfloat16_params.frac_shift; + return bfloat16_pack_raw(p); +} /*---------------------------------------------------------------------------- | If `a' is denormal and we are in flush-to-zero mode then set the @@ -3353,6 +3510,17 @@ float64 float64_squash_input_denormal(float64 a, float_status *status) return a; } +bfloat16 bfloat16_squash_input_denormal(bfloat16 a, float_status *status) +{ + if (status->flush_inputs_to_zero) { + FloatParts p = bfloat16_unpack_raw(a); + if (parts_squash_denormal(p, status)) { + return bfloat16_set_sign(bfloat16_zero, p.sign); + } + } + return a; +} + /*---------------------------------------------------------------------------- | Takes a 64-bit fixed-point value `absZ' with binary point between bits 6 | and 7, and returns the properly rounded 32-bit integer corresponding to the From patchwork Sun Aug 30 02:32:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 248721 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp2299311ilg; Sat, 29 Aug 2020 19:34:12 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyIdyVhPj+gSAM+tjIAiJmfCHzRzjcvegKZMYg1IUsSqVqZRYLNC4uJNj1mrYyYfpOGKy+r X-Received: by 2002:a25:f304:: with SMTP id c4mr10402180ybs.209.1598754852691; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, LIU Zhiwei Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: LIU Zhiwei Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Message-Id: <20200813071421.2509-3-zhiwei_liu@c-sky.com> [rth: Use FloatRoundMode for conversion functions.] Signed-off-by: Richard Henderson --- include/fpu/softfloat.h | 54 ++++++++++ fpu/softfloat.c | 223 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 277 insertions(+) -- 2.25.1 diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 68b3cf488d..95f0789a92 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -348,6 +348,60 @@ static inline bool float16_unordered_quiet(float16 a, float16 b, #define float16_three make_float16(0x4200) #define float16_infinity make_float16(0x7c00) +/*---------------------------------------------------------------------------- +| Software bfloat16 conversion routines. +*----------------------------------------------------------------------------*/ + +bfloat16 bfloat16_round_to_int(bfloat16, float_status *status); +bfloat16 float32_to_bfloat16(float32, float_status *status); +float32 bfloat16_to_float32(bfloat16, float_status *status); +bfloat16 float64_to_bfloat16(float64 a, float_status *status); +float64 bfloat16_to_float64(bfloat16 a, float_status *status); + +int16_t bfloat16_to_int16_scalbn(bfloat16, FloatRoundMode, + int, float_status *status); +int32_t bfloat16_to_int32_scalbn(bfloat16, FloatRoundMode, + int, float_status *status); +int64_t bfloat16_to_int64_scalbn(bfloat16, FloatRoundMode, + int, float_status *status); + +int16_t bfloat16_to_int16(bfloat16, float_status *status); +int32_t bfloat16_to_int32(bfloat16, float_status *status); +int64_t bfloat16_to_int64(bfloat16, float_status *status); + +int16_t bfloat16_to_int16_round_to_zero(bfloat16, float_status *status); +int32_t bfloat16_to_int32_round_to_zero(bfloat16, float_status *status); +int64_t bfloat16_to_int64_round_to_zero(bfloat16, float_status *status); + +uint16_t bfloat16_to_uint16_scalbn(bfloat16 a, FloatRoundMode, + int, float_status *status); +uint32_t bfloat16_to_uint32_scalbn(bfloat16 a, FloatRoundMode, + int, float_status *status); +uint64_t bfloat16_to_uint64_scalbn(bfloat16 a, FloatRoundMode, + int, float_status *status); + +uint16_t bfloat16_to_uint16(bfloat16 a, float_status *status); +uint32_t bfloat16_to_uint32(bfloat16 a, float_status *status); +uint64_t bfloat16_to_uint64(bfloat16 a, float_status *status); + +uint16_t bfloat16_to_uint16_round_to_zero(bfloat16 a, float_status *status); +uint32_t bfloat16_to_uint32_round_to_zero(bfloat16 a, float_status *status); +uint64_t bfloat16_to_uint64_round_to_zero(bfloat16 a, float_status *status); + +bfloat16 int16_to_bfloat16_scalbn(int16_t a, int, float_status *status); +bfloat16 int32_to_bfloat16_scalbn(int32_t a, int, float_status *status); +bfloat16 int64_to_bfloat16_scalbn(int64_t a, int, float_status *status); +bfloat16 uint16_to_bfloat16_scalbn(uint16_t a, int, float_status *status); +bfloat16 uint32_to_bfloat16_scalbn(uint32_t a, int, float_status *status); +bfloat16 uint64_to_bfloat16_scalbn(uint64_t a, int, float_status *status); + +bfloat16 int16_to_bfloat16(int16_t a, float_status *status); +bfloat16 int32_to_bfloat16(int32_t a, float_status *status); +bfloat16 int64_to_bfloat16(int64_t a, float_status *status); +bfloat16 uint16_to_bfloat16(uint16_t a, float_status *status); +bfloat16 uint32_to_bfloat16(uint32_t a, float_status *status); +bfloat16 uint64_to_bfloat16(uint64_t a, float_status *status); + /*---------------------------------------------------------------------------- | Software bfloat16 operations. *----------------------------------------------------------------------------*/ diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 77d81ab9b0..67cfa0fd82 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -2014,6 +2014,34 @@ float32 float64_to_float32(float64 a, float_status *s) return float32_round_pack_canonical(pr, s); } +float32 bfloat16_to_float32(bfloat16 a, float_status *s) +{ + FloatParts p = bfloat16_unpack_canonical(a, s); + FloatParts pr = float_to_float(p, &float32_params, s); + return float32_round_pack_canonical(pr, s); +} + +float64 bfloat16_to_float64(bfloat16 a, float_status *s) +{ + FloatParts p = bfloat16_unpack_canonical(a, s); + FloatParts pr = float_to_float(p, &float64_params, s); + return float64_round_pack_canonical(pr, s); +} + +bfloat16 float32_to_bfloat16(float32 a, float_status *s) +{ + FloatParts p = float32_unpack_canonical(a, s); + FloatParts pr = float_to_float(p, &bfloat16_params, s); + return bfloat16_round_pack_canonical(pr, s); +} + +bfloat16 float64_to_bfloat16(float64 a, float_status *s) +{ + FloatParts p = float64_unpack_canonical(a, s); + FloatParts pr = float_to_float(p, &bfloat16_params, s); + return bfloat16_round_pack_canonical(pr, s); +} + /* * Rounds the floating-point value `a' to an integer, and returns the * result as a floating-point value. The operation is performed @@ -2143,6 +2171,18 @@ float64 float64_round_to_int(float64 a, float_status *s) return float64_round_pack_canonical(pr, s); } +/* + * Rounds the bfloat16 value `a' to an integer, and returns the + * result as a bfloat16 value. + */ + +bfloat16 bfloat16_round_to_int(bfloat16 a, float_status *s) +{ + FloatParts pa = bfloat16_unpack_canonical(a, s); + FloatParts pr = round_to_int(pa, s->float_rounding_mode, 0, s); + return bfloat16_round_pack_canonical(pr, s); +} + /* * Returns the result of converting the floating-point value `a' to * the two's complement integer format. The conversion is performed @@ -2365,6 +2405,62 @@ int64_t float64_to_int64_round_to_zero(float64 a, float_status *s) return float64_to_int64_scalbn(a, float_round_to_zero, 0, s); } +/* + * Returns the result of converting the floating-point value `a' to + * the two's complement integer format. + */ + +int16_t bfloat16_to_int16_scalbn(bfloat16 a, FloatRoundMode rmode, int scale, + float_status *s) +{ + return round_to_int_and_pack(bfloat16_unpack_canonical(a, s), + rmode, scale, INT16_MIN, INT16_MAX, s); +} + +int32_t bfloat16_to_int32_scalbn(bfloat16 a, FloatRoundMode rmode, int scale, + float_status *s) +{ + return round_to_int_and_pack(bfloat16_unpack_canonical(a, s), + rmode, scale, INT32_MIN, INT32_MAX, s); +} + +int64_t bfloat16_to_int64_scalbn(bfloat16 a, FloatRoundMode rmode, int scale, + float_status *s) +{ + return round_to_int_and_pack(bfloat16_unpack_canonical(a, s), + rmode, scale, INT64_MIN, INT64_MAX, s); +} + +int16_t bfloat16_to_int16(bfloat16 a, float_status *s) +{ + return bfloat16_to_int16_scalbn(a, s->float_rounding_mode, 0, s); +} + +int32_t bfloat16_to_int32(bfloat16 a, float_status *s) +{ + return bfloat16_to_int32_scalbn(a, s->float_rounding_mode, 0, s); +} + +int64_t bfloat16_to_int64(bfloat16 a, float_status *s) +{ + return bfloat16_to_int64_scalbn(a, s->float_rounding_mode, 0, s); +} + +int16_t bfloat16_to_int16_round_to_zero(bfloat16 a, float_status *s) +{ + return bfloat16_to_int16_scalbn(a, float_round_to_zero, 0, s); +} + +int32_t bfloat16_to_int32_round_to_zero(bfloat16 a, float_status *s) +{ + return bfloat16_to_int32_scalbn(a, float_round_to_zero, 0, s); +} + +int64_t bfloat16_to_int64_round_to_zero(bfloat16 a, float_status *s) +{ + return bfloat16_to_int64_scalbn(a, float_round_to_zero, 0, s); +} + /* * Returns the result of converting the floating-point value `a' to * the unsigned integer format. The conversion is performed according @@ -2590,6 +2686,62 @@ uint64_t float64_to_uint64_round_to_zero(float64 a, float_status *s) return float64_to_uint64_scalbn(a, float_round_to_zero, 0, s); } +/* + * Returns the result of converting the bfloat16 value `a' to + * the unsigned integer format. + */ + +uint16_t bfloat16_to_uint16_scalbn(bfloat16 a, FloatRoundMode rmode, + int scale, float_status *s) +{ + return round_to_uint_and_pack(bfloat16_unpack_canonical(a, s), + rmode, scale, UINT16_MAX, s); +} + +uint32_t bfloat16_to_uint32_scalbn(bfloat16 a, FloatRoundMode rmode, + int scale, float_status *s) +{ + return round_to_uint_and_pack(bfloat16_unpack_canonical(a, s), + rmode, scale, UINT32_MAX, s); +} + +uint64_t bfloat16_to_uint64_scalbn(bfloat16 a, FloatRoundMode rmode, + int scale, float_status *s) +{ + return round_to_uint_and_pack(bfloat16_unpack_canonical(a, s), + rmode, scale, UINT64_MAX, s); +} + +uint16_t bfloat16_to_uint16(bfloat16 a, float_status *s) +{ + return bfloat16_to_uint16_scalbn(a, s->float_rounding_mode, 0, s); +} + +uint32_t bfloat16_to_uint32(bfloat16 a, float_status *s) +{ + return bfloat16_to_uint32_scalbn(a, s->float_rounding_mode, 0, s); +} + +uint64_t bfloat16_to_uint64(bfloat16 a, float_status *s) +{ + return bfloat16_to_uint64_scalbn(a, s->float_rounding_mode, 0, s); +} + +uint16_t bfloat16_to_uint16_round_to_zero(bfloat16 a, float_status *s) +{ + return bfloat16_to_uint16_scalbn(a, float_round_to_zero, 0, s); +} + +uint32_t bfloat16_to_uint32_round_to_zero(bfloat16 a, float_status *s) +{ + return bfloat16_to_uint32_scalbn(a, float_round_to_zero, 0, s); +} + +uint64_t bfloat16_to_uint64_round_to_zero(bfloat16 a, float_status *s) +{ + return bfloat16_to_uint64_scalbn(a, float_round_to_zero, 0, s); +} + /* * Integer to float conversions * @@ -2721,6 +2873,41 @@ float64 int16_to_float64(int16_t a, float_status *status) return int64_to_float64_scalbn(a, 0, status); } +/* + * Returns the result of converting the two's complement integer `a' + * to the bfloat16 format. + */ + +bfloat16 int64_to_bfloat16_scalbn(int64_t a, int scale, float_status *status) +{ + FloatParts pa = int_to_float(a, scale, status); + return bfloat16_round_pack_canonical(pa, status); +} + +bfloat16 int32_to_bfloat16_scalbn(int32_t a, int scale, float_status *status) +{ + return int64_to_bfloat16_scalbn(a, scale, status); +} + +bfloat16 int16_to_bfloat16_scalbn(int16_t a, int scale, float_status *status) +{ + return int64_to_bfloat16_scalbn(a, scale, status); +} + +bfloat16 int64_to_bfloat16(int64_t a, float_status *status) +{ + return int64_to_bfloat16_scalbn(a, 0, status); +} + +bfloat16 int32_to_bfloat16(int32_t a, float_status *status) +{ + return int64_to_bfloat16_scalbn(a, 0, status); +} + +bfloat16 int16_to_bfloat16(int16_t a, float_status *status) +{ + return int64_to_bfloat16_scalbn(a, 0, status); +} /* * Unsigned Integer to float conversions @@ -2851,6 +3038,42 @@ float64 uint16_to_float64(uint16_t a, float_status *status) return uint64_to_float64_scalbn(a, 0, status); } +/* + * Returns the result of converting the unsigned integer `a' to the + * bfloat16 format. + */ + +bfloat16 uint64_to_bfloat16_scalbn(uint64_t a, int scale, float_status *status) +{ + FloatParts pa = uint_to_float(a, scale, status); + return bfloat16_round_pack_canonical(pa, status); +} + +bfloat16 uint32_to_bfloat16_scalbn(uint32_t a, int scale, float_status *status) +{ + return uint64_to_bfloat16_scalbn(a, scale, status); +} + +bfloat16 uint16_to_bfloat16_scalbn(uint16_t a, int scale, float_status *status) +{ + return uint64_to_bfloat16_scalbn(a, scale, status); +} + +bfloat16 uint64_to_bfloat16(uint64_t a, float_status *status) +{ + return uint64_to_bfloat16_scalbn(a, 0, status); +} + +bfloat16 uint32_to_bfloat16(uint32_t a, float_status *status) +{ + return uint64_to_bfloat16_scalbn(a, 0, status); +} + +bfloat16 uint16_to_bfloat16(uint16_t a, float_status *status) +{ + return uint64_to_bfloat16_scalbn(a, 0, status); +} + /* Float Min/Max */ /* min() and max() functions. These can't be implemented as * 'compare and pick one input' because that would mishandle From patchwork Sun Aug 30 02:32:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 248723 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp2299670ilg; Sat, 29 Aug 2020 19:35:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxJfLfCkXDpDhgHzWjG70DbDhp5q2nVRf9F6oLgVmHhH174UifQSniIDmaUMDtoiH1bu9p1 X-Received: by 2002:a25:af05:: with SMTP id a5mr11133884ybh.411.1598754914470; Sat, 29 Aug 2020 19:35:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1598754914; cv=none; d=google.com; s=arc-20160816; b=tUue2uwKWKth9AMdSal6PH7zzNFO9HjSfFhU+HC/lFuJj9K2FtNn7v/RjH5DiSY3k4 mkkNuIrSvZg25al5aGigNkdNTa2H80wGDS0XuVWBOkVbHRlY+AW9CeEvXxvTkzZoD0Q8 3O6a+n2foyP+lh4VKRChG57d/xZtELwxMR7KEGTMbJqnmvJ9XnprCwfL+IGXKSSxcmuB gAq4QwpGTj2fk8w2cvcY8Zhc74ShObdLXBqaSqOvAY4gJvn9TpArfwSCx7GkWkcsF6UF N6FYJpx5PC8CxZ6QQzAOkDLQRhoFP38WOREopYm4qDUB3xsCnvoRAk5Cdsq7fnR9coJw +4cg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=3gEElP2a5vebEo0iaIMnucOEoCEL2rO6ZaUClQLywK4=; b=U0+e/BYFQnvTSjbWKTMj8z/TGa3SaR32TwjwCV+B1HurltgW5/2S81whc0k8hB+ulc nK7/7BvP/wva0/gcTo4MkbDCboSQ3CksDh7OeHT73/t2Otj8X8TrUTe/Nb416iGz1ALI D7XBgqhSSG2r8miZdQmUXxkxq4uJuWfMmKy5CKuBfzdvzSHZklo6Kxa0BbrYPqla1Hpp C6bf+4wzkTaP3tnZi15cWEduwH1xGOZ76ozOxgAlhPlqX4MLeR3Nw7aGeC6Dpy8fX9iT IobpEi2XCzxkiilgttIayxzO4LhadavB51cBhngI4pj/a0+MhVgTV+Rtl0wU/YsdNrU6 m/Qg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KehiPrlt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, LIU Zhiwei Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: LIU Zhiwei Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Message-Id: <20200813071421.2509-4-zhiwei_liu@c-sky.com> [rth: Fix merge conflict with NO_SIGNALING_NANS; use bool for predicates.] Signed-off-by: Richard Henderson --- include/fpu/softfloat.h | 48 ++++++++++++++++++++++++++++++++++ fpu/softfloat-specialize.c.inc | 38 +++++++++++++++++++++++++++ 2 files changed, 86 insertions(+) -- 2.25.1 diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 95f0789a92..1233f98014 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -423,9 +423,57 @@ bfloat16 bfloat16_sqrt(bfloat16, float_status *status); FloatRelation bfloat16_compare(bfloat16, bfloat16, float_status *status); FloatRelation bfloat16_compare_quiet(bfloat16, bfloat16, float_status *status); +bool bfloat16_is_quiet_nan(bfloat16, float_status *status); +bool bfloat16_is_signaling_nan(bfloat16, float_status *status); bfloat16 bfloat16_silence_nan(bfloat16, float_status *status); bfloat16 bfloat16_default_nan(float_status *status); +static inline bool bfloat16_is_any_nan(bfloat16 a) +{ + return ((a & ~0x8000) > 0x7F80); +} + +static inline bool bfloat16_is_neg(bfloat16 a) +{ + return a >> 15; +} + +static inline bool bfloat16_is_infinity(bfloat16 a) +{ + return (a & 0x7fff) == 0x7F80; +} + +static inline bool bfloat16_is_zero(bfloat16 a) +{ + return (a & 0x7fff) == 0; +} + +static inline bool bfloat16_is_zero_or_denormal(bfloat16 a) +{ + return (a & 0x7F80) == 0; +} + +static inline bool bfloat16_is_normal(bfloat16 a) +{ + return (((a >> 7) + 1) & 0xff) >= 2; +} + +static inline bfloat16 bfloat16_abs(bfloat16 a) +{ + /* Note that abs does *not* handle NaN specially, nor does + * it flush denormal inputs to zero. + */ + return a & 0x7fff; +} + +static inline bfloat16 bfloat16_chs(bfloat16 a) +{ + /* Note that chs does *not* handle NaN specially, nor does + * it flush denormal inputs to zero. + */ + return a ^ 0x8000; +} + static inline bfloat16 bfloat16_set_sign(bfloat16 a, int sign) { return (a & 0x7fff) | (sign << 15); diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index dc4ea33c09..c2f87addb2 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -265,6 +265,25 @@ bool float16_is_quiet_nan(float16 a_, float_status *status) } } +/*---------------------------------------------------------------------------- +| Returns 1 if the bfloat16 value `a' is a quiet +| NaN; otherwise returns 0. +*----------------------------------------------------------------------------*/ + +bool bfloat16_is_quiet_nan(bfloat16 a_, float_status *status) +{ + if (no_signaling_nans(status)) { + return bfloat16_is_any_nan(a_); + } else { + uint16_t a = a_; + if (snan_bit_is_one(status)) { + return (((a >> 6) & 0x1FF) == 0x1FE) && (a & 0x3F); + } else { + return ((a >> 6) & 0x1FF) == 0x1FF; + } + } +} + /*---------------------------------------------------------------------------- | Returns 1 if the half-precision floating-point value `a' is a signaling | NaN; otherwise returns 0. @@ -284,6 +303,25 @@ bool float16_is_signaling_nan(float16 a_, float_status *status) } } +/*---------------------------------------------------------------------------- +| Returns 1 if the bfloat16 value `a' is a signaling +| NaN; otherwise returns 0. +*----------------------------------------------------------------------------*/ + +bool bfloat16_is_signaling_nan(bfloat16 a_, float_status *status) +{ + if (no_signaling_nans(status)) { + return 0; + } else { + uint16_t a = a_; + if (snan_bit_is_one(status)) { + return ((a >> 6) & 0x1FF) == 0x1FF; + } else { + return (((a >> 6) & 0x1FF) == 0x1FE) && (a & 0x3F); + } + } +} + /*---------------------------------------------------------------------------- | Returns 1 if the single-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, LIU Zhiwei Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: LIU Zhiwei Signed-off-by: Richard Henderson --- include/fpu/softfloat.h | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) -- 2.25.1 diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 1233f98014..78ad5ca738 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -479,6 +479,47 @@ static inline bfloat16 bfloat16_set_sign(bfloat16 a, int sign) return (a & 0x7fff) | (sign << 15); } +static inline bool bfloat16_eq(bfloat16 a, bfloat16 b, float_status *s) +{ + return bfloat16_compare(a, b, s) == float_relation_equal; +} + +static inline bool bfloat16_le(bfloat16 a, bfloat16 b, float_status *s) +{ + return bfloat16_compare(a, b, s) <= float_relation_equal; +} + +static inline bool bfloat16_lt(bfloat16 a, bfloat16 b, float_status *s) +{ + return bfloat16_compare(a, b, s) < float_relation_equal; +} + +static inline bool bfloat16_unordered(bfloat16 a, bfloat16 b, float_status *s) +{ + return bfloat16_compare(a, b, s) == float_relation_unordered; +} + +static inline bool bfloat16_eq_quiet(bfloat16 a, bfloat16 b, float_status *s) +{ + return bfloat16_compare_quiet(a, b, s) == float_relation_equal; +} + +static inline bool bfloat16_le_quiet(bfloat16 a, bfloat16 b, float_status *s) +{ + return bfloat16_compare_quiet(a, b, s) <= float_relation_equal; +} + +static inline bool bfloat16_lt_quiet(bfloat16 a, bfloat16 b, float_status *s) +{ + return bfloat16_compare_quiet(a, b, s) < float_relation_equal; +} + +static inline bool bfloat16_unordered_quiet(bfloat16 a, bfloat16 b, + float_status *s) +{ + return bfloat16_compare_quiet(a, b, s) == float_relation_unordered; +} + #define bfloat16_zero 0 #define bfloat16_half 0x3f00 #define bfloat16_one 0x3f80