From patchwork Tue May 26 23:33:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 246645 List-Id: U-Boot discussion From: festevam at gmail.com (Fabio Estevam) Date: Tue, 26 May 2020 20:33:46 -0300 Subject: [PATCH v3 1/5] imx8mp_evk: spl: drop useless code Message-ID: <20200526233350.25190-1-festevam@gmail.com> From: Peng Fan Drop useless getting ccm device, there is no need to explicted do this in board code, and we not enable SPL CLK currently. Signed-off-by: Peng Fan Signed-off-by: Fabio Estevam --- Changes since v2: - None. Rebased against U-Boot master board/freescale/imx8mp_evk/spl.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index cd5b32c3f8..f2cc177757 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -29,11 +29,6 @@ #include #include -#include -#include -#include -#include - DECLARE_GLOBAL_DATA_PTR; int spl_board_boot_device(enum boot_device boot_dev_spl) @@ -48,16 +43,7 @@ void spl_dram_init(void) void spl_board_init(void) { - struct udevice *dev; - int ret; - puts("Normal Boot\n"); - - ret = uclass_get_device_by_name(UCLASS_CLK, - "clock-controller at 30380000", - &dev); - if (ret < 0) - printf("Failed to find clock node. Check device tree\n"); } #define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE) From patchwork Tue May 26 23:33:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 246646 List-Id: U-Boot discussion From: festevam at gmail.com (Fabio Estevam) Date: Tue, 26 May 2020 20:33:47 -0300 Subject: [PATCH v3 2/5] imx8mp_evk: spl: drop timer_init In-Reply-To: <20200526233350.25190-1-festevam@gmail.com> References: <20200526233350.25190-1-festevam@gmail.com> Message-ID: <20200526233350.25190-2-festevam@gmail.com> From: Peng Fan timer_init has been invoked in arch_cpu_init, no need to invoke it again in board code. Signed-off-by: Peng Fan Signed-off-by: Fabio Estevam --- Changes since v2: - None. Rebased against U-Boot master board/freescale/imx8mp_evk/spl.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index 3f9e6fcc8f..3b3112077a 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -118,8 +118,6 @@ void board_init_f(ulong dummy) board_early_init_f(); - timer_init(); - preloader_console_init(); /* Clear the BSS. */ From patchwork Tue May 26 23:33:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 246647 List-Id: U-Boot discussion From: festevam at gmail.com (Fabio Estevam) Date: Tue, 26 May 2020 20:33:48 -0300 Subject: [PATCH v3 3/5] imx8mp_evk: spl: use spl_early_init In-Reply-To: <20200526233350.25190-1-festevam@gmail.com> References: <20200526233350.25190-1-festevam@gmail.com> Message-ID: <20200526233350.25190-3-festevam@gmail.com> From: Peng Fan Use spl_early_init to replace spl_init, spl_init will be invoked in board_init_r, we only need use spl_early_init to setup malloc and scan early dt. Signed-off-by: Peng Fan Signed-off-by: Fabio Estevam --- Changes since v2: - None. Rebased against U-Boot master board/freescale/imx8mp_evk/spl.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index 3b3112077a..6fc3df5aee 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -118,17 +118,17 @@ void board_init_f(ulong dummy) board_early_init_f(); - preloader_console_init(); - - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - - ret = spl_init(); + ret = spl_early_init(); if (ret) { debug("spl_init() failed: %d\n", ret); hang(); } + preloader_console_init(); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + enable_tzc380(); setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); From patchwork Tue May 26 23:33:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 246648 List-Id: U-Boot discussion From: festevam at gmail.com (Fabio Estevam) Date: Tue, 26 May 2020 20:33:49 -0300 Subject: [PATCH v3 4/5] imx8mp_evk: spl: no need the code since spl framework could do that In-Reply-To: <20200526233350.25190-1-festevam@gmail.com> References: <20200526233350.25190-1-festevam@gmail.com> Message-ID: <20200526233350.25190-4-festevam@gmail.com> From: Peng Fan We no need invoke the code, since spl framework could help us do that. Signed-off-by: Peng Fan Signed-off-by: Fabio Estevam --- Changes since v2: - None. Rebased against U-Boot master board/freescale/imx8mp_evk/spl.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index 6fc3df5aee..f9aa0b0826 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -108,6 +108,7 @@ int board_fit_config_name_match(const char *name) } #endif +/* Do not use BSS area in this phase */ void board_init_f(ulong dummy) { int ret; @@ -126,9 +127,6 @@ void board_init_f(ulong dummy) preloader_console_init(); - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - enable_tzc380(); setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); @@ -137,6 +135,4 @@ void board_init_f(ulong dummy) /* DDR initialization */ spl_dram_init(); - - board_init_r(NULL, 0); } From patchwork Tue May 26 23:33:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 246649 List-Id: U-Boot discussion From: festevam at gmail.com (Fabio Estevam) Date: Tue, 26 May 2020 20:33:50 -0300 Subject: [PATCH v3 5/5] imx: imx8mp_evk: fix boot issue In-Reply-To: <20200526233350.25190-1-festevam@gmail.com> References: <20200526233350.25190-1-festevam@gmail.com> Message-ID: <20200526233350.25190-5-festevam@gmail.com> From: Peng Fan The u-boot-spl.bin pad with ddr firmware conflicts with the CONFIG_MALLOC_F_ADDR area, the ddr firmware will be overwritten by malloc in SPL stage and cause ddr initialization not able to finish. So update the related addresses to fix the issue. Reported-by: Fabio Estevam Signed-off-by: Peng Fan Signed-off-by: Fabio Estevam --- Changes since v2: - None. Rebased against U-Boot master configs/imx8mp_evk_defconfig | 3 ++- include/configs/imx8mp_evk.h | 12 +++++------- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 44b2935f69..3189b2ad99 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -4,7 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x40200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_SYS_I2C_MXC_I2C1=y diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index b346154fb3..7f38f21c09 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -24,16 +24,14 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" -#define CONFIG_SPL_STACK 0x990000 -#define CONFIG_SPL_BSS_START_ADDR 0x0095e000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ +#define CONFIG_SPL_STACK 0x960000 +#define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 +#define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ #define CONFIG_SYS_ICACHE_OFF #define CONFIG_SYS_DCACHE_OFF -#define CONFIG_MALLOC_F_ADDR 0x940000 - #define CONFIG_SPL_ABORT_ON_RAW_IMAGE #undef CONFIG_DM_MMC