From patchwork Mon May 4 10:41:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Tan, Ley Foon" X-Patchwork-Id: 244970 List-Id: U-Boot discussion From: ley.foon.tan at intel.com (Ley Foon Tan) Date: Mon, 4 May 2020 18:41:55 +0800 Subject: [PATCH] cache: l2x0: Fix missing write to Auxiliary Control Register Message-ID: <20200504104155.51123-1-ley.foon.tan@intel.com> commit f62782fb2999 ("cache: l2x0: Fix write to incorrect shared-override bit") Commit above removed writel to regs->pl310_aux_ctrl by accidentally, restore it back. Signed-off-by: Ley Foon Tan --- drivers/cache/cache-l2x0.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/cache/cache-l2x0.c b/drivers/cache/cache-l2x0.c index 226824c2832e..a1556fbf1740 100644 --- a/drivers/cache/cache-l2x0.c +++ b/drivers/cache/cache-l2x0.c @@ -36,6 +36,8 @@ static void l2c310_of_parse_and_init(struct udevice *dev) if (dev_read_bool(dev, "arm,shared-override")) saved_reg |= L310_SHARED_ATT_OVERRIDE_ENABLE; + writel(saved_reg, ®s->pl310_aux_ctrl); + saved_reg = readl(®s->pl310_tag_latency_ctrl); if (!dev_read_u32_array(dev, "arm,tag-latency", tag, 3)) saved_reg |= L310_LATENCY_CTRL_RD(tag[0] - 1) |