From patchwork Wed Mar 18 09:50:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 243795 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 18 Mar 2020 10:50:15 +0100 Subject: [PATCH 1/2] net: dwc_eth_qos: implement reset-gpios for stm32 Message-ID: <20200318095016.19942-1-patrick.delaunay@st.com> From: Christophe Roullier Add management of property "reset-gpios" in the node identified by "phy-handle" to configure any GPIO used to reset the PHY. Signed-off-by: Christophe Roullier Reviewed-by: Patrice CHOTARD Reviewed-by: Patrick DELAUNAY Signed-off-by: Patrick Delaunay --- drivers/net/dwc_eth_qos.c | 53 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 0564bebf76..4796659216 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -694,6 +694,29 @@ static int eqos_start_resets_tegra186(struct udevice *dev) static int eqos_start_resets_stm32(struct udevice *dev) { + struct eqos_priv *eqos = dev_get_priv(dev); + int ret; + + debug("%s(dev=%p):\n", __func__, dev); + if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) { + ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1); + if (ret < 0) { + pr_err("dm_gpio_set_value(phy_reset, assert) failed: %d", + ret); + return ret; + } + + udelay(2); + + ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 0); + if (ret < 0) { + pr_err("dm_gpio_set_value(phy_reset, deassert) failed: %d", + ret); + return ret; + } + } + debug("%s: OK\n", __func__); + return 0; } @@ -709,6 +732,18 @@ static int eqos_stop_resets_tegra186(struct udevice *dev) static int eqos_stop_resets_stm32(struct udevice *dev) { + struct eqos_priv *eqos = dev_get_priv(dev); + int ret; + + if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) { + ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1); + if (ret < 0) { + pr_err("dm_gpio_set_value(phy_reset, assert) failed: %d", + ret); + return ret; + } + } + return 0; } @@ -1604,6 +1639,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev) struct eqos_priv *eqos = dev_get_priv(dev); int ret; phy_interface_t interface; + struct ofnode_phandle_args phandle_args; debug("%s(dev=%p):\n", __func__, dev); @@ -1641,6 +1677,20 @@ static int eqos_probe_resources_stm32(struct udevice *dev) if (ret) pr_warn("No phy clock provided %d", ret); + ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, + &phandle_args); + if (!ret) { + /* search "reset-gpios" in phy node */ + ret = gpio_request_by_name_nodev(phandle_args.node, + "reset-gpios", 0, + &eqos->phy_reset_gpio, + GPIOD_IS_OUT | + GPIOD_IS_OUT_ACTIVE); + if (ret) + pr_warn("gpio_request_by_name(phy reset) not provided %d", + ret); + } + debug("%s: OK\n", __func__); return 0; @@ -1704,6 +1754,9 @@ static int eqos_remove_resources_stm32(struct udevice *dev) if (clk_valid(&eqos->clk_ck)) clk_free(&eqos->clk_ck); + if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) + dm_gpio_free(dev, &eqos->phy_reset_gpio); + debug("%s: OK\n", __func__); return 0; } From patchwork Wed Mar 18 09:50:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 243796 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 18 Mar 2020 10:50:16 +0100 Subject: [PATCH 2/2] net: dwc_eth_qos: implement phy reg and max-speed for stm32 In-Reply-To: <20200318095016.19942-1-patrick.delaunay@st.com> References: <20200318095016.19942-1-patrick.delaunay@st.com> Message-ID: <20200318095016.19942-2-patrick.delaunay@st.com> Add management of property "reg" to configure @ of phy and also "max-speed" property to specify maximum speed in Mbit/s supported by the device Signed-off-by: Christophe Roullier Reviewed-by: Patrick DELAUNAY Signed-off-by: Patrick Delaunay --- drivers/net/dwc_eth_qos.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 4796659216..63f2086dec 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -306,6 +306,8 @@ struct eqos_priv { struct clk clk_slave_bus; struct mii_dev *mii; struct phy_device *phy; + int phyaddr; + u32 max_speed; void *descs; struct eqos_desc *tx_descs; struct eqos_desc *rx_descs; @@ -1081,12 +1083,21 @@ static int eqos_start(struct udevice *dev) * don't need to reconnect/reconfigure again */ if (!eqos->phy) { - eqos->phy = phy_connect(eqos->mii, -1, dev, + eqos->phy = phy_connect(eqos->mii, eqos->phyaddr, dev, eqos->config->interface(dev)); if (!eqos->phy) { pr_err("phy_connect() failed"); goto err_stop_resets; } + + if (eqos->max_speed) { + ret = phy_set_supported(eqos->phy, eqos->max_speed); + if (ret) { + pr_err("phy_set_supported() failed: %d", ret); + goto err_shutdown_phy; + } + } + ret = phy_config(eqos->phy); if (ret < 0) { pr_err("phy_config() failed: %d", ret); @@ -1654,6 +1665,8 @@ static int eqos_probe_resources_stm32(struct udevice *dev) if (ret) return -EINVAL; + eqos->max_speed = dev_read_u32_default(dev, "max-speed", 0); + ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus); if (ret) { pr_err("clk_get_by_name(master_bus) failed: %d", ret); @@ -1677,6 +1690,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev) if (ret) pr_warn("No phy clock provided %d", ret); + eqos->phyaddr = -1; ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, &phandle_args); if (!ret) { @@ -1689,6 +1703,9 @@ static int eqos_probe_resources_stm32(struct udevice *dev) if (ret) pr_warn("gpio_request_by_name(phy reset) not provided %d", ret); + + eqos->phyaddr = ofnode_read_u32_default(phandle_args.node, + "reg", -1); } debug("%s: OK\n", __func__);