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X-Received-From: 2607:f8b0:400d:c0d::232 Subject: [Qemu-devel] [PATCH v2 1/4] linux-user: Allow -R values up to 0xffff0000 for 32-bit ARM guests X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, riku.voipio@iki.fi Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell The 32-bit ARM validate_guest_space() check tests whether the specified -R value leaves enough space for us to put the commpage in at 0xffff0f00. However it was incorrectly doing a <= check for the check against (guest_base + guest_size), which meant that it wasn't permitting the guest space to butt right up against the commpage. Fix the comparison, so that -R values all the way up to 0xffff0000 work correctly. Reviewed-by: Emilio G. Cota Signed-off-by: Peter Maydell Message-Id: <1507047703-10774-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: Richard Henderson --- linux-user/elfload.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.13.6 diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 79062882ba..3b857fbc9c 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -377,7 +377,7 @@ static int validate_guest_space(unsigned long guest_base, * then there is no way we can allocate it. */ if (test_page_addr >= guest_base - && test_page_addr <= (guest_base + guest_size)) { + && test_page_addr < (guest_base + guest_size)) { return -1; } From patchwork Thu Oct 5 14:35:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 114948 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp669664qgn; Thu, 5 Oct 2017 07:42:14 -0700 (PDT) X-Received: by 10.237.45.199 with SMTP id i65mr32925651qtd.188.1507214534125; Thu, 05 Oct 2017 07:42:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507214534; cv=none; d=google.com; s=arc-20160816; b=WuwQtymGrHQ3G4mZwUgsBzM0BICqRQfYAZMh/5DuLBh2Oq3GNIS4Zzw16wN+Mqo31/ GJZpdEwIt+8ZWhC08EcafRs2Z+Ibyk9EQ2/y8P+L5Ev5/JbIQiWLfkZyZ5GOi160WQG/ Phn/rQwiH7B15kvWmGsbwOJeeiuDxAj/+hza7DhDq0488gMUZMyeTqBvifF0FZ2Cllf0 WqOBN6WO4ISrmUy3hL9XnpFLvpkEmKZp/okBfWXNgmt+XwbV3dOXYEJ75chjHw4pHoC+ k7VmR/KoOC/25HAgsimAJZYNbjQXltc8NOJvuub9j6FCXTnLxizEDju1vZuuYXB4YoKz 9HkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=IlVJtg7jsV6bcBya3yYGZw68nCz70QiaFT1rPAbZNd4=; b=GKh4rbbw4XYG++oXy7y7W1Y2HPUF1zLY+/iv1K5+HlA/eLag7rKnNWnxMG8uvd8gvO 8AXq0Q05RecEcLd4++GP9S+UgQ74hqdrd2yfXAjMOQwbgNcTs1egKtBpjvux79L+35is MGsTTFCjELA7EteE7oz77Be3M/Z0U4+CnKFGqAHEw0uKU5hzKrzM+uThnJxGQfidttmU N2PrRN1KaJZxM2KIqEJEZf8uX9ELg3goDQM938rYXuhgQr82mQyZEwTTc9ee0vvY0uzB n1Bi6hQ+XflIixFJcySjAvmWpmk7IohYdM/RsoGddN+9rM/rRsHTCWZzcSaa/d5Q+3eE V+Bg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ZnIDtrm1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:400d:c0d::22c Subject: [Qemu-devel] [PATCH v2 2/4] tcg: Fix off-by-one in assert in page_set_flags X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, riku.voipio@iki.fi, Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Most of the users of page_set_flags offset (page, page + len) as the end points. One might consider this an error, since the other users do supply an endpoint as the last byte of the region. However, the first thing that page_set_flags does is round end UP to the start of the next page. Which means computing page + len - 1 is in the end pointless. Therefore, accept this usage and do not assert when given the exact size of the vm as the endpoint. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20170708025030.15845-2-rth@twiddle.net> --- accel/tcg/translate-all.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.13.6 diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 2d1ed06065..ebfc2e7024 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -2090,7 +2090,7 @@ void page_set_flags(target_ulong start, target_ulong end, int flags) guest address space. If this assert fires, it probably indicates a missing call to h2g_valid. */ #if TARGET_ABI_BITS > L1_MAP_ADDR_SPACE_BITS - assert(end < ((target_ulong)1 << L1_MAP_ADDR_SPACE_BITS)); + assert(end <= ((target_ulong)1 << L1_MAP_ADDR_SPACE_BITS)); #endif assert(start < end); assert_memory_lock(); From patchwork Thu Oct 5 14:36:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 114943 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp664060qgn; Thu, 5 Oct 2017 07:36:37 -0700 (PDT) X-Received: by 10.237.57.135 with SMTP id m7mr23756175qte.4.1507214197475; Thu, 05 Oct 2017 07:36:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507214197; cv=none; d=google.com; s=arc-20160816; b=BfKohOBElthgY1WbmI9Ma7FM0ZDMRRUDFEHxngt6zO+9PCyzFBrsLOqTziISyixEPU +VwE9eTfqsK6CTsVSiVn9j5n+aWbDFNqLzGCPKgFH+2b51X+sPj0LTx4hjw0qZIkTk6T PW3DIGMwKDWNhkToThm4vmY/ku5si58Uwx4hmbbacRVcOmoMaNpoLdoPzZA6st6tr79k 3xJzJ5wd92IkTZ30AmGiti+N2XB7VX6bv6PXpx3/ulFowUziGcYe5bKldulRCkO2IFrC ZJPA3B+o1T3kbAn2WTpYyYiWnwVA2qbUlwjvXFeFz803Aea5iD9RHA3JPoJm51PyUHlJ bH+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=8MPya8y2mIfaj5u/2uwzfaPNBjR97VQyGpq6Qna7SJw=; b=WFUr/tIMzzCts4+JdXH0cf2HN/MN8v4JEE/0vITvA/6T7I8S+O0s/mHoUIwD1EBQ0N q83tfSlTNgpbpEdBOpIfX6WYzu1j3nutwq38wRPrqI/KM075PCn7YhjXy4wpPJZ0CAPS mIl67fpTF1CgTGTvSLxDWpf9+Me6xRWSZlexxgIkoSO0+ORK9i8nmaAE21HU+EIIDDbZ Y+Nh7pgQs75a6gA2TT2RVqopdz5c9O/Wu3XN8oU1Tz22AtXCbxG9HSOmaARNbPTovM5c K3OGzLJmODXsVh8p3cpVz9fgj5HQ18LtfUtll8lHkZxxNjXnIO1xOqV9yY0kSqszZS7Z 4T7Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=FyFr1A/5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:400d:c0d::236 Subject: [Qemu-devel] [PATCH v2 3/4] linux-user: Tidy and enforce reserved_va initialization X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, riku.voipio@iki.fi, Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We had a check using TARGET_VIRT_ADDR_SPACE_BITS to make sure that the allocation coming in from the command-line option was not too large, but that didn't include target-specific knowledge about other restrictions on user-space. Remove several target-specific hacks in linux-user/main.c. For MIPS and Nios, we can replace them with proper adjustments to the respective target's TARGET_VIRT_ADDR_SPACE_BITS definition. For ARM, we had no existing ifdef but I suspect that the current default value of 0xf7000000 was chosen with this in mind. Define a workable value in linux-user/arm/, and also document why the special case is required. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-Id: <20170708025030.15845-3-rth@twiddle.net> --- linux-user/arm/target_cpu.h | 4 ++++ target/mips/mips-defs.h | 6 +++++- target/nios2/cpu.h | 6 +++++- linux-user/main.c | 38 +++++++++++++++++++++++++------------- 4 files changed, 39 insertions(+), 15 deletions(-) -- 2.13.6 diff --git a/linux-user/arm/target_cpu.h b/linux-user/arm/target_cpu.h index d888219150..c3eb4b243d 100644 --- a/linux-user/arm/target_cpu.h +++ b/linux-user/arm/target_cpu.h @@ -19,6 +19,10 @@ #ifndef ARM_TARGET_CPU_H #define ARM_TARGET_CPU_H +/* We need to be able to map the commpage. + See validate_guest_space in linux-user/elfload.c. */ +#define MAX_RESERVED_VA 0xffff0000ul + static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp) { if (newsp) { diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index 047554ee45..d239069975 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -15,7 +15,11 @@ #else #define TARGET_LONG_BITS 32 #define TARGET_PHYS_ADDR_SPACE_BITS 40 -#define TARGET_VIRT_ADDR_SPACE_BITS 32 +# ifdef CONFIG_USER_ONLY +# define TARGET_VIRT_ADDR_SPACE_BITS 31 +# else +# define TARGET_VIRT_ADDR_SPACE_BITS 32 +#endif #endif /* Masks used to mark instructions to indicate which ISA level they diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 50d803a217..9119eee587 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -226,7 +226,11 @@ qemu_irq *nios2_cpu_pic_init(Nios2CPU *cpu); void nios2_check_interrupts(CPUNios2State *env); #define TARGET_PHYS_ADDR_SPACE_BITS 32 -#define TARGET_VIRT_ADDR_SPACE_BITS 32 +#ifdef CONFIG_USER_ONLY +# define TARGET_VIRT_ADDR_SPACE_BITS 31 +#else +# define TARGET_VIRT_ADDR_SPACE_BITS 32 +#endif #define cpu_init(cpu_model) cpu_generic_init(TYPE_NIOS2_CPU, cpu_model) diff --git a/linux-user/main.c b/linux-user/main.c index 829f974662..fd54d344bb 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -60,23 +60,38 @@ do { \ } \ } while (0) -#if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64) /* * When running 32-on-64 we should make sure we can fit all of the possible * guest address space into a contiguous chunk of virtual host memory. * * This way we will never overlap with our own libraries or binaries or stack * or anything else that QEMU maps. + * + * Many cpus reserve the high bit (or more than one for some 64-bit cpus) + * of the address for the kernel. Some cpus rely on this and user space + * uses the high bit(s) for pointer tagging and the like. For them, we + * must preserve the expected address space. */ -# if defined(TARGET_MIPS) || defined(TARGET_NIOS2) -/* - * MIPS only supports 31 bits of virtual address space for user space. - * Nios2 also only supports 31 bits. - */ -unsigned long reserved_va = 0x77000000; +#ifndef MAX_RESERVED_VA +# if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS +# if TARGET_VIRT_ADDR_SPACE_BITS == 32 && \ + (TARGET_LONG_BITS == 32 || defined(TARGET_ABI32)) +/* There are a number of places where we assign reserved_va to a variable + of type abi_ulong and expect it to fit. Avoid the last page. */ +# define MAX_RESERVED_VA (0xfffffffful & TARGET_PAGE_MASK) +# else +# define MAX_RESERVED_VA (1ul << TARGET_VIRT_ADDR_SPACE_BITS) +# endif # else -unsigned long reserved_va = 0xf7000000; +# define MAX_RESERVED_VA 0 # endif +#endif + +/* That said, reserving *too* much vm space via mmap can run into problems + with rlimits, oom due to page table creation, etc. We will still try it, + if directed by the command-line option, but not by default. */ +#if HOST_LONG_BITS == 64 && TARGET_VIRT_ADDR_SPACE_BITS <= 32 +unsigned long reserved_va = MAX_RESERVED_VA; #else unsigned long reserved_va; #endif @@ -3978,11 +3993,8 @@ static void handle_arg_reserved_va(const char *arg) unsigned long unshifted = reserved_va; p++; reserved_va <<= shift; - if (((reserved_va >> shift) != unshifted) -#if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS - || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS)) -#endif - ) { + if (reserved_va >> shift != unshifted + || (MAX_RESERVED_VA && reserved_va > MAX_RESERVED_VA)) { fprintf(stderr, "Reserved virtual address too big\n"); exit(EXIT_FAILURE); } From patchwork Thu Oct 5 14:36:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 114945 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp665893qgn; Thu, 5 Oct 2017 07:38:15 -0700 (PDT) X-Received: by 10.55.42.73 with SMTP id q70mr29739718qkh.337.1507214295421; Thu, 05 Oct 2017 07:38:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507214295; cv=none; d=google.com; s=arc-20160816; b=ZVkXEoTT31dvYN8BF6Z/QKvFRvEwXNqy5LDdE/3TQ7fziduSvwDnYBIO4RY8CfmAJD v5FeTQlpLG4dWecx0BVlkhAxqPBsWtIM11v2bm4VaM/8tE9Irz+awDLhJpiLf3SsjiRN MzObPaxAOqej4IgJ9hcnvBtSLpmk53hecj8NdKhcQMc5NHXggNNHqqByfdrTFddvY7Ay uDWCd9OhDsDPCG2n92wjrhevWnUnbEaAwtx/OZxRWysqzmRQA79lAutcf5XCD25L0w5r qws4fsuohhSP9FKpXIQYOhpsnoSbgGwwqOdO7+gpab/MIVZln7qv2LWnIY/wwN2ttqlC jVgQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=cXxdyWFqydMB2qOTu/4wULu4y8k6Bslrjk6HWtmobII=; b=yTKMVwRks8pVguiKYeQEUw24MjDAkr12wvh0lpeo1HMqlTxdK4HzdOPQtmNUhFrJ1/ itxY+WbmJhe+SzqPf2+B0+C7CUXM0CuZzSZEykxJfIWCN+P7wTk4U8vGJXT8ok9a97ri kuQjDSMeMKMLmYKY8uz2ZRxuHF2EjDzIrwA5hXqsfWTl2VAwlyT34OZ+n5h57kcjgOnn elZmTi8ovykH9ZjAe+5G//aq93aXcdvxSYIJ8DCNXHK2dKDa0XjVy3GnAN/bCM1C6KBs vYw+N3PgqVnccVLSFfVlSigG1j8WM3u451paJejUzhQLWB/667x/69izTRt2tXPM9Pna vOqQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=PpACFAvA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:400d:c0d::22f Subject: [Qemu-devel] [PATCH v2 4/4] linux-user/sh4: Reduce TARGET_VIRT_ADDR_SPACE_BITS to 31 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, riku.voipio@iki.fi, Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson The real kernel has TASK_SIZE as 0x7c000000, due to quirks with a couple of SH parts. But nominally user-space is limited to 2GB. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20170708025030.15845-4-rth@twiddle.net> --- target/sh4/cpu.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) -- 2.13.6 diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 79f85d3365..123f34783a 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -45,7 +45,11 @@ #define TARGET_PAGE_BITS 12 /* 4k XXXXX */ #define TARGET_PHYS_ADDR_SPACE_BITS 32 -#define TARGET_VIRT_ADDR_SPACE_BITS 32 +#ifdef CONFIG_USER_ONLY +# define TARGET_VIRT_ADDR_SPACE_BITS 31 +#else +# define TARGET_VIRT_ADDR_SPACE_BITS 32 +#endif #define SR_MD 30 #define SR_RB 29