From patchwork Mon Jun 8 19:20:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241929 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:10 -0600 Subject: [PATCH 01/15] dm: core Fix long line in device_bind_common() In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608192024.21484-2-sjg@chromium.org> Fix an over-length line in this function. Signed-off-by: Simon Glass --- drivers/core/device.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/core/device.c b/drivers/core/device.c index a7408d9c76..2e3d555ea4 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -82,7 +82,8 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv, * This is just a 'requested' sequence, and will be * resolved (and ->seq updated) when the device is probed. */ - if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) { + if (CONFIG_IS_ENABLED(OF_CONTROL) && + !CONFIG_IS_ENABLED(OF_PLATDATA)) { if (uc->uc_drv->name && ofnode_valid(node)) dev_read_alias_seq(dev, &dev->req_seq); #if CONFIG_IS_ENABLED(OF_PRIOR_STAGE) From patchwork Mon Jun 8 19:20:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241930 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:11 -0600 Subject: [PATCH 02/15] .gitignore: Ignore Python 3 cache directories In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608192024.21484-3-sjg@chromium.org> These can appear when moving between branches that have different tools in the tree. Ignore them. Signed-off-by: Simon Glass --- .gitignore | 3 +++ 1 file changed, 3 insertions(+) diff --git a/.gitignore b/.gitignore index 2e1c8bf2bf..e66aa864da 100644 --- a/.gitignore +++ b/.gitignore @@ -92,3 +92,6 @@ GTAGS *.orig *~ \#*# + +# Python cache +__pycache__ From patchwork Mon Jun 8 19:20:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241931 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:12 -0600 Subject: [PATCH 03/15] binman: cbfs: Fix IFWI typo In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608132017.3.I390daad82d0e9245051a74d1435e7984a2041173@changeid> This comment references the wrong thing. Fix it. Signed-off-by: Simon Glass --- tools/binman/etype/cbfs.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/binman/etype/cbfs.py b/tools/binman/etype/cbfs.py index e9aed8310c..744a32fa0c 100644 --- a/tools/binman/etype/cbfs.py +++ b/tools/binman/etype/cbfs.py @@ -204,7 +204,7 @@ class Entry_cbfs(Entry): return True def _ReadSubnodes(self): - """Read the subnodes to find out what should go in this IFWI""" + """Read the subnodes to find out what should go in this CBFS""" for node in self._node.subnodes: entry = Entry.Create(self, node) entry.ReadNode() From patchwork Mon Jun 8 19:20:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241932 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:13 -0600 Subject: [PATCH 04/15] binman: Correct the search patch for pylibfdt In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608132017.4.Ifa800055795ac558a5c26ce7f6a7a6a0094981d7@changeid> Now that binman uses tools/ as its base directory for importing modules, the path to the pylibfdt build by U-Boot is incorrect. Fix it. Signed-off-by: Simon Glass --- tools/binman/main.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/binman/main.py b/tools/binman/main.py index efa7fa8386..4194761f9e 100755 --- a/tools/binman/main.py +++ b/tools/binman/main.py @@ -25,7 +25,7 @@ sys.path.insert(2, os.path.join(our_path, '..')) from patman import test_util # Bring in the libfdt module -sys.path.insert(2, 'scripts/dtc/pylibfdt') +sys.path.insert(2, os.path.join(our_path, '../../scripts/dtc/pylibfdt')) sys.path.insert(2, os.path.join(our_path, '../../build-sandbox_spl/scripts/dtc/pylibfdt')) From patchwork Mon Jun 8 19:20:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241933 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:14 -0600 Subject: [PATCH 05/15] binman: Add support for calling mkimage In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608132017.5.Idde6d137e558e196e1565d755a8fb16712e5ab17@changeid> As a first step to integrating mkimage into binman, add a new entry type that feeds data into mkimage for processing and incorporates that output into the image. Signed-off-by: Simon Glass --- tools/binman/README.entries | 23 ++++++++++++ tools/binman/etype/_testing.py | 5 +++ tools/binman/etype/mkimage.py | 62 +++++++++++++++++++++++++++++++ tools/binman/ftest.py | 7 ++++ tools/binman/test/156_mkimage.dts | 23 ++++++++++++ 5 files changed, 120 insertions(+) create mode 100644 tools/binman/etype/mkimage.py create mode 100644 tools/binman/test/156_mkimage.dts diff --git a/tools/binman/README.entries b/tools/binman/README.entries index 6a816bba6b..4f2c48fdc2 100644 --- a/tools/binman/README.entries +++ b/tools/binman/README.entries @@ -587,6 +587,29 @@ See README.x86 for information about Intel binary blobs. +Entry: mkimage: Entry containing a binary produced by mkimage +------------------------------------------------------------- + +Properties / Entry arguments: + - datafile: Filename for -d argument + - args: Other arguments to pass + +The data passed to mkimage is collected from subnodes of the mkimage node, +e.g.: + + mkimage { + args = "-n test -T imximage"; + + u-boot-spl { + }; + }; + +This calls mkimage to create an imximage with u-boot-spl.bin as the input +file. The output from mkimage then becomes part of the image produced by +binman. + + + Entry: powerpc-mpc85xx-bootpg-resetvec: PowerPC mpc85xx bootpg + resetvec code for U-Boot ----------------------------------------------------------------------------------------- diff --git a/tools/binman/etype/_testing.py b/tools/binman/etype/_testing.py index ed718eed14..ea60561adb 100644 --- a/tools/binman/etype/_testing.py +++ b/tools/binman/etype/_testing.py @@ -57,6 +57,8 @@ class Entry__testing(Entry): 'return-contents-once') self.bad_update_contents_twice = fdt_util.GetBool(self._node, 'bad-update-contents-twice') + self.return_contents_later = fdt_util.GetBool(self._node, + 'return-contents-later') # Set to True when the entry is ready to process the FDT. self.process_fdt_ready = False @@ -83,6 +85,9 @@ class Entry__testing(Entry): def ObtainContents(self): if self.return_unknown_contents or not self.return_contents: return False + if self.return_contents_later: + self.return_contents_later = False + return False self.data = self.contents self.contents_size = len(self.data) if self.return_contents_once: diff --git a/tools/binman/etype/mkimage.py b/tools/binman/etype/mkimage.py new file mode 100644 index 0000000000..1aa563963a --- /dev/null +++ b/tools/binman/etype/mkimage.py @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (c) 2016 Google, Inc +# Written by Simon Glass +# +# Entry-type module for producing an image using mkimage +# + +from collections import OrderedDict + +from binman.entry import Entry +from dtoc import fdt_util +from patman import tools + +class Entry_mkimage(Entry): + """Entry containing a binary produced by mkimage + + Properties / Entry arguments: + - datafile: Filename for -d argument + - args: Other arguments to pass + + The data passed to mkimage is collected from subnodes of the mkimage node, + e.g.: + + mkimage { + args = "-n test -T imximage"; + + u-boot-spl { + }; + }; + + This calls mkimage to create an imximage with u-boot-spl.bin as the input + file. The output from mkimage then becomes part of the image produced by + binman. + """ + def __init__(self, section, etype, node): + Entry.__init__(self, section, etype, node) + self._args = fdt_util.GetString(self._node, 'args').split(' ') + self._mkimage_entries = OrderedDict() + self._ReadSubnodes() + + def ObtainContents(self): + data = b'' + for entry in self._mkimage_entries.values(): + # First get the input data and put it in a file. If not available, + # try later. + if not entry.ObtainContents(): + return False + data += entry.GetData() + uniq = self.GetUniqueName() + input_fname = tools.GetOutputFilename('mkimage.%s' % uniq) + tools.WriteFile(input_fname, data) + output_fname = tools.GetOutputFilename('mkimage-out.%s' % uniq) + tools.Run('mkimage', '-d', input_fname, *self._args, output_fname) + self.SetContents(tools.ReadFile(output_fname)) + return True + + def _ReadSubnodes(self): + """Read the subnodes to find out what should go in this image""" + for node in self._node.subnodes: + entry = Entry.Create(self, node) + entry.ReadNode() + self._mkimage_entries[entry.name] = entry diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 5e24920088..39e67b9042 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -3357,6 +3357,13 @@ class TestFunctional(unittest.TestCase): data = self._DoReadFile('154_intel_fsp_t.dts') self.assertEqual(FSP_T_DATA, data[:len(FSP_T_DATA)]) + def testMkimage(self): + """Test using mkimage to build an image""" + data = self._DoReadFile('156_mkimage.dts') + + # Just check that the data appears in the file somewhere + self.assertIn(U_BOOT_SPL_DATA, data) + if __name__ == "__main__": unittest.main() diff --git a/tools/binman/test/156_mkimage.dts b/tools/binman/test/156_mkimage.dts new file mode 100644 index 0000000000..933b13143a --- /dev/null +++ b/tools/binman/test/156_mkimage.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + size = <0x80>; + + mkimage { + args = "-n test -T script"; + + u-boot-spl { + }; + + _testing { + return-contents-later; + }; + }; + }; +}; From patchwork Mon Jun 8 19:20:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241934 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:15 -0600 Subject: [PATCH 06/15] binman: Fix a few typos in the entry docs In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608132017.6.Iac1bf290bd0b5b7b04bbfc5a09f6d337b03565b3@changeid> Some typos have been fixed in the code but the entry docs were not regenerated. Fix this. Signed-off-by: Simon Glass --- tools/binman/README.entries | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/binman/README.entries b/tools/binman/README.entries index 4f2c48fdc2..d5b4b3af2b 100644 --- a/tools/binman/README.entries +++ b/tools/binman/README.entries @@ -519,7 +519,7 @@ Properties / Entry arguments: This file contains code used by the SoC that is required to make it work. The Management Engine is like a background task that runs things that are -not clearly documented, but may include keyboard, display and network +not clearly documented, but may include keyboard, deplay and network access. For platform that use ME it is not possible to disable it. U-Boot does not directly execute code in the ME binary. @@ -616,7 +616,7 @@ Entry: powerpc-mpc85xx-bootpg-resetvec: PowerPC mpc85xx bootpg + resetvec code f Properties / Entry arguments: - filename: Filename of u-boot-br.bin (default 'u-boot-br.bin') -This entry is valid for PowerPC mpc85xx cpus. This entry holds +This enrty is valid for PowerPC mpc85xx cpus. This entry holds 'bootpg + resetvec' code for PowerPC mpc85xx CPUs which needs to be placed at offset 'RESET_VECTOR_ADDRESS - 0xffc'. From patchwork Mon Jun 8 19:20:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241935 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:16 -0600 Subject: [PATCH 07/15] binman: Adjust pylibfdt for incremental build In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608192024.21484-4-sjg@chromium.org> If the pylibfdt shared-object file is detected, then Python assumes that the libfdt.py file exists also. Sometimes when an incremental build aborts, the shared-object file is built but the libfdt.py is not. The only way out at this point is to use 'make mkproper', or similar. Fix this by removing the .so file before it is built. This seems to make Python rebuild everything. Signed-off-by: Simon Glass --- scripts/dtc/pylibfdt/Makefile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/scripts/dtc/pylibfdt/Makefile b/scripts/dtc/pylibfdt/Makefile index 42342c75bb..84b68ae3da 100644 --- a/scripts/dtc/pylibfdt/Makefile +++ b/scripts/dtc/pylibfdt/Makefile @@ -24,6 +24,9 @@ quiet_cmd_pymod = PYMOD $@ $(PYTHON3) $< --quiet build_ext --inplace $(obj)/_libfdt.so: $(src)/setup.py $(PYLIBFDT_srcs) FORCE + # Remove the library since otherwise Python doesn't seem to regenerate + # the libfdt.py file if it is missing. + rm -f $(obj)/_libfdt*.so $(call if_changed,pymod) always += _libfdt.so From patchwork Mon Jun 8 19:20:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241936 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:17 -0600 Subject: [PATCH 08/15] x86: rockchip: Change how selection of ROMs works In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608192024.21484-5-sjg@chromium.org> Most x86 boards build a u-boot.rom which is programmed into SPI flash. But this is not unique to x86. For example some rockchip boards can also boot from SPI flash. Also, at least on x86, binary blobs are sadly quite common. It is not possible to build a functional image without them, and U-Boot needs to know this at build time. Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary blobs are also needed. If they are not needed, it is safe to build the ROM always. Otherwise we still require the BUILD_ROM environment variable. For now this affects only x86, but future patches will enable this for rockchip too. Signed-off-by: Simon Glass --- Kconfig | 18 +++++++++++++++++- Makefile | 17 ++++++++++++----- arch/Kconfig | 1 + arch/x86/Kconfig | 4 ++++ 4 files changed, 34 insertions(+), 6 deletions(-) diff --git a/Kconfig b/Kconfig index 0e7ccc0b07..876c5db911 100644 --- a/Kconfig +++ b/Kconfig @@ -240,9 +240,25 @@ config PHYS_64BIT This can be used not only for 64bit SoCs, but also for large physical address extension on 32bit SoCs. +config HAS_ROM + bool + select BINMAN + help + Enables building of a u-boot.rom target. This collects U-Boot and + any necessary binary blobs. + +config ROM_NEEDS_BLOBS + bool + depends on HAS_ROM + help + Enable this if building the u-boot.rom target needs binary blobs, and + so cannot be done normally. In this case, pass BUILD_ROM=1 to make + to tell U-Boot to build the ROM. + config BUILD_ROM bool "Build U-Boot as BIOS replacement" - depends on X86 + depends on HAS_ROM + default y if !ROM_NEEDS_BLOBS help This option allows to build a ROM version of U-Boot. The build process generally requires several binary blobs diff --git a/Makefile b/Makefile index db3b6b9991..d46338a6a4 100644 --- a/Makefile +++ b/Makefile @@ -916,9 +916,12 @@ ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf ALL-$(CONFIG_EFI_APP) += u-boot-app.efi ALL-$(CONFIG_EFI_STUB) += u-boot-payload.efi +ifneq ($(CONFIG_HAS_ROM),) ifneq ($(BUILD_ROM)$(CONFIG_BUILD_ROM),) -ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom +ALL-y += u-boot.rom endif +endif + ifeq ($(CONFIG_SYS_COREBOOT)$(CONFIG_SPL),yy) ALL-$(CONFIG_BINMAN) += u-boot-x86-with-spl.bin endif @@ -1580,7 +1583,7 @@ endif # reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in # the middle. This is handled by binman based on an image description in the # board's device tree. -ifneq ($(CONFIG_X86_RESET_VECTOR),) +ifneq ($(CONFIG_HAS_ROM),) rom: u-boot.rom FORCE refcode.bin: $(srctree)/board/$(BOARDDIR)/refcode.bin FORCE @@ -1590,11 +1593,12 @@ quiet_cmd_ldr = LD $@ cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \ $(filter-out FORCE,$^) -o $@ -u-boot.rom: u-boot-x86-start16.bin u-boot-x86-reset16.bin u-boot.bin \ +rom-deps := u-boot.bin +ifdef CONFIG_X86 +rom-deps += u-boot-x86-start16.bin u-boot-x86-reset16.bin \ $(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \ $(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin) \ - $(if $(CONFIG_HAVE_REFCODE),refcode.bin) FORCE - $(call if_changed,binman) + $(if $(CONFIG_HAVE_REFCODE),refcode.bin) OBJCOPYFLAGS_u-boot-x86-start16.bin := -O binary -j .start16 u-boot-x86-start16.bin: u-boot FORCE @@ -1603,6 +1607,9 @@ u-boot-x86-start16.bin: u-boot FORCE OBJCOPYFLAGS_u-boot-x86-reset16.bin := -O binary -j .resetvec u-boot-x86-reset16.bin: u-boot FORCE $(call if_changed,objcopy) + +u-boot.rom: $(rom-deps) FORCE + $(call if_changed,binman) endif ifneq ($(CONFIG_ARCH_SUNXI),) diff --git a/arch/Kconfig b/arch/Kconfig index a11f872938..bc85e5b50b 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -160,6 +160,7 @@ config X86 select TIMER select USE_PRIVATE_LIBGCC select X86_TSC_TIMER + select HAS_ROM if X86_RESET_VECTOR imply BLK imply CMD_DM imply CMD_FPGA_LOADMK diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index c8eae24c07..c688c46475 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -360,6 +360,8 @@ config HAVE_FSP bool "Add an Firmware Support Package binary" depends on !EFI select USE_HOB + select HAS_ROM + select ROM_NEEDS_BLOBS help Select this option to add an Firmware Support Package binary to the resulting U-Boot image. It is a binary blob which U-Boot uses @@ -519,6 +521,8 @@ config ENABLE_MRC_CACHE config HAVE_MRC bool "Add a System Agent binary" + select HAS_ROM + select ROM_NEEDS_BLOBS depends on !HAVE_FSP help Select this option to add a System Agent binary to From patchwork Mon Jun 8 19:20:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241937 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:18 -0600 Subject: [PATCH 09/15] rockchip: Allow Bob to use SPI boot In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608192024.21484-6-sjg@chromium.org> Bob is a Chromebook and can boot from SPI flash. Add it to the condition check for this. Signed-off-by: Simon Glass --- arch/arm/mach-rockchip/spl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index cddf4fd3d5..f148d48b6a 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -54,7 +54,8 @@ u32 spl_boot_device(void) #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \ - defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) + defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) || \ + defined(CONFIG_TARGET_CHROMEBOOK_BOB) return BOOT_DEVICE_SPI; #endif if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) From patchwork Mon Jun 8 19:20:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241939 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:19 -0600 Subject: [PATCH 10/15] Allow building .rom files for non-x86 boards In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608192024.21484-7-sjg@chromium.org> Some non-x86 devices can use SPI flash to boot and need to produce images of a fixed size to program the flash. Add a way to handle this for non-x86 boards. Signed-off-by: Simon Glass --- Makefile | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Makefile b/Makefile index d46338a6a4..b2fde0b98d 100644 --- a/Makefile +++ b/Makefile @@ -1608,6 +1608,19 @@ OBJCOPYFLAGS_u-boot-x86-reset16.bin := -O binary -j .resetvec u-boot-x86-reset16.bin: u-boot FORCE $(call if_changed,objcopy) +else # !CONFIG_X86 + +ifdef CONFIG_SPL +rom-deps += spl/u-boot-spl.bin +rom-deps += u-boot.img +endif + +ifdef CONFIG_TPL +rom-deps += tpl/u-boot-tpl.bin +endif + +endif + u-boot.rom: $(rom-deps) FORCE $(call if_changed,binman) endif From patchwork Mon Jun 8 19:20:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241938 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:20 -0600 Subject: [PATCH 11/15] rockchip: jerry: Add serial support In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608192024.21484-8-sjg@chromium.org> This option allows the serial console to work correctly. Add it. Signed-off-by: Simon Glass --- configs/chromebook_jerry_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 443e3cdace..7f772b828f 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -85,6 +85,7 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_ROCKCHIP_SERIAL=y CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_ROCKCHIP=y From patchwork Mon Jun 8 19:20:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241940 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:21 -0600 Subject: [PATCH 12/15] rockchip: bob: Support SPI-flash booting In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608192024.21484-9-sjg@chromium.org> Update the config for chromebook_bob to support booting from SPI flash. The existing SPL size is too small since ATF is needed, so double it. Signed-off-by: Simon Glass --- configs/chromebook_bob_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 4f606e7ec9..8df4bbc197 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_ENV_OFFSET=0x3F8000 -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 @@ -40,6 +40,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y @@ -53,6 +54,7 @@ CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_DM_ETH=y From patchwork Mon Jun 8 19:20:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241941 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:22 -0600 Subject: [PATCH 13/15] rockchip: Allow including rockchip dtsi on 32-bit machines In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608192024.21484-10-sjg@chromium.org> At present this file supports only 64-bit machines. Add an #ifdef so that it can be included without problems on 32-bit machines also. Signed-off-by: Simon Glass --- arch/arm/dts/rockchip-u-boot.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi index a2559e2db0..d2542f2230 100644 --- a/arch/arm/dts/rockchip-u-boot.dtsi +++ b/arch/arm/dts/rockchip-u-boot.dtsi @@ -6,6 +6,7 @@ #include / { +#ifdef CONFIG_ARM64 binman { filename = "u-boot-rockchip.bin"; pad-byte = <0xff>; @@ -18,4 +19,5 @@ offset = ; }; }; +#endif }; From patchwork Mon Jun 8 19:20:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241942 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:23 -0600 Subject: [PATCH 14/15] rockchip: Enable building a SPI ROM image on jerry In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608192024.21484-11-sjg@chromium.org> Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot produces a ROM for jerry. Change the binman image definition to support multiple images, since it may be used to build both u-boot-rockchip.bin and u-boot.rom Signed-off-by: Simon Glass --- arch/arm/dts/rk3288-u-boot.dtsi | 24 ++++++++++++++++++++++++ arch/arm/dts/rockchip-u-boot.dtsi | 10 ++++++++-- arch/arm/mach-rockchip/rk3288/Kconfig | 1 + 3 files changed, 33 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi index 6d31735362..104a5392bf 100644 --- a/arch/arm/dts/rk3288-u-boot.dtsi +++ b/arch/arm/dts/rk3288-u-boot.dtsi @@ -12,6 +12,30 @@ }; }; +#ifdef CONFIG_HAS_ROM +&binman { + rom { + filename = "u-boot.rom"; + size = <0x400000>; + pad-byte = <0xff>; + + mkimage { + args = "-n rk3288 -T rkspi"; + u-boot-spl { + }; + }; + u-boot-img { + offset = <0x20000>; + }; + u-boot { + offset = <0x300000>; + }; + fdtmap { + }; + }; +}; +#endif + &dmc { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi index d2542f2230..c0d9a2ad55 100644 --- a/arch/arm/dts/rockchip-u-boot.dtsi +++ b/arch/arm/dts/rockchip-u-boot.dtsi @@ -6,8 +6,14 @@ #include / { + binman: binman { + multiple-images; + }; +}; + #ifdef CONFIG_ARM64 - binman { +&binman { + simple-bin { filename = "u-boot-rockchip.bin"; pad-byte = <0xff>; @@ -19,5 +25,5 @@ offset = ; }; }; -#endif }; +#endif diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index afb62fca78..dfc9da9238 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -5,6 +5,7 @@ choice config TARGET_CHROMEBOOK_JERRY bool "Google/Rockchip Veyron-Jerry Chromebook" + select HAS_ROM select BOARD_LATE_INIT help Jerry is a RK3288-based clamshell device with 2 USB 3.0 ports, From patchwork Mon Jun 8 19:20:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 241943 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 8 Jun 2020 13:20:24 -0600 Subject: [PATCH 15/15] rockchip: Enable building a SPI ROM image on bob In-Reply-To: <20200608192024.21484-1-sjg@chromium.org> References: <20200608192024.21484-1-sjg@chromium.org> Message-ID: <20200608192024.21484-12-sjg@chromium.org> Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot produces a ROM for bob. Signed-off-by: Simon Glass --- arch/arm/dts/rk3399-gru-u-boot.dtsi | 4 ++++ arch/arm/dts/rk3399-gru.dtsi | 2 +- arch/arm/dts/rk3399-u-boot.dtsi | 27 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3399/Kconfig | 1 + 4 files changed, 33 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi index 7bddc3acdb..390ac2bb5a 100644 --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi @@ -4,3 +4,7 @@ */ #include "rk3399-u-boot.dtsi" + +&spi_flash { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi index 7ac88392f2..f9c5bb607b 100644 --- a/arch/arm/dts/rk3399-gru.dtsi +++ b/arch/arm/dts/rk3399-gru.dtsi @@ -537,7 +537,7 @@ ap_i2c_audio: &i2c8 { pinctrl-names = "default", "sleep"; pinctrl-1 = <&spi1_sleep>; - spiflash at 0 { + spi_flash: spiflash at 0 { compatible = "jedec,spi-nor"; reg = <0>; diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index 8237782408..a76bbea730 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -4,11 +4,14 @@ */ #define USB_CLASS_HUB 9 +#include "rockchip-u-boot.dtsi" + / { aliases { mmc0 = &sdhci; mmc1 = &sdmmc; pci0 = &pcie0; + spi1 = &spi1; }; cic: syscon at ff620000 { @@ -57,6 +60,30 @@ }; +#ifdef CONFIG_HAS_ROM +&binman { + rom { + filename = "u-boot.rom"; + size = <0x400000>; + pad-byte = <0xff>; + + mkimage { + args = "-n rk3399 -T rkspi"; + u-boot-spl { + }; + }; + u-boot-img { + offset = <0x40000>; + }; + u-boot { + offset = <0x300000>; + }; + fdtmap { + }; + }; +}; +#endif + &cru { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index 254b9c5b4d..8b91d4713d 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -5,6 +5,7 @@ choice config TARGET_CHROMEBOOK_BOB bool "Asus Flip C101PA Chromebook (RK3399)" + select HAS_ROM help Bob is a small RK3299-based device similar in apperance to Minnie. It has two USB 3.0 type-C ports, 4GB of SDRAM, WiFi and a 10.1",