From patchwork Sun Jun  7 18:36:12 2020
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X-Patchwork-Submitter: Patrick Wildt <patrick@blueri.se>
X-Patchwork-Id: 241879
List-Id: U-Boot discussion <u-boot.lists.denx.de>
From: patrick at blueri.se (Patrick Wildt)
Date: Sun, 7 Jun 2020 20:36:12 +0200
Subject: rockchip: correctly set vop0 or vop1
Message-ID: <20200607183612.GA82210@ryzen.blueri.se>

The EDP_LCDC_SEL bit has to be set correctly to select vop0 or
vop1, but so far we have set it in both conditions, which is not
correct.

Can someone verify this is the correct way round?  vop1 -> set,
vop0 -> clear?

Signed-off-by: Patrick Wildt <patrick at blueri.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c
index 92188be9275..000bd481408 100644
--- a/drivers/video/rockchip/rk_edp.c
+++ b/drivers/video/rockchip/rk_edp.c
@@ -1062,7 +1062,8 @@ static int rk_edp_probe(struct udevice *dev)
 	rk_setreg(&priv->grf->soc_con12, 1 << 4);
 
 	/* select epd signal from vop0 or vop1 */
-	rk_setreg(&priv->grf->soc_con6, (vop_id == 1) ? (1 << 5) : (1 << 5));
+	rk_clrsetreg(&priv->grf->soc_con6, (1 << 5),
+	    (vop_id == 1) ? (1 << 5) : (0 << 5));
 
 	rockchip_edp_wait_hpd(priv);