From patchwork Thu Jan 23 11:54:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pedro Jardim X-Patchwork-Id: 239965 List-Id: U-Boot discussion From: jardim.c.pedro at gmail.com (Pedro Jardim) Date: Thu, 23 Jan 2020 08:54:07 -0300 Subject: [PATCH] mx6sxsabresd: Convert to DM_ETH Message-ID: <20200123115407.16581-1-jardim.c.pedro@gmail.com> This fixes the following warning Reviewed-by: Fabio Estevam ===================== WARNING ====================== This board does not use CONFIG_DM_ETH (Driver Model for Ethernet drivers). Please update the board to use CONFIG_DM_ETH before the v2020.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. ==================================================== Signed-off-by: Pedro Jardim --- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 27 +------------------- configs/mx6sxsabresd_defconfig | 5 ++++ include/configs/mx6sxsabresd.h | 11 --------- 3 files changed, 6 insertions(+), 36 deletions(-) diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 9fff8ffc4c..e2a88cc8e0 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include "../common/pfuze.h" @@ -69,22 +68,6 @@ static iomux_v3_cfg_t const uart1_pads[] = { static iomux_v3_cfg_t const wdog_b_pad = { MX6_PAD_GPIO1_IO13__GPIO1_IO_13 | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; -static iomux_v3_cfg_t const fec1_pads[] = { - MX6_PAD_ENET1_MDC__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET1_MDIO__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII1_RX_CTL__ENET1_RX_EN | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX6_PAD_RGMII1_RD0__ENET1_RX_DATA_0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX6_PAD_RGMII1_RD1__ENET1_RX_DATA_1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX6_PAD_RGMII1_RD2__ENET1_RX_DATA_2 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX6_PAD_RGMII1_RD3__ENET1_RX_DATA_3 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX6_PAD_RGMII1_RXC__ENET1_RX_CLK | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX6_PAD_RGMII1_TX_CTL__ENET1_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII1_TD0__ENET1_TX_DATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII1_TD1__ENET1_TX_DATA_1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII1_TD2__ENET1_TX_DATA_2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII1_TD3__ENET1_TX_DATA_3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII1_TXC__ENET1_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), -}; static iomux_v3_cfg_t const peri_3v3_pads[] = { MX6_PAD_QSPI1A_DATA0__GPIO4_IO_16 | MUX_PAD_CTRL(NO_PAD_CTRL), @@ -139,14 +122,6 @@ static int setup_fec(void) return 0; } -int board_eth_init(bd_t *bis) -{ - imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads)); - setup_fec(); - - return cpu_eth_init(bis); -} - int power_init_board(void) { struct udevice *dev; @@ -297,6 +271,7 @@ int board_init(void) #ifdef CONFIG_VIDEO_MXS setup_lcd(); #endif + setup_fec(); return 0; } diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 8ffc6d1035..801c9b8003 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -68,3 +68,8 @@ CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_VIDEO=y +CONFIG_FEC_MXC=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_RGMII=y diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 55aace1c6e..498795d3c4 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -148,17 +148,6 @@ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_SPEED 100000 -/* Network */ -#define CONFIG_FEC_MXC - -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_MXC_PHYADDR 0x1 - -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" - -#define CONFIG_PHY_ATHEROS - #ifdef CONFIG_CMD_USB #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)