From patchwork Fri Jan 10 07:35:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfgang Wallner X-Patchwork-Id: 239369 List-Id: U-Boot discussion From: wolfgang.wallner at br-automation.com (Wolfgang Wallner) Date: Fri, 10 Jan 2020 08:35:11 +0100 Subject: [PATCH 1/3] gpio: intel_gpio: Pass pinctrl device to pcr_clrsetbits32() In-Reply-To: <20200110073513.19472-1-wolfgang.wallner@br-automation.com> References: <20200110073513.19472-1-wolfgang.wallner@br-automation.com> Message-ID: <20200110073513.19472-2-wolfgang.wallner@br-automation.com> The function pcr_clrsetbits32() expects a device with a P2SB parent device. The currently passed device 'dev' is a gpio-controller with a device 'pinctrl' as parent. This does not match the expectations of pcr_clrsetbits32(). But he 'pinctrl'-device has a P2SB as parent. Pass the 'pinctrl' device instead of the 'dev' device to pcr_clrsetbits32(). Signed-off-by: Wolfgang Wallner Reviewed-by: Simon Glass --- drivers/gpio/intel_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c index 4bf1c9ddc4..db63115628 100644 --- a/drivers/gpio/intel_gpio.c +++ b/drivers/gpio/intel_gpio.c @@ -39,7 +39,7 @@ static int intel_gpio_direction_output(struct udevice *dev, uint offset, struct udevice *pinctrl = dev_get_parent(dev); uint config_offset = intel_pinctrl_get_config_reg_addr(pinctrl, offset); - pcr_clrsetbits32(dev, config_offset, + pcr_clrsetbits32(pinctrl, config_offset, PAD_CFG0_MODE_MASK | PAD_CFG0_RX_STATE | PAD_CFG0_TX_DISABLE, PAD_CFG0_MODE_GPIO | PAD_CFG0_RX_DISABLE | From patchwork Fri Jan 10 07:35:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfgang Wallner X-Patchwork-Id: 239370 List-Id: U-Boot discussion From: wolfgang.wallner at br-automation.com (Wolfgang Wallner) Date: Fri, 10 Jan 2020 08:35:12 +0100 Subject: [PATCH 2/3] gpio: intel_gpio: Clear tx state bit when setting output In-Reply-To: <20200110073513.19472-1-wolfgang.wallner@br-automation.com> References: <20200110073513.19472-1-wolfgang.wallner@br-automation.com> Message-ID: <20200110073513.19472-3-wolfgang.wallner@br-automation.com> Add missing 'PAD_CFG0_TX_STATE' to the clear mask for pcr_clrsetbits32(). Otherwise this bit cannot be cleared again after it has been set once. Signed-off-by: Wolfgang Wallner Reviewed-by: Simon Glass --- drivers/gpio/intel_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c index db63115628..ec1a315ae2 100644 --- a/drivers/gpio/intel_gpio.c +++ b/drivers/gpio/intel_gpio.c @@ -41,7 +41,7 @@ static int intel_gpio_direction_output(struct udevice *dev, uint offset, pcr_clrsetbits32(pinctrl, config_offset, PAD_CFG0_MODE_MASK | PAD_CFG0_RX_STATE | - PAD_CFG0_TX_DISABLE, + PAD_CFG0_TX_DISABLE | PAD_CFG0_TX_STATE, PAD_CFG0_MODE_GPIO | PAD_CFG0_RX_DISABLE | (value ? PAD_CFG0_TX_STATE : 0)); From patchwork Fri Jan 10 07:35:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfgang Wallner X-Patchwork-Id: 239371 List-Id: U-Boot discussion From: wolfgang.wallner at br-automation.com (Wolfgang Wallner) Date: Fri, 10 Jan 2020 08:35:13 +0100 Subject: [PATCH 3/3] gpio: intel_gpio: Fix register/bit offsets intel_gpio_get_value() In-Reply-To: <20200110073513.19472-1-wolfgang.wallner@br-automation.com> References: <20200110073513.19472-1-wolfgang.wallner@br-automation.com> Message-ID: <20200110073513.19472-4-wolfgang.wallner@br-automation.com> Fix the following in intel_gpio_get_value(): * The value of the register is contained in the variable 'reg', not in 'mode'. The variable 'mode' contains only the configuration whether the gpio is currently an input or an output. * The correct bitmasks for the input and output value are PAD_CFG0_RX_STATE and PAD_CFG0_TX_STATE. Use them instead of the currently used PAD_CFG0_RX_STATE_BIT and PAD_CFG0_TX_STATE_BIT. Signed-off-by: Wolfgang Wallner Reviewed-by: Simon Glass --- drivers/gpio/intel_gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c index ec1a315ae2..ef47b92ca4 100644 --- a/drivers/gpio/intel_gpio.c +++ b/drivers/gpio/intel_gpio.c @@ -59,9 +59,9 @@ static int intel_gpio_get_value(struct udevice *dev, uint offset) if (!mode) { rx_tx = reg & (PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE); if (rx_tx == PAD_CFG0_TX_DISABLE) - return mode & PAD_CFG0_RX_STATE_BIT ? 1 : 0; + return reg & PAD_CFG0_RX_STATE ? 1 : 0; else if (rx_tx == PAD_CFG0_RX_DISABLE) - return mode & PAD_CFG0_TX_STATE_BIT ? 1 : 0; + return reg & PAD_CFG0_TX_STATE ? 1 : 0; } return 0;