From patchwork Tue Jan 7 19:14:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philippe REYNES X-Patchwork-Id: 239214 List-Id: U-Boot discussion From: philippe.reynes at softathome.com (Philippe Reynes) Date: Tue, 7 Jan 2020 20:14:10 +0100 Subject: [PATCH 1/8] bcm68360: add initial support Message-ID: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> This add the initial support of the broadcom bcm68360 SoC family. Signed-off-by: Philippe Reynes --- arch/arm/Kconfig | 6 ++ arch/arm/dts/bcm68360.dtsi | 217 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 223 insertions(+) create mode 100644 arch/arm/dts/bcm68360.dtsi diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 36c9c2f..17f7454 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -622,6 +622,12 @@ config ARCH_BCM63158 select OF_CONTROL imply CMD_DM +config ARCH_BCM68360 + bool "Broadcom BCM68360 family" + select DM + select OF_CONTROL + imply CMD_DM + config ARCH_BCM6858 bool "Broadcom BCM6858 family" select DM diff --git a/arch/arm/dts/bcm68360.dtsi b/arch/arm/dts/bcm68360.dtsi new file mode 100644 index 0000000..7bbe207 --- /dev/null +++ b/arch/arm/dts/bcm68360.dtsi @@ -0,0 +1,217 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Philippe Reynes + */ + +#include "skeleton64.dtsi" + +/ { + compatible = "brcm,bcm68360"; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + spi0 = &hsspi; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + u-boot,dm-pre-reloc; + + cpu0: cpu at 0 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <0x0 0x0>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + cpu1: cpu at 1 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <0x0 0x1>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + l2: l2-cache0 { + compatible = "cache"; + u-boot,dm-pre-reloc; + }; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + u-boot,dm-pre-reloc; + + periph_osc: periph-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + u-boot,dm-pre-reloc; + }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_osc>; + clock-mult = <2>; + clock-div = <1>; + }; + + refclk50mhz: refclk50mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + }; + + ubus { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + u-boot,dm-pre-reloc; + + wdt1: watchdog at ff800480 { + compatible = "brcm,bcm6345-wdt"; + reg = <0x0 0xff800480 0x0 0x14>; + clocks = <&refclk50mhz>; + }; + + wdt2: watchdog at ff8004c0 { + compatible = "brcm,bcm6345-wdt"; + reg = <0x0 0xff8004c0 0x0 0x14>; + clocks = <&refclk50mhz>; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdt1>; + }; + + uart0: serial at ff800640 { + compatible = "brcm,bcm6345-uart"; + reg = <0x0 0xff800640 0x0 0x18>; + clocks = <&periph_osc>; + + status = "disabled"; + }; + + leds: led-controller at ff800800 { + compatible = "brcm,bcm6858-leds"; + reg = <0x0 0xff800800 0x0 0xe4>; + + status = "disabled"; + }; + + gpio0: gpio-controller at 0xff800500 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x0 0xff800500 0x0 0x4>, + <0x0 0xff800520 0x0 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio1: gpio-controller at 0xff800504 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x0 0xff800504 0x0 0x4>, + <0x0 0xff800524 0x0 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio2: gpio-controller at 0xff800508 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x0 0xff800508 0x0 0x4>, + <0x0 0xff800528 0x0 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio3: gpio-controller at 0xff80050c { + compatible = "brcm,bcm6345-gpio"; + reg = <0x0 0xff80050c 0x0 0x4>, + <0x0 0xff80052c 0x0 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio4: gpio-controller at 0xff800510 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x0 0xff800510 0x0 0x4>, + <0x0 0xff800530 0x0 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio5: gpio-controller at 0xff800514 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x0 0xff800514 0x0 0x4>, + <0x0 0xff800534 0x0 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio6: gpio-controller at 0xff800518 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x0 0xff800518 0x0 0x4>, + <0x0 0xff800538 0x0 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio7: gpio-controller at 0xff80051c { + compatible = "brcm,bcm6345-gpio"; + reg = <0x0 0xff80051c 0x0 0x4>, + <0x0 0xff80053c 0x0 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + hsspi: spi-controller at ff801000 { + compatible = "brcm,bcm6328-hsspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0xff801000 0x0 0x600>; + clocks = <&hsspi_pll>, <&hsspi_pll>; + clock-names = "hsspi", "pll"; + spi-max-frequency = <100000000>; + num-cs = <8>; + + status = "disabled"; + }; + + nand: nand-controller at ff801800 { + compatible = "brcm,nand-bcm68360", + "brcm,brcmnand-v5.0", + "brcm,brcmnand"; + reg-names = "nand", "nand-int-base", "nand-cache"; + reg = <0x0 0xff801800 0x0 0x180>, + <0x0 0xff802000 0x0 0x10>, + <0x0 0xff801c00 0x0 0x200>; + parameter-page-big-endian = <0>; + + status = "disabled"; + }; + }; +}; From patchwork Tue Jan 7 19:14:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philippe REYNES X-Patchwork-Id: 239213 List-Id: U-Boot discussion From: philippe.reynes at softathome.com (Philippe Reynes) Date: Tue, 7 Jan 2020 20:14:11 +0100 Subject: [PATCH 2/8] watchdog: bcm6345: allow to use this driver on arm bcm68360 In-Reply-To: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> References: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> Message-ID: <1578424457-9787-2-git-send-email-philippe.reynes@softathome.com> This IP is also used on some arm SoC, so we allow to use it on arm bcm68360 too. Signed-off-by: Philippe Reynes --- drivers/watchdog/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 8c16d69..2b8064d 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -85,7 +85,8 @@ config WDT_AT91 config WDT_BCM6345 bool "BCM6345 watchdog timer support" - depends on WDT && (ARCH_BMIPS || ARCH_BCM6858 || ARCH_BCM63158) + depends on WDT && (ARCH_BMIPS || ARCH_BCM68360 || \ + ARCH_BCM6858 || ARCH_BCM63158) help Select this to enable watchdog timer for BCM6345 SoCs. The watchdog timer is stopped when initialized. From patchwork Tue Jan 7 19:14:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philippe REYNES X-Patchwork-Id: 239219 List-Id: U-Boot discussion From: philippe.reynes at softathome.com (Philippe Reynes) Date: Tue, 7 Jan 2020 20:14:12 +0100 Subject: [PATCH 3/8] spi: bcm63xx-hsspi: allow to use this driver on arm bcm68360 In-Reply-To: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> References: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> Message-ID: <1578424457-9787-3-git-send-email-philippe.reynes@softathome.com> This IP is also used on some arm SoC, so we allow to use it on arm bcm68360 too. Signed-off-by: Philippe Reynes --- drivers/spi/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index fae2040..73d1a69 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -84,7 +84,8 @@ config ATMEL_SPI config BCM63XX_HSSPI bool "BCM63XX HSSPI driver" - depends on (ARCH_BMIPS || ARCH_BCM6858 || ARCH_BCM63158) + depends on (ARCH_BMIPS || ARCH_BCM68360 || \ + ARCH_BCM6858 || ARCH_BCM63158) help Enable the BCM6328 HSSPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Broadcom From patchwork Tue Jan 7 19:14:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philippe REYNES X-Patchwork-Id: 239216 List-Id: U-Boot discussion From: philippe.reynes at softathome.com (Philippe Reynes) Date: Tue, 7 Jan 2020 20:14:13 +0100 Subject: [PATCH 4/8] nand: brcmnand: add bcm68360 support In-Reply-To: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> References: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> Message-ID: <1578424457-9787-4-git-send-email-philippe.reynes@softathome.com> This adds the nand support for chipset bcm68360. Signed-off-by: Philippe Reynes --- drivers/mtd/nand/raw/Kconfig | 6 ++ drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c | 123 ++++++++++++++++++++++++++ 3 files changed, 130 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 16165f8..158bb1b 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -78,6 +78,12 @@ config NAND_BRCMNAND_6368 help Enable support for broadcom nand driver on bcm6368. +config NAND_BRCMNAND_68360 + bool "Support Broadcom NAND controller on bcm68360" + depends on NAND_BRCMNAND && ARCH_BCM68360 + help + Enable support for broadcom nand driver on bcm68360. + config NAND_BRCMNAND_6838 bool "Support Broadcom NAND controller on bcm6838" depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838 diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index 7e70b85..5d9e7e3 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_NAND_BRCMNAND_6368) += bcm6368_nand.o obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o +obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o obj-$(CONFIG_NAND_BRCMNAND) += brcmnand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c new file mode 100644 index 0000000..0f1a28e --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "brcmnand.h" + +struct bcm68360_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define BCM68360_NAND_INT 0x00 +#define BCM68360_NAND_STATUS_SHIFT 0 +#define BCM68360_NAND_STATUS_MASK (0xfff << BCM68360_NAND_STATUS_SHIFT) + +#define BCM68360_NAND_INT_EN 0x04 +#define BCM68360_NAND_ENABLE_SHIFT 0 +#define BCM68360_NAND_ENABLE_MASK (0xffff << BCM68360_NAND_ENABLE_SHIFT) + +enum { + BCM68360_NP_READ = BIT(0), + BCM68360_BLOCK_ERASE = BIT(1), + BCM68360_COPY_BACK = BIT(2), + BCM68360_PAGE_PGM = BIT(3), + BCM68360_CTRL_READY = BIT(4), + BCM68360_DEV_RBPIN = BIT(5), + BCM68360_ECC_ERR_UNC = BIT(6), + BCM68360_ECC_ERR_CORR = BIT(7), +}; + +static bool bcm68360_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcm68360_nand_soc *priv = + container_of(soc, struct bcm68360_nand_soc, soc); + void __iomem *mmio = priv->base + BCM68360_NAND_INT; + u32 val = brcmnand_readl(mmio); + + if (val & (BCM68360_CTRL_READY << BCM68360_NAND_STATUS_SHIFT)) { + /* Ack interrupt */ + val &= ~BCM68360_NAND_STATUS_MASK; + val |= BCM68360_CTRL_READY << BCM68360_NAND_STATUS_SHIFT; + brcmnand_writel(val, mmio); + return true; + } + + return false; +} + +static void bcm68360_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcm68360_nand_soc *priv = + container_of(soc, struct bcm68360_nand_soc, soc); + void __iomem *mmio = priv->base + BCM68360_NAND_INT_EN; + u32 val = brcmnand_readl(mmio); + + /* Don't ack any interrupts */ + val &= ~BCM68360_NAND_STATUS_MASK; + + if (en) + val |= BCM68360_CTRL_READY << BCM68360_NAND_ENABLE_SHIFT; + else + val &= ~(BCM68360_CTRL_READY << BCM68360_NAND_ENABLE_SHIFT); + + brcmnand_writel(val, mmio); +} + +static int bcm68360_nand_probe(struct udevice *dev) +{ + struct udevice *pdev = dev; + struct bcm68360_nand_soc *priv = dev_get_priv(dev); + struct brcmnand_soc *soc; + struct resource res; + + soc = &priv->soc; + + dev_read_resource_byname(pdev, "nand-int-base", &res); + priv->base = devm_ioremap(dev, res.start, resource_size(&res)); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + soc->ctlrdy_ack = bcm68360_nand_intc_ack; + soc->ctlrdy_set_enabled = bcm68360_nand_intc_set; + + /* Disable and ack all interrupts */ + brcmnand_writel(0, priv->base + BCM68360_NAND_INT_EN); + brcmnand_writel(0, priv->base + BCM68360_NAND_INT); + + return brcmnand_probe(pdev, soc); +} + +static const struct udevice_id bcm68360_nand_dt_ids[] = { + { + .compatible = "brcm,nand-bcm68360", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(bcm68360_nand) = { + .name = "bcm68360-nand", + .id = UCLASS_MTD, + .of_match = bcm68360_nand_dt_ids, + .probe = bcm68360_nand_probe, + .priv_auto_alloc_size = sizeof(struct bcm68360_nand_soc), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_GET_DRIVER(bcm68360_nand), &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize %s. (error %d)\n", dev->name, + ret); +} From patchwork Tue Jan 7 19:14:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philippe REYNES X-Patchwork-Id: 239218 List-Id: U-Boot discussion From: philippe.reynes at softathome.com (Philippe Reynes) Date: Tue, 7 Jan 2020 20:14:14 +0100 Subject: [PATCH 5/8] led: bcm6858: allow to use this driver on arm bcm68360 In-Reply-To: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> References: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> Message-ID: <1578424457-9787-5-git-send-email-philippe.reynes@softathome.com> This IP is also used on some arm SoC, so we allow to use it on arm bcm68360 too. Signed-off-by: Philippe Reynes --- drivers/led/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index 5643939..6675934 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -30,7 +30,7 @@ config LED_BCM6358 config LED_BCM6858 bool "LED Support for BCM6858" - depends on LED && (ARCH_BCM6858 || ARCH_BCM63158) + depends on LED && (ARCH_BCM68360 || ARCH_BCM6858 || ARCH_BCM63158) help This option enables support for LEDs connected to the BCM6858 HW has blinking capabilities and up to 32 LEDs can be controlled. From patchwork Tue Jan 7 19:14:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philippe REYNES X-Patchwork-Id: 239217 List-Id: U-Boot discussion From: philippe.reynes at softathome.com (Philippe Reynes) Date: Tue, 7 Jan 2020 20:14:15 +0100 Subject: [PATCH 6/8] gpio: bcm6345: allow to use this driver on arm bcm68360 In-Reply-To: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> References: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> Message-ID: <1578424457-9787-6-git-send-email-philippe.reynes@softathome.com> This IP is also used on some arm SoC, so we allow to use it on arm bcm68360 too. Signed-off-by: Philippe Reynes --- drivers/gpio/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 1de6f52..4e5a707 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -55,7 +55,8 @@ config ALTERA_PIO config BCM6345_GPIO bool "BCM6345 GPIO driver" - depends on DM_GPIO && (ARCH_BMIPS || ARCH_BCM6858 || ARCH_BCM63158) + depends on DM_GPIO && (ARCH_BMIPS || ARCH_BCM68360 || \ + ARCH_BCM6858 || ARCH_BCM63158) help This driver supports the GPIO banks on BCM6345 SoCs. From patchwork Tue Jan 7 19:14:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philippe REYNES X-Patchwork-Id: 239215 List-Id: U-Boot discussion From: philippe.reynes at softathome.com (Philippe Reynes) Date: Tue, 7 Jan 2020 20:14:16 +0100 Subject: [PATCH 7/8] gpio: do not include on ARCH_BCM68360 In-Reply-To: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> References: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> Message-ID: <1578424457-9787-7-git-send-email-philippe.reynes@softathome.com> As no gpio.h is defined for this architecture, to avoid compilation failure, do not include for arch bcm68360. Signed-off-by: Philippe Reynes --- arch/arm/include/asm/gpio.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index 6ff5f42..5b4dee0 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -1,9 +1,9 @@ #if !defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARCH_STI) && \ - !defined(CONFIG_ARCH_K3) && !defined(CONFIG_ARCH_BCM6858) && \ - !defined(CONFIG_ARCH_BCM63158) && !defined(CONFIG_ARCH_ROCKCHIP) && \ - !defined(CONFIG_ARCH_LX2160A) && !defined(CONFIG_ARCH_LS1028A) && \ - !defined(CONFIG_ARCH_LS2080A) && !defined(CONFIG_ARCH_LS1088A) && \ - !defined(CONFIG_ARCH_ASPEED) + !defined(CONFIG_ARCH_K3) && !defined(CONFIG_ARCH_BCM68360) && \ + !defined(CONFIG_ARCH_BCM6858) && !defined(CONFIG_ARCH_BCM63158) && \ + !defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_LX2160A) && \ + !defined(CONFIG_ARCH_LS1028A) && !defined(CONFIG_ARCH_LS2080A) && \ + !defined(CONFIG_ARCH_LS1088A) && !defined(CONFIG_ARCH_ASPEED) #include #endif #include From patchwork Tue Jan 7 19:14:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philippe REYNES X-Patchwork-Id: 239220 List-Id: U-Boot discussion From: philippe.reynes at softathome.com (Philippe Reynes) Date: Tue, 7 Jan 2020 20:14:17 +0100 Subject: [PATCH 8/8] bcm968360bg: add initial support In-Reply-To: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> References: <1578424457-9787-1-git-send-email-philippe.reynes@softathome.com> Message-ID: <1578424457-9787-8-git-send-email-philippe.reynes@softathome.com> This add the initial support of the broadcom reference board bcm968360bg with a bcm68360 SoC. This board has 512 MB of RAM, 256 MB of flash (nand), 2 USB port, 1 UART, and 4 ethernet ports. Signed-off-by: Philippe Reynes --- arch/arm/Kconfig | 1 + arch/arm/dts/Makefile | 3 + arch/arm/dts/bcm968360bg.dts | 168 +++++++++++++++++++++++++++++++ board/broadcom/bcm968360bg/Kconfig | 17 ++++ board/broadcom/bcm968360bg/MAINTAINERS | 6 ++ board/broadcom/bcm968360bg/Makefile | 3 + board/broadcom/bcm968360bg/bcm968360bg.c | 61 +++++++++++ configs/bcm968360bg_ram_defconfig | 53 ++++++++++ include/configs/broadcom_bcm968360bg.h | 40 ++++++++ 9 files changed, 352 insertions(+) create mode 100644 arch/arm/dts/bcm968360bg.dts create mode 100644 board/broadcom/bcm968360bg/Kconfig create mode 100644 board/broadcom/bcm968360bg/MAINTAINERS create mode 100644 board/broadcom/bcm968360bg/Makefile create mode 100644 board/broadcom/bcm968360bg/bcm968360bg.c create mode 100644 configs/bcm968360bg_ram_defconfig create mode 100644 include/configs/broadcom_bcm968360bg.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 17f7454..60e0f6e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1791,6 +1791,7 @@ source "board/armltd/vexpress64/Kconfig" source "board/broadcom/bcm23550_w1d/Kconfig" source "board/broadcom/bcm28155_ap/Kconfig" source "board/broadcom/bcm963158/Kconfig" +source "board/broadcom/bcm968360bg/Kconfig" source "board/broadcom/bcm968580xref/Kconfig" source "board/broadcom/bcmcygnus/Kconfig" source "board/broadcom/bcmnsp/Kconfig" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0127a91..92d47e7 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -816,6 +816,9 @@ dtb-$(CONFIG_ARCH_BCM283X) += \ dtb-$(CONFIG_ARCH_BCM63158) += \ bcm963158.dtb +dtb-$(CONFIG_ARCH_BCM68360) += \ + bcm968360bg.dtb + dtb-$(CONFIG_ARCH_BCM6858) += \ bcm968580xref.dtb diff --git a/arch/arm/dts/bcm968360bg.dts b/arch/arm/dts/bcm968360bg.dts new file mode 100644 index 0000000..c060294 --- /dev/null +++ b/arch/arm/dts/bcm968360bg.dts @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Philippe Reynes + */ + +/dts-v1/; + +#include "bcm68360.dtsi" + +/ { + model = "Broadcom bcm68360bg"; + compatible = "broadcom,bcm68360bg", "brcm,bcm68360"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x20000000>; + }; +}; + +&uart0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&gpio4 { + status = "okay"; +}; + +&gpio5 { + status = "okay"; +}; + +&gpio6 { + status = "okay"; +}; + +&gpio7 { + status = "okay"; +}; + +&nand { + status = "okay"; + write-protect = <0>; + #address-cells = <1>; + #size-cells = <0>; + + nandcs at 0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sector-size = <16>; + }; +}; + +&leds { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + brcm,serial-led-en-pol; + brcm,serial-led-data-ppol; + + led at 0 { + reg = <0>; + label = "red:alarm"; + }; + + led at 1 { + reg = <1>; + label = "green:wan"; + }; + + led at 2 { + reg = <2>; + label = "green:wps"; + }; + + led at 12 { + reg = <12>; + label = "orange:enet5.1"; + }; + + led at 13 { + reg = <13>; + label = "green:enet5.2"; + }; + + led at 14 { + reg = <14>; + label = "orange:enet5.2"; + }; + + led at 15 { + reg = <15>; + label = "green:enet5.1"; + }; + + led at 16 { + reg = <16>; + label = "green:usb1"; + }; + + led at 17 { + reg = <17>; + label = "green:voip1"; + }; + + led at 18 { + reg = <18>; + label = "green:voip2"; + }; + + led at 19 { + reg = <19>; + label = "green:enet6"; + }; + + led at 20 { + reg = <20>; + label = "orange:enet6"; + }; + + led at 21 { + reg = <21>; + label = "green:inet"; + }; + + led at 22 { + reg = <22>; + label = "green:usb2"; + }; +}; + +&hsspi { + status = "okay"; + + flash: mt25 at 0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <25000000>; + }; +}; diff --git a/board/broadcom/bcm968360bg/Kconfig b/board/broadcom/bcm968360bg/Kconfig new file mode 100644 index 0000000..dd372f1 --- /dev/null +++ b/board/broadcom/bcm968360bg/Kconfig @@ -0,0 +1,17 @@ +if ARCH_BCM68360 + +config SYS_VENDOR + default "broadcom" + +config SYS_BOARD + default "bcm968360bg" + +config SYS_CONFIG_NAME + default "broadcom_bcm968360bg" + +endif + +config TARGET_BCM968360BG + bool "Support Broadcom bcm968360bg" + depends on ARCH_BCM68360 + select ARM64 diff --git a/board/broadcom/bcm968360bg/MAINTAINERS b/board/broadcom/bcm968360bg/MAINTAINERS new file mode 100644 index 0000000..cfcbbc5 --- /dev/null +++ b/board/broadcom/bcm968360bg/MAINTAINERS @@ -0,0 +1,6 @@ +BCM968360BG BOARD +M: Philippe Reynes +S: Maintained +F: board/broadcom/bcm968360bg +F: include/configs/broadcom_bcm968360bg.h +F: configs/bcm968360bg_ram_defconfig diff --git a/board/broadcom/bcm968360bg/Makefile b/board/broadcom/bcm968360bg/Makefile new file mode 100644 index 0000000..d099c1c --- /dev/null +++ b/board/broadcom/bcm968360bg/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += bcm968360bg.o diff --git a/board/broadcom/bcm968360bg/bcm968360bg.c b/board/broadcom/bcm968360bg/bcm968360bg.c new file mode 100644 index 0000000..a5fbc1d --- /dev/null +++ b/board/broadcom/bcm968360bg/bcm968360bg.c @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Philippe Reynes + */ + +#include +#include +#include + +#ifdef CONFIG_ARM64 +#include + +static struct mm_region broadcom_bcm968360bg_mem_map[] = { + { + /* RAM */ + .virt = 0x00000000UL, + .phys = 0x00000000UL, + .size = 8UL * SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* SoC */ + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0xff80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = broadcom_bcm968360bg_mem_map; +#endif + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_mem_size_base() != 0) + printf("fdtdec_setup_mem_size_base() has failed\n"); + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + + return 0; +} + +int print_cpuinfo(void) +{ + return 0; +} diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig new file mode 100644 index 0000000..4a4c1fd --- /dev/null +++ b/configs/bcm968360bg_ram_defconfig @@ -0,0 +1,53 @@ +CONFIG_ARM=y +CONFIG_ARCH_BCM68360=y +CONFIG_SYS_TEXT_BASE=0x10000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_TARGET_BCM968360BG=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MTD=y +CONFIG_CMD_NAND=y +CONFIG_CMD_PART=y +CONFIG_CMD_SPI=y +CONFIG_DOS_PARTITION=y +CONFIG_ISO_PARTITION=y +CONFIG_EFI_PARTITION=y +CONFIG_DEFAULT_DEVICE_TREE="bcm968360bg" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_NET is not set +CONFIG_BLK=y +CONFIG_CLK=y +CONFIG_DM_GPIO=y +CONFIG_BCM6345_GPIO=y +CONFIG_LED=y +CONFIG_LED_BCM6858=y +CONFIG_LED_BLINK=y +# CONFIG_MMC is not set +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_BRCMNAND=y +CONFIG_NAND_BRCMNAND_68360=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_CONS_INDEX=0 +CONFIG_DM_SERIAL=y +CONFIG_SERIAL_SEARCH_ALL=y +CONFIG_BCM6345_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_BCM63XX_HSSPI=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_WDT_BCM6345=y diff --git a/include/configs/broadcom_bcm968360bg.h b/include/configs/broadcom_bcm968360bg.h new file mode 100644 index 0000000..77690ff --- /dev/null +++ b/include/configs/broadcom_bcm968360bg.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2020 Philippe Reynes + */ + +#include + +/* + * common + */ + +/* UART */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ + 230400, 500000, 1500000 } +/* Memory usage */ +#define CONFIG_SYS_MAXARGS 24 +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) + +/* + * 6858 + */ + +/* RAM */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 + +/* U-Boot */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M) +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE + +#define CONFIG_SKIP_LOWLEVEL_INIT + +#ifdef CONFIG_MTD_RAW_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_SELF_INIT +#define CONFIG_SYS_NAND_ONFI_DETECTION +#endif /* CONFIG_MTD_RAW_NAND */ + +/* + * 968360bg + */