From patchwork Mon Jan 6 12:05:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Khan X-Patchwork-Id: 239150 List-Id: U-Boot discussion From: wasim.khan at nxp.com (Wasim Khan) Date: Mon, 6 Jan 2020 12:05:57 +0000 Subject: [PATCH v4 1/4] pci: layerscape: Common device tree fixup for NXP SoCs In-Reply-To: <1578312338-15545-1-git-send-email-wasim.khan@nxp.com> References: <1578312338-15545-1-git-send-email-wasim.khan@nxp.com> Message-ID: <1578312338-15545-2-git-send-email-wasim.khan@nxp.com> Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup. Signed-off-by: Wasim Khan --- Changes in v4: 1-fix compilation warning with pcie_layerscape_fixup_common.c file 2-Updated NXP copyright Changes in v3: fix compilation errors with lx2160aqds_tfa_SECURE_BOOT_defconfig and lx2160ardb_tfa_SECURE_BOOT_defconfig Changes in v2 Ported changes to latest codebase configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + drivers/pci/Makefile | 5 +++-- drivers/pci/pcie_layerscape_fixup.c | 7 ++++--- drivers/pci/pcie_layerscape_fixup_common.c | 27 +++++++++++++++++++++++++++ drivers/pci/pcie_layerscape_fixup_common.h | 20 ++++++++++++++++++++ drivers/pci/pcie_layerscape_gen4_fixup.c | 7 ++++--- 9 files changed, 62 insertions(+), 8 deletions(-) create mode 100644 drivers/pci/pcie_layerscape_fixup_common.c create mode 100644 drivers/pci/pcie_layerscape_fixup_common.h diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 4858f66..dbac1dc 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -55,6 +55,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index 167c517..d7ea3bf 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -57,6 +57,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index 87459dd..c3e9231 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -51,6 +51,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index f6cf1ac..97f535d 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -56,6 +56,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index 8a33eb0..c051ecc 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -34,9 +34,10 @@ obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o obj-$(CONFIG_PCIE_DW_MVEBU) += pcie_dw_mvebu.o obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o -obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o +obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o pcie_layerscape_fixup_common.o obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \ - pcie_layerscape_gen4_fixup.o pcie_layerscape.o + pcie_layerscape_gen4_fixup.o \ + pcie_layerscape_fixup_common.o obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index 27ef20d..e77404c 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2017-2019 NXP + * Copyright 2017-2020 NXP * Copyright 2014-2015 Freescale Semiconductor, Inc. * Layerscape PCIe driver */ @@ -17,6 +17,7 @@ #include #endif #include "pcie_layerscape.h" +#include "pcie_layerscape_fixup_common.h" #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2) /* @@ -271,7 +272,7 @@ static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie) } /* Fixup Kernel DT for PCIe */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls(void *blob, bd_t *bd) { struct ls_pcie *pcie; @@ -284,7 +285,7 @@ void ft_pci_setup(void *blob, bd_t *bd) } #else /* !CONFIG_OF_BOARD_SETUP */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls(void *blob, bd_t *bd) { } #endif diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c new file mode 100644 index 0000000..b32236e --- /dev/null +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019-2020 NXP + * + * PCIe DT fixup for NXP Layerscape SoCs + * Author: Wasim Khan + * + */ + +#include +#include +#include +#include "pcie_layerscape_fixup_common.h" + +void ft_pci_setup(void *blob, bd_t *bd) +{ +#if defined(CONFIG_PCIE_LAYERSCAPE_GEN4) + uint svr; + + svr = SVR_SOC_VER(get_svr()); + + if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0)) + ft_pci_setup_ls_gen4(blob, bd); + else +#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */ + ft_pci_setup_ls(blob, bd); +} diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h new file mode 100644 index 0000000..be729b6 --- /dev/null +++ b/drivers/pci/pcie_layerscape_fixup_common.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019-2020 NXP + * + * PCIe DT fixup for NXP Layerscape SoCs + * Author: Wasim Khan + * + */ +#ifndef _PCIE_LAYERSCAPE_FIXUP_COMMON_H_ +#define _PCIE_LAYERSCAPE_FIXUP_COMMON_H_ + +#include + +void ft_pci_setup_ls(void *blob, bd_t *bd); + +#ifdef CONFIG_PCIE_LAYERSCAPE_GEN4 +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd); +#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */ + +#endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_ diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c index da98171..b99ab0f 100644 --- a/drivers/pci/pcie_layerscape_gen4_fixup.c +++ b/drivers/pci/pcie_layerscape_gen4_fixup.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ OR X11 /* - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP * * PCIe Gen4 driver for NXP Layerscape SoCs * Author: Hou Zhiqiang @@ -19,6 +19,7 @@ #include #endif #include "pcie_layerscape_gen4.h" +#include "pcie_layerscape_fixup_common.h" #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2) /* @@ -234,7 +235,7 @@ static void ft_pcie_layerscape_gen4_setup(void *blob, struct ls_pcie_g4 *pcie) } /* Fixup Kernel DT for PCIe */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd) { struct ls_pcie_g4 *pcie; @@ -247,7 +248,7 @@ void ft_pci_setup(void *blob, bd_t *bd) } #else /* !CONFIG_OF_BOARD_SETUP */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd) { } #endif From patchwork Mon Jan 6 12:05:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Khan X-Patchwork-Id: 239151 List-Id: U-Boot discussion From: wasim.khan at nxp.com (Wasim Khan) Date: Mon, 6 Jan 2020 12:05:59 +0000 Subject: [PATCH v4 2/4] pci: layerscape: Move streamId allocation to common device tree fixup In-Reply-To: <1578312338-15545-1-git-send-email-wasim.khan@nxp.com> References: <1578312338-15545-1-git-send-email-wasim.khan@nxp.com> Message-ID: <1578312338-15545-3-git-send-email-wasim.khan@nxp.com> Move streamId allocation to layerscape common device tree fixup. Calculate streamId based on SoC variant. Signed-off-by: Wasim Khan --- Changes in v4:None Changes in v3:None Changes in v2:None drivers/pci/pcie_layerscape_fixup.c | 15 +++------------ drivers/pci/pcie_layerscape_fixup_common.c | 24 ++++++++++++++++++++++++ drivers/pci/pcie_layerscape_fixup_common.h | 1 + drivers/pci/pcie_layerscape_gen4_fixup.c | 17 +++-------------- 4 files changed, 31 insertions(+), 26 deletions(-) diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index e77404c..56de6d9 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -31,17 +31,6 @@ static int ls_pcie_next_lut_index(struct ls_pcie *pcie) return -ENOSPC; /* LUT is full */ } -/* returns the next available streamid for pcie, -errno if failed */ -static int ls_pcie_next_streamid(void) -{ - static int next_stream_id = FSL_PEX_STREAM_ID_START; - - if (next_stream_id > FSL_PEX_STREAM_ID_END) - return -EINVAL; - - return next_stream_id++; -} - static void lut_writel(struct ls_pcie *pcie, unsigned int value, unsigned int offset) { @@ -192,10 +181,12 @@ static void fdt_fixup_pcie_ls(void *blob) bus = bus->parent; pcie = dev_get_priv(bus); - streamid = ls_pcie_next_streamid(); + streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx); if (streamid < 0) { debug("ERROR: no stream ids free\n"); continue; + } else { + pcie->stream_id_cur++; } index = ls_pcie_next_lut_index(pcie); diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c index b32236e..828dfff 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.c +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -25,3 +25,27 @@ void ft_pci_setup(void *blob, bd_t *bd) #endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */ ft_pci_setup_ls(blob, bd); } + +#if defined(CONFIG_FSL_LAYERSCAPE) +#ifdef CONFIG_ARCH_LX2160A +/* returns the next available streamid for pcie, -errno if failed */ +int pcie_next_streamid(int currentid, int idx) +{ + if (currentid > FSL_PEX_STREAM_ID_END) + return -EINVAL; + + return currentid | ((idx + 1) << 11); +} +#else +/* returns the next available streamid for pcie, -errno if failed */ +int pcie_next_streamid(int currentid, int idx) +{ + static int next_stream_id = FSL_PEX_STREAM_ID_START; + + if (next_stream_id > FSL_PEX_STREAM_ID_END) + return -EINVAL; + + return next_stream_id++; +} +#endif +#endif /* CONFIG_FSL_LAYERSCAPE */ diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h index be729b6..ecf4f44 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.h +++ b/drivers/pci/pcie_layerscape_fixup_common.h @@ -16,5 +16,6 @@ void ft_pci_setup_ls(void *blob, bd_t *bd); #ifdef CONFIG_PCIE_LAYERSCAPE_GEN4 void ft_pci_setup_ls_gen4(void *blob, bd_t *bd); #endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */ +int pcie_next_streamid(int currentid, int id); #endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_ diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c index b99ab0f..bfe197e 100644 --- a/drivers/pci/pcie_layerscape_gen4_fixup.c +++ b/drivers/pci/pcie_layerscape_gen4_fixup.c @@ -33,19 +33,6 @@ static int ls_pcie_g4_next_lut_index(struct ls_pcie_g4 *pcie) return -ENOSPC; /* LUT is full */ } -/* returns the next available streamid for pcie, -errno if failed */ -static int ls_pcie_g4_next_streamid(struct ls_pcie_g4 *pcie) -{ - int stream_id = pcie->stream_id_cur; - - if (stream_id > FSL_PEX_STREAM_ID_END) - return -EINVAL; - - pcie->stream_id_cur++; - - return stream_id | ((pcie->idx + 1) << 11); -} - /* * Program a single LUT entry */ @@ -162,10 +149,12 @@ static void fdt_fixup_pcie_ls_gen4(void *blob) bus = bus->parent; pcie = dev_get_priv(bus); - streamid = ls_pcie_g4_next_streamid(pcie); + streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx); if (streamid < 0) { debug("ERROR: no stream ids free\n"); continue; + } else { + pcie->stream_id_cur++; } index = ls_pcie_g4_next_lut_index(pcie); From patchwork Mon Jan 6 12:06:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Khan X-Patchwork-Id: 239152 List-Id: U-Boot discussion From: wasim.khan at nxp.com (Wasim Khan) Date: Mon, 6 Jan 2020 12:06:00 +0000 Subject: [PATCH v4 3/4] pci: layerscape: device tree fixup based on SoC and In-Reply-To: <1578312338-15545-1-git-send-email-wasim.khan@nxp.com> References: <1578312338-15545-1-git-send-email-wasim.khan@nxp.com> Message-ID: <1578312338-15545-4-git-send-email-wasim.khan@nxp.com> lx2160a rev1 requires layerscape_gen4 device tree fixup and lx2160a rev2 requires layerscape device tree fixup. Add device tree fixup for lx2160a based on SoC and Version. Signed-off-by: Wasim Khan --- Changes in v4: remove num-lanes fixup Changes in v3: Updated patch subject and description based on Priyanka Jain review comments Changes in v2: Updated patch description based on Priyanka Jain review comments drivers/pci/pcie_layerscape_fixup.c | 1 + drivers/pci/pcie_layerscape_fixup_common.c | 73 ++++++++++++++++++++++++++++++ drivers/pci/pcie_layerscape_fixup_common.h | 1 + 3 files changed, 75 insertions(+) diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index 56de6d9..ec6acbb 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -207,6 +207,7 @@ static void fdt_fixup_pcie_ls(void *blob) fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8, streamid); } + pcie_board_fix_fdt(blob); } #endif diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c index 828dfff..b010a63 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.c +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -27,6 +27,79 @@ void ft_pci_setup(void *blob, bd_t *bd) } #if defined(CONFIG_FSL_LAYERSCAPE) +int lx2_board_fix_fdt(void *fdt) +{ + char *reg_name, *old_str, *new_str; + const char *reg_names; + int names_len, old_str_len, new_str_len, remaining_str_len; + struct str_map { + char *old_str; + char *new_str; + } reg_names_map[] = { + { "csr_axi_slave", "regs" }, + { "config_axi_slave", "config" } + }; + int off = -1, i; + + off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie"); + while (off != -FDT_ERR_NOTFOUND) { + fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie", + strlen("fsl,ls2088a-pcie") + 1); + + reg_names = fdt_getprop(fdt, off, "reg-names", &names_len); + if (!reg_names) + continue; + reg_name = (char *)reg_names; + remaining_str_len = names_len - (reg_name - reg_names); + i = 0; + while ((i < ARRAY_SIZE(reg_names_map)) && remaining_str_len) { + old_str = reg_names_map[i].old_str; + new_str = reg_names_map[i].new_str; + old_str_len = strlen(old_str); + new_str_len = strlen(new_str); + if (memcmp(reg_name, old_str, old_str_len) == 0) { + /* first only leave required bytes for new_str + * and copy rest of the string after it + */ + memcpy(reg_name + new_str_len, + reg_name + old_str_len, + remaining_str_len - old_str_len); + + /* Now copy new_str */ + memcpy(reg_name, new_str, new_str_len); + names_len -= old_str_len; + names_len += new_str_len; + i++; + } + + reg_name = memchr(reg_name, '\0', remaining_str_len); + if (!reg_name) + break; + reg_name += 1; + + remaining_str_len = names_len - (reg_name - reg_names); + } + fdt_setprop(fdt, off, "reg-names", reg_names, names_len); + fdt_delprop(fdt, off, "apio-wins"); + fdt_delprop(fdt, off, "ppio-wins"); + off = fdt_node_offset_by_compatible(fdt, off, + "fsl,lx2160a-pcie"); + } + return 0; +} + +int pcie_board_fix_fdt(void *fdt) +{ + uint svr; + + svr = SVR_SOC_VER(get_svr()); + + if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 2, 0)) + return lx2_board_fix_fdt(fdt); + + return 0; +} + #ifdef CONFIG_ARCH_LX2160A /* returns the next available streamid for pcie, -errno if failed */ int pcie_next_streamid(int currentid, int idx) diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h index ecf4f44..e1970a5 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.h +++ b/drivers/pci/pcie_layerscape_fixup_common.h @@ -17,5 +17,6 @@ void ft_pci_setup_ls(void *blob, bd_t *bd); void ft_pci_setup_ls_gen4(void *blob, bd_t *bd); #endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */ int pcie_next_streamid(int currentid, int id); +int pcie_board_fix_fdt(void *fdt); #endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_ From patchwork Mon Jan 6 12:06:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Khan X-Patchwork-Id: 239153 List-Id: U-Boot discussion From: wasim.khan at nxp.com (Wasim Khan) Date: Mon, 6 Jan 2020 12:06:02 +0000 Subject: [PATCH v4 4/4] configs: lx2160a: enable CONFIG_OF_BOARD_FIXUP for SECURE_BOOT defconfig In-Reply-To: <1578312338-15545-1-git-send-email-wasim.khan@nxp.com> References: <1578312338-15545-1-git-send-email-wasim.khan@nxp.com> Message-ID: <1578312338-15545-5-git-send-email-wasim.khan@nxp.com> lx2160a rev1 and rev2 SoC has different pcie controller. The pcie controller device tree node fields "compatible" and registers names needs to be updated accordingly. Enable CONFIG_OF_BOARD_FIXUP to apply board_fix_fdt which updates the "compatible" and registers names. Signed-off-by: Wasim Khan --- Changes in v4: None Changes in v3: Enabled CONFIG_OF_BOARD_FIXUP for lx2160aqds_tfa_SECURE_BOOT_defconfig and lx2160ardb_tfa_SECURE_BOOT_defconfig configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index dbac1dc..471e432 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y +CONFIG_OF_BOARD_FIXUP=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index c3e9231..6fa61da 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y +CONFIG_OF_BOARD_FIXUP=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y