From patchwork Sun Apr 26 10:51:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 238487 List-Id: U-Boot discussion From: marek.vasut at gmail.com (Marek Vasut) Date: Sun, 26 Apr 2020 12:51:55 +0200 Subject: [PATCH 1/3] [RFC] dm: core: Add late driver remove option Message-ID: <20200426105157.24791-1-marek.vasut+renesas@gmail.com> Add another flag to the DM core which could be assigned to drivers and which makes those drivers call their remove callbacks last, just before booting OS and after all the other drivers finished with their remove callbacks. This is necessary for things like clock drivers, where the other drivers might depend on the clock driver in their remove callbacks. Prime example is the mmc subsystem, which can reconfigure a card from HS mode to slower modes in the remove callback and for that it needs to reconfigure the controller clock. Signed-off-by: Marek Vasut Cc: Simon Glass Cc: Tom Rini --- arch/arm/lib/bootm.c | 1 + drivers/core/device-remove.c | 11 ++++++++--- drivers/core/root.c | 2 ++ include/dm/device.h | 4 ++++ 4 files changed, 15 insertions(+), 3 deletions(-) diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index f4b5ca6de0..1d247128b7 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -116,6 +116,7 @@ static void announce_and_cleanup(int fake) * of DMA operation or releasing device internal buffers. */ dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL); + dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL | DM_REMOVE_LATE); cleanup_before_linux(); } diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c index efdb0f2905..07b241b6bb 100644 --- a/drivers/core/device-remove.c +++ b/drivers/core/device-remove.c @@ -172,14 +172,19 @@ int device_remove(struct udevice *dev, uint flags) drv = dev->driver; assert(drv); - ret = uclass_pre_remove_device(dev); - if (ret) - return ret; + if (!(flags & DM_REMOVE_LATE)) { + ret = uclass_pre_remove_device(dev); + if (ret) + return ret; + } ret = device_chld_remove(dev, NULL, flags); if (ret) goto err; + if (!(flags & DM_REMOVE_LATE) && (drv->flags & DM_FLAG_REMOVE_LATE)) + return 0; + /* * Remove the device if called with the "normal" remove flag set, * or if the remove flag matches any of the drivers remove flags diff --git a/drivers/core/root.c b/drivers/core/root.c index 14df16c280..fcb1dfddf5 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -166,6 +166,7 @@ int dm_init(bool of_live) int dm_uninit(void) { device_remove(dm_root(), DM_REMOVE_NORMAL); + device_remove(dm_root(), DM_REMOVE_LATE); device_unbind(dm_root()); gd->dm_root = NULL; @@ -376,6 +377,7 @@ int dm_init_and_scan(bool pre_reloc_only) U_BOOT_DRIVER(root_driver) = { .name = "root_driver", .id = UCLASS_ROOT, + .flags = DM_FLAG_REMOVE_LATE, }; /* This is the root uclass */ diff --git a/include/dm/device.h b/include/dm/device.h index 975eec5d0e..e7c1c343fe 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -73,6 +73,8 @@ struct driver_info; */ #define DM_FLAG_REMOVE_WITH_PD_ON (1 << 13) +#define DM_FLAG_REMOVE_LATE (1 << 14) + /* * One or multiple of these flags are passed to device_remove() so that * a selective device removal as specified by the remove-stage and the @@ -95,6 +97,8 @@ enum { /* Don't power down any attached power domains */ DM_REMOVE_NO_PD = 1 << 1, + + DM_REMOVE_LATE = 1 << 2, }; /** From patchwork Sun Apr 26 10:51:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 238485 List-Id: U-Boot discussion From: marek.vasut at gmail.com (Marek Vasut) Date: Sun, 26 Apr 2020 12:51:56 +0200 Subject: [PATCH 2/3] clk: renesas: Only ever access documented bits in clock driver teardown In-Reply-To: <20200426105157.24791-1-marek.vasut+renesas@gmail.com> References: <20200426105157.24791-1-marek.vasut+renesas@gmail.com> Message-ID: <20200426105157.24791-2-marek.vasut+renesas@gmail.com> The clock driver used a heavy-handed approach where it turned off all available clocks, while also possibly setting bits which are not documented in the R-Car datasheet. Update the tables so that only the bits which are documented are set or cleared when tearing down the clock driver. Note that the only clock left running before booting Linux are now MFIC, INTC-AP, INTC-EX and SCIF2 / SCIF0 on V3x. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu Cc: Simon Glass Cc: Tom Rini --- drivers/clk/renesas/r8a7795-cpg-mssr.c | 22 +++++++++++----------- drivers/clk/renesas/r8a7796-cpg-mssr.c | 22 +++++++++++----------- drivers/clk/renesas/r8a77965-cpg-mssr.c | 24 ++++++++++++------------ drivers/clk/renesas/r8a77970-cpg-mssr.c | 22 +++++++++++----------- drivers/clk/renesas/r8a77980-cpg-mssr.c | 24 ++++++++++++------------ drivers/clk/renesas/r8a77990-cpg-mssr.c | 24 ++++++++++++------------ drivers/clk/renesas/r8a77995-cpg-mssr.c | 24 ++++++++++++------------ 7 files changed, 81 insertions(+), 81 deletions(-) diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index ab4747ee14..38413bc026 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -326,17 +326,17 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] = { }; static const struct mstp_stop_table r8a7795_mstp_table[] = { - { 0x00640800, 0x0, 0x00640800, 0 }, - { 0xF3EE9390, 0x0, 0xF3EE9390, 0 }, - { 0x340FAFDC, 0x2040, 0x340FAFDC, 0 }, - { 0xD80C7CDF, 0x400, 0xD80C7CDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0x40BFFF46, 0x0, 0x40BFFF46, 0 }, - { 0xE5FBEECF, 0x0, 0xE5FBEECF, 0 }, - { 0x39FFFF0E, 0x0, 0x39FFFF0E, 0 }, - { 0x01F19FF4, 0x0, 0x01F19FF4, 0 }, - { 0xFFDFFFFF, 0x0, 0xFFDFFFFF, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, + { 0x00210000, 0x0, 0x00210000, 0 }, + { 0xc3ec13a0, 0x0, 0xc3ec13a0, 0 }, + { 0x040e2fdc, 0x2000, 0x040e2fdc, 0 }, + { 0xf4cc7cdf, 0x400, 0xf4cc7cdf, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x40dfff46, 0x0, 0x40dfff46, 0 }, + { 0xc5e8ccce, 0x0, 0xc5e8ccce, 0 }, + { 0x39ffdf3f, 0x0, 0x39ffdf3f, 0 }, + { 0x01f09ff6, 0x0, 0x01f09ff6, 0 }, + { 0xfddfdffe, 0x0, 0xfddfdffe, 0 }, + { 0xfffeffe0, 0x0, 0xfffeffe0, 0 }, { 0x00000000, 0x0, 0x00000000, 0 }, }; diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 253a9143b7..aa5957bb36 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -305,17 +305,17 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] = { static const struct mstp_stop_table r8a7796_mstp_table[] = { { 0x00200000, 0x0, 0x00200000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0xC3FFFFFF, 0x0, 0xC3FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 }, - { 0xFFFFFFFE, 0x0, 0xFFFFFFFE, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0xd3e813a0, 0x0, 0xd3e813a0, 0 }, + { 0x040e2fdc, 0x2000, 0x040e2fdc, 0 }, + { 0xd00c7cdf, 0x400, 0xd00c7cdf, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x40dfff46, 0x0, 0x40dfff46, 0 }, + { 0x84ea888e, 0x0, 0x84ea888e, 0 }, + { 0x29df5e1c, 0x0, 0x29df5e1c, 0 }, + { 0x01c01ff7, 0x0, 0x01f01ff7, 0 }, + { 0xfddfdffe, 0x0, 0xfddfdffe, 0 }, + { 0xfffeffe0, 0x0, 0xfffeffe0, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, }; static const void *r8a7796_get_pll_config(const u32 cpg_mode) diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c index bd36ea3b6d..c3a934adaf 100644 --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c @@ -302,18 +302,18 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] = { }; static const struct mstp_stop_table r8a77965_mstp_table[] = { - { 0x00200000, 0x0, 0x00200000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0xC3FFFFFF, 0x0, 0xC3FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 }, - { 0xFFFFFFFE, 0x0, 0xFFFFFFFE, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0x00210000, 0x0, 0x00210000, 0 }, + { 0xc3e813a0, 0x0, 0xc3e813a0, 0 }, + { 0x040e2fdc, 0x2000, 0x040e2fdc, 0 }, + { 0xd0cc7cdf, 0x400, 0xd0cc7cdf, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x40dfff46, 0x0, 0x40dfff46, 0 }, + { 0x84c8888c, 0x0, 0x84c8888c, 0 }, + { 0x29bf5d1c, 0x0, 0x29bf5d1c, 0 }, + { 0x00c09ff7, 0x0, 0x01c09ff7, 0 }, + { 0xfddfdffe, 0x0, 0xfddfdffe, 0 }, + { 0xfffeffe0, 0x0, 0xfffeffe0, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, }; static const void *r8a77965_get_pll_config(const u32 cpg_mode) diff --git a/drivers/clk/renesas/r8a77970-cpg-mssr.c b/drivers/clk/renesas/r8a77970-cpg-mssr.c index 961eb7fb60..21f54a0ecb 100644 --- a/drivers/clk/renesas/r8a77970-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77970-cpg-mssr.c @@ -180,17 +180,17 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[8] = { static const struct mstp_stop_table r8a77970_mstp_table[] = { { 0x00230000, 0x0, 0x00230000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x14062FD8, 0x2040, 0x14062FD8, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0x83FFFFFF, 0x0, 0x83FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x7FF3FFF4, 0x0, 0x7FF3FFF4, 0 }, - { 0xFBF7FF97, 0x0, 0xFBF7FF97, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0x0be00000, 0x0, 0x0be00000, 0 }, + { 0x04062fd8, 0x2080, 0x04062fd8, 0 }, + { 0x00c0c0df, 0x0, 0x00c0c0df, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x00de0028, 0x0, 0x00de0028, 0 }, + { 0x00800008, 0x0, 0x00800008, 0 }, + { 0x09010000, 0x0, 0x09010000, 0 }, + { 0x7ff21f00, 0x0, 0x7ff21f00, 0 }, + { 0xf8025f84, 0x0, 0xf8025f84, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, }; static const void *r8a77970_get_pll_config(const u32 cpg_mode) diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c b/drivers/clk/renesas/r8a77980-cpg-mssr.c index c076ac771f..7fa7db0a59 100644 --- a/drivers/clk/renesas/r8a77980-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c @@ -202,18 +202,18 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[4] = { }; static const struct mstp_stop_table r8a77980_mstp_table[] = { - { 0x00230000, 0x0, 0x00230000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x14062FD8, 0x2040, 0x14062FD8, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0x83FFFFFF, 0x0, 0x83FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x7FF3FFF4, 0x0, 0x7FF3FFF4, 0 }, - { 0xFBF7FF97, 0x0, 0xFBF7FF97, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0x00230010, 0x0, 0x00230010, 0 }, + { 0x0be06c06, 0x0, 0x0be06c06, 0 }, + { 0x0006afd8, 0x2080, 0x0006afd8, 0 }, + { 0x00c8c0df, 0x0, 0x00c8c0df, 0 }, + { 0x80008004, 0x180, 0x80008004, 0 }, + { 0xbffe0021, 0x0, 0xbffe0021, 0 }, + { 0x1a841138, 0x0, 0x1a841138, 0 }, + { 0x090180c0, 0x0, 0x090180c0, 0 }, + { 0xfff27ff0, 0x0, 0xfff27ff0, 0 }, + { 0xf80a5f84, 0x0, 0xf80a5f84, 0 }, + { 0x0000001f, 0x0, 0x0000001f, 0 }, + { 0x00030000, 0x0, 0x00030000, 0 }, }; static const void *r8a77980_get_pll_config(const u32 cpg_mode) diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c index 3168de20f9..7221fac031 100644 --- a/drivers/clk/renesas/r8a77990-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c @@ -262,18 +262,18 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[2] = { }; static const struct mstp_stop_table r8a77990_mstp_table[] = { - { 0x00200000, 0x0, 0x00200000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0xC3FFFFFF, 0x0, 0xC3FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 }, - { 0xFFFFFFFE, 0x0, 0xFFFFFFFE, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0x00210000, 0x0, 0x00210000, 0 }, + { 0xc3e81000, 0x0, 0xc3e81000, 0 }, + { 0x000e2fdc, 0x2000, 0x000e2fd8, 0 }, + { 0xd0c86cd7, 0x400, 0xd0c86cd7, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x40dfff44, 0x0, 0x40dfff44, 0 }, + { 0x84c8888c, 0x0, 0x84c8888c, 0 }, + { 0x09951c18, 0x0, 0x09951c18, 0 }, + { 0x008010c7, 0x0, 0x008010c7, 0 }, + { 0xfddfdfdc, 0x0, 0xfddfdfdc, 0 }, + { 0xfffeffe8, 0x0, 0xfffeffe8, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, }; static const void *r8a77990_get_pll_config(const u32 cpg_mode) diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c index 1c79370982..18698a61a9 100644 --- a/drivers/clk/renesas/r8a77995-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c @@ -201,18 +201,18 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[2] = { }; static const struct mstp_stop_table r8a77995_mstp_table[] = { - { 0x00200000, 0x0, 0x00200000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0xC3FFFFFF, 0x0, 0xC3FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 }, - { 0xFFFFFFFE, 0x0, 0xFFFFFFFE, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0x00210000, 0x0, 0x00210000, 0 }, + { 0x03e01000, 0x0, 0x03e01000, 0 }, + { 0x000e2fdc, 0x2000, 0x000e2fd8, 0 }, + { 0xc00014df, 0x400, 0xc00014df, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x40d20004, 0x0, 0x40d20004, 0 }, + { 0x08c0008c, 0x0, 0x08c0008c, 0 }, + { 0x09941c18, 0x0, 0x09941c18, 0 }, + { 0x00801087, 0x0, 0x00801087, 0 }, + { 0xf143dfc0, 0x0, 0xf143dfc0, 0 }, + { 0x063e1820, 0x0, 0x063e1820, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, }; static const void *r8a77995_get_pll_config(const u32 cpg_mode) From patchwork Sun Apr 26 10:51:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 238486 List-Id: U-Boot discussion From: marek.vasut at gmail.com (Marek Vasut) Date: Sun, 26 Apr 2020 12:51:57 +0200 Subject: [PATCH 3/3] clk: renesas: Tear clock controller down last before booting OS In-Reply-To: <20200426105157.24791-1-marek.vasut+renesas@gmail.com> References: <20200426105157.24791-1-marek.vasut+renesas@gmail.com> Message-ID: <20200426105157.24791-3-marek.vasut+renesas@gmail.com> Once all the other drivers got torn down in preparation for the OS to start, tear down the clock controller last. The clock controller must be torn down last as some of the clock which get turned off might have still been needed during the teardown stage of the other drivers. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu Cc: Simon Glass Cc: Tom Rini --- drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 + drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 + drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 + drivers/clk/renesas/r8a77970-cpg-mssr.c | 1 + drivers/clk/renesas/r8a77980-cpg-mssr.c | 1 + drivers/clk/renesas/r8a77990-cpg-mssr.c | 1 + drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 + 7 files changed, 7 insertions(+) diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index 38413bc026..06b303bf0b 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -376,4 +376,5 @@ U_BOOT_DRIVER(clk_r8a7795) = { .ops = &gen3_clk_ops, .probe = gen3_clk_probe, .remove = gen3_clk_remove, + .flags = DM_FLAG_OS_PREPARE | DM_FLAG_REMOVE_LATE, }; diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index aa5957bb36..ed2c9b4af9 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -354,4 +354,5 @@ U_BOOT_DRIVER(clk_r8a7796) = { .ops = &gen3_clk_ops, .probe = gen3_clk_probe, .remove = gen3_clk_remove, + .flags = DM_FLAG_OS_PREPARE | DM_FLAG_REMOVE_LATE, }; diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c index c3a934adaf..761e101ddd 100644 --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c @@ -352,4 +352,5 @@ U_BOOT_DRIVER(clk_r8a77965) = { .ops = &gen3_clk_ops, .probe = gen3_clk_probe, .remove = gen3_clk_remove, + .flags = DM_FLAG_OS_PREPARE | DM_FLAG_REMOVE_LATE, }; diff --git a/drivers/clk/renesas/r8a77970-cpg-mssr.c b/drivers/clk/renesas/r8a77970-cpg-mssr.c index 21f54a0ecb..d47060c5e5 100644 --- a/drivers/clk/renesas/r8a77970-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77970-cpg-mssr.c @@ -229,4 +229,5 @@ U_BOOT_DRIVER(clk_r8a77970) = { .ops = &gen3_clk_ops, .probe = gen3_clk_probe, .remove = gen3_clk_remove, + .flags = DM_FLAG_OS_PREPARE | DM_FLAG_REMOVE_LATE, }; diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c b/drivers/clk/renesas/r8a77980-cpg-mssr.c index 7fa7db0a59..3a1541e4fc 100644 --- a/drivers/clk/renesas/r8a77980-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c @@ -252,4 +252,5 @@ U_BOOT_DRIVER(clk_r8a77980) = { .ops = &gen3_clk_ops, .probe = gen3_clk_probe, .remove = gen3_clk_remove, + .flags = DM_FLAG_OS_PREPARE | DM_FLAG_REMOVE_LATE, }; diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c index 7221fac031..a7daaae600 100644 --- a/drivers/clk/renesas/r8a77990-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c @@ -311,4 +311,5 @@ U_BOOT_DRIVER(clk_r8a77990) = { .ops = &gen3_clk_ops, .probe = gen3_clk_probe, .remove = gen3_clk_remove, + .flags = DM_FLAG_OS_PREPARE | DM_FLAG_REMOVE_LATE, }; diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c index 18698a61a9..48ea8c2da6 100644 --- a/drivers/clk/renesas/r8a77995-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c @@ -250,4 +250,5 @@ U_BOOT_DRIVER(clk_r8a77995) = { .ops = &gen3_clk_ops, .probe = gen3_clk_probe, .remove = gen3_clk_remove, + .flags = DM_FLAG_OS_PREPARE | DM_FLAG_REMOVE_LATE, };