From patchwork Wed Apr 22 12:29:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238287 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:09 +0200 Subject: [PATCH v2 01/12] arm: stm32mp: remove dependency for STM32KEY In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.1.Ibb1f76c9bdf50f4f21793461d3a76b4f3ef479fd@changeid> This command is not more depending on fuse command, but have direct access to BSEC misc driver, so the dependency with can be removed CMD_FUSE Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- Changes in v2: - minor commit message update arch/arm/mach-stm32mp/Kconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index ba965e7b3b..8abfbdeef6 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -120,12 +120,10 @@ config STM32_ETZPC config CMD_STM32KEY bool "command stm32key to fuse public key hash" default y - depends on CMD_FUSE help fuse public key hash in corresponding fuse used to authenticate binary. - config PRE_CON_BUF_ADDR default 0xC02FF000 From patchwork Wed Apr 22 12:29:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238289 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:10 +0200 Subject: [PATCH v2 02/12] arm: stm32mp: spl: update error management in board_init_f In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.2.I703cbd885066981e3bab374021d5578dce7cb035@changeid> Call hang when an error is detected for probe of any driver needed for console or DDR init: clk, reset and pincontrol NB: previous behavior with a return in board_init_f() was not correct; DDR is not initialized and SPL execution can't continue Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- Changes in v2: - simplify patch after Wolfgang review, as console init alway failed when drivers can't probe (remove printf after preloader_console_init call) arch/arm/mach-stm32mp/spl.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c index ca4231cd0d..445c5a231c 100644 --- a/arch/arm/mach-stm32mp/spl.c +++ b/arch/arm/mach-stm32mp/spl.c @@ -92,19 +92,19 @@ void board_init_f(ulong dummy) ret = uclass_get_device(UCLASS_CLK, 0, &dev); if (ret) { debug("Clock init failed: %d\n", ret); - return; + hang(); } ret = uclass_get_device(UCLASS_RESET, 0, &dev); if (ret) { debug("Reset init failed: %d\n", ret); - return; + hang(); } ret = uclass_get_device(UCLASS_PINCTRL, 0, &dev); if (ret) { debug("%s: Cannot find pinctrl device\n", __func__); - return; + hang(); } /* enable console uart printing */ From patchwork Wed Apr 22 12:29:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238296 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:11 +0200 Subject: [PATCH v2 03/12] board: stm32mp1: Keep error led ON in case of low power detection In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.3.I5954842931a3f46d943b91004a060d6fb5072109@changeid> From: Patrice Chotard Since commit commit dd2810851eb1 ("stm32mp1: board: support of error led on ed1/ev1 board") the attended behavior was no more respected in case of low power source detection on DK2. The expected behavior is either the error LED keeps blinking for ever, or blinks 2 or 3 times and must stay ON. Reviewed-by: Patrice Chotard Signed-off-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- Changes in v2: None board/st/stm32mp1/stm32mp1.c | 1 + 1 file changed, 1 insertion(+) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 45068b1cd9..d85a57cee2 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -316,6 +316,7 @@ static void __maybe_unused led_error_blink(u32 nb_blink) mdelay(125); WATCHDOG_RESET(); } + led_set_state(led, LEDST_ON); } #endif From patchwork Wed Apr 22 12:29:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238291 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:12 +0200 Subject: [PATCH v2 04/12] board: stm32mp1: update management of boot-led In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.4.I15cb0a6245fb4cd5d23371683c2697f794adf306@changeid> Force boot-led ON and no more rely on default-state. This patch avoid device-tree modification for U-Boot. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- Changes in v2: - use CONFIG_IS_ENABLED(LED) everywhere arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 4 --- arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 4 --- board/st/stm32mp1/stm32mp1.c | 33 ++++++++++++------------ 3 files changed, 16 insertions(+), 25 deletions(-) diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi index 5844d41c53..c52abeb1e7 100644 --- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi @@ -27,10 +27,6 @@ default-state = "off"; status = "okay"; }; - - blue { - default-state = "on"; - }; }; }; diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi index ed2f024be9..84af7fa47b 100644 --- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi @@ -28,10 +28,6 @@ default-state = "off"; status = "okay"; }; - - blue { - default-state = "on"; - }; }; }; diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index d85a57cee2..6a3e2e64bf 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -260,7 +260,6 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) #endif /* CONFIG_USB_GADGET */ -#ifdef CONFIG_LED static int get_led(struct udevice **dev, char *led_string) { char *led_name; @@ -286,6 +285,9 @@ static int setup_led(enum led_state_t cmd) struct udevice *dev; int ret; + if (!CONFIG_IS_ENABLED(LED)) + return 0; + ret = get_led(&dev, "u-boot,boot-led"); if (ret) return ret; @@ -293,32 +295,29 @@ static int setup_led(enum led_state_t cmd) ret = led_set_state(dev, cmd); return ret; } -#endif static void __maybe_unused led_error_blink(u32 nb_blink) { -#ifdef CONFIG_LED int ret; struct udevice *led; u32 i; -#endif if (!nb_blink) return; -#ifdef CONFIG_LED - ret = get_led(&led, "u-boot,error-led"); - if (!ret) { - /* make u-boot,error-led blinking */ - /* if U32_MAX and 125ms interval, for 17.02 years */ - for (i = 0; i < 2 * nb_blink; i++) { - led_set_state(led, LEDST_TOGGLE); - mdelay(125); - WATCHDOG_RESET(); + if (CONFIG_IS_ENABLED(LED)) { + ret = get_led(&led, "u-boot,error-led"); + if (!ret) { + /* make u-boot,error-led blinking */ + /* if U32_MAX and 125ms interval, for 17.02 years */ + for (i = 0; i < 2 * nb_blink; i++) { + led_set_state(led, LEDST_TOGGLE); + mdelay(125); + WATCHDOG_RESET(); + } + led_set_state(led, LEDST_ON); } - led_set_state(led, LEDST_ON); } -#endif /* infinite: the boot process must be stopped */ if (nb_blink == U32_MAX) @@ -651,6 +650,8 @@ int board_init(void) if (CONFIG_IS_ENABLED(LED)) led_default_state(); + setup_led(LEDST_ON); + return 0; } @@ -705,9 +706,7 @@ int board_late_init(void) void board_quiesce_devices(void) { -#ifdef CONFIG_LED setup_led(LEDST_OFF); -#endif } /* eth init function : weak called in eqos driver */ From patchwork Wed Apr 22 12:29:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238297 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:13 +0200 Subject: [PATCH v2 05/12] board: stm32mp1: gt9147 IRQ before reset on EV1 In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.5.I5d296f8fd82b60a592b51029e7e420672d0e855b@changeid> Software workaround for I2C issue on EV1 board, configure the IRQ line for touchscreen before LCD reset to fix the used I2C address. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- Changes in v2: - remove debug message and unused return of board_ev1_init board/st/stm32mp1/stm32mp1.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 6a3e2e64bf..8e247bbc87 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -621,6 +621,38 @@ static bool board_is_dk2(void) } #endif +static bool board_is_ev1(void) +{ + if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) && + (of_machine_is_compatible("st,stm32mp157a-ev1") || + of_machine_is_compatible("st,stm32mp157c-ev1") || + of_machine_is_compatible("st,stm32mp157d-ev1") || + of_machine_is_compatible("st,stm32mp157f-ev1"))) + return true; + + return false; +} + +/* touchscreen driver: only used for pincontrol configuration */ +static const struct udevice_id goodix_ids[] = { + { .compatible = "goodix,gt9147", }, + { } +}; + +U_BOOT_DRIVER(goodix) = { + .name = "goodix", + .id = UCLASS_NOP, + .of_match = goodix_ids, +}; + +static void board_ev1_init(void) +{ + struct udevice *dev; + + /* configure IRQ line on EV1 for touchscreen before LCD reset */ + uclass_get_device_by_driver(UCLASS_NOP, DM_GET_DRIVER(goodix), &dev); +} + /* board dependent setup after realloc */ int board_init(void) { @@ -638,6 +670,9 @@ int board_init(void) board_key_check(); + if (board_is_ev1()) + board_ev1_init(); + #ifdef CONFIG_DM_REGULATOR if (board_is_dk2()) dk2_i2c1_fix(); From patchwork Wed Apr 22 12:29:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238290 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:14 +0200 Subject: [PATCH v2 06/12] board: stm32mp1: set environment variable fdtfile In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.6.If6131518ee15d3299da69d674674ec03978eb58b@changeid> For booting Linux in the generic distro mechanism and support of FDTDIR in extlinux.conf , cmd/pxe.c retrieves the FDT file name from "fdtfile" environment variable. Dynamically build this variable with compatible of STMicroelectronics boards. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- Changes in v2: None board/st/stm32mp1/stm32mp1.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 8e247bbc87..280c5b7ae4 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -704,10 +704,19 @@ int board_late_init(void) fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible", &fdt_compat_len); if (fdt_compat && fdt_compat_len) { - if (strncmp(fdt_compat, "st,", 3) != 0) + if (strncmp(fdt_compat, "st,", 3) != 0) { env_set("board_name", fdt_compat); - else + } else { + char dtb_name[256]; + int buf_len = sizeof(dtb_name); + env_set("board_name", fdt_compat + 3); + + strncpy(dtb_name, fdt_compat + 3, buf_len); + buf_len -= strlen(fdt_compat + 3); + strncat(dtb_name, ".dtb", buf_len); + env_set("fdtfile", dtb_name); + } } ret = uclass_get_device_by_driver(UCLASS_MISC, DM_GET_DRIVER(stm32mp_bsec), From patchwork Wed Apr 22 12:29:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238292 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:15 +0200 Subject: [PATCH v2 07/12] board: stm32mp1: remove bootdelay configuration for usb or serial boot In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.7.Ic051e25812481db408f2431c7962da1db1f198fb@changeid> It is not allowed to change the user setting of bootdelay, so remove the check of the boot-source to disable it dynamically in board_late_init() Signed-off-by: Patrick Delaunay --- Changes in v2: - remove bootdelay configuration after Wolfgang's comment on dropped patch [11/16] board: stm32mp1: check env_get result in board_late_init board/st/stm32mp1/stm32mp1.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 280c5b7ae4..687d605e29 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -692,7 +692,6 @@ int board_init(void) int board_late_init(void) { - char *boot_device; #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG const void *fdt_compat; int fdt_compat_len; @@ -740,11 +739,6 @@ int board_late_init(void) board_check_usb_power(); #endif /* CONFIG_ADC */ - /* Check the boot-source to disable bootdelay */ - boot_device = env_get("boot_device"); - if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb")) - env_set("bootdelay", "0"); - return 0; } From patchwork Wed Apr 22 12:29:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238293 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:16 +0200 Subject: [PATCH v2 08/12] board: stm32mp1: add timeout for I/O compensation ready In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.8.Ia5fd6d6f4787d69ef9b4b5cebb334e5f2dc81ed3@changeid> This patch avoids infinite loop when I/O compensation failed, it adds a 1s timeout to detect error. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- Changes in v2: None board/st/stm32mp1/stm32mp1.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 687d605e29..a7160e1334 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include @@ -468,10 +469,10 @@ static void sysconf_init(void) struct udevice *pwr_dev; struct udevice *pwr_reg; struct udevice *dev; - int ret; u32 otp = 0; #endif - u32 bootr; + int ret; + u32 bootr, val; syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG); @@ -548,8 +549,15 @@ static void sysconf_init(void) */ writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR); - while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY)) - ; + /* poll until ready (1s timeout) */ + ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val, + val & SYSCFG_CMPCR_READY, + 1000000); + if (ret) { + pr_err("SYSCFG: I/O compensation failed, timeout.\n"); + led_error_blink(10); + } + clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL); #endif } From patchwork Wed Apr 22 12:29:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238294 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:17 +0200 Subject: [PATCH v2 09/12] gpio: stm32: support gpio ops in SPL In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.9.I355ddbc804eba6047ea147d830be57a5b9c4a87e@changeid> The GPIO support is needed in SPL to managed the SD cart detect used on stm32mp157c-ev1 and dk2 board. So this patch activates the associated code in stm32_gpio.c. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- Changes in v2: None drivers/gpio/stm32_gpio.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c index f55f834e7d..37a8cfa47a 100644 --- a/drivers/gpio/stm32_gpio.c +++ b/drivers/gpio/stm32_gpio.c @@ -20,7 +20,6 @@ #define MODE_BITS_MASK 3 #define BSRR_BIT(gpio_pin, value) BIT(gpio_pin + (value ? 0 : 16)) -#ifndef CONFIG_SPL_BUILD /* * convert gpio offset to gpio index taking into account gpio holes * into gpio bank @@ -147,7 +146,6 @@ static const struct dm_gpio_ops gpio_stm32_ops = { .set_value = stm32_gpio_set_value, .get_function = stm32_gpio_get_function, }; -#endif static int gpio_stm32_probe(struct udevice *dev) { @@ -162,7 +160,6 @@ static int gpio_stm32_probe(struct udevice *dev) priv->regs = (struct stm32_gpio_regs *)addr; -#ifndef CONFIG_SPL_BUILD struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); struct ofnode_phandle_args args; const char *name; @@ -195,7 +192,7 @@ static int gpio_stm32_probe(struct udevice *dev) dev_dbg(dev, "addr = 0x%p bank_name = %s gpio_count = %d gpio_range = 0x%x\n", (u32 *)priv->regs, uc_priv->bank_name, uc_priv->gpio_count, priv->gpio_range); -#endif + ret = clk_get_by_index(dev, 0, &clk); if (ret < 0) return ret; @@ -215,9 +212,7 @@ U_BOOT_DRIVER(gpio_stm32) = { .name = "gpio_stm32", .id = UCLASS_GPIO, .probe = gpio_stm32_probe, -#ifndef CONFIG_SPL_BUILD .ops = &gpio_stm32_ops, -#endif .flags = DM_UC_FLAG_SEQ_ALIAS, .priv_auto_alloc_size = sizeof(struct stm32_gpio_priv), }; From patchwork Wed Apr 22 12:29:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238298 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:18 +0200 Subject: [PATCH v2 10/12] ARM: dts: stm32mp15: use DDR3 files generated by STM32CubeMX In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.10.I9d49b85c2523409eb85071c740650a8615dac45d@changeid> Use the DDR3 dtsi files generated by STM32CubeMX 5.6.0 Speed Bin Grade = using DDR3-1066G / 8-8-8 and all others parameters at default value. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- Changes in v2: None .../dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi | 49 +++++++++---------- .../dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi | 49 +++++++++---------- 2 files changed, 48 insertions(+), 50 deletions(-) diff --git a/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi index 11e8f2bef6..c0fc1f772e 100644 --- a/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi +++ b/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi @@ -1,24 +1,23 @@ // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause /* * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + */ + +/* + * File generated by STMicroelectronics STM32CubeMX DDR Tool for MPUs + * DDR type: DDR3 / DDR3L + * DDR width: 16bits + * DDR density: 4Gb + * System frequency: 533000Khz + * Relaxed Timing Mode: false + * Address mapping type: RBC * - * STM32MP157C DK1/DK2 BOARD configuration - * 1x DDR3L 4Gb, 16-bit, 533MHz. - * Reference used NT5CC256M16DP-DI from NANYA - * - * DDR type / Platform DDR3/3L - * freq 533MHz - * width 16 - * datasheet 0 = MT41J256M16-187 / DDR3-1066 bin G - * DDR density 4 - * timing mode optimized - * Scheduling/QoS options : type = 2 - * address mapping : RBC - * Tc > + 85C : N + * Save Date: 2020.02.20, save Time: 18:45:20 */ -#define DDR_MEM_NAME "DDR3-1066/888 bin G 1x4Gb 533MHz v1.45" -#define DDR_MEM_SPEED 533000 -#define DDR_MEM_SIZE 0x20000000 + +#define DDR_MEM_NAME "DDR3-DDR3L 16bits 533000Khz" +#define DDR_MEM_SPEED 533000 +#define DDR_MEM_SIZE 0x20000000 #define DDR_MSTR 0x00041401 #define DDR_MRCTRL0 0x00000010 @@ -50,15 +49,6 @@ #define DDR_DFIUPD1 0x00000000 #define DDR_DFIUPD2 0x00000000 #define DDR_DFIPHYMSTR 0x00000000 -#define DDR_ADDRMAP1 0x00070707 -#define DDR_ADDRMAP2 0x00000000 -#define DDR_ADDRMAP3 0x1F000000 -#define DDR_ADDRMAP4 0x00001F1F -#define DDR_ADDRMAP5 0x06060606 -#define DDR_ADDRMAP6 0x0F060606 -#define DDR_ADDRMAP9 0x00000000 -#define DDR_ADDRMAP10 0x00000000 -#define DDR_ADDRMAP11 0x00000000 #define DDR_ODTCFG 0x06000600 #define DDR_ODTMAP 0x00000001 #define DDR_SCHED 0x00000C01 @@ -83,6 +73,15 @@ #define DDR_PCFGQOS1_1 0x00800040 #define DDR_PCFGWQOS0_1 0x01100C03 #define DDR_PCFGWQOS1_1 0x01000200 +#define DDR_ADDRMAP1 0x00070707 +#define DDR_ADDRMAP2 0x00000000 +#define DDR_ADDRMAP3 0x1F000000 +#define DDR_ADDRMAP4 0x00001F1F +#define DDR_ADDRMAP5 0x06060606 +#define DDR_ADDRMAP6 0x0F060606 +#define DDR_ADDRMAP9 0x00000000 +#define DDR_ADDRMAP10 0x00000000 +#define DDR_ADDRMAP11 0x00000000 #define DDR_PGCR 0x01442E02 #define DDR_PTR0 0x0022AA5B #define DDR_PTR1 0x04841104 diff --git a/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi index 4b70b60554..fc226d2544 100644 --- a/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi +++ b/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi @@ -1,24 +1,23 @@ // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause /* * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + */ + +/* + * File generated by STMicroelectronics STM32CubeMX DDR Tool for MPUs + * DDR type: DDR3 / DDR3L + * DDR width: 32bits + * DDR density: 8Gb + * System frequency: 533000Khz + * Relaxed Timing Mode: false + * Address mapping type: RBC * - * STM32MP157C ED1 BOARD configuration - * 2x DDR3L 4Gb each, 16-bit, 533MHz, Single Die Package in flyby topology. - * Reference used NT5CC256M16DP-DI from NANYA - * - * DDR type / Platform DDR3/3L - * freq 533MHz - * width 32 - * datasheet 0 = MT41J256M16-187 / DDR3-1066 bin G - * DDR density 8 - * timing mode optimized - * Scheduling/QoS options : type = 2 - * address mapping : RBC - * Tc > + 85C : N + * Save Date: 2020.02.20, save Time: 18:49:33 */ -#define DDR_MEM_NAME "DDR3-1066/888 bin G 2x4Gb 533MHz v1.45" -#define DDR_MEM_SPEED 533000 -#define DDR_MEM_SIZE 0x40000000 + +#define DDR_MEM_NAME "DDR3-DDR3L 32bits 533000Khz" +#define DDR_MEM_SPEED 533000 +#define DDR_MEM_SIZE 0x40000000 #define DDR_MSTR 0x00040401 #define DDR_MRCTRL0 0x00000010 @@ -50,15 +49,6 @@ #define DDR_DFIUPD1 0x00000000 #define DDR_DFIUPD2 0x00000000 #define DDR_DFIPHYMSTR 0x00000000 -#define DDR_ADDRMAP1 0x00080808 -#define DDR_ADDRMAP2 0x00000000 -#define DDR_ADDRMAP3 0x00000000 -#define DDR_ADDRMAP4 0x00001F1F -#define DDR_ADDRMAP5 0x07070707 -#define DDR_ADDRMAP6 0x0F070707 -#define DDR_ADDRMAP9 0x00000000 -#define DDR_ADDRMAP10 0x00000000 -#define DDR_ADDRMAP11 0x00000000 #define DDR_ODTCFG 0x06000600 #define DDR_ODTMAP 0x00000001 #define DDR_SCHED 0x00000C01 @@ -83,6 +73,15 @@ #define DDR_PCFGQOS1_1 0x00800040 #define DDR_PCFGWQOS0_1 0x01100C03 #define DDR_PCFGWQOS1_1 0x01000200 +#define DDR_ADDRMAP1 0x00080808 +#define DDR_ADDRMAP2 0x00000000 +#define DDR_ADDRMAP3 0x00000000 +#define DDR_ADDRMAP4 0x00001F1F +#define DDR_ADDRMAP5 0x07070707 +#define DDR_ADDRMAP6 0x0F070707 +#define DDR_ADDRMAP9 0x00000000 +#define DDR_ADDRMAP10 0x00000000 +#define DDR_ADDRMAP11 0x00000000 #define DDR_PGCR 0x01442E02 #define DDR_PTR0 0x0022AA5B #define DDR_PTR1 0x04841104 From patchwork Wed Apr 22 12:29:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238295 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:19 +0200 Subject: [PATCH v2 11/12] configs: stm32mp1: activate Ethernet PHY Realtek In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.11.I7cedf843510610b1a89f70db103e9f4c3e264560@changeid> From: Christophe Roullier Need Realtek driver to manage in RTL8211F the configuration of the LED. Initialize LCR (LED Control Register) to configure green LED for Link, yellow LED for Active Reviewed-by: Patrice Chotard Signed-off-by: Christophe Roullier Signed-off-by: Patrick Delaunay --- Changes in v2: None configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index c8f1780cab..9a16ada428 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -98,6 +98,7 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y CONFIG_SPL_SPI_FLASH_MTD=y +CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y CONFIG_PHY=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index d22605f398..8085d28772 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -84,6 +84,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y CONFIG_PHY=y From patchwork Wed Apr 22 12:29:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 238299 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Wed, 22 Apr 2020 14:29:20 +0200 Subject: [PATCH v2 12/12] configs: stm32mp1: activate CONFIG_ERRNO_STR In-Reply-To: <20200422122920.19340-1-patrick.delaunay@st.com> References: <20200422122920.19340-1-patrick.delaunay@st.com> Message-ID: <20200422142834.v2.12.Ie45c9b3aed36a3a582774fa1dffcea89d2c4bcf4@changeid> Add support of errno_str, used in command pmic and regulator. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- Changes in v2: None configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 9a16ada428..115d12ffb5 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -141,4 +141,5 @@ CONFIG_VIDEO_STM32=y CONFIG_VIDEO_STM32_DSI=y CONFIG_VIDEO_STM32_MAX_XRES=1280 CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_ERRNO_STR=y CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 8085d28772..d38394ed6b 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -125,4 +125,5 @@ CONFIG_VIDEO_STM32=y CONFIG_VIDEO_STM32_DSI=y CONFIG_VIDEO_STM32_MAX_XRES=1280 CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_ERRNO_STR=y CONFIG_FDT_FIXUP_PARTITIONS=y