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Fri, 29 Sep 2017 12:33:14 +0100 (BST) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 1/3] ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi Date: Fri, 29 Sep 2017 13:33:01 +0200 Message-id: <1506684783-9722-2-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1506684783-9722-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrMIsWRmVeSWpSXmKPExsWy7djPc7pV+uciDfYuUbDYOGM9q8X58xvY LWac38dksfbIXXYHFo9NqzrZPPq2rGL0+LxJLoA5issmJTUnsyy1SN8ugStjyuWNTAUTBSo6 F/QxNjDe4+1i5OSQEDCReDWvgRHCFpO4cG89WxcjF4eQwFJGiZk/TzJBOJ8ZJZbfbmGE6dj0 5wwjRGIZo8SG9u9MIAkhgQYmiQ3bNEFsNgFDia63XWwgtoiAqsTntgXsIA3MAn2MEtf3zmXu YuTgEBZIkFj2lROkhgWo5mP3V7A5vALuEode7GWCWCYncfLYZFYQm1PAQ6Lj+EtmiPhbVokF n4sgbBeJ8wv3QdULS7w6voUdwpaRuDy5mwXC7meUaGrVhrBnMEqcewv1vrXE4eMXweYzC/BJ TNo2Hew0CQFeiY42IYgSD4mWLSegxjhK/DpwhBXi99mMEjPOvGCcwCi9gJFhFaNIamlxbnpq sZFecWJucWleul5yfu4mRmDUnf53/OMOxvcnrA4xCnAwKvHw3pA7GynEmlhWXJl7iFGCg1lJ hHeR6rlIId6UxMqq1KL8+KLSnNTiQ4zSHCxK4ry2UW2RQgLpiSWp2ampBalFMFkmDk6pBsZJ 0Xo1jyPqq9c/Sl8/pbA2aM26TU3f9E492MHvlVVisaPsrJyL1s3VHCtfSnJ3zT/b+Hbn1Te1 03m+pLCcFfksVnOQO8Fie8/5pXN9b2prHhBskDtYNptHL0o7/NrKcr72T9yRxlLRq4582mmV zSa3+7+i70WmFeemXt91xUJx2l8B18kPF31TYinOSDTUYi4qTgQAhq4aIbYCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrJJMWRmVeSWpSXmKPExsVy+t/xq7pV+uciDf7dYrbYOGM9q8X58xvY LWac38dksfbIXXYHFo9NqzrZPPq2rGL0+LxJLoA5issmJTUnsyy1SN8ugStjyuWNTAUTBSo6 F/QxNjDe4+1i5OSQEDCR2PTnDCOELSZx4d56ti5GLg4hgSWMEtfPrmMGSQgJNDFJ9M5MA7HZ BAwlut52sYHYIgKqEp/bFrCDNDALTGCUWL1wFmsXIweHsECCxLKvnCA1LEA1H7u/MoHYvALu Eode7GWCWCYncfLYZFYQm1PAQ6Lj+EuoXe4Sa47tY5nAyLuAkWEVo0hqaXFuem6xkV5xYm5x aV66XnJ+7iZGYIBsO/Zzyw7GrnfBhxgFOBiVeHhvyJ2NFGJNLCuuzD3EKMHBrCTCu0j1XKQQ b0piZVVqUX58UWlOavEhRmkOFiVx3t49qyOFBNITS1KzU1MLUotgskwcnFINjPrTLZ3OX5Zc WPlGSZ/ny+fIeRIeLtaXNf857BK5z7N5sXmpwKS9S2ZcyHtuJJeoGZ00Ozb7+tVVGbvZPuxw batZPlHxhnQe+6OtjPM2xF2JkjIz74zUuuMoHhIU9Dns/OpsroWTpNOFH+oY5Z2Umi1x43TL FJ07mqFLJ3jXOJ+8tvl3mCGfhhJLcUaioRZzUXEiAD9xk1YMAgAA X-CMS-MailID: 20170929113314eucas1p12d4668bccf9a42acefc32d572e24301f X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20170929113314eucas1p12d4668bccf9a42acefc32d572e24301f X-RootMTR: 20170929113314eucas1p12d4668bccf9a42acefc32d572e24301f References: <1506684783-9722-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Signed-off-by: Marek Szyprowski --- arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi | 13 +++++++++++++ arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 12 ------------ 2 files changed, 13 insertions(+), 12 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi index c0b85981c6bf..da3141a307d5 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi @@ -11,6 +11,8 @@ * published by the Free Software Foundation. */ +#include + / { sound: sound { compatible = "simple-audio-card"; @@ -43,6 +45,17 @@ }; }; +&clock_audss { + assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_MOUT_I2S>, + <&clock_audss EXYNOS_DOUT_AUD_BUS>; + assigned-clock-parents = <&clock CLK_FIN_PLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>; + assigned-clock-rates = <0>, + <0>, + <19200000>; +}; + &hsi2c_5 { status = "okay"; max98090: max98090@10 { diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 305c2a2b728c..4478a089353a 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -16,7 +16,6 @@ #include #include #include -#include #include "exynos5800.dtsi" #include "exynos5422-cpus.dtsi" @@ -455,17 +454,6 @@ status = "okay"; }; -&clock_audss { - assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, - <&clock_audss EXYNOS_MOUT_I2S>, - <&clock_audss EXYNOS_DOUT_AUD_BUS>; - assigned-clock-parents = <&clock CLK_FIN_PLL>, - <&clock_audss EXYNOS_MOUT_AUDSS>; - assigned-clock-rates = <0>, - <0>, - <19200000>; -}; - &cpu0 { cpu-supply = <&buck6_reg>; }; From patchwork Fri Sep 29 11:33:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 114513 Delivered-To: patch@linaro.org Received: by 10.140.104.133 with SMTP id a5csp685102qgf; Fri, 29 Sep 2017 04:33:21 -0700 (PDT) X-Google-Smtp-Source: AOwi7QCt1SQwYJwB4n6iOv+QP2HVmHst0jzC04fHANMegKy/z5DUX1k5kh3bqACkRBiK0IHtfXaW X-Received: by 10.98.147.4 with SMTP id b4mr7154543pfe.347.1506684801294; Fri, 29 Sep 2017 04:33:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506684801; cv=none; d=google.com; s=arc-20160816; b=kLmJW2cE0IZCxpMLtk/J7A8e24dwDdFlczaax9iIY4SWKV6oXAdMfaJjbQRiFdUrLZ I1v5jwdiHKC+3pF70kBAK7vjb4JdOllnFf9HojAdreesm5P+9r5vQUodJR50IpylYuKn sqrJnFSR23j7q5gZc0MEjPh7h35l5hZE29Ckr6StFs62wy7E3ulFS8/fZSYoQ9ruUQvg eEA7BiV31i08eRwaObAO4FHxej7Sbs82CFGG+d0NdYdAsXVMCWt+iZHHhtqGL5sCuIXF ogSL/F46GuV1SEoNHTJlxEBB7brgfvpRjtSeJNYN0UxoevdT5uE11timtbJGNc/oyUE3 sKhw== ARC-Message-Signature: i=1; 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Fri, 29 Sep 2017 12:33:14 +0100 (BST) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 2/3] ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board Date: Fri, 29 Sep 2017 13:33:02 +0200 Message-id: <1506684783-9722-3-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1506684783-9722-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrGIsWRmVeSWpSXmKPExsWy7djPc7pV+uciDda81rfYOGM9q8X58xvY LWac38dksfbIXXYHFo9NqzrZPPq2rGL0+LxJLoA5issmJTUnsyy1SN8ugSvj+sbjjAU/LjJW 3N+8jb2B8ft8xi5GTg4JAROJKa+fsEHYYhIX7q0Hsrk4hASWMkrcuv0bLCEk8JlR4vvtMpiG ln19LBBFyxglfu1eyw5R1MAksWGbJojNJmAo0fW2C6xZREBV4nPbAnaQBmaBPkaJ63vnMoMk hAXCJG7v6QArYgEqOrz6JwuIzSvgLrF7URM7xDY5iZPHJrOC2JwCHhIdx18ygwySEHjLKvFh 5QOoIheJk5/eQ/0gLPHq+BaouIxEZ8dBJgi7n1GiqVUbwp7BKHHuLS+EbS1x+PhFsAXMAnwS k7ZNB1rAARTnlehoE4Io8ZA4vPAkK4TtKPF8+10miO9nM0ocbZzCOIFRegEjwypGkdTS4tz0 1GIjveLE3OLSvHS95PzcTYzA2Dv97/jHHYzvT1gdYhTgYFTi4b0hdzZSiDWxrLgy9xCjBAez kgjvItVzkUK8KYmVValF+fFFpTmpxYcYpTlYlMR5baPaIoUE0hNLUrNTUwtSi2CyTBycUg2M U1UOWjevXuj+UXLt0uU5syYoruM98u1m8rln3qtaD09K5vtmJu9g4OQy5Zz5tYrKHeVJkbW3 Zktt2j37wrpnHiJb/qx/KB0ivrok9fDHjFjpI9xveF9n+sdxutl3TvnM9qN6y0PRS+X5izd9 Y9T2OJu+4tvkY9MXvn0Yf+NXx89l3D+STG2tvyqxFGckGmoxFxUnAgBmbcwFuQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrDJMWRmVeSWpSXmKPExsVy+t/xq7pV+uciDb7NEbPYOGM9q8X58xvY LWac38dksfbIXXYHFo9NqzrZPPq2rGL0+LxJLoA5issmJTUnsyy1SN8ugSvj+sbjjAU/LjJW 3N+8jb2B8ft8xi5GTg4JAROJln19LBC2mMSFe+vZuhi5OIQEljBK3F45FywhJNDEJNE7Mw3E ZhMwlOh628UGYosIqEp8blvADtLALDCBUWL1wlmsIAlhgTCJFb8/M4PYLEBFh1f/BBvEK+Au sXtREzvENjmJk8cmg9VzCnhIdBx/yQyxzF1izbF9LBMYeRcwMqxiFEktLc5Nzy021CtOzC0u zUvXS87P3cQIDJNtx35u3sF4aWPwIUYBDkYlHt4bcmcjhVgTy4orcw8xSnAwK4nwLlI9FynE m5JYWZValB9fVJqTWnyIUZqDRUmct3fP6kghgfTEktTs1NSC1CKYLBMHp1QDo/Zl2Ze7P+nw ZbxmKrpyQ8n5ZH601BW216pZE6uqylwv3n1ckxh+OPnZmWP5L4IdMxn9uepEnmwps/sbVzBt w8Kc1byG9ddD+iL8D75yafx3T6pgZ9WMjx0enIefXDINeXprYdOVe7Mljb8Jhy2VfnEw0zBO 5XxMrmF+he/bB9OXTDbyfeN6SImlOCPRUIu5qDgRACuA6mIPAgAA X-CMS-MailID: 20170929113314eucas1p250037030204ab9d0f936afa6f660923f X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20170929113314eucas1p250037030204ab9d0f936afa6f660923f X-RootMTR: 20170929113314eucas1p250037030204ab9d0f936afa6f660923f References: <1506684783-9722-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI, no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO button. USB3.0 ports are used for build-in JMicron USB to SATA bridge and Gigabit R8152 ethernet chips. HC1 uses only passive cooling. Signed-off-by: Marek Szyprowski --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 443 +++++++++++++++++++++ arch/arm/boot/dts/exynos5422-odroidhc1.dts | 217 ++++++++++ arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 428 +------------------- 4 files changed, 662 insertions(+), 427 deletions(-) create mode 100644 arch/arm/boot/dts/exynos5422-odroid-core.dtsi create mode 100644 arch/arm/boot/dts/exynos5422-odroidhc1.dts -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9cf688d404b8..54b06a576551 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -176,6 +176,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \ exynos5420-arndale-octa.dtb \ exynos5420-peach-pit.dtb \ exynos5420-smdk5420.dtb \ + exynos5422-odroidhc1.dtb \ exynos5422-odroidxu3.dtb \ exynos5422-odroidxu3-lite.dtb \ exynos5422-odroidxu4.dtb \ diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi new file mode 100644 index 000000000000..a5b8d0f0877e --- /dev/null +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -0,0 +1,443 @@ +/* + * Hardkernel Odroid XU3/XU4/HC1 boards core device tree source + * + * Copyright (c) 2017 Marek Szyprowski + * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include "exynos5800.dtsi" +#include "exynos5422-cpus.dtsi" + +/ { + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x7EA00000>; + }; + + chosen { + stdout-path = "serial2:115200n8"; + }; + + firmware@02073000 { + compatible = "samsung,secure-firmware"; + reg = <0x02073000 0x1000>; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; + }; +}; + +&bus_wcore { + devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>, + <&nocp_mem1_0>, <&nocp_mem1_1>; + vdd-supply = <&buck3_reg>; + exynos,saturation-ratio = <100>; + status = "okay"; +}; + +&bus_noc { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_fsys_apb { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_fsys { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_fsys2 { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_mfc { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_gen { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_peri { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_g2d { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_g2d_acp { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_jpeg { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_jpeg_apb { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_disp1_fimd { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_disp1 { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_gscl_scaler { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_mscl { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&buck6_reg>; +}; + +&cpu4 { + cpu-supply = <&buck2_reg>; +}; + +&hsi2c_4 { + status = "okay"; + + s2mps11_pmic@66 { + compatible = "samsung,s2mps11-pmic"; + reg = <0x66>; + samsung,s2mps11-acokb-ground; + + interrupt-parent = <&gpx0>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&s2mps11_irq>; + + s2mps11_osc: clocks { + #clock-cells = <1>; + clock-output-names = "s2mps11_ap", + "s2mps11_cp", "s2mps11_bt"; + }; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "vdd_ldo1"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "vddq_mmc0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo4_reg: LDO4 { + regulator-name = "vdd_adc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo5_reg: LDO5 { + regulator-name = "vdd_ldo5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo6_reg: LDO6 { + regulator-name = "vdd_ldo6"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + regulator-name = "vdd_ldo7"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo8_reg: LDO8 { + regulator-name = "vdd_ldo8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo9_reg: LDO9 { + regulator-name = "vdd_ldo9"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + ldo10_reg: LDO10 { + regulator-name = "vdd_ldo10"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo11_reg: LDO11 { + regulator-name = "vdd_ldo11"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo12_reg: LDO12 { + regulator-name = "vdd_ldo12"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo13_reg: LDO13 { + regulator-name = "vddq_mmc2"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo15_reg: LDO15 { + regulator-name = "vdd_ldo15"; + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + regulator-always-on; + }; + + ldo16_reg: LDO16 { + regulator-name = "vdd_ldo16"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + regulator-always-on; + }; + + ldo17_reg: LDO17 { + regulator-name = "tsp_avdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo18_reg: LDO18 { + regulator-name = "vdd_emmc_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo19_reg: LDO19 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo24_reg: LDO24 { + regulator-name = "tsp_io"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo26_reg: LDO26 { + regulator-name = "vdd_ldo26"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2_reg: BUCK2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3_reg: BUCK3 { + regulator-name = "vdd_int"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck4_reg: BUCK4 { + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck5_reg: BUCK5 { + regulator-name = "vdd_mem"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck6_reg: BUCK6 { + regulator-name = "vdd_kfc"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck7_reg: BUCK7 { + regulator-name = "vdd_1.0v_ldo"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck8_reg: BUCK8 { + regulator-name = "vdd_1.8v_ldo"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck9_reg: BUCK9 { + regulator-name = "vdd_2.8v_ldo"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3750000>; + regulator-always-on; + regulator-boot-on; + }; + + buck10_reg: BUCK10 { + regulator-name = "vdd_vmem"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; +}; + +&mmc_2 { + status = "okay"; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; + bus-width = <4>; + cap-sd-highspeed; + vmmc-supply = <&ldo19_reg>; + vqmmc-supply = <&ldo13_reg>; +}; + +&nocp_mem0_0 { + status = "okay"; +}; + +&nocp_mem0_1 { + status = "okay"; +}; + +&nocp_mem1_0 { + status = "okay"; +}; + +&nocp_mem1_1 { + status = "okay"; +}; + +&pinctrl_0 { + s2mps11_irq: s2mps11-irq { + samsung,pins = "gpx0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; +}; + +&tmu_cpu0 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_cpu1 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_cpu2 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_cpu3 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_gpu { + vtmu-supply = <&ldo7_reg>; +}; + +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; + clock-names = "rtc", "rtc_src"; +}; + +&usbdrd_dwc3_0 { + dr_mode = "host"; +}; + +/* usbdrd_dwc3_1 mode customized in each board */ + +&usbdrd3_0 { + vdd33-supply = <&ldo9_reg>; + vdd10-supply = <&ldo11_reg>; +}; + +&usbdrd3_1 { + vdd33-supply = <&ldo9_reg>; + vdd10-supply = <&ldo11_reg>; +}; diff --git a/arch/arm/boot/dts/exynos5422-odroidhc1.dts b/arch/arm/boot/dts/exynos5422-odroidhc1.dts new file mode 100644 index 000000000000..2b3bd3cac5c1 --- /dev/null +++ b/arch/arm/boot/dts/exynos5422-odroidhc1.dts @@ -0,0 +1,217 @@ +/* + * Hardkernel Odroid HC1 board device tree source + * + * Copyright (c) 2017 Marek Szyprowski + * Copyright (c) 2017 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos5422-odroid-core.dtsi" + +/ { + model = "Hardkernel Odroid HC1"; + compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \ + "samsung,exynos5"; + + pwmleds { + compatible = "pwm-leds"; + + blueled { + label = "blue:heartbeat"; + pwms = <&pwm 2 2000000 0>; + pwm-names = "pwm2"; + max_brightness = <255>; + linux,default-trigger = "heartbeat"; + }; + }; + + thermal-zones { + cpu0_thermal: cpu0-thermal { + thermal-sensors = <&tmu_cpu0 0>; + trips { + cpu0_alert0: cpu-alert-1 { + temperature = <70000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "active"; + }; + cpu0_alert1: cpu-alert-1 { + temperature = <85000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "active"; + }; + cpu0_crit0: cpu-crit-0 { + temperature = <120000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + /* + * When reaching cpu0_alert0, reduce CPU + * by 2 steps. On Exynos5422/5800 that would + * be: 1600 MHz and 1100 MHz. + */ + map0 { + trip = <&cpu0_alert0>; + cooling-device = <&cpu0 0 2>; + }; + map1 { + trip = <&cpu0_alert0>; + cooling-device = <&cpu4 0 2>; + }; + /* + * When reaching cpu0_alert1, reduce CPU + * further, down to 600 MHz (12 steps for big, + * 7 steps for LITTLE). + */ + map2 { + trip = <&cpu0_alert1>; + cooling-device = <&cpu0 3 7>; + }; + map3 { + trip = <&cpu0_alert1>; + cooling-device = <&cpu4 3 12>; + }; + }; + }; + cpu1_thermal: cpu1-thermal { + thermal-sensors = <&tmu_cpu1 0>; + trips { + cpu1_alert0: cpu-alert-0 { + temperature = <70000>; + hysteresis = <10000>; + type = "active"; + }; + cpu1_alert1: cpu-alert-1 { + temperature = <85000>; + hysteresis = <10000>; + type = "active"; + }; + cpu1_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu1_alert0>; + cooling-device = <&cpu0 0 2>; + }; + map1 { + trip = <&cpu1_alert0>; + cooling-device = <&cpu4 0 2>; + }; + map2 { + trip = <&cpu1_alert1>; + cooling-device = <&cpu0 3 7>; + }; + map3 { + trip = <&cpu1_alert1>; + cooling-device = <&cpu4 3 12>; + }; + }; + }; + cpu2_thermal: cpu2-thermal { + thermal-sensors = <&tmu_cpu2 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu2_alert0: cpu-alert-0 { + temperature = <70000>; + hysteresis = <10000>; + type = "active"; + }; + cpu2_alert1: cpu-alert-1 { + temperature = <85000>; + hysteresis = <10000>; + type = "active"; + }; + cpu2_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu2_alert0>; + cooling-device = <&cpu0 0 2>; + }; + map1 { + trip = <&cpu2_alert0>; + cooling-device = <&cpu4 0 2>; + }; + map2 { + trip = <&cpu2_alert1>; + cooling-device = <&cpu0 3 7>; + }; + map3 { + trip = <&cpu2_alert1>; + cooling-device = <&cpu4 3 12>; + }; + }; + }; + cpu3_thermal: cpu3-thermal { + thermal-sensors = <&tmu_cpu3 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu3_alert0: cpu-alert-1 { + temperature = <70000>; + hysteresis = <10000>; + type = "active"; + }; + cpu3_alert1: cpu-alert-1 { + temperature = <85000>; + hysteresis = <10000>; + type = "active"; + }; + cpu3_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu3_alert0>; + cooling-device = <&cpu0 0 2>; + }; + map1 { + trip = <&cpu3_alert0>; + cooling-device = <&cpu4 0 2>; + }; + map2 { + trip = <&cpu3_alert1>; + cooling-device = <&cpu0 3 7>; + }; + map3 { + trip = <&cpu3_alert1>; + cooling-device = <&cpu4 3 12>; + }; + }; + }; + }; + +}; + +&pwm { + /* + * PWM 2 -- Blue LED + */ + pinctrl-0 = <&pwm2_out>; + pinctrl-names = "default"; + samsung,pwm-outputs = <2>; + status = "okay"; +}; + +&usbdrd_dwc3_1 { + dr_mode = "host"; +}; diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 4478a089353a..445c6c5a1300 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -12,35 +12,10 @@ * published by the Free Software Foundation. */ -#include #include -#include -#include -#include "exynos5800.dtsi" -#include "exynos5422-cpus.dtsi" +#include "exynos5422-odroid-core.dtsi" / { - memory@40000000 { - device_type = "memory"; - reg = <0x40000000 0x7EA00000>; - }; - - chosen { - stdout-path = "serial2:115200n8"; - }; - - firmware@02073000 { - compatible = "samsung,secure-firmware"; - reg = <0x02073000 0x1000>; - }; - - fixed-rate-clocks { - oscclk { - compatible = "samsung,exynos5420-oscclk"; - clock-frequency = <24000000>; - }; - }; - gpio_keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -371,97 +346,6 @@ status = "okay"; }; -&bus_wcore { - devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>, - <&nocp_mem1_0>, <&nocp_mem1_1>; - vdd-supply = <&buck3_reg>; - exynos,saturation-ratio = <100>; - status = "okay"; -}; - -&bus_noc { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_fsys_apb { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_fsys { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_fsys2 { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_mfc { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_gen { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_peri { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_g2d { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_g2d_acp { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_jpeg { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_jpeg_apb { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_disp1_fimd { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_disp1 { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_gscl_scaler { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_mscl { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&buck6_reg>; -}; - -&cpu4 { - cpu-supply = <&buck2_reg>; -}; - &hdmi { status = "okay"; ddc = <&i2c_2>; @@ -479,237 +363,6 @@ needs-hpd; }; -&hsi2c_4 { - status = "okay"; - - s2mps11_pmic@66 { - compatible = "samsung,s2mps11-pmic"; - reg = <0x66>; - samsung,s2mps11-acokb-ground; - - interrupt-parent = <&gpx0>; - interrupts = <4 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&s2mps11_irq>; - - s2mps11_osc: clocks { - #clock-cells = <1>; - clock-output-names = "s2mps11_ap", - "s2mps11_cp", "s2mps11_bt"; - }; - - regulators { - ldo1_reg: LDO1 { - regulator-name = "vdd_ldo1"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo3_reg: LDO3 { - regulator-name = "vddq_mmc0"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - ldo4_reg: LDO4 { - regulator-name = "vdd_adc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - ldo5_reg: LDO5 { - regulator-name = "vdd_ldo5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo6_reg: LDO6 { - regulator-name = "vdd_ldo6"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo7_reg: LDO7 { - regulator-name = "vdd_ldo7"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo8_reg: LDO8 { - regulator-name = "vdd_ldo8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo9_reg: LDO9 { - regulator-name = "vdd_ldo9"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - - ldo10_reg: LDO10 { - regulator-name = "vdd_ldo10"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo11_reg: LDO11 { - regulator-name = "vdd_ldo11"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo12_reg: LDO12 { - regulator-name = "vdd_ldo12"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo13_reg: LDO13 { - regulator-name = "vddq_mmc2"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - ldo15_reg: LDO15 { - regulator-name = "vdd_ldo15"; - regulator-min-microvolt = <3100000>; - regulator-max-microvolt = <3100000>; - regulator-always-on; - }; - - ldo16_reg: LDO16 { - regulator-name = "vdd_ldo16"; - regulator-min-microvolt = <2200000>; - regulator-max-microvolt = <2200000>; - regulator-always-on; - }; - - ldo17_reg: LDO17 { - regulator-name = "tsp_avdd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - ldo18_reg: LDO18 { - regulator-name = "vdd_emmc_1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - ldo19_reg: LDO19 { - regulator-name = "vdd_sd"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - ldo24_reg: LDO24 { - regulator-name = "tsp_io"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - }; - - ldo26_reg: LDO26 { - regulator-name = "vdd_ldo26"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - - buck1_reg: BUCK1 { - regulator-name = "vdd_mif"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1300000>; - regulator-always-on; - regulator-boot-on; - }; - - buck2_reg: BUCK2 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - buck3_reg: BUCK3 { - regulator-name = "vdd_int"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; - - buck4_reg: BUCK4 { - regulator-name = "vdd_g3d"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; - - buck5_reg: BUCK5 { - regulator-name = "vdd_mem"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; - - buck6_reg: BUCK6 { - regulator-name = "vdd_kfc"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - buck7_reg: BUCK7 { - regulator-name = "vdd_1.0v_ldo"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - buck8_reg: BUCK8 { - regulator-name = "vdd_1.8v_ldo"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - buck9_reg: BUCK9 { - regulator-name = "vdd_2.8v_ldo"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3750000>; - regulator-always-on; - regulator-boot-on; - }; - - buck10_reg: BUCK10 { - regulator-name = "vdd_vmem"; - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - regulator-always-on; - regulator-boot-on; - }; - }; - }; -}; - &i2c_2 { samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <66000>; @@ -740,36 +393,6 @@ vqmmc-supply = <&ldo3_reg>; }; -&mmc_2 { - status = "okay"; - card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <0 4>; - samsung,dw-mshc-ddr-timing = <0 2>; - pinctrl-names = "default"; - pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; - bus-width = <4>; - cap-sd-highspeed; - vmmc-supply = <&ldo19_reg>; - vqmmc-supply = <&ldo13_reg>; -}; - -&nocp_mem0_0 { - status = "okay"; -}; - -&nocp_mem0_1 { - status = "okay"; -}; - -&nocp_mem1_0 { - status = "okay"; -}; - -&nocp_mem1_1 { - status = "okay"; -}; - &pinctrl_0 { power_key: power-key { samsung,pins = "gpx0-3"; @@ -784,13 +407,6 @@ samsung,pin-pud = ; samsung,pin-drv = ; }; - - s2mps11_irq: s2mps11-irq { - samsung,pins = "gpx0-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; - }; }; &pinctrl_1 { @@ -801,45 +417,3 @@ samsung,pin-drv = ; }; }; - -&tmu_cpu0 { - vtmu-supply = <&ldo7_reg>; -}; - -&tmu_cpu1 { - vtmu-supply = <&ldo7_reg>; -}; - -&tmu_cpu2 { - vtmu-supply = <&ldo7_reg>; -}; - -&tmu_cpu3 { - vtmu-supply = <&ldo7_reg>; -}; - -&tmu_gpu { - vtmu-supply = <&ldo7_reg>; -}; - -&rtc { - status = "okay"; - clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; - clock-names = "rtc", "rtc_src"; -}; - -&usbdrd_dwc3_0 { - dr_mode = "host"; -}; - -/* usbdrd_dwc3_1 mode customized in each board */ - -&usbdrd3_0 { - vdd33-supply = <&ldo9_reg>; - vdd10-supply = <&ldo11_reg>; -}; - -&usbdrd3_1 { - vdd33-supply = <&ldo9_reg>; - vdd10-supply = <&ldo11_reg>; -}; From patchwork Fri Sep 29 11:33:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 114512 Delivered-To: patch@linaro.org Received: by 10.140.104.133 with SMTP id a5csp685108qgf; Fri, 29 Sep 2017 04:33:21 -0700 (PDT) X-Google-Smtp-Source: AOwi7QBysrlwjV4RuJR0sR7S34VJq9YYFs4twSM5IMvwx3zwVUT3anmXkBi2sFLE27+cZ5EbZESa X-Received: by 10.84.131.101 with SMTP id 92mr6442033pld.97.1506684801625; Fri, 29 Sep 2017 04:33:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506684801; cv=none; d=google.com; s=arc-20160816; b=BuPyrAZp/4JV1kfmEwvA/nabeFNQRdyWAr5kmTkB+qVl7EHyPk3xzLy4/p/dKSBfKW yA4oj5hdlFapQs1cBCE8gBFFEKwwSsJ7HkCT+gzU97Sy187izUXLcQYEh3lDzo+uqSeZ PdDuVW4KNqz+wOlMr8pRV7q0A1UgmgcOpf+ggxx7fruC+eKnbqHrRa6PomqY2kJzSAUz n6xWXebC+kLypuGCHALqiWd2XU1q4hph5H/5ecjjAB1DfZgjuoBwHuiqxUFBETYNhteq Rr/1BGsTqzOW+SpaRc5r5Vny5gJZGoG0YPy5OgBp92cKnkyA3yowIaRyGI7ZLUGQLlWB W3Ag== ARC-Message-Signature: i=1; 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Fri, 29 Sep 2017 12:33:14 +0100 (BST) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 3/3] ARM: exynos_defconfig: Enable UAS support for Odroid HC1 board Date: Fri, 29 Sep 2017 13:33:03 +0200 Message-id: <1506684783-9722-4-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1506684783-9722-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrCIsWRmVeSWpSXmKPExsWy7djPc7rV+uciDU4dZbfYOGM9q8X58xvY LWac38dksfbIXXYHFo9NqzrZPPq2rGL0+LxJLoA5issmJTUnsyy1SN8ugStj/cEp7AVL2Crm fe1ka2DcxdrFyMkhIWAiMXv6XSYIW0ziwr31bCC2kMBSRomfaxO6GLmA7M+MEkf3L2WCabi5 8ykLRGIZo8Tdru9QHQ1MEhu2aYLYbAKGEl1vu8DiIgKqEp/bFrCDNDAL9DFKXN87lxkkISwQ KvFmwhtGEJsFqOjGjNdgDbwC7hKX3h5mhtgmJ3Hy2GSwUzkFPCQ6jr9kBhkkIfCSVeLip9mM EEUuEp9f/oU6T1ji1fEt7BC2jERnx0GoeD+jRFOrNoQ9g1Hi3FteCNta4vDxi2ALmAX4JCZt mw60gAMozivR0SYEUeIhce/5a6iRjhJrtx1hhPh+NqPEp8NNTBMYpRcwMqxiFEktLc5NTy02 0itOzC0uzUvXS87P3cQIjLvT/45/3MH4/oTVIUYBDkYlHt4bcmcjhVgTy4orcw8xSnAwK4nw LlI9FynEm5JYWZValB9fVJqTWnyIUZqDRUmc1zaqLVJIID2xJDU7NbUgtQgmy8TBKdXAmOE1 Yaa7dM9z1Te2DauedHqcuH57gsmGoJs7q63WJhn6z0v/oxB4PqvU4caDP984qhobp1+fUyj1 78ej5GWN77d1zFq+782GyqoQy1OGKv5pLt4Ny16VyUttYYu6dVSk1GBX8o7FrBbWt5Vb7Lte BKxVWuqnmuVvwV127kqDhV/TtBLtp/eclFiKMxINtZiLihMBVzFA1LcCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFJMWRmVeSWpSXmKPExsVy+t/xq7pV+uciDRZ91LDYOGM9q8X58xvY LWac38dksfbIXXYHFo9NqzrZPPq2rGL0+LxJLoA5issmJTUnsyy1SN8ugStj/cEp7AVL2Crm fe1ka2DcxdrFyMkhIWAicXPnUxYIW0ziwr31bF2MXBxCAksYJZoWnmECSQgJNDFJ9M5MA7HZ BAwlut52sYHYIgKqEp/bFrCDNDALTGCUWL1wFthUYYFQiffdR5hBbBagohszXoM18Aq4S1x6 e5gZYpucxMljk8HqOQU8JDqOv2SGWOYusebYPpYJjLwLGBlWMYqklhbnpucWG+oVJ+YWl+al 6yXn525iBIbItmM/N+9gvLQx+BCjAAejEg/vDbmzkUKsiWXFlbmHGCU4mJVEeBepnosU4k1J rKxKLcqPLyrNSS0+xCjNwaIkztu7Z3WkkEB6YklqdmpqQWoRTJaJg1OqgTGPQfli69RJ9cds a6M0Vm5Qicw/p12fHtF3nmPNhptfbaZvMOyz0JX875+abVQV/++Ha9Q682Dz6hZRDav/r00b NURiDuhoJcdJLep8peU6teTTnL3p5vubbqiw1hu0VFyKnZidcm/33ONHJ+V0e19pr9a1+fr2 qFv66e4I05siyndlzswsVWIpzkg01GIuKk4EAPKAMLUNAgAA X-CMS-MailID: 20170929113314eucas1p2742039d35eb39f6d4749fe09988373d9 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20170929113314eucas1p2742039d35eb39f6d4749fe09988373d9 X-RootMTR: 20170929113314eucas1p2742039d35eb39f6d4749fe09988373d9 References: <1506684783-9722-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Odroid HC1 board has build-in JMicron USB to SATA bridge, which supports UAS protocol. Enable support for it to make sure that all build-in devices are available. Signed-off-by: Marek Szyprowski --- arch/arm/configs/exynos_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 8c2a2619971b..f1d7834990ec 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -244,7 +244,7 @@ CONFIG_USB_STORAGE_ONETOUCH=m CONFIG_USB_STORAGE_KARMA=m CONFIG_USB_STORAGE_CYPRESS_ATACB=m CONFIG_USB_STORAGE_ENE_UB6250=m -CONFIG_USB_UAS=m +CONFIG_USB_UAS=y CONFIG_USB_DWC3=y CONFIG_USB_DWC2=y CONFIG_USB_HSIC_USB3503=y