From patchwork Mon Feb 17 09:38:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 236430 List-Id: U-Boot discussion From: michal.simek at xilinx.com (Michal Simek) Date: Mon, 17 Feb 2020 10:38:57 +0100 Subject: [PATCH] dt-bindings: net: dp83867: Remove binding doc from U-Boot tree Message-ID: <0d2bbb5d481f995f06ecd1102dd938343d45a20d.1581932335.git.michal.simek@xilinx.com> U-Boot is having DT which doesn't cover all options currently supported by driver. DT binding is aligned with Linux kernel version available here. https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ti,dp83867.txt Based on my talk with Grygorii Strashko better will be to remove it. Also Linux kernel bindings are being converted to yaml that's another reason to do it only at one place. Signed-off-by: Michal Simek Reviewed-by: Grygorii Strashko --- doc/device-tree-bindings/net/ti,dp83867.txt | 35 --------------------- 1 file changed, 35 deletions(-) delete mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt deleted file mode 100644 index 268220964aab..000000000000 --- a/doc/device-tree-bindings/net/ti,dp83867.txt +++ /dev/null @@ -1,35 +0,0 @@ -* Texas Instruments - dp83867 Giga bit ethernet phy - -Required properties: - - reg - The ID number for the phy, usually a small integer - - ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h - for applicable values - - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h - for applicable values - - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h - for applicable values - - enet-phy-lane-swap - Indicates that PHY will swap the TX/RX lanes to - compensate for the board being designed with the lanes swapped. - - enet-phy-no-lane-swap - Indicates that PHY will disable swap of the - TX/RX lanes. - - ti,clk-output-sel - Muxing option for CLK_OUT pin. See dt-bindings/net/ti-dp83867.h - for applicable values. The CLK_OUT pin can also - be disabled by this property. When omitted, the - PHY's default will be left as is. - -Default child nodes are standard Ethernet PHY device -nodes as described in doc/devicetree/bindings/net/ethernet.txt - -Example: - - ethernet-phy at 0 { - reg = <0>; - ti,rx-internal-delay = ; - ti,tx-internal-delay = ; - ti,fifo-depth = ; - enet-phy-lane-no-swap; - ti,clk-output-sel = ; - }; - -Datasheet can be found: -http://www.ti.com/product/DP83867IR/datasheet