From patchwork Fri Feb 14 11:54:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 236362 List-Id: U-Boot discussion From: yamada.masahiro at socionext.com (Masahiro Yamada) Date: Fri, 14 Feb 2020 20:54:40 +0900 Subject: [PATCH 1/3] ARM: uniphier: move NAND reset assertion to U-Boot proper from SPL Message-ID: <20200214115442.7166-1-yamada.masahiro@socionext.com> The comment /* deassert reset */ is wrong. It asserts the reset. It no longer needs to stay in SPL. The NAND controller reset is handled in the driver. So, this assert can be moved to the board_init() of U-Boot proper. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Makefile | 1 + arch/arm/mach-uniphier/board_init.c | 4 ++ arch/arm/mach-uniphier/clk/clk-early-ld4.c | 7 ---- arch/arm/mach-uniphier/init.h | 8 ++++ arch/arm/mach-uniphier/nand-reset.c | 43 ++++++++++++++++++++++ 5 files changed, 56 insertions(+), 7 deletions(-) create mode 100644 arch/arm/mach-uniphier/nand-reset.c diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 115af244cd55..769778cf5083 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -22,6 +22,7 @@ endif obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o obj-y += pinctrl-glue.o obj-$(CONFIG_MMC) += mmc-first-dev.o +obj-$(CONFIG_NAND_DENALI) += nand-reset.o obj-y += fdt-fixup.o endif diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 99727a300420..4f9cd6e722c1 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -141,6 +141,10 @@ int board_init(void) support_card_late_init(); + led_puts("U4"); + + uniphier_nand_reset_assert(); + led_puts("Uboo"); return 0; diff --git a/arch/arm/mach-uniphier/clk/clk-early-ld4.c b/arch/arm/mach-uniphier/clk/clk-early-ld4.c index f32f78dd26d8..0f9ce6509768 100644 --- a/arch/arm/mach-uniphier/clk/clk-early-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-early-ld4.c @@ -15,13 +15,6 @@ void uniphier_ld4_early_clk_init(void) { u32 tmp; - /* deassert reset */ - if (spl_boot_device() != BOOT_DEVICE_NAND) { - tmp = readl(sc_base + SC_RSTCTRL); - tmp &= ~SC_RSTCTRL_NRST_NAND; - writel(tmp, sc_base + SC_RSTCTRL); - }; - /* provide clocks */ tmp = readl(sc_base + SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index 9dc5b885a5fe..3c77f4885348 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -101,6 +101,14 @@ unsigned int uniphier_boot_device_raw(void); int uniphier_have_internal_stm(void); int uniphier_boot_from_backend(void); int uniphier_pin_init(const char *pinconfig_name); + +#ifdef CONFIG_NAND_DENALI +void uniphier_nand_reset_assert(void); +#else +static inline void uniphier_nand_reset_assert(void) +{ +} +#endif #ifdef CONFIG_ARM64 void uniphier_mem_map_init(unsigned long dram_base, unsigned long dram_size); #else diff --git a/arch/arm/mach-uniphier/nand-reset.c b/arch/arm/mach-uniphier/nand-reset.c new file mode 100644 index 000000000000..b8f75a5f189f --- /dev/null +++ b/arch/arm/mach-uniphier/nand-reset.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0 or later +/* + * Copyright (C) 2020 Socionext Inc. + * Author: Masahiro Yamada + */ + +#include +#include +#include +#include + +#include "init.h" + +/* + * Assert the Denali NAND controller reset if found. + * + * On LD4, the bootstrap process starts running after power-on reset regardless + * of the boot mode, here the pin-mux is not necessarily set up for NAND, then + * the controller is stuck. Assert the controller reset here, and should be + * deasserted in the driver after the pin-mux is correctly handled. For other + * SoCs, the bootstrap runs only when the boot mode selects ONFi, but it is yet + * effective when the boot swap is on. So, the reset should be asserted anyway. + */ +void uniphier_nand_reset_assert(void) +{ + struct udevice *dev; + struct reset_ctl_bulk resets; + int ret; + + ret = uclass_find_first_device(UCLASS_MTD, &dev); + if (ret) + return; + + /* make sure this is the Denali NAND controller */ + if (strcmp(dev->driver->name, "denali-nand-dt")) + return; + + ret = reset_get_bulk(dev, &resets); + if (ret) + return; + + reset_assert_bulk(&resets); +} From patchwork Fri Feb 14 11:54:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 236364 List-Id: U-Boot discussion From: yamada.masahiro at socionext.com (Masahiro Yamada) Date: Fri, 14 Feb 2020 20:54:41 +0900 Subject: [PATCH 2/3] ARM: uniphier: remove workaround for the NAND write protect In-Reply-To: <20200214115442.7166-1-yamada.masahiro@socionext.com> References: <20200214115442.7166-1-yamada.masahiro@socionext.com> Message-ID: <20200214115442.7166-2-yamada.masahiro@socionext.com> This workaround was previously needed for LD4, Pro4, sLD8, Pro5 SoCs. The boot ROM does not touch this register for PXs2/LD6b or later. Now that the reset signal of the Denali NAND controller is always asserted in board_init() then deasserted in the driver, the WRITE_PROTECT register gets back to the default value, which means the write protect is deasserted. This workaround can go away entirely. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_late_init.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index 793283058c35..378aad0c9c45 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -14,25 +14,9 @@ #include #include #include -#include <../drivers/mtd/nand/raw/denali.h> #include "init.h" -static void nand_denali_wp_disable(void) -{ -#ifdef CONFIG_NAND_DENALI - /* - * Since the boot rom enables the write protection for NAND boot mode, - * it must be disabled somewhere for "nand write", "nand erase", etc. - * The workaround is here to not disturb the Denali NAND controller - * driver just for a really SoC-specific thing. - */ - void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE; - - writel(WRITE_PROTECT__FLAG, denali_reg + WRITE_PROTECT); -#endif -} - static void uniphier_set_env_fdt_file(void) { DECLARE_GLOBAL_DATA_PTR; @@ -114,7 +98,6 @@ int board_late_init(void) case BOOT_DEVICE_NAND: printf("NAND Boot"); env_set("bootdev", "nand"); - nand_denali_wp_disable(); break; case BOOT_DEVICE_NOR: printf("NOR Boot"); From patchwork Fri Feb 14 11:54:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 236363 List-Id: U-Boot discussion From: yamada.masahiro at socionext.com (Masahiro Yamada) Date: Fri, 14 Feb 2020 20:54:42 +0900 Subject: [PATCH 3/3] ARM: uniphier: detect the base of micro support card at run-time In-Reply-To: <20200214115442.7166-1-yamada.masahiro@socionext.com> References: <20200214115442.7166-1-yamada.masahiro@socionext.com> Message-ID: <20200214115442.7166-3-yamada.masahiro@socionext.com> The base address 0x43f00000 is no longer true for the future SoC. Extract the base address from the device tree. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/micro-support-card.c | 43 +++++++++++++++------ 1 file changed, 31 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-uniphier/micro-support-card.c b/arch/arm/mach-uniphier/micro-support-card.c index 46879019fdaa..c71470a20429 100644 --- a/arch/arm/mach-uniphier/micro-support-card.c +++ b/arch/arm/mach-uniphier/micro-support-card.c @@ -1,39 +1,58 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2012-2015 Panasonic Corporation - * Copyright (C) 2015-2016 Socionext Inc. + * Copyright (C) 2015-2020 Socionext Inc. * Author: Masahiro Yamada */ #include +#include +#include #include #include #include "micro-support-card.h" -#define MICRO_SUPPORT_CARD_BASE 0x43f00000 -#define SMC911X_BASE ((MICRO_SUPPORT_CARD_BASE) + 0x00000) -#define LED_BASE ((MICRO_SUPPORT_CARD_BASE) + 0x90000) -#define NS16550A_BASE ((MICRO_SUPPORT_CARD_BASE) + 0xb0000) -#define MICRO_SUPPORT_CARD_RESET ((MICRO_SUPPORT_CARD_BASE) + 0xd0034) -#define MICRO_SUPPORT_CARD_REVISION ((MICRO_SUPPORT_CARD_BASE) + 0xd00E0) +#define SMC911X_OFFSET 0x00000 +#define LED_OFFSET 0x90000 +#define NS16550A_OFFSET 0xb0000 +#define MICRO_SUPPORT_CARD_RESET 0xd0034 +#define MICRO_SUPPORT_CARD_REVISION 0xd00e0 static bool support_card_found; +static void __iomem *support_card_base; static void support_card_detect(void) { DECLARE_GLOBAL_DATA_PTR; const void *fdt = gd->fdt_blob; int offset; + u64 addr, addr2; offset = fdt_node_offset_by_compatible(fdt, 0, "smsc,lan9118"); if (offset < 0) return; + addr = fdt_get_base_address(fdt, offset); + if (addr == OF_BAD_ADDR) + return; + addr -= SMC911X_OFFSET; + offset = fdt_node_offset_by_compatible(fdt, 0, "ns16550a"); if (offset < 0) return; + addr2 = fdt_get_base_address(fdt, offset); + if (addr2 == OF_BAD_ADDR) + return; + addr2 -= NS16550A_OFFSET; + + /* sanity check */ + if (addr != addr2) + return; + + support_card_base = ioremap(addr, 0x100000); + support_card_found = true; } @@ -45,19 +64,19 @@ static void support_card_detect(void) */ static void support_card_reset_deassert(void) { - writel(0x00010000, MICRO_SUPPORT_CARD_RESET); + writel(0x00010000, support_card_base + MICRO_SUPPORT_CARD_RESET); } static void support_card_reset(void) { - writel(0x00020003, MICRO_SUPPORT_CARD_RESET); + writel(0x00020003, support_card_base + MICRO_SUPPORT_CARD_RESET); } static int support_card_show_revision(void) { u32 revision; - revision = readl(MICRO_SUPPORT_CARD_REVISION); + revision = readl(support_card_base + MICRO_SUPPORT_CARD_REVISION); revision &= 0xff; /* revision 3.6.x card changed the revision format */ @@ -94,7 +113,7 @@ int board_eth_init(bd_t *bis) if (!support_card_found) return 0; - return smc911x_initialize(0, SMC911X_BASE); + return smc911x_initialize(0, (unsigned long)support_card_base + SMC911X_OFFSET); } #endif @@ -264,5 +283,5 @@ void led_puts(const char *s) s++; } - writel(~val, LED_BASE); + writel(~val, support_card_base + LED_OFFSET); }