From patchwork Fri Feb 14 05:34:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Khan X-Patchwork-Id: 236321 List-Id: U-Boot discussion From: wasim.khan at nxp.com (Wasim Khan) Date: Fri, 14 Feb 2020 11:04:34 +0530 Subject: [PATCH 1/3] board: fsl: lx2160a: Program GIC LPI configuration table In-Reply-To: <1581658476-12611-1-git-send-email-wasim.khan@nxp.com> References: <1581658476-12611-1-git-send-email-wasim.khan@nxp.com> Message-ID: <1581658476-12611-2-git-send-email-wasim.khan@nxp.com> Program GIC LPI configuration table: 1. Redistributor PROCBASER configuration table (which is common for all redistributors) 2. Redistributor pending table (PENDBASER), for all the available redistributors. Signed-off-by: Manish Tomar Signed-off-by: Wasim Khan --- This patch has dependency on patch: https://patchwork.ozlabs.org/patch/1237847/ board/freescale/lx2160a/lx2160a.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 103b0cc..d8753b1 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -29,11 +29,14 @@ #include "../common/vid.h" #include #include +#include +#include #ifdef CONFIG_EMC2305 #include "../common/emc2305.h" #endif +#define GIC_LPI_SIZE 0x200000 #ifdef CONFIG_TARGET_LX2160AQDS #define CFG_MUX_I2C_SDHC(reg, value) ((reg & 0x3f) | value) #define SET_CFG_MUX1_SDHC1_SDHC(reg) (reg & 0x3f) @@ -628,7 +631,6 @@ void board_quiesce_devices(void) #endif #ifdef CONFIG_OF_BOARD_SETUP - int ft_board_setup(void *blob, bd_t *bd) { int i; @@ -639,6 +641,7 @@ int ft_board_setup(void *blob, bd_t *bd) u64 mc_memory_base = 0; u64 mc_memory_size = 0; u16 total_memory_banks; + u64 gic_lpi_base; ft_cpu_setup(blob, bd); @@ -658,6 +661,11 @@ int ft_board_setup(void *blob, bd_t *bd) size[i] = gd->bd->bi_dram[i].size; } +#ifdef CONFIG_GIC_V3_ITS + gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE; + gic_lpi_tables_init(gic_lpi_base, cpu_numcores()); +#endif + #ifdef CONFIG_RESV_RAM /* reduce size if reserved memory is within this bank */ if (gd->arch.resv_ram >= base[0] && From patchwork Fri Feb 14 05:34:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Khan X-Patchwork-Id: 236320 List-Id: U-Boot discussion From: wasim.khan at nxp.com (Wasim Khan) Date: Fri, 14 Feb 2020 11:04:35 +0530 Subject: [PATCH 2/3] configs: lx2160a: Enable GIC_V3_ITS config In-Reply-To: <1581658476-12611-1-git-send-email-wasim.khan@nxp.com> References: <1581658476-12611-1-git-send-email-wasim.khan@nxp.com> Message-ID: <1581658476-12611-3-git-send-email-wasim.khan@nxp.com> Enable GIC_V3_ITS config to program GIC LPI configuration table. Signed-off-by: Wasim Khan --- configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + 4 files changed, 4 insertions(+) diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 7c3b827..41fc40f 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -73,3 +73,4 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index 449b3cb..6af2080 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -70,3 +70,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index d1fffb3..00fb531 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -68,3 +68,4 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index 93f3e20..101bf8b 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -69,3 +69,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y From patchwork Fri Feb 14 05:34:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Khan X-Patchwork-Id: 236322 List-Id: U-Boot discussion From: wasim.khan at nxp.com (Wasim Khan) Date: Fri, 14 Feb 2020 11:04:36 +0530 Subject: [PATCH 3/3] board: fsl: lx2160a: Add GIC LPI memory reserve fixup In-Reply-To: <1581658476-12611-1-git-send-email-wasim.khan@nxp.com> References: <1581658476-12611-1-git-send-email-wasim.khan@nxp.com> Message-ID: <1581658476-12611-4-git-send-email-wasim.khan@nxp.com> Reserve DDR memory region used for GIC LPI configuration table. Signed-off-by: Wasim Khan --- board/freescale/lx2160a/lx2160a.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index d8753b1..34f866b 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -630,6 +630,21 @@ void board_quiesce_devices(void) } #endif +#ifdef CONFIG_GIC_V3_ITS +void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base) +{ + u32 phandle; + int err; + struct fdt_memory gic_lpi; + + gic_lpi.start = gic_lpi_base; + gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1; + err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle); + if (err < 0) + debug("failed to add reserved memory: %d\n", err); +} +#endif + #ifdef CONFIG_OF_BOARD_SETUP int ft_board_setup(void *blob, bd_t *bd) { @@ -664,6 +679,7 @@ int ft_board_setup(void *blob, bd_t *bd) #ifdef CONFIG_GIC_V3_ITS gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE; gic_lpi_tables_init(gic_lpi_base, cpu_numcores()); + fdt_fixup_gic_lpi_memory(blob, gic_lpi_base); #endif #ifdef CONFIG_RESV_RAM