From patchwork Tue Sep 26 12:17:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 114252 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp3759448qgf; Tue, 26 Sep 2017 05:18:13 -0700 (PDT) X-Google-Smtp-Source: AOwi7QBy1vA0zh63pXmi0LSbSw+31KIpDJFHgKZYyJJnFWul8AhZJk6SrlZ42/vnspbYMp0RBlCb X-Received: by 10.84.216.87 with SMTP id f23mr10551346plj.307.1506428292991; Tue, 26 Sep 2017 05:18:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506428292; cv=none; d=google.com; s=arc-20160816; b=pkCmtuPOfmY7qhC8f1+mMyZ84pHjv04Y08NtEkQWaMlGUjyuuu4ZQCgFWqMhHgr7h5 +r3GZCF5LVohZSl3ohJAn6pDMbR8aVVgpXhFpN/flEw1haYttETRJPLmYFQUazBCkIpp GmLP812dK0f3w/ZywTsFkd3mXfbO/8Fb/UGAYoG85927uJp2yJJU4LHwagd7qPAAEuwp 8Y7lu8kIbiqfraXqTYEUBMOezgrzFjDH+1qzzttmR6OH6Z2Nl1g3IAkyFOvzwwIc6jHq aUtn4ttAaL1hytSnb0sTy/MWOW3hAkSg4mlxfmaPMMQaYKo+Sk+jICWrKEr6YAaTR2KN U3Cw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=usFiEeSR3JwWtFHM5nwDc980ZOOEMiZjbov7f44gvvE=; b=cf2DRw13UzHhLBbIOz6EcKOeVQXSMsTxp4ytlWa0JARROS5NiFAKiw8c8FGEkZFv1V tXyE0xwkSR8eD9sPEIEELAAxV7NgPoBkYtJzSJ1eTfKDTA1uQpBrbf6agKVdHmCqpTJt u7nbS3y20jQxniae+eDIEwxUWYFNRo28QW4H8ykApEXR6Eei+Q+HBL5FTelxro8KiJME 11hEuWuILPHaBAoEf9bXTUZEa1LYB7+cx4SN47LGm6h+9MpE1s7pS1k4tAwFmwEtTIuK xMthyjEceOnVUBeXEeQLuf1UvQNfY2nBkc0ARWZwjS/LdD52Cts3uB2oVKH6pWWpYg/5 mwrQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s4si5652646plp.584.2017.09.26.05.18.12; Tue, 26 Sep 2017 05:18:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S968588AbdIZMSL (ORCPT + 26 others); Tue, 26 Sep 2017 08:18:11 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:52091 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965758AbdIZMSH (ORCPT ); Tue, 26 Sep 2017 08:18:07 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 9D0DD20911; Tue, 26 Sep 2017 14:18:04 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 34B012083C; Tue, 26 Sep 2017 14:17:54 +0200 (CEST) From: Quentin Schulz To: linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, lee.jones@linaro.org Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com, Quentin Schulz Subject: [PATCH v2 01/10] pinctrl: move gpio-axp209 to pinctrl Date: Tue, 26 Sep 2017 14:17:11 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To prepare the driver for the upcoming pinctrl features, move the GPIO driver AXP209 from GPIO to pinctrl subsystem. Signed-off-by: Quentin Schulz --- Documentation/devicetree/bindings/gpio/gpio-axp209.txt | 30 +- Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt | 30 +- drivers/gpio/Kconfig | 6 +- drivers/gpio/Makefile | 1 +- drivers/gpio/gpio-axp209.c | 188 +------- drivers/pinctrl/Kconfig | 6 +- drivers/pinctrl/Makefile | 1 +- drivers/pinctrl/pinctrl-axp209.c | 188 +++++++- 8 files changed, 225 insertions(+), 225 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-axp209.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt delete mode 100644 drivers/gpio/gpio-axp209.c create mode 100644 drivers/pinctrl/pinctrl-axp209.c -- git-series 0.9.1 diff --git a/Documentation/devicetree/bindings/gpio/gpio-axp209.txt b/Documentation/devicetree/bindings/gpio/gpio-axp209.txt deleted file mode 100644 index a661130..0000000 --- a/Documentation/devicetree/bindings/gpio/gpio-axp209.txt +++ /dev/null @@ -1,30 +0,0 @@ -AXP209 GPIO controller - -This driver follows the usual GPIO bindings found in -Documentation/devicetree/bindings/gpio/gpio.txt - -Required properties: -- compatible: Should be "x-powers,axp209-gpio" -- #gpio-cells: Should be two. The first cell is the pin number and the - second is the GPIO flags. -- gpio-controller: Marks the device node as a GPIO controller. - -This node must be a subnode of the axp20x PMIC, documented in -Documentation/devicetree/bindings/mfd/axp20x.txt - -Example: - -axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupt-parent = <&nmi_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <1>; - - axp_gpio: gpio { - compatible = "x-powers,axp209-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; -}; diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt new file mode 100644 index 0000000..a661130 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt @@ -0,0 +1,30 @@ +AXP209 GPIO controller + +This driver follows the usual GPIO bindings found in +Documentation/devicetree/bindings/gpio/gpio.txt + +Required properties: +- compatible: Should be "x-powers,axp209-gpio" +- #gpio-cells: Should be two. The first cell is the pin number and the + second is the GPIO flags. +- gpio-controller: Marks the device node as a GPIO controller. + +This node must be a subnode of the axp20x PMIC, documented in +Documentation/devicetree/bindings/mfd/axp20x.txt + +Example: + +axp209: pmic@34 { + compatible = "x-powers,axp209"; + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <1>; + + axp_gpio: gpio { + compatible = "x-powers,axp209-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; +}; diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 3f80f16..ad88178 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -122,12 +122,6 @@ config GPIO_ATH79 Select this option to enable GPIO driver for Atheros AR71XX/AR724X/AR913X SoC devices. -config GPIO_AXP209 - tristate "X-Powers AXP209 PMIC GPIO Support" - depends on MFD_AXP20X - help - Say yes to enable GPIO support for the AXP209 PMIC - config GPIO_BCM_KONA bool "Broadcom Kona GPIO" depends on OF_GPIO && (ARCH_BCM_MOBILE || COMPILE_TEST) diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index aeb70e9..f63631a 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -31,7 +31,6 @@ obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o -obj-$(CONFIG_GPIO_AXP209) += gpio-axp209.o obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o diff --git a/drivers/gpio/gpio-axp209.c b/drivers/gpio/gpio-axp209.c deleted file mode 100644 index 4a346b7..0000000 --- a/drivers/gpio/gpio-axp209.c +++ /dev/null @@ -1,188 +0,0 @@ -/* - * AXP20x GPIO driver - * - * Copyright (C) 2016 Maxime Ripard - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define AXP20X_GPIO_FUNCTIONS 0x7 -#define AXP20X_GPIO_FUNCTION_OUT_LOW 0 -#define AXP20X_GPIO_FUNCTION_OUT_HIGH 1 -#define AXP20X_GPIO_FUNCTION_INPUT 2 - -struct axp20x_gpio { - struct gpio_chip chip; - struct regmap *regmap; -}; - -static int axp20x_gpio_get_reg(unsigned offset) -{ - switch (offset) { - case 0: - return AXP20X_GPIO0_CTRL; - case 1: - return AXP20X_GPIO1_CTRL; - case 2: - return AXP20X_GPIO2_CTRL; - } - - return -EINVAL; -} - -static int axp20x_gpio_input(struct gpio_chip *chip, unsigned offset) -{ - struct axp20x_gpio *gpio = gpiochip_get_data(chip); - int reg; - - reg = axp20x_gpio_get_reg(offset); - if (reg < 0) - return reg; - - return regmap_update_bits(gpio->regmap, reg, - AXP20X_GPIO_FUNCTIONS, - AXP20X_GPIO_FUNCTION_INPUT); -} - -static int axp20x_gpio_get(struct gpio_chip *chip, unsigned offset) -{ - struct axp20x_gpio *gpio = gpiochip_get_data(chip); - unsigned int val; - int ret; - - ret = regmap_read(gpio->regmap, AXP20X_GPIO20_SS, &val); - if (ret) - return ret; - - return !!(val & BIT(offset + 4)); -} - -static int axp20x_gpio_get_direction(struct gpio_chip *chip, unsigned offset) -{ - struct axp20x_gpio *gpio = gpiochip_get_data(chip); - unsigned int val; - int reg, ret; - - reg = axp20x_gpio_get_reg(offset); - if (reg < 0) - return reg; - - ret = regmap_read(gpio->regmap, reg, &val); - if (ret) - return ret; - - /* - * This shouldn't really happen if the pin is in use already, - * or if it's not in use yet, it doesn't matter since we're - * going to change the value soon anyway. Default to output. - */ - if ((val & AXP20X_GPIO_FUNCTIONS) > 2) - return 0; - - /* - * The GPIO directions are the three lowest values. - * 2 is input, 0 and 1 are output - */ - return val & 2; -} - -static int axp20x_gpio_output(struct gpio_chip *chip, unsigned offset, - int value) -{ - struct axp20x_gpio *gpio = gpiochip_get_data(chip); - int reg; - - reg = axp20x_gpio_get_reg(offset); - if (reg < 0) - return reg; - - return regmap_update_bits(gpio->regmap, reg, - AXP20X_GPIO_FUNCTIONS, - value ? AXP20X_GPIO_FUNCTION_OUT_HIGH - : AXP20X_GPIO_FUNCTION_OUT_LOW); -} - -static void axp20x_gpio_set(struct gpio_chip *chip, unsigned offset, - int value) -{ - axp20x_gpio_output(chip, offset, value); -} - -static int axp20x_gpio_probe(struct platform_device *pdev) -{ - struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); - struct axp20x_gpio *gpio; - int ret; - - if (!of_device_is_available(pdev->dev.of_node)) - return -ENODEV; - - if (!axp20x) { - dev_err(&pdev->dev, "Parent drvdata not set\n"); - return -EINVAL; - } - - gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); - if (!gpio) - return -ENOMEM; - - gpio->chip.base = -1; - gpio->chip.can_sleep = true; - gpio->chip.parent = &pdev->dev; - gpio->chip.label = dev_name(&pdev->dev); - gpio->chip.owner = THIS_MODULE; - gpio->chip.get = axp20x_gpio_get; - gpio->chip.get_direction = axp20x_gpio_get_direction; - gpio->chip.set = axp20x_gpio_set; - gpio->chip.direction_input = axp20x_gpio_input; - gpio->chip.direction_output = axp20x_gpio_output; - gpio->chip.ngpio = 3; - - gpio->regmap = axp20x->regmap; - - ret = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio); - if (ret) { - dev_err(&pdev->dev, "Failed to register GPIO chip\n"); - return ret; - } - - dev_info(&pdev->dev, "AXP209 GPIO driver loaded\n"); - - return 0; -} - -static const struct of_device_id axp20x_gpio_match[] = { - { .compatible = "x-powers,axp209-gpio" }, - { } -}; -MODULE_DEVICE_TABLE(of, axp20x_gpio_match); - -static struct platform_driver axp20x_gpio_driver = { - .probe = axp20x_gpio_probe, - .driver = { - .name = "axp20x-gpio", - .of_match_table = axp20x_gpio_match, - }, -}; - -module_platform_driver(axp20x_gpio_driver); - -MODULE_AUTHOR("Maxime Ripard "); -MODULE_DESCRIPTION("AXP20x PMIC GPIO driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 1778cf4..b125a21 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -63,6 +63,12 @@ config PINCTRL_AS3722 open drain configuration for the GPIO pins of AS3722 devices. It also supports the GPIO functionality through gpiolib. +config PINCTRL_AXP209 + tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support" + depends on MFD_AXP20X + help + Say yes to enable pinctrl and GPIO support for the AXP209 PMIC + config PINCTRL_BF54x def_bool y if BF54x select PINCTRL_ADI2 diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index c16e279..9f621e5 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o obj-$(CONFIG_PINCTRL_ADI2) += pinctrl-adi2.o obj-$(CONFIG_PINCTRL_ARTPEC6) += pinctrl-artpec6.o obj-$(CONFIG_PINCTRL_AS3722) += pinctrl-as3722.o +obj-$(CONFIG_PINCTRL_AXP209) += pinctrl-axp209.o obj-$(CONFIG_PINCTRL_BF54x) += pinctrl-adi2-bf54x.o obj-$(CONFIG_PINCTRL_BF60x) += pinctrl-adi2-bf60x.o obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o diff --git a/drivers/pinctrl/pinctrl-axp209.c b/drivers/pinctrl/pinctrl-axp209.c new file mode 100644 index 0000000..4a346b7 --- /dev/null +++ b/drivers/pinctrl/pinctrl-axp209.c @@ -0,0 +1,188 @@ +/* + * AXP20x GPIO driver + * + * Copyright (C) 2016 Maxime Ripard + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define AXP20X_GPIO_FUNCTIONS 0x7 +#define AXP20X_GPIO_FUNCTION_OUT_LOW 0 +#define AXP20X_GPIO_FUNCTION_OUT_HIGH 1 +#define AXP20X_GPIO_FUNCTION_INPUT 2 + +struct axp20x_gpio { + struct gpio_chip chip; + struct regmap *regmap; +}; + +static int axp20x_gpio_get_reg(unsigned offset) +{ + switch (offset) { + case 0: + return AXP20X_GPIO0_CTRL; + case 1: + return AXP20X_GPIO1_CTRL; + case 2: + return AXP20X_GPIO2_CTRL; + } + + return -EINVAL; +} + +static int axp20x_gpio_input(struct gpio_chip *chip, unsigned offset) +{ + struct axp20x_gpio *gpio = gpiochip_get_data(chip); + int reg; + + reg = axp20x_gpio_get_reg(offset); + if (reg < 0) + return reg; + + return regmap_update_bits(gpio->regmap, reg, + AXP20X_GPIO_FUNCTIONS, + AXP20X_GPIO_FUNCTION_INPUT); +} + +static int axp20x_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + struct axp20x_gpio *gpio = gpiochip_get_data(chip); + unsigned int val; + int ret; + + ret = regmap_read(gpio->regmap, AXP20X_GPIO20_SS, &val); + if (ret) + return ret; + + return !!(val & BIT(offset + 4)); +} + +static int axp20x_gpio_get_direction(struct gpio_chip *chip, unsigned offset) +{ + struct axp20x_gpio *gpio = gpiochip_get_data(chip); + unsigned int val; + int reg, ret; + + reg = axp20x_gpio_get_reg(offset); + if (reg < 0) + return reg; + + ret = regmap_read(gpio->regmap, reg, &val); + if (ret) + return ret; + + /* + * This shouldn't really happen if the pin is in use already, + * or if it's not in use yet, it doesn't matter since we're + * going to change the value soon anyway. Default to output. + */ + if ((val & AXP20X_GPIO_FUNCTIONS) > 2) + return 0; + + /* + * The GPIO directions are the three lowest values. + * 2 is input, 0 and 1 are output + */ + return val & 2; +} + +static int axp20x_gpio_output(struct gpio_chip *chip, unsigned offset, + int value) +{ + struct axp20x_gpio *gpio = gpiochip_get_data(chip); + int reg; + + reg = axp20x_gpio_get_reg(offset); + if (reg < 0) + return reg; + + return regmap_update_bits(gpio->regmap, reg, + AXP20X_GPIO_FUNCTIONS, + value ? AXP20X_GPIO_FUNCTION_OUT_HIGH + : AXP20X_GPIO_FUNCTION_OUT_LOW); +} + +static void axp20x_gpio_set(struct gpio_chip *chip, unsigned offset, + int value) +{ + axp20x_gpio_output(chip, offset, value); +} + +static int axp20x_gpio_probe(struct platform_device *pdev) +{ + struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); + struct axp20x_gpio *gpio; + int ret; + + if (!of_device_is_available(pdev->dev.of_node)) + return -ENODEV; + + if (!axp20x) { + dev_err(&pdev->dev, "Parent drvdata not set\n"); + return -EINVAL; + } + + gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); + if (!gpio) + return -ENOMEM; + + gpio->chip.base = -1; + gpio->chip.can_sleep = true; + gpio->chip.parent = &pdev->dev; + gpio->chip.label = dev_name(&pdev->dev); + gpio->chip.owner = THIS_MODULE; + gpio->chip.get = axp20x_gpio_get; + gpio->chip.get_direction = axp20x_gpio_get_direction; + gpio->chip.set = axp20x_gpio_set; + gpio->chip.direction_input = axp20x_gpio_input; + gpio->chip.direction_output = axp20x_gpio_output; + gpio->chip.ngpio = 3; + + gpio->regmap = axp20x->regmap; + + ret = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio); + if (ret) { + dev_err(&pdev->dev, "Failed to register GPIO chip\n"); + return ret; + } + + dev_info(&pdev->dev, "AXP209 GPIO driver loaded\n"); + + return 0; +} + +static const struct of_device_id axp20x_gpio_match[] = { + { .compatible = "x-powers,axp209-gpio" }, + { } +}; +MODULE_DEVICE_TABLE(of, axp20x_gpio_match); + +static struct platform_driver axp20x_gpio_driver = { + .probe = axp20x_gpio_probe, + .driver = { + .name = "axp20x-gpio", + .of_match_table = axp20x_gpio_match, + }, +}; + +module_platform_driver(axp20x_gpio_driver); + +MODULE_AUTHOR("Maxime Ripard "); +MODULE_DESCRIPTION("AXP20x PMIC GPIO driver"); +MODULE_LICENSE("GPL"); From patchwork Tue Sep 26 12:17:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 114260 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp3761575qgf; Tue, 26 Sep 2017 05:20:17 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDzSQBmzAgk+qfTuPX5VtUnnD2W3KNZYD76jqmdZw8leWLv8JPuebInUxMl1w8w1+3xdSIj X-Received: by 10.99.109.65 with SMTP id i62mr10593493pgc.83.1506428417179; Tue, 26 Sep 2017 05:20:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506428417; cv=none; d=google.com; s=arc-20160816; b=RkbdSR0FvlzOOmK9ZarkGkvArCoTPkhWAyXJ8bYZLVFcgRoCI1rBAYnZRe2s2JVY1O Btrt+VgGwWM6+73dUz/v1bpt7MRIc+Gh7dMhn0JEzGe/41ivZKNuLGz30ySwkoft1mWR Z0tszM8oloPay/MXxVAUKJXMmXpt5zOwoJTFBLpwSWPnSxXK0HnTvp1LnET0UOmniakk zzLmO4MEhP/ENOl+cQ8CvRrvxshwr/cx4qm32PY+bO/Tdrjdpe4Fu7gDzuMhE+CEtNFv wr72oOsnOJgZ5VdMpI/kvu9d/UHBNG+YSocBVJnt0ewkkRArlbq9dyZ15UbEhNOPjw+m fZkQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=Vjk3s/goEe/fPvEnnqfj8jasWQsRylkalrYmpNC8iNk=; b=T6OXMNoLCGd4IyYskUgsApQi4ZvDbAJHdlKp5cY6ews15YZZU3YQapHQvQe7bse2fX jMXqvHJyxLBtoiphyJ1XtxJ+Hgse/Zu16KftvV9u4hH88cXlnoVX51kLmuFv1ztYzsw6 xVUNBkgyEfltQrcSL6E0U8KuFQ7RfTt1+HbLKlCQ/Tfwg4w50Of6EKZec0TI3222Y5wp JK7CvurH5+O/5HGxTZ7o+X/dwe3R65ZR2YNl0Lsw3d9DsUt8vGRh/hRm9L760P1D1+lj jd3x5WCX5wF445n1s883kjd4QI0LjdJsNV7Up6CDk0rJN2fCdsQUpwj0lzFTBOOINcBs fW7Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g65si4316580pfj.186.2017.09.26.05.20.16; Tue, 26 Sep 2017 05:20:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S968648AbdIZMUA (ORCPT + 26 others); Tue, 26 Sep 2017 08:20:00 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:52111 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966189AbdIZMSH (ORCPT ); Tue, 26 Sep 2017 08:18:07 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 3615320846; Tue, 26 Sep 2017 14:18:05 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id D7C7E20860; Tue, 26 Sep 2017 14:17:54 +0200 (CEST) From: Quentin Schulz To: linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, lee.jones@linaro.org Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com, Quentin Schulz Subject: [PATCH v2 03/10] pinctrl: axp209: use drv_data of pinctrl_pin_desc to store pin reg Date: Tue, 26 Sep 2017 14:17:13 +0200 Message-Id: <7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Instead of using a function to retrieve each pin's correct control register, use drv_data within pinctrl_pin_desc to store the ctrl reg. Remove axp20x_gpio_get_reg and replace every occurrence by a get from drv_data. Signed-off-by: Quentin Schulz --- drivers/pinctrl/pinctrl-axp209.c | 42 +++++++-------------------------- 1 file changed, 9 insertions(+), 33 deletions(-) -- git-series 0.9.1 diff --git a/drivers/pinctrl/pinctrl-axp209.c b/drivers/pinctrl/pinctrl-axp209.c index b35e8dd..4bbcba2 100644 --- a/drivers/pinctrl/pinctrl-axp209.c +++ b/drivers/pinctrl/pinctrl-axp209.c @@ -32,10 +32,11 @@ #define AXP20X_GPIO_FUNCTION_OUT_HIGH 1 #define AXP20X_GPIO_FUNCTION_INPUT 2 -#define AXP20X_PINCTRL_PIN(_pin_num, _pin) \ +#define AXP20X_PINCTRL_PIN(_pin_num, _pin, _regs) \ { \ .number = _pin_num, \ .name = _pin, \ + .drv_data = _regs, \ } #define AXP20X_PIN(_pin, ...) \ @@ -91,17 +92,17 @@ struct axp20x_gpio { }; static const struct axp20x_desc_pin axp209_pins[] = { - AXP20X_PIN(AXP20X_PINCTRL_PIN(0, "GPIO0"), + AXP20X_PIN(AXP20X_PINCTRL_PIN(0, "GPIO0", (void *)AXP20X_GPIO0_CTRL), AXP20X_FUNCTION(0x0, "gpio_out"), AXP20X_FUNCTION(0x2, "gpio_in"), AXP20X_FUNCTION(0x3, "ldo"), AXP20X_FUNCTION(0x4, "adc")), - AXP20X_PIN(AXP20X_PINCTRL_PIN(1, "GPIO1"), + AXP20X_PIN(AXP20X_PINCTRL_PIN(1, "GPIO1", (void *)AXP20X_GPIO1_CTRL), AXP20X_FUNCTION(0x0, "gpio_out"), AXP20X_FUNCTION(0x2, "gpio_in"), AXP20X_FUNCTION(0x3, "ldo"), AXP20X_FUNCTION(0x4, "adc")), - AXP20X_PIN(AXP20X_PINCTRL_PIN(2, "GPIO2"), + AXP20X_PIN(AXP20X_PINCTRL_PIN(2, "GPIO2", (void *)AXP20X_GPIO2_CTRL), AXP20X_FUNCTION(0x0, "gpio_out"), AXP20X_FUNCTION(0x2, "gpio_in")), }; @@ -111,20 +112,6 @@ static const struct axp20x_pinctrl_desc axp20x_pinctrl_data = { .npins = ARRAY_SIZE(axp209_pins), }; -static int axp20x_gpio_get_reg(unsigned offset) -{ - switch (offset) { - case 0: - return AXP20X_GPIO0_CTRL; - case 1: - return AXP20X_GPIO1_CTRL; - case 2: - return AXP20X_GPIO2_CTRL; - } - - return -EINVAL; -} - static int axp20x_gpio_input(struct gpio_chip *chip, unsigned offset) { return pinctrl_gpio_direction_input(chip->base + offset); @@ -146,12 +133,9 @@ static int axp20x_gpio_get(struct gpio_chip *chip, unsigned offset) static int axp20x_gpio_get_direction(struct gpio_chip *chip, unsigned offset) { struct axp20x_gpio *gpio = gpiochip_get_data(chip); + int reg = (int)gpio->desc->pins[offset].pin.drv_data; unsigned int val; - int reg, ret; - - reg = axp20x_gpio_get_reg(offset); - if (reg < 0) - return reg; + int ret; ret = regmap_read(gpio->regmap, reg, &val); if (ret) @@ -184,11 +168,7 @@ static void axp20x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct axp20x_gpio *gpio = gpiochip_get_data(chip); - int reg; - - reg = axp20x_gpio_get_reg(offset); - if (reg < 0) - return; + int reg = (int)gpio->desc->pins[offset].pin.drv_data; regmap_update_bits(gpio->regmap, reg, AXP20X_GPIO_FUNCTIONS, @@ -200,11 +180,7 @@ static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset, u8 config) { struct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev); - int reg; - - reg = axp20x_gpio_get_reg(offset); - if (reg < 0) - return reg; + int reg = (int)gpio->desc->pins[offset].pin.drv_data; return regmap_update_bits(gpio->regmap, reg, AXP20X_GPIO_FUNCTIONS, config); From patchwork Tue Sep 26 12:17:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 114261 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp3761739qgf; Tue, 26 Sep 2017 05:20:28 -0700 (PDT) X-Google-Smtp-Source: AOwi7QCZJP6oUkdvSRT+C80TS4tUTTw4u1v+ZkwIg+a6M27ILVEc3ynSfrKb2WpGqgAJCFrkVjxy X-Received: by 10.98.71.20 with SMTP id u20mr10484946pfa.23.1506428428049; Tue, 26 Sep 2017 05:20:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506428428; cv=none; d=google.com; s=arc-20160816; b=qJShAX+HlTHgl4ODMsVLd4lTwkOUyEQs4Vx0f9jj1G5wv5FUzpZ+NjTxQ0AMkDFUEN Kiif4+yfQ5xfEQ2iN0TY8CMgu02277gUr3i6ekewWzzGTRRtb73LmyLdVMxZ4Pfgzeio wuhirJbQtcO/WpDot1MEU63AZMeZRHfXCxCrt6DIB/FRWrrFQLx13AFYYR8AuUiU8XZp Kjrgqc02Z7SS3OGwcgFezB3Ich8Q47SwzZvUJU+A1gF1fsIj9sfAmSUddl38iODS9ZQY +AVSXNw/c7yuXiTdLJjGFMEkG+1Wvjj36RdyHtWZaSM6WGfulPAlJab+JfAdf08sk4f9 qWtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=YazyiBNkBkny7YSgcq3KPv00KtNVOKBTYdq/3VMZ1lY=; b=EBqmynb+S1+i4VcrrKiLh64olN6AyraehaQHhY/1aeAmRXJm4S704Iip8/0XZiUAH7 sK/fMhoM7jI3BdXwmxOsYdS0UOfMAeAiIF9LhRJEvVefEr7KOxMzP9FXJGQPgeSn7cgr NEX7P+XVrX7Bif/3sNgdEr/d4ZNjQutZtEh+r9ay+pttJdQKDOaKsnz0XqhdBzsf+eK4 zJfNbumvncewCL+QdLk3jFPtugvKU1Ap2+qrgnJl+NGCYDxaxOkMIaCRjZLgYciJVrKX OEoLwKh/qCVEn3s2+ejMbqfqNLUzcZoov9lncdYuWNEqfgc41PfElPF1GFeNKuprP5/z cj/w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g65si4316580pfj.186.2017.09.26.05.20.27; Tue, 26 Sep 2017 05:20:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S968633AbdIZMT5 (ORCPT + 26 others); Tue, 26 Sep 2017 08:19:57 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:52117 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966193AbdIZMSI (ORCPT ); Tue, 26 Sep 2017 08:18:08 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 9B1E520860; Tue, 26 Sep 2017 14:18:05 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 34B4F20867; Tue, 26 Sep 2017 14:17:55 +0200 (CEST) From: Quentin Schulz To: linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, lee.jones@linaro.org Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com, Quentin Schulz Subject: [PATCH v2 04/10] pinctrl: axp209: rename everything from gpio to pctl Date: Tue, 26 Sep 2017 14:17:14 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This driver used to do only GPIO features of the GPIOs in X-Powers AXP20X. Now that we have migrated everything to the pinctrl subsystem and added pinctrl features, rename everything related to pinctrl from gpio to pctl to ease the understanding of differences between GPIO and pinctrl features. Signed-off-by: Quentin Schulz --- drivers/pinctrl/pinctrl-axp209.c | 198 ++++++++++++++++---------------- 1 file changed, 99 insertions(+), 99 deletions(-) -- git-series 0.9.1 diff --git a/drivers/pinctrl/pinctrl-axp209.c b/drivers/pinctrl/pinctrl-axp209.c index 4bbcba2..4be1aca 100644 --- a/drivers/pinctrl/pinctrl-axp209.c +++ b/drivers/pinctrl/pinctrl-axp209.c @@ -79,7 +79,7 @@ struct axp20x_pinctrl_function { unsigned int ngroups; }; -struct axp20x_gpio { +struct axp20x_pctl { struct gpio_chip chip; struct regmap *regmap; struct pinctrl_dev *pctl_dev; @@ -119,11 +119,11 @@ static int axp20x_gpio_input(struct gpio_chip *chip, unsigned offset) static int axp20x_gpio_get(struct gpio_chip *chip, unsigned offset) { - struct axp20x_gpio *gpio = gpiochip_get_data(chip); + struct axp20x_pctl *pctl = gpiochip_get_data(chip); unsigned int val; int ret; - ret = regmap_read(gpio->regmap, AXP20X_GPIO20_SS, &val); + ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val); if (ret) return ret; @@ -132,12 +132,12 @@ static int axp20x_gpio_get(struct gpio_chip *chip, unsigned offset) static int axp20x_gpio_get_direction(struct gpio_chip *chip, unsigned offset) { - struct axp20x_gpio *gpio = gpiochip_get_data(chip); - int reg = (int)gpio->desc->pins[offset].pin.drv_data; + struct axp20x_pctl *pctl = gpiochip_get_data(chip); + int reg = (int)pctl->desc->pins[offset].pin.drv_data; unsigned int val; int ret; - ret = regmap_read(gpio->regmap, reg, &val); + ret = regmap_read(pctl->regmap, reg, &val); if (ret) return ret; @@ -167,10 +167,10 @@ static int axp20x_gpio_output(struct gpio_chip *chip, unsigned offset, static void axp20x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { - struct axp20x_gpio *gpio = gpiochip_get_data(chip); - int reg = (int)gpio->desc->pins[offset].pin.drv_data; + struct axp20x_pctl *pctl = gpiochip_get_data(chip); + int reg = (int)pctl->desc->pins[offset].pin.drv_data; - regmap_update_bits(gpio->regmap, reg, + regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS, value ? AXP20X_GPIO_FUNCTION_OUT_HIGH : AXP20X_GPIO_FUNCTION_OUT_LOW); @@ -179,26 +179,26 @@ static void axp20x_gpio_set(struct gpio_chip *chip, unsigned offset, static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset, u8 config) { - struct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev); - int reg = (int)gpio->desc->pins[offset].pin.drv_data; + struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); + int reg = (int)pctl->desc->pins[offset].pin.drv_data; - return regmap_update_bits(gpio->regmap, reg, AXP20X_GPIO_FUNCTIONS, + return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS, config); } static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev) { - struct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev); + struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); - return gpio->nfunctions; + return pctl->nfunctions; } static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev, unsigned int selector) { - struct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev); + struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); - return gpio->functions[selector].name; + return pctl->functions[selector].name; } static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev, @@ -206,24 +206,24 @@ static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev, const char * const **groups, unsigned int *num_groups) { - struct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev); + struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); - *groups = gpio->functions[selector].groups; - *num_groups = gpio->functions[selector].ngroups; + *groups = pctl->functions[selector].groups; + *num_groups = pctl->functions[selector].ngroups; return 0; } static struct axp20x_desc_function * -axp20x_pinctrl_desc_find_func_by_name(struct axp20x_gpio *gpio, +axp20x_pinctrl_desc_find_func_by_name(struct axp20x_pctl *pctl, const char *group, const char *func) { const struct axp20x_desc_pin *pin; struct axp20x_desc_function *desc_func; int i; - for (i = 0; i < gpio->desc->npins; i++) { - pin = &gpio->desc->pins[i]; + for (i = 0; i < pctl->desc->npins; i++) { + pin = &pctl->desc->pins[i]; if (!strcmp(pin->pin.name, group)) { desc_func = pin->functions; @@ -250,11 +250,11 @@ axp20x_pinctrl_desc_find_func_by_name(struct axp20x_gpio *gpio, static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev, unsigned int function, unsigned int group) { - struct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev); - struct axp20x_pinctrl_group *g = gpio->groups + group; - struct axp20x_pinctrl_function *func = gpio->functions + function; + struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); + struct axp20x_pinctrl_group *g = pctl->groups + group; + struct axp20x_pinctrl_function *func = pctl->functions + function; struct axp20x_desc_function *desc_func = - axp20x_pinctrl_desc_find_func_by_name(gpio, g->name, + axp20x_pinctrl_desc_find_func_by_name(pctl, g->name, func->name); if (!desc_func) return -EINVAL; @@ -263,15 +263,15 @@ static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev, } static struct axp20x_desc_function * -axp20x_pctl_desc_find_func_by_pin(struct axp20x_gpio *gpio, unsigned int offset, +axp20x_pctl_desc_find_func_by_pin(struct axp20x_pctl *pctl, unsigned int offset, const char *func) { const struct axp20x_desc_pin *pin; struct axp20x_desc_function *desc_func; int i; - for (i = 0; i < gpio->desc->npins; i++) { - pin = &gpio->desc->pins[i]; + for (i = 0; i < pctl->desc->npins; i++) { + pin = &pctl->desc->pins[i]; if (pin->pin.number == offset) { desc_func = pin->functions; @@ -292,7 +292,7 @@ static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset, bool input) { - struct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev); + struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); struct axp20x_desc_function *desc_func; const char *func; @@ -301,7 +301,7 @@ static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, else func = "gpio_out"; - desc_func = axp20x_pctl_desc_find_func_by_pin(gpio, offset, func); + desc_func = axp20x_pctl_desc_find_func_by_pin(pctl, offset, func); if (!desc_func) return -EINVAL; @@ -319,16 +319,16 @@ static const struct pinmux_ops axp20x_pmx_ops = { static int axp20x_groups_cnt(struct pinctrl_dev *pctldev) { - struct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev); + struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); - return gpio->ngroups; + return pctl->ngroups; } static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, const unsigned int **pins, unsigned int *num_pins) { - struct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev); - struct axp20x_pinctrl_group *g = gpio->groups + selector; + struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); + struct axp20x_pinctrl_group *g = pctl->groups + selector; *pins = (unsigned int *)&g->pin; *num_pins = 1; @@ -339,9 +339,9 @@ static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, static const char *axp20x_group_name(struct pinctrl_dev *pctldev, unsigned int selector) { - struct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev); + struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); - return gpio->groups[selector].name; + return pctl->groups[selector].name; } static const struct pinctrl_ops axp20x_pctrl_ops = { @@ -353,9 +353,9 @@ static const struct pinctrl_ops axp20x_pctrl_ops = { }; static struct axp20x_pinctrl_function * -axp20x_pinctrl_function_by_name(struct axp20x_gpio *gpio, const char *name) +axp20x_pinctrl_function_by_name(struct axp20x_pctl *pctl, const char *name) { - struct axp20x_pinctrl_function *func = gpio->functions; + struct axp20x_pinctrl_function *func = pctl->functions; while (func->name) { if (!strcmp(func->name, name)) @@ -366,10 +366,10 @@ axp20x_pinctrl_function_by_name(struct axp20x_gpio *gpio, const char *name) return NULL; } -static int axp20x_pinctrl_add_function(struct axp20x_gpio *gpio, +static int axp20x_pinctrl_add_function(struct axp20x_pctl *pctl, const char *name) { - struct axp20x_pinctrl_function *func = gpio->functions; + struct axp20x_pinctrl_function *func = pctl->functions; while (func->name) { if (!strcmp(func->name, name)) { @@ -383,7 +383,7 @@ static int axp20x_pinctrl_add_function(struct axp20x_gpio *gpio, func->name = name; func->ngroups = 1; - gpio->nfunctions++; + pctl->nfunctions++; return 0; } @@ -391,13 +391,13 @@ static int axp20x_pinctrl_add_function(struct axp20x_gpio *gpio, static int axp20x_attach_group_function(struct platform_device *pdev, const struct axp20x_desc_pin *pin) { - struct axp20x_gpio *gpio = platform_get_drvdata(pdev); + struct axp20x_pctl *pctl = platform_get_drvdata(pdev); struct axp20x_desc_function *desc_func = pin->functions; struct axp20x_pinctrl_function *func; const char **func_grp; while (desc_func->name) { - func = axp20x_pinctrl_function_by_name(gpio, desc_func->name); + func = axp20x_pinctrl_function_by_name(pctl, desc_func->name); if (!func) return -EINVAL; @@ -422,48 +422,48 @@ static int axp20x_attach_group_function(struct platform_device *pdev, static int axp20x_build_state(struct platform_device *pdev) { - struct axp20x_gpio *gpio = platform_get_drvdata(pdev); - unsigned int npins = gpio->desc->npins; + struct axp20x_pctl *pctl = platform_get_drvdata(pdev); + unsigned int npins = pctl->desc->npins; const struct axp20x_desc_pin *pin; struct axp20x_desc_function *func; int i, ret; - gpio->ngroups = npins; - gpio->groups = devm_kzalloc(&pdev->dev, - gpio->ngroups * sizeof(*gpio->groups), + pctl->ngroups = npins; + pctl->groups = devm_kzalloc(&pdev->dev, + pctl->ngroups * sizeof(*pctl->groups), GFP_KERNEL); - if (!gpio->groups) + if (!pctl->groups) return -ENOMEM; for (i = 0; i < npins; i++) { - gpio->groups[i].name = gpio->desc->pins[i].pin.name; - gpio->groups[i].pin = gpio->desc->pins[i].pin.number; + pctl->groups[i].name = pctl->desc->pins[i].pin.name; + pctl->groups[i].pin = pctl->desc->pins[i].pin.number; } /* We assume 4 functions per pin should be enough as a default max */ - gpio->functions = devm_kzalloc(&pdev->dev, - npins * 4 * sizeof(*gpio->functions), + pctl->functions = devm_kzalloc(&pdev->dev, + npins * 4 * sizeof(*pctl->functions), GFP_KERNEL); - if (!gpio->functions) + if (!pctl->functions) return -ENOMEM; /* Create a list of uniquely named functions */ for (i = 0; i < npins; i++) { - pin = &gpio->desc->pins[i]; + pin = &pctl->desc->pins[i]; func = pin->functions; while (func->name) { - axp20x_pinctrl_add_function(gpio, func->name); + axp20x_pinctrl_add_function(pctl, func->name); func++; } } - gpio->functions = krealloc(gpio->functions, - gpio->nfunctions * sizeof(*gpio->functions), + pctl->functions = krealloc(pctl->functions, + pctl->nfunctions * sizeof(*pctl->functions), GFP_KERNEL); for (i = 0; i < npins; i++) { - pin = &gpio->desc->pins[i]; + pin = &pctl->desc->pins[i]; ret = axp20x_attach_group_function(pdev, pin); if (ret) return ret; @@ -472,10 +472,10 @@ static int axp20x_build_state(struct platform_device *pdev) return 0; } -static int axp20x_gpio_probe(struct platform_device *pdev) +static int axp20x_pctl_probe(struct platform_device *pdev) { struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); - struct axp20x_gpio *gpio; + struct axp20x_pctl *pctl; struct pinctrl_desc *pctrl_desc; struct pinctrl_pin_desc *pins; int ret, i; @@ -488,42 +488,42 @@ static int axp20x_gpio_probe(struct platform_device *pdev) return -EINVAL; } - gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); - if (!gpio) + pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); + if (!pctl) return -ENOMEM; - gpio->chip.base = -1; - gpio->chip.can_sleep = true; - gpio->chip.request = gpiochip_generic_request; - gpio->chip.free = gpiochip_generic_free; - gpio->chip.parent = &pdev->dev; - gpio->chip.label = dev_name(&pdev->dev); - gpio->chip.owner = THIS_MODULE; - gpio->chip.get = axp20x_gpio_get; - gpio->chip.get_direction = axp20x_gpio_get_direction; - gpio->chip.set = axp20x_gpio_set; - gpio->chip.direction_input = axp20x_gpio_input; - gpio->chip.direction_output = axp20x_gpio_output; - gpio->chip.ngpio = 3; + pctl->chip.base = -1; + pctl->chip.can_sleep = true; + pctl->chip.request = gpiochip_generic_request; + pctl->chip.free = gpiochip_generic_free; + pctl->chip.parent = &pdev->dev; + pctl->chip.label = dev_name(&pdev->dev); + pctl->chip.owner = THIS_MODULE; + pctl->chip.get = axp20x_gpio_get; + pctl->chip.get_direction = axp20x_gpio_get_direction; + pctl->chip.set = axp20x_gpio_set; + pctl->chip.direction_input = axp20x_gpio_input; + pctl->chip.direction_output = axp20x_gpio_output; + pctl->chip.ngpio = 3; - gpio->regmap = axp20x->regmap; + pctl->regmap = axp20x->regmap; - gpio->desc = &axp20x_pinctrl_data; - gpio->dev = &pdev->dev; + pctl->desc = &axp20x_pinctrl_data; + pctl->dev = &pdev->dev; - platform_set_drvdata(pdev, gpio); + platform_set_drvdata(pdev, pctl); ret = axp20x_build_state(pdev); if (ret) return ret; - pins = devm_kzalloc(&pdev->dev, gpio->desc->npins * sizeof(*pins), + pins = devm_kzalloc(&pdev->dev, pctl->desc->npins * sizeof(*pins), GFP_KERNEL); if (!pins) return -ENOMEM; - for (i = 0; i < gpio->desc->npins; i++) - pins[i] = gpio->desc->pins[i].pin; + for (i = 0; i < pctl->desc->npins; i++) + pins[i] = pctl->desc->pins[i].pin; pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL); if (!pctrl_desc) @@ -532,26 +532,26 @@ static int axp20x_gpio_probe(struct platform_device *pdev) pctrl_desc->name = dev_name(&pdev->dev); pctrl_desc->owner = THIS_MODULE; pctrl_desc->pins = pins; - pctrl_desc->npins = gpio->desc->npins; + pctrl_desc->npins = pctl->desc->npins; pctrl_desc->pctlops = &axp20x_pctrl_ops; pctrl_desc->pmxops = &axp20x_pmx_ops; - gpio->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, gpio); - if (IS_ERR(gpio->pctl_dev)) { + pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl); + if (IS_ERR(pctl->pctl_dev)) { dev_err(&pdev->dev, "couldn't register pinctrl driver\n"); - return PTR_ERR(gpio->pctl_dev); + return PTR_ERR(pctl->pctl_dev); } - ret = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio); + ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl); if (ret) { dev_err(&pdev->dev, "Failed to register GPIO chip\n"); return ret; } - ret = gpiochip_add_pin_range(&gpio->chip, dev_name(&pdev->dev), - gpio->desc->pins->pin.number, - gpio->desc->pins->pin.number, - gpio->desc->npins); + ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev), + pctl->desc->pins->pin.number, + pctl->desc->pins->pin.number, + pctl->desc->npins); if (ret) { dev_err(&pdev->dev, "failed to add pin range\n"); return ret; @@ -562,21 +562,21 @@ static int axp20x_gpio_probe(struct platform_device *pdev) return 0; } -static const struct of_device_id axp20x_gpio_match[] = { +static const struct of_device_id axp20x_pctl_match[] = { { .compatible = "x-powers,axp209-gpio" }, { } }; -MODULE_DEVICE_TABLE(of, axp20x_gpio_match); +MODULE_DEVICE_TABLE(of, axp20x_pctl_match); -static struct platform_driver axp20x_gpio_driver = { - .probe = axp20x_gpio_probe, +static struct platform_driver axp20x_pctl_driver = { + .probe = axp20x_pctl_probe, .driver = { .name = "axp20x-gpio", - .of_match_table = axp20x_gpio_match, + .of_match_table = axp20x_pctl_match, }, }; -module_platform_driver(axp20x_gpio_driver); +module_platform_driver(axp20x_pctl_driver); MODULE_AUTHOR("Maxime Ripard "); MODULE_AUTHOR("Quentin Schulz "); From patchwork Tue Sep 26 12:17:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 114255 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp3759606qgf; Tue, 26 Sep 2017 05:18:21 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAbigRWyLlYmLERDcVwy7LvjI5ufgC6GJ2GqGHMqTG27fBaxn+k+D2gF4iX5mWr38YoALbM X-Received: by 10.99.175.14 with SMTP id w14mr10954604pge.365.1506428301623; Tue, 26 Sep 2017 05:18:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506428301; cv=none; d=google.com; s=arc-20160816; b=VFS7CeT1Ag41o7m3pARi1czogO7xwzeEuX4iZwT1JdnZPgHQ91dlIBmXHrjy693xsr 59uInrnTWBx8VVBh2hI+S+kS6eeynbwq9T/jz3ifeq3BpIdp80L5DCO7OBI+Ju3NnWRA l++9t7FCg9q4SVVJF6+zCriTQM/pt47OhZz5ybjw00mmbd3SDxB3JEtx6xTsiybQiNCG 8wdwOtaDbM+/LH+AvkHK4wAxfKvB3zMZHSAutb2mtVzdW6vFRfAX26/kxy8pNPNhLNS7 9T8GQJ4ssqYdwxHXD7EkTAhNrdoPC/oARnLvfXmUcIv7Ak39GGzRB7JPEJOxUWYEVprd sL4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=y6C+GrHJmDEqqkSib3M5E9etKZUCsMmRJqFBo7P9Uk0=; b=SHLKWW6gYd9+xVV5Y7/W8wrpBK6cHH93ZlGAYJOKwSlwxldFWLCri6OWYf/RS+9bQP eqcZw1cwIVHSDnOh62NgRyhYmHQFna9/3EAcnhbAzrYM8grsSRllfdp9zjjqgiJuIdl9 WMtUC3mpmWUFSkywGOvM4odux884Eg3ALdLYxpM0L4YTM92SVsuHuhIW7BqOn/Qoxwem +b/CdyzwqqYjIB4lep0BG3NV4G0vqFzC4bq7z84kLY4dCw4gHd9qLlbV1E/rDRq8a85D g2U/f6rgVm/QXVTyLk6/cgt7PQTxeeI9aHY+2VtCjPjj3cDx0+scdD20uXl/J0l0u4yu /rGg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 82si1192479pfx.595.2017.09.26.05.18.21; Tue, 26 Sep 2017 05:18:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030593AbdIZMST (ORCPT + 26 others); Tue, 26 Sep 2017 08:18:19 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:52143 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S968589AbdIZMSQ (ORCPT ); Tue, 26 Sep 2017 08:18:16 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 5579220933; Tue, 26 Sep 2017 14:18:14 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id D3F582088F; Tue, 26 Sep 2017 14:17:55 +0200 (CEST) From: Quentin Schulz To: linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, lee.jones@linaro.org Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com, Quentin Schulz Subject: [PATCH v2 06/10] pinctrl: axp209: add support for AXP813 GPIOs Date: Tue, 26 Sep 2017 14:17:16 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AXP813 has only two GPIOs. GPIO0 can either be used as a GPIO, an LDO regulator or an ADC. GPIO1 can be used either as a GPIO or an LDO regulator. Moreover, the status bit of the GPIOs when in input mode is not offset by 4 unlike the AXP209. Signed-off-by: Quentin Schulz --- Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt | 13 ++- drivers/pinctrl/pinctrl-axp209.c | 30 ++++++- 2 files changed, 39 insertions(+), 4 deletions(-) -- git-series 0.9.1 diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt index a5bfe87..a1d5dec 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt @@ -4,7 +4,9 @@ This driver follows the usual GPIO bindings found in Documentation/devicetree/bindings/gpio/gpio.txt Required properties: -- compatible: Should be "x-powers,axp209-gpio" +- compatible: Should be one of: + - "x-powers,axp209-gpio" + - "x-powers,axp813-pctl" - #gpio-cells: Should be two. The first cell is the pin number and the second is the GPIO flags. - gpio-controller: Marks the device node as a GPIO controller. @@ -49,8 +51,17 @@ Example: GPIOs and their functions ------------------------- +axp209 +------ GPIO | Functions ------------------------ GPIO0 | gpio_in, gpio_out, ldo, adc GPIO1 | gpio_in, gpio_out, ldo, adc GPIO2 | gpio_in, gpio_out + +axp813 +------ +GPIO | Functions +------------------------ +GPIO0 | gpio_in, gpio_out, ldo, adc +GPIO1 | gpio_in, gpio_out, ldo diff --git a/drivers/pinctrl/pinctrl-axp209.c b/drivers/pinctrl/pinctrl-axp209.c index 11f871e..500862b 100644 --- a/drivers/pinctrl/pinctrl-axp209.c +++ b/drivers/pinctrl/pinctrl-axp209.c @@ -108,11 +108,28 @@ static const struct axp20x_desc_pin axp209_pins[] = { AXP20X_FUNCTION(0x2, "gpio_in")), }; +static const struct axp20x_desc_pin axp813_pins[] = { + AXP20X_PIN(AXP20X_PINCTRL_PIN(0, "GPIO0", (void *)AXP20X_GPIO0_CTRL), + AXP20X_FUNCTION(0x0, "gpio_out"), + AXP20X_FUNCTION(0x2, "gpio_in"), + AXP20X_FUNCTION(0x3, "ldo"), + AXP20X_FUNCTION(0x4, "adc")), + AXP20X_PIN(AXP20X_PINCTRL_PIN(1, "GPIO1", (void *)AXP20X_GPIO1_CTRL), + AXP20X_FUNCTION(0x0, "gpio_out"), + AXP20X_FUNCTION(0x2, "gpio_in"), + AXP20X_FUNCTION(0x3, "ldo")), +}; + static const struct axp20x_pinctrl_desc axp20x_pinctrl_data = { .pins = axp209_pins, .npins = ARRAY_SIZE(axp209_pins), }; +static const struct axp20x_pinctrl_desc axp813_pinctrl_data = { + .pins = axp813_pins, + .npins = ARRAY_SIZE(axp813_pins), +}; + static int axp20x_gpio_input(struct gpio_chip *chip, unsigned offset) { return pinctrl_gpio_direction_input(chip->base + offset); @@ -479,6 +496,7 @@ static int axp20x_pctl_probe(struct platform_device *pdev) struct axp20x_pctl *pctl; struct pinctrl_desc *pctrl_desc; struct pinctrl_pin_desc *pins; + struct device_node *np = pdev->dev.of_node; int ret, i; if (!of_device_is_available(pdev->dev.of_node)) @@ -505,13 +523,18 @@ static int axp20x_pctl_probe(struct platform_device *pdev) pctl->chip.set = axp20x_gpio_set; pctl->chip.direction_input = axp20x_gpio_input; pctl->chip.direction_output = axp20x_gpio_output; - pctl->chip.ngpio = 3; pctl->regmap = axp20x->regmap; - pctl->desc = &axp20x_pinctrl_data; - pctl->gpio_status_offset = 4; + if (of_device_is_compatible(np, "x-powers,axp209-gpio")) { + pctl->desc = &axp20x_pinctrl_data; + pctl->gpio_status_offset = 4; + } else { + pctl->desc = &axp813_pinctrl_data; + pctl->gpio_status_offset = 0; + } pctl->dev = &pdev->dev; + pctl->chip.ngpio = pctl->desc->npins; platform_set_drvdata(pdev, pctl); @@ -566,6 +589,7 @@ static int axp20x_pctl_probe(struct platform_device *pdev) static const struct of_device_id axp20x_pctl_match[] = { { .compatible = "x-powers,axp209-gpio" }, + { .compatible = "x-powers,axp813-pctl" }, { } }; MODULE_DEVICE_TABLE(of, axp20x_pctl_match); From patchwork Tue Sep 26 12:17:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 114257 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp3760573qgf; Tue, 26 Sep 2017 05:19:18 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDA3kziv3gy9JcVFfMjeJNhe2X8nwmlnJu3qVhMFrdOPZTyvnSMtWa7Vj11fRecuwCu3q8Z X-Received: by 10.84.134.35 with SMTP id 32mr10748739plg.20.1506428358189; Tue, 26 Sep 2017 05:19:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506428358; cv=none; d=google.com; s=arc-20160816; b=fdW9olDr+zwDgGw0QSdGaHF4np6Lc9X7PaA3qFbvWRmG4IJFoHqvsFuPvRA1E6KoFZ jDyC97+DvbbX0U3yBQ52k33x8lTcpCts53JJqtd2tDBmUBSgwe6WavVe0abpIcz/odXS rn5EFIaFCjyjDzlb890zSmecazicj26swAsRpJjAOnuoYk81/fehINs0rLZlXBjTdLmt PpiPqMirbVXZQ6xDDlXIhAb1K6OgYtjW7RTsjiba31lqy4M/fDAErFbXiXh5v9luxvhc cykjI0U0E8rkwfV3WnBE9CWLXkGj4L6uAU6YeUu2PZPpkq4k9rpxU4q827T0Zti9h3BN y/8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=AqdwgIHiu1SK22FgtyWqkRQN4vYSnW5T8WaWvZJWZfM=; b=GtPaRW/s7k+GJjiC389bs7XE/a0WJ+vDnRRZp6q0u4CNSctSkZlaso8I569tnArmNd m/Ch8mx58KOGVAxECD5CTj4dku8mpW5x6d59F3kCgrSy6JdDD6uQwAW61wfZnwjzZzkA Wuvcnu3cYv0m2APR3o1dO1WZNKEx1kcEMBOLWaBOr1SSP6c0WJko1LMJQCgSXnxdrbLp GqSaow4jbkfQwU2zjnSUfxXCXknj4SOkX2Q4xLzmVCCut8JAHsQ2IU93zzN13xgPHyDt 9Ec9DxMsfVaYsFSTlXtceKxpOvsOA3gXYYT3PzmqCv/QEtWkHrqSpRYTpwFue0NUltrD We8Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n1si5522368pfg.599.2017.09.26.05.19.17; Tue, 26 Sep 2017 05:19:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030634AbdIZMTQ (ORCPT + 26 others); Tue, 26 Sep 2017 08:19:16 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:52159 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S968591AbdIZMSR (ORCPT ); Tue, 26 Sep 2017 08:18:17 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id B5DAD20890; Tue, 26 Sep 2017 14:18:14 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 848AF208D2; Tue, 26 Sep 2017 14:17:56 +0200 (CEST) From: Quentin Schulz To: linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, lee.jones@linaro.org Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com, Quentin Schulz Subject: [PATCH v2 08/10] ARM: dts: add dtsi for AXP813 PMIC Date: Tue, 26 Sep 2017 14:17:18 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Maxime Ripard The AXP813 PMIC is used with some Allwinner SoCs. Create a dtsi to include in each board embedding it. Signed-off-by: Quentin Schulz --- arch/arm/boot/dts/axp813.dtsi | 58 ++++++++++++++++++++++++++++++++++++- 1 file changed, 58 insertions(+) create mode 100644 arch/arm/boot/dts/axp813.dtsi -- git-series 0.9.1 diff --git a/arch/arm/boot/dts/axp813.dtsi b/arch/arm/boot/dts/axp813.dtsi new file mode 100644 index 0000000..e7f95e8 --- /dev/null +++ b/arch/arm/boot/dts/axp813.dtsi @@ -0,0 +1,58 @@ +/* + * Copyright 2017 Free Electrons + * + * Quentin Schulz + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/* + * AXP813 Integrated Power Management Chip + */ + +&axp813 { + interrupt-controller; + #interrupt-cells = <1>; + + axp_pctl: axp_pctl { + compatible = "x-powers,axp813-pctl"; + gpio-controller; + #gpio-cells = <2>; + }; +}; From patchwork Tue Sep 26 12:17:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 114258 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp3760763qgf; Tue, 26 Sep 2017 05:19:28 -0700 (PDT) X-Google-Smtp-Source: AOwi7QBLp7do3nrOMGFd8jNYdDMggqukez1sEIafh7FUl6XmR6NifuqeGhOuMbxD5kyANcvy8Jfv X-Received: by 10.99.42.3 with SMTP id q3mr11127767pgq.354.1506428368288; Tue, 26 Sep 2017 05:19:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506428368; cv=none; d=google.com; s=arc-20160816; b=aVUPR4rErfN8Y6oBIMAZ00t34MGnF9Kc7XO7b47M9qalxV+oydFXBBLTIex9P0o1Cm 8OUbL2C6VRG/dv4YITLc3xmLqltn+/boSXd/nSXI2VTYtfKKWFQZ5YeAsouObydCSwIG 7b2sNrc3OXN7CFDUokxMBzkt/vBpUJ74fsvZlT/A13+5JV68Nc41sIioQwLbgC+6ws6F 2zDA/Spnb1lAVAmlbA//utgU+D44Y4MaI40t8WcJL8E/xFwI064LdRFmIw/wgSyXTgET 0E1tnLmiEs/FhVeGzTXvcQQIN1wk+TP1d6e5Nuf7UhQM6TFlKaTvnWMlSoL2QnOC4lve aH0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=ogmiTsvIkz6+4ZSZNsp8OXPtZXx4HaopZE//AmSEeOg=; b=Y69ReVZA5WbIUFYLDX5rw07ZhHm0wCBSMP/SlMlFNtstp9LOvV7e3sGNf2CFJi3Zb8 K3YerE5b0r6iPxIh5mu+KQnW0AhCJkix2LeTF3XCPbxO94PJOzzc+EpyvsQrwYKKGhF5 Yk10psTVtfxUXh55miwTFByX1v9UWvu25OgbZi6sNd73O47WdWQYiKKSxucXQOCddA6P nUPHmxCENo7faxBzTRniq3JayxSFa8xPpRSjSU/Yi2wN0u+v+xcI2ZlEvjdlY4ey67Nb LoanK0UbBf0Dzj2OKOF/zsmBGFqxkQtZCoGRB81tZPeW/i6MklVDFc63Kiu0lxehc3hU ZPGw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n1si5522368pfg.599.2017.09.26.05.19.28; Tue, 26 Sep 2017 05:19:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030623AbdIZMTO (ORCPT + 26 others); Tue, 26 Sep 2017 08:19:14 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:52165 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S968592AbdIZMSR (ORCPT ); Tue, 26 Sep 2017 08:18:17 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 07BC3208D2; Tue, 26 Sep 2017 14:18:15 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 3502B2090D; Tue, 26 Sep 2017 14:17:57 +0200 (CEST) From: Quentin Schulz To: linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, lee.jones@linaro.org Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com, Quentin Schulz Subject: [PATCH v2 10/10] ARM: dts: sun8i: bananapi-m3: include axp813 dtsi Date: Tue, 26 Sep 2017 14:17:20 +0200 Message-Id: <594364dbd6b11b76f4cb1c5eaa28b9f1bf17cd9b.1506428208.git-series.quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This board has an AXP813 PMIC so let's include its dtsi. Signed-off-by: Quentin Schulz --- arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) -- git-series 0.9.1 diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts index 2bafd7e..0bf04a3 100644 --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts @@ -91,7 +91,7 @@ &r_rsb { status = "okay"; - axp81x: pmic@3a3 { + axp813: pmic@3a3 { compatible = "x-powers,axp813"; reg = <0x3a3>; interrupt-parent = <&r_intc>; @@ -123,6 +123,8 @@ }; }; +#include "axp813.dtsi" + ®_usb1_vbus { gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ status = "okay";