From patchwork Thu Jul 16 08:22:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 235630 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp584372ilg; Thu, 16 Jul 2020 01:23:02 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxRM/pX243/SSOvgddUNXNLYy7JI8RIt+cXhvHzGS58spLuC93lot5Dk6zjeK8PYMn9TwJ9 X-Received: by 2002:a17:906:c44c:: with SMTP id ck12mr2707283ejb.145.1594887782618; Thu, 16 Jul 2020 01:23:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594887782; cv=none; d=google.com; s=arc-20160816; b=xTtEXIUNZbvXU1Dy5Qj1CkBBH8Hb8YClWVeGE7cnBLnhffjm5/fKYqFuXdEK+X9GDG BzS3Q72uAIWjFhVKWhfU1zIsPUBHfiBAUx7tB3i9TsjjNRN5wm0EIj98uH8p2OLL6wcU ih59pIWJJ+sws1tPS79RgzjZYPEq1AmQvWoCaD0DEZAlQKOzEx7V6BwRPAyuTSLY3Rik uJd4kRno1aELXor6YNzsoJJbT8EF6F/EDs5wHOM7KfQQ3lTt14kpNEOCeyycuBlxiFVv Oh4VOQZGQ0RIt9eVIEND9u+fmdAHjLR7bGmVMX1iBkMCJr6F4HlbcCTEEqF3S61MWCcJ 7k3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=5VliJ1eRKODWhjxkf03Nw+kM4cdPS9d8ibF/Wms+xHg=; b=lkyiDyYzqHfu6RAnJQ5i8Cc7ASTEpk7jk0ZgZZUk/RQP3fzOQYJjjX+4hvRgDYiGfV UvPfXGHA2sp2rMc//Tu2ywyX7hrW5RzGs0A8oW+G0MRN9WYQ/A0h1t0mVXSjhVLebaRP 66NSjWJnBogLsB7BK41X6felWuETFo161uTIdHBELVFHVGFbxt9AUL744eZLEVkEs+0i BH4eL3kAHw0hj89Bk1Nk3DXN+GcBiTfSe0rzyWkpKMsIqrmE1CzjSbJZeZF/a2Oxxzg/ zfn6Rd8iJJ9+Vn/6CvTm/bKVOVdrLdf3A3XR73pfiAUqBgmHNod0wm45TpfhL3zy5M+L /xnQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=FWOUjBRp; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g26si2930614edv.376.2020.07.16.01.23.02; Thu, 16 Jul 2020 01:23:02 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=FWOUjBRp; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726848AbgGPIXB (ORCPT + 6 others); Thu, 16 Jul 2020 04:23:01 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:37516 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725867AbgGPIXA (ORCPT ); Thu, 16 Jul 2020 04:23:00 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 06G8Mw3O037713; Thu, 16 Jul 2020 03:22:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594887778; bh=5VliJ1eRKODWhjxkf03Nw+kM4cdPS9d8ibF/Wms+xHg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=FWOUjBRpFUGwDrw3CHdTqK2uwcSjvV5swSguE9Rgu4frdeANw4RF7COEnwmKk6Y// XlhF+mzvTH5kDS8HYP7QeM6m45zwDFRqBkUjlIcFg8c9xzZtbgomVIMrGBoUyOhM2e TEaQf9ko9kWilzXtfZfGq+F2FABfmwneEUOQS9VA= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 06G8Mw8C043181; Thu, 16 Jul 2020 03:22:58 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 16 Jul 2020 03:22:58 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 16 Jul 2020 03:22:57 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 06G8MrSG049495; Thu, 16 Jul 2020 03:22:56 -0500 From: Roger Quadros To: CC: , , , , , Roger Quadros Subject: [PATCH v4 1/3] dt-binding: phy: convert ti,omap-usb2 to YAML Date: Thu, 16 Jul 2020 11:22:50 +0300 Message-ID: <20200716082252.21266-2-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200716082252.21266-1-rogerq@ti.com> References: <20200716082252.21266-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Move ti,omap-usb2 to its own YAML schema. Signed-off-by: Roger Quadros Reviewed-by: Rob Herring --- .../devicetree/bindings/phy/ti,omap-usb2.yaml | 72 +++++++++++++++++++ .../devicetree/bindings/phy/ti-phy.txt | 37 ---------- 2 files changed, 72 insertions(+), 37 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml new file mode 100644 index 000000000000..a05110351814 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OMAP USB2 PHY + +maintainers: + - Kishon Vijay Abraham I + - Roger Quadros + +properties: + compatible: + oneOf: + - items: + - enum: + - ti,dra7x-usb2 + - ti,dra7x-usb2-phy2 + - ti,am654-usb2 + - enum: + - ti,omap-usb2 + - items: + - const: ti,omap-usb2 + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + minItems: 1 + items: + - description: wakeup clock + - description: reference clock + + clock-names: + minItems: 1 + items: + - const: wkupclk + - const: refclk + + syscon-phy-power: + $ref: /schemas/types.yaml#definitions/phandle-array + description: + phandle/offset pair. Phandle to the system control module and + register offset to power on/off the PHY. + + ctrl-module: + $ref: /schemas/types.yaml#definitions/phandle + description: + (deprecated) phandle of the control module used by PHY driver + to power on the PHY. Use syscon-phy-power instead. + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + +examples: + - | + usb0_phy: phy@4100000 { + compatible = "ti,am654-usb2", "ti,omap-usb2"; + reg = <0x4100000 0x54>; + syscon-phy-power = <&scm_conf 0x4000>; + clocks = <&k3_clks 151 0>, <&k3_clks 151 1>; + clock-names = "wkupclk", "refclk"; + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt index 8f93c3b694a7..60c9d0ac75e6 100644 --- a/Documentation/devicetree/bindings/phy/ti-phy.txt +++ b/Documentation/devicetree/bindings/phy/ti-phy.txt @@ -27,43 +27,6 @@ omap_control_usb: omap-control-usb@4a002300 { reg-names = "otghs_control"; }; -OMAP USB2 PHY - -Required properties: - - compatible: Should be "ti,omap-usb2" - Should be "ti,dra7x-usb2" for the 1st instance of USB2 PHY on - DRA7x - Should be "ti,dra7x-usb2-phy2" for the 2nd instance of USB2 PHY - in DRA7x - Should be "ti,am654-usb2" for the USB2 PHYs on AM654. - - reg : Address and length of the register set for the device. - - #phy-cells: determine the number of cells that should be given in the - phandle while referencing this phy. - - clocks: a list of phandles and clock-specifier pairs, one for each entry in - clock-names. - - clock-names: should include: - * "wkupclk" - wakeup clock. - * "refclk" - reference clock (optional). - -Deprecated properties: - - ctrl-module : phandle of the control module used by PHY driver to power on - the PHY. - -Recommended properies: -- syscon-phy-power : phandle/offset pair. Phandle to the system control - module and the register offset to power on/off the PHY. - -This is usually a subnode of ocp2scp to which it is connected. - -usb2phy@4a0ad080 { - compatible = "ti,omap-usb2"; - reg = <0x4a0ad080 0x58>; - ctrl-module = <&omap_control_usb>; - #phy-cells = <0>; - clocks = <&usb_phy_cm_clk32k>, <&usb_otg_ss_refclk960m>; - clock-names = "wkupclk", "refclk"; -}; - TI PIPE3 PHY Required properties: From patchwork Thu Jul 16 08:22:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 235631 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp584446ilg; Thu, 16 Jul 2020 01:23:09 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwCKOMg6x7mXO5QgWxlwF2TyGcbXwjtGVEuWxxk+T5YUJRTE61ukCwsr0T9XaXuvd7Lw/nR X-Received: by 2002:a05:6402:2067:: with SMTP id bd7mr3329332edb.143.1594887789647; Thu, 16 Jul 2020 01:23:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594887789; cv=none; d=google.com; s=arc-20160816; b=ewyYDm9MSfYBAPbaplkdd8gKzTlpASLJgNkVGfhSeZcDA8wZCTrseUFnQmBguhj0Kp ar3IAm/B7ouaY0vCes69jARtZOBzXBXaDa82Mn99VHunX4QQt7O988JMNrJj2JlGm9qI ICs9ro7AIYeqjkUr4Ma3o8Gqtxd1OWgveAfhn+7vogqJCj4KXnfz1jZgXQlg+7vmqRQd xMH5CA3ult8FlfMSfGDBTXYgdj0xAx3fR8HbK0V+WpJMHYznnf4mt1snv25B6Vgo+ivx L1J1odcOI5JcptGuDebH3fePY/Z1O5jmvrIgegnvtTh5epdR4ivUE5gGUMO/4gBB+4gM NMxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=eV0FmK0L/UGY3PgbV8rEUhbMy0YKYdxtkan+LL/VvZk=; b=O4pvcnkZ3iElh6iL7wi3/QO5YxQeowsvc67OtSmHaSphEmX7PciuDSQFtbxaj83A2E zxD/xnBW70E5KtYckgoCUJbGYo9jEqLmpVn8Wf++24XqHbkwuX6HZToCMx+k1VytExeV c6eSHBfmZKgQuHm3buKSrmMG5XEuz4rQTXVKnQCgEiB2q5RKGpwTvTaFkzw+mkpPAL8F Df+hOI5HcVk4kdevZF5O05T0xlJ0tabvAqvNWj57JlCz6JxhKU9bLFPW8AfC7xuzQiQd EbN03dxww+fP3+RrKPU2obVErlW/1I0FQtTUk+ZPTWd+qCslsuKwWLT7IkrEXQJ+PcXK 7uIg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=WbQ8dxEq; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Roger Quadros Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml | 5 +++++ 1 file changed, 5 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml index a05110351814..7d52c5bf9f21 100644 --- a/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml +++ b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml @@ -53,6 +53,11 @@ properties: (deprecated) phandle of the control module used by PHY driver to power on the PHY. Use syscon-phy-power instead. + ti,disable-charger-det: + description: + if present, driver will disable charger detection logic. + type: boolean + required: - compatible - reg From patchwork Thu Jul 16 08:22:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 235632 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp584478ilg; Thu, 16 Jul 2020 01:23:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy1HjoFMl4pcDFVQQLu2lRIqKy7SN3DiXILTgi1xBoP0W8DX7takKjjMbzSebIMegAXfaP4 X-Received: by 2002:a50:e689:: with SMTP id z9mr3421649edm.131.1594887792906; Thu, 16 Jul 2020 01:23:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594887792; cv=none; d=google.com; s=arc-20160816; b=XjAxRiG+sXcfpyOkBcMwX3OaZeV3aq94iQKUBQcsz8ly9PcKkC/U6ox4NoCCjuzyjt 5wgzHzg4TtvDXIDQyZl3zfWUlIBzT9eEZtoP2nusZYNK5KxLUZvbx/ADFlNt0a5b8WbF w7n3bizk1QO3yc9UEuDEZ3ceGHqszGD+p8b3Q9Ww20tRrvi7+BIikcC82clLv5hEKPYX E8MTuCAYkyXsyzhSns7e25DfwPfdm5Ula3Xww+r9vjhPJgmzd5J9vD3+Va5lWo+lQd/k tCyze3NZtJEsVU2PjboEdSFEvC4HOJxhiycQ5KSXV7pOwXLtLDyreRTvi9wPHa0pD0It zNFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=gtnBfikQgeKFXoCbSTClfcF4fEw+NTU1+ewwsYoy6H0=; b=Ul+yiZ+u37pvKeMI5KWaESgsxFXwvVDe45/7Q5OZgSRpwZ5U7qBQ+zCeSevSOKggRC 7ORL8aqNztAnbLLMlN+yCoCtHqZq4P93GV585bzZr5Kf6Wa/YT6lH3jd58RKWbSG3s4M pyAMcbcNZOd6VFl+zH0o2BqD2A2q9dE0TIGcfgVnjyjSv4jChw3qNdWG+s4nnbsOvXMd UXCrMaZGkcC3Xs/y686FUaWUCRPsW87poFInU3lU5O4puW3/Gx/EGXwyxkZXvyfUXx+F qoZvRT1DvHCpvncLni27IA1wxQIfbS2Q2jBqclGgatmg6yBLd/Ahczh8Xp2lnH/fWLi9 9HDw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=MfRAQMC7; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id k10si2675084eja.394.2020.07.16.01.23.12; Thu, 16 Jul 2020 01:23:12 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=MfRAQMC7; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726411AbgGPIXJ (ORCPT + 6 others); Thu, 16 Jul 2020 04:23:09 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:47892 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725867AbgGPIXE (ORCPT ); Thu, 16 Jul 2020 04:23:04 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 06G8N2PO029530; Thu, 16 Jul 2020 03:23:02 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594887782; bh=gtnBfikQgeKFXoCbSTClfcF4fEw+NTU1+ewwsYoy6H0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=MfRAQMC7cLo6QMzIfOTUq2atXAB3dkir5Y9Kyd07eL1pnM+WyP9ILAvvjyA9rxAcn 2ZE68FT1f52UC9KzgDvjWPjFfKIcQQr8Tp+ErxV6/Ghn5t/jUyoPBVf47KKzwZB1so CUW3ynRcEohBTtGeKm+/ET8baZG9YgLrbuA0PpEA= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 06G8N2eu009479 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 16 Jul 2020 03:23:02 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 16 Jul 2020 03:23:02 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 16 Jul 2020 03:23:02 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 06G8MrSI049495; Thu, 16 Jul 2020 03:23:00 -0500 From: Roger Quadros To: CC: , , , , , Roger Quadros , Bin Liu Subject: [PATCH v4 3/3] phy: omap-usb2-phy: disable PHY charger detect Date: Thu, 16 Jul 2020 11:22:52 +0300 Message-ID: <20200716082252.21266-4-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200716082252.21266-1-rogerq@ti.com> References: <20200716082252.21266-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which could cause enumeration failure with some USB hubs. Disabling the USB2_PHY Charger Detect function will put D+ into the normal state. Using property "ti,disable-charger-det" in the DT usb2-phy node to enable this workaround for AM654x PG1.0. This addresses Silicon Errata: i2075 - "USB2PHY: USB2PHY Charger Detect is Enabled by Default Without VBUS Presence" Signed-off-by: Bin Liu Signed-off-by: Sekhar Nori Signed-off-by: Roger Quadros --- drivers/phy/ti/phy-omap-usb2.c | 35 +++++++++++++++++++++++++++------- 1 file changed, 28 insertions(+), 7 deletions(-) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/phy/ti/phy-omap-usb2.c b/drivers/phy/ti/phy-omap-usb2.c index cb2dd3230fa7..21c3904d4efc 100644 --- a/drivers/phy/ti/phy-omap-usb2.c +++ b/drivers/phy/ti/phy-omap-usb2.c @@ -26,6 +26,10 @@ #define USB2PHY_ANA_CONFIG1 0x4c #define USB2PHY_DISCON_BYP_LATCH BIT(31) +#define USB2PHY_CHRG_DET 0x14 +#define USB2PHY_CHRG_DET_USE_CHG_DET_REG BIT(29) +#define USB2PHY_CHRG_DET_DIS_CHG_DET BIT(28) + /* SoC Specific USB2_OTG register definitions */ #define AM654_USB2_OTG_PD BIT(8) #define AM654_USB2_VBUS_DET_EN BIT(5) @@ -43,6 +47,7 @@ #define OMAP_USB2_HAS_START_SRP BIT(0) #define OMAP_USB2_HAS_SET_VBUS BIT(1) #define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT BIT(2) +#define OMAP_USB2_DISABLE_CHRG_DET BIT(3) struct omap_usb { struct usb_phy phy; @@ -236,6 +241,13 @@ static int omap_usb_init(struct phy *x) omap_usb_writel(phy->phy_base, USB2PHY_ANA_CONFIG1, val); } + if (phy->flags & OMAP_USB2_DISABLE_CHRG_DET) { + val = omap_usb_readl(phy->phy_base, USB2PHY_CHRG_DET); + val |= USB2PHY_CHRG_DET_USE_CHG_DET_REG | + USB2PHY_CHRG_DET_DIS_CHG_DET; + omap_usb_writel(phy->phy_base, USB2PHY_CHRG_DET, val); + } + return 0; } @@ -366,14 +378,12 @@ static int omap_usb2_probe(struct platform_device *pdev) phy->mask = phy_data->mask; phy->power_on = phy_data->power_on; phy->power_off = phy_data->power_off; + phy->flags = phy_data->flags; - if (phy_data->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) { - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - phy->phy_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(phy->phy_base)) - return PTR_ERR(phy->phy_base); - phy->flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT; - } + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + phy->phy_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(phy->phy_base)) + return PTR_ERR(phy->phy_base); phy->syscon_phy_power = syscon_regmap_lookup_by_phandle(node, "syscon-phy-power"); @@ -405,6 +415,17 @@ static int omap_usb2_probe(struct platform_device *pdev) } } + /* + * Errata i2075: USB2PHY: USB2PHY Charger Detect is Enabled by + * Default Without VBUS Presence. + * + * AM654x SR1.0 has a silicon bug due to which D+ is pulled high after + * POR, which could cause enumeration failure with some USB hubs. + * Disabling the USB2_PHY Charger Detect function will put D+ + * into the normal state. + */ + if (of_property_read_bool(node, "ti,disable-charger-det")) + phy->flags |= OMAP_USB2_DISABLE_CHRG_DET; phy->wkupclk = devm_clk_get(phy->dev, "wkupclk"); if (IS_ERR(phy->wkupclk)) {